Imaging unit, endoscope, and method for manufacturing imaging unit

The imaging unit for endoscopes addresses the challenge of resin-sealing small electronic components by optimizing their arrangement within recesses of a shaped circuit board and using an efficient resin injection method, resulting in improved reliability and reduced manufacturing time.

JP2025083262AActive Publication Date: 2025-05-30OLYMPUS MEDICAL SYST CORP
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Patent Information

Application Number
JP2024034764
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-11-16
Filing Date
2024-03-07
Publication Date
2025-05-30
Estimated Expiration
2044-03-07

AI Technical Summary

Technical Problem

Existing imaging units for endoscopes face challenges in reliably resin-sealing electronic components due to the difficulty in filling resin between small components, which can lead to reduced reliability and increased manufacturing time.

Method used

The imaging unit design features a semiconductor package, a planar circuit board, and a shaped circuit board, where electronic components are housed in recesses of the shaped circuit board, allowing for efficient resin filling by optimizing the arrangement of components and using a resin injection method that leverages interfacial tension.

Benefits of technology

This design ensures reliable resin sealing of electronic components, enhancing the overall reliability of the imaging unit and reducing manufacturing time by facilitating efficient resin filling without overflowing or leaving cavities.

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Abstract

To provide a highly reliable imaging unit 1.SOLUTION: An imaging unit 1 includes a semiconductor package 10, a planar circuit board 20, an irregular circuit board 30 having a recess T30, a plurality of electronic components 40, and a resin 50 filling the recess T30, and in the irregular circuit board 30, the distance W between the first wall surface T30S1 and the second wall surface T30S2 of the recess T30 becomes smaller toward the bottom surface T30SB, and a first distance L1 between the first electronic component 41 of the multiple electronic components 40 and the first wall surface T30S1 is larger than the maximum second distance L2-L4 between each of the multiple electronic components 42-45 other than the first electronic component 41 and an adjacent wall surface of the first wall surface T30S1 and the second wall surface T30S2.SELECTED DRAWING: Figure 3
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Description

Technical Field

[0001] The present invention relates to an imaging unit in which a plurality of electronic components are mounted between a planar circuit board and a shaped circuit board, an endoscope having the imaging unit in which a plurality of electronic components are mounted between the planar circuit board and the shaped circuit board, and a method for manufacturing the imaging unit in which a plurality of electronic components are mounted between the planar circuit board and the shaped circuit board.

Background Art

[0002] Japanese Patent Application Laid-Open No. 2017-23234 discloses an imaging unit of an endoscope using a shaped circuit board which is a three-dimensional circuit device. The imaging unit includes a semiconductor package, a planar circuit board joined to the semiconductor package and having a plurality of electronic components mounted thereon, and a shaped circuit board joined to the planar circuit board and having the plurality of electronic components accommodated in cutouts.

Prior Art Document

Patent Document

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] The plurality of electronic components accommodated in the cutouts are preferably resin-sealed for reliability improvement. However, it is not easy to fill resin between the small plurality of electronic components.

Means for Solving the Problems

[0005] The imaging unit according to an embodiment of the present invention has a first surface and a second surface on the opposite side of the first surface, includes an imaging element, and has a plurality of first electrodes disposed on the second surface. A semiconductor package, having a third surface and a fourth surface on the opposite side of the third surface, with a plurality of second electrodes disposed on the third surface, and a plurality of third electrodes and a plurality of fourth electrodes disposed on the fourth surface, each of the plurality of second electrodes being joined to each of the plurality of first electrodes. A planar circuit board, having a fifth surface, a first side surface and a second side surface orthogonal to the fifth surface, the fifth surface being divided into a first front surface and a second front surface by recesses each having an opening in the first side surface and the second side surface, the recess having a first wall surface, a second wall surface and a bottom surface, and a plurality of fifth electrodes disposed on the fifth surface, each of the plurality of fifth electrodes being joined to each of the plurality of third electrodes. A shaped circuit board, a plurality of electronic components each joined to each of the plurality of fourth electrodes of the planar circuit board and housed in the recess, and a resin filling the recess. The shaped circuit board has a distance between the first wall surface and the second wall surface that decreases toward the bottom surface, and a first distance between a first electronic component closest to the first side surface among the plurality of electronic components and the first wall surface is greater than a maximum second distance among distances between each of the plurality of electronic components other than the first electronic component and a wall surface close to each of the first wall surface or the second wall surface.

[0006] The endoscope according to an embodiment of the present invention has an imaging unit at the distal end of an insertion portion. The imaging unit has a first surface and a second surface on the opposite side of the first surface, includes an imaging element, and has a semiconductor package in which a plurality of first electrodes are disposed on the second surface. The imaging unit also has a third surface and a fourth surface on the opposite side of the third surface, a plurality of second electrodes are disposed on the third surface, a plurality of third electrodes and a plurality of fourth electrodes are disposed on the fourth surface, and each of the plurality of second electrodes is joined to each of the plurality of first electrodes. The imaging unit further has a planar circuit board, a fifth surface, a first side surface and a second side surface orthogonal to the fifth surface. The fifth surface is divided into a first front surface and a second front surface by a recess having openings in the first side surface and the second side surface respectively. The recess has a first wall surface, a second wall surface and a bottom surface. A plurality of fifth electrodes are disposed on the fifth surface, and each of the plurality of fifth electrodes is joined to each of the plurality of third electrodes. The imaging unit also has a deformed circuit board, a plurality of electronic components, each of which is joined to each of the plurality of fourth electrodes of the planar circuit board and is housed in the recess, and a resin filling the recess. In the deformed circuit board, the distance between the first wall surface and the second wall surface becomes smaller as it approaches the bottom surface. Among the plurality of electronic components, a first distance between a first electronic component closest to the first side surface and the first wall surface is greater than a maximum second distance among distances between each of the plurality of electronic components other than the first electronic component and a wall surface (either the first wall surface or the second wall surface) closest to each of them.

[0007] The manufacturing method of the imaging unit according to an embodiment of the present invention includes a semiconductor package having a first surface and a second surface on the opposite side of the first surface, including an imaging element, and a plurality of first electrodes disposed on the second surface, and a flat circuit board having a third surface and a fourth surface on the opposite side of the third surface, wherein a plurality of second electrodes each joined to each of the plurality of first electrodes are disposed on the third surface, and a plurality of third electrodes and a plurality of fourth electrodes are disposed on the fourth surface, and a shaped circuit board having a fifth surface, a first side surface and a second side surface orthogonal to the fifth surface, wherein the fifth surface is divided into a first front surface and a second front surface by a recess having openings on the first side surface and the second side surface respectively, the recess having a first wall surface, a second wall surface and a bottom surface, the distance between the first wall surface and the second wall surface decreasing toward the bottom surface, and the plurality of fourth electrodes being disposed on the fifth surface. A plurality of electronic components are joined to the plurality of fourth electrodes of the flat circuit board, wherein a first distance between a first electronic component closest to the first side surface and the first wall surface is greater than a second distance between each of the plurality of electronic components other than the first electronic component and the wall surface closest to each of the plurality of electronic components among the first wall surface or the second wall surface. Each of the plurality of first electrodes of the semiconductor package is joined to each of the plurality of second electrodes of the flat circuit board, each of the plurality of third electrodes of the flat circuit board is joined to each of the plurality of third electrodes of the shaped circuit board, and resin is injected from between the first electronic component and the first wall surface, and the resin is cured.

Advantages of the Invention

[0008] According to an embodiment of the present invention, it is possible to provide a highly reliable imaging unit, a highly reliable endoscope, and a highly reliable manufacturing method of an imaging unit.

Brief Description of the Drawings

[0009]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

MODE FOR CARRYING OUT THE INVENTION

[0010] <First Embodiment> The imaging unit 1 of the present embodiment will be described with reference to FIGS. 1 to 4.

[0011] The drawings based on the embodiment are schematic. The relationship between the thickness and width of each part of the drawings, the ratio of the thickness of each part, etc. are different from the actual ones. There are also parts where the dimensional relationships and ratios are different between the drawings. The illustration and symbol assignment of some components are omitted. The direction in which light enters is referred to as "front", and the opposite direction of "front" is referred to as "rear".

[0012] The imaging unit 1 of the present embodiment includes a semiconductor package 10, a planar circuit board 20, a shaped circuit board 30, a plurality of electronic components 40, and a resin 50.

[0013] The semiconductor package 10 includes a cover glass 12 and an imaging device 11. The cover glass 12 has a first surface 10SA. The imaging device 11, whose rear surface is adhered to the front surface, has a second surface 10SB which is the rear surface. The imaging device 11 made of silicon as a base material is a CMOS (Complementary Metal Oxide Semiconductor) light receiving element or a CCD (Charge Coupled Device).

[0014] A plurality of first electrodes 13 are disposed on the second surface 10SB. The first electrodes 13 are, for example, solder bumps. A drive signal and power are supplied to the imaging device 11 via the plurality of first electrodes 13. Also, the subject image received by the imaging device 11 is converted into an electrical signal and output as an imaging signal via the plurality of first electrodes 13.

[0015] The semiconductor package 10 may have a stacked element in which a plurality of semiconductor elements for performing primary processing on the imaging signal are stacked on the imaging device 11, and a plurality of first electrodes 13 may be disposed on the rear surface of the stacked element. A lens unit in which a plurality of optical elements are stacked may be disposed on the first surface 10SA of the semiconductor package 10.

[0016] The planar circuit board 20 has a third surface 20SA and a fourth surface 20SB on the opposite side of the third surface 20SA. A plurality of second electrodes 21 are disposed on the third surface 20SA. As shown in FIG. 4, each of the plurality of second electrodes 21 is joined to each of the plurality of first electrodes 13 of the semiconductor package 10. A plurality of third electrodes 22 and a plurality of fourth electrodes 23 are disposed on the fourth surface 20SB.

[0017] A plurality of electronic components 40 are surface-mounted on each of the plurality of fourth electrodes 23. The plurality of electronic components 40 are, for example, chip capacitors in a substantially rectangular parallelepiped shape. The substantially rectangular parallelepiped means a rectangular parallelepiped whose corners are chamfered into curved surfaces. In the imaging unit 1, all of the plurality of electronic components 40 are chip capacitors of size 0603 (long side 0.6 mm, short side 0.3 mm).

[0018] The shaped circuit board 30 has a fifth surface 30SA, a first side surface 30SS1 and a second side surface 30SS2 that are each orthogonal to the fifth surface 30SA, and a sixth surface 30SB on the side opposite to the fifth surface 30SA. The shaped circuit board 30 is a molded interconnect device (MID) produced by injection molding, with wiring or the like disposed on its surface. The base material of the MID is epoxy, liquid crystal polymer, polyimide, polycarbonate, or the like. The shaped circuit board 30 that is an MID can be easily manufactured in a complex shape.

[0019] The fifth surface 30SA of the shaped circuit board 30 is divided into a first front surface 30SA1 and a second front surface 30SA2 by a concave T30 that has openings in the first side surface 30SS1 and the second side surface 30SS2 respectively. The concave T30 is a groove having a first wall surface T30S1, a second wall surface T30S2, and a bottom surface T30SB. In other words, the shaped circuit board 30 has a first arm portion having the first front surface 30SA1 and a second arm portion having the second front surface 30SA2, and the inner surfaces of the two arm portions are the first wall surface T30S1 and the second wall surface T30S2 respectively. The width W at the opening of the concave T30, that is, the distance between the first front surface 30SA1 and the second front surface 30SA2, is 1.2 mm.

[0020] A plurality of fifth electrodes 31 are disposed on the fifth surface 30SA (the first front surface 30SA1 and the second front surface 30SA2). Each of the plurality of fifth electrodes 31 is joined to each of the plurality of third electrodes 22 of the planar circuit board 20.

[0021] A plurality of electronic components 40 disposed on the fourth surface 20SB of the planar circuit board 20 are accommodated in the concave T30 of the shaped circuit board 30.

[0022] On each of a third side surface 30SS3 and a fourth side surface 30SS4 that are orthogonal to a first side surface 30SS1 and a second side surface 30SS2 of the shaped circuit board 30, a plurality of wiring layers 32 each extending from each of a plurality of fifth electrodes 31 are disposed. Signal cables (not shown) are joined to respective ends of the plurality of wiring layers 32.

[0023] A resin 51 is disposed in a gap between the semiconductor package 10 and the planar circuit board 20, that is, at a joint portion between the first electrode 13 and the second electrode 21. In order to efficiently fill the resin 51 in a narrow and wide gap, a notch C20 is provided in the third surface 20SA. The uncured and liquid resin 51 is injected into the gap from the notch C20 using a nozzle (not shown) and spreads between the semiconductor package 10 and the planar circuit board 20 due to surface tension.

[0024] A resin 50 is disposed in a recess T30 of the shaped circuit board 30, that is, at a joint portion between the fourth electrode 23 and the plurality of electronic components 40.

[0025] The resin 50 is injected into the recess T30 as an uncured and liquid resin 50 in the same manner as the resin 51. However, it is not easy to fill the resin 50 between the small plurality of electronic components 40 accommodated in the small recess T30. For example, if the plurality of electronic components 40 are arranged symmetrically up, down, left, and right, the plurality of electronic components 40 may impede the flow of the resin 50. For this reason, there may be a cavity where the resin 50 is not disposed, resulting in a decrease in reliability. In addition, the time required for injecting the resin 50 may be prolonged. Further, when injecting the resin 50 using a nozzle, since the opening serving as an injection hole is small, the resin 50 may overflow around the recess T30, resulting in an increase in the outer dimensions of the imaging unit 1.

[0026] The imaging unit 1 has the following features in the arrangement of the plurality of electronic components 40 accommodated in the recess T30.

[0027] The first electronic component 41 closest to the first side surface 30SS1 has its long side arranged parallel to the first side surface 30SS1. The first distance L1 (0.4 mm) between the first electronic component 41 and the first wall surface T30S1 is greater than the third distance L3 (0.2 mm) between the second wall surface T30S2. That is, the imaging unit 1 secures an opening that serves as an injection hole when injecting the resin 50 on the first side surface 30SS1 side.

[0028] For a plurality of electronic components 42 - 45 other than the first electronic component 41, their long sides are arranged perpendicular to the first side surface 30SS1.

[0029] The maximum distance among the respective distances between each of the plurality of electronic components 42 - 45 other than the first electronic component 41 and the wall surface (either the first wall surface T30S1 or the second wall surface T30S2) closest to it is called the second distance L2.

[0030] Electronic components 42 and 44 are closer to the first wall surface T30S1 than to the second wall surface T30S2. The distance between electronic components 42 and 44 and the first wall surface T30S1 is the second distance L2 (0.2 mm). Note that electronic components 43 and 45 are closer to the second wall surface T30S2 than to the first wall surface T30S1. The distance between electronic components 43 and 45 and the second wall surface T30S2 is the same as the second distance L2.

[0031] Also, the maximum distance among the distances between the plurality of electronic components 40 (41 - 45) is called the fourth distance L4. The distance between electronic component 42 and electronic component 43 is the fourth distance L4 (0.25 mm). The distance between electronic component 44 and electronic component 45 is also the fourth distance L4. The distances between electronic component 43 and electronic component 45, and between electronic component 44 and electronic component 42 are also smaller than the fourth distance L4, being 0.2 mm.

[0032] Note that the fifth distance L5, which is the distance between the plurality of electronic components 40 (41 - 45) and the bottom surface T30SB of the recess T30, is 0.25 mm.

[0033] In the imaging unit 1 configured as described above, the first distance L1 (0.4 mm) between the first electronic component 41 and the first wall surface T30S1 is wider than the widths of the other gaps (the second distance L2, the third distance L3, the fourth distance L4, and the fifth distance L5) in the internal space of the recess T30.

[0034] 4, the first wall surface T30S1 and the second wall surface T30S2 of the recess T30 of the irregular circuit board 30 are inclined with respect to the fifth surface 30SA. That is, the angle θ of the first wall surface T30S1 and the second wall surface T30S2 with respect to the fifth surface 30SA is 100 degrees, which is greater than 90 degrees. In other words, the distance W between the first wall surface T30S1 and the second wall surface T30S2 (the width of the recess T30, which is a cutout) becomes smaller toward the bottom surface T30SB.

[0035] As described later, in the imaging unit 1, the resin 50 injected between the first electronic component 41 and the first wall surface T30S1 spreads efficiently into the internal space of the recess T30 due to interfacial tension. Therefore, the imaging unit 1 is highly reliable because it is difficult for a cavity in the recess T30 where the resin 50 is not disposed to occur.

[0036] <Manufacturing method of imaging unit> A method for manufacturing the imaging unit 1 will be described with reference to the flow chart of FIG.

[0037] <Step S10> A semiconductor package 10, a planar circuit board (planar wiring board) 20, and an irregular circuit board (three-dimensional wiring board) 30 are fabricated.

[0038] The semiconductor package 10 has a first surface 10SA and a second surface 10SB opposite to the first surface 10SA. The semiconductor package 10 includes an imaging element 11 and a cover glass 12, and a plurality of first electrodes 13 are disposed on the second surface 10SB.

[0039] The planar circuit board 20 has a third surface 20SA and a fourth surface 20SB on the side opposite to the third surface 20SA. On the third surface 20SA, each of a plurality of first electrodes 13 and a plurality of second electrodes 21 that are respectively joined thereto are disposed. A plurality of third electrodes 22 and a plurality of fourth electrodes 23 are disposed on the fourth surface 20SB.

[0040] The shaped circuit board has a fifth surface 30SA, a first side surface 30SS1 and a second side surface 30SS2 orthogonal to the fifth surface 30SA. The fifth surface 30SA is divided into a first front surface 30SA1 and a second front surface 30SA2 by a concave T30 having openings in the first side surface 30SS1 and the second side surface 30SS2, respectively. The concave T30, which is a notch, has a first wall surface T30S1, a second wall surface T30S2, and a bottom surface T30SB. The distance W between the first wall surface T30S1 and the second wall surface T30S2 becomes smaller as it approaches the bottom surface T30SB. A plurality of fifth electrodes 31 are disposed on the fifth surface 30SA.

[0041] Note that the angle θ of the first wall surface T30S1 and the second wall surface T30S2 with respect to the fifth surface 30SA is preferably more than 90 degrees and less than 120 degrees, and particularly preferably more than 95 degrees and less than 110 degrees. If the angle θ is within the above range, a required number of electronic components 40 can be accommodated in the concave T30, and the resin 50 can be efficiently filled in the concave T30.

[0042] <Step S20> A plurality of electronic components 40 are joined to a plurality of fourth electrodes 23 of the planar circuit board 20.

[0043] Among the plurality of electronic components 40, the one closest to the first side surface 30SS1 is the first electronic component 41. As already described, in the arrangement of the plurality of electronic components 40, the first distance L1 between the first electronic component 41 and the first wall surface T30S1 is wider than the widths of the other plurality of gaps (the second distance L2, the third distance L3, the fourth distance L4, the fifth distance L5) in the internal space of the concave T30.

[0044] <Step S30> Each of the plurality of first electrodes 13 of the semiconductor package 10 is joined to each of the plurality of second electrodes 21 of the planar circuit board 20. Each of the plurality of third electrodes 22 of the planar circuit board 20 is joined to each of the plurality of fifth electrodes 31 of the shaped circuit board 30.

[0045] Note that, before step S20, the semiconductor package 10 and the planar circuit board 20 may be joined.

[0046] <Step S40> As shown in FIG. 6, the resin 50 is injected into the recess T30 using the nozzle 55 from between the first electronic component 41 and the first wall surface T30S1.

[0047] The first distance L1 (0.4 mm) between the first electronic component 41 and the first wall surface T30S1 is wider than the widths of the other plurality of gaps (second distance L2, third distance L3, fourth distance L4, fifth distance L5) in the internal space of the recess T30. For this reason, as shown in FIG. 7, the resin 50 spreads into the plurality of gaps in the internal space of the recess T30 due to the interfacial tension.

[0048] Note that the first distance L1 is preferably more than 0.3 mm in order to efficiently inject the resin 50. The second distance L2, the third distance L3, the fourth distance L4, and the fifth distance L5 are preferably less than 0.3 mm because the resin 50 easily spreads due to the interfacial tension.

[0049] <Step S50> The resin 50 is cured. For the curing treatment, for example, a thermal curing method or an ultraviolet curing / thermal curing combined method is used.

[0050] According to this manufacturing method, not only can the resin 50 be surely filled, but the resin 50 can be filled in a short time. Further, there is no possibility that the resin 50 overflows around the recess T30 during injection and the outer dimensions of the imaging unit 1 increase.

[0051] Although not explained, in step S40, resin 51 is injected into the gap between the semiconductor package 10 and the planar circuit board 20, and in step S50, the resin 51 is cured.

[0052] It is efficient to continuously inject the resin 50 and the resin 51. For this reason, it is preferable that the notch C20 of the planar circuit board 20, which serves as the inlet for the resin 51, is located on the first side surface 30SS1 side where the inlet for the resin 50 is located.

[0053] It is more preferable that the resin 50 and the resin 51 are the same resin. In the imaging unit 1 in which the resin 50 is disposed in the gap between the semiconductor package 10 and the planar circuit board 20, the resin 50 is filled in the corner cutout C20 on the first side surface 30SS1 side of the third surface 20SA of the planar circuit board 20 into which the resin 50 has been injected.

[0054] That is, in the imaging unit 1, it is preferable that the third surface 20SA of the planar circuit board 20 has a notch filled with the resin 50 at a corner on the first side surface 30SS1 side.

[0055] <Modification of the first embodiment> Imaging units 1A and 1B of the modified example of the first embodiment are similar to imaging unit 1 and have the same effects as imaging unit 1. For this reason, components having the same functions as imaging unit 1 are given the same reference numerals as imaging unit 1 and descriptions thereof will be omitted.

[0056] <Modification 1 of the First Embodiment> 8, the bottom surface T30SB of the recess T30 of the irregular circuit board 30 is inclined with respect to the fifth surface 30SA. That is, the fifth distance L5 (depth H30 of the recess T30), which is the distance between the multiple electronic components 40 and the bottom surface T30SB, becomes continuously smaller from the first side surface 30SS1 side toward the second side surface 30SS2 side.

[0057] Therefore, in the imaging unit 1A, the resin 50 injected from the first side surface 30SS1 side is more likely to spread to the second side surface 30SS2 side than in the imaging unit 1.

[0058] <Modification Example 2 of the First Embodiment> In the imaging unit 1B of this modification example shown in FIG. 9, a plurality of electronic components 40 having different sizes are provided, and the first electronic component 41 is the largest among the plurality of electronic components 40.

[0059] The electronic components 41, 42, and 43 are chip capacitors of size 0603 (long side 0.6 mm, short side 0.3 mm). The electronic components 44 - 46 are chip capacitors of size 0402 (long side 0.4 mm, short side 0.2 mm).

[0060] The basic arrangement of the plurality of electronic components 40 in the imaging unit 1B is set under the same conditions as the arrangement of the plurality of electronic components 40 in the imaging unit 1. However, the electronic component closest to the first side surface 30SS1 is the first electronic component 41, which is the largest among the plurality of electronic components 40 (41 - 46).

[0061] And the first distance L1 (0.4 mm) between the first electronic component 41 and the first wall surface T30S1 is wider than the widths of the other plurality of gaps (the second distance L2, the third distance L3, the fourth distance L4, the fifth distance L5) in the internal space of the recess T30.

[0062] Note that the imaging unit of the present invention may have a plurality of electronic components 40 having three or more different sizes. Also, the plurality of electronic components 40 are not limited to chip capacitors, and may include electronic components having different functions such as chip inductors and IC chips.

[0063] <Second Embodiment> The endoscope 5 (5A, 5B) of this embodiment shown in FIG. 10 includes an insertion portion 9B in which the imaging unit 1 (1A, 1B) is disposed at the distal end portion 9A, an operation portion 9C disposed on the proximal end side of the insertion portion 9B, and a universal cord 9D extending from the operation portion 9C.

[0064] Since the endoscope 5 is equipped with the imaging units 1 (1A, 1B) that are highly reliable and easy to manufacture, it is highly reliable and easy to manufacture.

[0065] The present invention is not limited to the above-described embodiments and modifications, and various changes, combinations, and applications are possible without departing from the spirit of the invention.

Explanation of Reference Numerals

[0066] 5... Endoscope 9A... Tip 9B... Insertion Portion 9C... Operation Portion 9D... Universal Cord 10... Semiconductor Package 10SA... First Surface 10SB... Second Surface 11... Image Sensor 12... Cover Glass 13... First Electrode 20... Planar Circuit Board (Planar Wiring Board) 20SA... Third Surface 20SB... Fourth Surface 21... Second Electrode 22... Third Electrode 23... Fourth Electrode 30... Anisomorphic Circuit Board (Three-Dimensional Wiring Board) 30SA... Fifth Surface 30SA1... First Front Surface 30SA2... Second Front Surface 30SB... Sixth Surface 30SS1... First Side Surface 30SS2... Second Side Surface 30SS3... Third Side Surface 30SS4... Fourth Side Surface 31... Fifth Electrode 32... Wiring Layer 40(41 - 46)... Electronic Components 41... First Electronic Component 50 ··· Resin 51 ··· Resin 55 ··· Nozzle

Claims

1. a semiconductor package having a first surface and a second surface opposite to the first surface, the semiconductor package including an image sensor, and a plurality of first electrodes disposed on the second surface; a planar circuit board having a third surface and a fourth surface opposite to the third surface, a plurality of second electrodes arranged on the third surface, a plurality of third electrodes and a plurality of fourth electrodes arranged on the fourth surface, each of the second electrodes being joined to each of the first electrodes; an irregular circuit board having a fifth surface and first and second side surfaces perpendicular to the fifth surface, the fifth surface being divided into a first front surface and a second front surface by a recess having openings on the first and second side surfaces, the recess having a first wall surface, a second wall surface and a bottom surface, a plurality of fifth electrodes being disposed on the fifth surface, each of the plurality of fifth electrodes being joined to a respective one of the plurality of third electrodes; a plurality of electronic components joined to the plurality of fourth electrodes of the planar circuit board and accommodated in the recess; A resin filling the recess, The irregular circuit board has a structure in which a distance between the first wall surface and the second wall surface becomes smaller toward the bottom surface, an imaging unit characterized in that a first distance between a first electronic component among the plurality of electronic components that is closest to the first side surface and the first wall surface is greater than a maximum second distance among distances between each of a plurality of electronic components other than the first electronic component and a respective adjacent wall surface of the first wall surface or the second wall surface.

2. 2. The imaging unit according to claim 1, wherein the first distance is greater than a third distance between the first electronic component and the second wall surface.

3. 3. The imaging unit according to claim 2, wherein the first distance is greater than a maximum fourth distance among a plurality of distances between the plurality of electronic components.

4. 4. The imaging unit according to claim 3, wherein the first distance is greater than a fifth distance, which is a maximum distance among a plurality of distances between the plurality of electronic components and the bottom surface of the recess.

5. 5. The imaging unit according to claim 4, wherein the recess has a bottom surface inclined with respect to the fifth surface such that the fifth distance becomes smaller from the first side surface side toward the second side surface side.

6. 2. The imaging unit according to claim 1, wherein the first electronic component is arranged with a long side parallel to the first side surface, and each of the plurality of electronic components other than the first electronic component is arranged with a long side perpendicular to the first side surface.

7. 2. The imaging unit according to claim 1, wherein the plurality of electronic components are the same size.

8. The electronic components are different in size.

2. The imaging unit according to claim 1, wherein the first electronic component is the largest among the plurality of electronic components.

9. 2. The imaging unit according to claim 1, wherein a notch filled with the resin is provided at a corner of the third surface of the planar circuit board on the side of the first side surface.

10. An endoscope having an imaging unit at a tip of an insertion section, The imaging unit is a semiconductor package having a first surface and a second surface opposite to the first surface, the semiconductor package including an image sensor, and a plurality of first electrodes disposed on the second surface; a planar circuit board having a third surface and a fourth surface opposite to the third surface, a plurality of second electrodes arranged on the third surface, a plurality of third electrodes and a plurality of fourth electrodes arranged on the fourth surface, each of the second electrodes being joined to each of the first electrodes; an irregular circuit board having a fifth surface and first and second side surfaces perpendicular to the fifth surface, the fifth surface being divided into a first front surface and a second front surface by a recess having openings on the first and second side surfaces, the recess having a first wall surface, a second wall surface and a bottom surface, a plurality of fifth electrodes being disposed on the fifth surface, each of the plurality of fifth electrodes being joined to a respective one of the plurality of third electrodes; a plurality of electronic components joined to the plurality of fourth electrodes of the planar circuit board and accommodated in the recess; A resin filling the recess, The irregular circuit board has a structure in which a distance between the first wall surface and the second wall surface becomes smaller toward the bottom surface, an endoscope characterized in that a first distance between a first electronic component among the plurality of electronic components that is closest to the first side surface and the first wall surface is greater than a maximum second distance among distances between each of the plurality of electronic components other than the first electronic component and a respective adjacent wall surface of the first wall surface or the second wall surface.

11. a semiconductor package having a first surface and a second surface opposite to the first surface, the semiconductor package including an image sensor, and a plurality of first electrodes disposed on the second surface; a flat circuit board having a third surface and a fourth surface opposite to the third surface, the third surface being provided with a plurality of first electrodes and a plurality of second electrodes joined thereto, and the fourth surface being provided with a plurality of third electrodes and a plurality of fourth electrodes; a fifth surface, and a first side surface and a second side surface perpendicular to the fifth surface, the fifth surface being divided into a first front surface and a second front surface by a recess having openings on the first side surface and the second side surface, the recess having a first wall surface, a second wall surface and a bottom surface, the distance between the first wall surface and the second wall surface decreasing toward the bottom surface, and the plurality of fourth electrodes being disposed on the fifth surface; a first distance between a first electronic component closest to the first side surface and the first wall surface is greater than second distances between each of a plurality of electronic components other than the first electronic component and a nearest wall surface out of the first wall surface or the second wall surface of each of the plurality of electronic components, the first electronic component being bonded to the plurality of fourth electrodes of the planar circuit board; bonding each of the first electrodes of the semiconductor package to each of the second electrodes of the planar circuit board, and bonding each of the third electrodes of the planar circuit board to each of the third electrodes of the irregular circuit board; injecting a resin between the first electronic component and the first wall surface; A method for manufacturing an imaging unit, comprising: curing the resin.

Citation Information

Patent Citations

  • Imaging unit and endoscope

    JP2017023234A

  • Image pickup unit and endoscope

    US20230353853A1

  • Imaging unit, imaging module, and endoscope system

    WO2016092986A1

  • Imaging unit, method for producing imaging unit, and endoscope

    WO2022244133A1