Circuit arrangement and display system

The circuit device addresses the limitation of existing local dimming technologies by calculating illumination luminance for arbitrary light source arrangements, enhancing flexibility and reducing calculation load in image display devices.

JP2025086473APending Publication Date: 2025-06-09SEIKO EPSON CORP
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Patent Information

Application Number
JP2023200471
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-11-28
Publication Date
2025-06-09

AI Technical Summary

Technical Problem

Existing local dimming technologies in image display devices can only calculate backlight luminance when light source elements are arranged in a specific matrix configuration, failing to accommodate other arrangements.

Method used

A circuit device that calculates illumination luminance information for a display panel based on light source luminance information and attenuation rate distribution, while disabling virtual light source positions in the calculation grid to accommodate arbitrary light source element arrangements.

Benefits of technology

Enables local dimming processing for arbitrary light source arrangements using a common algorithm, increasing flexibility in backlight design and reducing calculation load while maintaining effective illumination control.

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Abstract

To provide a circuit arrangement and the like that can control local dimming of an arbitrarily arranged backlight by using a common arithmetic algorithm.SOLUTION: A circuit arrangement 100 includes a luminance processing circuit 120 and a color correction circuit 160. The luminance processing circuit 120 calculates illumination luminance information indicating luminance at which a target pixel of a display panel is illuminated by a plurality of light source elements, on the basis of light source luminance information indicating the luminance of light emitted by each light source element of the plurality of light source elements, and attenuation factor distribution information 171 indicating the distribution of the attenuation factor of light to the distance from the light source element to a pixel. The color correction circuit 160 performs color correction of input image data on the basis of the illumination luminance information. The luminance processing circuit 120 disables light source luminance information of a virtual light source position where the plurality of light source elements are not arranged, in a grid for calculation used for calculation of the illumination luminance information, before calculating the illumination luminance information.SELECTED DRAWING: Figure 2
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Description

Technical Field

[0001] The present invention relates to a circuit device, a display system, and the like.

Background Art

[0002] Patent Document 1 discloses an image display device that performs local dimming. The LEDs of the backlight are arranged in a matrix. The image display device includes an LED output value calculation unit, a display luminance data calculation unit, and an LCD data calculation unit. The LED output value calculation unit obtains emission luminance data indicating the luminance at the time of emission of the light source corresponding to each area of the image. The display luminance data calculation unit obtains diffusion luminance data by performing convolution processing on the emission luminance data using a point spread function or a luminance diffusion function. The linear interpolation unit obtains display luminance data for each pixel by performing linear interpolation processing on the diffusion luminance data. The LCD data calculation unit obtains the light transmittance for each pixel for each primary color based on the input image data and the display luminance data.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In local dimming, there is a problem that the luminance of the backlight can be calculated only when the light source elements of the backlight are in a specific arrangement assumed in advance. For example, in Patent Document 1 above, it is assumed that the LEDs of the backlight are arranged in a matrix, and the luminance calculation of the backlight when the LEDs are arranged other than in a matrix is not assumed.

Means for Solving the Problems

[0005] One aspect of the present disclosure is a circuit device that controls a display device including a plurality of light source elements and a display panel, the luminance processing circuit calculating illumination luminance information indicating the luminance with which a target pixel of the display panel is illuminated by the plurality of light source elements based on light source luminance information indicating the luminance emitted by each light source element of the plurality of light source elements and attenuation rate distribution information indicating the attenuation rate distribution of light with respect to the distance between the light source element and the pixel, and a color correction circuit that color-corrects input image data based on the illumination luminance information, wherein the luminance processing circuit disables the light source luminance information at a virtual light source position where the plurality of light source elements are not arranged among the calculation grids used for the calculation of the illumination luminance information and calculates the illumination luminance information.

[0006] Another aspect of the present disclosure relates to a display system including the above circuit device and the display device.

Brief Description of the Drawings

[0007]

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Embodiments for Carrying Out the Invention

[0008] Hereinafter, preferred embodiments of the present disclosure will be described in detail. Note that the embodiments described below do not unduly limit the content described in the claims, and not all of the configurations described in these embodiments are essential constituent elements.

[0009] 1. Electronic device, display system, and circuit device FIG. 1 is a configuration example of an electronic device including the display system of the present embodiment. The electronic device 500 includes a processing device 300 and a display system 400. As an example, the electronic device 500 is an in-vehicle display device including a meter panel, a center information display, a head-up display, or an electronic mirror, a television device, or an information processing device including a display.

[0010] The display system 400 includes a circuit device 100 and a display device 200. The circuit device 100 is, for example, an integrated circuit device in which a plurality of circuit elements are integrated on a semiconductor substrate. Although FIG. 1 shows the circuit device 100 and the display device 200 as separate components, the circuit device 100 may be included in the display device 200.

[0011] The display device 200 includes a backlight 210, a display panel 220, a display driver 230, a light source driver 240, and a display controller 250. An example of the display device 200 is a display used in a television device or an information processing device. Alternatively, the display device 200 may be a head-mounted display including a device for projecting to the eyes, or a head-up display including a device for projecting to a screen. When the display device 200 is a head-up display, the display device 200 further includes an optical system for projecting the light emitted from the backlight 210 and transmitted through the display panel 220 onto the screen.

[0012] In a plan view of the backlight 210, light source elements are two-dimensionally arranged in the backlight 210. The light source elements are light-emitting elements that emit light by power supply, and are, for example, inorganic light-emitting diodes or organic light-emitting diodes. In local dimming control, the light amounts of the two-dimensionally arranged light source elements are controlled independently of each other. Alternatively, the backlight 210 may be divided into a plurality of areas. In a plan view, a plurality of light source elements are arranged in each area. The light source elements arranged in the area are controlled to have the same light amount, and the light amounts of the respective areas are controlled independently of each other.

[0013] An example of the two-dimensional arrangement of the light source elements is a matrix arrangement in which light source elements are arranged at all intersections of a plurality of rows and a plurality of columns. However, the two-dimensional arrangement is not limited to the matrix arrangement. For example, the two-dimensional arrangement may be an arrangement called a rhombus arrangement or a staggered arrangement. In this arrangement, light source elements are arranged at intersections of one of odd rows and even rows and odd columns, and intersections of the other of odd rows and even rows and even columns, and no light source elements are arranged at other intersections. In the calculations within the circuit device 100, a calculation grid corresponding to the matrix arrangement is used. Among the light source positions within the calculation grid, positions where light source elements are actually arranged and positions where no light source elements are arranged may be mixed. Details of this point will be described later.

[0014] The light source driver 240 receives the light source luminance data DDIM from the circuit device 100 and drives each light source element of the backlight 210 based on the light source luminance data DDIM. The light source driver 240 is, for example, an integrated circuit device. Note that a plurality of light source drivers may be provided, and each of the light source drivers may be a separate integrated circuit device.

[0015] The display panel 220 is an electro-optical panel that transmits light from the backlight 210 and displays an image by controlling its transmittance. For example, the display panel 220 is a liquid crystal display panel.

[0016] The display controller 250 receives the image data IMB from the circuit device 100, and transmits the image data IMB and a timing control signal for controlling the display timing to the display driver 230. Note that the display controller 250 may perform image processing such as gradation correction, white balance correction, or enlargement / reduction on the received image data IMB.

[0017] The display driver 230 drives the display panel based on the received image data and the timing control signal, thereby displaying an image on the display panel 220. Note that each of the display controller 250 and the display driver 230 may be configured by a separate integrated circuit device or may be configured by an integrated integrated circuit device.

[0018] The processing device 300 transmits the image data IMA to the circuit device 100. The processing device 300 is a processor such as a CPU, GPU, microcomputer, DSP, ASIC, or FPGA. CPU is an abbreviation for Central Processing Unit. GPU is an abbreviation for Graphics Processing Unit. DSP is an abbreviation for Digital Signal Processor. ASIC is an abbreviation for Application Specific Integrated Circuit. FPGA is an abbreviation for Field Programmable Gate Array.

[0019] The circuit device 100 receives the image data IMA, and performs local dimming control of the display device 200 based on the image data IMA. The circuit device 100 dims the emission luminance of each light source element or each area of the backlight 210 according to the luminance of the image data IMA, and outputs the light source luminance information obtained by the dimming to the light source driver 240 as light source luminance data DDIM. Further, the circuit device 100 performs color correction on the image data IMA based on the light source luminance information, and outputs the image data IMB after color correction to the display controller 250.

[0020] FIG. 2 is a configuration example of a circuit device. The circuit device 100 includes an interface circuit 110, a luminance processing circuit 120, a light source control circuit 130, a color correction circuit 160, and a storage unit 170.

[0021] The interface circuit 110 receives the image data IMA from the processing device 300. The interface circuit 110 may be an interface circuit of various image interface methods such as LVDS, parallel RGB method, or DisplayPort. LVDS is an abbreviation for Low Voltage Differential Signaling.

[0022] The storage unit 170 stores the attenuation rate distribution information 171 and the grid identification information 175. The storage unit 170 is a storage circuit such as a register or a memory. The memory is a volatile memory such as a RAM, or a non-volatile memory such as an OTP memory or an EEPROM. RAM is an abbreviation for Random Access Memory. OTP is an abbreviation for One Time Programmable. EEPROM is an abbreviation for Electrically Erasable Programmable Read Only Memory. The processing device 300 may write the attenuation rate distribution information 171, the grid identification information 175, or both the attenuation rate distribution information 171 and the grid identification information 175 to the storage unit 170 via an interface circuit such as the SPI method or the I2C method. Alternatively, when the storage unit 170 is a non-volatile memory, the attenuation rate distribution information 171, the grid identification information 175, or both the attenuation rate distribution information 171 and the grid identification information 175 may be written to the storage unit 170 in advance.

[0023] The attenuation rate distribution information 171 indicates the attenuation rate distribution of the light reaching the display panel from the light source element. The attenuation rate distribution shows the relationship between the distance from the light source element to the pixel and the attenuation rate of the light with which the light source element illuminates the pixel. The attenuation rate distribution is also called the attenuation characteristic or the luminance distribution. The attenuation rate distribution information 171 is, for example, a look-up table that takes the distance as an input and outputs the attenuation rate. Alternatively, the attenuation rate distribution information may be function information that defines a function of the attenuation rate distribution. The argument of the function is the distance, and the return value is the attenuation rate. The function information is, for example, the coefficient used in the function.

[0024] The grid identification information 175 is information indicating the effective light source positions in the arithmetic grid used by the luminance processing circuit 120. The arithmetic grid is a grid used by the luminance processing circuit 120 when determining the luminance of each light source of the backlight 210 and when calculating the luminance with which each light source of the backlight 210 illuminates the pixels of the display panel. In the arithmetic grid, light source elements can be arranged at each intersection of rows and columns, and that intersection is called the light source position. The backlight 210 does not necessarily have light source elements corresponding to all the light source positions of the arithmetic grid. The effective light source position is the light source position corresponding to the light source element that the backlight 210 has among the light source positions within the arithmetic grid. Among the arithmetic grids, the light source position without a corresponding light source element in the backlight 210 is called the virtual light source position. The grid identification information 175 may be any of information in which the effective light source position is identified, information in which the virtual light source position is identified, or information in which both the effective light source position and the virtual light source position are identified.

[0025] Image data IMA is input from the interface circuit 110 to the luminance processing circuit 120. The image data IMA input to the luminance processing circuit 120 is also referred to as input image data. The luminance processing circuit 120 performs dimming processing using the image data IMA, the attenuation rate distribution information 171 read from the storage unit 170, and the grid identification information 175, thereby determining light source luminance information indicating the emission luminance of each light source element, and outputting the light source luminance information as light source luminance data LLD. Further, the luminance processing circuit 120 calculates illumination luminance information based on the light source luminance data LLD and the attenuation rate distribution information 171 read from the storage unit 170, and outputs the illumination luminance information as illumination luminance data LPX. The illumination luminance information indicates the illumination luminance of each pixel of the display panel 220 when the display panel 220 is illuminated by the backlight 210. The luminance processing circuit 120 calculates the light source luminance information and the illumination luminance information assuming that there is a light source element at each light source position of the calculation grid. At this time, the effective light source positions are enabled and the virtual light source positions are disabled for the calculation. That is, regardless of the presence or absence of virtual light source positions, as an operation algorithm, a common algorithm assuming that there is a light source element at each light source position of the calculation grid is used, and by setting each light source position to enabled or disabled, operations corresponding to various arrangements are executed.

[0026] The light source control circuit 130 controls the light source driver 240 based on the light source luminance data LLD. Specifically, the light source control circuit 130 outputs a timing control signal for controlling the emission timing of the light emitting element or the update timing of the emission luminance to the light source driver 240, and outputs the light source luminance data LLD to the light source driver 240 as light source luminance data DDIM. The light source driver 240 drives each light emitting element with a PWM signal having a pulse width corresponding to the emission luminance of each light source element indicated by the light source luminance data DDIM at the timing specified by the timing control signal. Thereby, each light emitting element emits light with an emission luminance controlled by local dimming.

[0027] The color correction circuit 160 performs color correction on the image data IMA based on the illumination luminance data LPX, and outputs the corrected image data IMB to the display driver 230. Specifically, the color correction circuit 160 multiplies the pixel data of each pixel by the reciprocal of the luminance of the light reaching that pixel, and uses the result as the new pixel data for that pixel.

[0028] Note that the light source control circuit 130, the luminance processing circuit 120, and the color correction circuit 160 are logic circuits that process digital signals. Each of the light source control circuit 130, the luminance processing circuit 120, and the color correction circuit 160 may be separately composed of logic circuits, or some or all of them may be composed of an integrated logic circuit. Alternatively, a processor such as a DSP may execute an instruction set or program in which the functions of the light source control circuit 130, the luminance processing circuit 120, and the color correction circuit 160 are described, thereby realizing the functions of these circuits.

[0029] Alternatively, the circuit device 100 may be a processor such as a CPU, GPU, microcomputer, DSP, ASIC, or FPGA. Then, the functions of the circuit device 100 may be realized by the processor executing an instruction set or program in which the functions of each part of the circuit device 100 are described.

[0030] The circuit device 100 may include a distortion correction circuit. The distortion correction circuit corrects image distortion caused by an optical system that projects an image displayed on the display panel 220 onto a screen or the like, or image distortion caused by screen distortion. Specifically, the distortion correction circuit performs image correction that cancels or reduces the above-mentioned image distortion on the image data IMA received by the interface circuit 110, and outputs the corrected image data to the luminance processing circuit 120 and the color correction circuit 160. However, the distortion correction circuit may be provided in the processing device 300 instead of the circuit device 100.

[0031] 2. Detailed Configuration Example Figure 3 shows a first detailed configuration example of the circuit device. Note that the description of parts similar to those in Figure 2 will be omitted as appropriate, and mainly the parts different from those in Figure 2 will be described.

[0032] The luminance processing circuit 120 includes a light source luminance determination circuit 140 and an illumination luminance calculation circuit 150.

[0033] The light source luminance determination circuit 140 performs dimming processing using the image data IMA, the attenuation rate distribution information 171 and the grid identification information 175 read from the storage unit 170, determines the light source luminance information indicating the emission luminance of each light source element, and outputs the light source luminance information as light source luminance data LLD. The dimming processing will be described later with reference to FIG. 11 and the like, but the dimming processing is not limited thereto. For example, the light source luminance determination circuit 140 may generate the light source luminance information by downsampling the image data IMA into image data in which one pixel corresponds to each light source element.

[0034] The light source luminance determination circuit 140 calculates the light source luminance information for each light source position of the calculation grid. FIG. 4 shows an example of the calculation grid. Here, a grid of 11 rows and 11 columns is shown, but the number of rows and columns may be any integer of 2 or more, and the number of rows and columns may be different. The dotted circles indicate the light source positions in the calculation grid. The calculation grid is a grid used for calculation, and it is not necessary that the light source elements corresponding to all the light source positions are actually arranged in the backlight 210. In the calculation grid, the light source positions in each row are arranged along the horizontal scanning direction of the display panel 220, and the light source positions in each column are arranged along the vertical scanning direction of the display panel 220. The light source positions in each row are arranged at equal intervals with a first interval, and the light source positions in each column are arranged at equal intervals with a second interval. The first interval and the second interval may be the same or different.

[0035] FIG. 5 shows an example in which all the light source positions of the calculation grid are effective light source positions. The white circles indicate the effective light source positions, and the black circles indicate the virtual light source positions. As described above, the effective light source position is the light source position in the calculation grid where the corresponding light source element is arranged in the backlight 210. The virtual light source position is the light source position in the calculation grid where the corresponding light source element is not arranged in the backlight 210.

[0036] FIG. 6 shows a first example where a part of the arithmetic grid is at the virtual light source position. In the first example, the effective light source positions are arranged in a staggered pattern. The staggered pattern means an arrangement in which, in even rows, one of the odd columns or even columns is the effective light source position, and in odd rows, the other of the odd columns or even columns is the effective light source position.

[0037] Note that the arrangement of the effective light source positions and the virtual light source positions in the arithmetic grid may be arbitrary. For example, the effective light source positions are not limited to the above-mentioned staggered pattern, and may be arranged in a parallelogram pattern, a hexagonal pattern, or the like.

[0038] FIG. 7 shows a second example where a part of the arithmetic grid is at the virtual light source position. In the second example, the display panel 220 and the backlight 210 have a non-rectangular outer shape 225. Here, an example where the outer shape 225 is an ellipse is shown. In the region where the arithmetic grid overlaps with the outer shape 225, the effective light source positions are arranged in a staggered pattern, and in the region outside the outer shape 225, each light source position of the arithmetic grid is a virtual light source position. Note that even inside the outer shape 225, each light source position of the arithmetic grid may be a virtual light source position in a partial region. For example, when it is clear that no display object is arranged in a partial region, the light source elements may not actually be arranged in that partial region.

[0039] FIG. 8 shows a third example where a part of the arithmetic grid is at the virtual light source position. In the third example, in the region where the arithmetic grid overlaps with the outer shape 225, each light source position of the arithmetic grid is an effective light source position, and in the region outside the outer shape 225, each light source position of the arithmetic grid is a virtual light source position.

[0040] Note that in the arithmetic grid, there may be three regions: a region with only effective light source positions, a region with only virtual light source positions, and a region where effective light source positions and virtual light source positions are mixed.

[0041] The light source luminance determination circuit 140 enables the effective light source positions of the arithmetic grid, disables the virtual light source positions, calculates the light source luminance information, and outputs the light source luminance information as light source luminance data LLD. Although all the light source positions of the arithmetic grid are incorporated in the arithmetic algorithm, the light source luminance determination circuit 140 fixes the luminance of the virtual light source positions to zero and executes the calculation by the arithmetic algorithm.

[0042] The illumination luminance calculation circuit 150 obtains the distance between each light source position and the pixel of the display panel 220, obtains the attenuation rate corresponding to the distance from the attenuation rate distribution information 171, and uses the attenuation rate and the light source luminance obtained from the light source luminance data LLD to calculate the illumination luminance of the pixel. The illumination luminance calculation circuit 150 outputs the obtained illumination luminance information as illumination luminance data LPX.

[0043] The illumination luminance calculation circuit 150 uses the arithmetic grid in the calculation of the illumination luminance information. That is, the illumination luminance calculation circuit 150 calculates the illumination luminance with which the light source elements at each light source position of the arithmetic grid illuminate each pixel of the display panel 220. At this time, in the light source luminance data LLD, the luminance of the effective light source positions is the luminance determined by the light source luminance determination circuit 140, and the luminance of the virtual light source positions is set to zero. As a result, the effective light source positions are enabled and the virtual light source positions are disabled also in the calculation of the illumination luminance information. Although all the light source positions of the arithmetic grid are incorporated in the arithmetic algorithm, since the luminance of the virtual light source positions is zero, even if the illumination luminance calculation circuit 150 executes the calculation by the arithmetic algorithm, the luminance of the virtual light source positions does not affect the illumination luminance.

[0044] The form of the grid identification information 175 can be variously assumed. For example, the grid identification information 175 is information that identifies whether each light source position of the calculation grid is an effective light source position or a virtual light source position. Alternatively, the grid identification information 175 may be information in which only the effective light source positions of the calculation grid are identified. In this case, the light source positions that are not effective light source positions are identified as virtual light source positions. Alternatively, the grid identification information 175 may be information in which only the virtual light source positions of the calculation grid are identified. In this case, the light source positions that are not virtual light source positions are identified as effective light source positions.

[0045] Alternatively, the grid identification information 175 may be information that specifies a preset. An example is shown in FIG. 9. The storage unit 170 stores the first preset PS1 to the third preset PS3 and the grid identification information 175. The preset may be written into the storage unit 170 from the processing device 300 via an interface circuit (not shown). When the storage unit 170 is a non-volatile memory, the preset may be written into the non-volatile memory in advance. Each of the first preset PS1 to the third preset PS3 is information that identifies the effective light source positions in the calculation grid, and the effective light source positions in the calculation grid are different. Alternatively, each of the first preset PS1 to the third preset PS3 is information that identifies the virtual light source positions in the calculation grid, and the virtual light source positions in the calculation grid are different. Alternatively, each of the first preset PS1 to the third preset PS3 is information that identifies both the effective light source positions and the virtual light source positions in the calculation grid, and the effective light source positions and the virtual light source positions in the calculation grid are different. The grid identification information 175 is information that specifies any one of the first preset PS1 to the third preset PS3.

[0046] In the above, an example in which the effective light source position and the like are identified by the grid identification information 175 has been described, but the effective light source position and the like may be identified by mode switching according to the region. FIG. 10 is a second detailed configuration example of the circuit device. Note that the description of the parts similar to those in FIG. 2 or FIG. 3 will be omitted as appropriate, and the parts different from those in FIG. 2 or FIG. 3 will be mainly described.

[0047] The memory unit 170 stores the attenuation rate distribution information 171 and the mode setting information 177. The mode setting information 177 may be written into the memory unit 170 from the processing device 300 via an interface circuit (not shown). Alternatively, when the memory unit 170 is a non-volatile memory, the mode setting information 177 may be written into the non-volatile memory in advance.

[0048] The mode setting information 177 is information for setting the mode in each area of the arithmetic grid. The light source luminance determination circuit 140 specifies the effective light source position and the virtual light source position in the arithmetic grid within the area according to the mode setting information 177. The modes include an effective light source mode in which all light source positions within the area are effective light source positions, a virtual light source mode in which all light source positions within the area are virtual light source positions, and a mixed mode in which effective light source positions and virtual light source positions are mixed within the area. Note that at least two of these modes may be provided.

[0049] Taking FIG. 7 as an example, the mode setting information 177 is information for setting a mixed mode for the area where the arithmetic grid overlaps with the outer shape 225 such as the display panel 220, and setting a virtual light source mode for the area outside the outer shape 225. Taking FIG. 8 as an example, the mode setting information 177 is information for setting an effective light source mode for the area where the arithmetic grid overlaps with the outer shape 225, and setting a virtual light source mode for the area outside the outer shape 225.

[0050] Note that the mode setting is not limited to the above, and any of the above three modes may be set for each of a plurality of areas. Also, the arithmetic grid may be divided into three areas, and each area may be set to the effective light source mode, the virtual light source mode, and the mixed mode one by one.

[0051] In this embodiment, the circuit device 100 controls a display device 200 including a plurality of light source elements and a display panel 220. The circuit device 100 includes a luminance processing circuit 120 and a color correction circuit 160. The luminance processing circuit 120 calculates illumination luminance information indicating the luminance by which a target pixel of the display panel 220 is illuminated by the plurality of light source elements, based on light source luminance information indicating the luminance emitted by each of the plurality of light source elements and attenuation rate distribution information 171 indicating the attenuation rate distribution of light with respect to the distance between the light source elements and the pixels. The color correction circuit 160 color-corrects the input image data IMA based on the illumination luminance information. The luminance processing circuit 120 disables the light source luminance information at virtual light source positions where no light source elements are arranged among the calculation grids used for calculating the illumination luminance information, and calculates the illumination luminance information.

[0052] According to this embodiment, local dimming processing when a light source element is arranged at an arbitrary light source position in a calculation grid can be executed using the local dimming processing algorithm when light source elements are arranged at all light source positions in the calculation grid. Thereby, the degree of freedom in arranging the light source elements in the backlight 210 can be increased, and a common local dimming processing algorithm can be used for the highly free arrangement.

[0053] Also according to the present embodiment, the load when calculating the illumination luminance information using the attenuation rate distribution information 171 can be reduced. As shown in FIG. 12 described later, the illumination luminance calculation circuit 150 selects the light source elements L1 to L16 arranged at s×t light source positions around the target pixel 22. Here, s = t = 4, and it is assumed that light source elements are arranged at all the light source positions of the calculation grid. When calculating the luminance of the light reaching the target pixel 22 from the light source element Lk, the illumination luminance calculation circuit 150 calculates the distance between the light source element Lk and the target pixel 22, and acquires the attenuation rate corresponding to the distance from the attenuation rate distribution information 171. k = 1, 2, ···, 16. Since the calculation grid is arranged at regular intervals, the distances between the light source elements L1 to L16 and the target pixel 22 also appear regularly. The target pixel 22 moves one pixel at a time in the x direction, which is the horizontal scanning direction. For each region surrounded by the four nearest LEDs, the regularity of the distance is the same. By using this fact, the calculation load can be reduced. For example, when the attenuation rate distribution information 171 is a look-up table, the attenuation rate corresponding to the distance is obtained by interpolating the look-up table based on the distance between the light source element Lk and the target pixel 22. In view of the above regularity, for the region surrounded by the four nearest LEDs, if the above interpolation process is performed once, it can be repeatedly used. When trying to cope with the light source arrangement of the backlight 210 without regularity, the above regularity cannot be used, and it is necessary to calculate the distance for all pixels. However, according to the present embodiment, by using a regular calculation grid, the reduction of the calculation load as described above is possible. Even if a part of the calculation grid is a virtual light source position, it only means that the light source luminance of the virtual light source position is zero, and the regularity of the calculation grid can still be used.

[0054] According to this embodiment, when determining the light source luminance or calculating the illumination luminance, it becomes easier to determine which light source element should be targeted. Taking the calculation of the illumination luminance as an example, the determination of the light source luminance is the same. As shown in FIG. 12 to be described later, the illumination luminance calculation circuit 150 selects the light source elements L1 to L16 arranged at s×t light source positions around the target pixel 22. Here, s = t = 4. In FIG. 12, light source elements are arranged in all the calculation grids, but some of the calculation grids may be virtual light source positions. When the illumination luminance calculation circuit 150 selects the light source elements around the target pixel 22, it is necessary to determine which light source element should be selected. However, by using a regular calculation grid, the selection becomes easier regardless of the presence of virtual light source positions. For example, s and t may be determined such that s×t rectangular light source positions around are selected in the calculation grid and a predetermined number of valid light source positions are included in the s×t rectangles.

[0055] In this embodiment, the circuit device 100 may also include a storage unit 170 that stores grid identification information 175. The grid identification information 175 identifies at least one of the valid light source positions where a plurality of light source elements are arranged and the virtual light source positions among the calculation grids. The luminance processing circuit 120 may disable the light source luminance information of the virtual light source positions based on the grid identification information 175.

[0056] According to this embodiment, the luminance processing circuit 120 can identify the valid light source positions and the virtual light source positions in the calculation grid based on the grid identification information 175 stored in the storage unit 170. Also, for example, by the processing device 300 or the like writing the grid identification information 175 into the storage unit 170, the grid identification information 175 suitable for the light source arrangement of the backlight 210 can be set.

[0057] In this embodiment, the storage unit 170 may store the grid identification information 175 in which the valid light source positions or the virtual light source positions are identified for each light source position of the calculation grid.

[0058] According to this embodiment, the grid identification information 175 identifies whether each light source position of the arithmetic grid is an effective light source position or a virtual light source position. By using such grid identification information 175, the luminance processing circuit 120 can identify the effective light source positions and virtual light source positions in the arithmetic grid.

[0059] Also in this embodiment, the storage unit 170 may store grid identification information 175 that designates one of a plurality of presets. In the plurality of presets, an effective light source position or a virtual light source position is specified in advance for each light source position of the arithmetic grid.

[0060] According to this embodiment, a preset is designated by the grid identification information 175, and based on the designated preset, it is identified whether each light source position of the arithmetic grid is an effective light source position or a virtual light source position. By using such grid identification information 175, the luminance processing circuit 120 can identify the effective light source positions and virtual light source positions in the arithmetic grid.

[0061] Also in this embodiment, the luminance processing circuit 120 may have at least two modes among an effective light source mode, a virtual light source mode, and a mixed mode. The effective light source mode is a mode in which each light source position of the arithmetic grid is set to an effective light source position where a plurality of light source elements are arranged. The virtual light source mode is a mode in which each light source position of the arithmetic grid is set to a virtual light source position. The mixed mode is a mode in which effective light source positions and virtual light source positions are mixed in the arithmetic grid.

[0062] According to this embodiment, by selecting a mode, the luminance processing circuit 120 can identify the effective light source positions and virtual light source positions in the arithmetic grid.

[0063] Also, in the present embodiment, the luminance processing circuit 120 may set a first mode, which is any one of at least two modes, for the first region of the arithmetic grid. The luminance processing circuit 120 may set a second mode, which is different from the first mode among at least two modes, for a second region different from the first region of the arithmetic grid.

[0064] According to the present embodiment, the luminance processing circuit 120 can specify the effective light source position and the virtual light source position in each region by setting a mode for each region of the arithmetic grid. Also, by setting different modes for each region, it is possible to cope with the case where various arrangements of light source elements are mixed. Thereby, the degree of freedom in arranging the light source elements in the backlight 210 can be increased, and a common local dimming processing algorithm can be used for the highly free arrangement.

[0065] Also, in the present embodiment, the arithmetic grid may be a grid arranged at a first interval in the horizontal scanning direction and at a second interval in the vertical scanning direction.

[0066] As described above, the first interval and the second interval may be the same or different. Although it is desirable that the light source elements can be freely arranged in the backlight 210, it is complicated to prepare a dedicated local dimming processing algorithm for each arrangement. According to the present embodiment, by disabling the virtual light source position in the equally spaced arithmetic grid and calculating the illumination luminance information, a common local dimming processing algorithm can be used for the highly free arrangement.

[0067] Also, in the present embodiment, in the arithmetic grid, either the odd-numbered columns or the even-numbered columns of the odd-numbered rows, and the other of the odd-numbered columns or the even-numbered columns of the even-numbered rows may be the virtual light source positions.

[0068] According to this embodiment, a so-called staggered backlight 210 can be realized. In the arithmetic grid, the light source positions corresponding to the staggered light source elements become effective light source positions, and the light source positions without corresponding light source elements become virtual light source positions. Even in the staggered arrangement, the local dimming processing algorithm using the arithmetic grid can be utilized.

[0069] Also, in this embodiment, the luminance processing circuit 120 includes a light source luminance determination circuit 140 and an illumination luminance calculation circuit 150. The light source luminance determination circuit 140 may disable the light source luminance information of the virtual light source positions in the arithmetic grid and determine the light source luminance information based on the input image data IMA. The illumination luminance calculation circuit 150 may calculate the illumination luminance information based on the light source luminance information determined by the light source luminance determination circuit 140 and the attenuation rate distribution information 171.

[0070] According to this embodiment, by the light source luminance determination circuit 140 disabling the light source luminance information of the virtual light source positions, the virtual light source positions also become disabled in the calculation of the illumination luminance information. Thereby, the luminance processing circuit 120 can disable the light source luminance information of the virtual light source positions in the arithmetic grid and calculate the illumination luminance information.

[0071] Also, as will be described later, the luminance processing circuit 120 may calculate the illumination luminance information using the light source luminance information of the surrounding s×t light source positions of the target pixel in the arithmetic grid. s and t are integers of 2 or more.

[0072] According to this embodiment, in the calculation of the illumination luminance information, the light source elements to be considered are limited to the light source elements arranged at the surrounding s×t light source positions of the target pixel. Thereby, the calculation load of the illumination luminance information can be reduced.

[0073] 3. Light Source Luminance Determination Circuit and Illumination Luminance Calculation Circuit FIG. 11 is a flow of the processing performed by the light source luminance determination circuit. In step S1, the light source luminance determination circuit 140 reads the grid identification information 175 from the storage unit 170 and identifies the effective light source positions and virtual light source positions in the arithmetic grid.

[0074] In step S2, the light source luminance determination circuit 140 initializes the light source luminance information. For example, the luminance values of all the light source elements are initialized to zero.

[0075] In step S3, the light source luminance determination circuit 140 selects one pixel from the pixels included in the image data IMA. The selected pixel is referred to as the target pixel. In the loop from step S3 to step S6, the target pixel is sequentially selected. For example, in the first step S3, the first pixel of the first scanning line of the image data IMA is selected, and in the subsequent step S3, the second pixel, the third pixel, ··· are sequentially selected. When all the pixels of the first scanning line are selected, the pixels of the second scanning line are sequentially selected, and this is repeated until the final scanning line.

[0076] In step S4, the light source luminance determination circuit 140 selects n×m light source positions around the target pixel in the arithmetic grid. These n×m light source positions are also referred to as surrounding light source positions. n and m may each be an integer of 2 or more. FIG. 12 shows an example of light source elements arranged at the surrounding light source positions. Here, an example where n = m = 4 is shown. Although no light source element is actually arranged at the virtual light source position, a virtual light source element in terms of arithmetic is assumed here.

[0077] As shown in FIG. 12, let the position of the target pixel 22 be (i, j). i and j are integers, and the position (i, j) indicates the i-th pixel of the j-th scanning line. The light source luminance determination circuit 140 selects the light source elements L1 to L16 arranged at the light source positions in the two nearest columns in each of the +x direction and the -x direction, and in the two nearest rows in each of the +y direction and the -y direction, based on the position (i, j). When k is an integer from 1 to 16, the position of the light source element Lk is represented as (xk, yk).

[0078] In step S5 of FIG. 12, the light source luminance determination circuit 140 updates the light source luminance information of the light source elements at the n×m light source positions selected in step S4 by using the pixel value of the target pixel 22 in the image data IMA and the attenuation rate distribution information 171 stored in the storage unit 170. At this time, the light source luminance determination circuit 140 updates the light source luminance information of the effective light source positions and does not update the light source luminance information of the virtual light source positions, which are fixed to the initial values.

[0079] In step S6, the light source luminance determination circuit 140 determines whether all pixels have been selected as the target pixel. If all pixels have been selected, the process ends. If there are unselected pixels, the process returns to step S3.

[0080] The update process of the light source luminance information in step S5 will be described. The light source luminance determination circuit 140 determines the required change amount Δ ij indicating the required change amount of the light amount received by the target pixel 22 from the light source elements L1 to L16 by the following formula (1).

[0081]

Equation

[0082] In the above formula (1), INT ijis the luminance value of the target pixel 22 in the image data IMA. The luminance value is the maximum value among the RGB pixel values of the target pixel 22 in the image data IMA. Alternatively, the luminance value may be a luminance value calculated by multiplying the RGB pixel values of the target pixel 22 in the image data IMA by a coefficient, such as Y in the YCrCb color space. lsf(k) is the attenuation rate of the light emitted by the light source element Lk illuminating the target pixel 22. The light source luminance determination circuit 140 obtains the distance between the target pixel 22 and the light source element Lk, and obtains the attenuation rate lsf(k) corresponding to the obtained distance from the attenuation rate distribution information 171. powc(k) is the previous light source luminance information of the light source element Lk. The previous light source luminance information is the light source luminance information calculated using the previous target pixel selected one before the current target pixel 22. The previous target pixel is the pixel at the position (i - 1, j) one before the position (i, j) in the x direction. The light source luminance information powc(k) of the light source element corresponding to the virtual light source position is fixed to the initial value.

[0083] The light source luminance determination circuit 140 distributes the required change amount Δ ij to the light source luminance information of the light source element Lk to update the light source luminance information.

[0084]

Equation

[0085] In the above equation (2), powu(k) is the current light source luminance information, that is, the updated light source luminance information. The light source luminance information powu(k) of the light source element corresponding to the virtual light source position is fixed to the initial value and is not updated. That is, in the finally determined light source luminance information, the luminance of the light source element corresponding to the virtual light source position remains the initial value.

[0086] FIG. 13 is a flow of the process performed by the illumination luminance calculation circuit. Here, the example of the surrounding light source position in FIG. 12 is also used, but the process performed by the illumination luminance calculation circuit 150 is a process separate from the process performed by the light source luminance determination circuit 140.

[0087] In step S11, the illumination luminance calculation circuit 150 selects one pixel from the pixels included in the image data IMA. The selected pixel will be referred to as the target pixel. In the loop from step S11 to step S14, the target pixels are sequentially selected. For example, in the first step S11, the first pixel of the first scanning line of the image data IMA is selected, and in subsequent steps S11, the second pixel, the third pixel, and so on are sequentially selected. When all the pixels of the first scanning line are selected, the pixels of the second scanning line are sequentially selected, and this is repeated until the final scanning line.

[0088] In step S12, the illumination luminance calculation circuit 150 selects s×t light source positions around the target pixel in the calculation grid. These s×t light source positions are also referred to as surrounding light source positions. s and t may each be an integer of 2 or more, and FIG. 12 shows an example where s = t = 4. However, s×t and n×m may be different. Although no light source elements are actually arranged at the virtual light source positions, virtual light source elements in terms of calculation are assumed here.

[0089] The illumination luminance calculation circuit 150 selects the light source elements L1 to L16 arranged at the light source positions in the two nearest columns in each of the +x direction and the -x direction, and in the two nearest rows in each of the +y direction and the -y direction, based on the position (i, j). When β is an integer from 1 to 16, the position of the light source element Lβ is represented as (xβ, yβ).

[0090] In step S13, the illumination luminance calculation circuit 150 obtains the illumination luminance information of the target pixel using the light source luminance information of the light source elements at the selected s×t light source positions and the attenuation rate distribution information 171.

[0091] In step S14, the illumination luminance calculation circuit 150 determines whether all pixels have been selected as the target pixel. If all pixels have been selected, the process ends. If there are unselected pixels, the process returns to step S11.

[0092] The arithmetic processing of the illumination luminance information in step S13 will be described. The illumination luminance arithmetic circuit 150 obtains the illumination luminance information of the target pixel 22 by the following expressions (3) and (4).

[0093] [Number]

[0094] [Number]

[0095] In the above expression (3), PL(i, j) is the illumination luminance information for the pixel at the position (i, j). pow(β) is the light source luminance information determined by the light source luminance determination circuit 140. lsf(β) is the attenuation rate of the light by which the light source element Lβ illuminates the target pixel 22. The illumination luminance arithmetic circuit 150 obtains the distance between the target pixel 22 and the light source element Lβ, and obtains the attenuation rate lsf(β) corresponding to that distance from the attenuation rate distribution information 171. In the above expression (4), the square of the distance is used as the input to the look-up table, but the distance may also be used as the input to the look-up table.

[0096] Note that after the loop of steps S3 to S6 in the flow of FIG. 11 is executed up to the last pixel of the image data IMA, powu in the above expression (2) is used as pow in the above expression (3). Note that even if the loop of steps S3 to S5 has not been executed up to the last pixel of the image data IMA, since the update of the light source luminance information of the light source element is sequentially completed as the target pixel advances, the light source luminance information for which the update has been completed may be used as pow.

[0097] The illumination luminance arithmetic circuit 150 may obtain the illumination luminance information of the target pixel from not only the light source luminance information of s×t light source elements around the target pixel but also the light source luminance information of all the light source elements of the backlight 210.

[0098] Although the present embodiment has been described in detail as above, those skilled in the art will easily understand that many modifications are possible without substantially departing from the novel matters and effects of the present disclosure. Therefore, all such modifications are intended to be included within the scope of the present disclosure. For example, in the specification or drawings, a term described at least once together with a broader or synonymous different term can be replaced with that different term anywhere in the specification or drawings. Also, all combinations of the present embodiment and the modifications are included in the scope of the present disclosure. Further, the configurations and operations of the circuit device, backlight, display panel, display device, display system, processing device, and electronic device, etc. are not limited to those described in the present embodiment, and various modified implementations are possible.

Explanation of Reference Numerals

[0099] 22... target pixel, 100... circuit device, 110... interface circuit, 120... luminance processing circuit, 130... light source control circuit, 140... light source luminance determination circuit, 150... illumination luminance calculation circuit, 160... color correction circuit, 170... memory unit, 171... attenuation rate distribution information, 175... grid identification information, 177... mode setting information, 200... display device, 210... backlight, 220... display panel, 225... outer shape, 230... display driver, 240... light source driver, 250... display controller, 300... processing device, 400... display system, 500... electronic device, IMA, IMB... image data, L1~L16... light source elements, LLD... light source luminance data, LPX... illumination luminance data

Claims

1. A circuit device for controlling a display device including a plurality of light source elements and a display panel, based on light source luminance information indicating the luminance of each light source element among the plurality of light source elements and attenuation rate distribution information indicating the attenuation rate distribution of light with respect to the distance between the light source element and the pixel, a luminance processing circuit that calculates illumination luminance information indicating the luminance with which a target pixel of the display panel is illuminated by the plurality of light source elements; a color correction circuit that color-corrects input image data based on the illumination luminance information; comprising: the luminance processing circuit calculates the illumination luminance information by disabling the light source luminance information at a virtual light source position where the plurality of light source elements are not arranged, among the calculation grids used for the calculation of the illumination luminance information. A circuit device characterized by this.

2. In the circuit device according to Claim 1, including a storage unit that stores grid specification information for specifying at least one of an effective light source position where the plurality of light source elements are arranged and the virtual light source position, among the calculation grids; the luminance processing circuit disables the light source luminance information at the virtual light source position based on the grid specification information. A circuit device characterized by this.

3. In the circuit device according to Claim 2, the storage unit stores the grid specification information for which the effective light source position or the virtual light source position is specified for each light source position of the calculation grid. A circuit device characterized by this.

4. In the circuit device according to Claim 2, the storage unit stores the grid specification information for designating any one of a plurality of presets in which the effective light source position or the virtual light source position is specified in advance for each light source position of the calculation grid. A circuit device characterized by this.

5. In the circuit device according to Claim 1, the luminance processing circuit an effective light source mode in which each light source position of the calculation grid is set to an effective light source position where the plurality of light source elements are arranged; a virtual light source mode in which each light source position of the calculation grid is set to the virtual light source position; a mixed mode in which the effective light source position and the virtual light source position are mixed in the calculation grid; A circuit device characterized by having at least two of these modes.

6. In the circuit device according to Claim 5, the luminance processing circuit sets a first mode, which is any one of the at least two modes, for a first region of the calculation grid. A circuit device characterized in that a second mode different from the first mode among the at least two modes is set for a second region different from the first region of the arithmetic grid.

7. In the circuit device according to claim 1, the arithmetic grid is a grid arranged at a first interval in the horizontal scanning direction and at a second interval in the vertical scanning direction.

8. In the circuit device according to claim 7, in the arithmetic grid, one of the odd-numbered columns or even-numbered columns in the odd-numbered rows, and the other of the odd-numbered columns or even-numbered columns in the even-numbered rows are the virtual light source positions.

9. In the circuit device according to claim 1, the luminance processing circuit includes a light source luminance determination circuit that disables the light source luminance information at the virtual light source position in the arithmetic grid and determines the light source luminance information based on the input image data; and an illumination luminance calculation circuit that calculates the illumination luminance information based on the light source luminance information determined by the light source luminance determination circuit and the attenuation rate distribution information. A circuit device characterized by including the above.

10. In the circuit device according to claim 1, the luminance processing circuit calculates the illumination luminance information using the light source luminance information at the surrounding s×t light source positions (s and t are integers of 2 or more) of the target pixel in the arithmetic grid.

11. A display system characterized by including the circuit device according to any one of claims 1 to 10 and the display device. A display system characterized by including the above.

Citation Information

Patent Citations

  • Image display device and image display method

    JP2019095559A