Light-emitting device

Abstract

To provide a liquid crystal display device and a light-emitting device that can be produced with a small number of masks and are highly reliable.SOLUTION: A light-emitting device includes: a gate electrode; a gate insulation film that is positioned on the gate electrode; a semiconductor film that is positioned on the game insulation film and overlaps with the gate electrode; an island-shaped first insulation film that is positioned on the semiconductor film and overlaps with the gate electrode; a first conductive film that is positioned on the semiconductor film; a pair of second conductive films that sandwich the first insulation film therebetween and are positioned on the semiconductor film; a second insulation film that is positioned on the first insulation film, the first conductive film, and the pair of second conductive films; and a pixel electrode that is positioned on the second insulation film, and is connected to one of the pair of second conductive films via a first opening provided in the second insulation film. A second opening positioned between the first conductive film and one or the other of the pair of second conductive films is provided in the second insulation film and the semiconductor film.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a liquid crystal display device having a transistor in each pixel and a method for manufacturing the same. The present invention relates to a light-emitting device having a transistor in each pixel and a method for manufacturing the same.

Background Art

[0002] Attention has been focused on a metal oxide called an oxide semiconductor as a new semiconductor material that combines the high mobility obtained by crystalline silicon and the uniform device characteristics obtained by amorphous silicon. Metal oxides are used in various applications. For example, indium oxide, which is a well-known metal oxide, is used for a pixel electrode having a light-transmitting property in a liquid crystal display device or the like. Examples of metal oxides exhibiting semiconductor characteristics include tungsten oxide, tin oxide, indium oxide, zinc oxide, etc. Transistors using such metal oxides exhibiting semiconductor characteristics in a channel formation region are already known ( Patent Document 1 and Patent Document 2).

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0004] By the way, the transistors used in liquid crystal display devices have electrical characteristics (threshold values The changes (such as voltage, mobility, S value, etc.) are small, and the electrical characteristics caused by deterioration over time should have small variations. It is desirable that the changes in electrical characteristics due to deterioration over time are small for transistors, and also that the variations in electrical characteristics caused by deterioration over time are small for transistors used in this way, the reliability of the liquid crystal display device can be improved, and the quality of the displayed image can be improved.

[0005] In addition, the masks for exposure used in the photolithography method are generally expensive, and moreover in the photolithography method, for each mask, a series of processes such as film formation of photoresist, exposure, development, imaging, etching, and stripping are required. Therefore, when the number of necessary masks for manufacturing the liquid crystal display device increases, the number of manufacturing processes increases accordingly, and the cost spent on manufacturing tends to be high.

[0006] Under the technical background as described above, an object of the present invention is to provide a highly reliable liquid crystal display device. Another object of the present invention is to provide a liquid crystal display device that can be manufactured with a small number of masks and has high reliability.

[0007] Alternatively, an object of the present invention is to provide a method for manufacturing a liquid crystal display device that can obtain a highly reliable liquid crystal display device using a small number of masks.

[0008] In addition, in an active matrix light-emitting device using a light-emitting element such as an OLED (Organic Light Emitting Diode), the transistors provided in each pixel are desired to have small changes in electrical characteristics due to deterioration over time, and also to have small variations in electrical characteristics caused by deterioration over time. It is desirable that the changes in electrical characteristics due to deterioration over time are small for the transistors, By using a transistor and a transistor with little variation in electrical characteristics caused by deterioration over time, the reliability of the light-emitting device can be improved, and the quality of the displayed image can be enhanced.

[0009] In addition, the exposure mask used in the photolithography method is generally expensive, and moreover, in the photolithography method, for each mask, a series of processes such as film formation of photoresist, exposure, imaging, etching, and stripping are required. Therefore, when the number of masks required for manufacturing the light-emitting device increases, the number of manufacturing processes increases accordingly, and the cost spent on manufacturing tends to be high.

[0010] Under the technical background as described above, an object of the present invention is to provide a highly reliable light-emitting device. Another object of the present invention is to provide a light-emitting device that can be manufactured with a small number of masks and has high reliability.

[0011] Alternatively, an object of the present invention is to provide a method for manufacturing a light-emitting device that can obtain a highly reliable light-emitting device by using a small number of masks.

Means for Solving the Problems

[0012] In one aspect of the present invention, in the step of forming an opening portion for connecting the pixel electrode and the source electrode or the drain electrode on the insulating film on the source electrode and the drain electrode, not only the shape of the insulating film but also the shape of the semiconductor film is processed. Specifically, in the method for manufacturing a liquid crystal display device according to one aspect of the present invention, a step of forming a gate electrode, a step of forming an insulating film (hereinafter also referred to as a channel protection film) having a function of protecting a channel formation region of the semiconductor film, and a step of forming a source electrode and a drain electrode are included. ​​​​​​​​​​​​​ A step of forming a source electrode or a drain electrode, and an insulating film on the source electrode and the drain electrode forming an opening in the insulating film and still processing the shape of the semiconductor film, and a step of forming a pixel electrode In this case, a photolithography method using a mask is used. Therefore, a step using a photolithography method only for processing the shape of the semiconductor film alone can be omitted in one aspect of the present invention.

[0013] Also, specifically, in a method of manufacturing a light-emitting device according to one aspect of the present invention, forming a gate electrode A step of forming an insulating film having a function of protecting a channel formation region of the semiconductor film, and a step of forming a source electrode or a drain electrode forming an opening in the insulating film on the source electrode and the drain electrode, and still processing the shape of the semiconductor film, and forming a pixel electrode forming a step of forming a partition by providing an opening in the insulating film on the pixel electrode, and in this case, a photolithography method using a mask is used. Therefore, a step using a photolithography method only for processing the shape of the semiconductor film alone can be omitted in one aspect of the present invention.

[0014] Note that the source electrode and the drain electrode, and the conductive film formed in the same layer as the source electrode and the drain electrode are present between the insulating film on the source electrode and the drain electrode and the semiconductor film. Therefore when using the manufacturing method of processing the shape of the insulating film on the source electrode and the drain electrode and the shape of the semiconductor film with the same mask as described above, it is difficult to process the shape of the portion of the semiconductor film located below the conductive film And when a plurality of conductive films overlap the semiconductor film, due to the electric field applied from the pixel electrode to the semiconductor film, between the conductive films ​​​​​​​ A channel (hereafter referred to as a parasitic channel) may be formed in the body membrane. When formed, the conductive films that should be electrically isolated from each other are electrically connected via the semiconductor film. This causes a degradation of the displayed image quality.

[0015] In view of this, in a liquid crystal display device or a light-emitting device according to one embodiment of the present invention, The insulating film on the conductive film has an opening, and the semiconductor film has a region overlapping the opening. Therefore, the semiconductor film provided at the position overlapping each of the plurality of conductive films is removed. The parasitic channels are separated from each other by the opening. This suppresses the formation of ions, and prevents the conductive films from being electrically connected to each other.

[0016] Also, the step of forming a channel protection film or the step of forming a source electrode or a drain electrode In the process of etching, impurities are present on the surface of the semiconductor film or the channel protection film exposed by etching. If any object adheres to the surface, the off-state current of the transistor increases or the electrical characteristics of the transistor deteriorate. In addition, parasitic channels are easily generated in the semiconductor film, resulting in electrical isolation. The conductive films to be bonded to each other are easily electrically connected to each other via the semiconductor film. The impurities include elements that constitute the source electrode or drain electrode, and The elements present in the room, or the etching gas or etching solution used in the etching Therefore, in the liquid crystal display device or the light-emitting device according to one embodiment of the present invention, In the manufacturing method, after etching for forming the channel protection film is completed or after etching, After etching for forming the source electrode or the drain electrode is completed, the semiconductor film or The method also includes a step of removing impurities that may have adhered to the surface of the channel protective film.

[0017] Specifically, the liquid crystal display device according to one embodiment of the present invention includes a gate electrode and a a gate insulating film formed on the gate electrode; a semiconductor film disposed on the gate insulating film and overlapping the gate electrode; a first insulating film located on the semiconductor film and overlapping with the gate electrode; and a first conductive film located on the semiconductor film. a pair of second conductive films sandwiching an island-shaped first insulating film therebetween and positioned on the semiconductor film; A semiconductor film, an island-shaped first insulating film, a first conductive film, and a pair of second conductive films. a pair of second insulating films, each of which is located on the second insulating film and is connected to the second insulating film through a first opening provided in the second insulating film; a pixel electrode connected to one of the conductive films, and the second insulating film and the semiconductor film are A second opening is located between the first conductive film and one or the other of the pair of second conductive films. It is provided.

[0018] Specifically, in a method for manufacturing a liquid crystal display device according to one embodiment of the present invention, forming a semiconductor film so as to overlap the gate electrode; forming an island-shaped first insulating film by photolithography so as to form a first conductive film; A pair of second conductive films sandwiching an island-shaped first insulating film therebetween are formed by photolithography. A step of forming a second insulating film on the semiconductor film, the semiconductor film, the island-shaped first insulating film, and the first conductive film and forming a second conductive film on the pair of second conductive films, and partially exposing one of the pair of second conductive films. a first opening for allowing the second insulating film and the semiconductor film to be exposed to the first conductive film and one of the pair of second conductive films; and a second opening located between the first opening and the second opening by photolithography. A step of forming a pixel connected to one of a pair of second conductive films through a first opening on a second insulating film and a step of forming an electrode by a photolithography method. Specifically, a light-emitting device according to one aspect of the present invention includes a gate electrode, a gate insulating film positioned on the gate electrode, a semiconductor film positioned on the gate insulating film and overlapping the gate electrode, an island-shaped first insulating film positioned on the semiconductor film and overlapping the gate electrode, a first conductive film positioned on the semiconductor film, a pair of second conductive films sandwiching the island-shaped first insulating film and positioned on the semiconductor film, a second insulating film positioned on the semiconductor film, the island-shaped first insulating film, the first conductive film, and the pair of second conductive films, a pixel electrode positioned on the second insulating film and connected to one of the pair of second conductive films through a first opening provided in the second insulating film, and a third insulating film on the pixel electrode. The second insulating film and the semiconductor film are provided with a second opening positioned between the first conductive film and one or the other of the pair of second conductive films, and the third insulating film is provided with a third opening such that the pixel electrode is partially exposed.

[0019] Specifically, a method for manufacturing a light-emitting device according to one aspect of the present invention includes a step of forming a semiconductor film on a gate insulating film so as to overlap a gate electrode, a step of forming an island-shaped first insulating film on the semiconductor film so as to overlap the gate electrode by a photolithography method, a step of forming a first conductive film and a pair of second conductive films sandwiching the island-shaped first insulating film on the semiconductor film by a photolithography method, a step of forming a second insulating film on the semiconductor film, the island-shaped first insulating film, the first conductive film, and the pair of second conductive films, and a step of partially exposing one of the pair of second conductive films. A step of forming a semiconductor film on a gate insulating film so as to overlap a gate electrode, a step of forming an island-shaped first insulating film on the semiconductor film so as to overlap the gate electrode by a photolithography method, a step of forming a first conductive film and a pair of second conductive films sandwiching the island-shaped first insulating film on the semiconductor film by a photolithography method, a step of forming a second insulating film on the semiconductor film, the island-shaped first insulating film, the first conductive film, and the pair of second conductive films, and a step of partially exposing one of the pair of second conductive films. A step of forming a semiconductor film on a gate insulating film so as to overlap a gate electrode, a step of forming an island-shaped first insulating film on the semiconductor film so as to overlap the gate electrode by a photolithography method, a step of forming a first conductive film and a pair of second conductive films sandwiching the island-shaped first insulating film on the semiconductor film by a photolithography method, a step of forming a second insulating film on the semiconductor film, the island-shaped first insulating film, the first conductive film, and the pair of second conductive films, and a step of partially exposing one of the pair of second conductive films. A step of forming a semiconductor film on a gate insulating film so as to overlap a gate electrode, a step of forming an island-shaped first insulating film on the semiconductor film so as to overlap the gate electrode by a photolithography method, a step of forming a first conductive film and a pair of second conductive films sandwiching the island-shaped first insulating film on the semiconductor film by a photolithography method, a step of forming a second insulating film on the semiconductor film, the island-shaped first insulating film, the first conductive film, and the pair of second conductive films, and a step of partially exposing one of the pair of second conductive films. A step of forming a semiconductor film on a gate insulating film so as to overlap a gate electrode, a step of forming an island-shaped first insulating film on the semiconductor film so as to overlap the gate electrode by a photolithography method, a step of forming a first conductive film and a pair of second conductive films sandwiching the island-shaped first insulating film on the semiconductor film by a photolithography method, a step of forming a second insulating film on the semiconductor film, the island-shaped first insulating film, the first conductive film, and the pair of second conductive films, and a step of partially exposing one of the pair of second conductive films. A step of forming a semiconductor film on a gate insulating film so as to overlap a gate electrode, a step of forming an island-shaped first insulating film on the semiconductor film so as to overlap the gate electrode by a photolithography method, a step of forming a first conductive film and a pair of second conductive films sandwiching the island-shaped first insulating film on the semiconductor film by a photolithography method, a step of forming a second insulating film on the semiconductor film, the island-shaped first insulating film, the first conductive film, and the pair of second conductive films, and a step of partially exposing one of the pair of second conductive films. A step of forming a semiconductor film on a gate insulating film so as to overlap a gate electrode, a step of forming an island-shaped first insulating film on the semiconductor film so as to overlap the gate electrode by a photolithography method, a step of forming a first conductive film and a pair of second conductive films sandwiching the island-shaped first insulating film on the semiconductor film by a photolithography method, a step of forming a second insulating film on the semiconductor film, the island-shaped first insulating film, the first conductive film, and the pair of second conductive films, and a step of partially exposing one of the pair of second conductive films. A step of forming a semiconductor film on a gate insulating film so as to overlap a gate electrode, a step of forming an island-shaped first insulating film on the semiconductor film so as to overlap the gate electrode by a photolithography method, a step of forming a first conductive film and a pair of second conductive films sandwiching the island-shaped first insulating film on the semiconductor film by a photolithography method, a step of forming a second insulating film on the semiconductor film, the island-shaped first insulating film, the first conductive film, and the pair of second conductive films, and a step of partially exposing one of the pair of second conductive films. A step of forming a semiconductor film on a gate insulating film so as to overlap a gate electrode, a step of forming an island-shaped first insulating film on the semiconductor film so as to overlap the gate electrode by a photolithography method, a step of forming a first conductive film and a pair of second conductive films sandwiching the island-shaped first insulating film on the semiconductor film by a photolithography method, a step of forming a second insulating film on the semiconductor film, the island-shaped first insulating film, the first conductive film, and the pair of second conductive films, and a step of partially exposing one of the pair of second conductive films. A step of forming a semiconductor film on a gate insulating film so as to overlap a gate electrode, a step of forming an island-shaped first insulating film on the semiconductor film so as to overlap the gate electrode by a photolithography method, a step of forming a first conductive film and a pair of second conductive films sandwiching the island-shaped first insulating film on the semiconductor film by a photolithography method, a step of forming a second insulating film on the semiconductor film, the island-shaped first insulating film, the first conductive film, and the pair of second conductive films, and a step of partially exposing one of the pair of second conductive films.

[0020] Specifically, a method for manufacturing a light-emitting device according to one aspect of the present invention includes a step of forming a semiconductor film on a gate insulating film so as to overlap a gate electrode, a step of forming an island-shaped first insulating film on the semiconductor film so as to overlap the gate electrode by a photolithography method, a step of forming a first conductive film and a pair of second conductive films sandwiching the island-shaped first insulating film on the semiconductor film by a photolithography method, a step of forming a second insulating film on the semiconductor film, the island-shaped first insulating film, the first conductive film, and the pair of second conductive films, and a step of partially exposing one of the pair of second conductive films. A step of forming a semiconductor film on a gate insulating film so as to overlap a gate electrode, a step of forming an island-shaped first insulating film on the semiconductor film so as to overlap the gate electrode by a photolithography method, a step of forming a first conductive film and a pair of second conductive films sandwiching the island-shaped first insulating film on the semiconductor film by a photolithography method, a step of forming a second insulating film on the semiconductor film, the island-shaped first insulating film, the first conductive film, and the pair of second conductive films, and a step of partially exposing one of the pair of second conductive films. A step of forming a semiconductor film on a gate insulating film so as to overlap a gate electrode, a step of forming an island-shaped first insulating film on the semiconductor film so as to overlap the gate electrode by a photolithography method, a step of forming a first conductive film and a pair of second conductive films sandwiching the island-shaped first insulating film on the semiconductor film by a photolithography method, a step of forming a second insulating film on the semiconductor film, the island-shaped first insulating film, the first conductive film, and the pair of second conductive films, and a step of partially exposing one of the pair of second conductive films. A step of forming a semiconductor film on a gate insulating film so as to overlap a gate electrode, a step of forming an island-shaped first insulating film on the semiconductor film so as to overlap the gate electrode by a photolithography method, a step of forming a first conductive film and a pair of second conductive films sandwiching the island-shaped first insulating film on the semiconductor film by a photolithography method, a step of forming a second insulating film on the semiconductor film, the island-shaped first insulating film, the first conductive film, and the pair of second conductive films, and a step of partially exposing one of the pair of second conductive films. A step of forming a semiconductor film on a gate insulating film so as to overlap a gate electrode, a step of forming an island-shaped first insulating film on the semiconductor film so as to overlap the gate electrode by a photolithography method, a step of forming a first conductive film and a pair of second conductive films sandwiching the island-shaped first insulating film on the semiconductor film by a photolithography method, a step of forming a second insulating film on the semiconductor film, the island-shaped first insulating film, the first conductive film, and the pair of second conductive films, and a step of partially exposing one of the pair of second conductive films. A step of forming a semiconductor film on a gate insulating film so as to overlap a gate electrode, a step of forming an island-shaped first insulating film on the semiconductor film so as to overlap the gate electrode by a photolithography method, a step of forming a first conductive film and a pair of second conductive films sandwiching the island-shaped first insulating film on the semiconductor film by a photolithography method, a step of forming a second insulating film on the semiconductor film, the island-shaped first insulating film, the first conductive film, and the pair of second conductive films, and a step of partially exposing one of the pair of second conductive films. Forming a first opening, and a second opening positioned between either one or the other of a first conductive film and a pair of second conductive films in a second insulating film and a semiconductor film by photolithography and, forming a pixel electrode connected to one of the pair of second conductive films through the first opening on the second insulating film by photolithography, and forming a third insulating film having an opening at a position overlapping the pixel electrode on the pixel electrode by photolithography

Advantages of the Invention

[0021] In one aspect of the present invention, a highly reliable liquid crystal display device can be provided. Also, in one aspect of the present invention, a highly reliable liquid crystal display device can be provided with a small number of masks

[0022] Also, in a method for manufacturing a liquid crystal display device according to one aspect of the present invention, a highly reliable liquid crystal display device can be manufactured with a small number of masks

[0023] In one aspect of the present invention, a highly reliable light-emitting device can be provided. Also, in one aspect of the present invention, a highly reliable light-emitting device can be provided with a small number of masks

[0024] Also, in a method for manufacturing a light-emitting device according to one aspect of the present invention, a highly reliable light-emitting device can be manufactured with a small number of masks

Brief Description of the Drawings

[0025]

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Embodiments for Carrying Out the Invention

[0026] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and those skilled in the art can easily understand that the form and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention is not to be construed as being limited to the description of the embodiments shown below.

[0027] In this specification, a liquid crystal display device includes a panel in which liquid crystal elements are formed in each pixel, and a module in a state where an IC including a driving circuit or a controller is mounted on the panel. Furthermore, a liquid crystal display device according to one aspect of the present invention includes, within its scope, an element substrate corresponding to a form before the liquid crystal element is completed in the process of manufacturing the liquid crystal display device. The element substrate includes a transistor and a pixel electrode to which a voltage is supplied via the transistor in each of a plurality of pixels. In this specification, a light-emitting device includes a panel in which light-emitting elements are formed in each pixel, and a module in a state where an IC including a driving circuit or a controller is mounted on the panel. Furthermore, a light-emitting device according to one aspect of the present invention includes, within its scope, an element substrate corresponding to a form before the light-emitting device is completed in the process of manufacturing the light-emitting device. The element substrate includes a transistor and a pixel electrode to which a voltage is supplied via the transistor in each of a plurality of pixels.

[0028] Also, in this specification, a light-emitting device includes a panel in which light-emitting elements are formed in each pixel, and a module in a state where an IC including a driving circuit or a controller is mounted on the panel. Furthermore, a light-emitting device according to one aspect of the present invention includes, within its scope, an element substrate corresponding to a form before the light-emitting device is completed in the process of manufacturing the light-emitting device. The element substrate includes a transistor and a pixel electrode to which a voltage is supplied via the transistor in each of a plurality of pixels. The process includes, within its scope, an element substrate corresponding to a form before the light-emitting element is completed, and the element substrate includes a transistor and a pixel electrode to which a voltage is supplied via the transistor, in each of a plurality of pixels.

[0029] (Embodiment 1) FIG. 1 illustrates the structure of a liquid crystal display device according to one aspect of the present invention. FIG. 1(A) is an example of a cross-sectional view of a transistor 100 included in a pixel in the channel length direction.

[0030] In FIG. 1(A), a gate electrode 101 on an insulating surface, a gate insulating film 102 located on the gate electrode 101, a semiconductor film 103 located on the gate insulating film 102 and overlapping the gate electrode 101, an island-shaped insulating film 104 located on the semiconductor film 103 and overlapping the gate electrode 101, a conductive film 105 located on the semiconductor film 103, conductive films 106a and 106b sandwiching the insulating film 104 and still located on the semiconductor film 103, an insulating film 107 located on the semiconductor film 103, the insulating film 104, the conductive film 105, the conductive films 106a and 106b, a pixel electrode 109 located on the insulating film 107 and connected to the conductive film 106b through an opening 108 provided in the insulating film 107, and an opening 110 provided in the insulating film 107 and the semiconductor film 103 are illustrated. And, in FIG. 1(A), the gate electrode 101, the gate insulating film 102, the semiconductor film 103, the insulating film 104 functioning as a channel protection film, the conductive films 106a and 106b constitute the transistor 100. And, either one of the conductive films 106a and 106b functions as a source electrode and the other functions as a drain electrode.

[0031]

[0032] ​​​​​​​​​ In the method for manufacturing a liquid crystal display device according to one aspect of the present invention, in the step of forming the gate electrode 101 and , the step of forming the insulating film 104, the conductive film 105, the conductive film 106a, and the conductive film 106b , in the step of forming the opening 108 in the insulating film 107 and further forming the opening 110 in the insulating film 107 and the semi- conductor film 103, and in the step of forming the pixel electrode 109, a photolithography method using a mask is used. That is, in one aspect of the present invention, in the step of forming the opening 110 in the insulating film 107, since the shape of the semiconductor film 103 is being processed, the step of using a photolithography method only for processing the shape of the semiconductor film 103 alone can be omitted. Therefore, in the liquid crystal display device according to one aspect of the present invention, a series of steps such as film formation, exposure, development, etching, and peeling of the photoresist performed by the photolithography method can be partially omitted. And since the number of expensive masks for exposure can be suppressed, the cost spent on manufacturing the liquid crystal display device can be suppressed. In addition, the conductive film 105, the conductive film 106a, and the conductive film 106b are present between the insulating film 107 and the semiconductor film 103. Therefore, when using a manufacturing method that also processes the shape of the semiconductor film 103 in the step of forming the opening 108 in the insulating film 107, it is difficult to process the shape of the semiconductor film 103 located below the conductive film 105, the conductive film 10 6a, and the conductive film 106b. And when the conductive film 105, the conductive film 106a, and the conductive film 106b overlap the semiconductor film 103, a parasitic channel may be formed in the semiconductor film 10 3 due to the electric field applied from the pixel electrode 109 to the semiconductor film 103. When a parasitic channel is formed, it is electrically separated from the semiconductor film 103. When a parasitic channel is formed, electrical separation from the semiconductor film 103. When a parasitic channel is formed, electrical separation from the semiconductor film 103. When a parasitic channel is formed, electrical separation

[0033] Note that the conductive film 105, the conductive film 106a, and the conductive film 106b are present between the insulating film 107 and the semiconductor film 103. Therefore, in the step of forming the opening 108 in the insulating film 107, when using a manufacturing method that also processes the shape of the semiconductor film 103, it is difficult to process the shape of the semiconductor film 103 located below the conductive film 105, the conductive film 10 6a, and the conductive film 106b. And when the conductive film 105, the conductive film 106a, and the conductive film 106b overlap the semiconductor film 103, a parasitic channel may be formed in the semiconductor film 10 3 due to the electric field applied from the pixel electrode 109 to the semiconductor film 103. When a parasitic channel is formed, it is difficult to electrically separate from the semiconductor film 103. When a parasitic channel is formed, electrical separation from the semiconductor film 103. When a parasitic channel is formed, electrical separation The conductive film 105 to be removed and the conductive film 106a or 106b are disposed on the semiconductor film 103. This causes a degradation in the displayed image quality.

[0034] Therefore, in a liquid crystal display device according to one embodiment of the present invention, the position of the opening 110 is set to the conductive film 105. and the conductive film 106a or the conductive film 106b, thereby forming the semiconductor film 103 as a part. In FIG. 1A, the semiconductor film 10 is partially removed in the opening 110. 3 and the insulating film 107, as well as the gate insulating film 102 are removed. In one embodiment of the present invention, the gate insulating film 102 is not necessarily removed in the opening 110. It is not necessary to form the gate insulating film 102 in the opening 110 , and the gate insulating film 102 may remain in the opening 110 .

[0035] FIG. 1B shows an example of a top view of a liquid crystal display device having the cross-sectional structure shown in FIG. However, in Fig. 1(B), the gate insulator is not shown in order to clarify the layout of the liquid crystal display device. 1B is a top view in which the insulating film 102 and the insulating film 107 are omitted. The cross-sectional view taken along line -A2 corresponds to FIG.

[0036] As shown in FIG. 1A and FIG. 1B, in one embodiment of the present invention, a semiconductor film 103 and an insulating film The film 107 is provided with an opening located between the conductive film 105 and the conductive film 106a or the conductive film 106b. A mouth 110 is provided.

[0037] In one embodiment of the present invention, the opening 110 allows for the introduction of a conductive material, as shown in FIGS. 1(A) and 1(B). The semiconductor film 103 located under the conductive film 106a or the conductive film 106b and the conductive film 105 The semiconductor film 103 located there is in a separated state. Therefore, in one aspect of the present invention, even when an electric field is applied to the semiconductor film 103 from the pixel electrode 109 or the like, the opening 110 is present between the conductive film 105 and the conductive film 106a or the conductive film 106b, so that the formation of a parasitic channel in the semiconductor film 103 can be suppressed. And by suppressing the formation of the parasitic channel, it is possible to prevent the conductive film 105 and the conductive film 106a or the conductive film 106b from being electrically connected unintentionally, and to prevent the deterioration of the image quality displayed on the liquid crystal display device. Even when an electric field is applied to the semiconductor film 103 from the pixel electrode 109 or the like, the opening 110 is present between the conductive film 105 and the conductive film 106a or the conductive film 106b. which can suppress the formation of a parasitic channel in the semiconductor film 103. And by suppressing the formation of the parasitic channel, it is possible to prevent the conductive film 105 and the conductive film 106a or the conductive film 106b from being electrically connected unintentionally, and to prevent the deterioration of the image quality displayed on the liquid crystal display device. And by suppressing the formation of the parasitic channel, it is possible to prevent the conductive film 105 and the conductive film 106a or the conductive film 106b from being electrically connected unintentionally, and to prevent the deterioration of the image quality displayed on the liquid crystal display device. And by suppressing the formation of the parasitic channel, it is possible to prevent the conductive film 105 and the conductive film 106a or the conductive film 106b from being electrically connected unintentionally, and to prevent the deterioration of the image quality displayed on the liquid crystal display device.

[0038] In FIG. 1(B), an example where the semiconductor film 103 located under the conductive film 106a or the conductive film 106b and the semiconductor film 103 located under the conductive film 105 are completely separated is illustrated. However, in one aspect of the present invention, the semiconductor film 103 does not necessarily have to be completely separated, and the semiconductor film 103 may be partially separated between the conductive film 105 and the conductive film 106a or the conductive film 106b. However, in one aspect of the present invention, the semiconductor film 103 does not necessarily have to be completely separated, and the semiconductor film 103 may be partially separated between the conductive film 105 and the conductive film 106a or the conductive film 106b. However, in one aspect of the present invention, the semiconductor film 103 does not necessarily have to be completely separated, and the semiconductor film 103 may be partially separated between the conductive film 105 and the conductive film 106a or the conductive film 106b. However, in one aspect of the present invention, the semiconductor film 103 does not necessarily have to be completely separated, and the semiconductor film 103 may be partially separated between the conductive film 105 and the conductive film 106a or the conductive film 106b.

[0039] FIG. 2 shows an example of a top view of the liquid crystal display device having the cross-sectional structure shown in FIG. 1(A). However, in FIG. 2, a top view in which the gate insulating film 102 and the insulating film 107 are omitted is shown in order to clarify the layout of the liquid crystal display device. However, in FIG. 2, a top view in which the gate insulating film 102 and the insulating film 107 are omitted is shown in order to clarify the layout of the liquid crystal display device. However, in FIG. 2, a top view in which the gate insulating film 102 and the insulating film 107 are omitted is shown in order to clarify the layout of the liquid crystal display device.

[0040] In the liquid crystal display device shown in FIG. 2, the shape of the opening 110 is different from that in the case of FIG. 1(B). In FIG. 2, the opening 110 is located between the conductive film 105 and the conductive film 106a or the conductive film 106b in the same manner as in the case of FIG. 1(B), but the semiconductor film 103 located under the conductive film 106a or the conductive film 106b and the semiconductor film 103 located under the conductive film 105 are separated by the opening 110. In FIG. 2, the opening 110 is located between the conductive film 105 and the conductive film 106a or the conductive film 106b in the same manner as in the case of FIG. 1(B), but the semiconductor film 103 located under the conductive film 106a or the conductive film 106b and the semiconductor film 103 located under the conductive film 105 are separated by the opening 110. In FIG. 2, the opening 110 is located between the conductive film 105 and the conductive film 106a or the conductive film 106b in the same manner as in the case of FIG. 1(B), but the semiconductor film 103 located under the conductive film 106a or the conductive film 106b and the semiconductor film 103 located under the conductive film 105 are separated by the opening 110. In FIG. 2, the opening 110 is located between the conductive film 105 and the conductive film 106a or the conductive film 106b in the same manner as in the case of FIG. 1(B), but the semiconductor film 103 located under the conductive film 106a or the conductive film 106b and the semiconductor film 103 located under the conductive film 105 are separated by the opening 110. It is connected in an external region. That is, in FIG. 2, between the conductive film 105 and the conductive film 106a or the conductive film 106b, the semiconductor film 103 is in a partially separated state. Even when the semiconductor film 103 is in a partially separated state, the effect of suppressing the generation of parasitic channels can be obtained.

[0041] Also, a part of the region where the opening 110 is formed may overlap with the conductive film 106a or the conductive film 106b. Alternatively, a part of the region where the opening 110 is formed may overlap with the region where the conductive film 105 is formed.

[0042] FIG. 3(A) shows an example of a cross-sectional view of the transistor 100 included in a pixel in the channel length direction. Further, FIG. 3(B) shows an example of a top view of a liquid crystal display device having the cross-sectional structure shown in FIG. 3(A). However, in FIG. 3(B), for clarity of the layout of the liquid crystal display device, a top view in which the gate insulating film 102 and the insulating film 107 are omitted is shown. Also, the cross-sectional view taken along the dashed-dotted line B1 - B2 in FIG. 3(B) corresponds to FIG. 3(A).

[0043] In the liquid crystal display device shown in FIGS. 3(A) and 3(B), the region where the opening 110 is formed is different from the cases of FIGS. 1(A) and 1(B). In FIGS. 3(A) and 3(B), a part of the region where the opening 110 is formed overlaps with the region where the conductive film 106b is formed. The semiconductor film 103 located under the conductive film 106b is not removed when the opening 110 is formed. Therefore, in the region where the opening 110 is formed, the semiconductor film 103 is in a state of being partially remaining, and the end of the semiconductor film 103 and the end of the insulating film 107 at the opening 110 do not coincide. ​​​​​​​​​​​​​

[0044] In one aspect of the present invention, as shown in FIGS. 3(A) and 3(B), even if a part of the region where the opening 110 is formed overlaps with the region where the conductive film 106b is formed, the semiconductor film 103 located under the conductive film 106b and the semiconductor film 103 located under the conductive film 105 can be separated from each other. Therefore, the effect of suppressing the generation of parasitic channels can be obtained. Even if a part of the region where the opening 110 is formed overlaps with the region where the conductive film 106a is formed, the effect of suppressing the generation of parasitic channels can be obtained. Even if a part of the region where the opening 110 is formed overlaps with the region where the conductive film 105 is formed, the effect of suppressing the generation of parasitic channels can be obtained. And when the region where the opening 110 is formed partially overlaps with the region where the conductive film 106b is formed, it is not necessary to provide the opening 108 for connecting the conductive film 106b and the pixel electrode 109. Therefore, since there is no need to secure a region for forming the opening 108, high definition of the pixel portion can be realized.

[0045] In addition, FIG. 4(A) shows an example of a cross-sectional view of the transistor 100 included in the pixel in the channel length direction. FIG. 4(B) shows an example of a top view of the liquid crystal display device having the cross-sectional structure shown in FIG. 4(A). However, in FIG. 4(B), a top view in which the gate insulating film 102 and the insulating film 107 are omitted is shown in order to clarify the layout of the liquid crystal display device. Also, the cross-sectional view taken along the dashed-dotted line C1-C2 in FIG. 4(B) corresponds to FIG. 4(A).

[0046]

[0047] Further, FIG. 4(A) shows an example of a cross-sectional view of the transistor 100 included in the pixel in the channel length direction. FIG. 4(B) shows an example of a top view of the liquid crystal display device having the cross-sectional structure shown in FIG. 4(A). However, in FIG. 4(B), a top view in which the gate insulating film 102 and the insulating film 107 are omitted is shown in order to clarify the layout of the liquid crystal display device. Also, the cross-sectional view taken along the dashed-dotted line C1-C2 in FIG. 4(B) corresponds to FIG. 4(A).

[0048] The liquid crystal display devices shown in FIGS. 4(A) and 4(B) have a different structure from the liquid crystal display devices shown in FIGS. 1(A) and 1(B) in that a conductive film 1 11 is provided in the same layer as the gate electrode 101. Specifically, in FIGS. 4(A) and 4(B), the conductive film 111 is positioned on the insulating surface, and the gate insulating film 102 and the semiconductor film 103 are sequentially stacked on the conductive film 111 as provided so that a conductive film 105 is provided at a position overlapping the conductive film 111 on the semiconductor film 103 as provided.

[0049] Then, in FIGS. 4(A) and 4(B), the region where the opening 110 is formed and the region where the conductive film 11 1 is formed partially overlap, and a part of the conductive film 111 is exposed at the opening 110. And since the conductive film 111 is positioned under the semiconductor film 103, the semiconductor film 103 is partially removed at the opening 110. Therefore, even in the cases of FIGS. 4( A) and 4(B), the semiconductor film 103 positioned under the conductive film 106a or the conductive film 106b and the semiconductor film 103 positioned under the conductive film 105 are in a separated state so that the effect of suppressing the generation of parasitic channels can be obtained.

[0050] Note that in the liquid crystal display device according to one aspect of the present invention, the semiconductor film 1 03 included in the transistor 100 contains a wide-gap semiconductor such as an oxide semiconductor.

[0051] As the oxide semiconductor, it is preferable to contain at least indium (In) or zinc (Zn). In addition, it is preferable to have gallium (Ga) in addition to them as a stabilizer for reducing the variation in the electrical characteristics of the transistor using the oxide semiconductor ​​​​ Yes. Also, it preferably has tin (Sn) as a stabilizer. Also, the stabil izer preferably has hafnium (Hf). Also, as a stabilizer it preferably has aluminum (Al). Also, it preferably contains zirconium (Zr).

[0052] Also, as other stabilizers, it may contain any one or more of lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), hol mium (Ho), erbium (Er), thulium (Tm), ytterbium (Yb), lutetium (Lu) which are lanthanoids.

[0053] For example, as the oxide semiconductor, indium oxide, tin oxide, zinc oxide, binary metal oxides such as In-Zn system oxide, Sn-Zn system oxide, Al-Zn system oxide, Zn-Mg system oxide, Sn-Mg system oxide, In-Mg system oxide, In-Ga system oxide, ternary metal oxides such as In-Ga-Zn system oxide (also denoted as IGZO), In-Al-Zn system oxide, In-Sn-Zn system oxide, Sn-Ga-Zn system oxide, Al-Ga-Zn system acid oxide, Sn-Al-Zn system oxide, In-Hf-Zn system oxide, In-La-Zn system oxidation oxide, In-Pr-Zn system oxide, In-Nd-Zn system oxide, In-Sm-Zn system oxide , In-Eu-Zn system oxide, In-Gd-Zn system oxide, In-Tb-Zn system oxide, In-Dy-Zn system oxide, In-Ho-Zn system oxide, In-Er-Zn system oxide, I n-Tm-Zn-based oxides, In-Yb-Zn-based oxides, In-Lu-Zn-based oxides, and quaternary In-Sn-Ga-Zn-based oxides, In-Hf-Ga-Zn-based oxides, In-Al-Ga-Zn-based oxides, In-Sn-Al-Zn-based oxides, In-Sn- Hf-Zn-based oxides, and In-Hf-Al-Zn-based oxides, which are oxides of quaternary metals, can be used for the semiconductor film 103.

[0054] Note that, for example, the In-Ga-Zn-based oxide means an oxide containing In, Ga, and Zn, and the ratio of In, Ga, and Zn is not limited. Also, it may contain metal elements other than In, Ga, and Zn. The In-Ga-Zn-based oxide has a sufficiently high resistance in the absence of an electric field, can sufficiently reduce the off-current, and also has a high mobility.

[0055] For example, In-Ga-Zn-based oxides with an atomic ratio of In:Ga:Zn = 1:1:1 (= 1 / 3:1 / 3:1 / 3) or In:Ga:Zn = 2:2:1 (= 2 / 5:2 / 5:1 / 5), or oxides in the vicinity of their compositions can be used. Alternatively, In:Sn:Zn = 1:1:1 (= 1 / 3:1 / 3:1 / 3), In:Sn:Zn = 2:1:3 (= 1 / 3:1 / 6:1 / 2), or In:Sn:Zn = 2:1:5 (= 1 / 4:1 / 8:5 / 8) atomic ratio In-Sn-Zn-based oxides and oxides in the vicinity of their compositions may be used. For example, in In-Sn-Zn-based oxides, a relatively high mobility can be obtained relatively

[0056] easily. However, even in In-Ga-Zn-based oxides, the mobility can be increased by reducing the defect density in the bulk.

[0057] ​In addition, impurities such as moisture or hydrogen serving as an electron donor are reduced, and further, the oxide semiconductor (purified Oxide Semiconductor) purified by reducing oxygen deficiency is of the i-type (intrinsic semiconductor) or extremely close to the i-type. Therefore, a transistor using the above oxide semiconductor has the characteristic that the off-current is extremely low. In addition, the band gap of the oxide semiconductor is 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more. By using an oxide semiconductor film in which the concentration of impurities such as moisture or hydrogen is sufficiently reduced and the oxygen deficiency is reduced, the off-current of the transistor can be decreased. Specifically, the fact that the off-current of a transistor using a purified oxide semiconductor for the semiconductor film is low can be proven by various experiments. For example, even in an element with a channel width of 1×10

[0058] μm and a channel length of 10 μm, when the voltage (drain voltage) between the source terminal and the drain terminal is in the range of 1 V to 10 V, the off-current is below the measurement limit of the semiconductor parameter analyzer, that is, a characteristic of 1×10 6 A or less can be obtained. In this case, it can be seen that the off-current corresponding to the value obtained by dividing the off-current by the channel width of the transistor is 100 zA / μm or less. Further, a circuit is used in which a capacitor element and a transistor are connected and the charge flowing into or flowing out of the capacitor element is controlled by the transistor, and the off-current is measured. In this measurement, a purified oxide semiconductor film is used for the channel formation region of the above transistor, and the off-current is measured from the transition of the charge amount per unit time of the capacitor element. -13 That is, the off-current of the transistor can be measured. In this case, the off-current corresponding to the value obtained by dividing the off-current by the channel width of the transistor is 100 zA / μm or less. Further, a circuit is used in which a capacitor element and a transistor are connected and the charge flowing into or flowing out of the capacitor element is controlled by the transistor, and the off-current is measured. In this measurement, a purified oxide semiconductor film is used for the channel formation region of the above transistor, and the off-current is measured from the transition of the charge amount per unit time of the capacitor element. In the measurement, a purified oxide semiconductor film is used for the channel formation region of the transistor, and the off-current of the transistor is measured from the transition of the charge amount per unit time of the capacitor element. The off-current of the transistor was measured. As a result, it was found that when the voltage between the source terminal and the drain terminal of the transistor is 3 V, an even lower off-current of several tens of yA / μm can be obtained. Therefore, a transistor using a highly purified oxide semiconductor film in the channel formation region has an off-current that is significantly lower than that of a transistor using crystalline silicon.

[0059] Note that, unless otherwise specified, in this specification, the off-current in an n-channel transistor means the current flowing between the source terminal and the drain terminal when the potential of the gate electrode is 0 or less with respect to the potential of the source terminal in a state where the drain terminal is at a higher potential than the source terminal and the gate electrode. Alternatively, in this specification, the off-current in a p-channel transistor means the current flowing between the source terminal and the drain terminal when the potential of the gate electrode is 0 or more with respect to the potential of the source terminal in a state where the drain terminal is at a lower potential than the source terminal and the gate electrode.

[0060] Also, the source terminal of the transistor means a source region that is part of the active layer, or a source electrode connected to the active layer. Similarly, the drain terminal of the transistor means a drain region that is part of the active layer, or a drain electrode connected to the active layer.

[0061] The oxide semiconductor film can be in any state of single crystal, polycrystal (also referred to as polycrystalline), or amorphous. Preferably, the oxide semiconductor film is a CAAC-OS (C Axis Aligned Crystalline Oxide Semiconductor) film.

[0062] ​​​​​​​​​ The CAAC-OS film is neither a perfect single crystal nor a perfect amorphous material. The CAAC-OS film is an oxide semiconductor film having a crystal-amorphous mixed-phase structure with crystal parts and amorphous parts in the amorphous phase and exists. Note that the crystal part is often sized to fit within a cube with a side length of less than 100 nm . Also, in an observation image by a transmission electron microscope (TEM: Transmission Electro n Microscope), the boundary between the amorphous part and the crystal part contained in the CAAC-OS film is not clear. Also, grain boundaries (also referred to as grain boundaries) cannot be confirmed in the CAAC-OS film by TEM . Therefore, in the CAAC-OS film, a decrease in electron mobility due to grain boundaries is suppressed.

[0063] The crystal parts contained in the CAAC-OS film have their c-axes aligned in a direction parallel to the normal vector of the surface to be formed of the CAAC-OS film or the normal vector of the surface, and are triangular or hexagonal atomic arrangements when viewed from a direction perpendicular to the ab plane, and when viewed from a direction perpendicular to the c-axis, the metal atoms are layered or the metal atoms and oxygen atoms are arranged in layers. Note that between different crystal parts, the directions of the a-axis and b-axis may be different. In this specification, when simply described as perpendicular, a range of 8 5° or more and 95° or less is also included. Also, when simply described as parallel, a range of -5 ° or more and 5° or less is also included. ° or more and 5° or less is also included.

[0064] Note that in the CAAC-OS film, the distribution of the crystal parts may not be uniform. For example, in the process of forming the CAA C-OS film, when crystal growth is performed from the surface side of the oxide semiconductor film, the proportion of crystal parts may be higher near the surface than near the surface to be formed . Also, CA By adding impurities to the AC-OS film, the crystal part may be amorphized in the impurity-added region. become

[0065] The c-axis of the crystal part included in the CAAC-OS film aligns in a direction parallel to the normal vector of the formed surface of the CAAC-OS film or the normal vector of the surface. Therefore, depending on the shape of the CAAC-OS film (the cross-sectional shape of the formed surface or the cross-sectional shape of the surface), they may face different directions. In addition, the direction of the c-axis of the crystal part is parallel to the normal vector of the formed surface or the normal vector of the surface when the CAAC-OS film is formed. The crystal part is formed by film formation or by performing a crystallization process such as heat treatment after film formation. Further, the direction of the c-axis of the crystal part is parallel to the normal vector of the formed surface or the normal vector of the surface when the CAAC-OS film is formed. The crystal part is formed by film formation or by performing a crystallization process such as heat treatment after film formation. In addition, the direction of the c-axis of the crystal part is parallel to the normal vector of the formed surface or the normal vector of the surface when the CAAC-OS film is formed. The crystal part is formed by film formation or by performing a crystallization process such as heat treatment after film formation. In addition, the direction of the c-axis of the crystal part is parallel to the normal vector of the formed surface or the normal vector of the surface when the CAAC-OS film is formed. The crystal part is formed by film formation or by performing a crystallization process such as heat treatment after film formation. In addition, the direction of the c-axis of the crystal part is parallel to the normal vector of the formed surface or the normal vector of the surface when the CAAC-OS film is formed. The crystal part is formed by film formation or by performing a crystallization process such as heat treatment after film formation.

[0066] A transistor using a CAAC-OS film has little change in electrical characteristics due to irradiation with visible light or ultraviolet light. Therefore, the transistor has high reliability. Therefore, the transistor has high reliability.

[0067] The CAAC-OS film is formed, for example, by a sputtering method using a polycrystalline oxide semiconductor sputtering target. When ions collide with the sputtering target, the crystal region included in the sputtering target cleaves from the a-b plane and peels off as plate-shaped or pellet-shaped sputtering particles having a plane parallel to the a-b plane. In this case, the plate-shaped sputtering particles can form a CAAC-OS film by reaching the substrate while maintaining the crystal state. In this case, the plate-shaped sputtering particles can form a CAAC-OS film by reaching the substrate while maintaining the crystal state. In this case, the plate-shaped sputtering particles can form a CAAC-OS film by reaching the substrate while maintaining the crystal state. In this case, the plate-shaped sputtering particles can form a CAAC-OS film by reaching the substrate while maintaining the crystal state. In this case, the plate-shaped sputtering particles can form a CAAC-OS film by reaching the substrate while maintaining the crystal state.

[0068] In addition, in order to form a CAAC-OS film, it is preferable to apply the following conditions.

[0069] By reducing the incorporation of impurities during film formation, it is possible to suppress the breakdown of the crystal state due to impurities. For example, the impurity concentration (such as hydrogen, water, carbon dioxide, and nitrogen) present in the film formation chamber may be reduced. Also, the impurity concentration in the film formation gas may be reduced. Specifically, a film formation gas with a dew point of -80°C or lower, preferably -100°C or lower, is used.

[0070] Furthermore, by increasing the substrate heating temperature during film formation, migration of sputtering particles occurs after reaching the substrate. Specifically, the substrate heating temperature is set to 100°C or higher and 740°C or lower, preferably 200°C or higher and 500°C or lower for film formation. By increasing the substrate heating temperature during film formation, when flat sputtering particles reach the substrate, migration occurs on the substrate, and the flat surface of the sputtering particles adheres to the substrate.

[0071] Also, it is preferable to reduce plasma damage during film formation by increasing the oxygen ratio in the film formation gas and optimizing the power. The oxygen ratio in the film formation gas is 30 vol% or higher, preferably 100 vol% %.

[0072] As an example of a sputtering target, an In-Ga-Zn-based oxide target is shown below.

[0073] InO X powder, GaO Y powder, and ZnO Z powder are mixed in a predetermined molar ratio, and after pressure treatment and then heat-treated at a temperature of 1000°C or higher and 1500°C or lower to obtain a polycrystalline In-G a-Zn-based oxide target. Here, X, Y, and Z are arbitrary positive numbers. Here , the predetermined molar ratio is, for example, InO X powder, GaO YPowder and ZnO Z The powder is 2 :2:1, 8:4:3, 3:1:1, 1:1:1, 4:2:3 or 3:1:2. Note that the type of powder and the molar ratio of its mixture can be appropriately changed according to the sputtering target to be fabricated.

[0074] (Embodiment 2) Next, a specific configuration of the pixel portion of the liquid crystal display device according to an aspect of the present invention will be described with an example. will be described with an example.

[0075] Fig. 8(A) shows a configuration example of the pixel portion 10. In Fig. 8(A), the pixel portion 10 includes y scanning lines GL (GL1 to GLy) whose potentials are controlled by a scanning line driving circuit, and x signal lines SL (SL1 to SLx) whose potentials are controlled by a signal line driving circuit. .

[0076] The scanning lines GL are each connected to a plurality of pixels 11. Specifically, each scanning line GL is connected to x pixels 11 provided in any one row among the plurality of pixels 11 provided in a matrix.

[0077] The signal lines SL are connected to y pixels 11 provided in any one column among the plurality of pixels 11 provided in x columns and y rows in the pixel portion 10. pixels 11 provided in any one column.

[0078] In this specification, "connection" means electrical connection, corresponding to a state where current, voltage or potential can be supplied or transmitted. Therefore, the connected state does not necessarily mean a directly connected state, but means that current, voltage or potential can be supplied or transmitted through circuit elements such as wiring, resistors, diodes, and transistors. A state in which it is indirectly connected is also included in that scope.

[0079] Even when components that are independent on the circuit diagram are connected, actually for example, when a part of the wiring also functions as an electrode, one conductive film may have the functions of a plurality of components In this specification, connection includes such a case where one conductive film has the functions of a plurality of components within its scope.

[0080] FIG. 8(B) shows an example of the circuit diagram of pixel 11. The pixel 11 shown in FIG. 8(B) has a transistor 12 that functions as a switching element, and a liquid crystal element 13 whose transmittance is controlled according to the potential of an image signal given through the transistor 12, and a capacitor element 14. .

[0081] The liquid crystal element 13 has a pixel electrode, a common electrode, and a liquid crystal layer containing a liquid crystal to which a voltage is applied between the pixel electrode and the common electrode. And the capacitor element 14 has a function of holding the voltage between the pixel electrode and the common electrode that the liquid crystal element 13 has.

[0082] For the liquid crystal layer, for example, a liquid crystal material classified as a thermotropic liquid crystal or a lyotropic liquid crystal can be used. Alternatively, for the liquid crystal layer, for example, a liquid crystal material classified as a nematic liquid crystal, a smectic liquid crystal, a cholesteric liquid crystal, or a discotic liquid crystal can be used. Alternatively, for the liquid crystal layer, for example, a liquid crystal material classified as a ferroelectric liquid crystal or an antiferroelectric liquid crystal can be used. Alternatively, for the liquid crystal layer, for example, a main-chain type polymer liquid crystal, a side-chain type polymer liquid crystal, or a composite type polymer liquid crystal such as a polymer liquid crystal, or a low-molecular liquid crystal can be used. A liquid crystal material classified as a crystal can be used. Alternatively, in the liquid crystal layer, for example, a polymer dispersed liquid crystal (PDLC) classified liquid crystal material can be used. A liquid crystal material classified as a polymer dispersed liquid crystal (PDLC) can be used.

[0083] Also, a liquid crystal showing a blue phase without using an alignment film may be used in the liquid crystal layer. The blue phase is one of the liquid crystal phases, and it is a phase that appears immediately before the transition from the cholesteric liquid crystal phase to the isotropic phase when the temperature of the cholesteric liquid crystal is raised. Since the blue phase appears only in a narrow temperature range, a chiral agent or an ultraviolet curable resin is added to improve the temperature range. A liquid crystal composition containing a liquid crystal showing a blue phase and a chiral agent has a short response speed of 1 msec or less and is optically isotropic, so alignment treatment is unnecessary and the viewing angle dependence is small, which is preferable. When the cholesteric liquid crystal is heated, it is a phase that appears immediately before the transition from the cholesteric phase to the isotropic phase. Since the blue phase appears only in a narrow temperature range, a chiral agent or an ultraviolet curable resin is added to improve the temperature range. A liquid crystal composition containing a liquid crystal showing a blue phase and a chiral agent has a short response speed of 1 msec or less and is optically isotropic, so alignment treatment is unnecessary and the viewing angle dependence is small, which is preferable.

[0084] Also, as a driving method of the liquid crystal, there are TN (Twisted Nematic) mode, STN (Super Twisted Nematic) mode, VA (Vertical Alignment) mode, MVA (Multi-domain Vertical Alignment) mode, IPS (In-Plane Switching) mode, OCB (Optically Compensated Birefringence) mode, FFS (Fringe Field Switching) mode, blue phase mode, TBA (Transverse Bend Alignment) mode, VA-IPS mode, ECB (Electrically Controlled Birefringence) mode, FLC (Ferroelectric Liquid Crystal) mode, AFLC (AntiFerroelectric Liquid (Super Twisted Nematic) mode, VA (Vertical Alignment) mode, MVA (Multi-domain Vertical Alignment) mode, IPS (In-Plane Switching) mode, OCB (Optically Compensated Birefringence) mode, FFS (Fringe Field Switching) mode, blue phase mode, TBA (Transverse Bend Alignment) mode, VA-IPS mode, ECB (Electrically Controlled Birefringence) mode, FLC (Ferroelectric Liquid Crystal) mode, AFLC (AntiFerroelectric Liquid Alignment) mode, MVA (Multi-domain Vertical Alignment) mode, IPS (In-Plane Switching) mode, OCB (Optically Compensated Birefringence) mode, FFS (Fringe Field Switching) mode, blue phase mode, TBA (Transverse Bend Alignment) mode, VA-IPS mode, ECB (Electrically Controlled Birefringence) mode, FLC (Ferroelectric Liquid Crystal) mode, AFLC (AntiFerroelectric Liquid Alignment) mode, IPS (In-Plane Switching) mode, OCB (Optically Compensated Birefringence) mode, FFS (Fringe Field Switching) mode, blue phase mode, TBA (Transverse Bend Alignment) mode, VA-IPS mode, ECB (Electrically Controlled Birefringence) mode, FLC (Ferroelectric Liquid Crystal) mode, AFLC (AntiFerroelectric Liquid OCB (Optically Compensated Birefringence) mode, FFS (Fringe Field Switching) mode, blue phase mode, TBA (Transverse Bend Alignment) mode, VA-IPS mode, ECB (Electrically Controlled Birefringence) mode, FLC (Ferroelectric Liquid Crystal) mode, AFLC (AntiFerroelectric Liquid mode, FFS (Fringe Field Switching) mode, blue phase mode, TBA (Transverse Bend Alignment) mode, VA-IPS mode, ECB (Electrically Controlled Birefringence) mode, FLC (Ferroelectric Liquid Crystal) mode, AFLC (AntiFerroelectric Liquid mode, TBA (Transverse Bend Alignment) mode, VA-IPS mode, ECB (Electrically Controlled Birefringence) mode, FLC (Ferroelectric Liquid Crystal) mode, AFLC (AntiFerroelectric Liquid IPS mode, ECB (Electrically Controlled Birefringence) mode, FLC (Ferroelectric Liquid Crystal) mode, AFLC (AntiFerroelectric Liquid Birefringence) mode, FLC (Ferroelectric Liquid Crystal) mode, AFLC (AntiFerroelectric Liquid Crystal) mode, AFLC (AntiFerroelectric Liquid Crystal mode, PDLC (Polymer Dispersed Liquid d Crystal) mode, PNLC (Polymer Network Liquid d Crystal) mode, guest host mode, etc. can be applied.

[0085] The pixel 11 may include a transistor, a diode, a resistor, a capacitor, an inductor, etc., as required. The circuit may further include other circuit elements such as a capacitor.

[0086] Specifically, in FIG. 8B, the gate electrode of the transistor 12 is connected to the scanning line GL. The transistor 12 has one of its source terminal and drain terminal connected to a signal line SL. The other electrode of the capacitance element 14 is connected to a pixel electrode of the liquid crystal element 13. It is connected to the pixel electrode of the liquid crystal element 13, and the other electrode is given a specific potential. A specific potential is also applied to the common electrode of the liquid crystal element 13. The potential given to the common electrode is also given to the other electrode of the capacitor element 14. It may be common to the potential obtained.

[0087] In FIG. 8B, in the pixel 11, one transistor 12 is used as a switching element. However, the present invention is not limited to this configuration. A plurality of transistors may be used to function as switching elements. When the transistor functions as a single switching element, the transistors are connected in parallel. They may be connected in series or in a combination of series and parallel. It is okay if it is.

[0088] In this specification, the state in which transistors are connected in series means, for example, a state in which only one of the source terminal or the drain terminal of the first transistor is connected to only one of the source terminal or the drain terminal of the second transistor. Also, the state in which transistors are connected in parallel means a state in which one of the source terminal or the drain terminal of the first transistor is connected to one of the source terminal or the drain terminal of the second transistor, and the other of the source terminal or the drain terminal of the first transistor is connected to the other of the source terminal or the drain terminal of the second transistor. By including an oxide semiconductor in the channel formation region of transistor 12, a transistor 12 with an extremely small off-current and high breakdown voltage can be realized. And by using the transistor 12 having the above configuration as a switching element, compared with the case of using a transistor formed of a semiconductor material such as ordinary silicon or germanium, leakage of the charge accumulated in the liquid crystal element 13 can be prevented. By using a transistor 12 with an extremely small off-current, a long period during which the voltage applied to the liquid crystal element 13 is held can be ensured. Therefore, in the case where an image signal having the same image information is written to the pixel portion 10 over several consecutive frame periods, such as a still image, even if the driving frequency is lowered, in other words, the number of times of writing the image signal to the pixel portion 10 within a certain period is reduced, the display of the image can be maintained. For example, by using a transistor 12 that uses a highly purified oxide semiconductor as the active layer, an image

[0089]

[0090] ​​​​​​​​​​​​​​​The interval for writing the signal can be 10 seconds or more, preferably 30 seconds or more, and more preferably 1 minute or more. And the longer the interval for writing the image signal, the more the power consumption can be reduced.

[0091] Also, since the potential of the image signal can be held for a longer period, the image signal even without connecting the capacitive element 14 to the liquid crystal element 13 to hold the potential, the displayed image quality can be prevented from degrading. Therefore, by not providing the capacitive element 14 or by reducing the size of the capacitive element 14, the aperture ratio can be increased, so the power consumption of the liquid crystal display device can be reduced.

[0092] Also, by performing inversion driving to invert the polarity of the potential of the image signal with respect to the potential of the common electrode, deterioration of the liquid crystal material called image sticking can be prevented. However, when performing inversion driving, when the polarity of the image signal changes, the change in the potential applied to the signal line SL becomes large, so the potential difference between the source terminal and the drain terminal of the transistor 12 that functions as a switching element becomes large. Therefore, the transistor 12 is likely to suffer from characteristic deterioration such as a shift in the threshold voltage. Also, in order to maintain the voltage held in the liquid crystal element 13, even if the potential difference between the source terminal and the drain terminal is large, a low off-current is required. By using a semiconductor such as an oxide semiconductor having a larger bandgap and a lower intrinsic carrier density than silicon or germanium for the transistor 12, the breakdown voltage of the transistor 12 can be increased and the off-current can be made extremely small. Therefore, compared to ordinary silicon, germanium, etc., Compared with the case where a transistor formed of a semiconductor material is used, deterioration of the transistor 12 can be prevented, and the voltage held in the liquid crystal element 13 can be maintained.

[0093] Next, the layout of the pixel 11 shown in FIG. 8(B) will be described with reference to FIGS. 5 and 6. FIG. 5 is an example of a top view of the pixel 11. Further, FIG. 6(A) corresponds to an example of a cross-sectional view taken along the dashed-dotted line D1-D2 in the top view shown in FIG. 5. FIG. 6(B) corresponds to an example of a cross-sectional view taken along the dashed-dotted line D3-D4 in the top view shown in FIG. 5. However, in FIG. 5, in order to clearly show the layout of the pixel 11, various insulating films are omitted, and a top view of the pixel 11 is shown. Further, in FIG. 5, in order to clearly show the layout of various semiconductor elements included in the pixel 11, the liquid crystal layer and the common electrode included in the liquid crystal element 13 are omitted, and a top view of the pixel 11 is shown. In the pixel 11 shown in FIGS. 5 and 6, the transistor 12 includes a substrate 20 having an insulating surface

[0094] 2, a conductive film 203 that functions as a gate electrode, a gate insulating film 20 4 on the conductive film 203, a semiconductor film 20 5 located on the gate insulating film 204 at a position overlapping the conductive film 203, an insulating film 20 6 located on the semiconductor film 205 at a position overlapping the conductive film 203 and functioning as a channel protection film, and a conductive film 207 and a conductive film 208 that function as a source terminal or a drain terminal and are located on the semiconductor film 2 05. The conductive film 203 also functions as a scanning line that applies a potential to the gate electrode of the transistor 12.

[0095] Further, the conductive film 207 also functions as a signal line that applies the potential of the image signal to the pixel 11.

[0096] ​The capacitive element 14 includes a conductive film 210 on a substrate 202 having an insulating surface, and a gate insulating film 204 and a semiconductor film 205, and a conductive film 211 positioned on the gate insulating film 204 and the semiconductor film 205 at a position overlapping the conductive film 210.

[0097] An insulating film 212 is provided on the conductive film 207, the conductive film 208, and the conductive film 211. Openings 213 and 214 are provided in the insulating film 212, the semiconductor film 205, and the gate insulating film 204.

[0098] The opening 213 is provided between the conductive film 207 or the conductive film 208 and the conductive film 211. A part of the region where the opening 213 is formed overlaps a part of the region where the conductive film 208 is formed and a part of the region where the conductive film 210 is formed. In the opening 213, the insulating film 212 on the conductive film 208, the insulating film 212 on the conductive film 210, the semiconductor film 205, and the gate insulating film 204 are removed, and the conductive film 208 and the conductive film 21 0 are electrically connected by a conductive film 215 on the conductive film 208 and the conductive film 210.

[0099] In the opening 214, the insulating film 212, the semiconductor film 205, and the gate insulating film 204 on the conductive film 210 are removed, and the conductive film 210 is connected to a conductive film 2 16 that functions as a pixel electrode. Note that the conductive film 216 is provided not only on the conductive film 210 in the opening 214 but also on the insulating film 212.

[0100] In the opening 214, the insulating film 212, the semiconductor film 205, and the gate insulating film 204 on the conductive film 203 are also removed. With the above configuration, the conductive film 203, the gate insulating film 20 ​ 4. The parasitic capacitance formed in the region where the semiconductor film 205 overlaps can be reduced. .

[0101] Also, an insulating film 217 that functions as a spacer is provided at a position overlapping the conductive film 211 on the insulating film 212.

[0102] In FIGS. 5 and 6, a part of the region where the opening 213 is formed overlaps a part of the region where the conductive film 208 is formed and a part of the region where the conductive film 210 is formed. This case is exemplified. In this case, the connection between the conductive film 208 and the conductive film 215 and the connection between the conductive film 210 and the conductive film 215 are both performed at the opening 213. However in one aspect of the present invention, the connection between the conductive film 208 and the conductive film 215 and the connection between the conductive film 210 and the conductive film 215 may be performed at different openings.

[0103] FIG. 7 shows an example of a cross-sectional view of the pixel 11 at the connection points between the conductive film 208 and the conductive film 210 and the conductive film 215. In FIG. 7, the conductive film 208 and the conductive film 215 are connected at the opening 213a provided in the insulating film 212. Also, the conductive film 210 and the conductive film 215 are connected at the opening 213b provided in the insulating film 212, the semiconductor film 205, and the gate insulating film 204.

[0104] However, when the connection between the conductive film 208 and the conductive film 215 and the connection between the conductive film 210 and the conductive film 215 are both performed at the opening 213 as in FIGS. 5 and 6, there is no need to secure a region for forming a plurality of openings, so high definition of the pixel portion 10 can be realized.

[0105] In FIGS. 5 and 6, the layout of pixel 11 is shown when a liquid crystal layer and a common electrode are sequentially provided on the conductive film 216 that functions as a pixel electrode. However, the liquid crystal display device according to one aspect of the present invention is not limited to this configuration. Pixel 11 may have a structure in which a liquid crystal layer is provided on the pixel electrode and the common electrode, such as an IPS-type liquid crystal element or a liquid crystal element using a blue phase.

[0106] This embodiment can be implemented in appropriate combination with other embodiments.

[0107] (Embodiment 3) In this embodiment, taking the pixel 11 shown in FIGS. 5 and 6 as an example, a method for manufacturing a liquid crystal display device according to one aspect of the present invention will be described.

[0108] First, as shown in FIG. 9(A), a conductive film 203 that functions as a gate electrode and a conductive film 210 that functions as an electrode of the capacitive element 14 are formed on a substrate 202 having an insulating surface.

[0109] There is no major limitation on the substrate that can be used as the substrate 202 having an insulating surface, but at least it is necessary to have heat resistance sufficient to withstand subsequent heat treatment. For example, a glass substrate manufactured by the fusion method or the float method can be used. When the temperature of the subsequent heat treatment is high, a glass substrate having a strain point of 730 ° C. or higher is preferably used. In addition, for the glass substrate, for example, glass materials such as aluminosilicate glass, aluminoborosilicate glass, and barium borosilicate glass are used.

[0110] Note that instead of the above glass substrate, an insulating substrate such as a ceramic substrate, a quartz substrate, or a sapphire substrate can be used. ​​​​​​​​​​​A substrate made of an insulating body may be used. Alternatively, crystallized glass or the like can be used. A substrate having an insulating film provided on the surface of a metal substrate such as a stainless alloy may also be applied. However, when the liquid crystal display device is a transmissive type or a transflective type, a substrate having light-transmitting properties is used for the substrate 202. For the conductive films 203 and 210, materials such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, scandium, niobium and other metal materials, conductive films using alloy materials mainly composed of these metal materials, or nitrides of these metals can be used either singly or in a laminated manner. If it can withstand the temperature of the heat treatment performed in a later process, aluminum or copper can also be used as the above metal materials. Aluminum or copper is preferably used in combination with a high melting point metal material in order to avoid problems of heat resistance and corrosiveness. As the high melting point metal material, molybdenum, titanium, chromium, tantalum, tungsten, neodymium, scandium, etc. can be used. For example, as the conductive films 203 and 210 having a two-layer structure, a two-layer structure in which a copper film is laminated on a titanium film, a two-layer structure in which a molybdenum film is laminated on an aluminum film, a two-layer structure in which a molybdenum film is laminated on a copper film, a two-layer structure in which a titanium nitride film or a tantalum nitride film is laminated on a copper film, or a two-layer structure in which a titanium nitride film and a molybdenum film are laminated is preferred. As the conductive films 203 and 210 having a three-layer structure, for example, a three-layer structure in which a titanium nitride film, a copper film, and a tungsten film are laminated is preferred. .

[0111] The materials of the conductive films 203 and 210 are metal materials such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, scandium, niobium, conductive films using alloy materials mainly composed of these metal materials, or nitrides of these metals, which can be used either singly or in a laminated manner. If it can withstand the temperature of the heat treatment performed in a later process, aluminum or copper can also be used as the above metal materials. Aluminum or copper is preferably used in combination with a high melting point metal material in order to avoid problems of heat resistance and corrosiveness. As the high melting point metal material, molybdenum, titanium, chromium, tantalum, tungsten, neodymium, scandium, etc. can be used. For the conductive films 203 and 210, materials such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, scandium, niobium and other metal materials, conductive films using alloy materials mainly composed of these metal materials, or nitrides of these metals can be used either singly or in a laminated manner. If it can withstand the temperature of the heat treatment performed in a later process, aluminum or copper can also be used as the above metal materials. Aluminum or copper is preferably used in combination with a high melting point metal material in order to avoid problems of heat resistance and corrosiveness. As the high melting point metal material, molybdenum, titanium, chromium, tantalum, tungsten, neodymium, scandium, etc. can be used. For the conductive films 203 and 210, materials such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, scandium, niobium and other metal materials, conductive films using alloy materials mainly composed of these metal materials, or nitrides of these metals can be used either singly or in a laminated manner. If it can withstand the temperature of the heat treatment performed in a later process, aluminum or copper can also be used as the above metal materials. Aluminum or copper is preferably used in combination with a high melting point metal material in order to avoid problems of heat resistance and corrosiveness. As the high melting point metal material, molybdenum, titanium, chromium, tantalum, tungsten, neodymium, scandium, etc. can be used. For the conductive films 203 and 210, materials such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, scandium, niobium and other metal materials, conductive films using alloy materials mainly composed of these metal materials, or nitrides of these metals can be used either singly or in a laminated manner. If it can withstand the temperature of the heat treatment performed in a later process, aluminum or copper can also be used as the above metal materials. Aluminum or copper is preferably used in combination with a high melting point metal material in order to avoid problems of heat resistance and corrosiveness. As the high melting point metal material, molybdenum, titanium, chromium, tantalum, tungsten, neodymium, scandium, etc. can be used. For the conductive films 203 and 210, materials such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, scandium, niobium and other metal materials, conductive films using alloy materials mainly composed of these metal materials, or nitrides of these metals can be used either singly or in a laminated manner. If it can withstand the temperature of the heat treatment performed in a later process, aluminum or copper can also be used as the above metal materials. Aluminum or copper is preferably used in combination with a high melting point metal material in order to avoid problems of heat resistance and corrosiveness. As the high melting point metal material, molybdenum, titanium, chromium, tantalum, tungsten, neodymium, scandium, etc. can be used. For the conductive films 203 and 210, materials such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, scandium, niobium and other metal materials, conductive films using alloy materials mainly composed of these metal materials, or nitrides of these metals can be used either singly or in a laminated manner. If it can withstand the temperature of the heat treatment performed in a later process, aluminum or copper can also be used as the above metal materials. Aluminum or copper is preferably used in combination with a high melting point metal material in order to avoid problems of heat resistance and corrosiveness. As the high melting point metal material, molybdenum, titanium, chromium, tantalum, tungsten, neodymium, scandium, etc. can be used. For the conductive films 203 and 210, materials such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, scandium, niobium and other metal materials, conductive films using alloy materials mainly composed of these metal materials, or nitrides of these metals can be used either singly or in a laminated manner. If it can withstand the temperature of the heat treatment performed in a later process, aluminum or copper can also be used as the above metal materials. Aluminum or copper is preferably used in combination with a high melting point metal material in order to avoid problems of heat resistance and corrosiveness. As the high melting point metal material, molybdenum, titanium, chromium, tantalum, tungsten, neodymium, scandium, etc. can be used. For the conductive films 203 and 210, materials such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, scandium, niobium and other metal materials, conductive films using alloy materials mainly composed of these metal materials, or nitrides of these metals can be used either singly or in a laminated manner. If it can withstand the temperature of the heat treatment performed in a later process, aluminum or copper can also be used as the above metal materials. Aluminum or copper is preferably used in combination with a high melting point metal material in order to avoid problems of heat resistance and corrosiveness. As the high melting point metal material, molybdenum, titanium, chromium, tantalum, tungsten, neodymium, scandium, etc. can be used.

[0112] For example, as the conductive films 203 and 210 having a two-layer structure, a two-layer structure in which a copper film is laminated on a titanium film, a two-layer structure in which a molybdenum film is laminated on an aluminum film, a two-layer structure in which a molybdenum film is laminated on a copper film, a two-layer structure in which a titanium nitride film or a tantalum nitride film is laminated on a copper film, or a two-layer structure in which a titanium nitride film and a molybdenum film are laminated is preferred. As the conductive films 203 and 210 having a three-layer structure, for example, a three-layer structure in which a titanium nitride film, a copper film, and a tungsten film are laminated is preferred. For example, as the conductive films 203 and 210 having a two-layer structure, a two-layer structure in which a copper film is laminated on a titanium film, a two-layer structure in which a molybdenum film is laminated on an aluminum film, a two-layer structure in which a molybdenum film is laminated on a copper film, a two-layer structure in which a titanium nitride film or a tantalum nitride film is laminated on a copper film, or a two-layer structure in which a titanium nitride film and a molybdenum film are laminated is preferred. As the conductive films 203 and 210 having a three-layer structure, for example, a three-layer structure in which a titanium nitride film, a copper film, and a tungsten film are laminated is preferred. For example, as the conductive films 203 and 210 having a two-layer structure, a two-layer structure in which a copper film is laminated on a titanium film, a two-layer structure in which a molybdenum film is laminated on an aluminum film, a two-layer structure in which a molybdenum film is laminated on a copper film, a two-layer structure in which a titanium nitride film or a tantalum nitride film is laminated on a copper film, or a two-layer structure in which a titanium nitride film and a molybdenum film are laminated is preferred. As the conductive films 203 and 210 having a three-layer structure, for example, a three-layer structure in which a titanium nitride film, a copper film, and a tungsten film are laminated is preferred. For example, as the conductive films 203 and 210 having a two-layer structure, a two-layer structure in which a copper film is laminated on a titanium film, a two-layer structure in which a molybdenum film is laminated on an aluminum film, a two-layer structure in which a molybdenum film is laminated on a copper film, a two-layer structure in which a titanium nitride film or a tantalum nitride film is laminated on a copper film, or a two-layer structure in which a titanium nitride film and a molybdenum film are laminated is preferred. As the conductive films 203 and 210 having a three-layer structure, for example, a three-layer structure in which a titanium nitride film, a copper film, and a tungsten film are laminated is preferred. For example, as the conductive films 203 and 210 having a two-layer structure, a two-layer structure in which a copper film is laminated on a titanium film, a two-layer structure in which a molybdenum film is laminated on an aluminum film, a two-layer structure in which a molybdenum film is laminated on a copper film, a two-layer structure in which a titanium nitride film or a tantalum nitride film is laminated on a copper film, or a two-layer structure in which a titanium nitride film and a molybdenum film are laminated is preferred. As the conductive films 203 and 210 having a three-layer structure, for example, a three-layer structure in which a titanium nitride film, a copper film, and a tungsten film are laminated is preferred. For example, as the conductive films 203 and 210 having a two-layer structure, a two-layer structure in which a copper film is laminated on a titanium film, a two-layer structure in which a molybdenum film is laminated on an aluminum film, a two-layer structure in which a molybdenum film is laminated on a copper film, a two-layer structure in which a titanium nitride film or a tantalum nitride film is laminated on a copper film, or a two-layer structure in which a titanium nitride film and a molybdenum film are laminated is preferred. As the conductive films 203 and 210 having a three-layer structure, for example, a three-layer structure in which a titanium nitride film, a copper film, and a tungsten film are laminated is preferred. .

[0113] In addition, the conductive film 203 and the conductive film 210 are formed of indium oxide, indium oxide-tin oxide, or oxide. Indium zinc oxide, zinc oxide, zinc aluminum oxide, zinc aluminum oxynitride, Alternatively, a metal oxide having light transmitting properties, such as zinc gallium oxide, can be used.

[0114] The thickness of the conductive film 203 and the conductive film 210 is 10 nm to 400 nm, preferably 100 nm to In this embodiment, a tungsten film having a thickness of 200 nm is formed by sputtering. After the film is formed, the tungsten film is etched by photolithography. The conductive film 203 and the conductive film 210 are formed by processing (patterning) into a desired shape. In addition, when the conductive film 203 and the conductive film 210 have tapered ends, This is preferable because it improves the coverage of the gate insulating film 204 to be laminated. The resist mask may be formed by an ink-jet method. Since no photomask is used, manufacturing costs can be reduced.

[0115] In this embodiment, the conductive film 203 and the conductive film 210 are formed directly on the substrate 202. In this example, an insulating film is formed on the substrate 202 to function as a base film. The conductive film 203 and the conductive film 210 may be formed over the base film. Silicon oxide film, silicon oxynitride film, silicon nitride film, silicon nitride oxide film, aluminum nitride film, Either one of the aluminum oxide nitride films may be used as a single layer or multiple layers may be used as a laminate. In particular, when an insulating film with high barrier properties, such as a silicon nitride film or a silicon oxynitride film, is used as the base film, , an aluminum nitride film, an aluminum oxide film, an aluminum nitride oxide film, or the like is used. By doing so, it is possible to prevent impurities such as moisture, impurities in the atmosphere such as hydrogen, or impurities such as alkali metals and heavy metals contained in the substrate 202 from entering the semiconductor film 205, the gate insulating film 2 04, or the interface between the semiconductor film 205 and other insulating films and the vicinity thereof. This can be achieved.

[0116] In addition, in this specification, an oxynitride means a substance having a higher oxygen content than nitrogen in its composition, and a nitride oxide means a substance having a higher nitrogen content than oxygen in its composition. means a substance.

[0117] Note that FIG. 11 is a top view of the liquid crystal display device at the time when the above-described process is completed. The cross-sectional view taken along the dashed-dotted line A1 - A2 in FIG. 11 corresponds to FIG. 9(A).

[0118] Next, as shown in FIG. 9(B), a gate insulating film 2 04 is formed on the conductive film 203 and the conductive film 210. The gate insulating film 204 can be formed by using the plasma CVD method, the sputtering method, or the like, and forming a single layer or a laminate of a silicon oxide film, a silicon nitride film, an oxynitride film, a silicon oxynitride film, an aluminum oxide film, an aluminum nitride film, an aluminum oxynitride film, a silicon aluminum oxynitride film, a hafnium oxide film, a yttrium oxide film, a gallium oxide film, a lanthanum oxide film, or a tantalum oxide film. It is desirable that the gate insulating film 204 contains as few impurities such as moisture and hydrogen as possible.

[0119] The gate insulating film 204 may be composed of a single insulating film, or may be composed of a plurality of insulating films laminated together. In any case, the gate insulating film 204 is formed so that an insulating film containing an amount of oxygen exceeding the stoichiometric composition is in contact with the semiconductor film 205 to be formed later. ​​​​​​​ It is desirable to form. With the above configuration, oxygen can be supplied from the gate insulating film 204 to the semiconductor film 205, so that a transistor 12 having good electrical characteristics can be obtained.

[0120] Also, when forming the gate insulating film 204 having a structure in which a highly barrier insulating film and an insulating film containing oxygen are laminated, the highly barrier insulating film is preferably provided between the insulating film containing oxygen and the conductive films 203 and 210. By using a highly barrier insulating film, impurities in the atmosphere such as moisture or hydrogen, or impurities such as alkali metals and heavy metals contained in the substrate 202 can be prevented from entering the semiconductor film 205, the gate insulating film 204, or the interface between the semiconductor film 205 and other insulating films and the vicinity thereof. Examples of the highly barrier insulating film include a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, an aluminum oxide film, or an aluminum oxynitride film.

[0121] The film thickness of the gate insulating film 204 may be appropriately set according to the characteristics required for the transistor. For example, it is 1 nm or more and 800 nm or less, preferably 200 nm or more and 500 nm or less. By forming the gate insulating film 204 thick, the breakdown voltage of the transistor 12 can be improved. In this embodiment, a silicon oxynitride film having a film thickness of 100 nm formed by the plasma CVD method is used as the gate insulating film 204.

[0122] Next, as shown in FIG. 9(B), on the gate insulating film 204, the film thickness is 2 nm or more and 200 nm or less, preferably 3 nm or more and 50 nm or less, more preferably 3 nm or more and 20 nm ​​​​​​​​​​​​​​Form the following semiconductor film 205. The semiconductor film 205 uses an oxide semiconductor as a target and is formed by a sputtering method. Also, the semiconductor film 205 is formed in a rare gas (e.g., argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere of a rare gas (e.g., argon) and oxygen by a sputtering method.

[0123] Note that before forming the oxide semiconductor film by a sputtering method, reverse sputtering is performed by introducing argon gas to generate plasma to remove dust adhering to the surface of the gate insulating film 204. Reverse sputtering is a method of applying a voltage to the substrate side using an RF power source in an argon atmosphere without applying a voltage to the target side to form plasma near the substrate and modify the surface . Note that nitrogen, helium, etc. may be used instead of the argon atmosphere. Also, it may be performed in an atmosphere in which oxygen, nitrous oxide, etc. are added to the argon atmosphere. Also, it may be performed in an atmosphere in which chlorine, carbon tetrafluoride, etc. are added to the argon atmosphere.

[0124] As the oxide semiconductor used for the semiconductor film 205, as described above, indium oxide, zinc oxide, tin oxide, In-Zn-based oxides which are binary metal oxides, Sn-Zn-based oxides, Al-Zn-based oxides, Zn-Mg-based oxides, Sn-Mg-based oxides, In-Mg-based oxides, In-Ga-based oxides, In-Ga-Zn-based oxides (also denoted as IGZO) which are ternary metal oxides, In-Al-Zn-based oxides, In-Sn-Zn-based oxides, Sn-Ga-Zn-based oxides, Al-Ga-Zn-based oxides, Sn-Al-Zn-based oxides, In-Hf-Zn-based oxides, In-La-Zn-based oxides, In-Pr-Zn-based oxides, In-Nd-Zn-based oxides ​​​​​Oxides, In-Sm-Zn-based oxides, In-Eu-Zn-based oxides, In-Gd-Zn-based oxides Oxides, In-Tb-Zn-based oxides, In-Dy-Zn-based oxides, In-Ho-Zn-based oxides Oxides, In-Er-Zn-based oxides, In-Tm-Zn-based oxides, In-Yb-Zn-based oxides In-Lu-Zn-based oxides, In-Sn-Ga-Zn-based oxides which are oxides of quaternary metals Oxides, In-Hf-Ga-Zn-based oxides, In-Al-Ga-Zn-based oxides, In-Sn-A l-Zn-based oxides, In-Sn-Hf-Zn-based oxides, In-Hf-Al-Zn-based oxides And the like can be mentioned.

[0125] Incidentally, for example, the semiconductor film 205 can be formed by a sputtering method using a target containing In (indium), Ga (gallium), and Zn ( zinc). When forming the In-Ga- Zn-based semiconductor film 205 by sputtering, preferably, the atomic ratio is I n:Ga:Zn = 1:1:1, 4:2:3, 3:1:2, 1:1:2, 2:1:3, or A target of an In-Ga-Zn-based oxide represented by 3:1:4 is used. By forming an oxide semiconductor film using a target of an In-Ga-Zn-based oxide having the above-mentioned atomic number ratio, polycrystals or CAACs are likely to be formed. Further, the filling rate of the target containing In, Ga, and Zn is 90% or more and 100% or less, preferably 95% or more and less than 100% is. By using a target with a high filling rate, the formed oxide semiconductor film becomes a dense film.

[0126] Incidentally, when using an In-Zn-based oxide as the oxide semiconductor, the composition of the target to be used is , in terms of atomic ratio, In:Zn = 50:1 to 1:2 (when converted to molar ratio, In 2 O 3 ​​​:Zn O = 25:1 to 1:4), preferably In:Zn = 20:1 to 1:1 (converted to molar ratio to In 2 O 3 :ZnO = 10:1 to 1:2), more preferably In:Zn = 1.5: 1 to 15:1 (converted to molar ratio to In 2 O 3 :ZnO = 3:4 to 15:2). For example, the target used for forming the semiconductor film 205 which is an In-Zn-based oxide has an atomic number ratio of In:Zn:O = X:Y:Z, then Z > 1.5X + Y. By keeping the ratio of Zn within the above range mobility improvement can be realized.

[0127] Also, when using a material of In-Sn-Zn-based oxide as the oxide semiconductor, the composition of the target used may be such that the atomic number ratio of In:Sn:Zn is 1:2:2, 2:1:3, 1:1:1, or 20:45:35.

[0128] In this embodiment, a substrate is held in a processing chamber maintained in a reduced pressure state, and while removing the residual moisture in the processing chamber, a sputtering gas from which hydrogen and moisture have been removed is introduced, and an oxide semiconductor film is formed on the substrate 202 using the above target. To remove the residual moisture in the processing chamber, it is preferable to use an adsorption type vacuum pump. For example, it is preferable to use a cryopump, an ion pump, or a titanium sublimation pump. Also, as the exhaust means, a turbo pump with a cold trap added thereto may be used. When exhausting the processing chamber using a cryopump, for example, compounds containing hydrogen atoms such as hydrogen atoms, water (H O), etc. (more preferably compounds containing carbon atoms as well) are exhausted, so the oxide semiconductor formed in the processing chamber 2 ​​The concentration of impurities contained in the film can be reduced.

[0129] In addition, three methods are listed for forming the semiconductor film 205 composed of CAAC-OS. The first method is to form the semiconductor film 205 with a film formation temperature of 200°C or higher and 450°C or lower. The second method is to form the semiconductor film 205 with a thin film thickness and then perform a heat treatment at 200°C or higher and 700°C or lower. The third method is to form the first layer of the oxide semiconductor film thinly, then perform a heat treatment at 200°C or higher and 700°C or lower, and further form the second layer of the oxide semiconductor film, thereby forming the semiconductor film 205. In this embodiment, the distance between the substrate 202 and the target is 100 mm, the pressure is 0.4 Pa, the direct current (DC) power supply is 0.5 kW, the substrate temperature is 250°C, and the semiconductor film 205 with a film thickness of 25 nm containing an In-Ga-Zn-based oxide semiconductor is formed in an atmosphere where the flow rates of argon and oxygen are 30 sccm and 15 sccm, respectively. In order to minimize the inclusion of hydrogen, hydroxyl groups, and moisture in the semiconductor film 205, it is preferable to preheat the substrate 202 on which the gate insulating film 204 has been formed up to the preheating chamber of the sputtering apparatus as a pretreatment before formation, and desorb and exhaust impurities such as moisture or hydrogen adsorbed on the substrate 202. The preheating temperature is 100°C or higher and 400°C or lower, preferably 150°C or higher and 300°C or lower.

[0130] In this embodiment, the distance between the substrate 202 and the target is 100 mm, the pressure is 0.4 Pa, the direct current (DC) power supply is 0.5 kW, the substrate temperature is 250°C, and the semiconductor film 205 with a film thickness of 25 nm containing an In-Ga-Zn-based oxide semiconductor is formed in an atmosphere where the flow rates of argon and oxygen are 30 sccm and 15 sccm, respectively. The semiconductor film 205 with a thickness of 25 nm is formed.

[0131] In addition, in order to minimize the inclusion of hydrogen, hydroxyl groups, and moisture in the semiconductor film 205, as a pretreatment before formation, the substrate 202 on which the gate insulating film 204 has been formed up to the preheating chamber of the sputtering apparatus is preheated, and impurities such as moisture or hydrogen adsorbed on the substrate 202 are desorbed and exhausted. It is preferable. The preheating temperature is 100°C or higher and 400°C or lower, preferably 150°C or higher and 300°C or lower. In addition, the semiconductor film 205 formed by sputtering or the like may contain a large amount of moisture or hydrogen (including hydroxyl groups) as impurities. Moisture or hydrogen easily forms donor levels.

[0132] In addition, the semiconductor film 205 formed by sputtering or the like may contain a large amount of moisture or hydrogen (including hydroxyl groups) as impurities. Moisture or hydrogen easily forms donor levels. Therefore, for the oxide semiconductor, it is an impurity. Thus, in one aspect of the present invention, after forming the semiconductor film 205, in order to reduce impurities such as moisture or hydrogen in the semiconductor film 205 (dehydration or dehydrogenation), the semiconductor film 205 is heat-treated in an inert gas atmosphere such as nitrogen or a rare gas under a reduced-pressure atmosphere.

[0133] By subjecting the semiconductor film 205 to heat treatment, moisture or hydrogen in the semiconductor film 205 can be desorbed. Specifically, heat treatment may be performed at a temperature of 250°C or higher and 750°C or lower, preferably 400°C or higher and lower than the distortion point of the substrate. If the RTA method is used for the heat treatment, dehydration or dehydrogenation can be performed in a short time, so that treatment can be performed even at a temperature exceeding the distortion point of the glass substrate. In this embodiment, heat treatment is performed at 450°C for about 1 hour in an ultra-dry air atmosphere.

[0134] Note that the heat treatment apparatus is not limited to an electric furnace, and may be provided with an apparatus that heats an object to be processed by heat conduction or heat radiation from a heating element such as a resistance heating element. For example, RTA (Rapid Thermal Anneal) apparatuses such as GRTA (Gas Rapid Thermal Anneal) apparatuses and LRTA (Lamp Rapid Thermal Anneal) apparatuses can be used. The LRTA apparatus is an apparatus that heats an object to be processed by radiation of light (electromagnetic waves) emitted from lamps such as halogen lamps, metal halide lamps, xenon arc lamps, carbon arc lamps, high-pressure sodium lamps, and high-pressure mercury lamps. The GRTA apparatus is an apparatus that performs heat treatment using a high-temperature gas. The gas may be a rare gas such as argon or an inert gas such as nitrogen that does not react with the object to be processed by heat treatment. The body is used.

[0135] In the heat treatment, it is preferable that nitrogen or a noble gas such as helium, neon, or argon does not contain moisture or water element, etc. Alternatively, the purity of nitrogen or a noble gas such as helium , neon, or argon introduced into the heat treatment apparatus is 6N (99.9999%) or more, preferably 7 N (99.99999%) or more (that is, the impurity concentration is 1 ppm or less, preferably 0.1 p pm or less).

[0136] By the above steps, the concentration of moisture or hydrogen in the semiconductor film 205 can be reduced. In addition, in the semiconductor film 205, moisture or hydrogen is removed by the above heat treatment, and there is a possibility that oxygen vacancies due to oxygen desorption increase. Therefore, after the above heat treatment, it is desirable to perform a process of supplying oxygen to the semiconductor film 205 to reduce oxygen vacancies. 205 to reduce oxygen vacancies. 205 to reduce oxygen vacancies.

[0137] By using the semiconductor film 205 that has been purified by reducing the concentration of moisture or hydrogen and further reducing oxygen vacancies, a transistor 12 with high breakdown voltage and extremely small off-current can be fabricated.

[0138] For example, by performing heat treatment in an oxygen-containing gas atmosphere, oxygen can be supplied to the semiconductor film 205. The heat treatment for supplying oxygen may be performed under the same conditions as the heat treatment for reducing the concentration of moisture or hydrogen described above. However, the heat treatment for supplying oxygen is oxygen gas or ultra-dry air (when measured using a dew point meter of the CRDS (cavity ring-down laser spectroscopy) method, the moisture content is 20 ppm (dew point conversion -55 °C ​​​​​)Hereinafter, it is preferably carried out in an atmosphere such as air of 1 ppm or less, preferably 10 ppb or less. It is carried out.

[0139] The gas containing the above oxygen preferably has low concentrations of water, hydrogen, etc. Specifically, the impurity concentration contained in the gas containing oxygen is set to 1 ppm or less, preferably 0.1 ppm or less. It is preferable to do so. It is preferable.

[0140] Alternatively, oxygen can be supplied to the semiconductor film 205 by using an ion implantation method, an ion doping method, a plasma immersion ion implantation method, a plasma treatment, etc. After supplying oxygen to the semiconductor film 205 using the above method, if the crystal part contained in the semiconductor film 205 is damaged, heat treatment may be performed to repair the damaged crystal part. It is possible. After that, when the crystal part contained in the semiconductor film 205 is damaged, heat treatment may be performed to repair the damaged crystal part. It is okay. It is good.

[0141] A resist mask for forming the semiconductor film 205 may be formed by an inkjet method. When forming a resist mask by an inkjet method, since a photomask is not used, the manufacturing cost can be reduced. It can be reduced.

[0142] Next, as shown in FIG. 9(C), after forming an insulating film on the semiconductor film 205, an island-shaped insulating film 206 that functions as a channel protection film is formed by etching using a photolithography method to a desired shape. The insulating film 206 is provided at a position overlapping the conductive film 203 on the semiconductor film 205. It is formed. The insulating film 206 is provided at a position overlapping the conductive film 203 on the semiconductor film 205. It is provided.

[0143] The film thickness of the insulating film 206 is 50 nm or more and 600 nm or less, preferably 100 nm or more and 400 nm or less. And the insulating film 206 has the same structure and material as the gate insulating film 204. It is used. It can be formed by... And the insulating film 206, similar to the gate insulating film 204, desirably contains as few impurities such as moisture and hydrogen as possible, and desirably contains oxygen in an amount exceeding the stoichiometric composition. With the above configuration, the concentration of impurities such as moisture and hydrogen in the semiconductor film 205 can be kept low, and oxygen can be supplied from the insulating film 206 to the semiconductor film 205, so that a transistor 12 having good electrical characteristics can be obtained.

[0144] In this embodiment, a silicon oxynitride film with a thickness of 300 nm formed by the plasma CVD method is used as the insulating film 206.

[0145] Note that as the insulating film 206, a metal oxide containing at least one of In or Zn, and containing Ti, Zr, Hf, Ge, Ce, etc., a metal oxide with higher insulation than the semiconductor film 205 may be used.

[0146] For example, an In-M 1 -M 2 -Zn-based oxide may be used for the insulating film 206. However, the element M is a trivalent element among the elements included in Group 3A, Group 3B, and Group 4A. The element 1 M is a tetravalent element among the elements included in Group 4A and Group 4B. Specifically, when Ga is used for the element M 2 in the In-M 1 -M 1 -M 2 -Zn-based oxide, a part of the trivalent Ga will be replaced by a tetravalent element. Since the tetravalent element has one more single bond than the trivalent element, by replacing a part of the trivalent element with a tetravalent element, in the In-M -M 1 -M 2 -Zn ​​​​Metal elements that compose the oxide (M 1 or M 2 ) and oxygen. Therefore, In-M 1 -M 2 By using -Zn-based oxide for the insulating film 206, Specifically, the element M 2 As for Ti, Zr, Hf, Ge, Ce, etc.

[0147] For example, using a target of In:Zr:Ga:Zn=3:0.05:0.95:2, In-M 1 -M 2 - Formation of insulating film 206 using Zn-based oxide Just do it.

[0148] Also, for example, the chemical formula InMZnO x The In-M-Zn oxide represented by the formula The insulating property of the In-M-Zn oxide as the element M can be used to make the semiconductor film 205 An element that has higher insulating properties than the constituent metal oxide is applied. For example, element M is In addition, tetravalent elements such as Ti, Zr, Hf, Ge, and Ce can be applied. Since tetravalent elements have more bonds than trivalent elements, these tetravalent elements are used as element M. In the nM-Zn oxide, the bonding strength between element M and oxygen is strong. Therefore, In-M-Zn oxide By using such a material for the insulating film 206, the insulating property of the insulating film 206 can be improved.

[0149] For example, the energy gap of In-Zr-Zn oxide using Zr as element M is: This is larger than the energy gap of In-Ga-Zn oxide (approximately 3.2 eV). In other words, In-Zr-Zn oxides have higher insulating properties than In-Ga-Zn oxides. to obtain.

[0150] Also, yttrium has a lower electronegativity than Ga. Therefore, In-M 1 -M 2 -Z In the n-based oxide, when the element M 2 is yttrium, the difference in electronegativity between oxygen and the element M 2 can be increased, and the ionic bond with oxygen in the metal oxide can be made stronger . Therefore, even when the element M is yttrium, the insulation of the insulating film 206 using the In-M 2 -M 1 -M 2 -Zn -based oxide can be enhanced. Also, in the In-M-Zn-based oxide, when the element M is yttrium, the difference in electronegativity between oxygen and the element M can be increased, and the ionic bond with oxygen in the metal oxide can be made stronger . Therefore, even when the element M is yttrium, the insulation of the insulating film 206 using the In-M-Zn-based oxide can be enhanced. Moreover, in this specification, the term "energy gap" is used in the same meaning as "band gap" and "forbidden bandwidth". Also, the value of the band gap uses the value obtained by measuring with an ellipsometer of a single film of the material.

[0151] In addition, the content of the element M in the In-M-Zn-based oxide is 0.3 times or more and less than 1. 3 times the content of In. Also, the content of the element M in the In-M-Zn-based oxide is 0.3 times or more and less than 1. 3 times the content of Zn. The smaller the relative number of In or Zn with respect to the element M

[0152] , the higher the insulating property of the insulating film 206 can be obtained. 3 times less. Also, the content of the element M in the In-M-Zn-based oxide is 0.3 times or more and less than 1. 3 times the content of Zn. The smaller the relative number of In or Zn with respect to the element M , the higher the insulating property of the insulating film 206 can be obtained.

[0153] Specifically, when forming a metal oxide material containing element M by sputtering, preferably an atomic ratio of In:M:Zn = 1:1:1, 3:1:3, 3:2:4, 2:1:3, 4:5:4, or 4:2:3 is used as the metal oxide target.

[0154] In-M-Zn-based oxides or In-M 1 -M 2 -Zn-based oxides are used for the insulating film 206. By doing so, the state of the interface between the insulating film 206 and the semiconductor film 205 can be kept good, and the electrical characteristics of the transistor 12 can be improved.

[0155] Note that impurities tend to adhere to the surface of the semiconductor film 205 exposed by etching for forming the insulating film 206. The above impurities include elements constituting the etching gas or etching solution used for etching, or elements present in the processing chamber where etching is performed. Specific examples of the above impurities include boron, chlorine, fluorine, carbon, aluminum, etc.

[0156] When the above impurities adhere to the surface of the semiconductor film 205, an increase in the off-current of the transistor or deterioration of the electrical characteristics of the transistor is likely to occur. Also, parasitic channels are likely to occur in the semiconductor film 205, and conductive films that should be electrically separated are likely to be electrically connected through the semiconductor film 205. Therefore, in one aspect of the present invention, after the etching for forming the insulating film 206 is completed, a cleaning process is performed to remove impurities that may adhere to the surfaces of the semiconductor film 205 and the insulating film 206.

[0157] The cleaning process can be carried out using an alkaline solution such as a TMAH (tetramethylammonium hydroxide) solution, water, or dilute hydrofluoric acid. Specifically, when using dilute hydrofluoric acid for the cleaning process, it is desirable to dilute 50 wt% hydrofluoric acid with water to 1 / 10 to 1 / 10. That is, it is desirable to use dilute hydrofluoric acid with a concentration of 0.5 wt% to 5×10 wt% for the cleaning process. Through the cleaning process, the above-mentioned impurities adhering to the surfaces of the semiconductor film 205 and the insulating film 206 can be removed. Also, when using dilute hydrofluoric acid for the cleaning process, the impurities adhering to the semiconductor film 205 can be removed together with a part of the semiconductor film 205. , water, or dilute hydrofluoric acid, etc. can be used. Specifically, when using dilute hydrofluoric acid for the cleaning process, if using 50 wt% hydrofluoric acid, dilute it with water to 1 / 10 2 to 1 / 10 5 and use it for the cleaning process. That is, it is desirable to use dilute hydrofluoric acid with a concentration of 0.5 wt% to 5×10 -4 wt% for the cleaning process. Through the cleaning process, the above-mentioned impurities adhering to the surfaces of the semiconductor film 205 and the insulating film 206 can be removed. Also, when using dilute hydrofluoric acid for the cleaning process, the impurities adhering to the semiconductor film 205 can be removed together with a part of the semiconductor film 205. 206 can be removed. Also, when using dilute hydrofluoric acid for the cleaning process, the impurities adhering to the semiconductor film 205 can be removed together with a part of the semiconductor film 205. and the impurities adhering to the semiconductor film 205 can be removed together with a part of the semiconductor film 205.

[0158] Next, after forming a conductive film on the semiconductor film 205 by sputtering or vacuum evaporation, the conductive film is patterned by etching using photolithography, so that, as shown in FIG. 9(D), on the semiconductor film 205, a conductive film 207 and a conductive film 208 provided with the insulating film 206 interposed therebetween, and a gate insulating film 20 4 and a conductive film 211 provided on the semiconductor film 205 are respectively formed at positions overlapping the conductive film 210. The conductive films 20 7 and 208 function as the source electrode or drain electrode of the transistor 12. Also, the conductive film 211 functions as the electrode of the capacitive element 14. 7 and 208 function as the source electrode or drain electrode of the transistor 12. Also, the conductive film 211 functions as the electrode of the capacitive element 14. 4 and a conductive film 211 provided on the semiconductor film 205 are respectively formed at positions overlapping the conductive film 210. The conductive films 20 7 and 208 function as the source electrode or drain electrode of the transistor 12. Also, the conductive film 211 functions as the electrode of the capacitive element 14.

[0159] The conductive films 207, 208, and 211 can use the same structure and material as the conductive films 203 and 210. When performing a heat treatment after the formation of the conductive films 207, 208, and 211, the conductive film should be provided with heat resistance to withstand this heat treatment. The conductive films 207, 208, and 211 can use the same structure and material as the conductive films 203 and 210. When performing a heat treatment after the formation of the conductive films 207, 208, and 211, the conductive film should be provided with heat resistance to withstand this heat treatment. If a heat treatment is performed after the formation of the conductive films 207, 208, and 211, the conductive film should be provided with heat resistance to withstand this heat treatment. ​​is preferable. In the present embodiment, as the conductive films 207, 208, and 211, a tungsten film with a film thickness of 150 nm is used.

[0160] Note that, during the etching for forming the conductive films 207, 208, and 211, the respective materials and etching conditions are appropriately adjusted so that the semiconductor film 205 is not removed as much as possible. Depending on the etching conditions, a groove portion (recess) may be formed by partially etching the exposed portion of the semiconductor film 205.

[0161] In the present embodiment, dry etching by the ICP etching method is used to form the conductive films 207, 208, and 211. Specifically, after setting the flow rate of sulfur hexafluoride, which is an etching gas, to 50 sccm, the reaction pressure to 1.5 Pa, the temperature of the lower electrode to 70°C, the RF (13.56 MHz) power input to the coil-type electrode to 500 W, and the power input to the lower electrode (bias side) to 50 W, the flow rate of boron trichloride, which is an etching gas, is set to 60 scc m, the flow rate of chlorine to 20 sccm, the reaction pressure to 1.9 Pa, the temperature of the lower electrode to 21°C, the RF (13.56 MHz) power input to the coil-type electrode to 450 W, and the power input to the lower electrode (bias side) to 100 W, and then the conditions are changed midway to perform dry etching.

[0162] Note that, in order to reduce the number of masks and processes used in the photolithography method, an etching process may be performed using a resist mask formed by a multi-tone mask that gives multi-stage intensity to the transmitted light. The resist mask formed using the multi-tone mask has a shape with a plurality of film thicknesses, and since the shape can be further deformed by performing etching, different It can be used in a plurality of etching processes for processing into a desired pattern. Therefore, with a single multi- tone mask, a resist mask corresponding to at least two or more different patterns can be formed. Therefore, the number of exposure masks can be reduced, and the process can be simplified.

[0163] In addition, on the surfaces of the semiconductor film 205 and the insulating film 206 exposed by etching for forming the conductive films 207, 208, and 211, impurities such as boron, chlorine, fluorine, carbon, and aluminum are likely to adhere. Further, the above impurities may also include elements constituting the conductive films 207, 208, and 211.

[0164] When the above impurities adhere to the surface of the semiconductor film 205, as described above, an increase in the off-current of the transistor or deterioration of the electrical characteristics of the transistor is likely to occur. Also, a parasitic channel is likely to be generated in the semiconductor film 205, and conductive films that should be electrically separated are likely to be electrically connected through the semiconductor film 205. Therefore, in one aspect of the present invention, after the etching for forming the conductive films 207, 208, and 211 is completed, a cleaning process is performed to remove impurities that may adhere to the surfaces of the semiconductor film 205 and the insulating film 206.

[0165] The cleaning process can be performed using an alkaline solution such as a TMAH solution, water, or dilute hydrofluoric acid. Specifically, when dilute hydrofluoric acid is used for the cleaning process, it is desirable to dilute 50 wt% hydrofluoric acid with water to 1 / 10 to 1 / 10. 2 5 That is, at a concentration of 0.5 wt% to 5×10 -4 ​​​​​​​​​​​It is desirable to use dilute hydrofluoric acid with a weight percentage for the cleaning process. By the cleaning process, the above impurities adhering to the surfaces of the semiconductor film 205 and the insulating film 206 can be removed. Further, when dilute hydrofluoric acid is used for the cleaning process, the impurities adhering to the semiconductor film 205 can be removed together with a part of the semiconductor film 205.

[0166] Note that in this embodiment, the cleaning process for the purpose of removing impurities after etching is performed twice, after the formation of the insulating film 206 and after the formation of the conductive films 207, 208, and 211. However, in one aspect of the present invention, the above cleaning process may be performed only once.

[0167] Note that FIG. 12 is a top view of the liquid crystal display device at the time when the above-described process is completed. The cross-sectional view taken along the one-dot chain line A1 - A2 in FIG. 12 corresponds to FIG. 9(D).

[0168] Next, as shown in FIG. 10(A), an insulating film 212 is formed so as to cover the semiconductor film 205, the insulating film 206, the conductive films 207 and 208, and the conductive film 211. The insulating film 212 desirably contains as little moisture and impurities such as hydrogen as possible, and may be a single-layer insulating film or may be composed of a plurality of laminated insulating films. When the insulating film 212 contains hydrogen, the hydrogen penetrates into the semiconductor film 205, or the hydrogen extracts oxygen in the semiconductor film 205, and the vicinity of the surface of the semiconductor film 205 becomes low-resistance (n-type). Then, a parasitic channel is likely to be formed in the vicinity of the surface of the low-resistance semiconductor film 205, and there is a possibility that the conductive film 208 and the conductive film 211 are electrically connected by the parasitic channel. Therefore, the insulating film 212 It is important not to use hydrogen in the film formation method so that the film contains as little hydrogen as possible. This is so.

[0169] Even when the above cleaning process is performed, if the substrate 202 is exposed to the atmosphere before forming the insulating film 212, impurities such as carbon contained in the atmosphere may adhere to the surfaces of the semiconductor film 205 and the insulating film 206. Therefore, in one aspect of the present invention, in the processing chamber for forming the insulating film 212, before forming the insulating film 212, impurities such as carbon adhering to the surfaces of the semiconductor film 205 and the insulating film 206 are removed by plasma treatment using oxygen, nitrous oxide, or a rare gas (typically argon), etc., so that impurities such as carbon can be removed. And after removing the impurities by plasma treatment, without exposing the substrate 202 to the atmosphere, by forming the insulating film 212, it is possible to prevent impurities from entering the vicinity of the interface between the semiconductor film 205 and the insulating film 206 and the insulating film 212, and to prevent an increase in the off-current of the transistor or deterioration of the electrical characteristics of the transistor. Even when the above cleaning process is performed, if the substrate 202 is exposed to the atmosphere before forming the insulating film 212, impurities such as carbon contained in the atmosphere may adhere to the surfaces of the semiconductor film 205 and the insulating film 206. Therefore, in one aspect of the present invention, in the processing chamber for forming the insulating film 212, before forming the insulating film 212, impurities such as carbon adhering to the surfaces of the semiconductor film 205 and the insulating film 206 are removed by plasma treatment using oxygen, nitrous oxide, or a rare gas (typically argon), etc., so that impurities such as carbon can be removed. And after removing the impurities by plasma treatment, without exposing the substrate 202 to the atmosphere, by forming the insulating film 212, it is possible to prevent impurities from entering the vicinity of the interface between the semiconductor film 205 and the insulating film 206 and the insulating film 212, and to prevent an increase in the off-current of the transistor or deterioration of the electrical characteristics of the transistor. It is also desirable to use a material with high barrier properties for the insulating film 212. For example, as the insulating film with high barrier properties, a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, an aluminum oxide film, or an aluminum oxynitride film, etc. can be used. When using a plurality of laminated insulating films, an insulating film such as a silicon oxide film or a silicon oxynitride film containing oxygen is formed closer to the semiconductor film 205 than the insulating film with high barrier properties. And with the insulating film containing oxygen sandwiched therebetween, a high-barrier insulating film is formed so as to overlap the semiconductor film 205. By using a high-barrier insulating film, within the semiconductor film 205, within the gate insulating film 204, or It is also desirable to use a material with high barrier properties for the insulating film 212. For example, as the insulating film with high barrier properties, a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, an aluminum oxide film, or an aluminum oxynitride film, etc. can be used. When using a plurality of laminated insulating films, an insulating film such as a silicon oxide film or a silicon oxynitride film containing oxygen is formed closer to the semiconductor film 205 than the insulating film with high barrier properties. And with the insulating film containing oxygen sandwiched therebetween, a high-barrier insulating film is formed so as to overlap the semiconductor film 205. By using a high-barrier insulating film, within the semiconductor film 205, within the gate insulating film 204, or

[0170] It is also desirable to use a material with high barrier properties for the insulating film 212. For example, as the insulating film with high barrier properties, a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, an aluminum oxide film, or an aluminum oxynitride film, etc. can be used. When using a plurality of laminated insulating films, an insulating film such as a silicon oxide film or a silicon oxynitride film containing oxygen is formed closer to the semiconductor film 205 than the insulating film with high barrier properties. And with the insulating film containing oxygen sandwiched therebetween, a high-barrier insulating film is formed so as to overlap the semiconductor film 205. By using a high-barrier insulating film, within the semiconductor film 205, within the gate insulating film 204, or It is also desirable to use a material with high barrier properties for the insulating film 212. For example, as the insulating film with high barrier properties, a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, an aluminum oxide film, or an aluminum oxynitride film, etc. can be used. When using a plurality of laminated insulating films, an insulating film such as a silicon oxide film or a silicon oxynitride film containing oxygen is formed closer to the semiconductor film 205 than the insulating film with high barrier properties. By using a high-barrier insulating film, within the semiconductor film 205, within the gate insulating film 204, or can prevent impurities such as moisture or hydrogen from entering the interface between the semiconductor film 205 and other insulating films and the vicinity thereof.

[0171] Also, when using a plurality of stacked insulating films as the insulating film 212, for the insulating films other than the first layer, for example, heat-resistant organic materials such as acrylic resin, polyimide resin, benzocyclobutene-based resin, polyamide resin, and epoxy resin can be used. In addition to the above organic materials, siloxane-based resins, silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, al umina, etc. can be used. The siloxane-based resin is a material whose skeletal structure is composed of bonds between silicon (Si) and oxygen (O). As substituents, in addition to hydrogen, at least one of fluorine, fluoro group, and organic group (for example, alkyl group, aromatic hydrocarbon) may be included. For the formation of the insulating film 212, depending on the material, methods such as CVD method, sputtering method, spin coating, dipping, spray coating, droplet ejection method (inkjet method), printing method (screen printing, offset printing, etc.) can be used for formation. Also, it may be formed using tools such as doctor knife, ro tary coater, curtain coater, and knife coater. Alternatively, as the insulating film other than the first layer, a silicon oxide film produced by chemical vapor deposition using an organic silane can also be used. As the organic silane, ethyl silicate (TEOS: Si(O C 2 H 5 ) 4 )), trimethylsilane (TMS: (CH 3 ) 3 SiH), tetramethylcyclo tetrasiloxane (TMCTS), octamethylcyclotetrasiloxane (OMCTS ) Hexamethyldisilazane (HMDS), triethoxysilane (SiH(OC 2 H 5 ) 3 ) Tris(dimethylamino)silane (SiH(N(CH 3 ) 2 ) 3 ) etc. can be used. possible.

[0172] In this embodiment, a silicon oxide film with a thickness of 300 nm formed by sputtering is used as the insulating film 212. The substrate temperature during film formation may be room temperature or higher and 300 °C or lower. In this embodiment, it is set to 100 °C.

[0173] Next, as shown in FIG. 10(B), the gate insulating film 204, the semiconductor film 205, and the insulating film 212 are processed into a desired shape by etching using photolithography to form the opening 213 and the opening 214.

[0174] In this embodiment, dry etching by the ICP etching method is used to pattern the gate insulating film 204, the semiconductor film 205, and the insulating film 212. Specifically, the etching gas, trifluoromethane, helium, and methane, have flow rates of 22.5 sccm , 127.5 sccm, 5 sccm, the reaction pressure is 3.5 Pa, the temperature of the lower electrode is 21 °C, and the RF (13.56 MHz) power input to the coil-type electrode is 475 W, and the power input to the lower electrode (bias side) is 300 W, and dry etching is performed.

[0175] The region where the opening 213 is formed overlaps with a part of the region where the conductive film 208 is formed and a part of the region where the conductive film 210 is formed. Therefore, in the opening 213, the conductive film 208 and the conductive film 210 are partially exposed. Also, the region where the opening 214 is formed overlaps with a part of the region where the conductive film 210 is formed, so that the conductive film 210 is partially exposed at the opening 214. Since it overlaps with a part of the region where the conductive film 210 is formed, the conductive film 210 is partially exposed at the opening 214.

[0176] Note that FIG. 13 is a top view of the liquid crystal display device at the time when the above-described process is completed. The cross-sectional view taken along the dashed-dotted line A1 - A2 in FIG. 13 corresponds to FIG. 10(B).

[0177] Next, as shown in FIG. 10(C), a conductive film 215 that contacts the conductive film 208 and the conductive film 210 at the opening 213, and a conductive film 216 that contacts the conductive film 210 at the opening 214 are formed. The conductive film 216 functions as a pixel electrode, and a part of it is also provided on the insulating film 212.

[0178] In the case of a transmissive liquid crystal display device, the conductive films 215 and 216 are preferably formed of a conductive material having translucency. Also, in the case of a reflective liquid crystal display device, the conductive films 215 and 216 are preferably formed of a conductive material that reflects light.

[0179] Specifically, as the conductive films 215 and 216, indium oxide, indium tin oxide (ITO), indium tin oxide containing silicon or silicon oxide, indium zinc oxide, indium oxide containing tungsten and zinc oxide, Al-Zn-based oxide semiconductor containing nitrogen, Zn-based oxide semiconductor containing nitrogen, Sn-Zn-based oxide semiconductor containing nitrogen, gold (Au), platinum (Pt), nickel (Ni), tungsten (W) ​​​​​​​​​​​​, chromium (Cr), molybdenum (Mo), iron (Fe), cobalt (Co), copper (Cu), in addition to palladium (Pd) and titanium (Ti), elements belonging to Group 1 or Group 2 of the periodic table, that is, alkali metals such as lithium (Li) and cesium (Cs), and alkaline earth metals such as magnesium (Mg), calcium (Ca), and strontium (Sr), and alloys containing these (MgAg, AlLi), europium (Eu), ytterbium (Yb), and other rare earth metals and alloys containing these can be used. Note that the conductive films 215 and 216 can be formed, for example, by using the above materials by sputtering or vapor deposition (including vacuum vapor deposition) and then processing the conductive film into a desired shape by etching using photolithography. After the above steps, an insulating film that functions as a spacer is formed on the insulating film 212, and the conductive film 216 that functions as a pixel electrode and a separately prepared counter electrode are opposed to each other with a liquid crystal layer sandwiched therebetween,

[0180] so that a liquid crystal display device can be manufactured. Note that in this embodiment, the case where the transistor 12 has a single gate structure is exemplified, but if necessary, a transistor having a multi-gate structure having a plurality of channel formation regions can also be formed by having a plurality of electrically connected conductive films 203.

[0181] This embodiment can be implemented in appropriate combination with other embodiments.

[0182]

[0183]

[0183] (Embodiment 4) Next, regarding the appearance of the panel of the liquid crystal display device according to one aspect of the present invention, it will be described with reference to FIG. 14. is illustrated. FIG. 14(A) is a top view of a panel in which a substrate 4001 and a counter substrate 4006 are adhered together with a sealing material 4005, and FIG. 14(B) corresponds to a cross-sectional view taken along the dashed line E1-E2 in FIG. 14(A). A sealing material 4005 is provided so as to surround a pixel portion 4002 and a scanning line driving circuit 4004 provided on the substrate 4001. Also, a counter substrate 4006 is provided on top of the pixel portion 4002 and the scanning line driving circuit 4004. Therefore, the pixel portion 4002 and the scanning line driving circuit 4 004 are sealed together with a liquid crystal layer 4007 by the substrate 4001, the sealing material 4005, and the counter substrate 4006.

[0184] Moreover, a substrate 4021 on which a signal line driving circuit 4003 is formed is mounted in a region different from the region surrounded by the sealing material 4005 on the substrate 4001. In FIG. 14, a transistor 4009 included in the signal line driving circuit 4003 is illustrated. Note that in this embodiment, a case where the scanning line driving circuit 4004 is formed on the substrate 4001 together with the pixel portion 4002 is illustrated, but the scanning line driving circuit 4004 formed on another substrate may be mounted on the substrate 400 1. Also, in this embodiment, a case where the signal line driving circuit 4003 formed on the substrate 4021 is mounted on the substrate 4001 is illustrated, but the signal line driving circuit 4003 may be formed on the substrate 4001 together with the pixel portion 4002. Alternatively, a part of the signal line driving circuit 4003 or a part of the scanning line driving circuit 4004 may be formed on the substrate 4001 together with the pixel portion 4002. Furthermore, the pixel portion 4002 and the scanning line driving circuit 4004 provided on the substrate 4001 are transistors 004 are sealed together with a liquid crystal layer 40 07 by the substrate 4001, the sealing material 4005, and the counter substrate 4006.

[0185] Also, in a region different from the region surrounded by the sealing material 4005 on the substrate 4001, a substrate 4021 on which a signal line driving circuit 4003 is formed is mounted. In FIG. 14, a transistor 4009 included in the signal line driving circuit 4003 is illustrated. Note that in this embodiment, a case where the scanning line driving circuit 4004 is formed on the substrate 4001 together with the pixel portion 4002 is illustrated, but the scanning line driving circuit 4004 formed on another substrate may be mounted on the substrate 400 1. Also, in this embodiment, a case where the signal line driving circuit 4003 formed on the substrate 4021 is mounted on the substrate 4001 is illustrated, but the signal line driving circuit 4003 may be formed on the substrate 4001 together with the pixel portion 4002. Alternatively, a part of the signal line driving circuit 4003 or a part of the scanning line driving circuit 4004 may be formed on the substrate 4001 together with the pixel portion 4002. In addition, the pixel portion 4002 and the scanning line driving circuit 4004 provided on the substrate 4001 are transistors Moreover, a substrate 4021 on which a signal line driving circuit 4003 is formed is mounted in a region different from the region surrounded by the sealing material 4005 on the substrate 4001. In FIG. 14, a transistor 4009 included in the signal line driving circuit 4003 is illustrated. Note that in this embodiment, a case where the scanning line driving circuit 4004 is formed on the substrate 4001 together with the pixel portion 4002 is illustrated, but the scanning line driving circuit 4004 formed on another substrate may be mounted on the substrate 400 1. Also, in this embodiment, a case where the signal line driving circuit 4003 formed on the substrate 4021 is mounted on the substrate 4001 is illustrated, but the signal line driving circuit 4003 may be formed on the substrate 4001 together with the pixel portion 4002. Alternatively, a part of the signal line driving circuit 4003 or a part of the scanning line driving circuit 4004 may be formed on the substrate 4001 together with the pixel portion 4002. 1. Also, in this embodiment, a case where the signal line driving circuit 4003 formed on the substrate 4021 is mounted on the substrate 4001 is illustrated, but the signal line driving circuit 4003 may be formed on the substrate 4001 together with the pixel portion 4002. Alternatively, a part of the signal line driving circuit 4003 or a part of the scanning line driving circuit 4004 may be formed on the substrate 4001 together with the pixel portion 4002. Furthermore, the pixel portion 4002 and the scanning line driving circuit 4004 provided on the substrate 4001 are transistors Moreover, a substrate 4021 on which a signal line driving circuit 4003 is formed is mounted in a region different from the region surrounded by the sealing material 4005 on the substrate 4001. In FIG. 14, a transistor 4009 included in the signal line driving circuit 4003 is illustrated. Note that in this embodiment, a case where the scanning line driving circuit 4004 is formed on the substrate 4001 together with the pixel portion 4002 is illustrated, but the scanning line driving circuit 4004 formed on another substrate may be mounted on the substrate 400 1. Also, in this embodiment, a case where the signal line driving circuit 4003 formed on the substrate 4021 is mounted on the substrate 4001 is illustrated, but the signal line driving circuit 4003 may be formed on the substrate 4001 together with the pixel portion 4002. Alternatively, a part of the signal line driving circuit 4003 or a part of the scanning line driving circuit 4004 may be formed on the substrate 4001 together with the pixel portion 4002. In addition, the pixel portion 4002 and the scanning line driving circuit 4004 provided on the substrate 4001 are transistors

[0186] Moreover, the pixel portion 4002 and the scanning line driving circuit 4004 provided on the substrate 4001 are transistors It has a plurality of disters. In FIG. 14(B), transistor 4 010 included in the pixel portion 4002 is illustrated. The pixel electrode 4030 of the liquid crystal element 4011 is connected to the transistor 4 010. And the counter electrode 4031 of the liquid crystal element 4011 is formed on the counter substrate 4 006. The portion where the pixel electrode 4030, the counter electrode 4031, and the liquid crystal layer 4007 overlap corresponds to the liquid crystal element 4011.

[0187] Also, the shielding film 4040 formed on the counter substrate 4006 overlaps the region where the transistor 4010 is formed. Further, on the counter substrate 4006, a coloring layer 4041 that functions as a color filter and preferentially transmits only visible light in a specific wavelength region is formed and the coloring layer 4041 overlaps the region where the liquid crystal element 4011 is formed. By providing the coloring layer 4041 that preferentially transmits light in the wavelength regions corresponding to red, blue, and green for each pixel, a full-color image can be displayed. In this case, it is desirable to use a backlight that can obtain white light in order to enhance the purity of the colors of the image .. As the backlight that can obtain white light, for example, a configuration in which a red light source, a blue light source, and a green light source are combined, a configuration in which a yellow or orange light source and a blue light source are combined, a configuration in which a white light source is used alone

[0188] A configuration in which a cyan light source, a magenta light source, and a yellow light source are combined, etc. can be used. Alternatively, it may be configured to output light in the wavelength regions corresponding to red, blue, and green from the backlight in order. In this case, a full-color image can be displayed without using a color filter even.

[0189] ​​​​​​This makes it possible to improve the luminous efficiency of the liquid crystal display device.

[0190] In addition, light sources used for backlighting include cold cathode fluorescent lamps, LEDs, OLEDs, and other light-emitting elements. However, the wavelength of light obtained varies depending on the light source, so It is advisable to select the light source appropriately according to the color to be displayed.

[0191] In FIG. 14, the shielding film 4040 and the colored layer 4041 are provided on the opposing substrate 4006 side. The case where the shielding film 4040 or the colored layer 4041 is provided on the substrate 4001 side is shown as an example. The direction of incidence of light into the liquid crystal element 4011 and the direction of emission of light transmitted through the liquid crystal element 4011 may be different. The positions of the shielding film 4040 and the colored layer 4041 can be appropriately determined according to the direction. can.

[0192] In addition, the spacer 4035 is arranged to reduce the distance (cell gap) between the pixel electrode 4030 and the counter electrode 4031. In FIG. 14B, the spacer 4035 is provided to control the gap. The example shows a case where the insulating film is patterned, but the spherical spacer is It is also possible to use the character "sa".

[0193] Also, a signal line driver circuit 4003, a scanning line driver circuit 4004, and a pixel portion 4002 are provided with Various signals and potentials are inputted from a connection terminal 4016 via wirings 4014 and 4015. The connection terminal 4016 is connected to a terminal of the FPC 4018 and an anisotropic conductive film 4016. They are electrically connected via 019.

[0194] This embodiment mode can be implemented in appropriate combination with other embodiment modes.

[0195] (Embodiment 5) FIG. 15 is an example of a perspective view showing the structure of a liquid crystal display device. The liquid crystal display device shown in FIG. 15 includes a panel 1601 in which a pixel portion is formed between a pair of substrates, a first diffusion plate 1602, a prism sheet 1603, a second diffusion plate 1604, a light guide plate 1605, a backlight 1620 having a plurality of light sources 16 07, a reflection plate 1606, a circuit board 1608, and a substrate 1611 on which a signal line drive circuit is formed. 07, a reflection plate 1606, a circuit board 1608, and a substrate 1611 on which a signal line drive circuit is formed. has a drive circuit formed.

[0196] The panel 1601, the first diffusion plate 1602, the prism sheet 1603, the second diffusion plate 1604, the light guide plate 1605, and the reflection plate 1606 are stacked in this order. The backlight 1620 is disposed at an end of the light guide plate 1605. The light from the light sources 1607 diffused inside the light guide plate 1605 is uniformly irradiated onto the panel 1601 by the first diffusion plate 1602, the prism sheet 1603, and the second diffusion plate 1604. 1604, the light guide plate 1605, and the reflection plate 1606 are stacked in this order. The backlight 1620 is disposed at an end of the light guide plate 1605. The light from the light sources 1607 diffused inside the light guide plate 1605 is uniformly irradiated onto the panel 1601 by the first diffusion plate 1602, the prism sheet 1603, and the second diffusion plate 1604. 1604, the light guide plate 1605, and the reflection plate 1606 are stacked in this order. The backlight 1620 is disposed at an end of the light guide plate 1605. The light from the light sources 1607 diffused inside the light guide plate 1605 is uniformly irradiated onto the panel 1601 by the first diffusion plate 1602, the prism sheet 1603, and the second diffusion plate 1604. 1604, the light guide plate 1605, and the reflection plate 1606 are stacked in this order. The backlight 1620 is disposed at an end of the light guide plate 1605. The light from the light sources 1607 diffused inside the light guide plate 1605 is uniformly irradiated onto the panel 1601 by the first diffusion plate 1602, the prism sheet 1603, and the second diffusion plate 1604. 1604, the light guide plate 1605, and the reflection plate 1606 are stacked in this order. The backlight 1620 is disposed at an end of the light guide plate 1605. The light from the light sources 1607 diffused inside the light guide plate 1605 is uniformly irradiated onto the panel 1601 by the first diffusion plate 1602, the prism sheet 1603, and the second diffusion plate 1604.

[0197] In this embodiment, the first diffusion plate 1602 and the second diffusion plate 1604 are used, but the number of diffusion plates is not limited to this, and it may be a single one or three or more. And the diffusion plate may be provided between the light guide plate 1605 and the panel 1601. Therefore, the diffusion plate may be provided only on the side closer to the panel 1601 than the prism sheet 1603, or the diffusion plate may be provided only on the side closer to the light guide plate 1605 than the prism sheet 1603. In this embodiment, the first diffusion plate 1602 and the second diffusion plate 1604 are used, but the number of diffusion plates is not limited to this, and it may be a single one or three or more. And the diffusion plate may be provided between the light guide plate 1605 and the panel 1601. Therefore, the diffusion plate may be provided only on the side closer to the panel 1601 than the prism sheet 1603, or the diffusion plate may be provided only on the side closer to the light guide plate 1605 than the prism sheet 1603. In this embodiment, the first diffusion plate 1602 and the second diffusion plate 1604 are used, but the number of diffusion plates is not limited to this, and it may be a single one or three or more. And the diffusion plate may be provided between the light guide plate 1605 and the panel 1601. Therefore, the diffusion plate may be provided only on the side closer to the panel 1601 than the prism sheet 1603, or the diffusion plate may be provided only on the side closer to the light guide plate 1605 than the prism sheet 1603. In this embodiment, the first diffusion plate 1602 and the second diffusion plate 1604 are used, but the number of diffusion plates is not limited to this, and it may be a single one or three or more. And the diffusion plate may be provided between the light guide plate 1605 and the panel 1601. Therefore, the diffusion plate may be provided only on the side closer to the panel 1601 than the prism sheet 1603, or the diffusion plate may be provided only on the side closer to the light guide plate 1605 than the prism sheet 1603. In this embodiment, the first diffusion plate 1602 and the second diffusion plate 1604 are used, but the number of diffusion plates is not limited to this, and it may be a single one or three or more. And the diffusion plate may be provided between the light guide plate 1605 and the panel 1601. Therefore, the diffusion plate may be provided only on the side closer to the panel 1601 than the prism sheet 1603, or the diffusion plate may be provided only on the side closer to the light guide plate 1605 than the prism sheet 1603. In this embodiment, the first diffusion plate 1602 and the second diffusion plate 1604 are used, but the number of diffusion plates is not limited to this, and it may be a single one or three or more. And the diffusion plate may be provided between the light guide plate 1605 and the panel 1601. Therefore, the diffusion plate may be provided only on the side closer to the panel 1601 than the prism sheet 1603, or the diffusion plate may be provided only on the side closer to the light guide plate 1605 than the prism sheet 1603.

[0198] Also, the prism sheet 1603 is not limited to the shape with a sawtooth cross section shown in FIG. 15, and it may have a shape capable of condensing the light from the light guide plate 1605 toward the panel 1601 side. Also, the prism sheet 1603 is not limited to the shape with a sawtooth cross section shown in FIG. 15, and it may have a shape capable of condensing the light from the light guide plate 1605 toward the panel 1601 side.

[0199] The circuit board 1608 is provided with circuits for generating various signals input to the panel 1601, or circuits for processing these signals, etc. And in FIG. 15, the circuit board 160 8 and the panel 1601 are connected via a COF tape 1609. Also, a substrate 1611 on which a signal line driving circuit is formed is connected to the COF (Chip On Film) tape 1609 using the COF method.

[0200] In FIG. 15, a circuit of a control system for controlling the driving of the backlight 1620 is provided on the circuit board 1608, and an example is shown in which the circuit of the control system and the backlight 1620 are connected via an FPC 1610. However, the circuit of the above control system may be formed on the panel 1601, and in this case, the panel 1601 and the backlight 1620 are connected by an FPC or the like.

[0201] Note that in FIG. 15, the case where an edge light type backlight 1 620 arranged at the end of the panel 1601 is used is illustrated, but the present invention is not limited to this configuration. In one aspect of the present invention, a direct - type backlight arranged directly below the panel 1601 may be used. Or, in one aspect of the present invention, a front light may be used.

[0202] This embodiment can be implemented in appropriate combination with other embodiments.

[0203] (Embodiment 6) FIG. 17 illustrates the structure of a light - emitting device according to an aspect of the present invention. FIG. 17(A) is an example of a cross - sectional view of a transistor 300 included in a pixel in the channel length direction.

[0204] ​​​​In Fig. 17(A), a gate electrode 301 on an insulating surface, a gate insulating film 302 located on the gate electrode 301, a semiconductor film 303 located on the gate insulating film 302 and overlapping the gate electrode 301, an island-shaped insulating film 304 located on the semiconductor film 303 and overlapping the gate electrode 301, a conductive film 305 located on the semiconductor film 303, conductive films 306a and 306b sandwiching the insulating film 304 and still located on the semiconductor film 303, an insulating film 307 located on the semiconductor film 303, the insulating film 304, the conductive film 305, the conductive films 306a and 306b, a pixel electrode 309 located on the insulating film 307 and connected to the conductive film 306a through an opening 308 provided in the insulating film 307, an opening 310 provided in the insulating film 307 and the semiconductor film 303, an insulating film 320 located on the pixel electrode 309, an EL layer 322 and a counter electrode 323 sequentially laminated on the pixel electrode 309 at an opening 321 provided in the insulating film 320, are shown. And, in Fig. 17(A), the gate electrode 301, the gate insulating film 302, the semiconductor film 303, the insulating film 304 functioning as a channel protection film, the conductive films 306a and 306b constitute a transistor 300. And either one of the conductive films 306a and 306b functions as a source electrode and the other functions as a drain electrode. Also, in Fig. 17(A), the portion where the pixel electrode 309, the EL layer 322 and the counter electrode 323 are laminated at the opening 321 corresponds to a light-emitting element 324. In a method of manufacturing a light-emitting device according to an aspect of the present invention, a step of forming a gate electrode 301, an insulating film 302 located on the gate electrode 301, a semiconductor film 303 located on the gate insulating film 302 and overlapping the gate electrode 301, an island-shaped insulating film 304 located on the semiconductor film 303 and overlapping the gate electrode 301, a conductive film 305 located on the semiconductor film 303, conductive films 306a and 306b sandwiching the insulating film 304 and still located on the semiconductor film 303, an insulating film 307 located on the semiconductor film 303, the insulating film 304, the conductive film 305, the conductive films 306a and 306b, a pixel electrode 309 located on the insulating film 307 and connected to the conductive film 306a through an opening 308 provided in the insulating film 307, an opening 310 provided in the insulating film 307 and the semiconductor film 303, an insulating film 320 located on the pixel electrode 309, an EL layer 322 and a counter electrode 323 sequentially laminated on the pixel electrode 309 at an opening 321 provided in the insulating film 320, are shown. And, in Fig. 17(A), the gate electrode 301, the gate insulating film 302, the semiconductor film 303, the insulating film 304 functioning as a channel protection film, the conductive films 306a and 306b constitute a transistor 300. And either one of the conductive films 306a and 306b functions as a source electrode and the other functions as a drain electrode. Also, in Fig. 17(A), the portion where the pixel electrode 309, the EL layer 322 and the counter electrode 323 are laminated at the opening 321 corresponds to a light-emitting element 324. In a method of manufacturing a light-emitting device according to an aspect of the present invention, a step of forming a gate electrode 301, an insulating film 302 located on the gate electrode 301, a semiconductor film 303 located on the gate insulating film 302 and overlapping the gate electrode 301, an island-shaped insulating film 304 located on the semiconductor film 303 and overlapping the gate electrode 301, a conductive film 305 located on the semiconductor film 303, conductive films 306a and 306b sandwiching the insulating film 304 and still located on the semiconductor film 303, an insulating film 307 located on the semiconductor film 303, the insulating film 304, the conductive film 305, the conductive films 306a and 306b, a pixel electrode 309 located on the insulating film 307 and connected to the conductive film 306a through an opening 308 provided in the insulating film 307, an opening 310 provided in the insulating film 307 and the semiconductor film 303, an insulating film 320 located on the pixel electrode 309, an EL layer 322 and a counter electrode 323 sequentially laminated on the pixel electrode 309 at an opening 321 provided in the insulating film 320, are shown. And, in Fig. 17(A), the gate electrode 301, the gate insulating film 302, the semiconductor film 303, the insulating film 304 functioning as a channel protection film, the conductive films 306a and 306b constitute a transistor 300. And either one of the conductive films 306a and 306b functions as a source electrode and the other functions as a drain electrode. Also, in Fig. 17(A), the portion where the pixel electrode 309, the EL layer 322 and the counter electrode 323 are laminated at the opening 321 corresponds to a light-emitting element 324. In a method of manufacturing a light-emitting device according to an aspect of the present invention, a step of forming a gate electrode 301, an insulating film 302 located on the gate electrode 301, a semiconductor film 303 located on the gate insulating film 302 and overlapping the gate electrode 301, an island-shaped insulating film 304 located on the semiconductor film 303 and overlapping the gate electrode 301, a conductive film 305 located on the semiconductor film 303, conductive films 306a and 306b sandwiching the insulating film 304 and still located on the semiconductor film 303, an insulating film 307 located on the semiconductor film 303, the insulating film 304, the conductive film 305, the conductive films 306a and 306b, a pixel electrode 309 located on the insulating film 307 and connected to the conductive film 306a through an opening 308 provided in the insulating film 307, an opening 310 provided in the insulating film 307 and the semiconductor film 303, an insulating film 320 located on the pixel electrode 309, an EL layer 322 and a counter electrode 323 sequentially laminated on the pixel electrode 309 at an opening 321 provided in the insulating film 320, are shown. And, in Fig. 17(A), the gate electrode 301, the gate insulating film 302, the semiconductor film 303, the insulating film 304 functioning as a channel protection film, the conductive films 306a and 306b constitute a transistor 300. And either one of the conductive films 306a and 306b functions as a source electrode and the other functions as a drain electrode.

[0205] Also, in Fig. 17(A), the portion where the pixel electrode 309, the EL layer 322 and the counter electrode 323 are laminated at the opening 321 corresponds to a light-emitting element 324. And, in Fig. 17(A), the gate electrode 301, the gate insulating film 302, the semiconductor film 303, the insulating film 304 functioning as a channel protection film, the conductive films 306a and 306b constitute a transistor 300. And either one of the conductive films 306a and 306b functions as a source electrode and the other functions as a drain electrode. Also, in Fig. 17(A), the portion where the pixel electrode 309, the EL layer 322 and the counter electrode 323 are laminated at the opening 321 corresponds to a light-emitting element 324. In a method of manufacturing a light-emitting device according to an aspect of the present invention, a step of forming a gate electrode 301, an insulating film 302 located on the gate electrode 301, a semiconductor film 303 located on the gate insulating film 302 and overlapping the gate electrode 301, an island-shaped insulating film 304 located on the semiconductor film 303 and overlapping the gate electrode 301, a conductive film 305 located on the semiconductor film 303, conductive films 306a and 306b sandwiching the insulating film 304 and still located on the semiconductor film 303, an insulating film 307 located on the semiconductor film 303, the insulating film 304, the conductive film 305, the conductive films 306a and 306b, a pixel electrode 309 located on the insulating film 307 and connected to the conductive film 306a through an opening 308 provided in the insulating film 307, an opening 310 provided in the insulating film 307 and the semiconductor film 303, an insulating film 320 located on the pixel electrode 309, an EL layer 322 and a counter electrode 323 sequentially laminated on the pixel electrode 309 at an opening 321 provided in the insulating film 320, are shown.

[0206] And, in Fig. 17(A), the gate electrode 301, the gate insulating film 302, the semiconductor film 303, the insulating film 304 functioning as a channel protection film, the conductive films 306a and 306b constitute a transistor 300. And either one of the conductive films 306a and 306b functions as a source electrode and the other functions as a drain electrode. Also, in Fig. 17(A), the portion where the pixel electrode 309, the EL layer 322 and the counter electrode 323 are laminated at the opening 321 corresponds to a light-emitting element 324.

[0207] In a method of manufacturing a light-emitting device according to an aspect of the present invention, a step of forming a gate electrode 301, an insulating film 302 located on the gate electrode 301, a semiconductor film 303 located on the gate insulating film 302 and overlapping the gate electrode 301, an island-shaped insulating film 304 located on the semiconductor film 303 and overlapping the gate electrode 301, a conductive film 305 located on the semiconductor film 303, conductive films 306a and 306b sandwiching the insulating film 304 and still located on the semiconductor film 303, an insulating film 307 located on the semiconductor film 303, the insulating film 304, the conductive film 305, the conductive films 306a and 306b, a pixel electrode 309 located on the insulating film 307 and connected to the conductive film 306a through an opening 308 provided in the insulating film 307, an opening 310 provided in the insulating film 307 and the semiconductor film 303, an insulating film 320 located on the pixel electrode 309, an EL layer 322 and a counter electrode 323 sequentially laminated on the pixel electrode 309 at an opening 321 provided in the insulating film 320, are shown. The step of forming the edge film 304, the steps of forming the conductive film 305, the conductive film 306a, and the conductive film 306b, forming the opening 308 in the insulating film 307, and further forming the opening 310 in the insulating film 307 and the semiconductor film 303, the step of forming the pixel electrode 309, and the step of forming the opening 321 in the insulating film 3 20, in which a photolithography method using a mask is used. That is, in one aspect of the present invention, in the step of forming the opening 310 in the insulating film 307, since the shape of the semiconductor film 303 is processed, the step using the photolithography method only for processing the shape of the semiconductor film 303 alone can be omitted. Therefore, in the light-emitting device according to one aspect of the present invention, a series of steps such as film formation, exposure, development, etching, and peeling of photoresist performed by the photolithography method can be partially omitted. And since the number of expensive masks for exposure can be suppressed, the cost incurred in manufacturing the light-emitting device can be suppressed. In addition, the conductive film 305, the conductive film 306a, and the conductive film 306b are present between the insulating film 307 and the semiconductor film 303. Therefore, when using a manufacturing method that also processes the shape of the semiconductor film 303 in the step of forming the opening 308 in the insulating film 307, it is difficult to process the shape of the semiconductor film 303 located below the conductive film 305, the conductive film 30 6a, and the conductive film 306b. And when the conductive film 305, the conductive film 306a, and the conductive film 306b overlap the semiconductor film 303, a parasitic channel may be formed in the semiconductor film 30 3 due to the electric field applied from the pixel electrode 309 to the semiconductor film 303. When a parasitic channel is formed, the conductive film 305 that should be electrically separated and the conductive film 306a or the conductive film 306b may be connected through the semiconductor film 303.

[0208] Note that the conductive film 305, the conductive film 306a, and the conductive film 306b are present between the insulating film 307 and the semiconductor film 303. Therefore, when using a manufacturing method that also processes the shape of the semiconductor film 303 in the step of forming the opening 308 in the insulating film 307, it is difficult to process the shape of the semiconductor film 303 located below the conductive film 305, the conductive film 30 6a, and the conductive film 306b. And when the conductive film 305, the conductive film 306a, and the conductive film 306b overlap the semiconductor film 303, a parasitic channel may be formed in the semiconductor film 30 3 due to the electric field applied from the pixel electrode 309 to the semiconductor film 303. When a parasitic channel is formed, the conductive film 305 that should be electrically separated and the conductive film 306a or the conductive film 306b may be connected through the semiconductor film 303. It is difficult. And when the conductive film 305, the conductive film 306a, and the conductive film 306b overlap the semiconductor film 303, a parasitic channel may be formed in the semiconductor film 303 due to the electric field applied from the pixel electrode 309 to the semiconductor film 303. When a parasitic channel is formed, the conductive film 305 that should be electrically separated and the conductive film 306a or the conductive film 306b may be connected through the semiconductor film 303. 3. When a parasitic channel is formed, the conductive film 305 that should be electrically separated and the conductive film 306a or the conductive film 306b may be connected through the semiconductor film 303. 3. Since it is electrically connected via [it], a reduction in the displayed image quality is caused.

[0209] Therefore, in the light-emitting device according to one aspect of the present invention, the position of the opening 310 is determined between the conductive film 305 and the conductive film 306a or the conductive film 306b, whereby the semiconductor film 303 is partially removed. In FIG. 17(A), the case where not only the semiconductor film 303 and the insulating film 307 but also the gate insulating film 302 is removed in the opening 310 is illustrated. In one aspect of the present invention, it is not necessarily required to remove the gate insulating film 302 in the opening 310, and the gate insulating film 302 may remain in the opening 310.

[0210] FIG. 17(B) shows an example of a top view of the light-emitting device having the cross-sectional structure shown in FIG. 17(A). However, in FIG. 17(B), in order to clarify the layout of the light-emitting device, the gate insulating film 302, the insulating film 307, the insulating film 320, the EL layer 322, and the counter electrode 323 are omitted. A top view is shown. Also, the cross-sectional view taken along the dashed-dotted line A1 - A2 in FIG. 17(B) corresponds to FIG. 17(A).

[0211] As shown in FIGS. 17(A) and 17(B), in one aspect of the present invention, an opening 310 is provided in the semiconductor film 303 and the insulating film 307, which is located between the conductive film 305 and the conductive film 306a or the conductive film 306b.

[0212] In one aspect of the present invention, due to the opening 310, as shown in FIGS. 17(A) and 17(B), the semiconductor film 303 located under the conductive film 306a or the conductive film 306b and the semiconductor film 303 located under the conductive film 305 are in a separated state. Therefore, in one aspect of the present invention , even when an electric field is applied from the pixel electrode 309 or the like to the semiconductor film 303, the opening 310 is located between the conductive film 305 and the conductive film 306a or the conductive film 306b, so that the formation of a parasitic channel in the semiconductor film 303 can be suppressed. And, by suppressing the formation of the parasitic channel, the conductive film 305 and the conductive film 306a or the conductive film 306b are prevented from being electrically connected unintentionally, and a decrease in image quality displayed on the light-emitting device can be prevented.

[0213] Note that, in FIG. 17(B), an example is shown where the semiconductor film 303 located under the conductive film 306a or the conductive film 306b and the semiconductor film 303 located under the conductive film 305 are completely separated. However, in one aspect of the present invention, the semiconductor film 303 does not necessarily have to be completely separated, and the semiconductor film 303 may be partially separated between the conductive film 305 and the conductive film 306a or the conductive film 306b.

[0214] FIG. 18 shows an example of a top view of a light-emitting device having the cross-sectional structure shown in FIG. 17(A). However, in FIG. 18, a top view in which the gate insulating film 302, the insulating film 307, the insulating film 320, the EL layer 322, and the counter electrode 323 are omitted is shown in order to clarify the layout of the light-emitting device. .

[0215] In the light-emitting device shown in FIG. 18, the shape of the opening 310 is different from that in the case of FIG. 17(B). In FIG. 18, the opening 310 is located between the conductive film 305 and the conductive film 306a or the conductive film 306b in the same manner as in the case of FIG. 17(B), but the semiconductor film 303 located under the conductive film 306a or the conductive film 306b and the semiconductor film 303 located under the conductive film 305 are located at the opening 31 It is connected in a region other than 0. That is, in FIG. 18, the conductive film 305 and the conductive film 306a or the semiconductor film 303 is in a partially separated state between the conductive films 306b. Half Even when the conductor film 303 is in a partially separated state, the generation of a parasitic channel can be suppressed and such an effect can be obtained.

[0216] Also, a part of the region where the opening 310 is formed may overlap with the conductive film 306a or the conductive film 306b. Alternatively, a part of the region where the opening 310 is formed may overlap with the region where the conductive film 305 is formed. formed.

[0217] FIG. 19(A) shows an example of a cross-sectional view of the transistor 300 included in a pixel in the channel length direction. Further, FIG. 19(B) shows an example of a top view of a light-emitting device having the cross-sectional structure shown in FIG. 19(A). However, in FIG. 19(B), for the sake of clarity of the layout of the light-emitting device a top view in which the gate insulating film 302, the insulating film 307, the insulating film 320, the EL layer 322, and the counter electrode 323 are omitted is shown. Also, the cross-sectional view taken along the dashed-dotted line B1 - B2 in FIG. 19(B) corresponds to FIG. 19(A). In the light-emitting device shown in FIGS. 19(A) and 19(B), the region where the opening 310 is formed is different from the cases of FIGS. 17(A) and 17(B). In FIGS. 19(A) and 19(B), a part of the region where the opening 310 is formed overlaps with the region where the conductive film 306a is formed. The semiconductor film 303 located under the conductive film 306a is not removed when the opening 310 is formed. Therefore, within the region where the opening 310 is formed, the semiconductor film 303 is in a state of partially remaining, and the end portion of the semiconductor film 303 at the opening 310 and the insulating film 30

[0218] 17(A) and 17(B). In FIGS. 19(A) and 19(B), a part of the region where the opening 310 is formed overlaps with the region where the conductive film 306a is formed. The semiconductor film 303 located under the conductive film 306a is not removed when the opening 310 is formed. Therefore, within the region where the opening 310 is formed, the semiconductor film 303 is in a state of partially remaining, and the end portion of the semiconductor film 303 at the opening 310 and the insulating film 30 30 40 7 are in contact with each other.​​ It does not coincide with the end of 7.

[0219] In one aspect of the present invention, as shown in FIGS. 19(A) and 19(B), an opening 310 is formed Even if a part of the region where the opening 310 is formed overlaps with the region where the conductive film 306a is formed, the semiconductor film 303 located under the conductive film 306 and the semiconductor film 303 located under the conductive film 305 can be separated from each other. Therefore, the effect of suppressing the generation of parasitic channels can be obtained. can be obtained.

[0220] Even when a part of the region where the opening 310 is formed overlaps with the region where the conductive film 306b is formed, the effect of suppressing the generation of parasitic channels can be obtained. Alternatively, even when a part of the region where the opening 310 is formed overlaps with the region where the conductive film 305 is formed, the effect of suppressing the generation of parasitic channels can be obtained.

[0221] And when the region where the opening 310 is formed partially overlaps with the region where the conductive film 306a is formed, there is no need to provide an opening 308 for connecting the conductive film 306a and the pixel electrode 309. Therefore, since there is no need to secure a region for forming the opening 308, high definition of the pixel portion can be realized.

[0222] In addition, FIG. 20(A) shows an example of a cross-sectional view of a transistor 300 included in a pixel in the channel length direction. FIG. 20(B) shows an example of a top view of a light-emitting device having the cross-sectional structure shown in FIG. 20(A). However, in FIG. 20(B), in order to clarify the layout of the light-emitting device, the gate insulating film 302, the insulating film 307, the insulating film 320, the EL layer 322, and The top view omitting the counter electrode 323 is shown. Also, the cross-sectional view taken along the dashed-dotted line C1-C2 in Fig. 20(B) corresponds to Fig. 20(A).

[0223] The light-emitting devices shown in Figs. 20(A) and 20(B) are different in structure from the light-emitting devices shown in Figs. 17(A) and 17(B) in that a conductive film 311 is provided in the same layer as the gate electrode 301. Specifically, in Figs. 20(A) and 20(B), the conductive film 311 is positioned on the insulating surface, and the gate insulating film 302 and the semiconductor film 303 are sequentially stacked on the conductive film 311. The conductive film 305 is provided at a position overlapping the conductive film 311 on the semiconductor film 303.

[0224] Then, in Figs. 20(A) and 20(B), the region where the opening 310 is formed and the region where the conductive film 311 is formed partially overlap, and a part of the conductive film 311 is exposed at the opening 310. Since the conductive film 311 is located under the semiconductor film 303, the semiconductor film 303 is partially removed at the opening 310. Therefore, even in the cases of Figs. 20(A) and 20(B), the semiconductor film 303 located under the conductive film 306a or the conductive film 306b and the semiconductor film 303 located under the conductive film 305 are in a separated state, so that the effect of suppressing the generation of parasitic channels can be obtained.

[0225] Note that in the light-emitting device according to one aspect of the present invention, the semiconductor film 303 included in the transistor 300 contains a wide-gap semiconductor such as an oxide semiconductor as described above.

[0226] (Embodiment 7) ​​​​​​​​​​​​​Next, an example of a specific structure of a pixel portion of a light-emitting device according to one embodiment of the present invention will be described. He explains.

[0227] FIG. 24A shows a configuration example of the pixel section 510. In FIG. 24A, the pixel section 510 includes a scanning A scanning line driving circuit controls the potential of y scanning lines GL (GL1 to GLy), and a signal A pixel electrode is connected to x signal lines SL (SL1 to SLx) whose potentials are controlled by a pixel driver circuit. and x power supply lines VL (VL1 to VLx) that supply potential to the electrodes.

[0228] The scanning lines GL are connected to the plurality of pixels 511. The line GL is provided in one of the rows of a plurality of pixels 511 arranged in a matrix. The pixel 511 is connected to x pixels 511 .

[0229] The signal lines SL are connected to a plurality of pixels 511 arranged in x columns and y rows in the pixel section 510. That is, the power supply line VL is connected to y pixels 511 arranged in any one of the columns. 10, among a plurality of pixels 511 arranged in x columns and y rows, It is connected to y pixels 511 .

[0230] In this embodiment, the pixel 511 is connected to the scanning line GL, the signal line SL, and the power line VL. The type and number of wirings connected to each pixel 511 are shown in FIG. can be appropriately determined depending on the configuration, number, and arrangement of the pixels 511.

[0231] 24B shows an example of a circuit diagram of the pixel 511. The pixel 511 is A transistor 512 for controlling the input of a signal, a pixel electrode, a counter electrode, and a A light-emitting element 515 having an EL layer provided between electrodes, and a transistor 513 that controls the potential of the pixel electrode of the light-emitting element 51 5, and a capacitor element 514 for holding the potential of the image signal. It has.

[0232] Note that in Fig. 24(B), the case where the pixel 511 has the capacitor element 514 is illustrated. However, For example, when the gate capacitance formed between the gate electrode of the transistor 513 and the active layer is large enough and the potential of the image signal can be sufficiently held by other capacitances, it is not always necessary to provide the capacitor element 514 in the pixel 511.

[0233] The light-emitting element 515 includes an element whose luminance is controlled by current or voltage within its scope. For example, an OLED element or the like can be used as the light-emitting element 515. An OLED element has at least an EL layer, an anode, and a cathode. Either the anode or the cathode functions as a pixel electrode, and the other functions as a counter electrode. The EL layer is provided between the anode and the cathode and is composed of a single layer or a plurality of layers. In some cases, these layers contain an inorganic compound. In the luminescence in the EL layer, there are luminescence (fluorescence) when returning from the singlet excited state to the ground state and luminescence (phosphorescence) when returning from the triplet excited state to the ground state. Both are included.

[0234] The potential of the pixel electrode of the light-emitting element 515 is controlled according to the image signal input to the pixel 511. Also, the luminance of the light-emitting element 515 is determined by the potential difference between the pixel electrode and the counter electrode. And in each of the plurality of pixels 511 included in the pixel portion 510, the luminance of the light-emitting element 51 5 is adjusted according to the image signal, and an image is displayed on the pixel portion 510.

[0235] The pixel 511 may further have other circuit elements such as transistors, diodes, resistive elements, capacitive elements, inductors, etc., if necessary.

[0236] Next, the connection configuration of the transistor 512, transistor 513, capacitive element 51 4, and light-emitting element 515 included in the pixel 511 will be described.

[0237] One of the source terminal or the drain terminal of the transistor 512 is connected to the signal line SL, and the other of the source terminal or the drain terminal is connected to the gate electrode of the transistor 513. One of the source terminal or the drain terminal of the transistor 513 is connected to the power supply line VL, and the other of the source terminal or the drain terminal is connected to the light-emitting element 515. The light-emitting element 51 5 has a pixel electrode, a counter electrode, and an EL layer between the pixel electrode and the counter electrode. Specifically, the other of the source terminal or the drain terminal of the transistor 513 is connected to the pixel electrode of the light-emitting element 515. A potential (common potential) is applied to the counter electrode of the light-emitting element 515.

[0238] The power supply potential and the common potential are such that when the transistor 513 is on, a forward bias voltage large enough for the light-emitting element 515 to emit light is applied between the pixel electrode and the counter electrode of the light-emitting element 515.

[0239] Also, the transistors 512 and 513 only need to have at least a gate electrode existing on one side of the active layer, but may have a pair of gate electrodes sandwiching the active layer. Further, the transistors 512 and 513 may have a single gate electrode. It may be a single-gate structure having a pole and a single channel formation region, or a multi-gate structure having a plurality of channel formation regions by having a plurality of electrically connected gate electrodes.

[0240] Next, a method for driving the light-emitting device shown in FIGS. 24(A) and 24(B) will be described.

[0241] The scanning lines GL1 to GLy are sequentially selected. For example, when the scanning line GLj (j is a natural number from 1 to y) is selected, the transistor 5 12 connected to the scanning line GLj is turned on. Then, the potential of the image signal input to the signal lines SL1 to SLx is applied to the gate electrode of the transistor 513 when the transistor 512 is turned on. Then, when the selection of the scanning line GLj ends, the transistor 512 is turned off, and the potential of the image signal is held at the gate electrode of the transistor 513. And when the transistor 513 is on according to the potential of the image signal, current is supplied to the light-emitting element 515

[0242] to turn on the light-emitting element 515. Since the value of the current flowing through the light-emitting element 515 is determined by the drain current of the transistor 513, the luminance of the light-emitting element 515 is determined according to the potential of the image signal. Conversely, when the transistor 513 is off according to the potential of the image signal, no current is supplied to the light-emitting element 515, and the light-emitting element 515 is turned off.

[0243] By the above operation, an image can be displayed.

[0244] Note that in FIG. 24(B), one transistor 512 is used as a switching element. ​​​Although it is shown for a case, the present invention is not limited to this configuration. One switching element and a plurality of transistors functioning as such may be used for the pixel 511. When the plurality of transistors function as one switching element, the plurality of transistors may be connected in parallel, in series, or in a combination of series and parallel.

[0245] Since the transistor 512 includes an oxide semiconductor in the channel formation region, a transistor 512 with an extremely small off-current and high breakdown voltage can be realized. Then, by using the transistor 512 having the above-described configuration as a switching element, compared with the case of using a transistor formed of a semiconductor material such as a normal silicon or germanium, leakage of charges accumulated in the gate electrode of the transistor 513 can be prevented. By using the transistor 512 with an extremely small off-current, a long period during which the potential of the gate electrode of the transistor 513 is maintained can be ensured. Therefore, in the case where image signals having the same image information are written in the pixel portion 510 over several consecutive frame periods like a still image, even if the driving frequency is lowered, that is, even if the number of times of writing the image signal to the pixel portion 510 within a certain period is reduced, the display of the image can be maintained.

[0246] For example, by using the transistor 512 using a highly purified oxide semiconductor for the active layer, the interval between writings of the image signal can be made 10 seconds or more, preferably 30 seconds or more, more preferably 1 minute or more. And the longer the interval at which the image signal is written, the more the power consumption can be reduced. ​

[0247] In addition, since the potential of the image signal can be held for a longer period of time, In order to hold the potential, the capacitor 514 is not connected to the gate electrode of the transistor 513. Therefore, the capacitor 514 is not required. By reducing the size of the capacitor 514, the aperture ratio can be increased. Since this can reduce power consumption of the light emitting device.

[0248] Next, for the layout of the pixel 511 shown in FIG. 24(B), FIG. 21 to FIG. 23 are used. FIG. 21 is an example of a top view of a pixel 511. FIG. 22 is a top view of the pixel 511 shown in FIG. 1 corresponds to an example of a cross-sectional view taken along dashed lines D1-D2 and D3-D4 in the top view shown in FIG. FIG. 23 is an example of a cross-sectional view taken along a dashed line D5-D6 in the top view shown in FIG. However, in order to clearly show the layout of the pixel 511, various insulating layers are not shown in FIG. The film is omitted in the top view of the pixel 511. In addition, in FIG. In order to clearly show the layout of the semiconductor element, the EL layer and the counter electrode of the light emitting element 515 are A top view of pixel 511 is shown with the poles omitted.

[0249] In the pixel 511 shown in FIGS. 21 to 23, the transistor 512 has an insulating surface. A conductive film 401 functioning as a gate electrode and a gate insulating film on the conductive film 401 are provided on a substrate 400. The insulating film 402 and the semiconductor film 403 are disposed on the gate insulating film 402 at a position where the insulating film 402 and the conductive film 401 overlap each other. A semiconductor film 403 is disposed on the semiconductor film 403 at a position where the semiconductor film 403 overlaps with the conductive film 401, and a channel An insulating film 404 that functions as a protective film, and a conductive film 405 and a conductive film 406 that function as a source terminal or a drain terminal and are located on the semiconductor film 403. It has.

[0250] The conductive film 401 also functions as a scanning line GL that applies a potential to the gate electrode of the transistor 512. Further, the conductive film 405 also functions as a signal line SL that applies the potential of the image signal to the pixel 511. It functions.

[0251] Further, the transistor 513 includes a conductive film 407 that functions as a gate electrode, a gate insulating film 402 on the conductive film 407, a semiconductor film 403 that is located on the gate insulating film 402 at a position overlapping the conductive film 407, an insulating film 408 that is located on the semiconductor film 403 at a position overlapping the conductive film 407 and functions as a channel protection film, and a conductive film 409 and a conductive film 410 that function as a source terminal or a drain terminal and are located on the semiconductor film 403, on a substrate 400 having an insulating surface. It has. It has. It has. It has. It has.

[0252] The capacitor element 514 includes a conductive film 407, a gate insulating film 402 and a semiconductor film 403 on the conductive film 407, and a conductive film 410 that is located on the gate insulating film 402 and the semiconductor film 403 at a position overlapping the conductive film 407, on a substrate 400 having an insulating surface. It has. It has.

[0253] Further, an insulating film 411 is provided on the conductive film 405, the conductive film 406, the conductive film 409, and the conductive film 410. And openings 412, 413, and 414 are provided in the insulating film 411, the semiconductor film 403, and the gate insulating film 402. It has. It has.

[0254] The opening 412 is provided between the conductive film 406 and the conductive film 409. Further, the opening 4 A part of the region where 12 is formed overlaps with a part of the region where the conductive film 406 is formed and a part of the region where the conductive film 407 is formed. At the opening 412, the insulating film 411 on the conductive film 406, the insulating film 411 on the conductive film 407, the semiconductor film 403, and the gate insulating film 402 have been removed, and the conductive film 406 and the conductive film 407 are electrically connected by the conductive film 415 on the conductive film 406 and the conductive film 407.

[0255] The opening 413 is provided between the conductive film 410, the conductive film 405, and the conductive film 406. Also, a part of the region where the opening 413 is formed overlaps with a part of the region where the conductive film 409 is formed. At the opening 413, the insulating film 411 on the conductive film 409 has been removed, and the conductive film 409 is connected to the conductive film 416 that functions as a pixel electrode on the conductive film 409 and the insulating film 411.

[0256] The opening 414 is provided between the conductive film 410 and the conductive film 405 between adjacent pixels 511. At the opening 414, the insulating film 411, the semiconductor film 403, and the gate insulating film 40 2 have been removed.

[0257] In FIGS. 21 to 23, a case where a part of the region where the opening 412 is formed overlaps with a part of the region where the conductive film 40 6 is formed and a part of the region where the conductive film 407 is formed is illustrated. In this case, the connection between the conductive film 406 and the conductive film 415 and the connection between the conductive film 407 and the conductive film 415 are both performed at the opening 412. However, in one aspect of the present invention, the connection between the conductive film 406 and the conductive film 415 and the connection between the conductive film 407 and the conductive film 415 and The connection of the conductive film 415 may be performed at different openings from each other.

[0258] FIG. 25 shows an example of a cross-sectional view of pixel 511 at the connection points of the conductive film 406, the conductive film 407, and the conductive film 415. In FIG. 25, at the opening 412a provided in the insulating film 411, the conductive film 406 and the conductive film 415 are connected. Also, at the opening 412b provided in the insulating film 411, the semiconductor film 403 and the gate insulating film 402, the conductive film 407 and the conductive film 41 5 are connected.

[0259] However, as shown in FIGS. 21 to 23, when the connection of the conductive film 406 and the conductive film 415 and the connection of the conductive film 4 07 and the conductive film 415 are both performed at the opening 412, there is no need to secure a region for forming a plurality of openings, so high-definition of the pixel portion 510 can be realized. This can be achieved.

[0260] Also, an insulating film 417 is provided on the insulating film 411 so as to partially cover the conductive film 416. The opening 418 of the insulating film 417 overlaps a part of the conductive film 416, and at the opening 4 18, an EL layer 419 and a conductive film 420 functioning as a counter electrode are sequentially laminated on the conductive film 416. The portion where the conductive film 416, the EL layer 419, and the conductive film 420 are laminated functions as a light-emitting element 515.

[0261] This embodiment can be implemented in appropriate combination with other embodiments.

[0262] (Embodiment 8) In this embodiment, taking the pixel 511 shown in FIGS. 21 to 23 as an example, a method for manufacturing a light-emitting device according to an aspect of the present invention will be described. ​​​

[0263] First, as shown in FIG. 26(A), on a substrate 400 having an insulating surface, a conductive film 407 that functions as a gate electrode is formed. The conductive film 407 functions.

[0264] There is no major limitation on the substrate that can be used as the substrate 400 having an insulating surface, but at least it is necessary to have heat resistance to withstand subsequent heat treatment. For example, a glass substrate manufactured by the fusion method or the float method can be used. When the temperature of the subsequent heat treatment is high, it is preferable to use a glass substrate having a strain point of 730 °C or higher as the glass substrate. For example, glass materials such as aluminosilicate glass, aluminoborosilicate glass, and barium borosilicate glass are used for the glass substrate. As the glass substrate, when the temperature of the subsequent heat treatment is high, it is good to use one with a strain point of 730 °C or higher. In addition, for the glass substrate, for example, glass materials such as aluminosilicate glass, aluminoborosilicate glass, and barium borosilicate glass are used. The glass substrate uses glass materials such as aluminosilicate glass, aluminoborosilicate glass, and barium borosilicate glass.

[0265] Instead of the above glass substrate, a substrate made of an insulator such as a ceramic substrate, a quartz substrate, or a sapphire substrate may be used. In addition, crystallized glass or the like can be used. A substrate in which an insulating film is provided on the surface of a metal substrate such as a stainless alloy may be applied. However, when the light-emitting device has a bottom emission structure in which the light from the light-emitting element 515 is directed toward the substrate 400 side, a substrate having translucency is used for the substrate 400. Instead of the above glass substrate, a substrate made of an insulator such as a ceramic substrate, a quartz substrate, or a sapphire substrate may be used. In addition, crystallized glass or the like can be used. A substrate in which an insulating film is provided on the surface of a metal substrate such as a stainless alloy may be applied. However, when the light-emitting device has a bottom emission structure in which the light from the light-emitting element 515 is directed toward the substrate 400 side, a substrate having translucency is used for the substrate 400. When the light-emitting device has a bottom emission structure in which the light from the light-emitting element 515 is directed toward the substrate 400 side, a substrate having translucency is used for the substrate 400.

[0266] The material of the conductive film 407 can be a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, neodymium, scandium, niobium, etc., a conductive film using an alloy material mainly composed of these metal materials, or nitrides of these metals, which can be used singly or in layers. The material of the conductive film 407 can be a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, neodymium, scandium, niobium, etc., a conductive film using an alloy material mainly composed of these metal materials, or nitrides of these metals, which can be used singly or in layers. If it can withstand the temperature of the heat treatment performed in the subsequent process, aluminum or copper can also be used as the above metal material. Aluminum or copper can also be used as the above metal material if it can withstand the temperature of the heat treatment performed in the subsequent process. Aluminum or copper has heat resistance. To avoid problems such as heat and corrosion, it is advisable to use it in combination with a high melting point metal material. High As the high melting point metal material, molybdenum, titanium, chromium, tantalum, tungsten, neodymium, scandium, etc. can be used.

[0267] For example, as the conductive film 407 having a two-layer structure, a two-layer structure in which a copper film is laminated on a titanium film, a two-layer structure in which a molybdenum film is laminated on an aluminum film, a two-layer structure in which a molybdenum film is laminated on a copper film, a two-layer structure in which a titanium nitride film or a tantalum nitride film is laminated on a copper film, or a two-layer structure in which a titanium nitride film and a molybdenum film are laminated is preferred. As the conductive film 407 having a three-layer structure, for example, a three-layer structure in which a titanium nitride film, a copper film, and a tungsten film are laminated is preferred.

[0268]

[0269] In addition, a metal oxide having light transmittance such as indium oxide, indium oxide-tin oxide, indium oxide-zinc oxide, zinc oxide, zinc aluminum oxide, aluminum zinc oxynitride, or zinc gallium oxide can also be used for the conductive film 407.

[0269] The film thickness of the conductive film 407 is 10 nm to 400 nm, preferably 100 nm to 200 nm. In this embodiment, after forming a tungsten film with a film thickness of 200 nm by sputtering, the tungsten film is processed (patterned) into a desired shape by etching using photolithography to form the conductive film 407. Note that if the end of the formed conductive film 407 has a tapered shape, the coverage of the gate insulating film 402 laminated thereon is improved, which is preferable. Note that a resist mask may be formed by an inkjet method. Resist mask ​​​​When forming the scribe by the inkjet method, since a photomask is not used, the manufacturing cost can be reduced. It is possible.

[0270] In addition, in the present embodiment, the case where the conductive film 407 is directly formed on the substrate 400 is exemplified. However, after forming an insulating film that functions as an underlayer film on the substrate 400, the conductive film 407 may be formed on the underlayer film. As the underlayer film, for example, any one of a silicon oxide film, a silicon oxynitride film, a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, or an aluminum oxynitride film can be used alone or in a plurality of layers laminated. In particular, by using an insulating film with high barrier properties, such as a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, an aluminum oxide film, or an aluminum oxynitride film, impurities in the atmosphere such as moisture or hydrogen, or impurities such as alkali metals or heavy metals contained in the substrate 400 can be prevented from entering the semiconductor film 403, the gate insulating film 402, or the interface and its vicinity between the semiconductor film 403 and other insulating films formed later. For the underlayer film, for example, any one of a silicon oxide film, a silicon oxynitride film, a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, or an aluminum oxynitride film can be used alone or in a plurality of layers laminated. For the underlayer film, for example, any one of a silicon oxide film, a silicon oxynitride film, a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, or an aluminum oxynitride film can be used alone or in a plurality of layers laminated. In particular, by using an insulating film with high barrier properties, such as a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, an aluminum oxide film, or an aluminum oxynitride film, impurities in the atmosphere such as moisture or hydrogen, or impurities such as alkali metals or heavy metals contained in the substrate 400 can be prevented from entering the semiconductor film 403, the gate insulating film 402, or the interface and its vicinity between the semiconductor film 403 and other insulating films formed later. For the underlayer film, for example, any one of a silicon oxide film, a silicon oxynitride film, a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, or an aluminum oxynitride film can be used alone or in a plurality of layers laminated. In particular, by using an insulating film with high barrier properties, such as a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, an aluminum oxide film, or an aluminum oxynitride film, impurities in the atmosphere such as moisture or hydrogen, or impurities such as alkali metals or heavy metals contained in the substrate 400 can be prevented from entering the semiconductor film 403, the gate insulating film 402, or the interface and its vicinity between the semiconductor film 403 and other insulating films formed later. For the underlayer film, for example, any one of a silicon oxide film, a silicon oxynitride film, a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, or an aluminum oxynitride film can be used alone or in a plurality of layers laminated. In particular, by using an insulating film with high barrier properties, such as a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, an aluminum oxide film, or an aluminum oxynitride film, impurities in the atmosphere such as moisture or hydrogen, or impurities such as alkali metals or heavy metals contained in the substrate 400 can be prevented from entering the semiconductor film 403, the gate insulating film 402, or the interface and its vicinity between the semiconductor film 403 and other insulating films formed later. For the underlayer film, for example, any one of a silicon oxide film, a silicon oxynitride film, a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, or an aluminum oxynitride film can be used alone or in a plurality of layers laminated. In particular, by using an insulating film with high barrier properties, such as a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, an aluminum oxide film, or an aluminum oxynitride film, impurities in the atmosphere such as moisture or hydrogen, or impurities such as alkali metals or heavy metals contained in the substrate 400 can be prevented from entering the semiconductor film 403, the gate insulating film 402, or the interface and its vicinity between the semiconductor film 403 and other insulating films formed later. For the underlayer film, for example, any one of a silicon oxide film, a silicon oxynitride film, a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, or an aluminum oxynitride film can be used alone or in a plurality of layers laminated. In particular, by using an insulating film with high barrier properties, such as a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, an aluminum oxide film, or an aluminum oxynitride film, impurities in the atmosphere such as moisture or hydrogen, or impurities such as alkali metals or heavy metals contained in the substrate 400 can be prevented from entering the semiconductor film 403, the gate insulating film 402, or the interface and its vicinity between the semiconductor film 403 and other insulating films formed later. For the underlayer film, for example, any one of a silicon oxide film, a silicon oxynitride film, a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, or an aluminum oxynitride film can be used alone or in a plurality of layers laminated. In particular, by using an insulating film with high barrier properties, such as a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, an aluminum oxide film, or an aluminum oxynitride film, impurities in the atmosphere such as moisture or hydrogen, or impurities such as alkali metals or heavy metals contained in the substrate 400 can be prevented from entering the semiconductor film 403, the gate insulating film 402, or the interface and its vicinity between the semiconductor film 403 and other insulating films formed later.

[0271] In this specification, an oxynitride means a substance having a higher oxygen content than nitrogen in its composition, and a nitride oxide means a substance having a higher nitrogen content than oxygen in its composition. In this specification, an oxynitride means a substance having a higher oxygen content than nitrogen in its composition, and a nitride oxide means a substance having a higher nitrogen content than oxygen in its composition. In this specification, an oxynitride means a substance having a higher oxygen content than nitrogen in its composition, and a nitride oxide means a substance having a higher nitrogen content than oxygen in its composition.

[0272] Note that FIG. 28 is a top view of the light-emitting device at the time when the above-described process is completed. The cross-sectional view taken along the chain double-dashed line D5 - D6 in FIG. 28 corresponds to FIG. 26(A). Note that FIG. 28 is a top view of the light-emitting device at the time when the above-described process is completed. The cross-sectional view taken along the chain double-dashed line D5 - D6 in FIG. 28 corresponds to FIG. 26(A).

[0273] Next, as shown in FIG. 26(B), a gate insulating film 402 is formed on the conductive film 407. . The gate insulating film 402 can be formed by using a plasma CVD method, a sputtering method, or the like to form a single layer or a laminate of a silicon oxide film, a silicon nitride film, a silicon oxynitride film, a silicon nitride oxide film, an aluminum oxide film, an aluminum nitride film, an aluminum oxynitride film, an aluminum nitride oxide film, a hafnium oxide film, a yttrium oxide film, a gallium oxide film, a lanthanum oxide film, or a tantalum oxide film. The gate insulating film 402 desirably contains as few impurities as possible, such as moisture and hydrogen. The gate insulating film 402 may be composed of a single insulating film or may be composed of a stack of a plurality of insulating films. In any case, it is desirable to form the gate insulating film 402 so that an insulating film containing an amount of oxygen exceeding the stoichiometric composition is in contact with the semiconductor film 403 to be formed later. With the above configuration, oxygen can be supplied from the gate insulating film 402 to the semiconductor film 403, so that a transistor 513 having good electrical characteristics can be obtained.

[0274]

[0275] When forming the gate insulating film 402 having a structure in which a highly barrier insulating film and an oxygen-containing insulating film are laminated, it is desirable to provide the highly barrier insulating film between the oxygen-containing insulating film and the conductive film 40 7. By using a highly barrier insulating film, impurities in the atmosphere such as moisture or hydrogen, or impurities such as alkali metals and heavy metals contained in the substrate 400 can be prevented from entering the semiconductor film 403, the gate insulating film 402, or the interface and its vicinity between the semiconductor film 403 and other insulating films. Examples of the highly barrier insulating film include a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, an aluminum oxide film, or ​​​​​​​​​​​​Examples include an aluminum oxynitride film.

[0276] The thickness of the gate insulating film 402 may be appropriately set according to the characteristics required for the transistor 513. For example, it may be 1 nm or more and 800 nm or less, preferably 200 nm or more and 500 nm or less. By forming the gate insulating film 402 thick, the breakdown voltage of the transistor 513 can be improved. In this embodiment, a silicon oxynitride film with a thickness of 100 nm formed by the plasma CVD method is used as the gate insulating film 402.

[0277] Next, as shown in FIG. 26(B), a semiconductor film 403 with a thickness of 2 nm or more and 200 nm or less, preferably a thickness of 3 nm or more and 50 nm or less, more preferably a thickness of 3 nm or more and 20 nm or less is formed on the gate insulating film 402. The semiconductor film 403 is formed by using an oxide semiconductor as a target and by sputtering. Further, the semiconductor film 403 can be formed by sputtering in an atmosphere of a rare gas (e.g., argon), an oxygen atmosphere, or an atmosphere of a mixture of a rare gas (e.g., argon) and oxygen. (e.g., argon)

[0278] Before forming the oxide semiconductor film by sputtering, it is preferable to perform reverse sputtering in which argon gas is introduced to generate plasma to remove dust adhering to the surface of the gate insulating film 402. Reverse sputtering is a method in which a voltage is applied to the substrate side using an RF power source in an argon atmosphere without applying a voltage to the target side to form plasma near the substrate and modify the surface. Note that nitrogen, helium, etc. may be used instead of the argon atmosphere. Further, it may be performed in an atmosphere in which oxygen, nitrous oxide, etc. are added to the argon atmosphere. It may also be carried out in an atmosphere in which chlorine, carbon tetrafluoride, etc. are added to the argon atmosphere.

[0279] As the oxide semiconductor used for the semiconductor film 403, as described above, indium oxide, stannum oxide, zinc oxide, In-Zn based oxide which is a binary metal oxide, Sn-Zn based oxide, A l-Zn based oxide, Zn-Mg based oxide, Sn-Mg based oxide, In-Mg based oxide, I n-Ga based oxide, In-Ga-Zn based oxide which is a ternary metal oxide (also denoted as IGZO) , In-Al-Zn based oxide, In-Sn-Zn based oxide, Sn-Ga-Zn based oxide, Al-Ga-Zn based oxide, Sn-Al-Zn based oxide, In-Hf-Zn based oxide, In-La-Zn based oxide, In-Pr-Zn based oxide, In-Nd-Zn based acid oxide, In-Sm-Zn based oxide, In-Eu-Zn based oxide, In-Gd-Zn based oxidation oxide, In-Tb-Zn based oxide, In-Dy-Zn based oxide, In-Ho-Zn based oxide , In-Er-Zn based oxide, In-Tm-Zn based oxide, In-Yb-Zn based oxide, In-Lu-Zn based oxide, In-Sn-Ga-Zn based oxide which is a quaternary metal oxide , In-Hf-Ga-Zn based oxide, In-Al-Ga-Zn based oxide, In-Sn-A l-Zn based oxide, In-Sn-Hf-Zn based oxide, In-Hf-Al-Zn based oxide and the like can be mentioned.

[0280] Note that, for example, the semiconductor film 403 can be formed by a sputtering method using a target containing In (indium), Ga (gallium), and Zn ( zinc). When forming the In-Ga- Zn-based semiconductor film 403 by a sputtering method, preferably, the atomic ratio is I n:Ga:Zn=1:1:1, 4:2:3, 3:1:2, 1:1:2, 2:1:3, or The target is an In-Ga-Zn oxide with a ratio of 3:1:4. The oxide semiconductor film is formed using an In-Ga-Zn oxide target having a ratio of In addition, the In, Ga, and Zn-containing alloys are more likely to form polycrystals or CAAC. The target filling rate is 90% or more and 100% or less, preferably 95% or more and less than 100%. By using a target with a high filling rate, the oxide semiconductor film formed is a dense film. become.

[0281] When an In-Zn oxide is used as the oxide semiconductor, the composition of the target is In atomic ratio, In:Zn=50:1 to 1:2 (converted to molar ratio, In 2 O 3 :Zn O=25:1 to 1:4), preferably In:Zn=20:1 to 1:1 (converted into molar ratio) In 2 O 3 In:ZnO=10:1 to 1:2), and more preferably In:Zn=1.5: 1 to 15:1 (converted to molar ratio: In 2 O 3 ZnO=3:4~15:2). For example, the target used for forming the semiconductor film 403, which is an In-Zn oxide, has an atomic number of When the ratio is In:Zn:O=X:Y:Z, Z>1.5X+Y. The ratio of Zn is within the above range. By fitting the electrodes in a certain area, it is possible to improve the mobility.

[0282] In addition, when an In-Sn-Zn oxide material is used as the oxide semiconductor, the target The composition of the sintered material is In:Sn:Zn atomic ratio of 1:2:2, 2:1:3, 1:1:1, Or you could use 20:45:35.

[0283] In this embodiment, the substrate is held in a processing chamber that is maintained in a reduced pressure state, and residual moisture in the processing chamber is removed. While removing the hydrogen and moisture, a sputtering gas from which hydrogen and moisture have been removed is introduced, and the above target is used. An oxide semiconductor film is formed over a substrate 400. In order to remove moisture remaining in the treatment chamber, an absorbent is used. It is preferable to use a vacuum pump of the attachment type. For example, a cryopump, an ion pump, a ch It is preferable to use a sublimation pump. A pump with a cold trap may be used. When the gas is evacuated, hydrogen atoms, water (H 2 O) and other compounds containing hydrogen atoms (preferably Since the oxide semiconductor formed in the treatment chamber is exhausted, The concentration of impurities contained in the film can be reduced.

[0284] There are three methods for forming the semiconductor film 403 made of CAAC-OS. The first method is to form the semiconductor film 403 at a film formation temperature of 200° C. or more and 450° C. or less. The second method is to form a thin semiconductor film 403 and then heat the film at a temperature of 200° C. to 700° C. The third method is to perform the following heat treatment after forming a thin oxide semiconductor film as a first layer. A heat treatment is performed at 200°C to 700°C, and then a second oxide semiconductor film is formed. In this way, the semiconductor film 403 is formed.

[0285] In this embodiment, the distance between the substrate 400 and the target is 100 mm, the pressure is 0.4 Pa, and the direct current is The DC power supply was 0.5 kW, the substrate temperature was 250°C, and the flow rates of argon and oxygen were 30 In an atmosphere of sccm and 15 sccm, including an In-Ga-Zn-based oxide semiconductor, A semiconductor film 403 with a thickness of 25 nm is formed.

[0286] In order to make the semiconductor film 403 contain as little hydrogen, hydroxyl groups and moisture as possible, As a pretreatment for the formation, the substrate 400 on which the gate insulating film 402 has been formed up to is preheated in the preheating chamber of the sputtering apparatus, and impurities such as moisture or hydrogen adsorbed on the substrate 400 are desorbed and exhausted. The preheating temperature is preferably 100 °C or higher and 400 °C or lower, more preferably 150 °C or higher and 300 °C or lower.

[0287] Note that the semiconductor film 403 formed by sputtering or the like may contain a large amount of moisture or hydrogen (including hydroxyl groups) as impurities. Moisture or hydrogen easily forms donor levels and is therefore an impurity for the oxide semiconductor. Therefore, in one aspect of the present invention, after the semiconductor film 403 is formed, in order to reduce impurities such as moisture or hydrogen in the semiconductor film 403 (dehydration or dehydrogenation), the semiconductor film 403 is heat-treated in an inert gas atmosphere such as nitrogen or a rare gas under a reduced pressure atmosphere.

[0288] By heat-treating the semiconductor film 403, moisture or hydrogen in the semiconductor film 403 can be desorbed. Specifically, heat treatment may be performed at a temperature of 250 °C or higher and 750 °C or lower, preferably 400 °C or higher and lower than the strain point of the substrate. If the RTA method is used for the heat treatment, dehydration or dehydrogenation can be performed in a short time, so that the treatment can be performed even at a temperature exceeding the strain point of the glass substrate. In this embodiment, heat treatment is performed at 450 °C for about 1 hour in an ultra-dry air atmosphere.

[0289] The heat treatment device is not limited to an electric furnace, and may be a heat treatment device using heat conduction or heat radiation from a heating element such as a resistance heating element. The apparatus may be equipped with a device for heating the object to be treated by irradiation. For example, a GRTA (Gas Rapid Thermal Anneal) equipment, LRTA (Lamp Rapid RTA (Rapid Thermal Anneal) equipment etc. The LRTA device can be equipped with halogen lamps, metal halide lamps, etc. Lamps, xenon arc lamps, carbon arc lamps, high pressure sodium lamps, high pressure water A device that heats the workpiece by radiating light (electromagnetic waves) emitted from a lamp such as a silver lamp. The GRTA device is a device that uses high-temperature gas for heat treatment. An inert gas that does not react with the workpiece during heat treatment, such as a rare gas such as argon or nitrogen. The body is used.

[0290] In the heat treatment, nitrogen or rare gas such as helium, neon, or argon is mixed with water or water. It is preferable that the nitrogen or helium introduced into the heat treatment device is not included. The purity of rare gases such as neon and argon is 6N (99.9999%) or more, preferably 7N (99.9999%) or more. N (99.99999%) or more (i.e., impurity concentration is 1 ppm or less, preferably 0.1 ppm pm or less).

[0291] Through the above steps, the concentration of moisture or hydrogen in the semiconductor film 403 can be reduced. In addition, moisture or hydrogen is removed from the semiconductor film 403 by the heat treatment. There is a possibility that oxygen vacancies due to desorption are increased. Therefore, after the above heat treatment, the semiconductor film It is desirable to carry out a process of supplying oxygen to 403 to reduce oxygen vacancies.

[0292] The semiconductor is purified by reducing the concentration of moisture or hydrogen and reducing the oxygen deficiency, and then a highly pure semiconductor film 403 is used to fabricate a transistor 513 with high withstand voltage and extremely small off-current. The semiconductor is purified by reducing the concentration of moisture or hydrogen and reducing the oxygen deficiency, and then a highly pure semiconductor film 403 is used to fabricate a transistor 513 with high withstand voltage and extremely small off-current. 3 can be manufactured.

[0293] For example, by performing heat treatment in a gas atmosphere containing oxygen, oxygen can be supplied to the semiconductor film 403. The heat treatment for supplying oxygen may be carried out under the same conditions as the heat treatment for reducing the concentration of moisture or hydrogen described above. However, the heat treatment for supplying oxygen should be carried out in an atmosphere such as oxygen gas or ultra-dry air (the moisture content measured using a dew point meter of the CRDS (cavity ring-down spectroscopy) method is 20 ppm or less (dew point conversion of -55 °C or less), preferably 1 ppm or less, preferably 10 ppb or less of air).

[0294] ) or less, preferably 1 ppm or less, preferably 10 ppb or less of air).

[0294]

[0295] It is preferable that the concentration of impurities contained in the gas containing oxygen is 1 ppm or less, preferably 0.1 ppm or less.

[0296] Alternatively, oxygen can be supplied to the semiconductor film 403 by using an ion implantation method, an ion doping method, a plasma immersion ion implantation method, a plasma treatment, etc. After supplying oxygen to the semiconductor film 403 using the above method, if the crystal part contained in the semiconductor film 403 is damaged, heat treatment may be performed to repair the damaged crystal part.

[0296] ​​A resist mask for forming the semiconductor film 403 may be formed by an inkjet method. When forming the resist mask by the inkjet method, since a photomask is not used, the manufacturing cost can be reduced.

[0297] Next, as shown in Fig. 26(C), after forming an insulating film on the semiconductor film 403, it is processed into a desired shape by etching using a photolithography method to form an island-shaped insulating film 408 that functions as a channel protection film. The insulating film 408 is provided at a position overlapping with the conductive film 407 on the semiconductor film 403. The insulating film 408 is provided at a position overlapping with the conductive film 407 on the semiconductor film 403. The insulating film 408 is provided at a position overlapping with the conductive film 407 on the semiconductor film 403.

[0298] The thickness of the insulating film 408 is 50 nm or more and 600 nm or less, preferably 100 nm or more and 400 nm or less. And the insulating film 408 can be formed using the same structure and material as the gate insulating film 402. And, like the gate insulating film 402, the insulating film 408 desirably contains as few impurities such as water and hydrogen as possible, and desirably contains oxygen in an amount exceeding the stoichiometric composition. With the above configuration, the concentration of impurities such as water and hydrogen in the semiconductor film 403 can be kept low, and oxygen can be supplied from the insulating film 408 to the semiconductor film 403, so that a transistor 513 having good electrical characteristics can be obtained. The insulating film 408 is provided at a position overlapping with the conductive film 407 on the semiconductor film 403. The thickness of the insulating film 408 is 50 nm or more and 600 nm or less, preferably 100 nm or more and 400 nm or less. And the insulating film 408 can be formed using the same structure and material as the gate insulating film 402. And, like the gate insulating film 402, the insulating film 408 desirably contains as few impurities such as water and hydrogen as possible, and desirably contains oxygen in an amount exceeding the stoichiometric composition. With the above configuration, the concentration of impurities such as water and hydrogen in the semiconductor film 403 can be kept low, and oxygen can be supplied from the insulating film 408 to the semiconductor film 403, so that a transistor 513 having good electrical characteristics can be obtained. The thickness of the insulating film 408 is 50 nm or more and 600 nm or less, preferably 100 nm or more and 400 nm or less. And the insulating film 408 can be formed using the same structure and material as the gate insulating film 402. And, like the gate insulating film 402, the insulating film 408 desirably contains as few impurities such as water and hydrogen as possible, and desirably contains oxygen in an amount exceeding the stoichiometric composition. With the above configuration, the concentration of impurities such as water and hydrogen in the semiconductor film 403 can be kept low, and oxygen can be supplied from the insulating film 408 to the semiconductor film 403, so that a transistor 513 having good electrical characteristics can be obtained. can be obtained.

[0299] In this embodiment, a silicon oxynitride film with a thickness of 300 nm formed by plasma CVD is used as the insulating film 408. used as the insulating film 408.

[0300] Note that the insulating film 408 is a metal oxide containing at least one of In or Zn, and by containing Ti, Zr, Hf, Ge, Ce, etc., it has higher insulation than the semiconductor film 403. A metal oxide with enhanced properties may be used.

[0301] For example, an In-M 1 -M 2 -Zn-based oxide may be used for the insulating film 408. However, the element M 1 is a trivalent element among the elements included in Group 3A, Group 3B, and Group 4A. The element M 2 is a tetravalent element among the elements included in Group 4A and Group 4B. Specifically, when Ga is used for the element M 1 in the In-M 1 -M 2 -Zn-based oxide, a part of the trivalent Ga will be replaced by a tetravalent element. Since a tetravalent element has one more single bond than a trivalent element, by replacing a part of the trivalent element with a tetravalent element, the bonding force between the metal element (M or M 1 -M 2 -Zn constituting the -Zn-based oxide and oxygen can be increased. 1 or M 2 ) Therefore, by using an In-M 1 -M 2 -Zn-based oxide for the insulating film 408, the insulation property of the insulating film 408 can be enhanced. Specifically, examples of the element M 2 include Ti, Zr, Hf, Ge, Ce, etc.

[0302] For example, an insulating film 408 using an In-M -M 1 -M 2 -Zn-based oxide can be formed by sputtering using a target of In:Zr:Ga:Zn = 3:0.05:0.95:2. That's all.

[0303] Also, for example, an In-M-Zn-based oxide represented by the chemical formula InMZnO x can be used for the insulating film 408. It may also be used. As the element M, an element is applied such that the insulating property of the In-M-Zn-based oxide is higher than the insulating property of the metal oxide constituting the semiconductor film 403. For example, as the element M, tetravalent elements such as Ti, Zr, Hf, Ge, and Ce can be applied. Since tetravalent elements have more single bonds than trivalent elements, the In-M-Zn-based oxide using these tetravalent elements as the element M has a high binding force between the element M and oxygen. Therefore, by using the In-M-Zn-based oxide for the insulating film 408, the insulating property of the insulating film 408 can be enhanced. For example, as the element M, tetravalent elements such as Ti, Zr, Hf, Ge, and Ce can be applied. Since tetravalent elements have more single bonds than trivalent elements, the In-M-Zn-based oxide using these tetravalent elements as the element M has a high binding force between the element M and oxygen. Therefore, by using the In-M-Zn-based oxide for the insulating film 408, the insulating property of the insulating film 408 can be enhanced. For example, as the element M, tetravalent elements such as Ti, Zr, Hf, Ge, and Ce can be applied. Since tetravalent elements have more single bonds than trivalent elements, the In-M-Zn-based oxide using these tetravalent elements as the element M has a high binding force between the element M and oxygen. Therefore, by using the In-M-Zn-based oxide for the insulating film 408, the insulating property of the insulating film 408 can be enhanced.

[0304] For example, the energy gap of the In-Zr-Zn-based oxide using Zr as the element M is larger than the energy gap (about 3.2 eV) of the In-Ga-Zn-based oxide. That is, it can be said that the In-Zr-Zn-based oxide has higher insulating property than the In-Ga-Zn-based oxide. For example, the energy gap of the In-Zr-Zn-based oxide using Zr as the element M is larger than the energy gap (about 3.2 eV) of the In-Ga-Zn-based oxide. That is, it can be said that the In-Zr-Zn-based oxide has higher insulating property than the In-Ga-Zn-based oxide. For example, the energy gap of the In-Zr-Zn-based oxide using Zr as the element M is larger than the energy gap (about 3.2 eV) of the In-Ga-Zn-based oxide. That is, it can be said that the In-Zr-Zn-based oxide has higher insulating property than the In-Ga-Zn-based oxide. For example, the energy gap of the In-Zr-Zn-based oxide using Zr as the element M is larger than the energy gap (about 3.2 eV) of the In-Ga-Zn-based oxide. That is, it can be said that the In-Zr-Zn-based oxide has higher insulating property than the In-Ga-Zn-based oxide.

[0305] Also, the electronegativity of yttrium is smaller than that of Ga. Therefore, in the In-M-Zn-based oxide, when the element M is yttrium, the difference in electronegativity between oxygen and the element M can be increased, and the bond formed by ionic bonding with oxygen in the metal oxide can be made stronger. Therefore, even when the element M is yttrium, the insulating property of the insulating film 408 using the In-M-Zn-based oxide can be enhanced. Also, in the In-M-Zn-based oxide, when the element M is yttrium, the difference in electronegativity between oxygen and the element M can be increased, and the bond formed by ionic bonding with oxygen in the metal oxide can be made stronger. 1 -M 2 -Z In the In-M-Zn-based oxide, when the element M 2 is yttrium, the difference in electronegativity between oxygen and the element M 2 can be increased, and the bond formed by ionic bonding with oxygen in the metal oxide can be made stronger. Therefore, even when the element M is yttrium, the insulating property of the insulating film 408 using the In-M-Zn-based oxide can be enhanced. Also, in the In-M-Zn-based oxide, when the element M is yttrium, the difference in electronegativity between oxygen and the element M can be increased, and the bond formed by ionic bonding with oxygen in the metal oxide can be made stronger. For example, the energy gap of the In-Zr-Zn-based oxide using Zr as the element M is larger than the energy gap (about 3.2 eV) of the In-Ga-Zn-based oxide. That is, it can be said that the In-Zr-Zn-based oxide has higher insulating property than the In-Ga-Zn-based oxide. 2 is yttrium, the insulating property of the insulating film 408 using the In-M-Zn-based oxide can be enhanced. Also, in the In-M-Zn-based oxide, when the element M is yttrium, the difference in electronegativity between oxygen and the element M can be increased, and the bond formed by ionic bonding with oxygen in the metal oxide can be made stronger. 1 -M 2 -Zn In the In-M-Zn-based oxide, when the element M is yttrium, the difference in electronegativity between oxygen and the element M can be increased, and the bond formed by ionic bonding with oxygen in the metal oxide can be made stronger. Therefore, even when the element M is yttrium, the insulating property of the insulating film 408 using the In-M-Zn-based oxide can be enhanced. Also, in the In-M-Zn-based oxide, when the element M is yttrium, the difference in electronegativity between oxygen and the element M can be increased, and the bond formed by ionic bonding with oxygen in the metal oxide can be made stronger. In the In-M-Zn-based oxide, when the element M is yttrium, the difference in electronegativity between oxygen and the element M can be increased, and the bond formed by ionic bonding with oxygen in the metal oxide can be made stronger. In the In-M-Zn-based oxide, when the element M is yttrium, the difference in electronegativity between oxygen and the element M can be increased, and the bond formed by ionic bonding with oxygen in the metal oxide can be made stronger. This is achievable. Therefore, even when the element M is yttrium, the insulating property of the insulating film 408 using the In-M-Zn based oxide can be enhanced. The insulating property of the insulating film 408 can be enhanced.

[0306] Also, the content of the element M in the In-M-Zn based oxide is 0.3 times or more and less than 1. 3 times the content of In. Also, the content of the element M in the In-M-Zn based oxide is 0.3 times or more and less than 1. 3 times the content of Zn. The smaller the relative number of In or Zn with respect to the element M, the more insulating insulating film 408 can be obtained.

[0307] Specifically, when forming a metal oxide material containing the element M by sputtering, preferably a metal oxide target with an atomic ratio of In:M:Zn = 1:1:1, 3:1:3, 3:2:4, 2:1:3, 4:5:4, or 4:2:3 is used.

[0308] Using an In-M-Zn based oxide or an In-M 1 -M 2 -Zn based oxide for the insulating film 408 can keep the state of the interface between the insulating film 408 and the semiconductor film 403 good, and can improve the electrical characteristics of the transistor 513.

[0309] Note that impurities tend to adhere to the surface of the semiconductor film 403 exposed by etching for forming the insulating film 408. The above impurities include elements constituting the etching gas or etching solution used for etching, or elements present in the processing chamber where etching is performed. Specific examples of the above impurities include boron, chlorine, fluorine, carbon, aluminum and the like.

[0310] ​When the above impurities adhere to the surface of the semiconductor film 403, an increase in the off-current of the transistor or deterioration of the electrical characteristics of the transistor is likely to occur. Also, parasitic channels are likely to occur in the semiconductor film 403, and conductive films that should be electrically separated are likely to be electrically connected through the semiconductor film 403. Therefore, in one aspect of the present invention, after etching for forming the insulating film 408 is completed, a cleaning process is performed to remove impurities that would have adhered to the surfaces of the semiconductor film 403 and the insulating film 408.

[0311] The cleaning process can be performed using an alkaline solution such as a TMAH (tetramethylammonium hydroxide) solution, water, or dilute hydrofluoric acid. Specifically, when dilute hydrofluoric acid is used for the cleaning process, 50 wt% hydrofluoric acid is diluted with water to 1 / 10 2 to 1 / 10 5 and used for the cleaning process It is desirable to use. That is, it is desirable to use dilute hydrofluoric acid with a concentration of 0.5 wt% to 5×10 -4 wt% for the cleaning process. By the cleaning process, the above impurities adhering to the surfaces of the semiconductor film 403 and the insulating film 408 can be removed. Also, when dilute hydrofluoric acid is used for the cleaning process, the impurities adhering to the semiconductor film 403 can be removed together with a part of the semiconductor film 403.

[0312] Next, after forming a conductive film on the semiconductor film 403 by sputtering or vacuum deposition, the conductive film is patterned by etching using photolithography, so that, as shown in FIG. 26 (D), conductive films 409 and 410 are formed on the semiconductor film 403 with the insulating film 408 interposed therebetween. The conductive films 409 and 410 are the transistors ​It functions as the source electrode or drain electrode of the resistor 513.

[0313] The conductive films 409 and 410 can have the same structure and material as the conductive film 407. When heat treatment is performed after the formation of the conductive films 409 and 410, it is preferable to endow the conductive films 409 and 410 with heat resistance to withstand this heat treatment. In this embodiment, tungsten films with a film thickness of 150 nm are used as the conductive films 409 and 410.

[0314] Note that when etching to form the conductive films 409 and 410, the respective materials and etching conditions are appropriately adjusted so that the semiconductor film 403 is not removed as much as possible. Depending on the etching conditions, a groove portion (recess) may be formed by partially etching the exposed portion of the semiconductor film 403.

[0315] In this embodiment, dry etching by the ICP etching method is used to form the conductive films 409 and 410. Specifically, after setting the flow rate of sulfur hexafluoride, which is the etching gas, to 50 sccm, the reaction pressure to 1.5 Pa, the temperature of the lower electrode to 70 °C, the RF (13.56 MHz) power input to the coil-type electrode to 500 W, and the power input to the lower electrode (bias side) to 50 W, the flow rate of boron trichloride, which is the etching gas, is set to 60 sccm, the flow rate of chlorine to 20 sccm, the reaction pressure to 1.9 Pa, the temperature of the lower electrode to 21 °C, the RF (13.56 MHz) power input to the coil-type electrode to 450 W, and the power input to the lower electrode (bias side) to 100 W, and the conditions are changed midway to perform dry etching.

[0316] In addition, in order to reduce the number of masks and processes used in the photolithography method, the transmitted light is Etching may be performed using a resist mask formed by a multi-tone mask that gives the transmitted light a multi-stage intensity. The resist mask formed using the multi-tone mask has a shape with a plurality of film thicknesses, and since the shape can be further deformed by performing etching, it can be used in a plurality of etching processes for processing into different patterns. Therefore, with a single multi-tone mask, a resist mask corresponding to at least two or more different patterns can be formed. Therefore, the number of exposure masks can be reduced, and the process can be simplified.

[0317] In addition, on the surfaces of the semiconductor film 403 and the insulating film 408 exposed by etching for forming the conductive films 409 and 410, impurities such as boron, chlorine, fluorine, carbon, and aluminum tend to adhere. Further, these impurities may include elements constituting the conductive films 409 and 410.

[0318] When the above impurities adhere to the surface of the semiconductor film 403, as described above, an increase in the off-current of the transistor or deterioration of the electrical characteristics of the transistor is likely to occur. Also, a parasitic channel is likely to occur in the semiconductor film 403, and conductive films that should be electrically separated are likely to be electrically connected through the semiconductor film 4 03. Therefore, in one aspect of the present invention, after the etching for forming the conductive films 409 and 410 is completed, a cleaning process is performed to remove impurities that may have adhered to the surfaces of the semiconductor film 403 and the insulating film 408.

[0319] ​​​​​The cleaning process can be performed using an alkaline solution such as a TMAH solution, water, or dilute hydrofluoric acid. Specifically, when dilute hydrofluoric acid is used for the cleaning process, it is desirable to dilute 50 wt% hydrofluoric acid with water to 1 / 10 2 to 1 / 10 5 and use it for the cleaning process. That is, it is desirable to use dilute hydrofluoric acid with a concentration of 0.5 wt% to 5×10 -4 wt% for the cleaning process. By the cleaning process, the above-mentioned impurities adhering to the surfaces of the semiconductor film 403 and the insulating film 408 can be removed. Further, when dilute hydrofluoric acid is used for the cleaning process, the impurities adhering to the semiconductor film 403 can be removed together with a part of the semiconductor film 403.

[0320] In this embodiment, the cleaning process for removing impurities after etching is described for the case of performing it twice, after the formation of the insulating film 408 and after the formation of the conductive films 409 and 410. However, in one aspect of the present invention, the above cleaning process may be performed only once.

[0321] Note that FIG. 29 is a top view of the light-emitting device at the time when the above-described process is completed. The cross-sectional view taken along the one-dot chain line D5-D6 in FIG. 29 corresponds to FIG. 26(D).

[0322] Next, as shown in FIG. 27(A), an insulating film 411 is formed so as to cover the semiconductor film 403, the insulating film 408, the conductive film 409 and the conductive film 410. The insulating film 411 desirably contains as little moisture and impurities such as oxygen as possible, and may be a single-layer insulating film or may be composed of a plurality of laminated insulating films. If hydrogen is contained in the insulating film 411, the hydrogen will penetrate into the semiconductor film 403, or the hydrogen will extract oxygen in the semiconductor film 403, and the semiconductor film 4 03. The vicinity of the surface of 03 becomes low in resistance (n-type). Then, in the vicinity of the surface of the semiconductor film 403 with reduced resistance a parasitic channel is likely to be formed, and there is a risk that the conductive film 409 or the conductive film 410 may be electrically connected to other conductive films on the semiconductor film 403. Therefore, it is important that the insulating film 411 is formed of a film that contains as little hydrogen as possible, and hydrogen is not used in the film formation method. Even when the above cleaning process is performed, if the substrate 400 is exposed to the atmosphere before forming the insulating film 411, impurities such as carbon contained in the atmosphere may adhere to the surfaces of the semiconductor film 403 and the insulating film 408. Therefore, in one aspect of the present invention, in the processing chamber for forming the insulating film 411, before forming the insulating film 411, impurities such as carbon adhering to the surfaces of the semiconductor film 403 and the insulating film 408 are removed by plasma treatment using oxygen, nitrous oxide, or a rare gas (typically argon), etc. And after removing the impurities by plasma treatment, without exposing the substrate 400 to the atmosphere, by forming the insulating film 411, it is possible to prevent impurities from entering the vicinity of the interface between the semiconductor film 403 and the insulating film 408 and the insulating film 411, and to prevent an increase in the off-current of the transistor or deterioration of the electrical characteristics of the transistor.

[0323] In addition, even when the above cleaning process is performed, if the substrate 400 is exposed to the atmosphere before forming the insulating film 411, impurities such as carbon contained in the atmosphere may adhere to the surfaces of the semiconductor film 403 and the insulating film 408. Therefore, in one aspect of the present invention, in the processing chamber for forming the insulating film 411, before forming the insulating film 411, impurities such as carbon adhering to the surfaces of the semiconductor film 403 and the insulating film 408 are removed by plasma treatment using oxygen, nitrous oxide, or a rare gas (typically argon), etc. And after removing the impurities by plasma treatment, without exposing the substrate 400 to the atmosphere, by forming the insulating film 411, it is possible to prevent impurities from entering the vicinity of the interface between the semiconductor film 403 and the insulating film 408 and the insulating film 411, and to prevent an increase in the off-current of the transistor or deterioration of the electrical characteristics of the transistor.

[0324] Also, it is desirable to use a material with high barrier properties for the insulating film 411. For example, as the insulating film with high barrier properties, a silicon nitride film, a silicon oxynitride film, an aluminum nitride film, an aluminum oxide film, or an aluminum oxynitride film, etc. can be used. A plurality of laminated When using a tantalum insulating film, an insulating film such as a silicon oxide film containing oxygen or a silicon oxynitride film is formed closer to the semiconductor film 403 than the highly barrier insulating film. Then, a highly barrier insulating film is formed so as to overlap the semiconductor film 403 with the oxygen-containing insulating film sandwiched therebetween. By using the highly barrier insulating film, it is possible to prevent impurities such as moisture or hydrogen from entering the semiconductor film 403, the gate insulating film 402, or the interface between the semiconductor film 403 and other insulating films and the vicinity thereof.

[0325] When using a plurality of stacked insulating films as the insulating film 411, for the insulating films other than the first layer, for example, heat-resistant organic materials such as acrylic resin, polyimide resin, benzocyclobutene-based resin, polyamide resin, and epoxy resin can be used. In addition to the above organic materials, siloxane-based resins, silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, alumina, etc. can be used. The siloxane-based resin is a material whose skeletal structure is composed of bonds between silicon (Si) and oxygen (O). As substituents, in addition to hydrogen, at least one of fluorine, fluoro group, and organic group (for example, alkyl group, aromatic hydrocarbon) may be included. And for the formation of the insulating film 411, depending on the material, it can be formed by methods such as CVD method, sputtering method, spin coating, dipping, spray coating, droplet ejection method (inkjet method), printing method (screen printing, offset printing, etc.). Also, it may be formed using instruments such as a doctor knife, a roller coater, a curtain coater, and a knife coater. Or, as the insulating film other than the first layer, a silicon oxide film produced by chemical vapor deposition using an organic silane can also be used. As the organic silane, tetraethyl orthosilicate (TEOS:Si(O ​ C 2 H 5 ) 4 ), trimethylsilane (TMS:(CH 3 ) 3 SiH), tetramethylcyclohexyl Trimethylcyclotetrasiloxane (TMCTS), Octamethylcyclotetrasiloxane (OMCTS) ), hexamethyldisilazane (HMDS), triethoxysilane (SiH(OC 2 H 5 ) 3 ), trisdimethylaminosilane (SiH(N(CH 3 ) 2 ) 3 ) etc. can be used. Cut.

[0326] In this embodiment, a silicon oxide film having a thickness of 300 nm formed by sputtering is used as the insulating film 411. The substrate temperature during film formation may be set to room temperature or higher and 300° C. or lower. Let's say it's 100°C.

[0327] Next, as shown in FIG. 27(B), a gate insulating film 402, a semiconductor film 403, and an insulating film 411 is processed into the desired shape by etching using photolithography. , openings 412 to 414 are formed.

[0328] In this embodiment, the gate insulating film is formed by dry etching using the ICP etching method. The insulating film 411 is patterned by etching. The flow rates of the gases trifluoromethane, helium, and methane were 22.5 sccm each. , 127.5sccm, 5sccm, reaction pressure 3.5Pa, lower electrode temperature 21℃, The RF (13.56MHz) power input to the coil-type electrode was set to 475W, and the lower electrode (bias Perform dry etching with the power input to the (side) being 300 W.

[0329] The region where the opening 413 is formed overlaps with a part of the region where the conductive film 409 is formed so that the conductive film 409 is partially exposed at the opening 413.

[0330] Note that Fig. 30 is a top view of the light-emitting device at the time when the above-described process is completed. The cross-sectional view along the chain double-dashed line D5 - D6 in Fig. 30 corresponds to Fig. 27(B). The cross-sectional view along the chain double-dashed line D5 - D6 in Fig. 30 corresponds to Fig. 27(B).

[0331] Next, as shown in Fig. 27(B), a conductive film 416 that contacts the conductive film 409 at the opening 413 is formed. The conductive film 416 functions as a pixel electrode, and a part of it is also provided on the insulating film 411. The conductive film 416 functions as a pixel electrode, and a part of it is also provided on the insulating film 411. is also provided.

[0332] Next, as shown in Fig. 27(C), an insulating film 417 having an opening 418 is formed on the conductive film 416 so as to cover a part of the conductive film 416. At the opening 418 of the insulating film 417, a part of the conductive film 416 is exposed. The insulating film 417 can be formed using an organic resin film, an inorganic insulating film, or a siloxane-based insulating film. If it is an organic resin film, for example, acrylic resin, polyimide resin, polyamide resin, etc., if it is an inorganic insulating film, silicon oxide, silicon oxynitride, etc. can be used. In particular, a photosensitive organic resin film is used for the insulating film 417, an opening 418 is formed on the conductive film 416, and the side wall of the opening 418 is formed as an inclined surface with a continuous curvature so that the connection between the conductive film 416 and the later-formed conductive film 420 can be prevented. The mask for forming the opening 418 can be formed by a droplet discharge method or a printing method. Also, the insulating film 417 itself can be formed by a droplet discharge method or or a printing method. For example, acrylic resin, polyimide resin, polyamide resin, etc., if it is an inorganic insulating film, silicon oxide, silicon oxynitride, etc. can be used. In particular, a photosensitive organic resin film is used for the insulating film 417, an opening 418 is formed on the conductive film 416, and the side wall of the opening 418 is formed as an inclined surface with a continuous curvature so that the connection between the conductive film 416 and the later-formed conductive film 420 can be prevented. The mask for forming the opening 418 can be formed by a droplet discharge method or a printing method. Also, the insulating film 417 itself can be formed by a droplet discharge method or formed so that the side wall of the opening 418 becomes an inclined surface with a continuous curvature, so that the connection between the conductive film 416 and the later-formed conductive film 420 can be prevented. The mask for forming the opening 418 can be formed by a droplet discharge method or a printing method. Also, the insulating film 417 itself can be formed by a droplet discharge method or 0 and can be prevented from connecting. The mask for forming the opening 418 can be formed by a droplet discharge method or a printing method. Also, the insulating film 417 itself can be formed by a droplet discharge method or a printing method. It can also be formed by a printing method.

[0333] Next, an EL layer 419 and a conductive film 420 are formed in this order on the conductive film 416 and the insulating film 417. By the above process, a light-emitting element 515 in which the conductive film 416, the EL layer 419, and the conductive film 420 are laminated in order can be formed at the opening 418 of the insulating film 417. It is possible.

[0334] Note that the light-emitting element 515 may have a top emission structure in which light from the light-emitting element 515 is directed toward the substrate 400, or a bottom emission structure in which light from the light-emitting element 515 is directed in a direction opposite to the substrate 400. Alternatively, it may have a dual emission structure in which light from the light-emitting element 515 is directed in the direction of the substrate 400 and in a direction opposite to the substrate 400. Among the above three structures, according to the target structure, the respective materials and film thicknesses of the conductive film 416 and the conductive film 420 are selected. It is also good.

[0335] Specifically, as the conductive film 416 or the conductive film 420, indium oxide, indium tin oxide (ITO), indium tin oxide containing silicon or silicon oxide, indium zinc oxide, indium oxide containing tungsten and zinc oxide, Al-Zn-based oxide semiconductor containing nitrogen, Zn-based oxide semiconductor containing nitrogen, Sn-Zn-based oxide semiconductor containing nitrogen, gold (Au), platinum (Pt), nickel (Ni), tungsten (W), chromium (Cr), molybdenum (Mo), iron (Fe), cobalt (Co), copper (Cu), palladium (Pd), titanium (Ti), and in addition, belonging to Group 1 or Group 2 of the periodic table of elements ​​​​​​​​​​​​ Elements, namely alkali metals such as lithium (Li) and cesium (Cs), and magne sium (Mg), alkaline earth metals such as calcium (Ca) and strontium (Sr), and alloys containing these (MgAg, AlLi), europium (Eu), ytterbium (Yb) and other rare earth metals and alloys containing these can be used. Note that the conductive film 416 can be formed by using the above materials by, for example, sputtering or vapor deposition (including vacuum vapor deposition), and then processing the conductive film into a desired shape by etching using photolithography

[0336] After forming the light-emitting element 515, it is preferable to enclose the light-emitting element 515 between the substrate 400 and a cover material so that the light-emitting

[0337] In this embodiment, the case where the transistor 513 has a single-gate structure is illustrated. However, if necessary, by having a plurality of electrically connected conductive films 407, a transistor having a multi-gate structure with a plurality of

[0338] channel formation regions can also be formed.

[0339] (Embodiment 9) In a light-emitting device according to an aspect of the present invention, a color filter method can be adopted in which a light-emitting element that emits monochromatic light such as white is combined with a color filter to display a full-color image. Alternatively, a method of displaying a full-color image can also be adopted by using a plurality of The EL layer between the pair of electrodes is painted with different colors, so it is called a color-coded method. Called.

[0340] In the case of the color-by-color method, the EL layer is usually colored using a mask such as a metal mask. This is done by deposition. Therefore, the size of the pixel depends on the accuracy of the deposition of the EL layer. On the other hand, in the case of the color filter method, unlike the separate coloring method, the EL layer is separately colored. Therefore, it is easier to reduce the pixel size than in the case of the color-by-color method. Therefore, a high-definition pixel portion can be realized.

[0341] In addition, in the light emitting device, a substrate on which a transistor is formed, that is, a so-called element substrate, is used to receive light from the light emitting element. The bottom emission structure extracts the light from the light-emitting element from the opposite side of the element substrate. In the case of a top emission structure, the light emitted from the light emitting element is The light coming through the device is not blocked by wiring, transistors, capacitors, or other elements. Therefore, the light extraction efficiency from the pixel can be improved compared to the bottom emission structure. Therefore, the top emission structure can provide a high current even if the current value supplied to the light emitting element is kept low. Since high brightness can be obtained, this is advantageous for extending the life of the light-emitting element.

[0342] In the light-emitting device according to one embodiment of the present invention, the light emitted from the EL layer is resonated in the light-emitting element. The light source may have a microcavity (micro-optical resonator) structure. The Tee structure can increase the extraction efficiency of light of a specific wavelength from the light-emitting element. Therefore, the brightness and color purity of the pixel portion can be improved.

[0343] Fig. 31 shows, as an example, a cross-sectional view of a pixel. In Fig. 31, a part of the cross-section of the pixel corresponding to red, a part of the cross-section of the pixel corresponding to blue, and a part of the cross-section of the pixel corresponding to green are shown. Specifically, in Fig. 31, a pixel 340r corresponding to red, a pixel 340g corresponding to green, and a pixel 340b corresponding to blue are shown. are shown.

[0344] Specifically, in Fig. 31, a pixel 340r corresponding to red, a pixel 340g corresponding to green, and a pixel 340b corresponding to blue are shown. The pixel 340r, pixel 340g, and pixel 340b each have an anode 715r, anode 715g, and anode 715b. The above anodes 715r, anode 715g, and anode 715b are provided on an insulating film 750 formed on a substrate 740 in each of the pixel 340r, pixel 340g, and pixel 340b. The pixel 340r, pixel 340g, and pixel 340b each have an anode 715r, anode 715g, and anode 715b. The above anodes 715r, anode 715g, and anode 715b are provided on an insulating film 750 formed on a substrate 740 in each of the pixel 340r, pixel 340g, and pixel 340b.

[0345] And, a partition wall 730 having an insulating film is provided on the anodes 715r, anode 715g, and anode 715b. The partition wall 730 has an opening, and in the above opening, the anodes 715r, anode 715g, and anode 715b are each partially exposed. Also, an EL layer 731 and a cathode 732 having translucency to visible light are sequentially laminated on the partition wall 730 so as to cover the exposed region. anode 715g, and anode 715b are each partially exposed. Also, an EL layer 731 and a cathode 732 having translucency to visible light are sequentially laminated on the partition wall 730 so as to cover the exposed region. anode 715g, and anode 715b are each partially exposed. Also, an EL layer 731 and a cathode 732 having translucency to visible light are sequentially laminated on the partition wall 730 so as to cover the exposed region. And, a partition wall 730 having an insulating film is provided on the anodes 715r, anode 715g, and anode 715b. The partition wall 730 has an opening, and in the above opening, the anodes 715r,

[0346] The overlapping part of the anode 715r, EL layer 731, and cathode 732 corresponds to a light-emitting element 741r corresponding to red. The overlapping part of the anode 715g, EL layer 731, and cathode 732 corresponds to a light-emitting element 741g corresponding to green. The overlapping part of the anode 715b, EL layer 731, and cathode 732 corresponds to a light-emitting element 741b corresponding to blue. The overlapping part of the anode 715b, EL layer 731, and cathode 732 corresponds to a light-emitting element 741b corresponding to blue.

[0347] Also, the substrate 742 is between the light-emitting element 741r, light-emitting element 741g, and light-emitting element 741b. It faces the substrate 740 so as to sandwich it. On the substrate 742, there are provided a coloring layer 743r corresponding to the pixel 340r, a coloring layer 743g corresponding to the pixel 340g, and a coloring layer 743b corresponding to the pixel 340b. The coloring layer 743r is a layer in which the transmittance of light in the wavelength region corresponding to red is higher than the transmittance of light in other wavelength regions, and the coloring layer 743g is a layer in which the transmittance of light in the wavelength region corresponding to green is higher than the transmittance of light in other wavelength regions, and the coloring layer 743b is a layer in which the transmittance of light in the wavelength region corresponding to blue is higher than the transmittance of light in other wavelength regions.

[0348] Furthermore, on the substrate 742, an overcoat 744 is provided so as to cover the coloring layer 743r, the coloring layer 743g, and the coloring layer 743b. The overcoat 744 is a layer having light transmittance with respect to visible light for protecting the coloring layer 743 r, the coloring layer 743g, and the coloring layer 743b, and it is preferable to use a resin material with high flatness. The coloring layer 743r, the coloring layer 743 g, and the coloring layer 743b, together with the overcoat 744, may be regarded as a color filter, or each of the coloring layer 743r, the coloring layer 743g, and the coloring layer 743b may be regarded as a color filter.

[0349] And in FIG. 31, a conductive film 745r having a high reflectance of visible light and a conductive film 746r having a higher transmittance of visible light than the conductive film 745r are sequentially laminated and used on the anode 715r. Also, a conductive film 745g having a high reflectance of visible light and a conductive film 746g having a higher transmittance of visible light than the conductive film 745g are sequentially laminated and used on the anode 715g. The film thickness of the conductive film 746g shall be smaller than the film thickness of the conductive film 746r. Further, a conductive film 745b having a high reflectance of visible light is used on the anode 715b. ​

[0350] Therefore, in the light-emitting device shown in FIG. 31, in the light-emitting element 741r, the optical path length of the light emitted from the EL layer 731 can be adjusted by the distance between the conductive film 745r and the cathode 732. Also, in the light-emitting element 741g, the optical path length of the light emitted from the EL layer 731 can be adjusted by the distance between the conductive film 745g and the cathode 732. Further, in the light-emitting element 741b, the optical path length of the light emitted from the EL layer 731 can be adjusted by the distance between the conductive film 745b and the cathode 732.

[0351] In one aspect of the present invention, by adjusting the above optical path length in accordance with the wavelengths of the lights respectively corresponding to the light-emitting element 741r, the light-emitting element 741g, and the light-emitting element 741b, a microcavity structure that resonates the light emitted from the EL layer 731 within each of the above light-emitting elements may be used.

[0352] By adopting the above microcavity structure in the light-emitting device according to one aspect of the present invention, in the light emitted from the light-emitting element 741r, the intensity of the light having a wavelength corresponding to red is increased by resonance. Therefore, the color purity and luminance of the red light obtained through the coloring layer 743r are increased. Also, in the light emitted from the light-emitting element 741g, the intensity of the light having a wavelength corresponding to green is increased by resonance. Therefore, the color purity and luminance of the green light obtained through the coloring layer 743g are increased. Further, in the light emitted from the light-emitting element 741b, the intensity of the light having a wavelength corresponding to blue is increased by resonance. Therefore, the color purity and luminance of the blue light obtained through the coloring layer 743b are increased.

[0353] ​​​​​​​​​​​​​​Note that in FIG. 31, a configuration using pixels corresponding to the three colors of red, green, and blue has been shown. However, in one aspect of the present invention, it is not limited to this configuration. The combination of colors used in one aspect of the present invention may be, for example, four colors of red, green, blue, and yellow, or three colors of cyan, magenta, and yellow. Alternatively, the combination of the above colors may use six colors of light red, green, and blue, and dark red, green, and blue. Alternatively, the combination of the above colors may use six colors of red, green, blue, cyan, magenta, and yellow. In one aspect of the invention, it is not limited to this configuration. The combination of colors used in one aspect of the present invention may be, for example, four colors of red, green, blue, and yellow, or three colors of cyan, magenta, and yellow. Alternatively, the combination of the above colors may use six colors of light red, green, and blue, and dark red, green, and blue. Alternatively, the combination of the above colors may use six colors of red, green, blue, cyan, magenta, and yellow.

[0354] Note that, for example, the colors that can be expressed using red, green, and blue pixels are limited to the colors shown inside the triangle drawn by the three points corresponding to the respective emission colors on the chromaticity diagram. Therefore, by adding a light-emitting element separately where the emission color exists outside the triangle on the chromaticity diagram, as in the case of using red, green, blue, and yellow pixels, the color gamut that can be expressed in the light-emitting device can be expanded, and the color reproducibility can be enhanced. Note that, for example, the colors that can be expressed using red, green, and blue pixels are limited to the colors shown inside the triangle drawn by the three points corresponding to the respective emission colors on the chromaticity diagram. Therefore, by adding a light-emitting element separately where the emission color exists outside the triangle on the chromaticity diagram, as in the case of using red, green, blue, and yellow pixels, the color gamut that can be expressed in the light-emitting device can be expanded, and the color reproducibility can be enhanced. Note that, for example, the colors that can be expressed using red, green, and blue pixels are limited to the colors shown inside the triangle drawn by the three points corresponding to the respective emission colors on the chromaticity diagram. Therefore, by adding a light-emitting element separately where the emission color exists outside the triangle on the chromaticity diagram, as in the case of using red, green, blue, and yellow pixels, the color gamut that can be expressed in the light-emitting device can be expanded, and the color reproducibility can be enhanced. Note that, for example, the colors that can be expressed using red, green, and blue pixels are limited to the colors shown inside the triangle drawn by the three points corresponding to the respective emission colors on the chromaticity diagram. Therefore, by adding a light-emitting element separately where the emission color exists outside the triangle on the chromaticity diagram, as in the case of using red, green, blue, and yellow pixels, the color gamut that can be expressed in the light-emitting device can be expanded, and the color reproducibility can be enhanced. Note that, for example, the colors that can be expressed using red, green, and blue pixels are limited to the colors shown inside the triangle drawn by the three points corresponding to the respective emission colors on the chromaticity diagram. Therefore, by adding a light-emitting element separately where the emission color exists outside the triangle on the chromaticity diagram, as in the case of using red, green, blue, and yellow pixels, the color gamut that can be expressed in the light-emitting device can be expanded, and the color reproducibility can be enhanced.

[0355] Also, in FIG. 31, among the light-emitting element 741r, the light-emitting element 741g, and the light-emitting element 741b, in the light-emitting element 741b with the shortest light wavelength λ, a conductive film 745b with a high reflectance of visible light is used as the anode, and in the other light-emitting elements 741r and 741g, the optical path length is adjusted by using conductive films 746r and 746g with different film thicknesses from each other. In one aspect of the present invention, even in the light-emitting element 741b with the shortest wavelength λ, a conductive film with a high transmittance, such as the conductive films 746r and 746g, may be provided on the conductive film 745b with a high reflectance of visible light. However, as shown in FIG. 31, when the anode is constituted by the conductive film 745b with a high reflectance of visible light in the light-emitting element 741b with the shortest wavelength λ, all the light-emitting elements Note that, for example, the colors that can be expressed using red, green, and blue pixels are limited to the colors shown inside the triangle drawn by the three points corresponding to the respective emission colors on the chromaticity diagram. Therefore, by adding a light-emitting element separately where the emission color exists outside the triangle on the chromaticity diagram, as in the case of using red, green, blue, and yellow pixels, the color gamut that can be expressed in the light-emitting device can be expanded, and the color reproducibility can be enhanced. Note that, for example, the colors that can be expressed using red, green, and blue pixels are limited to the colors shown inside the triangle drawn by the three points corresponding to the respective emission colors on the chromaticity diagram. Therefore, by adding a light-emitting element separately where the emission color exists outside the triangle on the chromaticity diagram, as in the case of using red, green, blue, and yellow pixels, the color gamut that can be expressed in the light-emitting device can be expanded, and the color reproducibility can be enhanced. Note that, for example, the colors that can be expressed using red, green, and blue pixels are limited to the colors shown inside the triangle drawn by the three points corresponding to the respective emission colors on the chromaticity diagram. Therefore, by adding a light-emitting element separately where the emission color exists outside the triangle on the chromaticity diagram, as in the case of using red, green, blue, and yellow pixels, the color gamut that can be expressed in the light-emitting device can be expanded, and the color reproducibility can be enhanced. Note that, for example, the colors that can be expressed using red, green, and blue pixels are limited to the colors shown inside the triangle drawn by the three points corresponding to the respective emission colors on the chromaticity diagram. Therefore, by adding a light-emitting element separately where the emission color exists outside the triangle on the chromaticity diagram, as in the case of using red, green, blue, and yellow pixels, the color gamut that can be expressed in the light-emitting device can be expanded, and the color reproducibility can be enhanced. Note that, for example, the colors that can be expressed using red, green, and blue pixels are limited to the colors shown inside the triangle drawn by the three points corresponding to the respective emission colors on the chromaticity diagram. Therefore, by adding a light-emitting element separately where the emission color exists outside the triangle on the chromaticity diagram, as in the case of using red, green, blue, and yellow pixels, the color gamut that can be expressed in the light-emitting device can be expanded, and the color reproducibility can be enhanced. Note that, for example, the colors that can be expressed using red, green, and blue pixels are limited to the colors shown inside the triangle drawn by the three points corresponding to the respective emission colors on the chromaticity diagram. Therefore, by adding a light-emitting element separately where the emission color exists outside the triangle on the chromaticity diagram, as in the case of using red, green, blue, and yellow pixels, the color gamut that can be expressed in the light-emitting device can be expanded, and the color reproducibility can be enhanced. Note that, for example, the colors that can be expressed using red, green, and blue pixels are limited to the colors shown inside the triangle drawn by the three points corresponding to the respective emission colors on the chromaticity diagram. Therefore, by adding a light-emitting element separately where the emission color exists outside the triangle on the chromaticity diagram, as in the case of using red, green, blue, and yellow pixels, the color gamut that can be expressed in the light-emitting device can be expanded, and the color reproducibility can be enhanced. In the case of using a conductive film with a high transmittance for the anode, the manufacturing process of the anode is simplified compared to other cases, which is preferable.

[0356] Note that the conductive film 745b with a high reflectance of visible light often has a smaller work function than the conductive film 746r and the conductive film 746g with a high transmittance of visible light. Therefore, in the light-emitting element 741b with the shortest light wavelength λ, hole injection from the anode 715b to the EL layer 731 is less likely to occur compared to the light-emitting elements 741r and 741g, resulting in a tendency for low luminous efficiency. Therefore, in one aspect of the present invention, in the light-emitting element 741b with the shortest light wavelength λ, in the layer of the EL layer 731 that is in contact with the conductive film 745b with a high reflectance of visible light, a substance with high hole transportability is preferably used as a composite material containing a substance that exhibits acceptor properties (electron-accepting properties) with respect to the substance with high hole transportability. By forming the above composite material in contact with the anode 715b, hole injection from the anode 715b to the EL layer 731 becomes easier, and the luminous efficiency of the light-emitting element 741b can be increased. Examples of the substance that exhibits acceptor properties include 7,7,8,8-tetracyano-2,3,5,6-tetrafluoroquinodimethane (abbreviation: F4-TCNQ), chloranil, etc.

[0357] Transition metal oxides can also be mentioned. Further, oxides of metals belonging to Groups 4 to 8 in the periodic table can be mentioned. Specifically, vanadium oxide, niobium oxide, tantalum oxide, chromium oxide, molybdenum oxide, tungsten oxide, manganese oxide, and rhenium oxide are preferable because they have high acceptor properties. Among them, molybdenum oxide is particularly preferable because it is stable in the atmosphere, has low hygroscopicity, and is easy to handle. ​​​​​

[0358] As a substance with high hole transport properties used in the composite material, aromatic amine compounds and carbazole derivatives are used. Conductors, aromatic hydrocarbons, polymer compounds (oligomers, dendrimers, polymers, etc.), etc. Various compounds can be used. The organic compound used in the composite material is a hole It is preferable that the organic compound has high transportability. -6 cm 2 / Vs or more However, it is preferable that the material has a hole mobility of 1000 to 15000 m / s. Any substance other than these may be used.

[0359] The conductive films 745r, 745g, and 745b having high reflectance for visible light are For example, aluminum, silver, or an alloy containing these metal materials may be used as a single layer or The conductive film 745r, the conductive film 745g, and the conductive film 745r can be formed by stacking the conductive films. The conductive film 745b is made of a conductive film with high reflectivity and a conductive film with a thin thickness (preferably 20 nm or less, For example, a layer having a high reflectance may be formed by laminating a layer having a thickness of 10 nm or less. A thin titanium film or molybdenum film is laminated on the conductive film to form a conductive film 745b. The more reflective the conductive film (aluminum, alloy containing aluminum, silver, etc.) is, the better. It is possible to prevent an oxide film from being formed on the surface.

[0360] The conductive films 746r and 746g having high visible light transmittance are formed of, for example, indium oxide. Indium, tin oxide, zinc oxide, indium tin oxide, indium zinc oxide, etc. are used. It is possible.

[0361] Further, the cathode 732 can be formed by laminating, for example, a thin conductive film that transmits light (preferably 20 nm or less , more preferably 10 nm or less) and a conductive film made of a conductive metal oxide. The thin conductive film that transmits light can be formed of silver, magnesium , or an alloy containing these metal materials, either as a single layer or by lamination. As the conductive metal oxide, indium oxide, tin oxide, zinc oxide, indium tin oxide, indium zinc oxide, or a material in which silicon oxide is included in these metal oxide materials can be used.

[0362] This embodiment can be implemented in appropriate combination with other embodiments.

[0363] (Embodiment 10) Next, the appearance of the panel of the light-emitting device according to an aspect of the present invention will be described with reference to FIG. 32. FIG. 32(A) is a top view of the panel in which the substrate 6001 and the substrate 6006 are adhered by the sealing material 6005, and FIG. 32(B) corresponds to a cross-sectional view taken along the dashed-dotted line E1-E2 in FIG. 32(A).

[0364] A sealing material 6005 is provided so as to surround the pixel portion 6002 and the scanning line driving circuit 6004 provided on the substrate 6001. Further, a substrate 6006 is provided on the pixel portion 6002 and the scanning line driving circuit 6004. Therefore, the pixel portion 6002 and the scanning line driving circuit 6004 are sealed together with the filling material 6007 by the substrate 6001, the sealing material 6005, and the substrate 6006. 4

[0365] As the filling material 6007, in addition to an inert gas such as nitrogen or argon, an ultraviolet curable resin can also be used. A thermosetting resin can be used. For the sealing material 6005, a resin (such as an ultraviolet curable resin, a thermosetting resin, etc.) or glass frit can be used.

[0366] Also, a substrate 6021 on which a signal line driving circuit 6003 is formed is mounted in a region different from the region surrounded by the sealing material 6005 on the substrate 6001. In FIG. 32, the transistor 6009 included in the signal line driving circuit 6003 is illustrated. Note that in this embodiment, a case where the scanning line driving circuit 6004 is formed on the substrate 6001 together with the pixel portion 6002 is illustrated, but the scanning line driving circuit 6004 formed on another substrate may be mounted on the substrate 600 1. Also, in this embodiment, a case where the signal line driving circuit 6003 formed on the substrate 6021 is mounted on the substrate 6001 is illustrated, but the signal line driving circuit 6003 may be formed on the substrate 6001 together with the pixel portion 6002. Alternatively, a part of the signal line driving circuit 6003 or a part of the scanning line driving circuit 6004 may be formed on the substrate 6001 together with the pixel portion 6002.

[0367]

[0368] Also, the pixel portion 6002 and the scanning line driving circuit 6004 provided on the substrate 6001 have a plurality of transistors. In FIG. 32(B), the transistors 6 008 and 6010 included in the pixel portion 6002 are illustrated. The pixel electrode 6 030 of the light emitting element 6011 is connected to the transistor 6010. The portion where the pixel electrode 6030, the counter electrode 603 1, and the EL layer 6029 overlap corresponds to the light emitting element 6011.

[0368] Also, the shielding film 6040 formed on the substrate 6006 is for the transistors 6008 and 600 It overlaps with the region where the transistor 6010 is formed. Also, on the substrate 6006, a coloring layer 60 41 is formed that functions as a color filter and preferentially transmits only visible light in a specific wavelength region, and the coloring layer 6041 overlaps with the region where the light-emitting element 6011 is formed.

[0369] By providing a coloring layer 6041 that preferentially transmits light in the wavelength regions corresponding to red, blue, and green for each pixel and using the light-emitting element 6011 that can obtain white light, a full-color image can be displayed. Alternatively, by combining the light-emitting element 6011 that can obtain red light with the coloring layer 6041 corresponding to red, the light-emitting element 6011 that can obtain blue light with the coloring layer 6041 corresponding to blue, and further combining the light-emitting element 6011 that can obtain green light with the coloring layer 6041 corresponding to green, a full-color image with high color purity can be displayed. Or, by providing a plurality of light-emitting elements 6011 that can obtain red, blue, and green light respectively in the pixel portion 6002 without providing the coloring layer 6041, a full-color image can be displayed.

[0370] In addition, in FIG. 32, the case where the shielding film 6040 and the coloring layer 6041 are provided on the substrate 6006 side is illustrated, but the shielding film 6040 or the coloring layer 6041 may be provided on the substrate 6001 side. The positions of the shielding film 6040 and the coloring layer 6041 can be appropriately determined according to the incident direction of light to the light-emitting element 6011 and the emission direction of the light transmitted through the light-emitting element 6011.

[0371] Also, the signal line drive circuit 6003, the scan line drive circuit 6004, and the power supplied to the pixel portion 6002 ​​​​​​​​​​​​​Various signals and potentials are supplied from connection terminal 6016 via routing wirings 6014 and 6015. The connection terminal 6016 is electrically connected via the terminals of the FPC 6018 and the anisotropic conductive film 6019.

[0372] This embodiment can be implemented in appropriate combination with other embodiments.

[0373] (Embodiment 11) FIG. 33 is an example of a perspective view of a light-emitting device according to an aspect of the present invention.

[0374] The light-emitting device shown in FIG. 33 includes a panel 2601, a circuit board 2602, a COF tape 260 3, and a chip 2604 on which a signal line driving circuit is formed. The chip 2604 on which the signal line driving circuit is formed is connected to the COF tape 2603 using the COF (Chip On Film) method. On the circuit board 2602, a circuit that generates various signals input to the panel 2601, or a circuit that processes these signals, etc. are provided. And from the circuit board 2602, via the COF tape 2603, various signals and potentials are input to the panel 26 01. The panel 2601 has a pixel portion 2605 provided with a plurality of pixels and a scanning line driving circuit 2606.

[0375] The scanning line driving circuit 2606 selects a plurality of pixels included in the pixel portion 2605 row by row. The signal line driving circuit provided in the chip 2604 controls the input of an image signal to the pixels in the row selected by the scanning line driving circuit 2606. Note that instead of the COF tape 2603, an FPC (Flexible Printed circuit can be used.

[0376] Circuit) can be used. using (Circuit) or the like, electrically connect the circuit board 2602 and the panel 2601 This is also possible.

[0377] Also, when using the COF tape 2603, prepare some circuits in the circuit board 2602 separately formed on the prepared chips, and connect the chips to the COF tape 2603 using the COF method This may be done. Also, part or all of the scanning line drive circuit 2606, or part of the signal line drive circuit may be formed on the chip, and the chip may be connected to the COF tape 2603 using the COF method subsequently.

[0378] This embodiment can be implemented in appropriate combination with other embodiments.

[0379] (Embodiment 12) The liquid crystal display device according to one aspect of the present invention includes a display device, a personal computer, and a recording medium An image playback device (typically a device having a display capable of playing back a recording medium such as a DVD: Digital Versatile Dis c and displaying the image) can be used. In...

Claims

1. a first pixel and a second pixel which share a semiconductor film and are arranged side by side so as to be adjacent to each other; each of the first pixel and the second pixel includes a first transistor, a second transistor, and a light emitting element; In each of the first pixel and the second pixel, one of a source and a drain of the first transistor is always electrically connected to a gate of the second transistor; In each of the first pixel and the second pixel, the second transistor has a function of controlling a current flowing through the light-emitting element in accordance with a potential corresponding to an image signal; a channel formation region of the second transistor included in the first pixel and a channel formation region of the second transistor included in the second pixel are disposed in the one semiconductor film; the first semiconductor film overlaps with a conductive film having a function as a scan line that is always electrically connected to a gate of the first transistor included in the first pixel in a first region and a second region; The first region and the second region are spaced apart from each other. Light emitting device.

2. a first pixel and a second pixel which share a semiconductor film and are arranged side by side so as to be adjacent to each other; each of the first pixel and the second pixel includes a first transistor, a second transistor, and a light emitting element; In each of the first pixel and the second pixel, one of a source and a drain of the first transistor is always electrically connected to a gate of the second transistor; In each of the first pixel and the second pixel, the second transistor has a function of controlling a current flowing through the light-emitting element in accordance with a potential corresponding to an image signal; a channel formation region of the second transistor included in the first pixel and a channel formation region of the second transistor included in the second pixel are disposed in the one semiconductor film; the first semiconductor film overlaps with a conductive film having a function as a scan line that is always electrically connected to a gate of the first transistor included in the first pixel in a first region and a second region; the first region and the second region are spaced apart from each other, a region in which the one semiconductor film is not disposed is present between the first region and the second region in a plan view; Light emitting device.

3. a first pixel and a second pixel which share a semiconductor film and are arranged side by side so as to be adjacent to each other; each of the first pixel and the second pixel includes a first transistor, a second transistor, and a light emitting element; In each of the first pixel and the second pixel, one of a source and a drain of the first transistor is always electrically connected to a gate of the second transistor; In each of the first pixel and the second pixel, the second transistor has a function of controlling a current flowing through the light-emitting element in accordance with a potential corresponding to an image signal; a channel formation region of the second transistor included in the first pixel and a channel formation region of the second transistor included in the second pixel are disposed in the one semiconductor film; the first semiconductor film overlaps with a conductive film having a function as a scan line that is always electrically connected to a gate of the first transistor included in the first pixel in a first region and a second region; the first region and the second region are spaced apart from each other, a region in which the first semiconductor film is not disposed is present between a channel formation region of the second transistor included in the first pixel and a channel formation region of the second transistor included in the second pixel in a plan view; Light emitting device.

4. a first pixel and a second pixel which share a semiconductor film and are arranged side by side so as to be adjacent to each other; each of the first pixel and the second pixel includes a first transistor, a second transistor, and a light emitting element; In each of the first pixel and the second pixel, one of a source and a drain of the first transistor is always electrically connected to a gate of the second transistor; In each of the first pixel and the second pixel, the second transistor has a function of controlling a current flowing through the light-emitting element in accordance with a potential corresponding to an image signal; a channel formation region of the second transistor included in the first pixel and a channel formation region of the second transistor included in the second pixel are disposed in the one semiconductor film; the first semiconductor film overlaps with a conductive film having a function as a scan line that is always electrically connected to a gate of the first transistor included in the first pixel in a first region and a second region; the first region and the second region are spaced apart from each other, a region in which the one semiconductor film is not disposed is present between the first region and the second region in a plan view; a region in which the first semiconductor film is not disposed is present between a channel formation region of the second transistor included in the first pixel and a channel formation region of the second transistor included in the second pixel in a plan view; Light emitting device.

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