Reference voltage circuit

Abstract

To provide a reference voltage circuit capable of reducing variations in reference voltage due to process variation, temperature variation, and power supply voltage variation, and having enhanced radiation resistance.SOLUTION: A reference voltage generation unit 2 includes: a depletion-type transistor M1 in which a gate electrode containing an n-type impurity is formed; and an enhancement-type transistor M2 in which a gate electrode containing a p-type impurity is formed. The reference voltage generation unit 2 generates an output voltage VGS_M2 having a negative temperature characteristic. A temperature characteristic correction unit 3 includes transistors M11 and M12 whose sources are commonly connected to a current source 31 and whose aspect ratios are different from each other. When the current from the current source 31 is controlled to flow through the transistor M11 and the transistor M12 at a constant shunt ratio, the temperature characteristic correction unit 3 generates a PTAT voltage VPTAT having a positive temperature characteristic.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] The present invention relates to a reference voltage circuit.

Background Art

[0002] In electronic devices used in environments irradiated with radiation such as outer space and around nuclear reactors, and in electronic components such as those subjected to radiation transmission inspection where X-rays or γ-rays are irradiated in non-destructive inspection during the manufacturing process, various radiation damages are caused by the irradiation of ionizing radiation such as X-rays and γ-rays, resulting in malfunction and characteristic variation of the circuit, and sometimes causing a decrease in the function of the system. With the rapid progress of the communication and informatization society, the radiation resistance of electronic devices and electronic components has become a major issue. Many semiconductor integrated circuits are used in electronic devices, and the present invention aims to enhance the radiation resistance of a reference voltage circuit widely used as a constant voltage source of a semiconductor integrated circuit and contribute to the stable operation of electronic devices.

[0003] Conventionally, as a reference voltage circuit used in a semiconductor integrated circuit, a circuit using the principle of the work function difference of the gate electrode of a transistor as shown in FIG. 5 is known (see, for example, Patent Documents 1 and 2). The reference voltage circuit 100 shown in FIG. 5 is configured mainly by a depletion-type field-effect transistor M1 whose gate electrode is formed of polysilicon containing n-type impurities and an enhancement-type field-effect transistor M2 whose gate electrode is formed of polysilicon containing p-type impurities.

[0004] The impurity concentrations of the substrates and channel doping regions for forming transistors M1 and M2 are made the same, and the conductivity type of the polysilicon for forming the gate electrodes is such that the gate electrode of the depletion-type field-effect transistor M1 is n-type and the gate electrode of the enhancement-type field-effect transistor M2 is p-type. By using the work function difference caused by the difference in the conductivity type of the gate electrodes, a difference is provided in the threshold voltages of transistors M1 and M2, generating a reference voltage of about 1V (see, for example, Patent Document 3). In this case, since the impurity concentrations of the substrates and channel doping regions of transistors M1 and M2 are equal, it is possible to reduce the variation in the reference voltage due to process variations, temperature variations, and power supply voltage variations.

[0005] The gate and source of transistor M1 are connected to the gate and drain of transistor M2, and the constant current generated by transistor M1 is passed through transistor M2, and a voltage corresponding to the difference in the threshold voltages of transistors M1 and M2, that is, the difference in the work functions of the gate electrodes of transistors M1 and M2, is output as a reference voltage from the common connection part of transistors M1 and M2.

[0006] The temperature characteristic of the reference voltage is such that the gate electrode of transistor M1 is formed of polysilicon containing n-type impurities, and the gate electrode of transistor M2 is formed of polysilicon containing p-type impurities. Therefore, the temperature characteristics of the work functions of the gate electrodes of transistors M1 and M2 have opposite polarities, a difference occurs in the temperature coefficients of the threshold voltages, and when the aspect ratios S (W / L) of the channel widths W and channel lengths L of transistors M1 and M2 are equal (S M1 =S M2 ), the temperature coefficient does not become zero and has a negative temperature characteristic of about -0.5 mV / °C (see, for example, Patent Document 3).

[0007] Since the reference voltage VREF is the voltage difference between the threshold voltages of transistors M1 and M2 as expressed by Equation 1, it is possible to generate a stable reference voltage that is less affected by process variations and power supply voltage fluctuations. Also, good temperature characteristics can be obtained by adjusting the aspect ratio S (W / L) of the channel width W and channel length L of transistors M1 and M2.

[0008] [Number]

[0009] Here, V TH_M1 is the threshold voltage of transistor M1, V TH_M2 is the threshold voltage of transistor M2, S M1 is the aspect ratio (W M1 / L M1 ) of transistor M1, S M2 is the aspect ratio (W M2 / L M2 ) of transistor M2.

[0010] Characteristic degradation due to radiation exposure is mainly caused by the generation of positive charges in the silicon oxide film and an increase in the interface trap density at the interface between the silicon oxide film and the silicon substrate, which reduces the threshold voltages of transistors M1 and M2 constituting the reference voltage circuit 100 (see, for example, Non-Patent Document 1).

[0011] In the conventional reference voltage circuit 100 described above, since the amount of change in the threshold voltages of transistors M1 and M2 due to radiation exposure is equal, when the ratio of the aspect ratio (W M1 / L M1 ) of transistor M1 and the aspect ratio (W M2 / L M2 ) of transistor M2 is equal (S M1 = S M2 ), the reference voltage does not vary due to radiation exposure. However, in order to correct the temperature characteristics, the aspect ratio (W M1 / L M1 ) of transistor M1 and the aspect ratio (W M2 / L M2) at different ratios (S M1 ≠S M2 ), when irradiated with radiation, there is a problem that the reference voltage fluctuates because the amounts of variation of the first and second terms of Equation 1 are different.

Prior Art Documents

Patent Documents

[0012]

Patent Document 1

Patent Document 2

Patent Document 3

Non-Patent Documents

[0013]

Non-Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0014] The present invention has been made in view of the above circumstances, and an object thereof is to provide a reference voltage circuit capable of reducing variations in the reference voltage due to process variations, temperature variations, and power supply voltage variations, and enhancing radiation resistance.

Means for Solving the Problems

[0015] In order to achieve the above-described object, the reference voltage circuit according to the present invention is characterized by the following [1] to [7]. [1] A depletion-type first field-effect transistor having a gate electrode containing n-type impurities, and A gate electrode containing p-type impurities is formed, and it has an enhancement-type second field-effect transistor having the same aspect ratio as the first field-effect transistor. A reference voltage generation unit that causes a constant current generated by the first field-effect transistor to flow through the second field-effect transistor, and generates a voltage corresponding to the difference between the threshold voltage of the first field-effect transistor and the threshold voltage of the second field-effect transistor between the gate and source of the second field-effect transistor. A first current source. It has a first transistor and a second transistor with different aspect ratios, where the source or emitter is commonly connected to the first current source. A first temperature characteristic correction unit in which the gate or base of the second transistor is connected to the source of the second field-effect transistor. It is a reference voltage circuit. [2] In the reference voltage circuit according to [1]. The first temperature characteristic correction unit. A third transistor connected in series to the second transistor. A fourth transistor connected in series to the first transistor. It has a fifth transistor connected between the gate or base of the second transistor and the source or emitter of the third transistor. The gate or base of the fifth transistor is connected to the connection point of the first transistor and the fourth transistor. It is a reference voltage circuit. [3] In the reference voltage circuit according to [1]. A second current source. It has a sixth transistor and a seventh transistor with different aspect ratios, where the source or emitter is commonly connected to the second current source. It is provided with a second temperature characteristic correction unit in which the gate or base of the seventh transistor is connected to the gate or base of the first transistor. It is a reference voltage circuit. [4] In the reference voltage circuit described in [1], a second current source, a plurality of second temperature characteristic correction units each having a sixth transistor and a seventh transistor with different aspect ratios whose sources or emitters are commonly connected to the second current source, the plurality of second temperature characteristic correction units are connected in parallel, the gate or base of the seventh transistor of the second temperature characteristic correction unit connected closest to the first temperature characteristic correction unit is connected to the gate or base of the first transistor, the gate or base of the seventh transistor of the remaining second temperature characteristic correction units is connected to the gate or base of the sixth transistor of the adjacent second temperature characteristic correction unit, which is a reference voltage circuit. [5] In the reference voltage circuit described in [3] or [4], the second temperature characteristic correction unit has an eighth transistor connected in series to the sixth transistor, and a ninth transistor connected in series to the seventh transistor, the eighth transistor and the ninth transistor are connected in a current mirror configuration, and the gate-drain or base-collector of the seventh transistor is connected, which is a reference voltage circuit. [6] In the reference voltage circuit according to any one of [1] to [4], at least one of the transistors is composed of a field effect transistor, which is a reference voltage circuit. [7] In the reference voltage circuit according to any one of [1] to [4], at least one of the transistors is composed of a bipolar transistor, which is a reference voltage circuit.

Advantages of the Invention

[0016] According to the present invention, it is possible to reduce variations in the reference voltage due to process variations, temperature variations, and power supply voltage variations, and to provide a reference voltage circuit with enhanced radiation resistance.

[0017] As described above, the present invention has been briefly explained. Furthermore, the details of the present invention will be further clarified by reading through the embodiments for carrying out the invention described below (hereinafter referred to as "embodiments") with reference to the accompanying drawings.

Brief Description of the Drawings

[0018]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Embodiments for Carrying Out the Invention

[0019] Specific embodiments of the present invention will be described below with reference to the respective drawings.

[0020] (First Embodiment) First, the reference voltage circuit 1 of the first embodiment will be described with reference to FIG. 1. As shown in the figure, the reference voltage circuit 1 includes a reference voltage generation unit 2 that generates a reference voltage, and a temperature characteristic correction unit 3 (= first temperature characteristic correction unit) that generates a PTAT (Proportional To Absolute Temperature) voltage for correcting the temperature characteristic of the reference voltage.

[0021] The reference voltage generation unit 2 includes a transistor M1 (= first field effect transistor) and a transistor M2 (= second field effect transistor). The transistor M1 is composed of an N-channel depletion type field effect transistor in which polysilicon containing n-type impurities is formed as a gate electrode. The transistor M2 is composed of an N-channel enhancement type field effect transistor in which polysilicon containing p-type impurities is formed as a gate electrode.

[0022] The drain of the transistor M1 is connected to the positive power supply terminal T21. A positive power supply voltage VDD is supplied to the positive power supply terminal T21. The gate and source of the transistor M1 are connected to the gate and drain of the transistor M2, and the common connection portion of the transistors M1 and M2 is connected to the output terminal T3. A reference voltage VREF1 is output from the output terminal T3. The constant current I1 generated by the transistor M1 is passed through the transistor M2, and a voltage corresponding to the difference between the threshold voltage of the transistor M2 and the threshold voltage of the transistor M1 is output as the gate-source voltage of the transistor M2. The transistors M1 and M2 are provided with equal aspect ratios. Therefore, the gate-source voltage of the transistor M2 has a negative temperature characteristic.

[0023] The temperature characteristic correction unit 3 has a PTAT voltage V with a positive temperature characteristic PTATIt is supplied to the source of the transistor M2 to reduce the temperature variation of the reference voltage VREF1. The temperature characteristic correction unit 3 includes a transistor M11 (= first transistor), a transistor M12 (= second transistor), a transistor M13 (= third transistor), a transistor M14 (= fourth transistor), a transistor M15 (= fifth transistor), and a constant current source 31 (= first current source). The transistors M11 and M12 are composed of P-channel field effect transistors. The transistors M13, M14, and M15 are composed of N-channel field effect transistors.

[0024] The transistors M11 and M12 constitute a differential input part in which the sources are commonly connected and currents with a current ratio corresponding to the input potential difference flow through them respectively. The constant current source 31 is connected between the sources of the transistors M11 and M12 and the positive power supply terminal T21.

[0025] The gate of the transistor M11 is connected to the negative power supply terminal T22. A negative power supply voltage VSS is supplied to the negative power supply terminal T22. The gate of the transistor M12 is connected to the drain of the transistor M15 and the source of the transistor M2.

[0026] The source of the transistor M13 is connected to the negative power supply terminal T22, and the gate and drain are connected to the drain of the transistor M12. That is, the transistors M12 and M13 are connected in series.

[0027] The source of the transistor M14 is connected to the negative power supply terminal T22, the gate is connected to the gate and drain of the transistor M13, and the drain is connected to the drain of the transistor M11. That is, the transistors M13 and M14 are connected in a current mirror configuration, and the drain current flowing through the transistor M13 is copied and folded back to the drain current of the transistor M14. Also, the transistors M11 and M14 are connected in series.

[0028] The drain of transistor M15 is connected to the gate of transistor M12, the source is connected to the negative power supply terminal T22, and the gate is connected to the connection point between transistor M11 and transistor M14.

[0029] Next, the operation of the reference voltage circuit 1 with the above-described configuration will be described. First, the operation of the reference voltage generation unit 2 will be described with reference to FIG. 2. FIG. 2 is a graph showing the relationship between the gate-source voltage Vgs and the drain current Ids of transistors M1 and M2. As shown in the figure, the depletion-type transistor M1 connected to function as a current source supplies a constant current I1 to the drain of the enhancement-type transistor M2 connected in diode connection. When the aspect ratios of transistors M1 and M2 are equal, this constant current I1 causes a voltage corresponding to the difference between the threshold voltage V TH_M2 of transistor M2 and the threshold voltage V TH_M1 of transistor M1 to be output as the gate-source voltage V GS_M2 of transistor M2. This gate-source voltage V GS_M2 becomes the output voltage generated by the reference voltage generation unit 2. Considering the ratio of the aspect ratios of transistors M1 and M2, the gate-source voltage V GS_M2 of transistor M2 is expressed by Equation 2 below.

[0030]

Equation

[0031] Here, V TH_M1 is the threshold voltage of transistor M1, V TH_M2 is the threshold voltage of transistor M2, S M1 is the aspect ratio of transistor M1 (W M1 / L M1 ), S M2 is the aspect ratio of transistor M2 (W M2 / L M2 ).

[0032] The output voltage V GS_M2It can generate a stable voltage that is less affected by process variations and power supply voltage fluctuations.

[0033] As described above, the gate electrode of transistor M1 is formed of polysilicon containing n-type impurities, and the gate electrode of transistor M2 is formed of polysilicon containing p-type impurities. Therefore, the temperature characteristics of the work functions of the gate electrodes of transistors M1 and M2 have opposite polarities, resulting in a difference in the temperature coefficient of the threshold voltage. When the aspect ratios S (W / L) of the channel widths W and channel lengths L of transistors M1 and M2 are equal (S M1 =S M2 ), if there is a difference in the temperature coefficient of the threshold voltage, the temperature coefficient of the output voltage V GS_M2 will not be zero. The output voltage V GS_M2 has a negative temperature characteristic of about -0.5 mV / °C.

[0034] To improve the temperature characteristics, the ratio S M1 of the channel width W M1 and channel length L M1 (W M1 / L M1 ) of transistor M1 and the ratio S M2 of the channel width W M2 and channel length L M2 (W M2 / L M2 ) of transistor M2 are adjusted respectively, and the ratio (S M1 / S M2 ) of the aspect ratios S (W / L) of transistors M1 and M2 is set in the range of about 1.5 to 2, so that the output voltage V GS_M2 can be stabilized against temperature changes.

[0035] However, due to radiation irradiation, positive charges are generated in the oxide film and the interface trap density at the interface between the silicon oxide film and the silicon substrate increases, so the threshold voltages of transistors M1 and M2 decrease. Since the amount of change in the threshold voltages of transistors M1 and M2 due to radiation irradiation is equal, the aspect ratio (W M1 / L M1 ) of transistor M1 and the aspect ratio (W M2 / LM2 ) have equal ratios (S M1 = S M2 ), when irradiated with radiation, the reference voltage does not fluctuate, but in order to correct the temperature characteristics, the aspect ratio (W M1 / L M1 ) of transistor M1 and the aspect ratio (W M2 / L M2 ) of transistor M2 are made different ratios (S M1 ≠ S M2 ), when irradiated with radiation, since the fluctuation amounts of the first and second terms in Equation 2 are different, the output voltage V GS_M2 fluctuates.

[0036] The reference voltage circuit 1 of the present invention equalizes the aspect ratios of transistors M1 and M2 in order to reduce the fluctuation of the reference voltage VREF1 due to radiation irradiation. Further, in order to reduce the fluctuation of the reference voltage VREF1 due to temperature, a PTAT voltage V PTAT having a positive temperature characteristic is generated by the temperature characteristic correction unit 3 and added to the output voltage V GS_M2 of the reference voltage generation unit 2.

[0037] Next, the operation of the temperature characteristic correction unit 3 will be described. Since transistors M13 and M14 are connected in a current mirror configuration, the current splitting ratio of the current flowing from the constant current source 31 to transistors M11 and M12 is always kept constant. Transistor M15 controls the gate potential of transistor M12 so that the current from the current source 31 always flows through transistors M11 and M12 at a constant splitting ratio.

[0038] To simplify the explanation, in this embodiment, transistors M13 and M14 are assumed to have equal aspect ratios. Also, the aspect ratio S M12 of transistor M12 is set to N times (N > 1) the aspect ratio S M11 of transistor M11.

[0039] The PTAT voltage V PTAT is the gate potential of transistor M11 plus the gate-source voltage V GS_M11and the voltage V between the gate and source of transistor M12 GS_M12 is a value obtained by adding the difference therebetween. That is, the PTAT voltage V PTAT is represented by Equation 3 below when VSS = 0.

[0040]

Equation

[0041] Since the aspect ratios of transistors M13 and M14 are equal, equal currents always flow through transistors M13 and M14. Transistor M15 controls the gate potential of transistor M12 so that the currents flowing through transistors M11 and M12 become equal (so that the current division ratio is 1:1). Therefore, equal currents always flow through transistors M11 and M12. When the currents flowing through transistors M11 and M12 are I2, the gate-source voltages V GS_M11 , V GS_M12 are represented by Equations 4 and 5 below, respectively.

[0042]

Equation

[0043]

Equation

[0044] Here, V T is the thermal voltage (kT / q), k is the Boltzmann constant, T is the absolute temperature, q is the unit charge of an electron, η is the subthreshold swing coefficient, I S is the reverse saturation current of transistor M11, and I S ·S M12 / S M11 is the reverse saturation current of transistor M12.

[0045] From Equations 3 to 5, the following Equations 6 and 7 are obtained.

[0046]

Number

[0047]

Number

[0048] According to Equation 6 and Equation 7, the PTAT voltage V PTAT is a value obtained by multiplying the thermal voltage V T of the semiconductor material by a constant K G1 . The thermal voltage V T has a positive temperature characteristic of about +0.086 mV / °C.

[0049] The reference voltage VREF1 generated by the reference voltage circuit 1 is represented by Equation 8.

[0050]

Number

[0051] That is, by adjusting the ratio (S M12 / S M11 ) of the aspect ratios S(W / L) of the transistors M11 and M12, as shown in Equation 9, the absolute value of the temperature characteristic of the output voltage V GS_M2 generated by the reference voltage generation unit 2 and the temperature characteristic of the thermal voltage V T generated by the temperature characteristic correction unit 3 are made equal to the constant K T representing the amplification factor of the thermal voltage V G1 . Under this condition, by adding the PTAT voltage V GS_M2 having a positive temperature coefficient generated by the temperature characteristic correction unit 3 to the output voltage V PTAT having a negative temperature coefficient generated by the reference voltage generation unit 2, the temperature characteristic of the reference voltage VREF1 can be canceled out.

[0052]

Number

[0053] That is, the reference voltage circuit 1 in this first embodiment sets the ratio (S M1 / S M2 ) of the aspect ratios S(W / L) of the transistors M1 and M2 to an equal condition (about 1) so that the reference voltage VREF1 does not fluctuate even when irradiated with radiation. By adopting a circuit configuration in which the negative temperature characteristic generated by the reference voltage generation unit 2 is offset by the positive temperature characteristic generated by the temperature characteristic correction unit 3, characteristic fluctuations due to radiation irradiation are suppressed.

[0054] Therefore, it is possible to reduce the variation in the reference voltage due to process variation, temperature variation, and power supply voltage variation, and an effect of enhancing radiation resistance is obtained.

[0055] In the first embodiment, the gate of the transistor M11 was connected to the negative power supply terminal T22, but the present invention is not limited to this. A circuit for generating at least one or more PTAT voltages may be connected between the gate of the transistor M11 and the negative power supply terminal T22.

[0056] (Second Embodiment) Next, the reference voltage circuit 1B of the second embodiment will be described with reference to FIG. 3. In FIG. 3, the same components as those in the circuit shown in FIG. 1 are denoted by the same reference numerals, and detailed description thereof will be omitted.

[0057] As shown in the figure, the reference voltage circuit 1B includes a temperature characteristic correction unit 3B (= second temperature characteristic correction unit) in addition to the reference voltage generation unit 2 and the temperature characteristic correction unit 3, similar to the first embodiment. Since the reference voltage generation unit 2 and the temperature characteristic correction unit 3 are the same as those in the first embodiment described above, detailed description thereof will be omitted here.

[0058] The temperature characteristic correction unit 3B includes a transistor M16 (= the sixth transistor), a transistor M17 (= the seventh transistor), a transistor M18 (= the eighth transistor), a transistor M19 (= the ninth transistor), and a constant current source 32 (= the second current source). The transistors M16 and M17 are composed of P-channel field effect transistors. The transistors M18 and M19 are composed of N-channel field effect transistors.

[0059] In the first embodiment, the gate of the transistor M11 of the temperature characteristic correction unit 3 was connected to the negative power supply terminal T22. However, in the second embodiment, the gate of the transistor M11 of the temperature characteristic correction unit 3 is connected to the gate and drain of the transistor M17 of the temperature characteristic correction unit 3B.

[0060] The transistors M16 and M17 constitute a differential input unit in which the sources are commonly connected and currents having a current ratio corresponding to the input potential difference flow therethrough. The constant current source 32 is connected between the sources of the transistors M16 and M17 and the positive power supply terminal T21. The gate of the transistor M16 is connected to the negative power supply terminal T22.

[0061] The source of the transistor M18 is connected to the negative power supply terminal T22, and the gate and drain are connected to the drain of the transistor M16. That is, the transistors M16 and M18 are connected in series.

[0062] The source of the transistor M19 is connected to the negative power supply terminal T22, the gate is connected to the gate and drain of the transistor M18, and the drain is connected to the gate and drain of the transistor M17. That is, the transistors M18 and M19 are connected in a current mirror configuration, and the drain current flowing through the transistor M18 is copied and folded back to the drain current of the transistor M19. Also, the transistors M17 and M19 are connected in series.

[0063] Next, the operation of the reference voltage circuit 1B having the above-described configuration will be described. The reference voltage circuit 1B in such a configuration is basically the same as that in the first embodiment, except for the points described later.

[0064] Since the transistors M18 and M19 are connected in a current mirror configuration, the current division ratio of the current flowing from the constant current source 32 to the transistors M16 and M17 is always kept constant.

[0065] To simplify the explanation, it is assumed that the transistors M18 and M19 have equal aspect ratios. Also, the aspect ratio S M17 of the transistor M17 is set to be N times (N > 1) the aspect ratio S M16 of the transistor M16.

[0066] The PTAT voltage V PTAT is a value obtained by adding the difference between the gate potential of the transistor M16 and the gate-source voltage V GS_M16 between the gate and source of the transistor M16 and the gate-source voltage V GS_M17 between the gate and source of the transistor M17, and the difference between the gate-source voltage V GS_M11 between the gate and source of the transistor M11 and the gate-source voltage V GS_M12 between the gate and source of the transistor M12. That is, the PTAT voltage V PATA is represented by the following equation 10 when VSS = 0.

[0067]

Equation

[0068] Since the aspect ratios of the transistors M18 and M19 are equal, equal currents always flow through the transistors M18 and M19. Therefore, equal currents always flow through the transistors M16 and M17. Let the current flowing through the transistors M16 and M17 be I3. When the transistors M16 and M17 operate in the subthreshold region, the gate-source voltages V GS_M16 , V GS_M17 are represented by the following equations 11 and 12, respectively.

[0069]

Number

[0070]

Number

[0071] Here, V T is the thermoelectric voltage (kT / q), k is the Boltzmann constant, T is the absolute temperature, q is the unit charge of an electron, η is the subthreshold swing coefficient, I S is the reverse saturation current of transistor M16, I S ·S M17 / S M16 is the reverse saturation current of transistor M17.

[0072] From Equation 10 to Equation 12, the following Equation 13 and Equation 14 are obtained.

[0073]

Number

[0074]

Number

[0075] According to Equation 13 and Equation 14, the PTAT voltage V PTAT is the value obtained by multiplying the thermoelectric voltage V T of the semiconductor material by a constant K G2 . The thermoelectric voltage V T has a positive temperature characteristic of about +0.086 mV / °C.

[0076] The reference voltage VREF2 generated by the reference voltage circuit 1B is represented by Equation 15.

[0077]

Number

[0078] That is, the ratio (S M12 / S M11 ) of the aspect ratios S(W / L) of the transistors M11 and M12, and the ratio (S M17 / S M16 ) of the aspect ratios S(W / L) of the transistors M16 and M17 are adjusted so that, as shown in Equation 16, the absolute value of the temperature characteristic of the output voltage V GS_M2 generated by the reference voltage generation unit 2 is equal to the ratio of the temperature characteristic of the thermoelectric voltage V T generated by the temperature characteristic correction units 3 and 3B to the temperature characteristic of the thermoelectric voltage V T , which is a constant K G2 representing the amplification factor of the thermoelectric voltage V GS_M2 . Under this condition, by adding the PTAT voltage V PTAT having a positive temperature coefficient generated by the temperature characteristic correction units 3 and 3B to the output voltage V GS_M2 having a negative temperature coefficient generated by the reference voltage generation unit 2, the temperature characteristic of the reference voltage VREF2 can be offset.

[0079]

Equation

[0080] That is, in the reference voltage circuit 1B in this second embodiment, the ratio (S M1 / S M2 ) of the aspect ratios S(W / L) of the transistors M1 and M2 is set to an equal condition (about 1) so that the reference voltage VREF2 does not fluctuate even when irradiated with radiation, and the circuit configuration is such that the negative temperature characteristic generated by the reference voltage generation unit 2 is offset by the positive temperature characteristic generated by the temperature characteristic correction units 3 and 3B, thereby suppressing characteristic fluctuations due to radiation irradiation.

[0081] Therefore, it is possible to reduce the variation in the reference voltage due to process variation, temperature variation, and power supply voltage variation, and an effect of enhancing radiation resistance is obtained.

[0082] Also, in the second embodiment described above, in addition to the ratio of the aspect ratios of the transistors M11 and M12, the ratio of the aspect ratios of the transistors M16 and M17 is adjusted to adjust the PTAT voltage VPTAT Since it can be adjusted, the PTAT voltage V PTAT is easy to adjust.

[0083] In the second embodiment, the gate of the transistor M16 was connected to the negative power supply terminal T22, but this is not the only case. A circuit for generating at least one or more PTAT voltages may be connected between the gate of the transistor M16 and the negative power supply terminal T22.

[0084] (Third Embodiment) Next, the reference voltage circuit 1C of the third embodiment will be described with reference to FIG. 4. In FIG. 4, the same components as those in the circuit shown in FIG. 3 are denoted by the same reference numerals, and detailed description thereof will be omitted.

[0085] As shown in the figure, the reference voltage circuit 1C is provided with a temperature characteristic correction unit 3C (= second temperature characteristic correction unit) in addition to the reference voltage generation unit 2 and the temperature characteristic correction units 3, 3B, similar to the second embodiment. Since the reference voltage generation unit 2 and the temperature characteristic correction units 3, 3B are the same as those in the second embodiment described above, detailed description thereof will be omitted here.

[0086] The temperature characteristic correction unit 3C includes transistors M16C (= sixth transistor), M17C (= seventh transistor), M18C (= eighth transistor), M19C (= ninth transistor), and a constant current source 33 (= second current source). The transistors M16C and M17C are composed of P-channel field effect transistors. The transistors M18C and M19C are composed of N-channel field effect transistors.

[0087] In the second embodiment, the gate of the transistor M16 of the temperature characteristic correction unit 3B was connected to the negative power supply terminal T22, but in the third embodiment, the gate of the transistor M16 of the temperature characteristic correction unit 3B is connected to the gate and drain of the transistor M17C of the temperature characteristic correction unit 3C.

[0088] Transistors M16C and M17C form a differential input section where each source is commonly connected and currents with a current ratio corresponding to the input potential difference flow through them respectively. A constant current source 33 is connected between each source of transistors M16C and M17C and the positive power supply terminal T21. The gate of transistor M16C is connected to the negative power supply terminal T22.

[0089] The source of transistor M18C is connected to the negative power supply terminal T22, and the gate and drain are connected to the drain of transistor M16C. That is, transistors M16C and M18C are connected in series.

[0090] The source of transistor M19C is connected to the negative power supply terminal T22, the gate is connected to the gate and drain of transistor M18C, and the drain is connected to the gate and drain of transistor M17C. That is, transistors M18C and M19C are connected in a current mirror configuration, and the drain current flowing through transistor M18C is copied and folded back to the drain current of transistor M19C. Also, transistors M17C and M19C are connected in series.

[0091] Next, the operation of the reference voltage circuit 1C with the above-described configuration will be described. The reference voltage circuit 1C in such a configuration is basically the same as that of the second embodiment, except for the points described later.

[0092] Since transistors M18C and M19C are connected in a current mirror configuration, the current split ratio of the currents flowing from the constant current source 33 to transistors M16C and M17C is always kept constant.

[0093] To simplify the explanation, assume that transistors M18C and M19C have the same aspect ratio. Also, the aspect ratio S M17C of transistor M17C is set to be N times (N > 1) the aspect ratio S M16C of transistor M16C.

[0094] PTAT voltage V PTATis the value obtained by adding the difference between the gate potential of transistor M16C and the gate-source voltage V GS_M16C of transistor M16C and the gate-source voltage V GS_M17C of transistor M17C, the difference between the gate-source voltage V GS_M16 of transistor M16 and the gate-source voltage V GS_M17 of transistor M17, and the difference between the gate-source voltage V GS_M11 of transistor M11 and the gate-source voltage V GS_M12 of transistor M12. That is, the PTAT voltage V PATA is represented by the following equation 17 when VSS = 0.

[0095]

Equation

[0096] Since the aspect ratios of transistors M18C and M19C are equal, equal currents always flow through transistors M18C and M19C. Therefore, equal currents also always flow through transistors M16C and M17C. Let the current flowing through transistors M16C and M17C be I4. When transistors M16C and M17C operate in the subthreshold region, the gate-source voltages V GS_M16C , V GS_M17C are represented by the following equations 18 and 19, respectively.

[0097]

Equation

[0098]

Equation

[0099] Here, V T is the thermal voltage (kT / q), k is the Boltzmann constant, T is the absolute temperature, q is the unit charge of an electron, η is the subthreshold swing coefficient, I S is the reverse saturation current of transistor M16C, I S·S M17C / S M16C is the reverse saturation current of transistor M17C.

[0100] From Equation 17 to Equation 19, the following Equation 20 and Equation 21 are obtained.

[0101]

Equation

[0102]

Equation

[0103] According to Equation 20 and Equation 21, the PTAT voltage V PTAT is the value obtained by multiplying the thermal voltage V T of the semiconductor material by a constant K G3 . The thermal voltage V T has a positive temperature characteristic of about +0.086 mV / °C.

[0104] The reference voltage VREF3 generated by the reference voltage circuit 1C is represented by Equation 22.

[0105]

Equation

[0106] That is, the ratio of the aspect ratio S (W / L) of each of the transistors M11 and M12 (S M12 / S M11 ), the ratio of the aspect ratio S (W / L) of each of the transistors M16 and M17 (S M17 / S M16 ), and the ratio of the aspect ratio S (W / L) of each of the transistors M16C and M17C (S M17C / S M16C ) are adjusted, and as shown in Equation 23, the absolute value of the temperature characteristic of the output voltage V GS_M2 generated by the reference voltage generation unit 2 and the temperature characteristic of the thermal voltage V T generated by the temperature characteristic correction units 3, 3B, and 3C, the ratio of the temperature characteristics of the thermal voltage V T represents the amplification factor constant K of the thermal voltage VG3 to be equal. Under this condition, the output voltage V having a negative temperature coefficient generated by the reference voltage generation unit 2 GS_M2 is added to the PTAT voltage V having a positive temperature coefficient generated by the temperature characteristic correction units 3, 3B, and 3C PTAT to cancel out the temperature characteristic of the reference voltage VREF3.

[0107]

Number

[0108] That is, in the reference voltage circuit 1C in this third embodiment, so that the reference voltage VREF3 does not fluctuate even when irradiated with radiation, the ratio (S of the aspect ratios S(W / L) of the transistors M1 and M2 M1 / S M2 ) is set to an equal condition (about 1), and the circuit configuration is such that the negative temperature characteristic generated by the reference voltage generation unit 2 is canceled out by the positive temperature characteristic generated by the temperature characteristic correction units 3, 3B, and 3C, thereby suppressing characteristic fluctuations due to radiation irradiation.

[0109] Therefore, it is possible to reduce the variation in the reference voltage due to process variation, temperature variation, and power supply voltage variation, and an effect of enhancing radiation resistance is obtained.

[0110] Also, in the above-described third embodiment, by adjusting three ratios of the aspect ratios of the transistors M11 and M12, the aspect ratios of the transistors M16 and M17, and the aspect ratios of the transistors M16C and M17C, the PTAT voltage V PTAT can be adjusted, so the PTAT voltage V PTAT is easy to adjust.

[0111] Note that the present invention is not limited to the above-described embodiments, and can be appropriately modified, improved, etc. In addition, the material, shape, dimensions, number, arrangement location, etc. of each component in the above-described embodiments are arbitrary as long as the present invention can be achieved, and are not limited.

[0112] In the above-described embodiments, the transistors M11 to M19 and M16C to M19C were composed of field-effect transistors, but the present invention is not limited to this. Bipolar transistors may be used instead of the field-effect transistors. In this case, "P-channel" can be read as "PNP type", "N-channel" as "NPN type", "gate" as "base", "source" as "emitter", and "drain" as "collector" for explanation.

[0113] In the above-described embodiments, one or two temperature characteristic correction units 3B and 3C were connected to the temperature characteristic correction unit 3, but the present invention is not limited to this. Three or more temperature characteristic correction units may be connected.

Explanation of Reference Numerals

[0114] 1, 1B, 1C reference voltage circuit 2 reference voltage generation unit 3 temperature characteristic correction unit (first temperature characteristic correction unit) 3B, 3C temperature characteristic correction unit (second temperature characteristic correction unit) 31 constant current source (first current source) 32, 33 constant current source (second current source) M1 transistor (first field-effect transistor) M2 transistor (second field-effect transistor) M11 transistor (first transistor) M12 transistor (second transistor) M13 transistor (third transistor) M14 transistor (fourth transistor) M15 transistor (fifth transistor) M16, M16C transistors (sixth transistor) M17, M17C transistors (seventh transistor) M18, M18C transistors (eighth transistor) M19, M19C transistors (ninth transistor)

Claims

1. A depletion-type first field-effect transistor having a gate electrode containing an n-type impurity, a gate electrode containing a p-type impurity is formed, and an enhancement-type second field-effect transistor having the same aspect ratio as the first field-effect transistor, a reference voltage generation unit that causes a constant current generated by the first field-effect transistor to flow through the second field-effect transistor to generate a voltage corresponding to the difference between the threshold voltage of the first field-effect transistor and the threshold voltage of the second field-effect transistor between the gate and source of the second field-effect transistor, a first current source, a first transistor and a second transistor having different aspect ratios and having a source or emitter commonly connected to the first current source, and a first temperature characteristic correction unit in which a gate or base of the second transistor is connected to a source of the second field-effect transistor. A reference voltage circuit.

2. In the reference voltage circuit according to claim 1, the first temperature characteristic correction unit includes a third transistor serially connected to the second transistor, a fourth transistor serially connected to the first transistor, and a fifth transistor connected between a gate or base of the second transistor and a source or emitter of the third transistor, and a gate or base of the fifth transistor is connected to a connection point of the first transistor and the fourth transistor. A reference voltage circuit.

3. In the reference voltage circuit according to claim 1, a second current source, a sixth transistor and a seventh transistor having different aspect ratios and having a source or emitter commonly connected to the second current source, A second temperature characteristic correction unit in which a gate or a base of the seventh transistor is connected to a gate or a base of the first transistor. Reference voltage circuit.

4. In the reference voltage circuit according to claim 1, A second current source, A plurality of second temperature characteristic correction units having a sixth transistor and a seventh transistor with different aspect ratios whose sources or emitters are commonly connected to the second current source, The plurality of second temperature characteristic correction units are connected in parallel, A gate or a base of the seventh transistor of the second temperature characteristic correction unit connected to the side closest to the first temperature characteristic correction unit is connected to a gate or a base of the first transistor, A gate or a base of the seventh transistor of the remaining second temperature characteristic correction units is connected to a gate or a base of the sixth transistor of the adjacent second temperature characteristic correction unit, Reference voltage circuit.

5. In the reference voltage circuit according to claim 3 or 4, The second temperature characteristic correction unit, An eighth transistor connected in series to the sixth transistor, And a ninth transistor connected in series to the seventh transistor, The eighth transistor and the ninth transistor are connected in a current mirror configuration, A gate-drain or base-collector of the seventh transistor is connected, Reference voltage circuit.

6. In the reference voltage circuit according to any one of claims 1 to 4, At least one of the transistors is composed of a field effect transistor, Reference voltage circuit.

7. In the reference voltage circuit according to any one of claims 1 to 4, At least one of the transistors is composed of bipolar transistors, a reference voltage circuit.

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