Imaging apparatus

By synchronizing the charge accumulation and readout of pixel signals across multiple vertical signal lines in an imaging device, the issue of flicker stripes in digital camera images is addressed, ensuring improved image quality under high-frequency light sources.

JP2025095760APending Publication Date: 2025-06-26CANON KK
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Patent Information

Application Number
JP2023212040
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-12-15
Publication Date
2025-06-26

AI Technical Summary

Technical Problem

Digital cameras struggle to reduce flicker stripes in images captured under light sources with high driving frequencies, such as digital signage and LEDs, especially when using an electronic shutter.

Method used

The imaging device employs a control mechanism that adjusts the charge accumulation timing for multiple vertical signal lines, allowing for simultaneous readout of pixel signals at the same scanning speed, thereby reducing flicker stripes regardless of shutter speed or light source size.

Benefits of technology

This approach effectively minimizes flicker stripes in images captured using an electronic shutter, maintaining image quality across varying shutter speeds and light source sizes within the depth of field.

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Abstract

To reduce flicker stripes when imaging is performed by using an electronic shutter, regardless of a shutter speed and the size of a flicker light source in a depth of field.SOLUTION: In an imaging apparatus 101 comprising an image pick-up device 102 and a control unit 106 that controls the drive of the image pick-up device 102, the image pick-up device 102 has a plurality of pixels 202 that are arranged in a matrix, and a plurality of vertical signal lines 205A-205F that are connected for every column of the plurality of pixels 202. The vertical signal lines 205A-205F are connected respectively to pixels on a plurality of columns, of the plurality of pixels 202. The control unit 106 performs accumulation of electric charges in the plurality of pixels 202 for every group of the vertical signal lines 205A-205F for the same accumulation time with a shift by a constant time, and subsequently, performs control of reading out pixel signals from the plurality of pixels 202 at the same scanning speed for every group of the vertical signal lines 205A-205F.SELECTED DRAWING: Figure 5
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Description

Technical Field

[0001] The present invention relates to an imaging device such as a digital camera that performs imaging using an imaging element.

Background Art

[0002] When imaging is performed with a digital camera under a light source that flickers, stripes due to flicker (hereinafter referred to as "flicker stripes") may occur in the obtained captured image, resulting in a deterioration of the image quality. Therefore, as a technique for reducing the occurrence of flicker stripes, Patent Document 1 proposes a method of obtaining the frequency of flicker from an image and setting the shutter speed to an integer multiple of the flicker frequency.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In recent years, digital signage, LEDs, etc. have come to be widely used. Since the driving frequency of digital signage is higher than that of a general commercial power supply, and LEDs have a steep rise in turning on and off, when imaging is performed with a digital camera in an environment where light emitted from these light sources is present, clear flicker stripes may be recorded in the captured image.

[0005] In response to this problem, in the technique disclosed in Patent Document 1 above, the shutter speed cannot be freely selected, and the accuracy of flicker detection decreases when the range in which flicker stripes occur is small, such as when a digital signage is included in a part of the subject field in the captured image. Further, when imaging is performed using an electronic shutter that utilizes the driving of the imaging element, since the electronic shutter has a higher shutter efficiency than a mechanical shutter, flicker stripes tend to be recorded more clearly.

[0006] The present invention has been made in view of such circumstances, and an object thereof is to provide an imaging device capable of reducing flicker stripes in imaging by an electronic shutter regardless of the shutter speed or the size of a flicker light source within the depth of field.

Means for Solving the Problems

[0007] An imaging device according to the present invention is an imaging device including an imaging element and control means for controlling driving of the imaging element, wherein the imaging element has a plurality of pixels arranged in a matrix and a plurality of vertical signal lines connected for each column of the plurality of pixels, each of the plurality of vertical signal lines is connected to pixels in a plurality of rows among the plurality of pixels, and the control means performs control to read pixel signals of the plurality of pixels at the same scanning speed for each of the plurality of vertical signal lines after accumulating charges in the plurality of pixels at the same accumulation time with a constant time shift for each of the plurality of vertical signal lines.

Effects of the Invention

[0008] According to the present invention, it is possible to provide an imaging device capable of reducing flicker stripes in imaging by an electronic shutter regardless of the shutter speed or the size of a flicker light source within the depth of field.

Brief Description of the Drawings

[0009]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Embodiments for Carrying Out the Invention

[0010] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0011] FIG. 1 is a block diagram showing a schematic configuration of an imaging device 101 according to an embodiment. The imaging device 101 includes an image sensor 102, a photographing lens 103, a lens driving unit 104, a signal processing unit 105, a control unit 106, a storage unit 107, a recording unit 108, an operation unit 109, and a display unit 110. The imaging device 101 is, for example, a digital camera, but may be an electronic device having an imaging function by an image sensor (for example, a digital video camera, a smartphone, a mobile phone, a tablet PC, a laptop PC, etc.), and is not limited to a digital camera.

[0012] The photographing lens 103 is represented by one lens in FIG. 1, but is composed of a plurality of lenses such as a focus lens, a zoom lens, and an image stabilization lens. The lens driving unit 104 performs focus control and the like of the photographing lens 103 according to a command from the control unit 106, and forms an incident light on the imaging surface of the image sensor 102. The image sensor 102 converts an optical image formed on the imaging surface into an electrical signal and outputs it to the signal processing unit 105. The signal processing unit 105 performs various arithmetic processes (image processing) such as gain processing, offset correction, and white balance correction on the image signal transmitted from the image sensor 102. Note that the image sensor 102 and the signal processing unit 105 are connected by a plurality of signal lines.

[0013] The control unit 106 controls the overall operation of the imaging device 101, including driving control of the imaging element 102 and the lens driving unit 104. The imaging device 101 may be configured such that the control unit 106 undertakes the functions (roles) of the signal processing unit 105 without including the signal processing unit 105. The storage unit 107 is a memory (RAM) that holds the image data and offset correction values processed by the signal processing unit 105, and outputs the held data to the signal processing unit 105 according to an instruction from the control unit 106. The recording unit 108 is a semiconductor memory (memory card) or the like that is detachable from the main body (housing unit) of the imaging device 101, and stores the image data of the captured image and the like. The operation unit 109 is buttons, switches, touch panels, etc. that receive user operations. The display unit 110 has a liquid crystal display or the like that displays various information such as live view video, captured images, and set values of imaging conditions.

[0014] Figure 2 is a block diagram showing a partial pixel configuration of the imaging element 102 and a schematic configuration of its peripheral circuit. The pixel section 201 is composed of a plurality of pixels 202 arranged in a matrix and color filters arranged for each of the plurality of pixels 202. A so-called Bayer array is adopted for the arrangement of the color filters. In the imaging element 102, six vertical signal lines are provided in each column. However, the number of vertical signal lines provided in each column is not limited to six, and can be any number according to the required performance. Examples include 12 and 20.

[0015] One of the plurality of pixels 202, pixel 202A, is connected to the vertical signal line 205A by a selection switch (not shown) and outputs a pixel signal to the column circuit 206A for each row. In FIG. 2, pixel 202G is also connected to the vertical signal line 205A. Similarly, pixels 202B and 202H are connected to the vertical signal line 205B and output to the column circuit 206B. Pixels 202C and 202I are connected to the vertical signal line 205C and output to the column circuit 206C. Pixels 202D and 202J are connected to the vertical signal line 205D and output to the column circuit 206D. Pixels 202E and 202K are connected to the vertical signal line 205E and output to the column circuit 206E. Pixels 202F and 202L are connected to the vertical signal line 205F and output to the column circuit 206F.

[0016] That is, in the imaging device 102, assuming the number of the plurality of vertical signal lines is N (N is an integer, here '6'), the pixels 202 are configured to be connected to one vertical signal line for every N rows. However, it is not limited to this, and a plurality of selection switches may be provided for each of the plurality of pixels 202, and each pixel may be connected to all or a part of the vertical signal lines 205A to 205F. Note that the vertical signal lines 205C to 205F are connected to the column circuits 206C to 206F respectively, in the same manner as the vertical signal lines 205A and 205B. However, in FIG. 2, the connections thereof are omitted because the figure would become complicated.

[0017] A row selection pulse PSEL, a reset pulse PRES, and a transfer pulse PTX are input to the pixel 202. In FIG. 2, the signal lines for inputting these pulses are collectively represented as the signal line 203.

[0018] The row selection switch (not shown) performs potential selection control of a specific pixel group from the vertical scanning circuit 204 via the signal line 203, and is scanned in the row direction (the direction of arrangement of rows, that is, the direction orthogonal to the rows) by the vertical scanning circuit 204. The signal line 203 is connected to the pixel 202, and a common signal is sent to the pixels 202 in the same row, and pixel signals are read out simultaneously from the pixels 202 with the same row number.

[0019] The timing generator 212 (hereinafter referred to as "TG212") generates a pulse signal and a comparison reference signal for controlling transistors and the like in the vertical scanning circuit 204 and the pixels 202. The D / A converter 213 (hereinafter referred to as "DAC213") generates a reference signal (a slope signal or a ramp signal) whose level changes over time. The reference signal is input to the comparator 207 through the control of the TG212.

[0020] As described above, pixel signals from the vertical signal lines 205A to 205F are input to the column circuits 206A to 206F. The column circuits 206A to 206F have the same configuration and are composed of a comparator 207, a counter 208, and a column memory 209. Hereinafter, the column circuit 206A will be taken up for continued explanation, and the explanations for the column circuits 206B to 206F will be omitted.

[0021] In the column circuit 206A, the comparator 207 receives the reference signal generated by the DAC213 and the pixel signal sent from the vertical signal line 205A. The comparator 207 compares the potential V of the vertical signal line 205A with the reference signal that changes over time, and detects the timing at which the magnitude relationship is reversed. The counter 208 measures the time until the magnitude relationship between the potential V and the reference signal is reversed based on the clock, and uses the measured time as a digital signal. The column memory 209 holds the digital signal measured by the counter 208.

[0022] The horizontal scanning circuit 214 scans the column circuits 206A to 206F in the column direction (the direction in which the columns are arranged, that is, the direction orthogonal to the columns), and outputs the digital signals held in the column memory 209 through the horizontal signal lines 215A to 215F that are commonly connected for each column. The horizontal scanning circuit 214 is also controlled by the TG212.

[0023] FIG. 3 is a circuit diagram showing an example of the configuration of pixel 202. A photodiode 301 (hereinafter referred to as "PD301") included in one pixel 202 is connected to a common floating diffusion 303 (hereinafter referred to as "FD303") via a transfer switch 302. The transfer switch 302 is controlled by a transfer pulse PTX output from the vertical scanning circuit 204. FD303 temporarily accumulates the charge transferred from PD301 and converts the charge into a voltage.

[0024] The reset switch 304 is controlled by a reset pulse PRES and supplies a reference potential VDD to FD303. The pixel amplifier 305 is a source follower circuit composed of a MOS transistor and a constant current source. The selection switch 306 is controlled by a selection pulse PSEL and outputs the potential variation of the pixel amplifier 305 to a column circuit (for example, column circuit 206A via the vertical signal line 205A if it is pixel 202A) via the vertical signal line.

[0025] FIG. 4 is a timing chart of the process of reading out pixel signals from the imaging device 102. The series of operations described below are performed independently for each connection of the vertical signal lines 205A to 205F, the column circuits 206A to 206F, and the horizontal signal lines 215A to 215F.

[0026] At time t401, when the reset pulse PRES is in the Hi state and the transfer pulse PTX becomes Hi, the pixel 202 is reset. Charge accumulation starts in PD301 from the time when the transfer pulse PTX becomes Lo. In the imaging device 102, the transfer pulse PTX is maintained in the Lo state during charge accumulation.

[0027] At time t402, a certain row is connected to the vertical signal line 205 by the selection pulse PSEL.

[0028] At time t403, when the reset pulse PRES changes from Hi to Lo, the potential V (reset signal N) of FD303 after reset release is input to the comparator 207 via the vertical signal line 205.

[0029] At time t404, the DAC213 starts outputting a reference signal that changes in a ramp shape (linear slope shape). At the same time as the start of the output of the reference signal by the DAC213, the counter 208 starts counting.

[0030] At time t405, the comparator 207 is inverted due to the inversion of the magnitude relationship between the input signal and the reference signal, and the value of the counter 208 at that time is held in the column memory 209. At time t406 when the reference signal reaches a predetermined upper limit value, a signal is output from the horizontal scanning circuit 214, and the reading (N-reading) of the reset signal N of the pixel 202 is completed.

[0031] At time t407, the charge of the pixel 202 is transferred to the FD303 by the transfer pulse PTX, and the potential V of the vertical signal line 205 becomes a potential corresponding to the pixel signal. Also, at time t407, the comparator 207 is reset.

[0032] At time t408, the DAC213 starts outputting a reference signal that changes in a ramp shape. At the same time as the start of the output of the reference signal by the DAC213, the counter 208 starts counting.

[0033] At time t409, the comparator 207 is inverted due to the inversion of the magnitude relationship between the input signal and the reference signal, and the value of the counter 208 at that time is held in the column memory 209. At time t410 when the reference signal reaches a predetermined upper limit value, a signal is output from the horizontal scanning circuit 214, and the reading (S-reading) of the pixel signal is completed. Thereafter, predetermined signal processing such as subtracting the N signal from the S signal is performed.

[0034] Next, the vertical scanning method during pixel signal readout will be described. Since the imaging device 102 is provided with six vertical signal lines 205A to 205F in each column, the charges accumulated in the PDs 301 for six rows can be simultaneously read out in one scan. However, when there is incident light from a light source that flickers at a high frequency, all six rows are affected by the flickering, and flicker stripes are clearly recorded. Therefore, in the imaging device 101, the six vertical signal lines 205A to 205F are divided into three vertical signal line groups, and charge accumulation in the PD 301 is performed at different timings for each vertical signal line group, and the accumulated charges are read out to reduce the flicker stripes appearing in the captured image.

[0035] FIG. 5 is a schematic diagram for explaining the vertical scanning method during pixel signal readout. As an example, it shows that readout scanning is sequentially performed for pixels for 12 rows in units of rows.

[0036] On the right side of FIG. 5, it is shown that the vertical signal lines 205A to 205F (simply denoted as A to F in FIG. 5) are respectively connected to the pixels 202 with row numbers 6N + 1 to 6N + 6. Similarly, the vertical signal lines 205A to 205F are also respectively connected to the pixels 202 with row numbers 6N + 7 to 6N + 12. Also, the six vertical signal lines 205 in each column constitute three vertical signal line groups, and three vertical signal line groups 1 to 3 are shown in FIG. 5. The vertical signal line group 1 is composed of the vertical signal lines 205A and 205D, the vertical signal line group 2 is composed of the vertical signal lines 205B and 205E, and the vertical signal line group 3 is composed of the vertical signal lines 205C and 205F. Note that the configuration of the vertical signal line groups may be any combination of vertical signal lines and is not limited to the above-described configuration.

[0037] On the left side of FIG. 5, a so-called slit rolling operation in which the imaging timing is defined by the vertical synchronization signal VD is shown. The rows of pixels 202 are taken on the vertical axis, and the horizontal axis is the time axis. The hatched portions in each row indicate the read timing and reset timing of the pixel signals by the electronic shutter of that row. In addition, solid lines 51, 52, 53 schematically represent the read timing of the pixel signals of that row, and dashed lines 55, 56, 57 schematically represent the reset timing of that row. The time from the reset operation to the start of the read operation of the pixel signal is the accumulation time.

[0038] The reading of the pixel signals (accumulated charges) of the vertical signal line group 1 from the vertical synchronization signal VD is started. The shutter of the vertical signal line group 1 is started in the previous frame and is started a predetermined accumulation time before the start of the reading of the pixel signals. Note that the shutter means the accumulation of charges, the start of the shutter means the start of the accumulation of charges, and the same meaning is used in the following description. The charges accumulated in each pixel are read out as the pixel signals of each pixel.

[0039] The shutter and the reading of the pixel signals of the vertical signal line group 2 are each delayed by the accumulation time from the shutter and the reading of the pixel signals of the vertical signal line group 1 and are started independently of the vertical signal line group 1. The shutter and the reading of the pixel signals of the vertical signal line group 3 are each delayed by the accumulation time from the shutter and the reading of the vertical signal line group 2 and are started independently of the vertical signal line group 1 and the vertical signal line group 2.

[0040] Note that the same accumulation time is set for the vertical signal line groups 1 to 3 in order to equalize the exposure of the pixel signals read from the vertical signal line groups 1 to 3. Also, in order to equalize the distortion due to the rolling shutter, signals are read from the vertical signal line groups 1 to 3 at the same scanning speed. In this embodiment, the start timing of the shutters of the vertical signal line groups 1 to 3 is shifted by the accumulation time, but this shift time is not limited to the charge accumulation time as long as the shutter and the reading of the pixel signals are performed at different timings independently for each of the three vertical signal line groups 1 to 3.

[0041] FIG. 6 is a schematic diagram showing the relationship between vertical scanning and flicker stripes appearing in a captured image. On the left side of FIG. 6, the relationship between the lighting / extinguishing state of a light source (not shown) that periodically turns on and off over time t601 to t610 on the horizontal axis (time axis) and the pixel signal readout timing of the vertical signal line groups 1 to 3 is shown. On the right side of FIG. 6, the exposure states 1 to 3 of the light source in the captured image recorded by reading the pixel signals from the vertical signal line groups 1 to 3 are shown. Note that on the left and right sides of FIG. 6, the row direction of the imaging device 102 is commonly taken on the vertical axis.

[0042] The light source repeats turning on and off at a constant period, and is on during the periods of time t601 to t604 and t607 to t609, and off during the periods of time t604 to t607 and t609 to t610.

[0043] On the left side of FIG. 6, for the vertical signal line group 1, it is shown that the shutter (charge accumulation) starts at time t601 (dashed line), and the reading of the pixel signal starts at time t602 (solid line). For the vertical signal line group 2, the shutter starts at time t602, and the reading of the pixel signal starts at time t603. For the vertical signal line group 3, the shutter starts at time t603, and the reading of the pixel signal starts at time t604. Note that the dashed lines indicating the start of the shutter for the vertical signal line groups 2 and 3 overlap with the solid lines indicating the start of the reading of the pixel signals for the vertical signal line groups 1 and 2, respectively.

[0044] On the right side of FIG. 6, the flicker stripes appearing in the captured image are schematically represented. The exposure state 1 of the captured image represents the exposure state of the light source recorded by reading the pixel signal with the vertical signal line group 1. Similarly, the exposure state 2 is for the vertical signal line group 2, and the exposure state 3 is for the vertical signal line group 3, each representing the exposure state of the light source recorded by reading the pixel signal.

[0045] First, the exposure state 1 of the light source recorded in the vertical signal line group 1 will be described. For the rows where the shutter of the vertical signal line group 1 is started at times t601 to t603, since the light source is always lit during the accumulation period, it results in proper exposure, and this state is shown in white (the background color of the paper). For the rows where the shutter of the vertical signal line group 1 is started at times t603 to t604, since the light source is turned off during part of the accumulation period, it results in insufficient exposure with reduced exposure, and this state is shown by hatching. For the rows where the shutter of the vertical signal line group 1 is started at times t604 to t605, since the light source is always turned off during the accumulation period, it results in a state of blackening with even more reduced exposure than the insufficient exposure at times t603 to t604, and this state is shown by solid black. For the rows where the shutter of the vertical signal line group 1 is started at times t605 to t607, since the light source is turned off during part of the accumulation period, it results in the same insufficient exposure as that at times t603 to t604, and this state is shown by hatching. Since the light source repeats turning on and off in the same cycle, hereafter, the exposure states are repeated in the order of proper exposure (white), insufficient exposure (hatching), blackening (solid black), insufficient exposure (hatching), and proper exposure (white).

[0046] Next, the exposure state 2 of the light source recorded in the vertical signal line group 2 will be described. The shutter start of the vertical signal line group 2 starts at time t602, which is delayed by the accumulation time from the shutter start of the vertical signal line group 1. The rows where the shutter of the vertical signal line group 2 is started between time t602 and t603 have proper exposure because the light source is always lit during the accumulation period, and this state is shown in white. The rows where the shutter of the vertical signal line group 2 is started between time t603 and t604 have insufficient exposure because the light source is turned off during a part of the accumulation period, and this state is shown by hatching. The rows where the shutter of the vertical signal line group 2 is started between time t604 and t605 are in a state of blackening because the light source is always turned off during the accumulation period, and this state is shown by solid black. The rows where the shutter of the vertical signal line group 2 is started between time t605 and t607 have insufficient exposure because the light source is turned off during a part of the accumulation period, and this state is shown by hatching. Since the light source repeats turning on and off in the same cycle, hereafter, the exposure states are repeated in the order of proper exposure (white), reduced exposure (hatching), blackening (solid black), reduced exposure (hatching), and proper exposure (white).

[0047] Next, the exposure state 3 of the light source recorded in the vertical signal line group 3 will be described. The shutter start of the vertical signal line group 3 starts from time t603, which is delayed by the accumulation time compared to the shutter start of the vertical signal line group 2. The rows where the shutter of the vertical signal line group 3 is started at times t603 to t604 are under-exposed because the light source is turned off during part of the accumulation period, and this state is indicated by hatching. The rows where the shutter of the vertical signal line group 3 is started at times t604 to t605 are in a blacked-out state because the light source is always turned off during the accumulation period, and this state is indicated by solid black. The rows where the shutter of the vertical signal line group 3 is started at times t605 to t607 are under-exposed because the light source is turned off during part of the accumulation period, and this state is indicated by hatching. The rows where the shutter of the vertical signal line group 3 is started at times t607 to t608 are properly exposed because the light source is always on during the accumulation period, and this state is indicated by white. Since the light source repeats turning on and off in the same cycle, after this, the exposure states are repeated in the order of exposure reduction (hatching), blacking out (solid black), exposure reduction (hatching), proper exposure (white), exposure reduction (hatching).

[0048] In this way, by shifting the shutter start timing of each vertical signal line group, it is possible to shift the rows where charges are accumulated when the light source is on and the rows where charges are accumulated when the light source is off for each vertical signal line group. That is, in the captured image, by being able to shift the rows with proper exposure, reduced exposure, and blacking out for each column, it is possible to reduce flicker stripes.

[0049] Note that by shifting the start timing of the shutter of each vertical signal line group, the output of the digital signal from the column circuit 206 to the column memory 209 by the measurement of the counter 208 is shifted. Therefore, it is necessary to swap the rows so that the order in the row direction of the captured image is correct. This swapping may be performed by the horizontal scanning circuit 214 or by the signal processing unit 105.

[0050] In the above-described embodiment, the three vertical signal line groups 1 to 3 have been described, with each vertical signal line group having two vertical signal lines, and the deviation amount of the shutter start in the vertical signal line groups 1 to 3 has been described as the accumulation time. However, the present invention is not limited to such a configuration. Further, these three parameters (the number of vertical signal line groups, the number of vertical signal lines, and the deviation amount of the shutter start) may be configured to be changeable by an input operation from the operation unit 109 by the user.

[0051] Furthermore, it may be configured such that an image captured with the parameters set by an input operation from the operation unit 109 is displayed on the display unit 110, and the parameters can be changed while confirming the effect of reducing flicker stripes. For example, it is preferable to arrange and display captured images with different parameter settings so that the effects of the parameter settings can be compared. Specifically, the image captured under the setting conditions before the operation of the operation unit 109 and the image captured under the setting conditions after the operation are arranged and displayed on the display unit 110. At this time, it is also desirable to display the names of the parameters with different setting values and their setting values in each image so that the user can visually recognize the difference in the parameter setting values.

[0052] The disclosure of the present embodiment includes the following configurations. (Configuration 1) An imaging device including an imaging element and control means for controlling the driving of the imaging element, wherein the imaging element has a plurality of pixels arranged in a matrix and a plurality of vertical signal lines connected to each column of the plurality of pixels, the plurality of vertical signal lines are each connected to pixels in a plurality of rows of the plurality of pixels, and the control means performs control to read out pixel signals of the plurality of pixels at the same scanning speed for each of the plurality of vertical signal lines after shifting the charge accumulation in the plurality of pixels by a certain time for each of the plurality of vertical signal lines and performing the charge accumulation for the same accumulation time. (Configuration 2) The control means divides the plurality of vertical signal lines into two or more vertical signal line groups, accumulates charges in the plurality of pixels at the same accumulation time with a certain time shift for each of the two or more vertical signal line groups, and reads out pixel signals of the plurality of pixels at the same scanning speed for each of the two or more vertical signal line groups. The imaging device according to Configuration 1, characterized in that. (Configuration 3) The number of the plurality of vertical signal lines is N (N is an integer), and the plurality of pixels are connected to one vertical signal line every N rows. The imaging device according to Configuration 1 or 2, characterized in that. (Configuration 4) The imaging element includes a column circuit connected to each of the plurality of vertical signal lines, and a horizontal scanning circuit that scans the plurality of column circuits in the column direction and reads out pixel signals of the plurality of pixels from each column circuit. The control means controls the reading of pixel signals from the plurality of column circuits by the horizontal scanning circuit so that the order of pixel signals in the row direction in the captured image is correct. The imaging device according to any one of Configurations 1 to 3, characterized in that. (Configuration 5) The imaging element includes a column circuit connected to each of the plurality of vertical signal lines, and a horizontal scanning circuit that scans the plurality of column circuits in the column direction and reads out pixel signals of the plurality of pixels from each column circuit. The imaging device according to any one of Configurations 1 to 3, further comprising signal processing means for rearranging the pixel signals read from the plurality of column circuits so that the order of pixel signals in the row direction in the captured image is correct. (Configuration 6) The imaging device according to any one of Configurations 1 to 5, characterized by having operation means for setting at least one of the certain time, the number of the plurality of vertical signal line groups, and the number of the vertical signal lines constituting the vertical signal line groups. (Configuration 7) The imaging device according to Configuration 6, characterized by having display means, and the control means displays the image captured under the setting conditions before the operation of the operation means and the image captured under the setting conditions after the operation of the operation means side by side on the display means.

[0053] As described above, the present invention has been described in detail based on its preferred embodiments. However, the present invention is not limited to these specific embodiments, and various forms within the scope not departing from the gist of the present invention are also included in the present invention. Furthermore, each of the above-described embodiments merely shows one embodiment of the present invention, and it is also possible to appropriately combine each embodiment.

Explanation of Reference Numerals

[0054] 101 Imaging device 102 Image sensor 103 Control unit 109 Operation unit 110 Display unit 202A to 202F Pixels 205A to 205F Vertical signal lines 214 Horizontal scanning circuit

Claims

1. An imaging device comprising an imaging element and control means for controlling the driving of the imaging element, wherein the imaging element has a plurality of pixels arranged in a matrix and a plurality of vertical signal lines connected to each column of the plurality of pixels, each of the plurality of vertical signal lines is connected to pixels in a plurality of rows among the plurality of pixels, the control means controls the reading of pixel signals of the plurality of pixels at the same scanning speed for each of the plurality of vertical signal lines after performing charge accumulation in the plurality of pixels at the same accumulation time with a constant time shift for each of the plurality of vertical signal lines. The imaging device is characterized by this.

2. The control means divides the plurality of vertical signal lines into two or more vertical signal line groups, performs charge accumulation in the plurality of pixels at the same accumulation time with a constant time shift for each of the two or more vertical signal line groups, and reads pixel signals of the plurality of pixels at the same scanning speed for each of the plurality of vertical signal line groups. The imaging device according to claim 1 is characterized by this.

3. The imaging device according to claim 1 or 2, wherein the number of the plurality of vertical signal lines is N (N is an integer), and the plurality of pixels are connected to one vertical signal line every N rows.

4. The imaging element has a column circuit connected to each of the plurality of vertical signal lines and a horizontal scanning circuit that scans the plurality of column circuits in the column direction and reads pixel signals of the plurality of pixels from each column circuit, the control means controls the reading of pixel signals from the plurality of column circuits by the horizontal scanning circuit so that the order of pixel signals in the row direction in the captured image is correct. The imaging device according to claim 2 is characterized by this.

5. The imaging element has a column circuit connected to each of the plurality of vertical signal lines and a horizontal scanning circuit that scans the plurality of column circuits in the column direction and reads pixel signals of the plurality of pixels from each column circuit, the imaging device according to claim 2 further comprises signal processing means for rearranging pixel signals read from the plurality of column circuits so that the order of pixel signals in the row direction in the captured image is correct.

6. The imaging device according to claim 1 or 2, further comprising operation means for setting at least one of the constant time, the number of the plurality of vertical signal line groups, and the number of the vertical signal lines constituting the vertical signal line group.

7. having display means ​ ​ ​ ​ ​ ​ ​ The imaging apparatus according to claim 6, wherein the control means displays side by side on the display means an image captured under the setting conditions before the operation of the operation means and an image captured under the setting conditions after the operation of the operation means.

Citation Information

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