Driving method for display device

Abstract

To provide a novel display device that causes a light-emitting element to light by a triangular wave.SOLUTION: A driving method for a display device including a first pixel, a second pixel, a first wire, a second wire, and a third wire is provided. The first wire is electrically connected to the first pixel and the second pixel. The second wire is electrically connected to the first pixel and the third wire is electrically connected to the second pixel. To the first pixel, first display data is applied through the second wire and to the second pixel, and second display data is applied through the third wire. The first pixel or the second pixel starts to emit light at different times. At the first time, the first pixel reaches the maximum luminance corresponding to the first display data and the second pixel reaches the maximum luminance corresponding to the second display data. By applying a reset signal to the first wire, the first pixel and the second pixel are initialized at a second time, so that the light is turned off.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] One aspect of the present invention relates to a display device and a method for driving the display device.

[0002] Note that one aspect of the present invention is not limited to the above technical field. The invention disclosed in this specification etc. The technical field of one aspect relates to an article, a method, or a manufacturing method. Or, the present invention relates to a process , a machine, a manufacture, or a composition of matter. . In particular, one aspect of the present invention relates to a semiconductor device, a display device, a light-emitting device, a power storage device, a storage device, and their driving methods, or their manufacturing methods.

[0003] Note that in this specification etc., a semiconductor device refers to an element, a circuit, or a device etc. that can function by utilizing semiconductor characteristics. As an example, semiconductor elements such as transistors and diodes are semiconductor devices. As another example, a circuit having semiconductor elements is a semiconductor device . As another example, a device including a circuit having semiconductor elements is a semiconductor device .

Background Art

[0004] Electronic devices including display devices have become widespread. There is a demand for display devices used in electronic devices that can display more information. For example, in a liquid crystal display device, in order to display a larger amount of information, driving methods such as a field sequential method in which light sources having a plurality of different hues are sequentially lit to perform display have been proposed. In the field sequential method, different hues of light are sequentially lit on one pixel to perform display, so that the amount of information to be displayed can be increased.

[0005] ​​​In Patent Document 1, a method of controlling the lighting or extinguishing of a light source having a plurality of hues in a backlight is PWM (Pulse Width Modulation) driving using a triangular wave is disclosed.

[0006] In large display devices such as TVs or signage devices, or wearable electronic devices such as head-mounted displays a display device using a small LED as a light-emitting element is disclosed in Patent Document 2. is disclosed.

Prior Art Documents

Patent Documents

[0007]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0008] A display device having a liquid crystal element that displays using a single light source and a three-color color filter has problems such as it being difficult to display black without turning off the backlight and it being difficult to increase the contrast. In the field sequential method, since one pixel sequentially lights up lights of different hues for display, it is suitable for high definition because it is not necessary to provide sub-pixels and the pixel size can be made small, but there is a problem that the power consumption increases because lights of a plurality of hues are turned on or off. Also, in head-mounted displays and the like, since they are worn on the body, weight reduction and power consumption reduction are required. For example, if the power consumption increases, the head-mounted display lights up or extinguishes lights of a plurality of hues, so there is a problem that the power consumption increases. is large.

[0009] Moreover, in head-mounted displays and the like, since they are worn on the body, weight reduction and power consumption reduction are required. For example, if the power consumption becomes large, the head-mounted display For example, when the power consumption increases, the head-mounted display In the case of a ray or the like, it is necessary to increase the size of the battery, and the head-mounted display, which has a large load as an electronic device, when worn on the body, has a problem of increasing the burden on the user's body.

[0010] In view of the above problems, one aspect of the present invention is to provide a display device with a novel configuration as one of the problems. Or, one aspect of the present invention is to provide a driving method for a novel display device as one of the problems. Or, one aspect of the present invention is to provide a driving method for a display device that reduces power consumption as one of the problems. Or, one aspect of the present invention is to provide a driving method for a display device that improves the contrast of the display as one of the problems.

[0011] Note that the description of these problems does not prevent the existence of other problems. Note that one aspect of the present invention is not required to solve all of these problems. Note that other problems will naturally become clear from the descriptions in the specification, drawings, claims, etc., and it is possible to extract other problems from the descriptions in the specification, drawings, claims, etc.

[0012] Note that the problems of one aspect of the present invention are not limited to the problems listed above. The problems listed above do not prevent the existence of other problems. Note that other problems are the problems not mentioned in this item described below. Problems not mentioned in this item can be derived by those skilled in the art from the descriptions in the specification or drawings, etc., and can be appropriately extracted from these descriptions. Note that one aspect of the present invention solves at least one of the problems listed above and / or other problems.

Means for Solving the Problems

[0013] One aspect of the present invention is a method for driving a display device having a first pixel, a second pixel, a first wiring, a second wiring, and a third wiring. The first wiring is electrically connected to the first pixel and the second pixel. The second wiring is electrically connected to the first pixel, and the third wiring is electrically connected to the second pixel. A first display data is given to the first pixel via the second wiring, and a second display data is given to the second pixel via the third wiring. The first pixel or the second pixel starts to emit light at different times. Before a first time, at a second time, the first pixel reaches a maximum luminance corresponding to the first display data, and the second pixel reaches a maximum luminance corresponding to the second display data. By applying a reset signal to the first wiring, the first pixel and the second pixel are initialized at the second time to turn off the display device. One aspect of the present invention is a method for driving a display device having a plurality of pixels, a first wiring, a second wiring, and a third wiring. The pixel has a light-emitting element and first to third transistors. The first transistor has a first gate and a second gate. The first gate of the first transistor is electrically connected to the first wiring, the second gate is electrically connected to the second wiring, and one of the source or drain is electrically connected to one of the gate of the second transistor and the source or drain of the third transistor. One of the source or drain of the second transistor is electrically connected to one of the electrodes of the light-emitting element. The gate of the third transistor is electrically connected to the third wiring. Display data is given to the first wiring.

[0014] ​​​​​​​​​​​​​​​​By obtaining, the threshold voltage of the first transistor is determined according to the first potential of the display data. A triangular wave is applied to the second wiring, and when the first transistor becomes on according to the potential of the triangular wave, a second potential is applied to the gate of the second transistor via the first transistor, and the emission luminance of the light-emitting element is controlled according to the second potential. By applying a reset signal to the third wiring, the third transistor becomes on, the second transistor becomes off, the light-emitting element turns off, and the potential of the triangular wave becomes the smallest in synchronization with the reset signal. This is a driving method of the display device.

[0015] One aspect of the present invention is a driving method of a display device having a plurality of pixels, a first wiring, a second wiring, and a third wiring. The pixel has a light-emitting element, a first transistor, and a second transistor. The first wiring is electrically connected to one of the electrodes of the light-emitting element. One of the source or drain of the first transistor is electrically connected to the other electrode of the light-emitting element, and the gate is electrically connected to the second wiring and one of the source or drain of the second transistor. The gate of the second transistor is electrically connected to the third wiring. By applying display data to the second wiring, the magnitude of the current flowing through the first transistor is determined according to the potential of the display data. A triangular wave is applied to the first wiring, the magnitude of the current applied from the first transistor to the light-emitting element is determined according to the potential of the triangular wave, and the emission luminance of the light-emitting element is controlled according to the potential of the triangular wave. By applying a reset signal to the third wiring, the third transistor becomes on, the first transistor becomes off, and in synchronization with the reset signal, the potential of the triangular wave becomes the smallest, and the light-emitting element turns off. This is a driving method of the display device.

[0016] One aspect of the present invention is a display device having a plurality of pixels and first to sixth wirings. The pixels include a light-emitting element, first to fourth transistors, a first capacitor element, and a second capacitor element. Display data is supplied to the first wiring. A scan signal is supplied to the second wiring. A reset signal is supplied to the third wiring. A triangular wave is supplied to the fourth wiring. A potential higher than the display data is supplied to the fifth wiring. A potential lower than the display data is supplied to the sixth wiring. The gate of the fourth transistor is electrically connected to the second wiring. One of the source or drain of the fourth transistor is electrically connected to the first wiring. The gate of the first transistor is electrically connected to the fourth wiring. The other of the source or drain of the fourth transistor is electrically connected to the back gate of the first transistor and one of the electrodes of the first capacitor element. The gate of the third transistor is electrically connected to the third wiring. The fifth wiring is electrically connected to the other of the electrodes of the first capacitor element and one of the source or drain of the first transistor. The other of the source or drain of the first transistor is electrically connected to one of the source or drain of the third transistor, the gate of the second transistor, and one of the electrodes of the second capacitor element. The other of the source or drain of the third transistor is electrically connected to the sixth wiring. One of the source or drain of the second transistor is electrically connected to one of the electrodes of the light-emitting element.

[0017] One aspect of the present invention is a display device having a plurality of pixels and first to fifth wirings. The pixels The element has a light-emitting element, first to third transistors, and a first capacitor. A triangular wave is applied to the first wiring. A scanning signal is applied to the second wiring. A reset signal is applied to the third wiring. Display data is applied to the fourth wiring. A low potential smaller than the display data is applied to the fifth wiring. The gate of the third transistor is electrically connected to the second wiring. One of the source or drain of the third transistor is electrically connected to the fourth wiring. The other of the source or drain of the third transistor is electrically connected to the gate of the first transistor, one of the source or drain of the second transistor, and one of the electrodes of the first capacitor. The gate of the second transistor is electrically connected to the third wiring. The other of the source or drain of the second transistor is electrically connected to the fifth wiring. One of the source or drain of the first transistor is electrically connected to one of the electrodes of the light-emitting element. The other of the electrodes of the light-emitting element is electrically connected to the first wiring. It is a display device. A triangular wave is applied to the first wiring. A scanning signal is applied to the second wiring. A reset signal is applied to the third wiring. Display data is applied to the fourth wiring. A low potential smaller than the display data is applied to the fifth wiring. The gate of the third transistor is electrically connected to the second wiring. One of the source or drain of the third transistor is electrically connected to the fourth wiring. The other of the source or drain of the third transistor is electrically connected to the gate of the first transistor, one of the source or drain of the second transistor, and one of the electrodes of the first capacitor. The gate of the second transistor is electrically connected to the third wiring. The other of the source or drain of the second transistor is electrically connected to the fifth wiring. One of the source or drain of the first transistor is electrically connected to one of the electrodes of the light-emitting element. The other of the electrodes of the light-emitting element is electrically connected to the first wiring. A triangular wave is applied to the first wiring. A scanning signal is applied to the second wiring. A reset signal is applied to the third wiring. Display data is applied to the fourth wiring. A low potential smaller than the display data is applied to the fifth wiring. The gate of the third transistor is electrically connected to the second wiring. One of the source or drain of the third transistor is electrically connected to the fourth wiring. The other of the source or drain of the third transistor is electrically connected to the gate of the first transistor, one of the source or drain of the second transistor, and one of the electrodes of the first capacitor. The gate of the second transistor is electrically connected to the third wiring. The other of the source or drain of the second transistor is electrically connected to the fifth wiring. One of the source or drain of the first transistor is electrically connected to one of the electrodes of the light-emitting element. The other of the electrodes of the light-emitting element is electrically connected to the first wiring. A triangular wave is applied to the first wiring. A scanning signal is applied to the second wiring. A reset signal is applied to the third wiring. Display data is applied to the fourth wiring. A low potential smaller than the display data is applied to the fifth wiring. The gate of the third transistor is electrically connected to the second wiring. One of the source or drain of the third transistor is electrically connected to the fourth wiring. The other of the source or drain of the third transistor is electrically connected to the gate of the first transistor, one of the source or drain of the second transistor, and one of the electrodes of the first capacitor. The gate of the second transistor is electrically connected to the third wiring. The other of the source or drain of the second transistor is electrically connected to the fifth wiring. One of the source or drain of the first transistor is electrically connected to one of the electrodes of the light-emitting element. The other of the electrodes of the light-emitting element is electrically connected to the first wiring. A triangular wave is applied to the first wiring. A scanning signal is applied to the second wiring. A reset signal is applied to the third wiring. Display data is applied to the fourth wiring. A low potential smaller than the display data is applied to the fifth wiring. The gate of the third transistor is electrically connected to the second wiring. One of the source or drain of the third transistor is electrically connected to the fourth wiring. The other of the source or drain of the third transistor is electrically connected to the gate of the first transistor, one of the source or drain of the second transistor, and one of the electrodes of the first capacitor. The gate of the second transistor is electrically connected to the third wiring. The other of the source or drain of the second transistor is electrically connected to the fifth wiring. One of the source or drain of the first transistor is electrically connected to one of the electrodes of the light-emitting element. The other of the electrodes of the light-emitting element is electrically connected to the first wiring. A triangular wave is applied to the first wiring. A scanning signal is applied to the second wiring. A reset signal is applied to the third wiring. Display data is applied to the fourth wiring. A low potential smaller than the display data is applied to the fifth wiring. The gate of the third transistor is electrically connected to the second wiring. One of the source or drain of the third transistor is electrically connected to the fourth wiring. The other of the source or drain of the third transistor is electrically connected to the gate of the first transistor, one of the source or drain of the second transistor, and one of the electrodes of the first capacitor. The gate of the second transistor is electrically connected to the third wiring. The other of the source or drain of the second transistor is electrically connected to the fifth wiring. One of the source or drain of the first transistor is electrically connected to one of the electrodes of the light-emitting element. The other of the electrodes of the light-emitting element is electrically connected to the first wiring. A triangular wave is applied to the first wiring. A scanning signal is applied to the second wiring. A reset signal is applied to the third wiring. Display data is applied to the fourth wiring. A low potential smaller than the display data is applied to the fifth wiring. The gate of the third transistor is electrically connected to the second wiring. One of the source or drain of the third transistor is electrically connected to the fourth wiring. The other of the source or drain of the third transistor is electrically connected to the gate of the first transistor, one of the source or drain of the second transistor, and one of the electrodes of the first capacitor. The gate of the second transistor is electrically connected to the third wiring. The other of the source or drain of the second transistor is electrically connected to the fifth wiring. One of the source or drain of the first transistor is electrically connected to one of the electrodes of the light-emitting element. The other of the electrodes of the light-emitting element is electrically connected to the first wiring. A triangular wave is applied to the first wiring. A scanning signal is applied to the second wiring. A reset signal is applied to the third wiring. Display data is applied to the fourth wiring. A low potential smaller than the display data is applied to the fifth wiring. The gate of the third transistor is electrically connected to the second wiring. One of the source or drain of the third transistor is electrically connected to the fourth wiring. The other of the source or drain of the third transistor is electrically connected to the gate of the first transistor, one of the source or drain of the second transistor, and one of the electrodes of the first capacitor. The gate of the second transistor is electrically connected to the third wiring. The other of the source or drain of the second transistor is electrically connected to the fifth wiring. One of the source or drain of the first transistor is electrically connected to one of the electrodes of the light-emitting element. The other of the electrodes of the light-emitting element is electrically connected to the first wiring. A triangular wave is applied to the first wiring. A scanning signal is applied to the second wiring. A reset signal is applied to the third wiring. Display data is applied to the fourth wiring. A low potential smaller than the display data is applied to the fifth wiring. The gate of the third transistor is electrically connected to the second wiring. One of the source or drain of the third transistor is electrically connected to the fourth wiring. The other of the source or drain of the third transistor is electrically connected to the gate of the first transistor, one of the source or drain of the second transistor, and one of the electrodes of the first capacitor. The gate of the second transistor is electrically connected to the third wiring. The other of the source or drain of the second transistor is electrically connected to the fifth wiring. One of the source or drain of the first transistor is electrically connected to one of the electrodes of the light-emitting element. The other of the electrodes of the light-emitting element is electrically connected to the first wiring. A triangular wave is applied to the first wiring. A scanning signal is applied to the second wiring. A reset signal is applied to the third wiring. Display data is applied to the fourth wiring. A low potential smaller than the display data is applied to the fifth wiring. The gate of the third transistor is electrically connected to the second wiring. One of the source or drain of the third transistor is electrically connected to the fourth wiring. The other of the source or drain of the third transistor is electrically connected to the gate of the first transistor, one of the source or drain of the second transistor, and one of the electrodes of the first capacitor. The gate of the second transistor is electrically connected to the third wiring. The other of the source or drain of the second transistor is electrically connected to the fifth wiring. One of the source or drain of the first transistor is electrically connected to one of the electrodes of the light-emitting element. The other of the electrodes of the light-emitting element is electrically connected to the first wiring. A triangular wave is applied to the first wiring. A scanning signal is applied to the second wiring. A reset signal is applied to the third wiring. Display data is applied to the fourth wiring. A low potential smaller than the display data is applied to the fifth wiring. The gate of the third transistor is electrically connected to the second wiring. One of the source or drain of the third transistor is electrically connected to the fourth wiring. The other of the source or drain of the third transistor is electrically connected to the gate of the first transistor, one of the source or drain of the second transistor, and one of the electrodes of the first capacitor. The gate of the second transistor is electrically connected to the third wiring. The other of the source or drain of the second transistor is electrically connected to the fifth wiring. One of the source or drain of the first transistor is electrically connected to one of the electrodes of the light-emitting element. The other of the electrodes of the light-emitting element is electrically connected to the first wiring. It is a display device.

[0018] In each of the above configurations, a display device in which the light-emitting element is an LED is preferable.

[0019] In each of the above configurations, a display device in which the light-emitting element is an OLED is preferable.

[0020] In each of the above configurations, a display device in which any one of the transistors included in the display device has a metal oxide in the semiconductor layer is preferable. In each of the above configurations, a display device in which any one of the transistors included in the display device has a metal oxide in the semiconductor layer is preferable.

Advantages of the Invention

[0021] One aspect of the present invention can provide a display device having a novel configuration. Or, one aspect of the present invention Aspects can provide a driving method for a novel display device. Or, one aspect of the present invention is able to provide a driving method for a display device that reduces power consumption. One aspect of the present invention is able to provide a driving method for a display device that improves the contrast of the display.

[0022] Note that the effects of one aspect of the present invention are not limited to the effects listed above. The effects listed above are not obstructive to the existence of other effects. Other effects are those effects not mentioned in the following description in this item and are effects not mentioned in this item. Effects not mentioned in this item can be derived by those skilled in the art from the description in the specification or the drawings and the like, and can be appropriately extracted from these descriptions . Note that one aspect of the present invention has at least one of the effects listed above and / or other effects. Therefore, one aspect of the present invention may, in some cases, not have the effects listed above.

Brief Description of the Drawings

[0023]

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Embodiments for Carrying Out the Invention

[0024] Hereinafter, embodiments will be described with reference to the drawings. However, the embodiments can be implemented in many different ways, and it will be easily understood by those skilled in the art that the form and details can be variously changed without departing from the spirit and its scope. Therefore, the present invention is not to be construed as being limited to the description of the following

[0025] Also, in the drawings, the size, layer thickness, or area may be exaggerated for clarity. Therefore, it is not necessarily limited to that scale. Note that the drawings schematically show ideal examples and are not limited to the shapes or values shown in the drawings.

[0026] Also, the ordinal numbers "first", "second", "third", etc. used in this specification are for It is noted that this is for the purpose of avoiding confusion and is not numerically limiting.

[0027] In addition, in this specification, terms indicating arrangements such as "above" and "below" are used for convenience in explaining the positional relationship between components with reference to the drawings. Also, the positional relationship between components changes appropriately according to the direction in which each component is depicted. Therefore, it is not limited to the terms described in the specification and can be appropriately rephrased according to the situation. In addition, in this specification, terms indicating arrangements such as "above" and "below" are used for convenience in explaining the positional relationship between components with reference to the drawings. Also, the positional relationship between components changes appropriately according to the direction in which each component is depicted. Therefore, it is not limited to the terms described in the specification and can be appropriately rephrased according to the situation. In addition, in this specification, terms indicating arrangements such as "above" and "below" are used for convenience in explaining the positional relationship between components with reference to the drawings. Also, the positional relationship between components changes appropriately according to the direction in which each component is depicted. Therefore, it is not limited to the terms described in the specification and can be appropriately rephrased according to the situation. In addition, in this specification, terms indicating arrangements such as "above" and "below" are used for convenience in explaining the positional relationship between components with reference to the drawings. Also, the positional relationship between components changes appropriately according to the direction in which each component is depicted. Therefore, it is not limited to the terms described in the specification and can be appropriately rephrased according to the situation.

[0028] In addition, in this specification, etc., a transistor is an element having at least three terminals including a gate, a drain, and a source. And there is a channel formation region between the drain (drain terminal, drain region, or drain electrode) and the source (source terminal, source region, or source electrode), and current can flow between the source and the drain through the channel formation region. Note that in this specification, etc., the channel formation region refers to the region where current mainly flows. In addition, in this specification, etc., a transistor is an element having at least three terminals including a gate, a drain, and a source. And there is a channel formation region between the drain (drain terminal, drain region, or drain electrode) and the source (source terminal, source region, or source electrode), and current can flow between the source and the drain through the channel formation region. Note that in this specification, etc., the channel formation region refers to the region where current mainly flows. In addition, in this specification, etc., a transistor is an element having at least three terminals including a gate, a drain, and a source. And there is a channel formation region between the drain (drain terminal, drain region, or drain electrode) and the source (source terminal, source region, or source electrode), and current can flow between the source and the drain through the channel formation region. Note that in this specification, etc., the channel formation region refers to the region where current mainly flows. In addition, in this specification, etc., a transistor is an element having at least three terminals including a gate, a drain, and a source. And there is a channel formation region between the drain (drain terminal, drain region, or drain electrode) and the source (source terminal, source region, or source electrode), and current can flow between the source and the drain through the channel formation region. Note that in this specification, etc., the channel formation region refers to the region where current mainly flows. In addition, in this specification, etc., a transistor is an element having at least three terminals including a gate, a drain, and a source. And there is a channel formation region between the drain (drain terminal, drain region, or drain electrode) and the source (source terminal, source region, or source electrode), and current can flow between the source and the drain through the channel formation region. Note that in this specification, etc., the channel formation region refers to the region where current mainly flows. In addition, in this specification, etc., a transistor is an element having at least three terminals including a gate, a drain, and a source. And there is a channel formation region between the drain (drain terminal, drain region, or drain electrode) and the source (source terminal, source region, or source electrode), and current can flow between the source and the drain through the channel formation region. Note that in this specification, etc., the channel formation region refers to the region where current mainly flows.

[0029] Also, the functions of the source and the drain may be interchanged when different polar transistors are employed or when the direction of current changes during circuit operation. For this reason, in this specification, etc., the terms source and drain can be used interchangeably. Also, the functions of the source and the drain may be interchanged when different polar transistors are employed or when the direction of current changes during circuit operation. For this reason, in this specification, etc., the terms source and drain can be used interchangeably. Also, the functions of the source and the drain may be interchanged when different polar transistors are employed or when the direction of current changes during circuit operation. For this reason, in this specification, etc., the terms source and drain can be used interchangeably. Also, the functions of the source and the drain may be interchanged when different polar transistors are employed or when the direction of current changes during circuit operation. For this reason, in this specification, etc., the terms source and drain can be used interchangeably.

[0030] In addition, in this specification, etc., "electrically connected" includes the case of being connected through "something having some electrical effect". Here, "something having some electrical effect" is not particularly limited as long as it enables the transfer of electrical signals between the connection targets. In addition, in this specification, etc., "electrically connected" includes the case of being connected through "something having some electrical effect". Here, "something having some electrical effect" is not particularly limited as long as it enables the transfer of electrical signals between the connection targets. In addition, in this specification, etc., "electrically connected" includes the case of being connected through "something having some electrical effect". Here, "something having some electrical effect" is not particularly limited as long as it enables the transfer of electrical signals between the connection targets. . For example, "something having some electrical effect" includes electrodes, wiring, switching elements such as transistors, resistive elements, inductors, capacitors, and other elements having various functions.

[0031] Also, in this specification and the like, "parallel" means a state in which two straight lines are arranged at an angle of -10° or more and 10° or less. Therefore, the case of -5° or more and 5° or less is also included. Also, "perpendicular" means a state in which two straight lines are arranged at an angle of 80° or more and 100° or less. Therefore, the case of 85° or more and 95° or less is also included.

[0032] Also, in this specification and the like, the term "film" and the term "layer" can be interchanged with each other. For example, the term "conductive layer" may be changed to the term "conductive film". Or, for example, the term "insulating film" may be changed to the term "insulating layer".

[0033] Also, in this specification and the like, unless otherwise specified, the off-current refers to the drain current when the transistor is in the off state (also referred to as the non-conducting state or the cutoff state). The off state, unless otherwise specified, for an n-channel transistor, is a state where the voltage Vgs between the gate and the source is lower than the threshold voltage Vth, and for a p-channel transistor, is a state where the voltage Vgs between the gate and the source is higher than the threshold voltage Vth. For example, the off-current of an n-channel transistor may refer to the drain current when the voltage Vgs between the gate and the source is lower than the threshold voltage Vth.

[0034] The off-state current of a transistor may depend on Vgs. The off-state current of a transistor is I or less when the Vgs value is I or less. The off-state current of a transistor is the off-state current at a given Vgs. state, off state at Vgs within a given range, or a sufficiently reduced off current is obtained. The term may refer to the off-state current at Vgs applied to the device, etc.

[0035] As an example, when the threshold voltage Vth is 0.5V and Vgs is 0.5V, The current is 1×10 -9 A, and the drain current at Vgs of 0.1 V is 1×10 -1 3 A, and the drain current at Vgs -0.5 V is 1×10 -19 A and Vg The drain current at s = -0.8 V is 1 × 10 -22 A n-channel transistor The drain current of the transistor is as follows when Vgs is -0.5V: , or 1×10 when Vgs is in the range of −0.5V to −0.8V -19 A or below Therefore, the off-state current of the transistor is 1×10 -19 It may be said that it is below A. The drain current of the transistor is 1×10 -22 Because there exists a Vgs below A , the off-state current of the transistor is 1×10 -22 It may be said that it is below A.

[0036] In this specification, the off-state current of a transistor having a channel width W is expressed as It is sometimes expressed as the current value that flows per watt. Also, for a given channel width (for example, 1 μm), It may be represented by the value of the current flowing through the transistor. In the latter case, the unit of the off-current may be represented by a unit having a base of current / length (for example, A / μm).

[0037] The off-current of a transistor may depend on temperature. In this specification, unless otherwise specified, the off-current may represent the off-current at room temperature, 60 °C, 85 °C, 95 °C, or 125 °C. Alternatively, it may represent the off-current at a temperature at which the reliability of a semiconductor device or the like including the transistor is guaranteed, or at a temperature at which a semiconductor device or the like including the transistor is used (for example, any one temperature between 5 °C and 35 °C). That the off-current of a transistor is I or less means that there exists a value of Vgs at which the off-current of the transistor at room temperature, 60 °C, 85 °C, 95 °C, 125 °C, a temperature at which the reliability of a semiconductor device or the like including the transistor is guaranteed, or a temperature at which a semiconductor device or the like including the transistor is used (for example, any one temperature between 5 °C and 35 °C) is I or less.

[0038] The off-current of a transistor may depend on the voltage Vds between the drain and the source. In this specification, unless otherwise specified, the off-current may represent the off-current at Vds = 0.1 V, 0.8 V, 1 V, 1.2 V, 1.8 V, 2.5 V, 3 V, 3.3 V, 10 V, 12 V, 16 V, or 20 V. Alternatively, it may represent the off-current at a Vds at which the reliability of a semiconductor device or the like including the transistor is guaranteed, or at a Vds at which a semiconductor device or the like including the transistor is used. That the off-current of a transistor is I or less means that Vds is 0.1 V, 0.8 V, 1 V, 1.2 V, 1.8 V, 2.5 V, 3 V, 3.3 V, 10 V, 12 V, 16 V, or 20 V.​​​​​​​​​​​​​​​ V, 3V, 3.3V, 10V, 12V, 16V, 20V, when the transistor is included in the half Vds for which the reliability of the conductor device or the like is guaranteed, or the Vds used in the semiconductor device etc. in which the transistor is included, there may be a case where it refers to the value of Vgs for which the off-current of the transistor becomes I or less. There may be a case where it refers to the value of Vgs for which the off-current of the transistor becomes I or less when the transistor is included in the semiconductor device etc. in which the reliability of the conductor device or the like is guaranteed, or the Vds used in the semiconductor device etc. in which the transistor is included.

[0039] In the description of the off-current above, the drain may be read as the source. That is, the off-current may also refer to the current flowing through the source when the transistor is in the off state.

[0040] Also, in this specification etc., in the same meaning as the off-current, it may be described as the leakage current. Also in this specification etc., the off-current refers to, for example, when the transistor is in the off state the current flowing between the source and the drain.

[0041] Note that voltage refers to the potential difference between two points, and potential refers to the electrostatic energy (electrical potential energy) possessed by a unit charge in the electrostatic field at a certain point. However generally, the potential difference between the potential at a certain point and the reference potential (e.g., ground potential) is simply called potential or voltage, and potential and voltage are often used as synonyms Therefore, in this specification, unless otherwise specified, potential may be read as voltage and voltage may be read as potential.

[0042] (Embodiment 1) In this embodiment, a novel driving method for a novel display device in which a light-emitting element is lit by a triangular wave will be described with reference to FIGS. 1 to 3. using FIGS. 1 to 3.

[0043] First, the display device will be described. The display device includes a display panel, a source driver, and a gate driver. The display panel has a plurality of pixels. Note that the display panel has the source driver or the gate driver formed on the same substrate as the pixels. However, either one or both of the source driver and the gate driver may be configured as components different from the display panel and may supply signals to the display panel. Hereinafter, the display device may be described by referring to it as the display panel.

[0044] As an example, the display device has a first pixel, a second pixel, and first to fifth wirings. The first to third wirings are electrically connected to the first pixel and the second pixel. The fourth wiring is electrically connected to the first pixel, and the fifth wiring is electrically connected to the second pixel. Note that scan signals are supplied to the first to third wirings having a function as scan lines. These scan signals have functions such as a function of writing data to pixels, a lighting control function, and a reset function.

[0045] The first display data is supplied to the first pixel via the fourth wiring, and the second display data is supplied to the second pixel via the fifth wiring. The first pixel and the second pixel are initialized and turned off at a first time. The first pixel or the second pixel starts emitting light at a different time. At a second time before the first time, the first pixel reaches the maximum brightness corresponding to the first display data, and the second pixel reaches the maximum brightness corresponding to the second display data. This is a driving method of the display

[0046] device. That is, the display data supplied to the pixels is held in the pixels, and then, the signals According to the number, the light-emitting element of the pixel lights up. Note that the first pixel and the second pixel described above are preferably connected to the wiring to which the same scanning signal is applied. The signal applied to the pixel is preferably a triangular wave. The triangular wave may be generated using an integrating circuit or may be generated using a digital-to-analog conversion circuit. When generating the triangular wave using an integrating circuit the circuit scale can be made smaller compared to a digital-to-analog conversion circuit. Also the triangular wave may be a signal having a linear slope or a signal that increases exponentially . In the case where the triangular wave is a signal that increases exponentially, the lighting period becomes shorter compared to a triangular wave having a linear slope, and the maximum luminance corresponding to the display data reaches a larger maximum luminance This is a driving method of the display device

[0047] Furthermore, the pixels of the display device will be described in detail. The display device has a plurality of pixels, a first wiring, a second wiring, a third wiring, and a fourth wiring. The pixel has a light-emitting element and a first to fourth transistors. The first transistor has a first gate and a second gate . Note that either one of the first gate or the second gate corresponds to the gate of the first transistor, and the other corresponds to the back gate of the first transistor .

[0048] For the first transistor, the first gate is electrically connected to the first wiring, and the second gate is electrically connected to the fourth wiring via the fourth transistor. One of the source or drain is electrically connected to the gate of the second transistor and one of the source or drain of the third transistor . One of the source or drain of the second transistor is the light-emitting element is electrically connected to one of the sub - electrodes. The gate of the third transistor is electrically connected to the third wiring and is electrically connected. The gate of the fourth transistor is electrically connected to the second wiring .

[0049] As a first step, by applying display data to the fourth wiring, the threshold voltage of the first transistor is determined according to the first potential of the display data. That is, the signal applied to the second wiring can write the display data to the pixel. Note that the pixel may have a first capacitance element and a second capacitance element. It is preferable that the display data is held in the first capacitance element. Hereinafter, the first potential and the first display data will be described as the same thing . . . .

[0050] As a second step, a triangular wave is applied to the first wiring. When the first transistor is turned on according to the potential of the triangular wave, a second potential is applied to the gate of the second transistor through the first transistor, and the emission luminance is controlled according to the second potential. The second potential is preferably held in the second holding capacitor. That is, the signal applied to the first wiring can control the lighting of the pixel . . .

[0051] As a third step, by applying a reset signal to the third wiring, the third transistor is turned on, and the second potential held in the second holding capacitor is discharged, so that the second transistor is turned off and the light - emitting element is turned off. This is a driving method of the display device in which the potential of the triangular wave becomes the smallest in synchronization with the reset signal . . .

[0052] Note that the luminance of the light - emitting element recognized by the human eye can be represented by the average luminance per unit time It is determined. The average luminance is determined by the amount of light emitted by the light-emitting element during the period from when the light-emitting element is turned off by the reset signal until the light-emitting element is turned off by the next reset signal. Note that the lighting of the light-emitting element is started by the second potential, and the period until the light-emitting element is turned off by the reset signal is defined as the lighting period, and the period from when the light-emitting element is turned off until the next second potential is applied and the light-emitting element starts lighting is defined as the non-lighting period. That is, the signal applied to the third wiring can reset the display of the pixel. When the first potential, which is display data, is small, it is preferable that the threshold voltage of the first transistor is small, and when the first potential is large, the threshold voltage of the first transistor is large. That is, when a triangular wave is applied to the first transistor when the first potential is small, as the potential of the triangular wave increases, the second potential increases earlier, and the lighting of the light-emitting element starts earlier. Also, since the lighting of the light-emitting element starts earlier, the average luminance of the light-emitting element increases, and the maximum luminance during the period when the light-emitting element is lit also increases. The luminance of the light-emitting element with respect to the first potential of the display data applied to the pixel is averaged to become the average luminance. However, since the light-emitting element reaches the maximum luminance corresponding to the display data at the moment immediately before being turned off by the third transistor, the maximum luminance remains as an afterimage in the human eye. This is because when displaying low-tone display data, the tone recognized by the average luminance is low, but the instantaneous maximum luminance remains as an afterimage in the human eye, making it easy to recognize colors. For example, when expressing the blue of the sea illuminated by moonlight, etc., even if it is a low tone, there is an effect of strongly visualizing the blue as an afterimage.

[0053] When the first potential, which is display data, is small, it is preferable that the threshold voltage of the first transistor is small, and when the first potential is large, the threshold voltage of the first transistor is large. That is, when a triangular wave is applied to the first transistor when the first potential is small, as the potential of the triangular wave increases, the second potential increases earlier, and the lighting of the light-emitting element starts earlier. Also, since the lighting of the light-emitting element starts earlier, the average luminance of the light-emitting element increases, and the maximum luminance during the period when the light-emitting element is lit also increases. When the first potential, which is display data, is small, it is preferable that the threshold voltage of the first transistor is small, and when the first potential is large, the threshold voltage of the first transistor is large. That is, when a triangular wave is applied to the first transistor when the first potential is small, as the potential of the triangular wave increases, the second potential increases earlier, and the lighting of the light-emitting element starts earlier. Also, since the lighting of the light-emitting element starts earlier, the average luminance of the light-emitting element increases, and the maximum luminance during the period when the light-emitting element is lit also increases. When the first potential, which is display data, is small, it is preferable that the threshold voltage of the first transistor is small, and when the first potential is large, the threshold voltage of the first transistor is large. That is, when a triangular wave is applied to the first transistor when the first potential is small, as the potential of the triangular wave increases, the second potential increases earlier, and the lighting of the light-emitting element starts earlier. Also, since the lighting of the light-emitting element starts earlier, the average luminance of the light-emitting element increases, and the maximum luminance during the period when the light-emitting element is lit also increases.

[0054] The luminance of the light-emitting element with respect to the first potential of the display data applied to the pixel is averaged to become the average luminance. However, since the light-emitting element reaches the maximum luminance corresponding to the display data at the moment immediately before being turned off by the third transistor, the maximum luminance remains as an afterimage in the human eye. This is because when displaying low-tone display data, the tone recognized by the average luminance is low, but the instantaneous maximum luminance remains as an afterimage in the human eye, making it easy to recognize colors. For example, when expressing the blue of the sea illuminated by moonlight, etc., even if it is a low tone, there is an effect of strongly visualizing the blue as an afterimage. The luminance of the light-emitting element with respect to the first potential of the display data applied to the pixel is averaged to become the average luminance. However, since the light-emitting element reaches the maximum luminance corresponding to the display data at the moment immediately before being turned off by the third transistor, the maximum luminance remains as an afterimage in the human eye. This is because when displaying low-tone display data, the tone recognized by the average luminance is low, but the instantaneous maximum luminance remains as an afterimage in the human eye, making it easy to recognize colors. For example, when expressing the blue of the sea illuminated by moonlight, etc., even if it is a low tone, there is an effect of strongly visualizing the blue as an afterimage. The luminance of the light-emitting element with respect to the first potential of the display data applied to the pixel is averaged to become the average luminance. However, since the light-emitting element reaches the maximum luminance corresponding to the display data at the moment immediately before being turned off by the third transistor, the maximum luminance remains as an afterimage in the human eye. This is because when displaying low-tone display data, the tone recognized by the average luminance is low, but the instantaneous maximum luminance remains as an afterimage in the human eye, making it easy to recognize colors. For example, when expressing the blue of the sea illuminated by moonlight, etc., even if it is a low tone, there is an effect of strongly visualizing the blue as an afterimage. is because when displaying low-tone display data, the tone recognized by the average luminance is low, but the instantaneous maximum luminance remains as an afterimage in the human eye, making it easy to recognize colors. For example, when expressing the blue of the sea illuminated by moonlight, etc., even if it is a low tone, there is an effect of strongly visualizing the blue as an afterimage.

[0055] Also, the potential of the pixel is initialized to the second potential by the third transistor, and the light-emitting element is turned off. Then, the display device can obtain the effect of black insertion. Note that black insertion is one of the driving methods of the display device, and by providing a period for turning on the display data and a period for turning off the display data, the contrast ratio is expanded. That is, the contrast is improved by the effect of black insertion, and the visibility of the display content is improved because the instantaneous maximum brightness remains as an afterimage. Also, since there is a period of turning off, the period of turning on can be reduced, and the power consumption can be reduced. Furthermore, during the period of turning on, the charging voltage of the second potential is controlled by a triangular wave, and the period with a large luminance and large heat generation can be reduced. Therefore, the driving method of the display device described above can suppress the reduction of power consumption and heat generation. One of the driving methods of the display device, and by providing a period for turning on the display data and a period for turning off the display data, the contrast ratio is expanded. That is, the contrast is improved by the effect of black insertion, and the visibility of the display content is improved because the instantaneous maximum brightness remains as an afterimage. Also, since there is a period of turning off, the period of turning on can be reduced, and the power consumption can be reduced. Furthermore, during the period of turning on, the charging voltage of the second potential is controlled by a triangular wave, and the period with a large luminance and large heat generation can be reduced. Therefore, the driving method of the display device described above can suppress the reduction of power consumption and heat generation. Moreover, since there is a period of turning off, the period of turning on can be reduced, and the power consumption can be reduced. Furthermore, during the period of turning on, the charging voltage of the second potential is controlled by a triangular wave, and the period with a large luminance and large heat generation can be reduced. Therefore, the driving method of the display device described above can suppress the reduction of power consumption and heat generation. Moreover, since there is a period of turning off, the period of turning on can be reduced, and the power consumption can be reduced. Furthermore, during the period of turning on, the charging voltage of the second potential is controlled by a triangular wave, and the period with a large luminance and large heat generation can be reduced. Therefore, the driving method of the display device described above can suppress the reduction of power consumption and heat generation. Furthermore, during the period of turning on, the charging voltage of the second potential is controlled by a triangular wave, and the period with a large luminance and large heat generation can be reduced. Therefore, the driving method of the display device described above can suppress the reduction of power consumption and heat generation. Therefore, the driving method of the display device described above can suppress the reduction of power consumption and heat generation.

[0056] The triangular wave applied to the gate of the first transistor via the first wiring is applied simultaneously to the pixels connected to the first wiring. Note that the triangular wave may be applied to all the pixels of the display device at the same time. By applying the triangular wave to all the pixels of the display device, at the first time, each pixel reaches the maximum luminance corresponding to the size of the display data given, and the display in the display area can be updated simultaneously. Also, at the second time, it is initialized and the light-emitting element is turned off. It is possible to realize so-called surface sequential driving. For example, the reduction in visibility generated by simultaneously displaying the display data of the p-th frame and the (p - 1)-th frame in the display area can be suppressed. p is a positive natural number. The triangular wave applied to the gate of the first transistor via the first wiring is applied simultaneously to the pixels connected to the first wiring. Note that the triangular wave may be applied to all the pixels of the display device at the same time. By applying the triangular wave to all the pixels of the display device, at the first time, each pixel reaches the maximum luminance corresponding to the size of the display data given, and the display in the display area can be updated simultaneously. Also, at the second time, it is initialized and the light-emitting element is turned off. It is possible to realize so-called surface sequential driving. For example, the reduction in visibility generated by simultaneously displaying the display data of the p-th frame and the (p - 1)-th frame in the display area can be suppressed. p is a positive natural number. For example, the reduction in visibility generated by simultaneously displaying the display data of the p-th frame and the (p - 1)-th frame in the display area can be suppressed. p is a positive natural number. For example, the reduction in visibility generated by simultaneously displaying the display data of the p-th frame and the (p - 1)-th frame in the display area can be suppressed. p is a positive natural number.

[0057] It is preferable to use an LED for the above-described light-emitting element. The LED may be formed on the display panel or the LED may be bonded as a component. Alternatively, the light-emitting element may be an O LED. The driving method of the display device according to the present embodiment can obtain the same effect even if the light-emitting element is an LED or an OLED .

[0058] Also, the light-emitting element included in the pixel may be formed on the display panel or mounted as a component . For example, the LED may be bonded to the pixel as a component.

[0059] Subsequently, a detailed description of the pixel included in the display device will be given with reference to FIG. 1(A).

[0060] The display device includes a pixel 10, wirings G1, G2, G3, S1, V0, com, Ano, and Cath. Note that the above-described first wiring corresponds to the wiring G3 that is electrically connected to the first pixel, the second wiring corresponds to the wiring G1 that is electrically connected to the first pixel, and the third wiring corresponds to the wiring G2 that is electrically connected to the first pixel. The pixel 10 includes a transistor 14 and a pixel circuit 10P. The pixel circuit 10P includes a light-emitting element 17, transistors 11, 12, 13, a capacitor element 15, and a capacitor element 16. The transistor 11 has a back gate. The gate of the transistor 14 is electrically connected to the wiring G1. One of the source or drain of the transistor 14 is electrically connected to the wiring S1. The other of the source or drain of the transistor 14 is electrically connected to the back gate of the transistor 11 and one of the electrodes of the capacitor element 15. The gate of the transistor 11 is electrically connected to the wiring G3 17, transistors 11, 12, 13, a capacitor element 15, and a capacitor element 16. The transistor 11 has a back gate.

[0061] The gate of the transistor 14 is electrically connected to the wiring G1. One of the source or drain of the transistor 14 is electrically connected to the wiring S1. The other of the source or drain of the transistor 14 is electrically connected to the back gate of the transistor 11 and one of the electrodes of the capacitor element 15. The gate of the transistor 11 is electrically connected to the wiring G3 One of the source or drain of the transistor 14 is electrically connected to the wiring S1. The other of the source or drain of the transistor 14 is electrically connected to the back gate of the transistor 11 and one of the electrodes of the capacitor element 15. The gate of the transistor 11 is electrically connected to the wiring G3 One of the source or drain of the transistor 14 is electrically connected to the wiring S1. The other of the source or drain of the transistor 14 is electrically connected to the back gate of the transistor 11 and one of the electrodes of the capacitor element 15. The gate of the transistor 11 is electrically connected to the wiring G3 One of the source or drain of the transistor 14 is electrically connected to the wiring S1. The other of the source or drain of the transistor 14 is electrically connected to the back gate of the transistor 11 and one of the electrodes of the capacitor element 15. The gate of the transistor 11 is electrically connected to the wiring G3 This is the case. Wiring V0 is electrically connected to the other electrode of the capacitive element 15 and one of the source or drain of the transistor 11. The other of the source or drain of the transistor 11 is electrically connected to one of the source or drain of the transistor 13, the gate of the transistor 12, and one of the electrodes of the capacitive element 16. This is the case. The gate of the transistor 13 is electrically connected to the wiring G2. The other of the source or drain of the transistor 13 is electrically connected to the wiring Com. One of the source or drain of the transistor 12 is electrically connected to one of the electrodes of the light-emitting element 17. This is the case. The other of the source or drain of the transistor 12 is electrically connected to the wiring Cath and the other of the electrodes of the capacitive element 16. The other of the electrodes of the light-emitting element 17 is electrically connected to the wiring Ano.

[0062] In FIG. 1(A), an example is shown in which the transistors 12, 13, and 14 each have a back gate. However, any one or more of the transistors 12, 13, or 14 may have a configuration without a back gate. This is the case. This is the case. Note that it is preferable that the transistor has an oxide semiconductor film with high purity and suppression of the formation of oxygen vacancies. The transistor can reduce the off-current. Therefore, the holding time of an electrical signal such as an image signal can be extended. Therefore, the frequency of the refresh operation can be reduced, and the effect of reducing power consumption is achieved. The transistor having the oxide semiconductor film will be described in detail in Embodiment 6. This is the case. This is the case. This is the case. This is the case.

[0063] A potential higher than the maximum potential of the second potential applied to the capacitive element 16 is applied to the wiring V0. is applied. A low potential for initializing the second potential held in the capacitor element 16 is applied to the wiring Com. The low potential is preferably set to a current value at which the light-emitting element does not emit light. That is, a potential for turning off the transistor 12 is applied. The wiring Ano is connected to the other electrode of the light-emitting element (hereinafter, the anode terminal). Therefore, the potential applied to the wiring Ano is preferably higher than the largest potential of the second potential. The wiring Cath is connected to one electrode of the light-emitting element (hereinafter, the cathode terminal) via the transistor 12. Therefore, the potential applied to the wiring Cath is preferably lower than the potential when the second potential is initialized.

[0064] FIG. 1(B) is a timing chart for explaining the operation of the pixel 10. A scanning signal is applied to the pixel 10 connected to the wiring G1 via the wiring G1. A reset signal is applied to the pixel 10 connected to the wiring G2 via the wiring G2. A triangular wave TW is applied to the pixel 10 connected to the wiring G3 via the wiring G3. A first potential is applied to the pixel 10 connected to the wiring S1 via the wiring S1. Note that the first potential can be referred to as display data D1.

[0065] At time T0, a reset signal is applied to the wiring G2. A reset signal is applied to the gate of the transistor 13 via the wiring G2. The transistor 13 is turned on, the second potential held in the capacitor element 16 is initialized, and the light-emitting element is turned off. Also, at time T0 ​​​​​​​​​​​Do.

[0066] At time T1, the wiring G1 is selected by the scanning signal applied to the wiring G1. The transistor 14 is turned on, and the display data D1 applied to the wiring S1 is applied to the capacitor element 15. The display data D1 applied to the capacitor element 15 is applied to the back gate of the transistor 11 and controls the threshold voltage of the transistor 11.

[0067] At time T2, the scanning signal applied to the wiring G1 becomes non - selected. Therefore, the transistor 14 is turned off, and the display data D1 applied to the capacitor element 15 is held. .

[0068] At time T3, the reset signal applied to the wiring G2 is released, and the transistor 13 becomes off. Note that the release of this reset signal may also be at time T2.

[0069] Also, at time T3, it is preferable to apply a triangular wave TW to the wiring G3 by releasing the reset signal. However, since the threshold of the transistor 11 is controlled by the display data D1, the charging of the second potential starts according to the display data D1. When the charging of the second potential for the capacitor element 16 starts, the transistor 12 supplies current to the light - emitting element, and the light - emitting element starts to light up. In FIG. 1(B), an example where the light - emitting element lights up during the hatched period is shown. Also, it is preferable that the emission intensity of the light - emitting element increases according to the change of the triangular wave TW. Note that for the pixel 10, it is preferable that the period during which the triangular wave TW is applied is shorter than 1 frame. In FIG. 1(B), an example where the light - emitting element lights up during the hatched period is shown. Also, it is preferable that the emission intensity of the light - emitting element increases according to the change of the triangular wave TW. Note that for the pixel 10, it is preferable that the period during which the triangular wave TW is applied is shorter than 1 frame. It is more preferable that the period during which the triangular wave TW is applied is shorter than 1 frame. It is more preferable that the period during which the triangular wave TW is applied is shorter than 1 frame.

[0070] FIG. 2(A) is a block diagram for explaining the display device 20. The display device 20 has a display area It has a source driver 22 and a gate driver 23. The display area 21 has pixels 10(1,1) to pixels 10(m,n). As an example, in FIG. 2(A), pixels 10(i, j) to pixels 10(i + 1, j + 1) are shown. m and n are positive integers, i is an integer from 1 to m, and j is an integer from 1 to n.

[0071] As an example, the connection between pixel 10(i, j) and the wiring will be described. Pixel 10(i, j) is electrically connected to the gate driver 23 via wiring G1(j), wiring G2(j), or wiring G3(j). Pixel 10(i, j) is electrically connected to the source driver 22 via wiring S1(i).

[0072] FIG. 2(B) is a timing chart for explaining the operation of the display device 20. For the detailed operation of pixel 10, reference can be made to the description in FIG. 1(B), so the description is omitted.

[0073] At time T10, a reset signal is applied to wiring G2(j), the holding potentials of pixel 10(i,j) and pixel 10(i + 1,j) are initialized, and the light-emitting element is turned off. Further, the triangular wave TW applied to wiring G3(j) is initialized.

[0074] At time T11, wiring G1(j) is selected by the scanning signal applied to wiring G1(j). Display data D1 is applied to wiring S1(i), and display data D2 is applied to wiring S1(i + 1).

[0075] Furthermore, at time T11, a reset signal is applied to wiring G2(j + 1), the holding potentials of pixel 10( i, j + 1) and pixel 10(i + 1, j + 1) are initialized, and the light-emitting element is turned off. It lights up. Also, the triangular wave TW applied to the wiring G3(j+1) is initialized.

[0076] At time T12, the scanning signal applied to the wiring G1(j) becomes non-selective. Therefore the display data D1 is held in the pixel 10(i,j), and the display data D2 is held in the pixel 10(i+1,j).

[0077] Furthermore, at time T12, the wiring G1(j+1) is selected by the scanning signal applied to the wiring G1(j+1). The display data D3 is applied to the wiring S1(i), and the display data D4 is applied to the wiring S1(i+1).

[0078] At time T13, the reset signal applied to the wiring G2(j) is released. At time T13, the triangular wave TW is applied to the wiring G3(j) by the release of the reset signal. However since the threshold value of the transistor 11 is controlled by the display data D1 or the display data D2, the lighting start times of the pixel 10(i,j) or the pixel 10(i+1,j) are different. Also the lighting periods and emission intensities of the pixel 10(i,j) or the pixel 10(i+ 1,j) are different depending on the display data D1 or the display data D2.

[0079] Also, at time T13, the scanning signal applied to the wiring G1(j+1) becomes non-selective. Therefore, the display data D3 is held in the pixel 10(i,j+1), and the display data D4 is held in the pixel 10( i+1,j+1).

[0080] In the timing chart shown in FIG. 2(B), hatched areas with different lighting periods are shown. Each lighting period is determined by the display data D1 applied to the pixel 10(i,j). ​ or varies depending on the magnitude of the potential of the display data D2 given to the pixel 10(i+1,j). An example thereof is shown.

[0081] At time T14, the reset signal applied to the wiring G2(j+1) is released. At time T14, a triangular wave TW is applied to the wiring G3(j+1) due to the release of the reset signal. Thereafter, since the same processing is repeatedly performed, the description is omitted.

[0082] In the timing chart shown in FIG. 2(B), a triangular wave TW is applied to the wiring G3(j) or the wiring G3(j+1) corresponding to each scan signal applied to the wiring G1(j) or the wiring G1(j+1). Since the lighting period varies depending on the selected row, the lighting time of the light-emitting elements is dispersed. Therefore, it is possible to disperse the concentration of power consumption due to the lighting of the light-emitting elements.

[0083] FIG. 3(A) is a block diagram for explaining the display device 20A. The display device 20A is different from the display device 20 in that it has a gate driver 23a and a triangular wave generation circuit 24.

[0084] As an example, the connection between the pixel 10(i,j) and the wiring will be described. The pixel 10(i,j) is electrically connected to the gate driver 23a via the wiring G1(j), and the pixel 10(i ,j+1) is electrically connected to the gate driver 23a via the wiring G1(j+1). Note that the pixels 10(i,j) and 10(i,j+1) are electrically connected to the source driver 22 via the wiring S1(i).

[0085] The wiring G2 is electrically connected to the pixel group included in the display area 21, and simultaneously ​​​​​​​​A reset signal can be given instantaneously to turn off the light-emitting element. Wiring G3 is electrically connected to the pixel group and can apply a triangular wave TW to all pixels at the same time.

[0086] Also, a start pulse SP is given to the gate driver 23a, and the start pulse SP and the output signal OUT of the gate driver 23a are given to the triangular wave generation circuit 2 4. The triangular wave generation circuit 24 can generate a reset signal and a triangular wave TW to be applied to the pixel group using the start pulse SP and the output signal OUT. Figure 3(B) is a timing chart for explaining an example of the operation of the display device 20A. In FIG

[0087] 3(B), wiring G1(1) to G1(n) is used for explanation, but for the pixels to which display data is given attention is paid to pixels 10(i,j) to 10(i + 1,j +1) in the pixel group for explanation. Note that since the detailed operation of pixel 10 can be referred to the explanation of FIG. 1(B), the explanation is omitted. At time T20, the triangular wave generation circuit 24 can apply a reset signal to the wiring G2 . Therefore, the pixel group is initialized at the same time, and the light-emitting element is turned off. Further, the triangular

[0088] wave generation circuit 24 can initialize the triangular wave TW applied to the wiring G3. Also, the wiring G1(1) is selected by the scanning signal applied to the wiring G1(1). As an example , in FIG. 3(A), for pixels 10(i,1) to 10(i + 1,1) (non-display) , display data D1 is given to the wiring S1(i), and display data D2 is given to the wiring S1(i + 1).

[0089] ​​​At time T21, the scanning signal applied to wiring G1(1) becomes non - selected. Therefore display data D1 is held in pixel 10(i,1), and display data D2 is held in pixel 10(i + 1,1).

[0090] At time T22, wiring G1(j) is selected by the scanning signal applied to wiring G1(j). Display data D3 is applied to wiring S1(i), and display data D4 is applied to wiring S1(i + 1).

[0091] At time T23, the scanning signal applied to wiring G1(j) becomes non - selected. Therefore display data D3 is held in pixel 10(i,j), and display data D4 is held in pixel 10(i + 1,j).

[0092] Also, at time T23, wiring G1(j + 1) is selected by the scanning signal applied to wiring G1(j + 1). Display data D5 is applied to wiring S1(i), and display data D6 is applied to wiring S1(i + 1).

[0093] At time T24, the scanning signal applied to wiring G1(j + 1) becomes non - selected. Therefore display data D5 is held in pixel 10(i,j + 1), and display data D6 is held in pixel 10(i + 1 ,j + 1).

[0094] At time T25, wiring G1(n) is selected by the scanning signal applied to wiring G1(n). Display data D7 is applied to wiring S1(i), and display data D8 is applied to wiring S1(i + 1).

[0095] At time T26, the scanning signal applied to the wiring G1(n) becomes non-selective. Therefore, the display data D7 is held in the pixel 10(i,n), and the display data D8 is held in the pixel 10(i + 1,n).

[0096] At time T26, the reset signal applied to the wiring G2 is released. At time T26, due to the release of the reset signal, a triangular wave TW is applied to the wiring G3. The threshold values of the transistors 11 of the respective pixels are controlled by the display data D1 to D8. As an example, in FIG. 3(B), the lighting start times of the respective pixels of the pixel 10(i,j), the pixel 10(i + 1,j), or the pixel 10(i,j + 1) are different, which is indicated by the hatched regions with different lighting periods. That is, the lighting periods and the emission intensities of the pixel 10( i,j), the pixel 10(i + 1,j), or the pixel 10(i,j + 1) are different depending on the display data D3, the display data D4, or the display data D5. Similarly, for other pixels, the lighting start times, the lighting periods, and the emission intensities are different depending on the display data applied to the respective pixels.

[0097] That is, depending on the display data D3, the display data D4, or the display data D5, the lighting period and the emission intensity of the pixel 10( i,j), the pixel 10(i + 1,j), or the pixel 10(i,j + 1) are different. Similarly, for other pixels, the lighting start time, the lighting period, and the emission intensity are different depending on the display data applied to the respective pixels. In the timing chart shown in FIG. 3(B), after the display data is applied to the pixel group,

[0098] a triangular wave TW is simultaneously applied to the pixel group by the triangular wave generation circuit 24. That is, although the pixel group has different lighting start times depending on the applied display data, the maximum luminance of the light-emitting elements of the respective pixels becomes the same at the same time. At the next time, a reset signal is applied to the pixel group by the triangular wave generation circuit 24 and the display data is initialized. That is, the pixel group has different lighting start times depending on the applied display data, but the maximum luminance of the light-emitting elements of the respective pixels becomes the same at the same time. At the next time, a reset signal is applied to the pixel group by the triangular wave generation circuit 24 and the display data is initialized. That is, the pixel group has different lighting start times depending on the applied display data, but the maximum luminance of the light-emitting elements of the respective pixels becomes the same at the same time. At the next time, a reset signal is applied to the pixel group by the triangular wave generation circuit 24 ​​has a time when the light is turned off at the same time and a time when the light-emitting element reaches its maximum brightness at the same time. Display device Since the display area 21 can update the display on a plane, when updating the display using the scanning line it is possible to suppress a decrease in visibility caused by the simultaneous display of the display data of the updated frame and the display data of the old frame

[0099] That is, in the pixel group, the pixels are initialized by the reset signal, so that the light-emitting element is turned off while the reset signal is being applied. Therefore, the reset signal has the effect of black insertion That is, in the driving method using the triangular wave TW, the contrast is improved by the effect of black insertion, and the instantaneous maximum brightness remains as an afterimage, improving the visibility of the displayed content. Also, by having an off period the lighting period is reduced, and further, during the lighting period, by reducing the period of high brightness with high power consumption and heat generation by the triangular wave TW, it is possible to reduce the power consumption and suppress the heat generation

[0100] As described above, the configuration and method shown in this embodiment can be appropriately combined with the configuration and method shown in other embodiments and used

[0101] (Embodiment 2) In this embodiment, a configuration different from that of the pixel and the display device of Embodiment 1 will be described with reference to FIGS. 4 to 6

[0102] In FIG. 4(A), a detailed description of a pixel 10A different from that in FIG. 1 will be given

[0103] The display device includes a pixel 10A, a wiring G1, a wiring G2, a wiring G3A, a wiring S1, a wiring Com and a wiring Cath. The pixel 10A includes a light-emitting element 35, a transistor 31, a transistor ​​​​It has a switch 32, a transistor 33, and a capacitive element 34.

[0104] The gate of the transistor 33 is electrically connected to the wiring G1. One of the source or drain of the transistor 33 is electrically connected to the wiring S1. The other of the source or drain of the transistor 33 is electrically connected to one of the gate of the transistor 31, the source or drain of the transistor 32, and one of the electrodes of the capacitive element 34. The gate of the transistor 32 is electrically connected to the wiring G2. The other of the source or drain of the transistor 32 is electrically connected to the wiring Com. One of the source or drain of the transistor 31 is electrically connected to one of the electrodes of the light-emitting element 35. The other of the source or drain of the transistor 12 is electrically connected to the wiring Cath and the other of the electrodes of the capacitive element 34. The other of the electrodes of the light-emitting element 35 is electrically connected to the wiring G3A. is electrically connected to the wiring Cath and the other of the electrodes of the capacitive element 34. The other of the electrodes of the light-emitting element 35 is electrically connected to the wiring G3A. The other of the electrodes of the light-emitting element 35 is electrically connected to the wiring G3A.

[0105] In FIG. 4(A), the transistor 31, the transistor 32, and the transistor 33 may each have a back gate. Note that any one or more of the transistor 31, the transistor 32, or the transistor 33 may have a configuration with a back gate. In FIG. 4(A), the transistor 31, the transistor 32, and the transistor 33 may each have a back gate. Note that any one or more of the transistor 31, the transistor 32, or the transistor 33 may have a configuration with a back gate. In FIG. 4(A), the transistor 31, the transistor 32, and the transistor 33 may each have a back gate. Note that any one or more of the transistor 31, the transistor 32, or the transistor 33 may have a configuration with a back gate.

[0106] A low potential for initializing the display data D1 held in the capacitive element 34 is applied to the wiring Com. It is preferable that the low potential is set to a current value at which the light-emitting element does not emit light. That is, a potential for turning off the transistor 31 is applied. The wiring G3A is connected to the anode terminal of the light-emitting element, and a triangular wave TW is applied. The wiring Cath is connected to the cathode terminal of the light-emitting element via the transistor 31. Therefore, the potential applied to the wiring Cath is preferably set to a current value at which the light-emitting element does not emit light. That is, a potential for turning off the transistor 31 is applied. The wiring G3A is connected to the anode terminal of the light-emitting element, and a triangular wave TW is applied. The wiring Cath is connected to the cathode terminal of the light-emitting element via the transistor 31. Therefore, the potential applied to the wiring Cath is connected to the cathode terminal of the light-emitting element via the transistor 31. Therefore, the potential applied to the wiring Cath The potential to be applied is preferably smaller than the potential when the display data D1 is initialized.

[0107] A scan signal is applied to the pixel 10A connected to the wiring G1 via the wiring G1. The wiring A reset signal is applied to the pixel 10A connected to the wiring G2 via the wiring G2. Wiring G A triangular wave TW is applied to the anode terminal of the light-emitting element via the wiring G3A to the pixel 10A connected to 3A. Display data D1 is applied to the pixel 10 connected to the wiring S1 via the wiring S1. is applied.

[0108] The pixel 10A shown in FIG. 4(A) is different from the pixel 10 shown in FIG. 1(A) in that a triangular wave TW is applied to the anode terminal of the light-emitting element 35. This is the point of difference.

[0109] FIG. 4(B) is a timing chart for explaining an example of the operation of the pixel 10A.

[0110] At time T30, a reset signal is applied to the wiring G2. A reset signal is applied to the gate of the transistor 32 via the wiring G2, and the light-emitting element is turned off. The transistor 32 becomes on, and the holding potential held in the capacitor element 34 is initialized. Also, at time T 30, the triangular wave TW applied to the wiring G3A is initialized. At time T30, the reset signal applied to the wiring G2 is released, and the transistor 3

[0111] At time T31, the reset signal applied to the wiring G2 is released, and the transistor 3 2 becomes off. Further, at time T31, the wiring G1 is selected by the scan signal applied to the wiring G1. The transistor 33 becomes on, and the display data D1 applied to the wiring S1 is applied to the capacitor element 34. The display data applied to the capacitor element 34 is applied to the gate of the transistor 31. is applied. D1 is applied to the gate of the transistor 31.

[0112] At time T32, the scanning signal applied to the wiring G1 becomes non - selected. Therefore, the transistor 33 turns off, and the display data D1 applied to the capacitor element 34 is retained. Subsequently, it is preferable that a triangular wave TW is applied to the wiring G3A. The transistor 3 1 supplies current to the light - emitting element according to the first potential, and the light - emitting element starts to light up. However, when the potential of the triangular wave TW applied to the anode terminal of the light - emitting element becomes larger than the potential DL1 obtained by adding the threshold voltage LVth of the light - emitting element to the display data D1, the light - emitting element starts to light up.

[0113] In FIG. 4(B), an example in which the light - emitting element lights up during the hatched period is shown. Also, the light - emitting intensity of the light - emitting element preferably increases according to the change of the triangular wave TW. Note that for the pixel 10A, it is preferable that the period during which the triangular wave TW is applied is shorter than 1 frame.

[0114] FIG. 5(A) is a block diagram for explaining the display device 20B. The display device 20B has a display area 21, a source driver 22, and a gate driver 23b. The display area 21 has pixels 10A(1,1) to pixels 10A(m,n). As an example, in FIG. 5( A), pixels 10A(i, j) to pixels 10A(i + 1, j + 1) are shown. m and n are positive integers, i is an integer from 1 to m, and j is an integer from 1 to n.

[0115] As an example, the connection between the pixel 10A(i, j) and the wiring will be described. The pixel 10A(i, j) is connected to the gate driver via the wiring G1(j), the wiring G2(j), or the wiring G3A(j). is electrically connected to B23b. Pixel 10A(i, j) is connected to the source driver 22 electrically via wiring S1(i).

[0116] Figure 5(B) is a timing chart for explaining an example of the operation of the display device. For the detailed operation of pixel 10 A, the description in Figure 4(B) can be referred to, so the description is omitted .

[0117] At time T40, a reset signal is applied to wiring G2(j), and the holding potentials of pixel 10A(i, j), and pixel 10A(i + 1, j) are initialized, and the light-emitting element turns off. Further, the triangular wave TW applied to wiring G3A(j) is initialized.

[0118] At time T41, the reset signal applied to wiring G2(j) is released. Further , at time T41, wiring G1(j) is selected by the scan signal applied to wiring G1(j). Display data D1 is applied to wiring S1(i), and display data D2 is applied to wiring S1(i + 1) .

[0119] Furthermore, at time T41, a reset signal is applied to wiring G2(j + 1), and the holding potentials of pixel 10A (i, j), and pixel 10A(i + 1, j) are initialized, and the light-emitting element turns off . Also, the triangular wave TW applied to wiring G3A(j + 1) is initialized.

[0120] At time T42, the scan signal applied to wiring G1(j) becomes non-selective. Therefore , display data D1 is held in pixel 10A(i, j), and display data D2 is held in pixel 10A(i + 1, j ).

[0121] Subsequently, it is preferable that a triangular wave TW is applied to the wiring G3A(j). Pixel 10A (i,j) supplies a current corresponding to the display data D1 to the light-emitting element, and the light-emitting element starts lighting up. . However, when the potential of the triangular wave TW applied to the anode terminal of the light-emitting element becomes greater than the potential DL1 obtained by adding the threshold voltage LVth of the light-emitting element to the display data D1, the light-emitting element starts lighting up. Similarly, pixel 10A(i+1,j) supplies a current corresponding to the display data D2 to the light-emitting element, and the light-emitting element starts lighting up. . At time T43, the scanning signal applied to the wiring G1(j+1) becomes non-selective. . Therefore, the display data D3 is held in the pixel 10A(i,j+1), and the display data D4 is held in the pixel 10A(i

[0122] +1,j+1). . Subsequently, it is preferable that a triangular wave TW is applied to the wiring G3A(j+1). Pixel 1 0A(i,j+1) supplies a current corresponding to the display data D3 to the light-emitting element, and the light-emitting element starts lighting up.

[0123] . However, when the potential of the triangular wave TW applied to the anode terminal of the light-emitting element becomes greater than the potential DL3 obtained by adding the threshold voltage LVth of the light-emitting element to the display data D 3, the light-emitting element starts lighting up. . Similarly, pixel 10A(i+1,j+1) supplies a current corresponding to the display data D4 to the light-emitting element, and the light-emitting element starts lighting up. Thereafter, the same process is repeated, so the description is omitted. . In the timing chart shown in FIG. 5(B), a triangular wave TW is applied to each of the wirings G3A(j) or G3A (j+1) for each of the scanning signals applied to the wiring G1(j) or the wiring G1(j+1). Since the lighting period varies depending on the selected row, the light emission .

[0124] . In the timing chart shown in FIG. 5(B), a triangular wave TW is applied to each of the wirings G3A(j) or G3A (j+1) for each of the scanning signals applied to the wiring G1(j) or the wiring G1(j+1). Since the lighting period varies depending on the selected row, the light emission (j+1) for each of the scanning signals applied to the wiring G1(j) or the wiring G1(j+1). Since the lighting period varies depending on the selected row, the light emission The lighting time of the elements is dispersed. Therefore, the concentration of power consumption due to the lighting of the light-emitting elements can be dispersed.

[0125] FIG. 6(A) is a block diagram for explaining the display device 20C. The display device 20C includes a display area 21, a source driver 22, a gate driver 23c, and a gate driver 23d. The display area 21 includes pixels 10A(1,1) to pixels 10A(m,n). As an example, in FIG. 6(A), pixels 10A(i, j) to pixels 10A(i + 1, j + 1) are shown. m and n are positive integers, i is an integer from 1 to m, and j is an integer from 1 to n or less.

[0126] As an example, the connection between the pixel 10A(i, j) and the wiring will be described. The pixel 10A(i, j) is electrically connected to the gate driver 23c via the wiring G1(j). Also, the pixel 10A(i, j) is electrically connected to the gate driver 23d via the wiring G2A(k) or the wiring G3A(k). The pixel 10A(i, j) can share the wiring G2A(k) and the wiring G3A(k) with the pixels in the adjacent row, for example, the pixel 10A(i, j + 1). In FIG. 6(A), an example where the wiring G1(j) and the pixels connected to the wiring G1(j + 1) share the wiring G2A(k) and the wiring G3A(k) is shown. Note that the pixels that can share the wiring G2A(k) and the wiring G3A(k) are not limited to the pixels connected to the adjacent wirings G1. Pixels connected to a plurality of wirings G1 can share the wiring G2A(k) and the wiring G3A(k). the wiring G3A(k). (k) and the wiring G3A(k) are not limited to the pixels connected to the adjacent wirings G1. Pixels connected to a plurality of wirings G1 can share the wiring G2A(k) and the wiring G3A(k). the wiring G3A(k).

[0127] A reset signal is applied to the wiring G2A(k), and a triangular wave is applied to the wiring G3A(k).​​ is obtained. Note that the pixel 10A(i, j) and the pixel 10A(i, j+1) are electrically connected to the source driver 22 via the wiring S1(i ). Here, k is a positive integer of 1 or more and j or less.

[0128] FIG. 6(B) is a timing chart for explaining an example of the operation of the display device 20C. For the detailed operation of the pixel 10A, reference can be made to the description of FIG. 4(B), and thus the description is omitted.

[0129] At time T50, a reset signal is applied to the wiring G2A(k), and the holding potentials of the pixels 10A(i, j) , and 10A(i+1, j) are initialized, and the light-emitting element is turned off. Further, the triangular wave TW applied to the wiring G3A(j) is initialized.

[0130] At time T51, the reset signal applied to the wiring G2A(k) is released. Further, at time T51, the wiring G1(j) is selected by the scanning signal applied to the wiring G1(j). The display data D1 is applied to the wiring S1(i), and the display data D2 is applied to the wiring S1(i +1).

[0131] At time T52, the scanning signal applied to the wiring G1(j) becomes non-selective. Accordingly, the display data D1 is held in the pixel 10A(i, j), and the display data D2 is held in the pixel 10A(i+1, j ).

[0132] At time T52, the wiring G1(j+1) is selected by the scanning signal applied to the wiring G1(j+1 ). The display data D3 is applied to the wiring S1(i), and the display data D4 is applied to the wiring S1( i+1). ​​​​

[0133] Furthermore, at time T53, the scanning signal applied to the wiring G1(j + 1) is in a non - selected state. Therefore, the display data D3 is held in the pixel 10A(i, j + 1), and the display data D4 is held in the pixel 1 0A(i + 1, j + 1).

[0134] At time T54, it is preferable that a triangular wave TW is applied to the wiring G3A(k). The pixel 10A(i, j) applies a current corresponding to the display data D1 to the light - emitting element, and the light - emitting element starts to light up. Note that when the potential of the triangular wave TW applied to the anode terminal of the light - emitting element is greater than the potential DL1 obtained by adding the threshold voltage LVth of the light - emitting element to the display data D1 the light - emitting element starts to light up. Similarly, each of the pixels 10A(i + 1, j), 10A(i, j + 1), and 10A( i + 1, j + 1) applies a current corresponding to the display data D2, display data D3, and display data D4, respectively, to the light - emitting element, and the light - emitting element starts to light up.

[0135] In the timing chart shown in FIG. 5(B), a triangular wave TW is applied to each of the wirings G3A(k) for each of the scanning signals applied to the wiring G1(j) or the wiring G1(j + 1). By reducing the number of wirings, the cost of the gate driver 23d can be suppressed. Also, since the lighting period varies depending on a plurality of selected rows, the lighting time of the light - emitting elements is dispersed. Therefore, the concentration of power consumption due to the lighting of the light - emitting elements can be dispersed.

[0136] As described above, the configuration and method shown in the present embodiment can be used in appropriate combination with the configuration and method shown in other embodiments.

[0137] (Embodiment 3) In this embodiment, details will be described for an example of the display device exemplified in the previous embodiment. to be.

[0138] <Configuration example> Fig. 7(A) shows a top view of the display device 700. The display device 700 has a first substrate 701 and a second substrate 705 bonded together with a sealing material 712. Also, in the region sealed by the first substrate 701, the second substrate 705, and the sealing material 712, a pixel portion 702, a source driver circuit portion 704, and a gate driver circuit portion 706 are provided on the first substrate 701. Further, a plurality of display elements are provided in the pixel portion 702. Moreover, an FPC terminal portion 708 to which an FPC 716 (FPC: Flexible printed circuit) is connected is provided in a portion of the first substrate 701 that does not overlap with the second substrate 705. Through the FPC 716, via the FPC terminal portion 708 and the signal line 710, various signals and the like are supplied to each of the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706. Also, in the region sealed by the first substrate 701, the second substrate 705, and the sealing material 712, the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 are provided on the first substrate 701. On the first substrate 701, a pixel portion 702, a source driver circuit portion 704, and a gate driver circuit portion 706 are provided. Also, a plurality of display elements are provided in the pixel portion 702.

[0139] In addition, an FPC terminal portion 708 to which an FPC 716 (FPC: Flexible printed circuit) is connected is provided in a portion of the first substrate 701 that does not overlap with the second substrate 705. C:Flexible printed circuit) is connected. 08 is provided. Through the FPC 716, via the FPC terminal portion 708 and the signal line 710, various signals are supplied to each of the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706. of each.

[0140] A plurality of gate driver circuit portions 706 may be provided. Also, the gate driver circuit portion 706 and the source driver circuit portion 704 may each be formed separately on a semiconductor substrate or the like and be in the form of an IC chip packaged. The IC chip can be mounted on the first substrate 701 or on the FPC 716. The gate driver circuit portion 706 and the source driver circuit portion 704 may each be formed separately on a semiconductor substrate or the like and be in the form of an IC chip packaged. The IC chip can be mounted on the first substrate 701 or on the FPC 716. 1 or on the FPC 716.

[0141] The configuration of the transistors included in the pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 is not particularly limited. As the semiconductor layer of the transistor, single crystal semiconductor is used. , polycrystalline semiconductors, microcrystalline semiconductors, or amorphous semiconductors, etc. can be used alone or in combination. As the semiconductor material, for example, silicon, germanium, etc. can be used. In addition, compound semiconductors such as silicon germanium, silicon carbide, gallium arsenide, oxide semiconductors, nitride semiconductors, etc., and organic semiconductors can be used. When an organic semiconductor is used as the semiconductor layer, low molecular organic materials having an aromatic ring, π - electron conjugated conductive polymers, etc. can be used.

[0142] For example, rubrene, tetracene, pentacene, perylene diimide, tetracyanoquinodimethane, polythiophene, polyacetylene, polyparaphenylene vinylene, etc. can be used.

[0143] The transistor used in this embodiment preferably has an oxide semiconductor film with high purity and suppression of the formation of oxygen vacancies. This transistor can lower the off - current. Therefore, the holding time of electrical signals such as image signals can be lengthened. Therefore, since the frequency of the refresh operation can be reduced, it has the effect of reducing power consumption.

[0144] In addition, the transistor used in this embodiment can obtain a relatively high field - effect mobility, so it can be driven at high speed. For example, by using such a transistor capable of high - speed driving in a display device, the switching transistor in the pixel portion and the driver transistor used in the driving circuit portion can be formed on the same substrate. That is, a configuration that does not apply a driving circuit formed by a silicon wafer or the like is also possible, and the number of components of the semiconductor device can be reduced. Also, in the pixel portion, by using a transistor capable of high - speed driving, high - quality An image can be provided.

[0145] The display device 700A shown in FIG. 7(B) is an example of a display device that can be used as a flexible display, in which a resin layer 743 having flexibility is applied instead of the first substrate 701.

[0146] The display device 700A has a pixel portion 702 that is not rectangular but has an arc-shaped corner. Also, as shown in the region P1 in FIG. 7(B), it has a notch portion where a part of the pixel portion 702 and the resin layer 743 is cut out. A pair of gate driver circuit portions 706 are provided on both sides with the pixel portion 702 interposed therebetween. Also, the gate driver circuit portion 706 is provided along an arc-shaped contour at the corner of the pixel portion 702.

[0147] The resin layer 743 has a shape in which a portion where the FPC terminal portion 708 is provided protrudes. Also, a part of the resin layer 743 including the FPC terminal portion 708 can be folded back to the back side in the region P2 in FIG. 7(B). By folding back a part of the resin layer 743, the display device 700A can be mounted on an electric device in a state where the FPC 716 is overlapped and arranged on the back side of the pixel portion 702, and the space saving of the electric device can be achieved.

[0148] An IC 717 is mounted on the FPC 716 connected to the display device 700A. The IC 717 has a function as a source driver circuit, for example. At this time, the source driver circuit portion 704 in the display device 700A can have a configuration including at least one of a protection circuit, a buffer circuit, a demultiplexer circuit, etc.

[0149] ​​​​​​​​​​​The display device 700B shown in FIG. 7C can be suitably used in electronic devices having a large screen. For example, a television device, a monitor device, a personal computer, Computers (including notebook and desktop computers), tablet devices, digital signage, etc. It can be suitably used for the following:

[0150] The display device 700B includes a plurality of source driver ICs 721 and a pair of gate driver circuits. The sensor 722 has a first section 722.

[0151] The source driver ICs 721 are each attached to an FPC 723. In addition, the FPCs 723 are each connected to the substrate 701 at one terminal and to the printed circuit board 72 at the other terminal. 4. By bending the FPC 723, the printed circuit board 724 is It can be mounted on the back side of the pixel section 702 in an electric device, thereby saving space in the electronic device. It is possible to achieve this.

[0152] On the other hand, the gate driver circuit section 722 is formed on the substrate 701. It is possible to realize electronic devices with narrow bezels.

[0153] With this configuration, a large-sized and high-resolution display device can be realized. Surface size is 30 inches or more, 40 inches or more, 50 inches or more, or 60 inches or more diagonally The same can be applied to display devices with extremely high resolution such as 4K2K or 8K4K. A high-resolution display device can be realized.

[0154] <Cross-section configuration example 1> FIG. 8 is a cross-sectional view taken along the dashed line QR shown in FIG.

[0155] The display device shown in FIG. 8 includes a routing wiring portion 711, a pixel portion 702, a source driver circuit portion 704, and an FPC terminal portion 708. The routing wiring portion 711 has signal lines 710. The pixel portion 702 has transistors 750 and capacitor elements 790. The source driver circuit portion 704 has a transistor 752. The capacitor element 790 shown in FIG. 8 has a lower electrode formed by processing the same film as the first gate electrode of the transistor 750, and an upper electrode formed by processing the same metal oxide as the semiconductor layer. The upper electrode is made to have a low resistance similar to the source region and drain region of the transistor 750. Also, a part of the insulating film that functions as the first gate insulating layer of the transistor 750 is provided between the lower electrode and the upper electrode. That is, the capacitor element 790 has a stacked structure in which an insulating film that functions as a dielectric film is sandwiched between a pair of electrodes. Also, a wiring obtained by processing the same film as the source electrode and drain electrode of the transistor is connected to the upper electrode.

[0156] An insulating layer 770 having a planarizing function is provided over the transistor 750, the transistor 752, and the capacitor element 790. By means of the insulating layer 770, the upper surfaces of a conductive layer 772 and a conductive layer 774 provided over the insulating layer 770 can be made flat. Since the conductive layer 772 and the conductive layer 774 are located on the same plane and the upper surfaces of the conductive layer 772 and the conductive layer 774 are flat, the conductive layer 772 and the conductive layer 774 can be easily electrically connected to the light-emitting element 782.

[0157]

[0158] ​​​​​​​​​​​​Here, the light-emitting element 782 will be described. As an example, it is preferable that the light-emitting element 782 can emit light of a plurality of different hue colors. Or, a plurality of light-emitting elements 78 2 that emit light of different single colors can be combined. Or, a light-shielding layer may be provided on the second substrate 705 side. By providing the light-shielding layer, the viewing angle can be limited. Or, a light-shielding layer and a coloring layer may be provided on the second substrate 705 side. Note that, by providing a light-shielding layer and a coloring layer on the second substrate 705 side, a light-emitting element 782 that emits white light can be used.

[0159] The transistor 750 included in the pixel portion 702 and the transistor 752 included in the source driver circuit portion 704 may use transistors having different structures. For example, a top-gate type transistor may be applied to one of them, and a bottom-gate type transistor may be applied to the other. Note that the gate driver circuit portion 706 is the same as the source driver circuit portion 704.

[0160] The signal line 710 is formed of the same conductive film as the source electrodes and drain electrodes of the transistors 750 and 752. At this time, using a low-resistance material such as a material containing copper element is preferable because signal delay and the like due to wiring resistance are small, and display on a large screen becomes possible.

[0161] The FPC terminal portion 708 has wiring 760 that partially functions as a connection electrode, an anisotropic conductive film 78 0, and an FPC 716. The wiring 760 is electrically connected to the terminal included in the FPC 71 6 via the anisotropic conductive film 780. Here, the wiring 760 is formed of the same conductive film as the source electrodes and drain electrodes of the transistors 750 and 752. ​

[0162] As the first substrate 701 and the second substrate 705, for example, a glass substrate, or a flexible substrate such as a plastic substrate can be used. When using a flexible substrate for the first substrate 701, it is preferable to provide an insulating layer having a barrier property against water and hydrogen between the first substrate 701 and the transistor 750 or the like. When using a flexible substrate for the first substrate 701, it is preferable to provide an insulating layer having a barrier property against water and hydrogen between the first substrate 701 and the transistor 750 or the like. When using a flexible substrate for the first substrate 701, it is preferable to provide an insulating layer having a barrier property against water and hydrogen between the first substrate 701 and the transistor 750 or the like. When using a flexible substrate for the first substrate 701, it is preferable to provide an insulating layer having a barrier property against water and hydrogen between the first substrate 701 and the transistor 750 or the like.

[0163] Subsequently, an example of a method for manufacturing the display device 700 shown in FIG. 8 will be described. Each of FIGS. 9 to 11 is a schematic cross-sectional view at each stage of the process related to the method for manufacturing the display device 700. Subsequently, an example of a method for manufacturing the display device 700 shown in FIG. 8 will be described. Each of FIGS. 9 to 11 is a schematic cross-sectional view at each stage of the process related to the method for manufacturing the display device 700. Subsequently, an example of a method for manufacturing the display device 700 shown in FIG. 8 will be described. Each of FIGS. 9 to 11 is a schematic cross-sectional view at each stage of the process related to the method for manufacturing the display device 700.

[0164] Note that the thin films (insulating film, semiconductor film, conductive film, etc.) constituting the display device can be formed using a sputtering method, a chemical vapor deposition (CVD) method, a vacuum evaporation method, a pulsed laser deposition (PLD) method, an atomic layer deposition (ALD) method, or the like. As the CVD method, a plasma chemical vapor deposition (PECVD) method or a thermal CVD method may be used. As an example of the thermal CVD method, a metal organic chemical vapor deposition (MOCVD) method may be used. Note that the thin films (insulating film, semiconductor film, conductive film, etc.) constituting the display device can be formed using a sputtering method, a chemical vapor deposition (CVD) method, a vacuum evaporation method, a pulsed laser deposition (PLD) method, an atomic layer deposition (ALD) method, or the like. As the CVD method, a plasma chemical vapor deposition (PECVD) method or a thermal CVD method may be used. As an example of the thermal CVD method, a metal organic chemical vapor deposition (MOCVD) method may be used. Note that the thin films (insulating film, semiconductor film, conductive film, etc.) constituting the display device can be formed using a sputtering method, a chemical vapor deposition (CVD) method, a vacuum evaporation method, a pulsed laser deposition (PLD) method, an atomic layer deposition (ALD) method, or the like. As the CVD method, a plasma chemical vapor deposition (PECVD) method or a thermal CVD method may be used. As an example of the thermal CVD method, a metal organic chemical vapor deposition (MOCVD) method may be used. Note that the thin films (insulating film, semiconductor film, conductive film, etc.) constituting the display device can be formed using a sputtering method, a chemical vapor deposition (CVD) method, a vacuum evaporation method, a pulsed laser deposition (PLD) method, an atomic layer deposition (ALD) method, or the like. As the CVD method, a plasma chemical vapor deposition (PECVD) method or a thermal CVD method may be used. As an example of the thermal CVD method, a metal organic chemical vapor deposition (MOCVD) method may be used. Note that the thin films (insulating film, semiconductor film, conductive film, etc.) constituting the display device can be formed using a sputtering method, a chemical vapor deposition (CVD) method, a vacuum evaporation method, a pulsed laser deposition (PLD) method, an atomic layer deposition (ALD) method, or the like. As the CVD method, a plasma chemical vapor deposition (PECVD) method or a thermal CVD method may be used. As an example of the thermal CVD method, a metal organic chemical vapor deposition (MOCVD) method may be used. Note that the thin films (insulating film, semiconductor film, conductive film, etc.) constituting the display device can be formed using a sputtering method, a chemical vapor deposition (CVD) method, a vacuum evaporation method, a pulsed laser deposition (PLD) method, an atomic layer deposition (ALD) method, or the like. As the CVD method, a plasma chemical vapor deposition (PECVD) method or a thermal CVD method may be used. As an example of the thermal CVD method, a metal organic chemical vapor deposition (MOCVD) method may be used. Note that the thin films (insulating film, semiconductor film, conductive film, etc.) constituting the display device can be formed using a sputtering method, a chemical vapor deposition (CVD) method, a vacuum evaporation method, a pulsed laser deposition (PLD) method, an atomic layer deposition (ALD) method, or the like. As the CVD method, a plasma chemical vapor deposition (PECVD) method or a thermal CVD method may be used. As an example of the thermal CVD method, a metal organic chemical vapor deposition (MOCVD) method may be used.

[0165] Also, the thin films (insulating film, semiconductor film, conductive film, etc.) constituting the display device can be formed by methods such as spin coating, dip coating, spray coating, inkjet, dispensing, screen printing, offset printing, or by tools (equipment) such as doctor knife, slit coating, roll coating, curtain coating, knife coating. Also, the thin films (insulating film, semiconductor film, conductive film, etc.) constituting the display device can be formed by methods such as spin coating, dip coating, spray coating, inkjet, dispensing, screen printing, offset printing, or by tools (equipment) such as doctor knife, slit coating, roll coating, curtain coating, knife coating. Also, the thin films (insulating film, semiconductor film, conductive film, etc.) constituting the display device can be formed by methods such as spin coating, dip coating, spray coating, inkjet, dispensing, screen printing, offset printing, or by tools (equipment) such as doctor knife, slit coating, roll coating, curtain coating, knife coating. Also, the thin films (insulating film, semiconductor film, conductive film, etc.) constituting the display device can be formed by methods such as spin coating, dip coating, spray coating, inkjet, dispensing, screen printing, offset printing, or by tools (equipment) such as doctor knife, slit coating, roll coating, curtain coating, knife coating.

[0166] When processing the thin film constituting the display device, it can be processed using a photolithography method or the like. Alternatively, an island-shaped thin film may be formed by a film formation method using a shielding mask. Or, the thin film may be processed by a nanoimprint method, a sandblasting method, a lift-off method, or the like. As the photolithography method, for example, there are the following two methods. One is to apply a photosensitive resist material on the thin film to be processed, expose it through a photomask, and then develop it to form a resist mask, process the thin film by etching or the like, and remove the resist mask. The other is a method of forming a photosensitive thin film and then performing exposure and development to process the thin film into a desired shape. In the photolithography method, the light used for exposure can be, for example, i-line (wavelength 365 nm), g-line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture of these.

[0167] In the photolithography method, the light used for exposure can be, for example, i-line (wavelength 365 nm), g-line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture of these. In addition, ultraviolet light, KrF laser light, ArF laser light, or the like can also be used. Also, exposure may be performed by immersion exposure technology. As the light used for exposure, extreme ultraviolet light (EUV) or X-rays may also be used. In addition, instead of the light used for exposure, an electron beam can also be used. Using extreme ultraviolet light, X-rays or an electron beam is preferable because extremely fine processing becomes possible. When performing exposure by scanning a beam such as an electron beam, a photomask is not required. When performing exposure by scanning a beam such as an electron beam, a photomask is not required. When performing exposure by scanning a beam such as an electron beam, a photomask is not required.

[0168] For the etching of the thin film, a dry etching method, a wet etching method, a sandblasting method, or the like can be used.

[0169] <Formation of Transistors and the Like> First, a conductive layer 301, a conductive layer 303, and a conductive layer 305 are formed on a substrate 701. The conductive layers 301, 303, and 305 can be formed by forming a conductive film, forming a resist mask, etching the conductive film, and then removing the resist mask. .

[0170] Subsequently, an insulating layer 3 11 is formed to cover the substrate 701, the conductive layer 301, the conductive layer 303, and the conductive layer 305.

[0171] Subsequently, a semiconductor layer 321, a semiconductor layer 323, and a semiconductor layer 325 are formed (Fig. 9(A) ). The semiconductor layers 321, 323, and 325 can be formed by forming a semiconductor film, forming a resist mask, etching the semiconductor film, and then removing the resist mask. .

[0172] Subsequently, an insulating layer 331, a conductive layer 341, a conductive layer 351, an insulating layer 333, a conductive layer 343, and a conductive layer 353 are formed. The insulating films that become the insulating layers 331 and 333, the conductive films that become the conductive layers 341 and 343, and the conductive films that become the conductive layers 351 and 353 are formed, then a resist mask is formed, the insulating film and the conductive film are etched, and then the resist mask is removed.

[0173] Subsequently, an insulating layer 361 and an insulating layer 363 are formed (Fig. 9(B)).

[0174] Subsequently, openings are formed in the insulating layer 361 and the insulating layer 363, and a conductive layer 371, a conductive layer 373 a, a conductive layer 373b, a conductive layer 375, a conductive layer 377, and a wiring 760 are formed. The conductive layer 3 71. The conductive layer 373a, the conductive layer 373b, the conductive layer 375, the conductive layer 377, and the wiring 760 can be formed by the same method as the conductive layer 301 and the like. They can be formed by the same method as the conductive layer 301 and the like.

[0175] Through the above steps, the signal line 710, the transistor 750, the capacitor element 790, and the transistor 752 can be formed (FIG. 9(C)). Subsequently, the insulating layer 379 is formed. The insulating layer 37 9 has a function as a protective film for the transistor 750 and the like.

[0176] <Formation of Insulating Layer 770> Subsequently, the insulating layer 770 is formed. By using a photosensitive material for the insulating layer 770, an opening can be formed by a photolithography method or the like. As the insulating layer 770, after forming an insulating film, a part of the insulating film may be etched using a resist mask to form an opening. When an organic insulating material is used for the insulating layer 770, the flatness of its upper surface can be improved, so it is preferable. It is preferable.

[0177] Also, an inorganic insulating film may be used as the insulating layer 770. As the insulating layer 770, a layer of an inorganic insulating material such as silicon nitride, silicon oxide, silicon oxynitride, silicon nitride oxide, aluminum oxide, aluminum nitride, aluminum oxynitride, or aluminum nitride oxide can be used as a single layer or in a laminated structure. Thereby, the insulating layer 770 functions as a protective layer for the transistor 750 and the like. 750 and the like. functions as a protective layer for the transistor 750 and the like.

[0178] Also, the insulating layer 770 may have a laminated structure of an inorganic insulating film and an organic insulating film.

[0179] Subsequently, a part of the insulating layer 379 on the wiring 760 of the FPC terminal portion 708 is removed to expose the wiring 76 0.

[0180] <Formation of Conductive Layers 772 and 774> Subsequently, conductive layer 772 and conductive layer 774 are formed on insulating layer 770 (FIG. 10(A)). . Conductive layer 772 is electrically connected to transistor 750 through the opening in insulating layer 770 and continues. Conductive layer 772 and conductive layer 774 can be formed in the same manner as conductive layer 301 and the like. It is preferable to use a material that is reflective to visible light for conductive layer 772 and conductive layer 774 . For example, as conductive layer 772 and conductive layer 774, materials containing an alloy of silver, palladium, and copper (also referred to as APC), aluminum, titanium, copper, etc. can be used.

[0181] Subsequently, conductive bumps 791 and bumps 793 are formed on conductive layer 772 and conductive layer 774, respectively (FIG. 10(B)). As bumps 791 and bumps 793, metals such as gold, silver, tin, alloys having these metals, anisotropic conductive films such as conductive resins, and conductive pastes can be used. For example, gold can be preferably used as bumps 791 and bumps 793. For the formation of bumps 791 and bumps 793, printing methods, transfer methods, ejection methods, etc. can be used.

[0182] <Arrangement of Light-Emitting Element 782> Subsequently, light-emitting element 782 is arranged on bumps 791 and bumps 793. When arranging, light-emitting element 782 is arranged such that the electrode on the cathode side and the electrode on the anode side of light-emitting element 782 are in contact with bumps 791 and bumps 793, respectively. Bumps 791, bumps 793, light-emitting element 782, conductive layer 772, and conductive layer 774 are pressed into contact, and light-emitting element 782 is fixed on conductive layer 772 and conductive layer 774. At the same time, conductive layer 772 and conductive layer 774, and light-emitting element 782 ​​​​​782 is electrically connected (FIG. 11).

[0183] For the arrangement of the light-emitting element 782, a pick-and-place device can be used. Or, for the arrangement of the light-emitting element 782, the FSA (Fluidic Self Assembly) method may be used. In the FSA method, a concave insulating layer compatible with the light-emitting element 782 is formed in the region overlapping the conductive layer 772 and the conductive layer 774, and the light-emitting element 782 is self-aligned and arranged in the recess in a liquid.

[0184] 〈Lamination of Substrate 701 and Substrate 705〉 Subsequently, an adhesive layer for bonding these is formed on either one or both of the substrates 701 and 705. The adhesive layer is formed so as to surround the region where the pixels are arranged. The adhesive layer can be formed, for example, by a screen printing method, a dispensing method, or the like. As the adhesive layer, a thermosetting resin, an ultraviolet curable resin, or the like can be used. Also, a resin that is temporarily cured by ultraviolet rays and then cured by applying heat may be used. Or, as the adhesive layer, a resin having both ultraviolet curability and thermosetting properties may be used.

[0185] Subsequently, the substrate 701 and the substrate 705 are laminated, and the adhesive layer is cured to form the sealing film 732. Lamination is preferably performed in a reduced-pressure atmosphere to prevent bubbles or the like from being mixed between the substrate 701 and the substrate 705.

[0186] Subsequently, an anisotropic conductive film 780 is provided on the wiring 760. By arranging the FPC 716 on the anisotropic conductive film 780 and performing thermocompression bonding, the wiring 760 and the FPC 716 are electrically connected to each other.

[0187] ​​​​​​​Through the above processes, the display device 700 can be formed (FIG. 8).

[0188] As described above, the configurations and methods shown in this embodiment can be used in appropriate combination with the configurations and methods shown in other embodiments.

[0189] (Embodiment 4) In this embodiment, an example of a transistor that can be used in the display device shown in the previous embodiment will be described.

[0190] The display device according to one aspect of the present invention can be manufactured using various types of transistors such as bottom-gate type transistors and top-gate type transistors. Therefore, it is possible to easily replace the material of the semiconductor layer and the transistor structure used in accordance with the existing manufacturing line.

[0191] <Bottom-Gate Type Transistor>[[]] FIG. 12(A1) is a cross-sectional view of a channel protection type transistor 1810, which is a type of bottom-gate type transistor, in the channel length direction. In FIG. 12(A1), the transistor 1810 is formed on a substrate 1771. Further, the transistor 1810 has an electrode 1746 on the substrate 1771 via an insulating layer 1772. Further, the transistor 1810 has a semiconductor layer 1742 on the electrode 1746 via an insulating layer 1726. The electrode 1746 can function as a gate electrode. The insulating layer 1726 can function as a gate insulating layer.

[0192] Further, the transistor 1810 has an insulating layer 1741 on the channel formation region of the semiconductor layer 1742. Further, electrodes 1744a and 1744b are formed on the insulating layer 1726 in contact with a part of the semiconductor layer 1742. ​​​​​​​​​​​The electrode 1744a can function as either a source electrode or a drain electrode. 1744b can function as the other of the source and drain electrodes. A portion of electrode 1744b is formed on insulating layer 1741.

[0193] The insulating layer 1741 can function as a channel protection layer. By providing the electrode 1744a and the electrode 1744b, the semiconductor layer 1 Therefore, when the electrodes 1744a and 1744b are formed, the electrodes 1744a and 1744b are prevented from being exposed. In addition, the channel formation region of the semiconductor layer 1742 can be prevented from being etched. According to one embodiment of the present invention, a transistor with favorable electrical characteristics can be provided.

[0194] The transistor 1810 includes an electrode 1744a, an electrode 1744b, and an insulating layer 1741. It has an insulating layer 1728 thereon, and an insulating layer 1729 on the insulating layer 1728 .

[0195] When an oxide semiconductor is used for the semiconductor layer 1742, the electrodes 1744a and 1744b At least the portion in contact with the semiconductor layer 1742 is provided with oxygen removed from a portion of the semiconductor layer 1742. In the semiconductor layer 1742, it is preferable to use a material that can generate oxygen vacancies. The region where oxygen vacancies occur increases in carrier concentration, and the region becomes n-type, and the n-type region (n + Therefore, the region can function as a source region or a drain region. When an oxide semiconductor is used for the semiconductor layer 1742, oxygen is removed from the semiconductor layer 1742. Examples of materials that can cause oxygen vacancies include tungsten and titanium. It can be done.

[0196] By forming a source region and a drain region in the semiconductor layer 1742, the contact resistance between the electrodes 174 4a and the electrode 1744b and the semiconductor layer 1742 can be reduced. Therefore , electrical characteristics of the transistor, such as field-effect mobility and threshold voltage, can be made good .

[0197] When using a semiconductor such as silicon for the semiconductor layer 1742, between the semiconductor layer 1742 and the electrode 1 744a, and between the semiconductor layer 1742 and the electrode 1744b, it is preferable to provide a layer that functions as an n-type semiconductor or a p-type semiconductor . The layer that functions as an n-type semiconductor or a p-type semiconductor can function as a source region or a drain region of the transistor .

[0198] The insulating layer 1729 is preferably formed using a material having a function of preventing or reducing the diffusion of impurities from the outside into the transistor. Note that the insulating layer 1729 can be omitted if necessary . .

[0199] The transistor 1811 shown in FIG. 12(A2) is different from the transistor 1810 in that it has an electrode 1723 that can function as a back gate electrode on the insulating layer 1729. The electrode 17 23 can be formed by the same material and method as the electrode 1746

[0200] Generally, the back gate electrode is formed of a conductive layer and is arranged so as to sandwich the channel formation region of the semiconductor layer between the gate electrode and the back gate electrode. Therefore, the back gate electrode can function in the same manner as the gate electrode . The potential of the back gate electrode may be the same potential as the gate electrode, or may be a ground potential (GND potential) or an arbitrary potential. Also, the back gate electrode can be made to function in the same manner as the gate electrode. The potential of the back gate electrode may be the same potential as the gate electrode, or may be a ground potential (GND potential) or an arbitrary potential . Also, the back gate By independently changing the potential of the source electrode without linking it to the gate electrode, the threshold voltage of the transistor can be changed. The threshold voltage can be changed.

[0201] In addition, both the electrode 1746 and the electrode 1723 can function as gate electrodes. Therefore, the insulating layer 1726, the insulating layer 1728, and the insulating layer 1729 can each function as a gate insulating layer. Note that the electrode 1723 may be provided between the insulating layer 1728 and the insulating layer 1729. When one of the electrode 1746 or the electrode 1723 is referred to as the "gate electrode", the other is referred to as the "back gate electrode". For example, in the transistor 1811, when the electrode 1723 is referred to as the "gate electrode", the electrode 1746 is referred to as the "back gate electrode". Also, when the electrode 1723 is used as the "gate electrode", the transistor 1811 can be considered as a type of top gate transistor. In addition, either one of the electrode 1746 and the electrode 1723 may be referred to as the "first gate electrode" and the other as the "second gate electrode". By providing the electrode 1746 and the electrode 1723 with the semiconductor layer 1742 interposed therebetween, and further by setting the electrode 1746 and the electrode 1723 to the same potential, the region where carriers flow in the semiconductor layer 1742 becomes larger in the film thickness direction, so the amount of carrier movement increases. As a result, the on-current of the transistor 1811 increases and the field-effect mobility becomes higher. Therefore, the transistor 1811 has a large on-current with respect to the occupied area.

[0202] When one of the electrode 1746 or the electrode 1723 is referred to as the "gate electrode", the other is referred to as the "back gate electrode". For example, in the transistor 1811, when the electrode 1723 is referred to as the "gate electrode", the electrode 1746 is referred to as the "back gate electrode". Also, when the electrode 1723 is used as the "gate electrode", the transistor 1811 can be considered as a type of top gate transistor. In addition, either one of the electrode 1746 and the electrode 1723 may be referred to as the "first gate electrode" and the other as the "second gate electrode". By providing the electrode 1746 and the electrode 1723 with the semiconductor layer 1742 interposed therebetween, and further by setting the electrode 1746 and the electrode 1723 to the same potential, the region where carriers flow in the semiconductor layer 1742 becomes larger in the film thickness direction, so the amount of carrier movement increases. As a result, the on-current of the transistor 1811 increases and the field-effect mobility becomes higher. Therefore, the transistor 1811 has a large on-current with respect to the occupied area. When one of the electrode 1746 or the electrode 1723 is referred to as the "gate electrode", the other is referred to as the "back gate electrode". For example, in the transistor 1811, when the electrode 1723 is referred to as the "gate electrode", the electrode 1746 is referred to as the "back gate electrode". Also, when the electrode 1723 is used as the "gate electrode", the transistor 1811 can be considered as a type of top gate transistor. In addition, either one of the electrode 1746 and the electrode 1723 may be referred to as the "first gate electrode" and the other as the "second gate electrode". By providing the electrode 1746 and the electrode 1723 with the semiconductor layer 1742 interposed therebetween, and further by setting the electrode 1746 and the electrode 1723 to the same potential, the region where carriers flow in the semiconductor layer 1742 becomes larger in the film thickness direction, so the amount of carrier movement increases. As a result, the on-current of the transistor 1811 increases and the field-effect mobility becomes higher. Therefore, the transistor 1811 has a large on-current with respect to the occupied area.

[0203] By providing the electrode 1746 and the electrode 1723 with the semiconductor layer 1742 interposed therebetween, and further by setting the electrode 1746 and the electrode 1723 to the same potential, the region where carriers flow in the semiconductor layer 1742 becomes larger in the film thickness direction, so the amount of carrier movement increases. As a result, the on-current of the transistor 1811 increases and the field-effect mobility becomes higher. Therefore, the transistor 1811 has a large on-current with respect to the occupied area. As a result, the on-current of the transistor 1811 increases and the field-effect mobility becomes higher.

[0204] Therefore, the transistor 1811 has a large on-current with respect to the occupied area. It is a transistor. That is, for the required on-current, the occupied area of the transistor 1811 can be reduced. According to one aspect of the present invention, the occupied area of the transistor can be made small. Therefore, according to one aspect of the present invention, a semiconductor device with a high integration degree can be realized.

[0205] Also, since the gate electrode and the back gate electrode are formed of a conductive layer, it has a function of preventing the electric field generated outside the transistor from acting on the semiconductor layer where the channel is formed (especially the electric field shielding function against electrostatic charges, etc.). Note that by forming the back gate electrode larger than the semiconductor layer and covering the semiconductor layer with the back gate electrode, the electric field shielding function can be enhanced.

[0206] Also, by forming the back gate electrode with a conductive film having light-shielding properties, it is possible to prevent light from entering the semiconductor layer from the back gate electrode side. Therefore, it is possible to prevent light deterioration of the semiconductor layer and deterioration of electrical characteristics such as shift of the threshold voltage of the transistor.

[0207] According to one aspect of the present invention, a transistor with good reliability can be realized. Also, a semiconductor device with good reliability can be realized.

[0208] FIG. 12(B1) is a cross-sectional view of the channel protection type transistor 1820 in the channel length direction with a configuration different from that of FIG. 12(A1). The transistor 1820 has substantially the same structure as the transistor 1810, but is different in that the insulating layer 1741 covers the end of the semiconductor layer 1742. Also, a part of the insulating layer 1729 overlapping the semiconductor layer 1742 is selectively removed. ​​​​​​​​​​​​In the opening formed in this way, the semiconductor layer 1742 and the electrode 1744a are electrically connected. Also, in another opening formed by selectively removing a part of the insulating layer 1729 that overlaps with the semiconductor layer 1742, the semiconductor layer 1742 and the electrode 1744b are electrically connected. The region of the insulating layer 1729 that overlaps with the channel formation region can function as a channel protection layer.

[0209] The transistor 1821 shown in FIG. 12(B2) is different from the transistor 1820 in that it has an electrode 1723 that can function as a back gate electrode on the insulating layer 1729.

[0210] By providing the insulating layer 1741, it is possible to prevent the exposure of the semiconductor layer 1742 that occurs when forming the electrodes 1744a and 1744b. Therefore, it is possible to prevent the thinning of the semiconductor layer 1742 when forming the electrodes 1744a and 1744b.

[0211] Also, the transistors 1820 and 1821 have a longer distance between the electrode 1744a and the electrode 1746 and a longer distance between the electrode 1744b and the electrode 1746 than the transistors 1810 and 1811. Therefore, it is possible to reduce the parasitic capacitance generated between the electrode 1744a and the electrode 1746. Also, it is possible to reduce the parasitic capacitance generated between the electrode 1744b and the electrode 1746. According to one aspect of the present invention, a transistor with good electrical characteristics can be realized.

[0212] FIG. 12(C1) shows a cross-sectional view in the channel length direction of a channel etching type transistor 1825, which is one of the bottom gate type transistors. The transistor 1825 forms the electrodes 1744a and 1744b without using the insulating layer 1741.​​​​​​​​​​ is formed. Therefore, a part of the semiconductor layer 1742 exposed during the formation of the electrodes 1744a and 1744b may be etched. On the other hand, since the insulating layer 1741 is not provided, the productivity of the transistor can be increased.

[0213] The transistor 1826 shown in FIG. 12(C2) is different from the transistor 1825 in that it has an electrode 1723 that can function as a back gate electrode on the insulating layer 1729.

[0214] Cross-sectional views in the channel width direction of the transistors 1810, 1811, 1820, 1 821, 1825, 1826 are shown in FIGS. 13(A1) to 13(C2), respectively.

[0215] In the structures shown in FIGS. 13(B2) and 13(C2), the gate electrode and the back gate electrode are connected, and the potentials of the gate electrode and the back gate electrode become the same potential. Also, the semiconductor layer 17 42 is sandwiched between the gate electrode and the back gate electrode.

[0216] The length of each of the gate electrode and the back gate electrode in the channel width direction is longer than the length of the semiconductor layer 17 42 in the channel width direction, and the entire channel width direction of the semiconductor layer 1742 is interposed between the insulating layers 1726, 1741, 1728, 1729 and covered by the gate electrode or the back gate electrode. With this configuration, the semiconductor layer 1742 included in the transistor can be electrically surrounded by the electric fields of the gate electrode and

[0217] the back gate electrode. For transistors such as the transistor 1821 or the transistor 1826, the gate electrode and the back gate

[0218] electrode The semiconductor layer 1742 in which the channel formation region is formed by the electric field of the top electrode is electrically taken The device structure of the transistor surrounding it can be called a Surrounded channel (S-cha nnel) structure.

[0219] By adopting the S-channel structure, an electric field for inducing a channel by one or both of the gate electrode and the back gate electrode can be effectively applied to the semiconductor layer 1742, so that the current driving ability of the transistor is improved and high on-current characteristics can be obtained. Also, since the on-current can be increased, the transistor can be miniaturized. In addition, by adopting the S-channel structure, the mechanical strength of the transistor can be increased. <Top-gate transistor> The transistor 1842 illustrated in FIG. 14(A1) is one of the top-gate transistors. The transistor 1842 is different from the transistors 1810 and 1820 in that the electrodes 1744a and 1744b are formed after the insulating layer 1729 is formed.

[0220] <Top-gate transistor> The electrodes 1744a and 1744b are electrically connected to the semiconductor layer 1742 at the openings formed in the insulating layers 1728 and 1729.

[0221] Also, a part of the insulating layer 1726 that does not overlap with the electrode 1746 is removed, and the impurity 755 is introduced into the semiconductor layer 1742 using the remaining insulating layer 1726 as a mask, so that an impurity region can be formed self-alignedly in the semiconductor layer 1742. In the transistor 1842, the region where the insulating layer 1726 extends beyond the end of the electrode 1746 It has. The impurity concentration in the region where impurities 755 are introduced through the insulating layer 1726 of the semiconductor layer 1742 is lower than that in the region where impurities 755 are introduced without passing through the insulating layer 1726. Therefore, an LDD (Lightly Doped Drain) region is formed in the semiconductor layer 1742 in a region that does not overlap with the electrode 1746.

[0222] The transistor 1843 shown in FIG. 14(A2) is different from the transistor 1842 in that it has an electrode 1723. The transistor 1843 has an electrode 1723 formed on the substrate 1771. The electrode 1723 has a region that overlaps with the semiconductor layer 1742 through the insulating layer 1772. The electrode 1723 can function as a back gate electrode.

[0223] Also, as in the transistor 1844 shown in FIG. 14(B1) and the transistor 1845 shown in FIG. 14(B2), all of the insulating layer 1726 in the region that does not overlap with the electrode 1746 may be removed. Also, as in the transistor 1846 shown in FIG. 14(C1) and the transistor 1847 shown in FIG. 14(C2), the insulating layer 1726 may be left.

[0224] For the transistors 1842 to 1847 as well, after forming the electrode 1746, by using the electrode 1746 as a mask to introduce the impurities 755 into the semiconductor layer 1742, impurity regions can be self-alignedly formed in the semiconductor layer 1742. According to one aspect of the present invention, a transistor with good electrical characteristics can be realized. Also, according to one aspect of the present invention, a semiconductor device with high integration can be realized.

[0225] Transistors 1842, 1843, 1844, 1 are shown in FIGS. 15(A1) to 15(C2).​​​​​​​ Cross-sectional views in the channel width direction of 845, 1846, and 1847 are shown respectively.

[0226] Transistors 1843, 1845, and 1847 each have the S-channel structure described above. However, it is not limited to this, and transistors 1843, 1845, and 1847 do not necessarily have to be of the S-channel structure.

[0227] This embodiment can be implemented in appropriate combination with at least a part of other embodiments described in this specification.

[0228] (Embodiment 5) In this embodiment, the configuration of an information processing apparatus according to an aspect of the present invention will be described with reference to FIGS. 16 and 17.

[0229] FIGS. 16 and 17 are diagrams for explaining the configuration of an information processing apparatus according to an aspect of the present invention. FIG. 1 6(A) is a block diagram of the information processing apparatus, and FIGS. 16(B) to 16(E) are perspective views for explaining the configuration of the information processing apparatus. Also, FIGS. 17(A) to 17(E) are perspective views for explaining the configuration of the information processing apparatus.

[0230] <Information Processing Apparatus> The information processing apparatus 5200B described in this embodiment includes an arithmetic unit 5210 and an input / output device 5220 (see FIG. 16(A)).

[0231] The arithmetic unit 5210 has a function of supplying operation information and a function of supplying image information based on the operation information.

[0232] The input / output device 5220 includes a display unit 5230, an input unit 5240, a detection unit 5250, and a communication unit 5 290, and has functions of supplying operation information and supplying image information. Also, the input / output device 5220 has functions of supplying detection information, supplying communication information, and supplying communication information.

[0233] The input unit 5240 has a function of supplying operation information. For example, the input unit 5240 supplies operation information based on the operation of the user of the information processing device 5200B.

[0234] Specifically, a keyboard, a hardware button, a pointing device, a touch sensor , an illuminance sensor, an imaging device, a voice input device, a gaze input device, a posture detection device, etc. can be used for the input unit 5240.

[0235] The display unit 5230 includes a display panel and has a function of displaying image information. For example, the display device shown in the previous embodiment can be used for the display unit 5230.

[0236] The detection unit 5250 has a function of supplying detection information. For example, it has a function of detecting the surrounding environment in which the information processing device is used and supplying it as detection information.

[0237] Specifically, an illuminance sensor, an imaging device, a posture detection device, a pressure sensor, a human presence sensor, etc. can be used for the detection unit 5250.

[0238] The communication unit 5290 has functions of being supplied with communication information and supplying communication information. For example, it has a function of connecting to other electronic devices or a communication network by wireless communication or wired communication. Specifically, it has functions such as wireless in-building communication, telephone communication, and short-range wireless communication.

[0239] <Example Configuration 1 of Information Processing Apparatus> For example, it can be applied to the display unit 5230 with an outer shape along a cylindrical column or the like (see Fig. 1 6(B)). Also, it has a function to change the display method according to the illuminance of the usage environment. Also it has a function to detect the presence of a person and change the display content. Thereby, for example, it can be installed on a column of a building Or, it can display advertisements or guidance, etc. Or, it can be used for digital signage, etc.

[0240] <Example Configuration 2 of Information Processing Apparatus> For example, it has a function to generate image information based on the trajectory of a pointer used by the user (see Fig. 16(C)). Specifically, a display panel with a diagonal length of 20 inches or more, preferably 40 inches or more more preferably 55 inches or more can be used. Or, a plurality of display panels can be arranged and used for one display area. Or, a plurality of display panels can be arranged and used for a multi-screen. Thereby, for example, it can be used for an electronic blackboard, an electronic bulletin board, an electronic signboard, etc.

[0241] <Example Configuration 3 of Information Processing Apparatus> For example, it has a function to change the display method according to the illuminance of the usage environment (see Fig. 16(D) for reference ). Thereby, for example, the power consumption of a smartwatch can be reduced. Or , for example, an image can be displayed on a smartwatch so that it can be preferably used even in an environment with strong external light such as outdoors on a sunny day .

[0242] <Example Configuration 4 of Information Processing Apparatus> The display unit 5230 has, for example, a curved surface that gently curves along the side surface of the housing (see Fig. 16 ​​(E) Reference). Alternatively, the display unit 5230 includes a display panel, and the display panel has a function of displaying, for example, on the front , side, and top surfaces. Thereby, for example, not only on the front surface of a mobile phone but also on the side and top surfaces, image information can be displayed.

[0243] <Configuration Example 5 of Information Processing Apparatus> For example, it has a function of changing the display method according to the illuminance of the usage environment (refer to Fig. 17(A)) . Thereby, the power consumption of a smartphone can be reduced. Alternatively, for example, even in an environment with strong external light such as outdoors on a sunny day, an image can be suitably displayed on a smartphone .

[0244] <Configuration Example 6 of Information Processing Apparatus> For example, it has a function of changing the display method according to the illuminance of the usage environment (refer to Fig. 17(B)) . Thereby, even when strong external light shines indoors on a sunny day, a video can be suitably displayed on a television system .

[0245] <Configuration Example 7 of Information Processing Apparatus> For example, it has a function of changing the display method according to the illuminance of the usage environment (refer to Fig. 17(C)) . Thereby, for example, even in an environment with strong external light such as outdoors on a sunny day, an image can be suitably displayed on a tablet computer .

[0246] <Configuration Example 8 of Information Processing Apparatus> For example, it has a function of changing the display method according to the illuminance of the usage environment (refer to Fig. 17(D)) . Thereby, for example, even in an environment with strong external light such as outdoors on a sunny day, a subject can be suitably displayed on a digital camera for viewing.

[0247] <Configuration Example 9 of Information Processing Apparatus> For example, it has a function of changing the display method according to the illuminance of the usage environment (see Fig. 17(E)). Thereby, for example, it can be suitably used even in an environment with strong external light such as outdoors on a sunny day. In this way, an image can be displayed on a personal computer.

[0248] This embodiment can be implemented in appropriate combination with at least a part of other embodiments described in this specification.

[0249] (Embodiment 6) In this embodiment, a metal oxide that can be suitably used for the channel formation region of a transistor will be described.

[0250] As the semiconductor material used for the transistor, a metal oxide having an energy gap of 2 eV or more, preferably 2.5 eV or more, more preferably 3 eV or more can be used. Typically, it is a metal oxide containing indium, etc., for example, CAC-OS described later can be used.

[0251] A transistor using a metal oxide having a wider band gap and a lower carrier density than silicon can hold the charge accumulated in the capacitive element connected in series with the transistor for a long time due to its low off-current.

[0252] The semiconductor layer can be a film represented by an In-M-Zn-based oxide containing, for example, indium, zinc, and M (a metal such as aluminum, titanium, gallium, germanium, yttrium, zirconium, lanthanum, cerium, tin, neodymium, or hafnium).

[0253] ​​​​​​​​When the metal oxide constituting the semiconductor layer is an In-M-Zn-based oxide, the atomic ratio of the metal elements of the sputtering target used to form the In-M-Zn oxide film preferably satisfies In ≥ M and Zn ≥ M. As such an atomic ratio of the metal elements of the sputtering target, In:M:Zn = 1:1:1, In:M:Zn = 1:1:1.2, In :M:Zn = 3:1:2, In:M:Zn = 4:2:3, In:M:Zn = 4:2:4. 1, In:M:Zn = 5:1:6, In:M:Zn = 5:1:7, In:M:Zn = 5: 1:8, etc. are preferable. Note that the atomic ratio of the semiconductor layer to be formed includes a variation of plus or minus 40% of the atomic ratio of the metal elements contained in the above sputtering target. As the semiconductor layer, a metal oxide film with a low carrier density is used. For example, the semiconductor layer has a carrier density of 1 × 10

[0254] / cm or less, preferably 1 × 10 17 / cm 3 or less, more preferably 1 × 10 15 / cm 3 or less, still more preferably 1 × 10 / cm 13 or less, even more preferably 1 × 10 3 / cm 11 or less, and most preferably less than 1 × 10 3 / cm , and a metal oxide with a carrier density of 1 × 10 10 / cm 3 or more can also be used. Such a metal oxide is called a high-purity intrinsic or substantially -9 / cm 3 high-purity intrinsic metal oxide. It can be said that the oxide semiconductor is a metal oxide with a low defect level density and stable characteristics. Note that the present invention is not limited to these, and depending on the required semiconductor characteristics and electrical characteristics (field effect characteristics) of the transistor

[0255] characteristics of the transistor An oxide semiconductor with an appropriate composition may be used according to the hole mobility, threshold voltage, etc. Also, In order to obtain the semiconductor characteristics of the required transistor, the carrier density, impurity concentration of the semiconductor layer, defect density, atomic number ratio of metal element to oxygen, interatomic distance, density, etc. should be made appropriate. This is preferable.

[0256] In the metal oxide constituting the semiconductor layer, if silicon or carbon, which is one of the Group 14 elements, is contained, oxygen deficiency increases in the semiconductor layer and it becomes n-type. For this reason, the concentration of silicon or carbon in the semiconductor layer (concentration obtained by secondary ion mass spectrometry) is set to 2× 10 10 18 atoms / cm 3 or less, preferably 2×10 17 atoms / cm 3 or less. This is done.

[0257] Also, when an alkali metal or alkaline earth metal combines with a metal oxide, carriers may be generated and the off-current of the transistor may increase. For this reason, the concentration of the alkali metal or alkaline earth metal obtained by secondary ion mass spectrometry in the semiconductor layer is set to 1×10 10 10 18 atoms / cm 3 or less, preferably 2×10 16 atoms / cm 3 or less.

[0258] Also, when nitrogen is contained in the metal oxide constituting the semiconductor layer, electrons as carriers are generated, the carrier density increases, and it easily becomes n-type. As a result, a transistor using a metal oxide containing nitrogen tends to have normally-on characteristics. For this reason, the nitrogen concentration obtained by secondary ion mass spectrometry in the semiconductor layer is 5×10 10 1018 atoms / cm 3 preferably the following is used.

[0259] Oxide semiconductors are classified into single-crystalline oxide semiconductors and non-single-crystalline oxide semiconductors. Non- Single-crystalline oxide semiconductors include CAAC-OS (c-axis-aligned cry stalline oxide semiconductor), polycrystalline oxide semiconductors, nc-OS (nanocrystalline oxide semiconducto r), pseudo-amorphous oxide semiconductors (a-like OS: amorphous-like oxide semiconductor), and amorphous oxide semiconductors.

[0260] In addition, CAC-OS (Cl oud-Aligned Composite oxide semiconducto r) may be used for the semiconductor layer of the transistor disclosed in one aspect of the present invention.

[0261] Note that the semiconductor layer of the transistor disclosed in one aspect of the present invention can preferably use the above-described non-single-crystalline oxidation ide semiconductor or CAC-OS. Further, as the non-single-crystalline oxide semiconductor nc-OS or CAAC-OS can be preferably used.

[0262] Note that in one aspect of the present invention, it is preferable to use CAC-OS as the semiconductor layer of the transistor. By using CAC-OS, high electrical characteristics or high reliability can be given to the transistor. endowed.

[0263] Note that the region where the semiconductor layer is CAAC-OS, the region of the polycrystalline oxide semiconductor, the region of nc-OS Among the region, the region of the pseudo-amorphous oxide semiconductor, and the region of the amorphous oxide semiconductor, two or more kinds may be a mixed film having. The mixed film may have, for example, a single-layer structure or a laminated structure including any two or more of the above-described regions.

[0264] Hereinafter, the configuration of CAC (C loud-Aligned Composite)-OS that can be used for the transistor disclosed in one aspect of the present invention will be described.

[0265] CAC-OS is, for example, a configuration of a material in which elements constituting a metal oxide are unevenly distributed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less, or in the vicinity thereof. In the following, in the metal oxide, one or more metal elements are unevenly distributed, and the region having the metal element is mixed in a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or more and 2 nm or less, or in the vicinity thereof, and this state is also referred to as a mosaic state or a patch state. 2 nm or less, or in the vicinity thereof, and this state is also referred to as a mosaic state or a patch state.

[0266] The metal oxide preferably contains at least indium. In particular, it preferably contains indium and zinc. In addition to these, one or more selected from aluminum, gallium, yttrium, lithium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, magnesium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium may be included.

[0267] For example, in In-Ga-Zn oxide, CAC-OS (among CAC-OS, In- ​​​The Ga-Zn oxide may be specifically referred to as CAC-IGZO. (hereinafter referred to as InO X1 (X1 is a real number greater than 0) or indium zinc oxide compound (hereinafter referred to as In X2 Zinc Y2 O Z2 (X2, Y2, and Z2 are real numbers greater than 0) ) and gallium oxide (GaO X3 (X3 is a real number greater than 0). ), or gallium zinc oxide (Ga X4 Zinc Y4 O Z4 (X4, Y4, and Z4 are The material is separated into mosaics, and the mosaic is created. Zinc-like InO X1 , or In X2 Zinc Y2 O Z2 The structure in which the ions are uniformly distributed in the film (see below) (Also called cloud-like.)

[0268] In other words, CAC-OS is X3 The region where In is the main component and X2 Zinc Y2 O Z2 , or InO X1 A composite metal oxide having a structure in which a region in which In this specification, for example, the atomic ratio of In to the element M in the first region is The first region has an atomic ratio of In to the element M in the second region that is greater than the atomic ratio of In in the second region. The concentration of In is higher than in the region

[0269] Note that IGZO is a common name and refers to a compound made of In, Ga, Zn, and O. A typical example is InGaO3(ZnO). m1 (m1 is a natural number), or In (1 +x0) Ga (1-x0) O3(ZnO) m0 (-1 ≦ x0 ≦ 1, m0 is an arbitrary number) and is represented by a crystalline compound.

[0270] The above crystalline compound has a single crystal structure, a polycrystalline structure, or a CAAC structure. Note that The CAAC structure is a crystal structure in which a plurality of IGZO nanocrystals have a c-axis orientation and are connected without orientation in the a-b plane and are connected without orientation.

[0271] On the other hand, CAC-OS relates to the material composition of metal oxides. CAC-OS refers to a structure in which, in a material composition containing In, Ga, Zn, and O, regions observed as nanoparticle-like with Ga as the main component in part and regions observed as nanoparticle-like with In as the main component in part are each randomly dispersed in a mosaic pattern. Therefore, in CAC-OS, the crystal structure is a secondary element. Note that CAC-OS does not include a laminated structure of two or more films with different compositions

[0272] For example, a structure composed of two layers, a film with In as the main component and a film with Ga as the main component, is not included .

[0273] Note that in the region where GaO X3 is the main component and the region where In X2 Zn Y2 O Z2 , or InO X1 is the main component, there may be cases where a clear boundary cannot be observed.

[0274] Note that instead of gallium, aluminum, yttrium, copper, vanadium, beryllium ium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum ​One or more selected from scandium, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium When one or more are included, CAC-OS is partly observed as a region mainly composed of nanoparticles of the metal element, and partly observed as a region mainly composed of In nanoparticles, and the two regions are randomly dispersed in a mosaic pattern. That is.

[0275] CAC-OS can be formed by sputtering, for example, under the condition of not heating the substrate. When forming CAC-OS by sputtering, as the film-forming gas, any one or more selected from inert gases (typically argon), oxygen gas, and nitrogen gas may be used. Also, the lower the flow rate ratio of oxygen gas to the total flow rate of the film-forming gas during film formation, the more preferable, for example, the flow rate ratio of oxygen gas is preferably 0% or more and less than 30%, more preferably 0% or more and 10% or less. That is, it is preferably 0% or more and less than 30%, more preferably 0% or more and 10% or less.

[0276] CAC-OS has the characteristic that no distinct peak is observed when measured using θ / 2θ scan by the Out-of-plane method, which is one of the X-ray diffraction (XRD) measurement methods. That is, it can be seen from the X-ray diffraction measurement that there is no orientation in the a-b plane direction and the c-axis direction of the measurement region. when measured using θ / 2θ scan by the Out-of-plane method, which is one of the X-ray diffraction (XRD) measurement methods That is, it can be seen from the X-ray diffraction measurement that there is no orientation in the a-b plane direction and the c-axis direction of the measurement region. That is, it can be seen from the X-ray diffraction measurement that there is no orientation in the a-b plane direction and the c-axis direction of the measurement region.

[0277] Also, in the electron diffraction pattern obtained by irradiating CAC-OS with an electron beam having a probe diameter of 1 nm (also referred to as a nano-beam electron beam), a region with high brightness is observed in a ring shape, and a plurality of bright spots are observed in the ring region. Therefore, from the electron diffraction pattern, CAC-OS In the electron diffraction pattern obtained by irradiating CAC-OS with an electron beam having a probe diameter of 1 nm (also referred to as a nano-beam electron beam), a region with high brightness is observed in a ring shape, and a plurality of bright spots are observed in the ring region. Therefore, from the electron diffraction pattern, CAC-OS In the electron diffraction pattern obtained by irradiating CAC-OS with an electron beam having a probe diameter of 1 nm (also referred to as a nano-beam electron beam), a region with high brightness is observed in a ring shape, and a plurality of bright spots are observed in the ring region. Therefore, from the electron diffraction pattern, CAC-OS The crystal structure has an nc (nano-crystal) structure without orientation in the planar direction and the cross-sectional direction. rystal).

[0278] For example, in CAC-OS of In-Ga-Zn oxide, by EDX mapping obtained using energy dispersive X-ray spectroscopy (EDX), regions where GaO is the main component and regions where In X3 Zn O X2 Zn Y2 O Z2 or InO X1 is the main component are unevenly distributed and mixed . It can be confirmed that it has a structure.

[0279] CAC-OS has a structure different from that of the IGZO compound in which metal elements are uniformly distributed and has properties different from those of the IGZO compound. That is, CAC-OS has a structure in which regions where GaO etc. are the main component X3 and regions where In Zn X2 O Y2 or InO Z2 is the main component are phase-separated from each other and the regions with each element as the main component are mosaic-like. X1 Here, the regions where In Zn

[0280] O X2 Zn Y2 O Z2 or InO X1 is the main component are regions with higher conductivity compared to the regions where GaO X3 etc. are the main component. That is, when carriers flow through the regions where In X2 Zn Y 2O Z2 or InO X1 is the main component, conductivity as a metal oxide is exhibited. Therefore, In ​X2 Zn Y2 O Z2 、 or InO X1 is the main component region is distributed in a cloud-like manner in the metal oxide, so that a high field-effect mobility ( μ) can be realized.

[0281] On the other hand, the region where GaO X3 etc. is the main component is a region with higher insulation compared to the region where In X2 Zn Y2 O Z2 、 or InO X 1 is the main component. That is, the region where GaO X3 etc. is the main component is distributed in the metal oxide, suppressing the leakage current and realizing a good switch ing operation.

[0282] Therefore, when CAC-OS is used in a semiconductor device, the insulation caused by GaO X3 etc. and 、 In X2 Zn Y2 O Z2 、 or InO X1 act complementarily, so that a high on-current (I ) and a high field-effect mobility (μ) can be realized. on ) and a high field-effect mobility (μ) can be achieved.

[0283] In addition, a semiconductor device using CAC-OS has high reliability. Therefore, CAC-OS is suitable for various semiconductor devices including displays.

[0284] In addition, a transistor having CAC-OS in the semiconductor layer has a high field-effect mobility and a high driving ability. Therefore, by using the transistor in a driving circuit, typically a scanning line driving circuit that generates a gate signal, a display device with a narrow border width (also referred to as a narrow border) can be provided. ​In addition, the transistor can be used in a signal line driver circuit (particularly, a signal line driver (Demultiplexer connected to the output terminal of a shift register in a drive circuit) Therefore, it is possible to provide a display device having a small number of wires connected to the display device.

[0285] In addition, the transistor with CAC-OS in the semiconductor layer is a transistor using low-temperature polysilicon. Unlike conventional transistors, no laser crystallization process is required. It is possible to reduce the manufacturing cost even for ultra-high visibility display devices. ("4K resolution", "4K2K", "4K"), Super Hi-Vision ("8K resolution" In the case of large-scale display devices with high resolution such as 1080p, 1080p, 8K4K, and 8K, By using a transistor having a CAC-OS semiconductor layer in the driver circuit and display section, This is preferable because it is possible to write in a short time and reduce display defects.

[0286] Alternatively, silicon may be used as the semiconductor in which the channel of the transistor is formed. Although amorphous silicon may be used as the silicon, it is particularly preferable to use silicon having crystallinity. For example, it is preferable to use microcrystalline silicon, polycrystalline silicon, single crystal silicon, etc. In particular, polycrystalline silicon can be formed at a lower temperature than single crystal silicon, It also has higher field effect mobility and higher reliability than amorphous silicon.

[0287] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination. [Explanation of symbols]

[0288] G1: Wiring, G2: Wiring, G3: Wiring, G3A: Wiring, S1: Wiring, V0: Wiring, 10 : Pixel, 10A: Pixel, 11: Transistor, 12: Transistor, 13: Transistor 、14: Transistor, 15: Capacitor element, 16: Capacitor element, 17: Light-emitting element, 20: Display Device, 20A: Display device, 20B: Display device, 20C: Display device, 21: Display area, 22 : Source driver, 23: Gate driver, 23a: Gate driver, 23b: Gate Driver, 23c: Gate driver, 23d: Gate driver, 24: Triangular wave generation circuit, 3 1: Transistor, 32: Transistor, 33: Transistor, 34: Capacitor element, 35: Light-emitting element, 301: Conductive layer, 303: Conductive layer, 305: Conductive layer, 311: Insulating layer, 321 : Semiconductor layer, 323: Semiconductor layer, 325: Semiconductor layer, 331: Insulating layer, 333: Insulating layer, 341: Conductive layer, 343: Conductive layer, 351: Conductive layer, 353: Conductive layer, 361: Insulating layer, 363: Insulating layer, 371: Conductive layer, 373a: Conductive layer, 373b: Conductive layer, 375: Conductive Layer, 377: Conductive layer, 379: Insulating layer, 700: Display device, 700A: Display device, 700 B: Display device, 701: Substrate, 702: Pixel section, 704: Source driver circuit section, 705 : Substrate, 706: Gate driver circuit section, 708: FPC terminal section, 710: Signal line, 71 1: Wiring section, 712: Sealing material, 716: FPC, 717: IC, 721: Source dri ver IC, 722: Gate driver circuit section, 723: FPC, 724: Printed circuit board, 73 0: Insulating film, 732: Sealing film, 743: Resin layer, 750: Transistor, 752: Tran sistor, 760: Wiring, 770: Insulating layer, 772: Conductive layer, 774: Conductive layer, 780: Dif ferent conductive film, 782: Light-emitting element, 790: Capacitor element, 791: Bump, 793: Bump, 795: Light-shielding layer, 1723: Electrode, 1724a: Electrode, 1724b: Electrode, 1726: Insulating layer, 1727: Insulating layer, 1728: Insulating layer, 1729: Insulating layer, 1741: Insulating layer, 1 742: Semiconductor layer, 1744a: Electrode, 1744b: Electrode, 1746: Electrode, 1771: Substrate, 1772: Insulating layer

Claims

[Claim 1] A method for driving a display device having a first pixel, a second pixel, a first wiring, a second wiring, and a third wiring, comprising the steps of: the first wiring is electrically connected to the first pixel and the second pixel; the second wiring is electrically connected to the first pixel; the third wiring is electrically connected to the second pixel; First display data is provided to the first pixel via the second wiring; second display data is applied to the second pixel via the third wiring; the first pixel and the second pixel start emitting light at different times; At the first time, the first pixel reaches a maximum luminance corresponding to the first display data, and the second pixel reaches a maximum luminance corresponding to the second display data; A method for driving a display device, wherein a reset signal is applied to the first wiring, so that the first pixel and the second pixel are initialized at a second time and turned off.

Images