Multilayer electronic component

Abstract

To provide a multilayer electronic component with excellent implementation stability.SOLUTION: A multilayer electronic component includes: a main body 110 including a dielectric layer 111 and internal electrodes 121 and 122 disposed alternately with the dielectric layer, a first surface and a second surface facing each other in a first direction, a third surface and a fourth surface connected to the first surface and the second surface and facing each other in a second direction, and a fifth surface and a sixth surface connected to the first to fourth surfaces and facing each other in a third direction; and external electrodes 131 and 132 including a central part C1 disposed at a center of the third surface and the fourth surface and outline parts P1 and P2 connected to the central part and disposed at outlines of the third surface and the fourth surface. The external electrode includes lower electrode layers 131a and 132a disposed at the central part and the outline part and in contact with the internal electrodes, and upper electrode layers 131b and 132b disposed in the outline part and on the lower electrode layer. When the maximum size of the central part in the second direction is Le1 and the maximum size of the outline part in the second direction is Le2, Le2>Le1 is satisfied.SELECTED DRAWING: Figure 3

Description

Technical Field

[0001] The present invention relates to a multilayer electronic component.

Background Art

[0002] A multilayer ceramic capacitor (MLCC), which is one type of multilayer electronic component, is a chip-type capacitor that is mounted on printed circuit boards of various electronic products such as liquid crystal display devices (LCDs), plasma display panel devices (PDPs), computers, smartphones, and mobile phones, and plays a role in charging or discharging electricity. Such a multilayer ceramic capacitor can be used as a component of various electronic devices due to its advantages of being small in size while ensuring high capacitance and being easy to mount.

[0003] Recently, with the miniaturization of multilayer ceramic capacitors, problems such as misalignment of the mounting position of multilayer ceramic capacitors have occurred due to the coating state of solder, the pad size of the printed circuit board, etc., making it difficult to stably mount multilayer ceramic capacitors on the printed circuit board. Therefore, there is a need for research on multilayer ceramic capacitors with excellent mounting stability.

Summary of the Invention

Problems to be Solved by the Invention

[0004] One of several objects of the present invention is to provide a multilayer electronic component with excellent mounting stability.

[0005] However, the object of the present invention is not limited to the above content and can be more easily understood in the process of explaining specific embodiments of the present invention.

Means for Solving the Problems

[0006] One embodiment of the present invention includes a dielectric layer and internal electrodes alternately arranged with the dielectric layer, a first surface and a second surface facing each other in a first direction, a third surface and a fourth surface connected to the first surface and the second surface and facing each other in a second direction, a fifth surface and a sixth surface connected to the first surface to the fourth surface and facing each other in a third direction, a main body, a central portion disposed at the center of the third surface and the fourth surface and a peripheral portion connected to the central portion and disposed on the outer periphery of the third and fourth surfaces, an external electrode, the external electrode including a lower electrode layer disposed on the central portion and the peripheral portion and in contact with the internal electrode, and an upper electrode layer disposed on the peripheral portion and on the lower electrode layer, and when a maximum size in the second direction of the central portion is Le1 and a maximum size in the second direction of the peripheral portion is Le2, a multilayer electronic component satisfying Le2>Le1 is provided.

Effects of the Invention

[0007] As one of several effects of the present invention, a multilayer electronic component excellent in mounting stability can be provided.

Brief Description of the Drawings

[0008]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Figure 10

Embodiments for Carrying Out the Invention

[0009] Hereinafter, embodiments of the present invention will be described with reference to specific embodiments and the accompanying drawings. However, the embodiments of the present invention can be modified into various other forms, and the scope of the present invention is not limited to the embodiments described below. Also, the embodiments of the present invention are provided to more fully explain the present invention to ordinary technicians. Therefore, the shape and size of elements in the drawings can be exaggerated for clearer explanation, and elements denoted by the same reference numerals in the drawings are the same elements.

[0010] And, in order to clearly explain the present invention in the drawings, parts not related to the explanation are omitted, and the size and thickness of each configuration shown in the drawings are arbitrarily shown for convenience of explanation, so the present invention is not necessarily limited to what is shown in the drawings. For components having the same function within the scope of the same idea, the same reference numerals are used for explanation. Further, throughout the specification, when a part says that a certain component "includes", this means that other components can be further included, rather than excluding other components, unless otherwise stated to the contrary.

[0011] In the drawings, the first direction can be defined as the thickness T direction, the second direction as the length L direction, and the third direction as the width W direction.

[0012] Multilayer electronic component FIG. 1 is a perspective view schematically showing a multilayer electronic component according to an embodiment of the present invention, FIG. 2 is an exploded perspective view schematically showing the main body of FIG. 1, FIG. 3 is a cross-sectional view schematically showing a cut cross-section along the line I-I' of FIG. 1, FIG. 4 is a cross-sectional view schematically showing a cut cross-section along the line II-II' of FIG. 1, FIG. 5 is a side view seen from the A direction of FIG. 3, and FIG. 8 is a cross-sectional view showing a state where a multilayer electronic component according to an embodiment of the present invention is mounted on a printed circuit board.

[0013] Hereinafter, with reference to FIGS. 1 to 5 and FIG. 8, the multilayer electronic component 100 according to an embodiment of the present invention will be described in detail. Further, as an example of the multilayer electronic component, a multilayer ceramic capacitor will be described, but the present invention is not limited thereto, and it can also be applied to various multilayer electronic components, such as inductors, piezoelectric elements, varistors, or thermistors.

[0014] The multilayer electronic component 100 according to an embodiment of the present invention can include a main body 110 including a dielectric layer 111 and internal electrodes 121 and 122, and external electrodes 131 and 132.

[0015] There is no particular limitation on the specific shape of the main body 110, but as shown in the figure, the main body 110 can have a hexahedron shape or a shape similar thereto. Due to the shrinkage of the ceramic powder contained in the main body 110 during the firing process and the polishing of the corners, the main body 110 does not have a perfect hexahedron shape with straight lines, but can have a substantially hexahedron shape.

[0016] The main body 110 can have a first surface and a second surface 1 and 2 facing each other in a first direction, a third surface and a fourth surface 3 and 4 facing each other in a second direction and connected to the first surface and the second surface 1 and 2, and a fifth surface and a sixth surface 5 and 6 facing each other in a third direction.

[0017] The main body 110 can include a dielectric layer 111 and internal electrodes 121 and 122 that are alternately arranged with the dielectric layer 111. The plurality of dielectric layers 111 forming the main body 110 are in a fired state, and the boundary between adjacent dielectric layers 111 can be integrated so as to be difficult to confirm without using a scanning electron microscope (SEM).

[0018] The average thickness of the dielectric layer 111 does not particularly need to be limited. The average thickness of the dielectric layer 111 may be, for example, 0.1 μm to 10 μm, 0.1 μm to 5 μm, 0.1 μm to 2 μm, or 0.1 μm to 0.4 μm.

[0019] The dielectric layer 111 can be formed by manufacturing a ceramic slurry containing ceramic powder, an organic solvent, and a binder, applying and drying the ceramic slurry on a carrier film to provide a ceramic green sheet, and then firing the ceramic green sheet. The ceramic powder is not particularly limited as long as sufficient capacitance can be obtained. For example, a barium titanate-based material, a lead composite perovskite-based material, or a strontium titanate-based material can be used. Examples of the ceramic powder include BaTiO3, (Ba 1-x Ca x )TiO3 (0 < x < 1) in which Ca (calcium), Zr (zirconium), etc. are partially solid-solved in BaTiO3, Ba(Ti 1-y Ca y )O3 (0 < y < 1), (Ba 1-x Ca x )(Ti 1-y Zr y )O3 (0 < x < 1, 0 < y < 1), or Ba(Ti 1-y Zr y )O3 (0 < y < 1), etc. Ethanol or the like can be used as the organic solvent, polyvinyl butyral or the like can be used as the binder, and known substances used in the art can be used as the organic solvent and the binder.

[0020] The internal electrodes 121 and 122 can include, for example, a first internal electrode 121 and a second internal electrode 122 that are alternately arranged with the dielectric layer 111 interposed therebetween. That is, the first internal electrode 121 and the second internal electrode 122, which are a pair of electrodes having different polarities from each other, can be arranged so as to face each other with the dielectric layer 111 interposed therebetween. The first internal electrode 121 and the second internal electrode 122 can be electrically separated from each other by the dielectric layer 111 disposed therebetween.

[0021] The first internal electrode 121 is spaced apart from the fourth surface 4 and can be connected to the first external electrode 131 on the third surface 3 side. The second internal electrode 122 is spaced apart from the third surface 3 and can be connected to the second external electrode 132 on the fourth surface 4 side.

[0022] The conductive metal contained in the internal electrodes 121 and 122 may be one or more of Ni, Cu, Pd, Ag, Au, Pt, Sn, W, Ti, and their alloys, and more preferably may contain Ni, but the present invention is not limited thereto.

[0023] The average thickness of the internal electrodes 121 and 122 does not particularly need to be limited. The average thickness of the internal electrodes 121 and 122 may be, for example, 0.1 μm to 5.0 μm, 0.1 μm to 3.0 μm, 0.1 μm to 1.0 μm, or 0.1 μm to 0.4 μm.

[0024] The internal electrodes 121 and 122 can be formed by applying a conductive paste for internal electrodes containing metal powder, an organic solvent, a binder, etc. on the ceramic green sheet with a predetermined thickness and then firing. As the printing method of the conductive paste for internal electrodes, a screen printing method or a gravure printing method can be used, but the present invention is not limited thereto.

[0025] The average thickness of the dielectric layer 111 and the average thicknesses of the internal electrodes 121 and 122 respectively represent the average sizes of the dielectric layer 111 and the internal electrodes 121 and 122 in the first direction. The average thickness of the dielectric layer 111 and the average thicknesses of the internal electrodes 121 and 122 can be measured by scanning the cross-sections of the main body 110 in the first and second directions with a scanning electron microscope (SEM) at a magnification of 10,000 times. More specifically, after measuring the thicknesses at a number of points on one dielectric layer 111, for example, 30 points equally spaced in the second direction, the average thickness of the dielectric layer 111 can be measured by taking the average value. Also, after measuring the thicknesses at a number of points on one internal electrode 121 or 122, for example, 30 points equally spaced in the second direction, the average thickness of the internal electrodes 121 and 122 can be measured by taking the average value. The 30 equally spaced points can be specified in the capacitance forming portion Ac. On the other hand, after measuring such average values for 10 dielectric layers 111 and 10 internal electrodes 121 and 122 respectively and then measuring the average value, the average thickness of the dielectric layer 111 and the average thicknesses of the internal electrodes 121 and 122 can be further generalized.

[0026] The main body 110 can include a capacitance forming portion Ac that is disposed inside the main body 110 and in which capacitances are formed by including first and second internal electrodes 121 and 122 that are alternately arranged with each other with the dielectric layer 111 interposed therebetween, and first and second cover portions 112 and 113 that are respectively disposed on both surfaces of the capacitance forming portion Ac facing the first direction. The cover portions 112 and 113 can basically serve to prevent damage to the internal electrodes due to physical or chemical stress. The cover portions 112 and 113 can have a configuration similar to that of the dielectric layer 111 except for not including the internal electrodes.

[0027] The average thicknesses of the cover portions 112 and 113 do not particularly need to be limited. The average thicknesses of the cover portions 112 and 113 may be, for example, 300 μm or less, 100 μm or less, 50 μm or less, or 20 μm or less, but the present invention is not limited thereto. Here, the average thicknesses of the cover portions 112 and 113 respectively represent the average thicknesses of the first cover portion 112 and the second cover portion 113.

[0028] The average thickness of the cover portions 112 and 113 can mean the average size of the cover portions 112 and 113 in the first direction, and can be a value obtained by averaging the sizes in the first direction measured at five points equally spaced in the second direction in a cross section in the first and second directions passing through the center in the third direction of the main body 110.

[0029] The main body 110 can include a first margin portion 114 and a second margin portion 115 that are respectively disposed on both surfaces facing the third direction of the capacitance forming portion Ac. That is, the margin portions 114 and 115 can mean the regions between the interfaces of the main body 110 and both ends of the internal electrodes 121 and 122 in a cross section obtained by cutting the main body 110 in the first and third directions.

[0030] The margin portions 114 and 115 can have a configuration similar to that of the dielectric layer 111, except that they do not include the internal electrodes 121 and 122. The margin portions 114 and 115 can basically serve to prevent damage to the internal electrodes 121 and 122 due to physical or chemical stress.

[0031] The average thickness of the margin portions 114 and 115 does not need to be particularly limited. The average thickness of the margin portions 114 and 115 may be 200 μm or less, 100 μm or less, 20 μm or less, or 15 μm or less, but the present invention is not limited thereto. Here, the average thickness of the margin portions 114 and 115 means the respective average thicknesses of the first margin portion 114 and the second margin portion 115.

[0032] The average thickness of the margin portions 114 and 115 can mean the average size of the margin portions 114 and 115 in the third direction, and can be a value obtained by averaging the sizes in the third direction measured at five points equally spaced in the first direction in a cross section in the first and third directions passing through the center in the second direction of the main body 110.

[0033] The margin portions 114 and 115 may be formed by applying and firing a conductive paste for internal electrodes except for the locations where the margin portions are formed on the ceramic green sheet. Alternatively, in order to suppress the step difference due to the internal electrodes 121 and 122, after cutting so that the internal electrodes 121 and 122 after lamination are exposed on the fifth and sixth surfaces 5 and 6 of the main body, a single dielectric layer or two or more dielectric layers are laminated on both surfaces facing the third direction of the capacitance forming portion Ac, whereby the margin portions 114 and 115 can also be formed.

[0034] The external electrodes 131 and 132 can be arranged on the third and fourth surfaces 3 and 4 of the main body 110 and can extend onto a part of the first, second, fifth, and sixth surfaces 1, 2, 5, and 6. The external electrodes 131 and 132 can include a first external electrode 131 connected to the first internal electrode 121 and a second external electrode 132 connected to the second internal electrode 122. In the drawings, the laminated electronic component 100 is described with a structure having two external electrodes 131 and 132, but it is not limited thereto, and the number, shape, etc. of the external electrodes 131 and 132 can be changed according to the form of the internal electrodes 121 and 122 and other purposes.

[0035] The external electrodes 131 and 132 can include central portions C1 and C2 arranged at the centers of the third and fourth surfaces 3 and 4, and outer peripheral portions P1 and P2 connected to the central portions C1 and C2 and arranged on the outer perimeters of the third and fourth surfaces 3 and 4. The external electrodes 131 and 132 can include band portions B1 and B2 extending from the outer peripheral portions P1 and P2 to a part of the first and second surfaces 1 and 2. The band portions B1 and B2 can also extend onto a part of the fifth and sixth surfaces 5 and 6 from the outer peripheral portions P1 and P2.

[0036] The first external electrode 131 can include a first central portion C1 disposed at the center of the third surface 3, a first outer portion P1 connected to the first central portion C1 and disposed on the outer periphery of the third surface 3, and a first band portion B1 extending from the first outer portion P1 to a part of the first and second surfaces 1 and 2. The second external electrode 132 can include a second central portion C2 disposed at the center of the fourth surface 4, a second outer portion P2 connected to the second central portion C2 and disposed on the outer periphery of the fourth surface 4, and a second band portion B2 extending from the second outer portion P2 to a part of the first and second surfaces 1 and 2.

[0037] According to an embodiment of the present invention, the external electrodes 131 and 132 can include lower electrode layers 131a and 132a disposed on the central portions C1 and C2 and the outer portions P1 and P2 and in contact with the internal electrodes 121 and 122, and upper electrode layers 131b and 132b disposed on the outer portions P1 and P2 and on the lower electrode layers 131a and 132a. The upper electrode layers 131b and 132b may not be disposed on the central portions C1 and C2, for example.

[0038] The first external electrode 131 can include a first lower electrode layer 131a disposed on the first central portion C1 and the first outer portion P1 and in contact with the first internal electrode 121, and a first upper electrode layer 131b disposed on the first outer portion P1 and on the first lower electrode layer 131a. The first upper electrode layer 131b may not be disposed on the first central portion C1.

[0039] The second external electrode 132 can include a second lower electrode layer 132a disposed on the second central portion C2 and the second outer portion P2 and in contact with the second internal electrode 122, and a second upper electrode layer 132b disposed on the second outer portion P2 and on the second lower electrode layer 132a. The second upper electrode layer 132b may not be disposed on the second central portion C2.

[0040] The boundary between the central portions C1, C2 and the outer portions P1, P2 can correspond to, for example, the ends of the upper electrode layers 131b, 132b adjacent to the central portions C1, C2. The boundary between the outer portions P1, P2 and the band portions B1, B2 can correspond to the ends of the upper electrode layers 131b, 132b adjacent to the band portions B1, B2. For example, referring to FIG. 3, in the cross-sections of the stacked electronic component 100 in the first direction and the second direction, the boundary between the central portions C1, C2 and the outer portions P1, P2 can correspond to one end in the first direction of the upper electrode layers 131b, 132b adjacent to the central portions C1, C2, and the boundary between the outer portions P1, P2 and the band portions B1, B2 can correspond to the other end in the first direction of the upper electrode layers 131b, 132b adjacent to the band portions B1, B2.

[0041] According to an embodiment of the present invention, the maximum size Le2 in the second direction of the outer portion may be larger than the maximum size Le1 in the second direction of the central portion. That is, Le2 > Le1 can be satisfied. The maximum size in the second direction of the first outer portion P1 may be larger than the maximum size in the second direction of the first central portion C1, and the maximum size in the second direction of the second outer portion P2 may be larger than the maximum size in the second direction of the second central portion C2.

[0042] In the case of the stacked electronic component 100 according to an embodiment of the present invention, by including the upper electrode layers 131b, 132b disposed in the outer portions P1, P2, Le2 > Le1 can be satisfied, and as a result, the size in the second direction of the outer portions P1, P2, which is the region in contact with the pads and solder of the printed circuit board, can be increased to improve the mounting stability of the stacked electronic component 100.

[0043] Referring to FIG. 8, the printed circuit board 200 on which the stacked electronic component 100 is mounted can include a plurality of pads 210, 220 disposed on one surface. The solders 230, 240 can serve to connect the plurality of pads 210, 220 and the stacked electronic component 100. Basically, the stacked electronic component 100 can be mounted on the printed circuit board 200 via the band portions B1, B2 of the external electrodes 131, 132 in contact with the solders 230, 240.

[0044] On the other hand, in the case of the stacked electronic component 100 according to an embodiment of the present invention, since the maximum size Le2 in the second direction of the outer portions P1 and P2 is larger than the maximum size Le1 in the second direction of the central portions C1 and C2, the solders 230 and 240 can contact not only the band portions B1 and B2 but also the outer portions P1 and P2. Thereby, the contact area between the stacked electronic component 100 and the solders 230 and 240 can be increased, and the mounting stability of the stacked electronic component 100 can be improved.

[0045] Further, depending on the size, shape, etc. of the outer portions P1 and P2, the solders 230 and 240 can rise along the outer portions P1 and P2, and the solders 230 and 240 can contact the surface adjacent to the central portions C1 and C2 or the central portions C1 and C2 on the outer surface of the outer portions P1 and P2. In this case, a force may be generated by the solders 230 and 240 to press the outer portions P1 and P2 in the direction in which the printed circuit board 200 is disposed. Thereby, the effect of improving the mounting stability of the stacked electronic component 100 can be further enhanced.

[0046] When Le2 > Le1 is satisfied, the shape of the outer portions P1 and P2 does not need to be particularly limited. However, in one embodiment, at least a part of the outer portions P1 and P2 can have a form that protrudes convexly outward from the central portions C1 and C2.

[0047] Referring to FIG. 3, in one embodiment, when the maximum size in the second direction of the stacked electronic component 100 measured at the central portions C1 and C2 is Lm1 and the maximum size in the second direction of the stacked electronic component 100 measured at the outer portions P1 and P2 is Lm2, 0.01 ≦ (Lm2 - Lm1) / Lm1 ≦ 0.05 can be satisfied. When (Lm2 - Lm1) / Lm1 is less than 0.01, the effect of improving the mounting stability of the present invention may be slight. When (Lm2 - Lm1) / Lm1 exceeds 0.05, the capacitance per unit volume of the stacked electronic component 100 may decrease.

[0048] Referring to FIG. 5, in one embodiment, when the maximum size in the first direction of the stacked electronic component is Tm and the size in the first direction of the central portion is Tc, the ratio of Tc to Tm (Tc / Tm) may exceed 0. More preferably, the ratio of Tc to Tm (Tc / Tm) may be 0.5 or more. If Tc / Tm is less than 0.5, the solder may rise along the outer portion and it may be difficult to contact the central portion. The upper limit of Tc / Tm does not particularly need to be limited and may be less than 1.

[0049] The lower electrode layers 131a and 132a can be arranged to extend from the outer portions P1 and P2 to the band portions B1 and B2. In one embodiment, the ends of the lower electrode layers 131a and 132a can be arranged in the band portions B1 and B2. For example, the first lower electrode layer 131a can be arranged to extend from the first outer portion P1 to the first band portion B1, so that the end of the first lower electrode layer 131a can be arranged in the first band portion B1. The second lower electrode layer 132a can be arranged to extend from the second outer portion P2 to the second band portion B2, so that the end of the second lower electrode layer 132a can be arranged in the second band portion B2.

[0050] In one embodiment, the lower electrode layers 131a and 132a can have a maximum thickness at the central portions C1 and C2 and a minimum thickness at the outer portions P1 and P2. The lower electrode layers 131a and 132a can have a maximum thickness, for example, at the center in the first direction of the central portions C1 and C2. The lower electrode layers 131a and 132a can have a minimum thickness, for example, at the rounded corners of the body 110. Due to the lower electrode layers 131a and 132a, the central portions C1 and C2 of the external electrodes 131 and 132 can have a convex form on the outside.

[0051] The lower electrode layers 131a and 132a can be formed, for example, by dipping the third and fourth surfaces 3 and 4 of the main body 110 into a conductive paste for the lower electrode layer containing metal powder, glass, binder, organic solvent, etc. and then firing. That is, the lower electrode layers 131a and 132a may be fired electrodes containing, for example, metal and glass. The metal contained in the lower electrode layers 131a and 132a can include one or more of Cu, Ni, Pd, Pt, Au, Ag, Pb, and their alloys, but the present invention is not limited thereto.

[0052] When Le2 > Le1, the types of the upper electrode layers 131b and 132b do not need to be particularly limited. In one embodiment, the upper electrode layers 131b and 132b can include metal and glass. That is, the upper electrode layers 131b and 132b may be fired electrodes containing metal and glass. When the upper electrode layers 131b and 132b are fired electrodes, the metal contained in the upper electrode layers 131b and 132b can include one or more of Cu, Ni, Pd, Pt, Au, Ag, Pb, and their alloys, but the present invention is not limited thereto.

[0053] In one embodiment, the upper electrode layers 131b and 132b can include metal and resin. That is, the upper electrode layers 131b and 132b may be resin electrodes containing metal and resin. When the upper electrode layers 131b and 132b are resin electrodes, the metal contained in the upper electrode layers 131b and 132b can include one or more of Cu, Ni, Ag, Pd, Sn, and their alloys, but the present invention is not limited thereto. The resin contained in the upper electrode layers 131b and 132b may be an epoxy resin and / or an acrylic resin, but the present invention is not limited thereto.

[0054] When Le2 > Le1 is satisfied, the shapes of the upper electrode layers 131b and 132b do not need to be particularly limited. In one embodiment, the upper electrode layers 131b and 132b may not cover the ends of the lower electrode layers 131a and 132a disposed in the band portions B1 and B2. In order to improve the mounting stability of the stacked electronic component 100 and prevent the maximum size of the stacked electronic component 100 in the first direction from increasing and the capacitance per unit volume from decreasing, the upper electrode layers 131b and 132b may not be disposed in the band portions B1 and B2, for example. Even if a part of the upper electrode layers 131b and 132b extends from the outer peripheral portions P1 and P2 to the band portions B1 and B2 and is disposed, it is preferable that the upper electrode layers 131b and 132b do not cover the ends of the lower electrode layers 131a and 132a.

[0055] Referring to FIGS. 3 and 5, in one embodiment, the upper electrode layers 131b and 132b may include a first electrode layer 131b1 and 132b1 disposed on one end portion in the first direction of the third surface and the fourth surface 3 and 4, and a second electrode layer 131b2 and 132b2 disposed on the other end portion in the first direction of the third surface and the fourth surface 3 and 4. For example, the first upper electrode layer 131b may include a first-1 electrode layer 131b1 disposed on one end portion in the first direction of the third surface 3 and a second-1 electrode layer 131b1 disposed on the other end portion in the first direction of the third surface 3, and the second upper electrode layer 132b may include a first-2 electrode layer 132b1 disposed on one end portion in the first direction of the fourth surface 4 and a second-2 electrode layer 132b2 disposed on the other end portion in the first direction of the fourth surface 4.

[0056] The first electrode layers 131b1 and 132b1 and the second electrode layers 131b2 and 132b2 are disposed apart from each other and may extend in the third direction. The first-1 electrode layer 131b1 and the second-1 electrode layer 131b2 are disposed apart from each other and may extend in the third direction, and the first-2 electrode layer 132b1 and the second-2 electrode layer 132b2 are disposed apart from each other and may extend in the third direction.

[0057] FIG. 9 is a plan view showing a state in which a pattern for an upper electrode layer for forming an upper electrode layer of a multilayer electronic component according to an embodiment of the present invention is printed on a surface plate, and FIG. 10 is a side view schematically showing a process of forming an upper electrode layer of a multilayer electronic component according to an embodiment of the present invention.

[0058] With reference to FIGS. 9 and 10, an example of a method for forming the upper electrode layers 131b and 132b will be described. Referring to FIG. 9, a plurality of patterns 30 for upper electrode layers can be printed on the surface plate 40. The pattern 30 for the upper electrode layer can be formed, for example, by printing a conductive paste containing metal powder, glass, a binder, an organic solvent, etc. using a screen printing method or the like. Alternatively, the pattern 30 for the upper electrode layer can also be formed by printing a conductive resin composition containing metal powder, resin, a binder, an organic solvent, etc. using a screen printing method or the like.

[0059] Referring to FIG. 10, the main body 110 on which the lower electrode layers 131a and 132a are formed can be attached to the first stainless steel plate 10 using the UV tape 20. That is, the second lower electrode layer 132a can be adhered to the first stainless steel plate 10 by the UV tape 20. Then, by pressing the stainless steel plate 10 against the surface plate 40, the pattern 30 for the upper electrode layer is attached to the first lower electrode layer 131a, and the pattern 30 for the upper electrode layer attached to the first lower electrode layer 131a is dried.

[0060] Next, although not shown in the figure, the first lower electrode layer 131a to which the pattern 30 for the upper electrode layer is attached on the opposite side of the second lower electrode layer 132a is adhered to a second stainless steel plate (not shown) by the UV tape, and the UV tape 20 attached to the second lower electrode layer 132a is removed by a UV transfer device. Then, after the pattern for the upper electrode layer is attached and dried on the second lower electrode layer 132a in the same manner, the UV tape attached to the first lower electrode layer 131a side is removed by a UV transfer device.

[0061] Thereafter, the upper electrode layer patterns 30 attached on the first and second lower electrode layers 131a and 132a can be fired at a temperature of 700°C to 900°C to form the upper electrode layers 131b and 132b.

[0062] On the other hand, although not shown in the figure, the external electrodes 131 and 132 can further include an external plating layer disposed on the lower electrode layers 131a and 132a and the upper electrode layers 131b and 132b. The external plating layer can contact the lower electrode layers 131a and 132a at the central portions C1 and C2, contact the upper electrode layers 131b and 132b at the outer peripheral portions P1 and P2, and contact the lower electrode layers 131a and 132a at the band portions B1 and B2.

[0063] The type of the external plating layer is not particularly limited, and it may be a plating layer including Ni, Sn, Pd, and / or an alloy containing them, or may be formed of a plurality of layers. The external plating layer may be, for example, a Ni plating layer or a Sn plating layer, or may be in a form in which a Ni plating layer and a Sn plating layer are sequentially formed. Further, the external plating layer may include a plurality of Ni plating layers and / or a plurality of Sn plating layers.

[0064] On the other hand, the size of the multilayer electronic component 100 does not need to be particularly limited. However, as described above, the smaller the multilayer electronic component 100 is, the more likely it is that a defect of displacement of the mounting position of the multilayer electronic component 100 will occur significantly. Thereby, when the multilayer electronic component 100 has a size of 0603 standard (maximum size in the second direction: 0.6 mm ± 0.03 mm, maximum size in the third direction: 0.3 mm ± 0.03 mm) or less, the effect of improving the mounting stability according to the present invention can be more remarkable. Therefore, in one embodiment, the maximum size of the multilayer electronic component 100 in the second direction can be 0.63 mm or less, and the maximum size of the multilayer electronic component 100 in the third direction can be 0.33 mm or less.

[0065] FIG. 6 is a modification of FIG. 5. FIG. 6 is a side view showing the first external electrode side. Since the first external electrode and the second external electrode are in a symmetric relationship with respect to the second direction and their configurations are substantially the same, the following description is regarded as including all descriptions for the first external electrode and the second external electrode.

[0066] In one embodiment, the upper electrode layer may be disposed on the corners of the third surface and the fourth surfaces 3 and 4 and include first to fourth corner electrode layers spaced apart from each other. The upper electrode layer may be disposed on the corners of the outer contour portion and include first to fourth corner electrode layers spaced apart from each other.

[0067] For example, referring to FIG. 6, the first upper electrode layer 131b' may be disposed on the corner of the third surface and include first to fourth corner electrode layers 131b1', 131b2', 131b3', and 131b4' spaced apart from each other. The first upper electrode layer 131b' may be disposed on the corner of the first outer contour portion P1 and include first to fourth corner electrode layers 131b1', 131b2', 131b3', and 131b4' spaced apart from each other.

[0068] Although not shown, the second upper electrode layer may be disposed on the corner of the fourth surface and include first to fourth corner electrode layers spaced apart from each other. The second upper electrode layer may be disposed on the corner of the second outer contour portion and include first to fourth corner electrode layers spaced apart from each other.

[0069] Referring to FIG. 6, in one embodiment, when the maximum size of the stacked electronic component in the third direction is Wm, and the minimum distance in the third direction between the first corner electrode layer 131b1' and the second corner electrode layer 131b2', or the minimum distance in the third direction between the third corner electrode layer 131b3' and the fourth corner electrode layer 131b4' is We, the ratio (We / Wm) of We to Wm may be 0.8 or less. When We / Wm exceeds 0.8, the effect of improving the mounting stability of the present invention may be slight. The lower limit of We / Wm does not need to be particularly limited and may be more than 0.

[0070] On the other hand, the first upper electrode layer 131b' can be formed by adhering a pattern 30' for the upper electrode layer printed on a flat plate 40 shown in FIG. 9 onto the lower electrode layer 131a and then drying and firing it.

[0071] FIG. 7 is a modified example of FIG. 5. It is a side view showing the first external electrode side. Since the first external electrode and the second external electrode are in a symmetric relationship with respect to the second direction and their configurations are substantially the same, the following description is regarded as including all descriptions regarding the first external electrode and the second external electrode.

[0072] In one embodiment, the upper electrode layer can be arranged to surround the central portion. For example, referring to FIG. 7, the first upper electrode layer 131b'' may be arranged to surround the first central portion C1. The first upper electrode layer 131b'' can be arranged to cover the outer contour portion P1.

[0073] On the other hand, the first upper electrode layer 131b'' can be formed by adhering a pattern 30'' for the upper electrode layer printed on a flat plate 40 shown in FIG. 9 onto the lower electrode layer 131a and then drying and firing it.

[0074] (Experimental Example) After manufacturing a ceramic slurry by mixing BaTiO3 powder, an organic solvent such as ethanol, and a binder such as polyvinyl butyral, the ceramic slurry was applied and dried on a carrier film to provide a ceramic green sheet. Next, a conductive paste for the internal electrode containing Ni powder, an organic solvent, a binder, etc. was applied on the ceramic green sheet with a predetermined thickness to form an internal electrode pattern.

[0075] Thereafter, the ceramic green sheets on which the internal electrode patterns were formed were laminated in dozens to hundreds of layers, and then pressure-bonded and cut, and then fired at a temperature of 1100°C or higher and 1200°C or lower to form a main body.

[0076] Next, after dipping the third and fourth surfaces of the main body into the conductive paste for the lower electrode layer containing Cu powder, glass, binder, organic solvent, etc., it was fired at a temperature of 700°C to 900°C to form the lower electrode layer.

[0077] After that, the main body with the lower electrode layer formed was attached to the stainless-steel plate using a UV tape, and the stainless-steel plate was pressed against the surface plate printed with the pattern for the upper electrode layer. The pattern for the upper electrode layer was formed by printing a conductive paste containing Cu powder, glass, binder, organic solvent, etc. on the surface plate. Then, after drying the pattern for the upper electrode layer attached on the lower electrode layer, the upper electrode layer was formed by firing at a temperature of 700°C to 900°C.

[0078] Next, an Ni plating layer and an Sn plating layer were formed on the lower electrode layer and the upper electrode layer to provide a sample chip. The size of the sample chip was fabricated according to the 0603 standard (size in the second direction: about 0.6 mm, size in the third direction: about 0.3 mm).

[0079] After that, 100 sample chips per sample number were mounted on the printed circuit board. At this time, the sample chips were mounted on the pads of the printed circuit board using solder, but the mounting failure rate of the sample chips was judged by artificially applying solder with a 0.2 mm shift in the second direction from the pads of the printed circuit board.

[0080] The sample chips of sample numbers 2 to 5 below were fabricated in the same manner as each other, but only the difference between the maximum size Lm1 in the second direction of the sample chip measured at the central part and the maximum size Lm2 in the second direction of the sample chip measured at the outer part was made different. For sample number 1 below, the maximum size Lm1 in the second direction of the sample chip measured at the central part and the maximum size Lm2 in the second direction of the sample chip measured at the outer part were the same.

[0081]

Table 1

[0082] Referring to Table 1 above, it can be confirmed that Sample Numbers 2 to 5 are superior in mounting stability compared to Sample Number 1. This is presumably because the contact area between the sample chip and the solder increased due to the increase in Lm2 compared to Lm1. In particular, when (Lm2 - Lm1) / Lm1 is 0.01 or more, it can be confirmed that the mounting defect rate decreases rapidly.

[0083] The sample chips of Sample Numbers 7 to 11 below were fabricated in the same manner as each other, and the upper electrode layer has the form shown in FIG. 6. For Sample Numbers 7 to 11, the ratio (We / Wm) of the minimum distance We in the third direction between the first corner electrode layer and the second corner electrode layer to the maximum size Wm of the sample chip in the third direction was different from each other.

[0084] Unlike Sample Numbers 7 to 11, the upper electrode layer of Sample Number 6 has the form shown in FIG. 5. Therefore, the above We was denoted as 0. Unlike Sample Numbers 6 to 11, Sample Number 12 omitted the step of forming the upper electrode layer on the outer portion. Therefore, the above We was denoted as 1.

[0085]

Table 2

[0086] Referring to Table 2 above, it can be confirmed that Sample Numbers 6 to 11 are superior in mounting stability compared to Sample Number 12. This is presumably because, since the external electrode includes the upper electrode layer, the maximum size Le2 in the second direction of the outer portion becomes larger than the maximum size Le1 in the second direction of the central portion, and as a result, the contact area between the sample chip and the solder increased. In particular, referring to Sample Numbers 7 to 11, when the above We / Wm is 0.8 or less, it can be confirmed that the mounting defect rate decreases rapidly.

[0087] The present invention is not limited by the above-described embodiments and the accompanying drawings, but is limited by the appended claims. Therefore, various forms of substitution, modification, and change are possible by those having ordinary knowledge in the technical field within the scope not departing from the technical idea of the present invention described in the claims, and it can be said that these also belong to the scope of the present invention.

[0088] In addition, the expression "one embodiment" does not mean the same embodiment as each other, but is provided to emphasize and explain each different unique feature. However, it does not exclude that the above-presented one embodiment is implemented in combination with the features of another one embodiment. For example, even if the matter described in a specific one embodiment is not described in another one embodiment, it can be understood as being related to the description of the other one embodiment as long as there is no description contrary to or inconsistent with that matter in the other one embodiment.

[0089] Also, expressions such as "first", "second" are used to distinguish one component from another component, and do not limit the order and / or importance, etc. of the said component. In some cases, within the scope not departing from the scope of rights, the first component may be named the second component, and similarly the second component may be named the first component.

Description of Reference Numerals

[0090] 100: Multilayer electronic component 110: Body 111: Dielectric layer 112, 113: Cover part 114, 115: Margin part 121, 122: Internal electrode 131, 132: External electrode 131a, 132a: Lower electrode layer 131b, 132b: Upper electrode layer C1, C2: Central part P1, P2: Outer part B1, B2: Band part 200: Printed circuit board 210, 220: Pads 230, 240: Solder

Claims

1. A main body including a dielectric layer and internal electrodes arranged alternately with the dielectric layer, having a first surface and a second surface facing each other in a first direction, a third surface and a fourth surface connected to the first surface and the second surface and facing each other in a second direction, and a fifth surface and a sixth surface connected to the first surface to the fourth surface and facing each other in a third direction; An external electrode including a central portion disposed at the center of the third surface and the fourth surface, and an outer portion connected to the central portion and disposed on the outer periphery of the third surface and the fourth surface; The external electrode includes a lower electrode layer disposed in the central portion and the outer portion and in contact with the internal electrode, and an upper electrode layer disposed in the outer portion and on the lower electrode layer; A multilayer electronic component, where when the maximum size of the central portion in the second direction is Le1 and the maximum size of the outer portion in the second direction is Le2, Le2 > Le1 is satisfied.

2. The multilayer electronic component according to Claim 1, wherein the boundary between the central portion and the outer portion corresponds to the end of the upper electrode layer adjacent to the central portion.

3. The external electrode includes a band portion extending from the outer portion onto a part of the first surface and the second surface; The multilayer electronic component according to Claim 1, wherein the end of the lower electrode layer is disposed in the band portion.

4. The multilayer electronic component according to Claim 3, wherein the upper electrode layer does not cover the end of the lower electrode layer.

5. The multilayer electronic component according to Claim 1, where when the maximum size of the multilayer electronic component in the second direction measured at the central portion is Lm1 and the maximum size of the multilayer electronic component in the second direction measured at the outer portion is Lm2, 0.01 ≦ (Lm2 - Lm1) / Lm1 ≦ 0.05 is satisfied.

6. The multilayer electronic component according to Claim 2, where when the maximum size of the multilayer electronic component in the first direction is Tm and the size of the central portion in the first direction is Tc, the ratio of Tc to Tm (Tc / Tm) is 0.5 or more.

7. The multilayer electronic component according to Claim 1, wherein the lower electrode layer has a maximum thickness at the central portion and a minimum thickness at the outer portion.

8. The upper electrode layer includes a first electrode layer disposed on one end portion of the third surface and the fourth surface in the first direction, and a second electrode layer disposed on the other end portion of the third surface and the fourth surface in the first direction; The multilayer electronic component according to Claim 1, wherein the first and second electrode layers are spaced apart from each other and extend in the third direction.

9. The laminated electronic component according to claim 1, wherein the upper electrode layer is disposed on the corners of the third surface and the fourth surface and includes first to fourth corner electrode layers spaced apart from each other.

10. The laminated electronic component according to claim 9, where the maximum size of the laminated electronic component in the third direction is Wm, and the minimum distance in the third direction between the first corner electrode layer and the second corner electrode layer, or the minimum distance in the third direction between the third corner electrode layer and the fourth corner electrode layer is We, the ratio (We / Wm) of We to Wm is 0.8 or less.

11. The laminated electronic component according to claim 1, wherein the upper electrode layer is disposed so as to surround the central portion.

12. The laminated electronic component according to claim 1, wherein the upper electrode layer contains metal and glass.

13. The laminated electronic component according to claim 1, wherein the upper electrode layer contains metal and resin.

14. The laminated electronic component according to claim 1, wherein at least a part of the outer peripheral portion protrudes convexly outward from the central portion.

15. The laminated electronic component according to claim 14, wherein the central portion is convex outward.

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