Inter prediction in geometric partitioning with adaptive number of regions

By geometrically partitioning video blocks into regions and using adaptive motion vector prediction, the decoder improves video compression efficiency and quality while reducing encoding complexity.

JP2025100894APending Publication Date: 2025-07-03OP SOLUTIONS
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Patent Information

Application Number
JP2025072098
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2019-01-28
Filing Date
2025-04-24
Publication Date
2025-07-03

AI Technical Summary

Technical Problem

Existing video compression technologies face challenges in accurately reconstructing original video quality due to irreversible compression, leading to lower quality decompressed video and inefficiencies in data usage, encoding complexity, and sensitivity to errors.

Method used

Implementing a decoder that geometrically partitions a current block into multiple regions, determines motion vectors for each region, and constructs a candidate list to enhance inter prediction, using advanced motion vector prediction and merge modes to improve compression efficiency.

Benefits of technology

This approach reduces motion compensation prediction errors, lowers complexity, and enhances compression efficiency by allowing more accurate video reconstruction and reduced residuals.

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Abstract

To provide favorable inter prediction in geometric partitioning with an adaptive number of regions.SOLUTION: A decoder includes circuitry configured to: receive a bitstream; partition a current block via a geometric partitioning mode into first, second and third regions; determine a motion vector associated with the first, second or third portion, where the determining step further includes constructing a candidate list; and decode the current block using the determined motion vector. Related devices, systems, techniques and articles are also described.SELECTED DRAWING: Figure 11
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Description

Technical Field

[0001] This application claims the benefit of priority of U.S. Provisional Patent Application No. 62 / 797,820, filed on Jan. 28, 2019, entitled "INTER PREDICTION IN GEOMETRIC PARTITIONING WITH AN ADAPTIVE NUMBER OF REGIONS", which is incorporated herein by reference in its entirety.

[0002] The present invention generally relates to the field of video compression. Specifically, the present invention is directed to inter prediction in geometric partitioning with an adaptive number of regions.

Background Art

[0003] A video codec may include an electronic circuit or software for compressing or decompressing digital video. It can convert uncompressed video into a compressed format and vice versa. In the context of video compression, a device that compresses video (and / or performs some of its functions) may typically be referred to as an encoder, and a device that decompresses video (and / or performs some of its functions) may be referred to as a decoder.

[0004] The format of the compressed data can conform to standard video compression specifications. Compression can be irreversible in that the compressed video lacks some information that was present in the original video. This can include the fact that the decompressed video may have lower quality than the original uncompressed video because there is not enough information to accurately reconstruct the original video.

[0005] There can be a complex relationship between video quality, the amount of data used to represent the video (e.g., determined by the bit rate), the complexity of the encoding and decoding algorithms, the sensitivity to data loss and errors, the ease of editing, random access, end-to-end latency (e.g., waiting time), and equivalents. Summary of the Invention Means for Solving the Problems

[0006] In one aspect, a decoder includes a circuit, the circuit being configured to receive a bitstream, divide a current block into a first region, a second region, and a third region via a geometric partitioning mode, determine a motion vector associated with one of the first region, the second region, and the third region, the determining further including constructing a candidate list, and decode the current block using the determined motion vector.

[0007] In another aspect, a method includes a decoder receiving a bitstream. The method includes the decoder dividing a current block into a first region, a second region, and a third region via a geometric partitioning mode. The method includes the decoder determining a motion vector associated with one of the first region, the second region, and the third region, the determining including constructing a candidate list. The method includes the decoder decoding the current block using the determined motion vector.

[0008] Details of one or more variations of the subject matter described herein are set forth in the accompanying drawings and the description below. Other features and advantages of the subject matter described herein will be apparent from the description and drawings, and from the claims. The present invention provides, for example, the following. (Item 1) A decoder, the decoder comprising a circuit, the circuit being Receiving a bitstream, Dividing a current block into a first region, a second region, and a third region via a geometric partitioning mode, Determining a motion vector associated with one of the first region, the second region, and the third region, the determining further including constructing a candidate list, Decoding the current block using the determined motion vector A decoder configured to perform the above. (Item 2) Constructing the candidate list includes evaluating a bottom - left candidate, a left candidate, a top - left candidate, a top candidate, and a top - right candidate, the decoder according to Item 1. (Item 3) The determined motion vector is for the first region, The geometric partitioning mode includes a line segment between a first luma location and a second luma location, The bottom - left candidate is located at a third luma location immediately to the left and directly below the second luma location, The left candidate is located at a fourth luma location immediately to the left of the second luma location, The top - left candidate is located at a fifth luma location immediately above and to the left of the top - leftmost luma location of the first region, The top candidate is located at a sixth luma location directly above the first luma location, The top - right candidate is located at a seventh luma location directly above and to the right of the first luma location, the decoder according to Item 2. (Item 4) The determined motion vector is for the second region, The geometric partitioning mode includes a line segment between a first luma location and a second luma location, The bottom - left candidate is located at a third luma location immediately to the left and directly below the bottom - leftmost luma location of the third region, The left candidate is located at a fourth luma location immediately to the left of the bottom - leftmost luma location of the third region, The upper left candidate is located at a fifth luma location directly above the first location. The upper candidate is located at a sixth luma location directly above the top rightmost luma location of the second region. The upper right candidate is located at a seventh luma location directly above and to the right of the top rightmost luma location of the second region, the decoder according to item 2. (Item 5) The determined motion vector relates to the third region. The geometric partitioning mode includes a line segment between a first luma location and a second luma location. The lower left candidate is located at a third luma location immediately to the left and directly below the bottom leftmost luma location of the third region. The left candidate is located at a fourth luma location immediately to the left of the bottom leftmost luma location of the third region. The upper left candidate is located at a fifth luma location at the same position as the first region. The upper candidate is located at a sixth luma location immediately to the left of the second location. The upper right candidate is located at a seventh luma location juxtaposed with the second region, the decoder according to item 2. (Item 6) The determined motion vector relates to the second region, and the decoder is further configured to mark the candidate as unavailable in response to determining that the candidate is at the same position as the third region, the decoder according to item 2. (Item 7) The determined motion vector relates to the second region. The decoder is further configured to automatically mark the upper left candidate as unavailable in response to determining that the geometric partitioning mode is enabled, the decoder according to item 2. (Item 8) The determined motion vector relates to the third region. The decoder according to item 2, further configured to automatically mark the upper right candidate as unavailable in response to determining that the geometric partitioning mode is enabled. (Item 9) The determined motion vector relates to the third region, The decoder according to item 2, further configured to automatically mark the upper left candidate as unavailable in response to determining that the geometric partitioning mode is enabled. (Item 10) The decoder according to item 1, further configured to determine that the merge mode is enabled for the first region. (Item 11) The decoder according to item 1, further configured to determine that the high motion vector prediction mode is enabled for the first region. (Item 12) The decoder according to item 1, further configured to reconstruct the pixel data of the current block. (Item 13) The decoder according to item 12, wherein the first region and the second region are non-rectangular. (Item 14) The decoder according to item 1, wherein the geometric partitioning mode is signaled in the bitstream. (Item 15) Dividing the current block into the first region, the second region, and the third region via the geometric partitioning mode includes dividing the current block using line segments characterized by a first luma location and a second luma location. The decoder according to item 1. (Item 16) Determining whether the geometric partitioning mode is enabled, Determining a first line segment for the current block, Determining a second line segment for the current block, and further configured to perform decoding of the current block includes reconstructing pixel data using the first line segment and the second line segment, the decoder according to item 1, wherein the first line segment and the second line segment divide the current block into the first region, the second region, and the third region. (Item 17) the decoder according to item 1, wherein the geometric partitioning mode is available for block sizes of 64×64 luma samples or more, or 128×128 luma samples or more. (Item 18) an entropy decoder processor configured to receive the bitstream and decode the bitstream into quantized coefficients, an inverse quantization and inverse transform processor configured to process the quantized coefficients, including performing an inverse discrete cosine transform, a deblocking filter, a frame buffer, and an intra prediction processor the decoder according to item 1, further comprising. (Item 19) the decoder according to item 1, wherein the bitstream includes a parameter indicating whether the geometric partitioning mode is enabled for the current block. (Item 20) the decoder according to item 1, wherein the current block forms part of a quad tree plus binary decision tree. (Item 21) the decoder according to item 20, wherein the current block is a non-leaf node of the quad tree plus binary decision tree. (Item 22) the decoder according to item 1, wherein the current block is a coding tree unit or a coding unit. (Item 23) The decoder according to item 1, wherein the first region is a coding unit or a prediction unit. (Item 24) A method, the method comprising: the decoder receiving a bitstream; the decoder dividing a current block into a first region, a second region, and a third region via a geometric partitioning mode; the decoder determining a motion vector associated with one of the first region, the second region, and the third region, the determining including constructing a candidate list; the decoder decoding the current block using the determined motion vector; A method including the above. (Item 25) The method according to item 24, wherein constructing the candidate list includes evaluating a bottom-left candidate, a left candidate, a top-left candidate, a top candidate, and a top-right candidate. (Item 26) The determined motion vector relates to the first region; the geometric partitioning mode includes a line segment between a first luma location and a second luma location; the bottom-left candidate is located at a third luma location immediately below and to the left of the second luma location; the left candidate is located at a fourth luma location immediately to the left of the second luma location; the top-left candidate is located at a fifth luma location immediately above and to the left of the top-left most luma location of the first region; the top candidate is located at a sixth luma location immediately above the first luma location; The method according to item 25, wherein the top-right candidate is located at a seventh luma location immediately above and to the right of the first luma location. (Item 27) The determined motion vector relates to the second region; the geometric partitioning mode includes a line segment between a first luma location and a second luma location; The lower left candidate is located at a third luma location that is immediately to the left and directly below the lowermost left luma location in the third region. The left candidate is located at a fourth luma location that is immediately to the left of the lowermost left luma location in the third region. The upper left candidate is located at a fifth luma location that is directly above the first location. The upper candidate is located at a sixth luma location that is directly above the uppermost right luma location in the second region. The upper right candidate is located at a seventh luma location that is directly above and to the right of the uppermost right luma location in the second region, the method according to item 25. (Item 28) The determined motion vector relates to the third region. The geometric partitioning mode includes a line segment between a first luma location and a second luma location. The lower left candidate is located at a third luma location that is immediately to the left and directly below the lowermost left luma location in the third region. The left candidate is located at a fourth luma location that is immediately to the left of the lowermost left luma location in the third region. The upper left candidate is located at a fifth luma location that is in the same position as the first region. The upper candidate is located at a sixth luma location that is immediately to the left of the second location. The upper right candidate is located at a seventh luma location that is in the same position as the second region, the method according to item 25. (Item 29) The determined motion vector relates to the second region, and further includes marking the candidate as unavailable in response to determining that the candidate is in the same position as the third region, the method according to item 25. (Item 30) The determined motion vector relates to the second region, and further includes automatically marking the upper left candidate as unavailable in response to determining that the geometric partitioning mode is enabled, the method according to item 25. (Item 31) The determined motion vector relates to the third region, and further includes automatically marking the upper right candidate as unavailable in response to determining that the geometric partitioning mode is enabled, the method according to item 25. (Item 32) The determined motion vector relates to the third region, and further includes automatically marking the upper left candidate as unavailable in response to determining that the geometric partitioning mode is enabled, the method according to item 25. (Item 33) The method according to item 24, further including determining that the merge mode is enabled for the first region. (Item 34) The method according to item 24, further including determining that the advanced motion vector prediction mode is enabled for the first region. (Item 35) The method according to item 24, further including reconstructing the pixel data of the current block. (Item 36) For each of the first region and the second region, the method according to item 24, wherein each is non-rectangular. (Item 37) The method according to item 24, wherein the geometric partitioning mode is signaled within the bitstream. (Item 38) Dividing the current block into the first region, the second region, and the third region via the geometric partitioning mode includes dividing the current block using line segments characterized by a first luma location and a second luma location, the method according to item 24. (Item 39) Determining whether the geometric partitioning mode is enabled, Determining a first line segment for the current block, Determining a second line segment for the current block and further including, The decoding of the current block includes reconstructing pixel data using the first line segment and the second line segment. The first line segment and the second line segment are as described in item 24, which divide the current block into the first region, the second region, and the third region. (Item 40) The geometric partitioning mode is available for block sizes of 64×64 luma samples or more, or 128×128 luma samples or more, as described in item 24. (Item 41) The decoder further An entropy decoder processor configured to receive the bitstream and decode the bitstream into quantized coefficients, An inverse quantization and inverse transform processor configured to process the quantized coefficients, including performing an inverse discrete cosine transform, A deblocking filter, A frame buffer, An intra prediction processor and is provided, as described in item 24. (Item 42) The bitstream includes a parameter indicating whether the geometric partitioning mode is enabled for the current block, as described in item 24. (Item 43) The current block forms part of a quad tree plus binary decision tree, as described in item 24. (Item 44) The current block is a non-leaf node of the quad tree plus binary decision tree, as described in item 43. (Item 45) The current block is a coding tree unit or a coding unit, as described in item 24. (Item 46) The method according to item 24, wherein the first region is a coding unit or a prediction unit.

Brief Description of the Drawings

[0009] For the purpose of illustrating the present invention, the drawings show aspects of one or more embodiments of the present invention. However, it should be understood that the present invention is not limited to the precise arrangements and means shown in the drawings.

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[0022] The drawings are not necessarily to scale and may be illustrated by imaginary lines, schematic representations, and partial views. In some instances, details that are not necessary for an understanding of the embodiments or details that render other details difficult to perceive may be omitted. Like reference symbols in the various drawings indicate like elements.

DETAILED DESCRIPTION OF THE INVENTION

[0023] Some implementations of the present subject matter include performing inter prediction using regions divided using a geometric partitioning mode with an adaptable number of regions where a rectangular block can be divided into three or more non-rectangular regions. Performing inter prediction using non-rectangular blocks divided using geometric partitioning with an adaptable number of regions allows the division to follow closer to object boundaries and can result in lower motion compensation prediction errors, smaller residuals, and thus improved compression efficiency. During inter prediction, motion compensation can be performed using predicted motion vectors for blocks (e.g., coding units, prediction units, etc.) determined according to the geometric partitioning mode. The motion vectors can be predicted using advanced motion vector prediction (AMVP) and / or via a merge mode, and the motion vectors are selected from a list of motion vector candidates without encoding the motion vector difference.

[0024] The present subject matter can be applied to relatively large blocks such as blocks having a size of 128×128 or 64×64, for example. In some implementations, the geometric partitioning can involve dividing a current block into an adaptable number of regions such as three or more regions with respect to a given current block, and motion information can be determined for each region.

[0025] Motion compensation may include an approach for predicting a video frame or a portion thereof based on previous and / or future frames by taking into account the motion of a camera and / or objects in the video. This may be employed in the encoding and decoding of video data for video compression, for example, in encoding and decoding using the Moving Picture Experts Group (MPEG)-2 (also referred to as Advanced Video Coding (AVC)) standard. Motion compensation may describe a picture in terms of the transformation of a reference picture into the current picture. The reference picture may be temporally previous or from the future when compared to the current picture. The compression efficiency may be improved if an image can be accurately synthesized from previously transmitted and / or stored images.

[0026] Block partitioning may refer to a method in video coding for finding regions of similar motion. Certain forms of block partitioning can be found in video codec standards including MPEG-2, H.264 (also referred to as AVC or MPEG-4 Part10), and H.265 (also referred to as High Efficiency Video Coding (HEVC)). In an exemplary block partitioning approach, non-overlapping blocks of a video frame can be divided into rectangular sub-blocks to find a block partitioning that contains pixels with similar motion. This approach can function well when all the pixels of the block partitioning have similar motion. The motion of the pixels within a block can be determined with respect to previously coded frames.

[0027] Motion vector prediction can be effectively implemented in geometric partitioning with an adaptive number of regions. More specifically, geometric partitioning with an adaptive number of regions can include techniques for video encoding and decoding in which a rectangular block is further divided into two or more regions where the rectangular blocks can be non-rectangular. For example, FIG. 1 is an illustration showing an example of a residual block (e.g., a current block) 100 using geometric partitioning where three segments S0, S1, and S2 exist. The current block 100 can have a width of M pixels and a height of N pixels, represented as M×N pixels such as 64×64 or 128×128. The current block can be geometrically partitioned according to two line segments (P1P2 and P3P4), which can divide the current block into three regions S0, S1, and S2. When the pixels within S0 have similar motion, a motion vector can describe the motion of all the pixels within that region. As will be more fully described below, each motion vector can be determined according to the AMVP mode or the merge mode. The motion vector can be used to compress region S0. Similarly, when the pixels within region S1 have similar motion, an associated motion vector can describe the motion of the pixels within region S1. Similarly, when the pixels within region S2 have similar motion, an associated motion vector can describe the motion of the pixels within region S2. Such geometric partitioning can be signaled to a receiver (e.g., a decoder) by encoding positions P1, P2, P3, P4 (or their representation using polar coordinates, an index into a predetermined template, or other characterization of the partition) within the video bitstream.

[0028] Continuing to refer to FIG. 1, when encoding video data using geometric partitioning at the pixel level, a line segment P1P2 (or more specifically, points P1 and P2) can be determined. In order to determine the line segment P1P2 (or more specifically, points P1 and P2) that best divides a block when using geometric partitioning at the pixel level, the possible combinations of points P1 and P2 depend on M and N, which are the block width and height. For a block of size M×N, there are (M - 1)×(N - 1)×3 possible partitions. Identifying the correct partition can thus be a computationally expensive task of evaluating motion estimation for all possible partitions, which can increase the amount of time and / or processing power required to encode the video compared to encoding using rectangular partitioning (e.g., without geometric partitioning at the pixel level). What constitutes the best or correct partition can be determined according to a metric and can vary for each implementation.

[0029] In some implementations, continuing to refer to FIG. 1, the partitioning can be performed iteratively, where a first partition that forms two regions can be determined (e.g., determining the line P1P2 and the associated regions), and then, at a point where one of those regions can be further partitioned. For example, the partitioning described with reference to FIG. 1 can be performed to divide a block into two regions. One of those regions can be further partitioned (e.g., to form new regions S1 and S2). The process can continue to perform block-level geometric partitioning until a stopping criterion is reached.

[0030] Continuing to refer to FIG. 1, the inter prediction can be performed using geometrically divided regions. Motion vectors for motion compensation can be derived using AMVP or merge mode. In AMVP, motion vector prediction is performed by signaling an index to a motion vector candidate list, and the motion vector difference (e.g., residual) is encoded and included in the bitstream. In merge mode, the motion vector is selected from a list of motion vector candidates without encoding the motion vector difference, thereby enabling the current block to adopt the motion information of another previously decoded block. In both AMVP and merge mode, the candidate list can be constructed by both the encoder and the decoder, and the index to the candidate list is signaled within the bitstream.

[0031] FIG. 2 is a schematic diagram illustrating a non-limiting example of the positions of potential spatial motion vector candidates for a first region (region S0) of an exemplary current block 200 divided according to geometric partitioning. The potential spatial motion vector candidates can be considered for constructing the motion vector candidate list during AMVP mode or merge mode. The current block 200 can be divided into three regions S0, S1, and S2 by straight lines between point P0 and point P1 and between point P2 and point P3, respectively. Each of region S0, region S1, and region S2 can be predicted unidirectionally or bidirectionally. Spatial candidates for the first region (region S0) as illustrated in FIG. 2 can include a bottom-left candidate A0, a left candidate A1, an upper-left candidate B2, an upper candidate B1, and an upper-right candidate B0.

[0032] Continuing to refer to FIG. 2, as illustrated, in some implementations, each location (A0, A1, B2, B1, and B0) may represent a block at that respective location. For example, the upper left candidate B2 may be a block that exists at a location immediately to the left and above region S0. For example, if the luma location at the upper left corner of S0 is (0,0), the upper left candidate B2 may exist at location (-1,-1). The lower left candidate A0 may be located immediately to the left and below P1. For example, if the luma location of P1 is (P1x,P1y), the lower left candidate A0 may exist at location (P1x-1,P1y+1). The left candidate A1 may be located immediately to the left of P1. For example, the left candidate A1 may exist at location (P1x-1,P1y). The upper candidate B1 may be located immediately above P0. For example, if the luma location of P0 is (P0x,P0y), the upper candidate B1 may be located at (P0x,P0y-1). The upper right candidate B0 may be located immediately above and to the right of P0. For example, the upper right candidate B0 may exist at location (P0x+1,P0y-1). As will be apparent to those of ordinary skill in the art upon a review of the entire disclosure, other locations are possible. FIG. 3 illustrates FIG. 2 with annotations showing the luma locations including the uppermost left luma location of the first region S0.

[0033] In some implementations, still referring to FIG. 3, when constructing a candidate list for region S0, if there is a geometric division, such a division can be performed to divide regions (or objects) within a frame having different motion information, so some potential candidates can be automatically marked as unavailable and removed from the candidate list. Therefore, the blocks associated with those candidates can be presumably highly likely to represent another object having different motion, and thus, these candidates can be automatically marked as unavailable (e.g., not further considered, removed from the candidate list, etc.). In the example illustrated with reference to FIG. 2 above, for region S0, since region S0 is highly likely not to share motion information with the block where the lower left candidate A0 is located, the lower left candidate A0 can be automatically marked as unavailable. Similarly, for region S0, since region S0 is highly likely not to share motion information with the block where the upper right candidate B0 is located, the upper right candidate B0 can be automatically marked as unavailable. In some implementations, by evaluating the line segment P0P1 (or points P0, P1), for example, determining the slope of the line segment P0P1, extending the line segment into the lower left candidate A0 block and / or the upper right candidate B0 block, and determining whether the lower left candidate A0 and / or the upper right candidate B0 are present on the same side as the first region S0 of the extended line segment, it can be determined whether the lower left candidate A0 and / or the upper right candidate B0 are highly likely to share motion information.

[0034] FIG. 4 is a schematic diagram illustrating non-limiting exemplary positions of potential spatial motion vector candidates for a second region (region S1) of an exemplary current block 400 divided according to a geometric division. The potential spatial motion vector candidates can be considered for constructing a motion vector candidate list during the AMVP mode or the merge mode. The current block 400 can be divided into three regions S0, S1, and S2 by straight lines between point P0 and point P1, and between point P2 and point P3, respectively. Each of region S0, region S1, and region S2 can be predicted unidirectionally or bidirectionally. Non-limiting examples of spatial candidates for the second region (region S1) are illustrated in FIG. 4 and include a bottom left candidate A0, a left candidate A1, a top left candidate B2, a top candidate B1, and a top right candidate B0.

[0035] As illustrated and continuing to refer to FIG. 4, each location (A0, A1, B2, B1, and B0) can represent a block at that location. For example, the top left candidate B2 can be a block that exists at a luma location immediately to the left and above the top left most location of region S1. For example, if the top left luma location of S1 has luma location coordinates (P0x + 1, P0y) adjacent to P0, the top left candidate B2 can exist at location (P0x, P0y - 1). The bottom left candidate A0 is located directly below the bottom left most location of the third region (region S2). For example, if the bottom left most location of the third region (region S2) is located at (0, N - 1), the bottom left candidate A0 can exist at location (0, N). The left candidate A1 can be located immediately to the left of the bottom left most location of the third region (region S2). For example, the left candidate A1 can exist at location (0, N - 1). The top candidate B1 can be located directly above the top right most location of region S1. For example, if the top right most location of region S1 is located at (M - 1, 0), B1 can exist at location (M - 1, -1). The top right candidate B0 can be located above and to the right of the top right most location of region S1. For example, the top right candidate B0 can exist at location (M, -1). FIG. 5 illustrates FIG. 4 with an annotation showing luma locations including the bottom left most luma location of the third region S2 and the top right most luma location of the second region S1.

[0036] In some implementations, still referring to FIG. 5, when constructing a candidate list for region S1, if there is a geometric division, such a division can be performed to divide regions (or objects) within frames having different motion information. Thus, some potential candidates can be automatically marked as unavailable and removed from the candidate list. Therefore, the blocks associated with those candidates can be presumably highly likely to represent another object having a different motion. Thus, these candidates can be automatically marked as unavailable (e.g., removed from the candidate list and no longer considered). In the non-limiting example illustrated above with reference to FIG. 4, for region S1, since region S1 is highly likely not to share motion information with the block located at the upper left candidate B2, the upper left candidate B2 can be automatically marked as unavailable. Similarly, in some implementations, for region S1, since region S1 is highly likely not to share motion information with the block located at the left candidate A1 which can be the third region S2, the left candidate A1 can be automatically marked as unavailable. Similarly, in some implementations, for region S1, since region S1 is highly likely not to share motion information with the block located at the lower left candidate A0 which can be below the third region S2, the lower left candidate A0 can be automatically marked as unavailable.

[0037] FIG. 6 is a schematic diagram illustrating an exemplary position of potential spatial motion vector candidates for a third region (region S2) of an exemplary current block 600 divided according to a geometric division. The potential spatial motion vector candidates can be considered for constructing a motion vector candidate list during the AMVP mode or the merge mode. The current block 600 can be divided into three regions S0, S1, and S2, respectively, by straight lines between point P0 and point P1 and between point P2 and P3. Each of the regions S0, region S1, and region S2 can be predicted unidirectionally or bidirectionally. Non-limiting examples of spatial candidates for the third region (region S2) are illustrated in FIG. 6 and can include a lower left candidate A0, a left candidate A1, an upper left candidate B2, an upper candidate B1, and an upper right candidate B0.

[0038] As can be demonstrated, continuing to refer to FIG. 6, each location (A0, A1, B2, B1, and B0) can represent a block at that respective location. For example, the upper left candidate can be a block existing at a luma location above and to the left of region S2. For example, the upper left candidate B2 can be the first region S0. If S0 is located at (0,0), the upper left candidate B2 can be located at (0,0). The lower left candidate A0 can be located immediately to the left and directly below the lowest left location of region S2. For example, if the lowest left location of region S2 is located at (0, N - 1), the lower left candidate A0 can exist at (-1, N). The left candidate A1 can be located immediately to the left of the lowest left location of region S2. For example, the left candidate A1 can exist at (-1, N - 1). The upper candidate B1 can be located above and to the left of region S2 and can be adjacent to point P1. For example, if P1 is located at (P1x, P1y), the upper candidate B1 can be located at (P1x - 1, P1y). The upper right candidate B0 can be a block existing at a luma location above and to the right of region S2. For example, the upper right candidate B0 can be the second region S1. For example, the upper right candidate can be located at the uppermost right location of S1 that can exist at (M - 1, 0). FIG. 7 illustrates FIG. 6 with an annotation showing luma locations including the lowest left luma location of the third region S2 and the uppermost right luma location of the second region S1.

[0039] In some implementations, still referring to FIG. 7, when constructing a candidate list for region S2, if there is a geometric division, such a division can be performed to divide regions (or objects) within frames having different motion information. Thus, some potential candidates can be automatically marked as unavailable and removed from the candidate list. Therefore, the blocks associated with those candidates can be presumably highly likely to represent another object having a different motion. Thus, these candidates can be automatically marked as unavailable (e.g., not further considered, removed from the candidate list, etc.). In the non-limiting example provided above in FIG. 6, for region S2, since region S2 is highly likely not to share motion information with the block located at the upper left candidate B2 (e.g., S0), the upper left candidate B2 can be automatically marked as unavailable. Similarly, in some implementations, for region S2, since region S2 is highly likely not to share motion information with the block located at the left candidate B0 which can be the second region S1, the upper right candidate A0 can be automatically marked as unavailable. Similarly, in some implementations, for region S2, since region S2 is highly likely not to share motion information with the block located at the upper candidate B1 which is to the left of the first region S0, the upper candidate B1 can be automatically marked as unavailable.

[0040] FIG. 8 is a system block diagram illustrating an exemplary video encoder 800 that can encode video using inter prediction with an adaptive number of regions. The exemplary video encoder 800 receives an input video 805, which can first be segmented or partitioned according to a processing scheme such as a tree-structured macroblock partitioning scheme (e.g., quad tree plus binary tree). An example of a tree-structured macroblock partitioning scheme can include dividing a picture frame into large block elements called coding tree units (CTUs). In some implementations, each CTU can be further divided one or more times into several sub-blocks called coding units (CUs). The final result of this division can include a group of sub-blocks that can be called prediction units (PUs). A transform unit (TU) can also be utilized. Such a partitioning scheme can include performing a geometric partitioning with an adaptive number of regions according to some aspects of the present subject matter.

[0041] Continuing to refer to FIG. 8, the exemplary video encoder 800 can include an intra prediction processor 815, a motion estimation / compensation processor 820 (also referred to as an inter prediction processor) that can assist with geometric partitioning with an adaptive number of regions including AMVP mode and merge mode, a transform / quantization processor 825, an inverse quantization / inverse transform processor 830, an in-loop filter 835, a decoded picture buffer 840, and an entropy coding processor 845. In some implementations, the motion estimation / compensation processor 820 can perform a geometric partitioning with an adaptive number of regions including the use of AMVP mode and merge mode. Bitstream parameters signaling the geometric partitioning mode, AMVP mode, and merge mode can be input to the entropy coding processor 845 for inclusion within the output bitstream 850.

[0042] During operation, continuing to refer to FIG. 8, for each block of the frames of the input video 805, it can be determined whether the block should be processed via intra-picture prediction or using motion estimation / compensation. The block can be provided to the intra prediction processor 810 or the motion estimation / compensation processor 820. If the block is to be processed via intra prediction, the intra prediction processor 810 can perform the processing and output a predictor. If the block is to be processed via motion estimation / compensation, the motion estimation / compensation processor 820 can perform the processing including the use of geometric partitioning using the AMVP mode and the merge mode, and output a predictor.

[0043] Continuing to refer to FIG. 8, the residual can be formed by subtracting the predictor from the input video. The residual can be received by the transform / quantization processor 825, which can perform a transform process (e.g., discrete cosine transform (DCT)) to generate coefficients, and the coefficients can be quantized. The quantized coefficients and any associated signaling information can be provided to the entropy coding processor 845 for entropy coding and inclusion within the output bitstream 850. The entropy coding processor 845 can assist in the coding of the signaling information related to the geometric partitioning mode, the AMVP mode, and the merge mode. Additionally, the quantized coefficients can be provided to the inverse quantization / inverse transform processor 830, which can reproduce pixels, and the pixels can be combined with the predictor and processed by the in-loop filter 835, and the output can be stored in the decoded picture buffer 840 for use by the motion estimation / compensation processor 820, which can assist in the geometric partitioning mode, the AMVP mode, and the merge mode.

[0044] FIG. 9 is a process flow diagram illustrating an exemplary process 300 for encoding video using geometric partitioning inter prediction according to some aspects of the present subject matter that can reduce encoding complexity while increasing compression efficiency. At step 910, a video frame may undergo an initial block segmentation using a tree-structured macroblock segmentation scheme that may include, for example, dividing a picture frame into CTUs and CUs. At step 920, a block may be selected for geometric partitioning with an adaptive number of regions. The selection may include identifying, according to a metric rule, that the block should be processed according to a geometric partitioning mode.

[0045] At step 930, continuing with reference to FIG. 9, a geometric partitioning with three or more regions may be determined. At least two line segments may be determined that separate the pixels (e.g., luma samples) contained within the block into three or more regions (e.g., region 0, region 1, and region 2) according to the motion between those frames such that each of the pixels within each of the respective regions has similar motion and may be different from the motion of the pixels within other regions (e.g., region 1).

[0046] In step 940, continuing to refer to FIG. 9, the motion information of each region can be determined and processed using the AMVP mode or the merge mode. When processing a region using the AMVP mode, a candidate list can be constructed by considering both spatial candidates that may include the spatial candidates as described above and temporal candidates, which may include marking some candidates as unavailable. A motion vector can be selected from a list of motion vector candidates as a motion vector prediction, and a motion vector difference (e.g., a residual) can be calculated. An index to the candidate list can be determined. In the merge mode, a candidate list can be constructed by considering both spatial candidates that may include the spatial candidates as described above and temporal candidates, which may include marking some candidates as unavailable. A motion vector can be selected from a list of motion vector candidates for a region to adopt the motion information of another block. An index to the candidate list can be determined.

[0047] In step 950, continuing to refer to FIG. 9, the determined geometric partitioning and motion information can be signaled within the bitstream. Signaling the geometric partitioning within the bitstream can include, for example, including the locations of P0, P1, P2, P3, an index to one or more predetermined templates, and the like. Signaling the motion information when processing a region using AMVP can include including a motion vector difference (e.g., a residual) and an index to the motion vector candidates within the bitstream. Signaling the motion information when processing a region using the merge mode can include including an index to the motion vector candidates within the bitstream.

[0048] FIG. 10 is a system block diagram illustrating an exemplary decoder 1000 capable of decoding a bitstream 1070 using geometric partitioning with inter prediction and an adaptive number of regions, which can improve the complexity and processing performance related to video encoding and decoding. The decoder 1000 may include an entropy decoder processor 1010, an inverse quantization and inverse transform processor 1020, a deblocking filter 1030, a frame buffer 1040, a motion compensation processor 1050, and an intra prediction processor 1060. In some implementations, the bitstream 1070 may include parameters signaling a geometric partitioning mode, an AMVP mode, and / or a merge mode. The motion compensation processor 1050 may reconstruct pixel information using geometric partitioning as described herein.

[0049] In operation, still referring to FIG. 10, the bitstream 1070 may be received by the decoder 1000 and input to the entropy decoder processor 1010, and the entropy decoder processor 1010 may entropy decode the bitstream into quantized coefficients. The quantized coefficients may be provided to the inverse quantization and inverse transform processor 1020, and the inverse quantization and inverse transform processor 1020 may perform inverse quantization and inverse transform to create a residual signal. The residual signal may be added to the output of the motion compensation processor 1050 or the intra prediction processor 1060 according to the processing mode. The outputs of the motion compensation processor 1050 and the intra prediction processor 1060 may include block predictions based on previously decoded blocks. The sum of the prediction and the residual may be processed by the deblocking filter 1030 and stored in the frame buffer 1040. For a given block (e.g., a CU or a PU), when the bitstream 1070 signals that the partitioning mode is geometric partitioning, the motion compensation processor 1050 may construct a prediction based on the geometric partitioning approach described herein.

[0050] FIG. 11 is a process flow diagram illustrating an exemplary process 1100 for decoding a bitstream using inter prediction in a geometric partitioning with an adaptable number of regions that can improve the complexity and processing performance related to video encoding and decoding. In step 1110, a bitstream that may include a current block (e.g., CTU, CU, PU) is received. Receiving may include extracting and / or parsing the current block and associated signaling information from the bitstream. The decoder may extract or determine one or more parameters that characterize the geometric partitioning. These parameters may include, for example, the indices of the start and end points of line segments (e.g., P0, P1, P2, P3). Extracting or determining may include identifying and reading the parameters from the bitstream (e.g., parsing the bitstream).

[0051] In step 1120, still referring to FIG. 11, a first region, a second region, and a third region of the current block may be determined according to a geometric partitioning mode. Determining may include determining whether the geometric partitioning mode is enabled (e.g., true) for the current block. If the geometric partitioning mode is not enabled (e.g., false), the decoder may process the block using an alternative partitioning mode. If the geometric partitioning mode is enabled (e.g., true), three or more regions may be determined and / or processed.

[0052] Continuing to refer to FIG. 11, in step 1130, a motion vector associated with one of the first region, the second region, and the third region can be determined. Determining the motion vector can include determining whether the motion information of the region should be determined using the AMVP mode or the merge mode. When processing a region using the AMVP mode, a candidate list can be constructed by considering both spatial candidates and temporal candidates that may include the spatial candidates described above, which may include marking some candidates as unavailable. The motion vector can be selected from a list of motion vector candidates as a motion vector prediction, and a motion vector difference (e.g., residual) can be calculated. In the merge mode, determining can include constructing a candidate list of spatial candidates and temporal candidates for each region. Constructing the candidate list can include automatically marking candidates as unavailable and removing the unavailable candidates from the candidate list. An index to the constructed candidate list can be parsed from the bitstream and used to select a final candidate from the candidate list. The motion information regarding the current region can be determined to be the same as the motion information of the final candidate (e.g., the motion vector regarding the region can be adopted from the final candidate).

[0053] Continuing to refer to FIG. 11, in step 1140, the current block can be decoded using the determined motion vector.

[0054] Some variations have been described in detail above, but other modifications or additions are possible. For example, the geometric partitioning can be signaled within the bitstream based on rate distortion determination in the encoder. The coding can be based on a combination of normal predetermined partitioning (e.g., template), temporal and spatial prediction of the partitioning, and / or additional offsets. Each geometrically partitioned region can utilize motion compensated prediction or intra prediction. The boundaries of the predicted regions can be smoothed before the residuals are added.

[0055] In some implementations, a quad tree plus binary decision tree (QTBT) can be implemented. In QTBT, at the coding tree unit level, the QTBT splitting parameters can be dynamically derived to adapt to local characteristics without transmitting any overhead. Subsequently, at the coding unit level, a joint classifier decision tree structure can eliminate unnecessary iterations and control the risk of incorrect predictions. In some implementations, geometric partitioning with an adaptive number of regions can be available as an additional splitting option available at all leaf nodes of the QTBT.

[0056] In some implementations, the decoder includes a splitting processor that can generate geometric partitions for the current block and provide all split-related information for the dependent processes. Since motion compensation can be performed for each segment when the block is geometrically partitioned, the splitting processor can directly affect motion compensation. Further, the splitting processor can provide shape information to the intra prediction processor and the transform coding processor.

[0057] In some implementations, additional syntax elements can be signaled at different hierarchical levels of the bitstream. To enable geometric partitioning with an adaptive number of regions for the entire sequence, an enable flag can be coded in the sequence parameter set (SPS). Further, a CTU flag can be coded at the coding tree unit (CTU) level to indicate whether any coding unit (CU) uses geometric partitioning with an adaptive number of regions. A CU flag can be coded to indicate whether the current coding unit uses geometric partitioning with an adaptive number of regions. Parameters defining line segments on the block can be coded. For each region, a flag can be decoded that can define whether the current region is inter predicted or intra predicted.

[0058] In some implementations, the minimum area size can be defined.

[0059] The subject matter described in this specification provides many technical advantages. For example, some implementations of this subject matter can provide a division of blocks that reduces complexity while increasing compression efficiency. In some implementations, blocking artifacts at object boundaries can be reduced.

[0060] As will be apparent to one or more of ordinary skill in the art in the computer technology field, any one or more of the aspects and embodiments described herein can be readily implemented and / or realized using digital electronic circuits, integrated circuits, application specific integrated circuits (ASICs) designed specifically for a particular purpose, field programmable gate arrays (FPGAs) computer hardware, firmware, software, and / or combinations thereof, programmed in accordance with the teachings herein. It should be noted that these various aspects or features can include implementation within one or more computer programs and / or software that are executable and / or interpretable on a programmable system including at least one programmable processor, where the at least one programmable processor can be of special purpose or general purpose and is coupled to receive data and instructions from, and to transmit data and instructions to, a storage system, at least one input device, and at least one output device. Appropriate software coding can be readily prepared by a skilled programmer based on the teachings of the present disclosure, as will be apparent to one of ordinary skill in the software art. The aspects and implementations discussed above that employ software and / or software modules can also include appropriate hardware to assist in the implementation of machine-executable instructions of the software and / or software modules.

[0061] Such software can be a computer program product that employs a machine-readable storage medium. The machine-readable storage medium can store and / or encode a sequence of instructions for execution by a machine (e.g., a computing device), and can be any medium that causes the machine to perform any one of the methods and / or embodiments described herein. Examples of machine-readable storage media include, but are not limited to, magnetic disks, optical disks (e.g., CD, CD-R, DVD, DVD-R, etc.), magneto-optical disks, read-only memory "ROM" devices, random access memory "RAM" devices, magnetic cards, optical cards, solid-state memory devices, EPROM, EEPROM, programmable logic devices (PLD), and / or any combination thereof. As used herein, a machine-readable medium includes both a single medium and a collection of physically distinct media such as, for example, a collection of compact discs or one or more hard disk drives combined with computer memory. As used herein, a machine-readable storage medium does not include transitory forms of signal transmissions.

[0062] Such software can also include information (e.g., data) carried as a data signal on a data carrier such as a carrier wave. For example, machine-executable information can include a data-carrying signal embodied in a data carrier that encodes a sequence of instructions or a portion thereof for execution by a machine (e.g., a computing device), and any associated information (e.g., data structures and data) that causes the machine to perform any one of the methods and / or embodiments described herein.

[0063] Examples of computing devices include, but are not limited to, e - book reading devices, computer workstations, desktop computers, server computers, handheld devices (e.g., tablet computers, smartphones, etc.), web devices, network routers, network switches, network bridges, any machine capable of executing a sequence of instructions that specify actions to be taken by the machine, and any combination thereof. In one example, a computing device can include and / or be included within a kiosk.

[0064] FIG. 12 shows a graphical representation of one embodiment of a computing device as an exemplary form of a computer system 1200 in which a set of instructions for causing any one or more of the aspects and / or methods of the present disclosure to be implemented in a control system can be executed. It is also contemplated that a plurality of computing devices can be utilized to implement a set of instructions specifically configured to cause any one or more of the aspects and / or methods of the present disclosure to be implemented in one or more of the devices. The computer system 1200 includes a processor 1204 and a memory 1208, and the processor 1204 and the memory 1208 communicate with each other and with other components via a bus 1212. The bus 1212 can include any of several types of bus structures, including a memory bus, a memory controller, a peripheral bus, a local bus, and any combination thereof, using any of various bus architectures, including but not limited to.

[0065] Memory 1208 can include various components (e.g., machine-readable media) including, but not limited to, random access memory components, read-only components, and any combination thereof. In one example, a basic input / output system 1216 (BIOS) including basic routines that help transfer information between elements within computer system 1200 during startup, etc., can be stored in memory 1208. Memory 1208 can also include instructions (e.g., software) 1220 that embody any one or more of the aspects and / or methods of the present disclosure (e.g., stored on one or more machine-readable media). In another example, memory 1208 can further include any number of program modules including, but not limited to, an operating system, one or more application programs, other program modules, program data, and any combination thereof.

[0066] The computer system 1200 may also include a memory device 1224. Examples of memory devices (e.g., memory device 1224) include, but are not limited to, hard disk drives, magnetic disk drives, optical disk drives in combination with optical media, solid state memory devices, and any combination thereof. The memory device 1224 may be connected to the bus 1212 by a suitable interface (not shown). Exemplary interfaces include, but are not limited to, SCSI, Advanced Technology Attachment (ATA), Serial ATA, Universal Serial Bus (USB), IEEE 1394 (FIREWIRE (registered trademark)), and any combination thereof. In one example, the memory device 1224 (or one or more of its components) may be removably interfaced with the computer system 1200 (e.g., via an external port connector (not shown)). In particular, the memory device 1224 and the associated machine-readable medium 1228 may provide non-volatile and / or volatile storage for machine-readable instructions, data structures, program modules, and / or other data for the computer system 1200. In one example, the software 1220 may reside, in whole or in part, within the machine-readable medium 1228. In another example, the software 1220 may reside, in whole or in part, within the processor 1204.

[0067] Computer system 1200 may also include an input device 1232. In one example, a user of computer system 1200 may enter commands and / or other information into computer system 1200 via input device 1232. Examples of input device 1232 include, but are not limited to, alphanumeric input devices (e.g., keyboards), pointing devices, joysticks, game pads, audio input devices (e.g., microphones, voice response systems, etc.), cursor control devices (e.g., mice), touch pads, optical scanners, video capture devices (e.g., still cameras, video cameras), touch screens, and any combination thereof. Input device 1232 may be interface-connected to bus 1212 via any of a variety of interfaces (not shown) including, but not limited to, serial interfaces, parallel interfaces, game ports, USB interfaces, FIREWIRE (registered trademark) interfaces, direct interfaces to bus 1212, and any combination thereof. Input device 1232 may include a touch screen interface, which may be part of or separate from display 1236 discussed further below. Input device 1232 may be utilized as a user selection device for selecting one or more graphical representations in a graphical interface as described above.

[0068] The user can also input commands and / or other information into the computer system 1200 via a memory device 1224 (e.g., removable disk drive, flash drive, etc.) and / or a network interface device 1240. A network interface device, such as the network interface device 1240, can be used to connect the computer system 1200 to one or more of various networks, such as the network 1244, and one or more remote devices 1248 connected thereto. Examples of network interface devices include, but are not limited to, network interface cards (e.g., mobile network interface cards, LAN cards), modems, and any combination thereof. Examples of networks include, but are not limited to, wide area networks (e.g., the Internet, corporate networks), local area networks (e.g., networks associated with offices, buildings, campuses, or other relatively small geographical spaces), telephone networks, data networks associated with telephone / voice providers (e.g., data and / or voice networks of mobile communication providers), direct connections between two computing devices, and any combination thereof. Networks such as the network 1244 can employ communication in wired mode and / or wireless mode. Generally, any network topology can be used. Information (e.g., data, software 1220, etc.) can be communicated to and / or from the computer system 1200 via the network interface device 1240.

[0069] The computer system 1200 may further include a video display adapter 1252 for communicating an image that can be displayed on a display device such as the display device 1236. Examples of display devices include, but are not limited to, liquid crystal displays (LCDs), cathode ray tubes (CRTs), plasma displays, light emitting diode (LED) displays, and any combination thereof. The display adapter 1252 and the display device 1236 may be utilized in combination with the processor 1204 to provide a graphical representation of aspects of the present disclosure. In addition to the display device, the computer system 1200 may include one or more other peripheral output devices including, but not limited to, audio speakers, printers, and any combination thereof. Such peripheral output devices may be connected to the bus 1212 via a peripheral interface 1256. Examples of peripheral interfaces include, but are not limited to, serial ports, USB connections, FIREWIRE® connections, parallel connections, and any combination thereof.

[0070] The foregoing is a detailed description of illustrative embodiments of the invention. Various modifications and additions can be made without departing from the spirit and scope of the invention. Each feature of the various embodiments described above can be combined, as appropriate, with features of other described embodiments to provide combinations of multiple features in related new embodiments. Further, while the foregoing describes several separate embodiments, what is described herein is merely illustrative of the application of the principles of the invention. In addition, specific methods described herein may be illustrated and / or described as being performed in a specific order, but the order is highly variable within the ordinary skill in order to achieve embodiments as disclosed herein. Accordingly, this description is intended to be taken only by way of example and is not intended to limit the scope of the invention otherwise.

[0071] In the above description, and in the claims, phrases such as "at least one of" or "one or more of" may occur, followed by a conjunctive listing of elements or features. The term "and / or" may also occur within a listing of two or more elements or features. Unless otherwise implicitly or explicitly disallowed by the context in which such phrases are used, this is intended to mean any of the individually listed elements or features, or any of the elements or features described in combination with any of the other listed elements or features. For example, the phrases "at least one of A and B", "one or more of A and B", and "A and / or B" are each intended to mean "only A, only B, or both A and B". A similar interpretation is intended for listings that include three or more items. For example, the phrases "at least one of A, B, and C", "one or more of A, B, and C", and "A, B, and / or C" are each intended to mean "only A, only B, only C, both A and B, both A and C, both B and C, or all of A, B, and C". In addition, the use of the term "based on" in the above and in the claims is intended to mean "at least based on" so that features or elements not described are also allowable.

[0072] The subject matter described in this specification can be embodied as a system, apparatus, method, and / or article, depending on the desired configuration. The implementations described in the foregoing description do not represent all implementations consistent with the subject matter described in this specification. Instead, they are merely some examples consistent with aspects related to the subject matter described. Some changes have been described in detail above, but other modifications or additions are possible. In particular, further features and / or changes may be provided in addition to those described in this specification. For example, the implementations described above may be directed to various combinations and sub-combinations of the disclosed features and / or combinations and sub-combinations of some additional features disclosed above. Additionally, the logical flows depicted in the accompanying figures and / or described in this specification do not necessarily require the particular order or sequential order shown to achieve the desired result. Other implementations may be within the scope of the following claims.

Claims

An encoder comprising a circuit configured to encode a bitstream for decoding by a compatible decoder, wherein the decoder: Receives the encoded bitstream including a current picture, the current picture further including a current block, the current block having at least a first division boundary that divides the current block into first and second non-rectangular regions, and a second division boundary that intersects the at least first division boundary and divides the second non-rectangular region, thereby dividing the current block into three parts; Determines a first predictor for use within the first non-rectangular region using a first motion vector selected from a first list of motion vector candidates; Determines a second predictor for use within the second non-rectangular region using a second motion vector selected from a second list of motion vector candidates; Determines a third predictor for use on one side of the second division boundary using a third motion vector selected from a third list of motion vector candidates; Decodes the current block using the first predictor and the second predictor, where decoding further includes smoothing the first predictor and the second predictor across the at least first division boundary; An encoder configured to perform the above. Claim 2 The encoder according to claim 1, wherein the current block is a current coding tree unit. Claim 3 The encoder according to claim 1, wherein the first division includes a first geometric division. Claim 4 The encoder according to claim 1, wherein the second division includes a second geometric division. An encoder comprising a circuit configured to encode a bitstream for decoding by a compatible decoder, wherein the decoder: Receiving the encoded bitstream, wherein the bitstream includes a current picture, the current picture includes a current block having a block size of N×N, N is equal to 64 or 128, the current block has at least a first geometric division boundary that divides the current block into first and second non-rectangular regions, and a second geometric division boundary that intersects the at least first geometric division boundary and divides the second non-rectangular region, and divides the current block into three parts. Determining a first predictor for use within the first non-rectangular region using a first motion vector selected from a first list of motion vector candidates. Determining a second predictor for use within the second non-rectangular region using a second motion vector selected from a second list of motion vector candidates. Decoding the current block using the first predictor and the second predictor, wherein decoding further includes smoothing the first predictor and the second predictor across the at least first geometric division boundary. An encoder configured to perform the above. The encoder according to claim 5, wherein the current block is a current coding tree unit. A method for transmitting an encoded bitstream for decoding by a compatible decoder, wherein the encoded bitstream includes a current picture, the current picture further includes a current block, the current block has at least a first division boundary that divides the current block into first and second non-rectangular regions, and a second division boundary that intersects the at least first division boundary and divides the second non-rectangular region, and divides the current block into three parts, and the decoder Receiving the encoded bitstream including the current picture, wherein the current picture further includes a current block, and the current block has at least a first dividing boundary that divides the current block into first and second non-rectangular regions, and a second dividing boundary that intersects the at least first dividing boundary and divides the second non-rectangular region, and divides the current block into three parts, Determining a first predictor for use within the first non-rectangular region using a first motion vector selected from a first list of motion vector candidates; Determining a second predictor for use within the second non-rectangular region using a second motion vector selected from a second list of motion vector candidates; Determining a third predictor for use on one side of the second dividing boundary using a third motion vector selected from a third list of motion vector candidates; Decoding the current block using the first predictor and the second predictor, wherein decoding further includes smoothing the first predictor and the second predictor across the at least first dividing boundary, A method configured to perform. Claim 8 The method according to claim 7, wherein the current block is a current coding tree unit. Claim 9. The method according to claim 7, wherein the first division includes a first geometric division. Claim 10. The method according to claim 7, wherein the second division includes a second geometric division. A method for transmitting an encoded bitstream, wherein the encoded bitstream includes a current picture, the current picture includes a current block having a block size of N×N, N is equal to 64 or 128, the current block has at least a first geometric division boundary that divides the current block into first and second non-rectangular regions, and a second geometric division boundary that intersects the at least first geometric division boundary and divides the second non-rectangular region, dividing the current block into three parts, and the encoder comprises a circuit configured to encode the bitstream for decoding by a compatible decoder, and the decoder receiving the encoded bitstream; determining a first predictor for use within the first non-rectangular region using a first motion vector selected from a first list of motion vector candidates; determining a second predictor for use within the second non-rectangular region using a second motion vector selected from a second list of motion vector candidates; decoding the current block using the first predictor and the second predictor, wherein decoding further includes smoothing the first predictor and the second predictor across the at least first geometric division boundary; A method configured to perform the above. The method according to claim 11, wherein the current block is a current coding tree unit.

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