Configuration method of logic circuit using photorelay, logic circuit using photorelay, logic circuit simulator, and program

A photo relay-based logic circuit with resistor networks addresses reliability and compactness issues in semiconductor circuits, offering efficient fault detection and intuitive simulation.

JP2025105993APending Publication Date: 2025-07-10GSEC INC
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Patent Information

Application Number
JP2025077883
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-07-29
Filing Date
2025-05-08
Publication Date
2025-07-10

AI Technical Summary

Technical Problem

Existing logic circuits using semiconductor elements face reliability issues in harsh environments, and there is a need for a more compact and power-saving alternative that can also detect failures such as disconnections.

Method used

A logic circuit using a photo relay is configured with resistor networks based on threshold logic functions, allowing for hierarchical structuring and fault detection, and a simulator and program are developed for intuitive simulation.

Benefits of technology

The logic circuit with photo relays provides high reliability, compactness, and power efficiency, while enabling intuitive simulation and fault detection, maintaining functionality even with disconnections.

✦ Generated by Eureka AI based on patent content.

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Abstract

To provide a logic circuit using a photorelay having high reliability.SOLUTION: A logic circuit includes a first resistance group and a second resistance group consisting of resistances according to the input of a logic function, and supplies a power supply voltage to one terminal on the input side of a photorelay through the resistance of the first resistance group in response to an input with a logic value of 1 of the logic function, and the resistance of the second resistance group is grounded via the resistance in response to an input where the logic value of the logic function is 0, a resistance network is configured to be connected in parallel between both terminals on the input side of the photorelay, and the resistance network is configured on the basis of a threshold logic function such that a logic value corresponding to an input of the logic function becomes a conduction function on the output side of the photorelay.SELECTED DRAWING: Figure 2
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Description

Technical Field

[0001] The present invention relates to a method for constructing a logic circuit using a photo relay, a logic circuit using a photo relay, a simulator for a logic circuit, and a program.

Background Art

[0002] Logic circuits are usually composed of semiconductor elements. As such a technique, for example, in addition to Patent Document 2, there are a number of known documents.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Patent Document 2

Non-Patent Documents

[0004]

Non-Patent Document 1

Non-Patent Document 2

Non-Patent Document 3

Non-Patent Document 4

Summary of the Invention

Problems to be Solved by the Invention

[0005] The inventors of the present invention have considered constructing a logic circuit using a photo relay. A configuration in which the photo relay is turned on and off by the output of a logic circuit composed of semiconductor elements is conceivable, but there are problems in terms of reliability in harsh environments and the like.

[0006] In order to solve such problems, an object of the present invention is to provide a method for constructing a logic circuit using a photo relay having high reliability and a logic circuit using a photo relay.

[0007] Another object of the present invention is to provide a simulator and a program for a logic circuit that enable easier and more intuitive simulation of this type of logic circuit through vision.

Means for Solving the Problems

[0008] The method for constructing a logic circuit using a photo relay according to the present invention has a first resistor group and a second resistor group composed of resistors corresponding to the inputs of a logic function. The resistor of the first resistor group supplies the power supply voltage to one terminal on the input side of the photo relay through the resistor in accordance with the input for which the logic value of the logic function is 1, and the resistor of the second resistor group is grounded through the resistor in accordance with the input for which the logic value of the logic function is 0, and a resistor network is configured to be connected in parallel between both terminals on the input side of the photo relay. The resistor network is configured based on the following threshold logic function f(x) such that the logic value corresponding to the input of the logic function becomes the conduction function on the output side of the photo relay.

[0009] TIFF2025105993000002.tif50106

[0010] Here t: Threshold value of the electrical energy of the photo relay wi: Resistance value of each resistor as a weight xi: A variable for determining whether each resistor is a resistor of a first resistor group with an input of a power supply voltage corresponding to a logic value 1 of a logic function or a resistor of a second resistor group with an input of a ground corresponding to a logic value 0 In the method for configuring a logic circuit using a photo relay according to the present invention, the logic circuit may be hierarchically structured using a network based on a conduction function on the output side of the photo relay.

[0011] The logic circuit using a photo relay according to the present invention includes a photo relay, a first resistor group and a second resistor group composed of resistors corresponding to inputs of a logic function. The resistors of the first resistor group supply a power supply voltage to one terminal on the input side of the photo relay through the resistors according to an input where the logic value of the logic function is 1, and the resistors of the second resistor group are grounded through the resistors according to an input where the logic value of the logic function is 0. It comprises a resistor network configured to be connected in parallel between both terminals on the input side of the photo relay according to the input of the logic circuit, and is configured such that the logic value corresponding to the input of the logic function becomes the conduction function on the output side of the photo relay.

[0012] In the logic circuit using a photo relay according to the present invention, the resistor network is configured based on the function f(x) of the threshold logic described above.

[0013] In the logic circuit using a photo relay according to the present invention, it may be hierarchically structured using a network based on a conduction function on the output side of the photo relay.

[0014] The simulator for a logic circuit according to the present invention is a simulator for a logic circuit including at least a relay element as a circuit element and connection lines. It includes a circuit configuration unit that connects each of the circuit elements by a predetermined operation on a display unit to configure the logic circuit, and inputs a voltage corresponding to a variable of the logic function to the input side of the relay element. At both terminals of each of the circuit elements, a voltage application state of each of the circuit elements is obtained assuming that a current flows from a terminal with a higher potential to a terminal with a lower potential and shown on the display unit, and an arithmetic unit that obtains a conduction variable as a logic value of the logic function from the output side of the relay element.

[0015] In the simulator of the logic circuit according to the present invention, a failure generation unit that generates a disconnection or short - circuit failure in a desired one of the circuit elements by a predetermined operation is provided in a display unit. The arithmetic unit inputs a voltage corresponding to a variable of the logic function to the input side of the relay element, obtains a voltage application state of each of the circuit elements after the failure occurs, and shows it on the display unit. Also, a conduction variable as a logic value of the logic function may be obtained from the output side of the relay element.

[0016] The program according to the present invention is a program for a simulator of a logic circuit including at least a relay element and a connection line as circuit elements. The program causes a computer to execute steps of connecting each of the circuit elements by a predetermined operation in a display unit to configure the logic circuit, inputting a voltage corresponding to a variable of the logic function to the input side of the relay element, obtaining a voltage application state of each of the circuit elements as if a current flows from a terminal with a higher potential to a terminal with a lower potential at both terminals of each of the circuit elements, showing it on the display unit, and obtaining a conduction variable as a logic value of the logic function from the output side of the relay element.

[0017] The program according to the present invention includes a step of generating a disconnection or short - circuit failure in a desired one of the circuit elements by a predetermined operation in the display unit. The step of obtaining the conduction variable may input a voltage corresponding to a variable of the logic function to the input side of the relay element, obtain a voltage application state of each of the circuit elements after the failure occurs, show it on the display unit, and obtain a conduction variable as a logic value of the logic function from the output side of the relay element.

[0018] The logic circuit according to the present invention includes a photo - relay in which one end of the input side is grounded and the logic value of the logic function is an output - side conduction variable, and a resistor network having a resistor connected to the other end of the input side of the photo - relay via a switch unit that switches the connection to a power source / a predetermined potential corresponding to each variable of the logic function.

[0019] In the logic circuit according to the present invention, when the logic function is an OR logic function, the photo relay is of the normally open type, the input supply voltage from the power supply is E, and the voltage at which the photo relay turns on exceeding the threshold value is V on When the number of resistors in the resistor network is n, E / n > V on It may be configured so as to satisfy this.

[0020] In the logic circuit according to the present invention, when the logic function is an AND logic function, the photo relay is of the normally open type, a parallel resistor is connected in parallel between the terminals on the input side of the photo relay, the input supply voltage from the power supply is E, and the voltage at which the photo relay turns on exceeding the threshold value is V on Let this be the case, and the voltage at which the photo relay turns off without exceeding the threshold value is V off Let this be the case, the number of resistors in the resistor network is n, and R s / R p = m (R s is the combined resistance value of the resistors that will be connected in series to the input side, and R p is the combined resistance value of the resistors that will be connected in parallel to the input side), when this is the case, E / (1 + m / n) > V on E·(n−1) / (n + m) < V off It may be configured so as to satisfy this.

[0021] In the logic circuit according to the present invention, when the logic function is a majority logic function with any n and the smallest integer k > n / 2, the photo relay is of the normally open type, a parallel resistor is connected in parallel between the terminals on the input side of the photo relay, the input supply voltage from the power supply is E, and the voltage at which the photo relay turns on exceeding the threshold value is V on Let this be the case, and the voltage at which the photo relay turns off without exceeding the threshold value is V off Let this be the case, the number of resistors in the resistor network is n, and R s / R p = m (R s is the combined resistance value of the resistors that will be connected in series to the input side, and R pWhen the combined resistance value of the resistors to be connected in parallel to the input side is used, E·k / (n + m)>V on E·(k - 1) / (n + m)<V off It may be configured so as to satisfy the above conditions.

[0022] When the logic circuit according to the present invention has the NOR logic function, the photo relay is of the normally closed type, the input supply voltage from the power supply is E, and the voltage at which the photo relay turns on exceeding the threshold value is V on When the number of resistors in the resistor network is n, E / n>V on It may be configured so as to satisfy the above conditions.

[0023] When the logic circuit according to the present invention has the NAND logic function, the photo relay is of the normally closed type, a parallel resistor is connected in parallel between the terminals on the input side of the photo relay, the input supply voltage from the power supply is E, the voltage at which the photo relay turns on exceeding the threshold value is V on and the voltage at which the photo relay turns off without exceeding the threshold value is V off When the number of resistors in the resistor network is n, and R s / R p =m(R s is the combined resistance value of the resistors to be connected in series to the input side, and R p is the combined resistance value of the resistors to be connected in parallel to the input side), E / (1 + m / n)>V on E·(n - 1) / (n + m)<V off It may be configured so as to satisfy the above conditions.

[0024] The logic circuit according to the present invention includes a first and a second normally-open type photo relay whose output sides are connected in parallel, a first switch unit that switches the connection to a power source / a predetermined potential corresponding to the first variable of the EXOR logic function and is connected to one end of the input side of the first photo relay, a second switch unit that switches the connection to a power source / a predetermined potential corresponding to the second variable of the EXOR logic function and is connected to one end of the input side of the second photo relay, and a resistor network that connects the first and second switch units to the other ends of the input sides of the first and second photo relays via respective resistors.

[0025] The logic circuit according to the present invention has first to fourth logic circuits each having the same configuration consisting of any one of the above logic circuits and receiving variables of the same logic function. The output side of the first logic circuit and the output side of the second logic circuit are connected in series, the output side of the third logic circuit and the output side of the fourth logic circuit are connected in series, and a relay group in which the output sides of the serially connected first logic circuit and the second logic circuit and the output sides of the serially connected third logic circuit and the fourth logic circuit are connected in parallel, and a detection unit that is inserted between a first connection portion between the output side of the first logic circuit and the output side of the second logic circuit and a second connection portion between the output side of the third logic circuit and the output side of the fourth logic circuit and detects the presence or absence of the flow of current between them.

[0026] The logic circuit according to the present invention is a logic circuit having first to fourth relays to which a first variable (X) of a majority logic function is input on the input side, fifth to eighth relays to which a second variable (Y) of the majority logic function is input on the input side, and ninth to twelfth relays to which a third variable (Z) of the majority logic function is input on the input side, and the conduction variable f on the output side of the logic circuit ij When it is set as, as a logical formula f ij =XYXY + XZXZ + YXYX + YZYZ + ZYZY + ZXZX is satisfied, the output sides of the first to twelfth relays are connected and configured.

[0027] A method for configuring a logic circuit using a photo relay according to the present invention includes a photo relay having one end on the input side grounded and a conduction variable on the output side as a logic value of a logic function, and a switch unit that switches connection to a power source / a predetermined potential corresponding to a variable of the logic function. A logic circuit is configured using a resistance network having a resistance corresponding to each variable of the logic function, which is connected to the other end of the input side of the photo relay via the switch unit. According to the type of the logic function, it is selected whether the photo relay is of a normally open type or a normally closed type, and it is selected whether to insert a parallel resistance connected in parallel between the terminals on the input side of the photo relay. A voltage at which the photo relay turns on exceeding a threshold value and / or a voltage at which the photo relay turns off not exceeding the threshold value are set as V off is set.

[0028] By the way, electromagnetic relays are used for railway signal control. Electromagnetic relays can be expected to operate stably and ensure safety even in an environment where large amounts of noise and external surges occur frequently (see Non-Patent Document 1). However, it has been studied to use a more compact and power-saving photo relay for railway signal control (see Patent Document 1). In addition, in this type of circuit, a fail-safe logic circuit for enhancing safety has also been proposed conventionally (see Non-Patent Documents 2 and 3). When a photo relay is adopted for this type of control, it is required to ensure the same safety as that of an electromagnetic relay.

[0029] An object of the present invention is to provide a sensor that can be made more compact and power-saving by using a photo relay, and further can detect a failure such as a disconnection.

[0030] A sensor according to the present invention is a sensor in which a sensor switch and a first photo relay connected in series with the sensor switch via a cable and having an input side connected / disconnected according to connection / disconnection of the sensor switch are inserted between a power source and a ground. The sensor includes a first resistor connected in parallel with the sensor switch, and a failure detection LED or a second photo relay connected in series or in parallel with the input side of the first photo relay.

[0031] The sensor according to the present invention may be connected in parallel with the input side of the first photo relay and include a second resistor for setting the threshold value of the first photo relay.

Effects of the Invention

[0032] According to the present invention, a logic circuit using a photo relay with high reliability can be provided.

[0033] According to the present invention, this type of logic circuit can be simulated more simply and intuitively through vision.

Brief Description of the Drawings

[0034]

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Embodiments for Carrying Out the Invention

[0035] Hereinafter, embodiments of the present invention will be described with reference to the drawings.

[0036] The method for configuring a logic circuit using a photo relay according to the present invention realizes a multi-variable logic function by adding a resistor network to the input side of a photo relay, which is newly developed as a photo device and is becoming popular. Threshold multi-variable logic was developed for a domestic parametric computer in the early days of computers.

[0037] The threshold logic initiated by the parametric element is summarized in Non-Patent Document 4 by Professor Saburo Muroga, who was working at the University of Illinois.

[0038] The function f(x) of the threshold logic is defined as in (Equation 1).

[0039] TIFF2025105993000003.tif50106(Equation 1)

[0040] wi is the weight, t is the threshold value, and xi takes a value of 0 or 1. The meaning of the definition is that when the sum of each variable term obtained by multiplying the value of each of the n variables by the weight is equal to or greater than the threshold value t, the function value is 1, and the function value below the threshold value is 0. Here, wi is a positive or negative value.

[0041] In the present invention, for example, the threshold value specific to the photo relay is kept constant, and the resistance value of each resistor of the resistor network as a gate logic circuit connected to the input side is set to wi to give a threshold function.

[0042] For example, the output side of the photo relay can conduct current in both directions, and the logic value of the resistor network on the input side of the photo relay can be applied to the conduction function on the output side. Also, for example, the output side of the photo relay can form a hierarchical logic configuration using a network based on the conduction function.

[0043] When a current flows through the input side of the photo relay, a light-emitting diode (LED (Light Emitting Diode)) that generates light serves as a switch on the input side. On the output side, there is a diode (PD (Photo Diode)) that generates a voltage due to the light emission of the LED, and there is a semiconductor device that conducts in both directions based on that voltage. The excitation coil of the electromagnetic relay is the input LED, and when the excitation coil is excited, the switch mechanism that operates by magnetic force can be regarded as the semiconductor device on the output side.

[0044] In an electromagnetic relay, an electrical circuit is required to absorb the chattering phenomenon caused by mechanical contacts. Since chattering does not occur in a photo relay, an auxiliary circuit is not required. Furthermore, the photo relay has the characteristic that it can achieve a faster logical operation than an electromagnetic relay with mechanical movement. The configured circuit using a resistor network is an analog electrical circuit, so Ohm's law can be applied.

[0045] The threshold value of electrical energy for making the output side of the photo relay conductive or non-conductive, that is, the threshold value of the photo relay, is related to a fixed voltage level and the associated trigger current. An example of the electrical characteristics of the input side of the photo relay is shown in FIG. 1.

[0046] The horizontal axis represents the input supply voltage, and the left side of the vertical axis shows the input terminal voltage of the LED terminal, while the right side shows the input current value. Here, it is the case when an 800Ω series protection resistor is connected. As shown in this Figure 1, the photo relay can realize a logic function by utilizing the displacement of the input power according to the resistance value. Before the input terminal voltage of the input side of the photo relay exceeds the threshold value, the resistance value is large (for example, the measured result is 50KΩ or more), and almost no current flows. However, when the input terminal voltage exceeds the threshold value, the internal resistance becomes several Ω or less (for example, the measured result), and current flows. That is, the resistance value of the input side of the photo relay changes significantly depending on the input terminal voltage. In the previous threshold logic circuits, the coefficient of wi only focused on the voltage, but in the photo relay, it is necessary to handle the logic configuration including the current change due to the threshold value. For example, it has been confirmed that for a photo relay whose output side can pass a maximum current of 5A depending on the AC or DC voltage, when the input side voltage is 1.8V, the current is 3mA or more and 5.4mW of power is required. Even if only the voltage is increased to 1.8V or higher, if no current flows, the output side state will not turn on. There is a difference of tens of thousands of times or more in the resistance value across the threshold value, and this difference is also utilized for setting the logical operation. Generally, such a clear threshold value does not exist in electromagnetic relays. Also, as shown in Figure 1, the input side of the photo relay has a threshold value of about 1V by the LED.

[0047] In this specification, a logic circuit that utilizes the threshold value of the input side of the photo relay is also called a threshold logic function. The symbols described in this specification are defined as follows.

[0048] Definition of voltage variables (unit: volt) Input supply voltage (input supply voltage of the resistor network) E Voltage V that turns on when exceeding the threshold value on Voltage V that turns off when not exceeding the threshold value off Voltage V of the input LED terminal of the photo relay k Definition of current variables (unit: milli - ampere) Maximum allowable input current I of the photo relay max The trigger current I at which the photo relay becomes Von min The current I that maintains the input voltage in the Von state on Based on the characteristic that the internal resistance value on the input side of the photo relay changes by tens of thousands of times or more across the threshold, the basic matters of the resistor network configuration applied to threshold logic will be explained.

[0049] Fig. 2 shows the resistor network connected to the input side of the photo relay.

[0050] The resistor network 20 has a first resistor group 21 and a second resistor group 22 composed of resistors corresponding to the inputs of the logical function. The resistor network 20 is configured to supply the power supply voltage E to one terminal of the input side 12 of the photo relay 10 through the resistor of the first resistor group 21 according to the input of the logical function. The resistor network 20 is configured to connect the resistors of the second resistor group 22 in parallel between both terminals of the input side 12 of the photo relay 10 according to the input of the logical function. Such a resistor network 20 is configured based on the function f(x) of the threshold logic so that the logical value corresponding to the input of the logical function becomes the conduction function of the output side 11 of the photo relay 10.

[0051] Here, the resistance value display of the resistor is defined as follows.

[0052] The internal resistance value R of the input side 12 of the photo relay 10 i The resistance value R of the resistor of the first resistor group 21 s The resistance value R of the resistor of the second resistor group 22 p As described above, when the input of the photo relay 10 exceeds the threshold, the internal resistance R i becomes a low resistance value of about several Ω. Therefore, even with a supply voltage of 3 volts, a current of several amperes flows and it will be damaged. So, it is necessary to connect the protection resistor R s in series.

[0053] When the input internal resistance value of the photo relay 10 changes, the current flowing through the surrounding resistance network 20 also changes. In this specification, the output side 12 defines the logical value as the conduction variable, and the input side 11 defines the power supply connection as logical value 1 and the ground connection as logical value 0. However, this is just an example.

[0054] The reason for setting the ground connection as logical value 0 is that the threshold logic configuration on the input side 11 of the photo relay 10 depends on voltage and the logic function can be changed by current. Therefore, it is for making the logical operation accurate. Note that an event where the function form changes when simply disconnecting instead of grounding has been confirmed. Regarding the faults of the input side 11 and output side 12 of the photo relay 10, it is a separate theory.

[0055] The resistance network 20 with n switches corresponding to n variables connected to the input side 11 of the photo relay 10 will be described in more detail.

[0056] The switch section 23 consisting of switch contacts corresponding to the values of each variable in FIG. 3 is a switch for easily explaining that it becomes logical value 1 when connected to the input supply voltage E and logical value 0 when grounded. The function corresponding to this switch contact can also be replaced by a photo relay.

[0057] In the resistance network 20 of FIG. 3, when all the switch sections 23 are connected to the ground side, the terminal R in the figure t has a resistance value R s / n according to Ohm's law and the voltage is connected to the ground. When all the switch sections 23 are connected to the input supply voltage E, the terminal R t similarly has a resistance value R s / n and is connected to the input supply voltage E.

[0058] Here, a numerical value k is defined to represent a state where any k switch sections 23 are connected to the power supply E side and the remaining n - k are connected to the ground side. Using this value of k, the resistance value on the power supply E side shown in FIG. 3 is R s / k as shown in FIG. 4, and the resistance value on the ground connection side is R s / (n - k).

[0059] When the voltage at the input side 11 of the photo relay 10 does not exceed the threshold value, the internal resistance value R of the input side 11 of the photo relay 10 i >>R s / (n - k), so the value of R i can be regarded as almost infinite, and only the resistance value R s / (n - k) needs to be considered. Therefore, as shown in Fig. 5, the photo relay 10 can be treated as being disconnected from the resistor network 20.

[0060] When the input terminal voltage exceeds the threshold value, it reverses and R s / (n - k) >> R i results in the internal resistance R i being about several ohms. When the value of R s / (n - k) is several digits or more larger than R i , R i ≈ 0 can be considered, and as shown in Fig. 6, the input supply voltage E can be connected to the ground through R s / k.

[0061] Based on the above assumptions, when k switch sections 23 are connected to the input supply voltage E and the remaining n - k switch sections 23 are grounded, the voltage V at the input side 11 of the photo relay 10 k is given by the following equation according to the supply voltage E.

[0062] TIFF2025105993000004.tif51131 (Equation 2)

[0063] When the voltage V k < V off of the input LED, the state shown in Fig. 5 is obtained, and the current I flowing through the resistor network 20 is given by the following equation.

[0064] TIFF2025105993000005.tif3883 (Equation 3)

[0065] When the input terminal voltage V k > V on , the state shown in Fig. 6 is obtained, and the potential difference across R s / k of the resistor network 20 is E - V onAs a result, since the resistance value of the input side 11 of the photo relay 10 can be regarded as Ri≈0, the flowing current is given by the following equation.

[0066] TIFF2025105993000006.tif4173 (Equation 4)

[0067] In the logic circuit 1 shown in FIG. 2 and the like, one end of the photo relay 10 and the second resistor group 22 connected in parallel was grounded, but the present invention is not limited to this, and a predetermined voltage other than 0 may be applied to one end of the photo relay 10 and the second resistor group 22 connected in parallel. Further, as shown in FIG. 7, a variable voltage power supply 26 capable of applying a desired positive voltage and / or negative voltage may be connected to one end of the photo relay 10 and the second resistor group 22 connected in parallel to constitute a logic circuit 1'. By varying the voltage of the variable voltage power supply 26, any desired logic function, such as an OR logic function, an AND logic function, a majority logic function, etc., can be selected.

[0068] Here, as shown in FIG. 8, different logic functions are obtained depending on whether a resistor 25 different from the conventional resistor network 20 is connected in parallel to the input side 11 of the photo relay 10 and whether such a resistor 25 is not connected in parallel (see FIG. 4). These cases will be described below.

[0069] <Case without resistor 25> An embodiment in which there is no resistor 25 for parallel connection to the input side 11 of the photo relay 10 as shown in FIG. 4 will be described. Here, the photo relay 10 is of the normally open type, and a logic circuit of an OR logic function is configured using this photo relay 10.

[0070] In FIG. 4, when k = 0, that is, when all inputs are grounded, V k = 0, so the conduction of the output side 12 of the photo relay 10 is not present.

[0071] The OR logic function can be configured by setting the threshold value such that when the logic value of any one variable is 1, the output side 12 of the photo relay 10 is 1 and the remaining n - 1 variables are 0. The threshold value mentioned here is the electrical energy threshold value for switching the conduction / non - conduction of the output side of the photo relay. Electrical energy is voltage and current as shown in Fig. 1.

[0072] Therefore, if k = 1 in (Equation 2), the OR logic function of n variables is given by the following equation that is independent of the resistance value, so the number of input variables can be determined only by the input supply voltage. The maximum value of n can be determined only by the input supply voltage E.

[0073] V1 = E / n = V on (Equation 5) The current exceeding the threshold value becomes the following equation from (Equation 3).

[0074] I on =(E - V on ) / R s >I min (Equation 6) Here, what should be noted in the configuration of the threshold logic function by the photo relay 10 is that the input side 11 (LED) of the photo relay 10 has the maximum allowable current I max of the photo relay 10.

[0075] The resistance value when all n variables are 1 is R s / n, so the following equation is all the current limiting conditions of the threshold logic function of the photo relay 10.

[0076] (E - V on ) / (R s / n)<I max (Equation 7) 〈When there is a resistor 25〉 Fig. 8 is a circuit diagram of the logic circuit when a parallel resistor 25 with a resistance value R p is connected in parallel between the terminals of the input side 11 of the photo relay 10 according to this embodiment. The photo relay 10 is of the normally open type.

[0077] In the OR logic function, the resistor connected in parallel to the input side of the photo relay can be configured without connection. However, for the AND logic function and the majority logic function, in order to accurately set the threshold value, as shown in FIG. 8, a resistor 25 is connected in parallel between the terminals of the input side 11 of the photo relay 10.

[0078] In FIG. 8, when k out of n inputs are connected to the input supply voltage side with a logic value of 1 and the remaining n - k variables are grounded with a logic value of 0, the resistance value R to be connected in parallel t is given by the following equation.

[0079] TIFF2025105993000007.tif38169 (Equation 8)

[0080] Since k switch units 23 are connected between the power supply E and the terminals of the input side 11 of the photo relay 10, an equivalent resistance of R s / k is connected in series. Therefore, the resistance value R between the input voltage E and the ground (right side in the figure) in FIG. 8 where k out of n switch units 23 are connected to the power supply side k is given by the following equation.

[0081] TIFF2025105993000008.tif30170 (Equation 9)

[0082] The voltage V applied between the terminals of the input side 11 (LED) of the photo relay 10 k is given by the following equation with the resistance value R between the input supply voltage E and the ground k as the denominator and the resistance value R between the terminals t as the numerator.

[0083] TIFF2025105993000009.tif39118 (Equation 10)

[0084] Substituting R s / R p = m into Equation (10) and simplifying, a simplified equation for determining the value of V k is obtained as follows.

[0085] Vk = E·k / (n + m) (Equation 11) The meaning of this (Equation 11) is that when the number of input variables is n and k out of the n switch sections 23 corresponding to the variables are connected to the power supply side, the resistance value R s and the resistance value R p The voltage V k applied across the terminals of the input side 11 of the photo relay 10 is given by (Equation 11). The threshold logic function can be set based on (Equation 11) according to which integer of k is used to set the threshold of the photo relay 10 with n input variables.

[0086] By setting the value of k, an AND logic function and a majority logic function can be configured as follows.

[0087] 〈AND Logic Function〉 The AND logic function is configured by the circuit shown in Fig. 8, and the photo relay 10 is of the normally open type.

[0088] Since the AND logic function becomes 1 only when the logical values of all variables of n variables become 1, in (Equation 10), when k = n, the value V n when all variable logical values are 1 is set to a voltage higher than the threshold value V on Therefore, the following equation is the condition.

[0089] V n = E / (1 + m / n)> V on (Equation 12) Also, when setting the threshold of the AND logic function to 0 up to n - 1 variables, it is necessary to make the voltage lower than V off To satisfy that condition, with k in (Equation 11) being n - 1, the following equation where V n―1 is also a condition.

[0090] V n―1 = E·(n - 1) / (n + m)< V off (Equation 13) When all variables of the AND logic function become 1, since the resistance value becomes R s / n, I on becomes the following equation.

[0091] I on =(E – V on ) / (R s / n)>I min (Equation 14) 〈Majority Logic Function〉 The majority logic function is similarly composed of the circuit shown in Fig. 8, and the photo relay 10 is of the normally open type.

[0092] The majority logic function is a majority logic function for any n, satisfying the minimum integer k > n / 2, and any majority logic function can be composed under the conditions of the following equation from Equation (11).

[0093] V k =E·k / (n + m)>V on (Equation 15) The majority logic function also has the following limiting conditions similar to the AND logic function.

[0094] V k―1 =E·(k – 1) / (n + m)<V off (Equation 16) I exceeding the threshold value of the majority logic function on is as follows. I on =(E – V on ) / (R s / k)>I min (Equation 17) 〈NAND Logic Function · NOR Logic Function〉 By setting the photo relay 10 to the normally closed type and configuring the resistor network 20 in the same way as in the case of the above OR logic function, a logic circuit 1 for realizing the NOR logic function can be configured.

[0095] By setting the photo relay 10 to the normally closed type and configuring the resistor network 20 in the same way as in the case of the above AND logic function, a logic circuit 1 for realizing the NAND logic function can be configured.

[0096] 〈EXOR (Exclusive OR) Logic Function〉 FIG. 9 is a diagram showing the configuration of a logic circuit that realizes an EXOR logic function according to an embodiment of the present invention.

[0097] As shown in FIG. 9, a logic circuit 30 that realizes an EXOR logic function includes first and second photo relays 40 and 50, and a resistor network 60.

[0098] Both the first and second photo relays 40 and 50 are of the normally open type, and the output side 41 of the first photo relay 40 and the output side 51 of the second photo relay 50 are connected in parallel. Let the output value, that is, the value of the conduction function, be X.

[0099] The resistor network 60 connects a first switch unit 61 that switches the connection to power / ground corresponding to the first variable A of the EXOR logic function to one end of the input side 42 of the first photo relay 40, and a second switch unit 62 that switches the connection to power / ground corresponding to the second variable B of the EXOR logic function to one end of the input side 52 of the second photo relay 50, and connects the first and second switch units 61 and 62 to the other ends of the input sides 42 and 52 of the first and second photo relays 40 and 50 via resistors 63 and 64.

[0100] Here, the EXOR logic function is a logic function in which X is 0 when the first variable A and the second variable B have equal values, and X is 1 when they have different values.

[0101] When the first variable A and the second variable B are connected to ground or the supply voltage, the potential becomes below the threshold value, so no current flows through the input sides 42 and 52 of the first and second photo relays 40 and 50.

[0102] Therefore, since no current flows through both the input sides 42 and 52 of the first and second photo-relays 40 and 50, the value of the conduction function is X = 0. When either the first variable A or the second variable B remains grounded and the supply voltage is applied to the other, the resistors 63 and 64 are connected in series. Thus, a voltage corresponding to 1 / 2 of the input voltage is generated on one side, and conduction occurs on the output sides 41 and 51. Since the output sides 41 and 51 are connected in parallel, if either one conducts, the value of the conduction function becomes X = 1.

[0103] Note that the resistance values of the two resistors 63 and 64 need to satisfy the condition that they are within the input limit current by the aforementioned photo-relays 40 and 50 with respect to the input supply voltage E. Also, when the output sides 41 and 51 conduct, a reverse voltage is applied to the photo-relay 40 or 50 that is not involved in the conduction. Thus, the allowable reverse voltage V rev The following input supply voltage E is required.

[0104] 〈Logic Circuit with FTC (Fault Tolerant Circuit) Function and Fault Detection Function〉 FIG. 10 is a diagram showing the configuration of a logic circuit having an FTC function and a fault detection function according to an embodiment of the present invention.

[0105] The logic circuit 70 shown in FIG. 10 includes a relay group 71 composed of first to fourth logic circuits E1, E2, E3, and E4 to which variables of the same logic function with the same configuration are input. Each of the first to fourth logic circuits E1, E2, E3, and E4 is, for example, the logic circuit 1 that realizes the majority logic function described in the above embodiment.

[0106] In the relay group 71, the output side of the first logic circuit E1 (the output side 12 of the photo relay 10 of the logic circuit 1 shown in FIG. 1, the same applies hereinafter) and the output side of the second logic circuit E2 are connected in series, the output side of the third logic circuit E3 and the output side of the fourth logic circuit E4 are connected in series, and the output side of the first logic circuit E1 and the second logic circuit E2 connected in series and the output side of the third logic circuit E3 and the fourth logic circuit E4 connected in series are connected in parallel. i - j becomes the output side (value of the conduction function) of this relay group 71, that is, the logic circuit 70.

[0107] The bidirectional LED 72 as the detection unit is inserted between the first connection part between the output side of the first logic circuit E1 and the output side of the second logic circuit E2 and the second connection part between the output side of the third logic circuit E3 and the output side of the fourth logic circuit E4, and lights up when there is a current flow in either direction between these. The bidirectional LED 72 detects the presence or absence of the current flow between the first connection part and the second connection part. The detection unit only needs to have such a function and is not limited to the bidirectional LED. For example, a pair of light - emitting diodes with different conduction directions may be used.

[0108] FIG. 10 shows the case where there is a fault in the first logic circuit E1 and the value on the output side becomes 0 continuously. When there is no fault in the second to third logic circuits E2, E3, E4 and they are normal, even if the values on the output sides of the second to third logic circuits E2, E3, E4 become 1, the value on the output side of the first logic circuit E1 is 0. Therefore, through the third logic circuit E3, current flows not only to the output side of the fourth logic circuit E4 but also to the second logic circuit E2, and the bidirectional LED 72 lights up. Thus, even if any one of the four logic circuits E2, E3, E4 fails, it is possible to detect that there is a fault in any one of the four logic circuits E2, E3, E4 while maintaining the normal function as the majority - decision logic function. In the logic circuit 70 according to this embodiment, since each of the logic circuits E2, E3, E4 realizes the majority - decision logic function with one photo relay, such a function can be realized with four photo relays, that is, a very small number of photo relays.

[0109] Note that the present invention can also be applied to a logic circuit that realizes another logic function according to the embodiments already described, rather than a majority logic function.

[0110] 〈Logic Circuit with FTC Applied〉 FIG. 11 is a configuration example of a logic circuit with FTC applied.

[0111] In FIG. 11, X, Y, and Z each represent a variable of the majority logic function, and the input sides of six photo-devices corresponding to these variables X, six photo-devices corresponding to Y, and six photo-devices corresponding to Z are respectively in correspondence. For example, if the variable X is 0, the output sides of the six photo-devices are 0, and if the variable X is 1, the output sides of the six photo-devices are 1.

[0112] That is, this logic circuit 80 has first to fourth photo-devices to which the first variable (X) of the majority logic function is input on the input side, fifth to eighth photo-devices to which the second variable (Y) of the majority logic function is input on the input side, and ninth to twelfth photo-devices to which the third variable (Z) of the majority logic function is input on the input side.

[0113] When the conduction variable f on the output side of the logic circuit 80 ij is set, as a logical formula f ij = XYXY + XZXZ + YXYX + YZYZ + ZYZY + ZXZX is satisfied, the output sides of the first to twelfth photo-devices are connected to be configured. The logic circuit 80 shown in FIG. 11 shows this connection configuration.

[0114] Here, when a voltage is applied between i and j of the logic circuit 80 and a current flows from i to j, the current i is input to the output sides of three photo-devices: a photo-device to which the first variable (X) of the majority logic function is input on the input side, a photo-device to which the second variable (Y) of the majority logic function is input on the input side, and a photo-device to which the third variable (Z) of the majority logic function is input on the input side. Let the outputs of these three output sides be X, Y, and Z respectively.

[0115] X is input to the two output sides of a photo - device where the second variable (Y) of the majority - logic function is input to the input side and a photo - device where the third variable (Z) of the majority - logic function is input to the input side. Let the outputs of these two output sides be XY and XZ respectively.

[0116] Y is input to the two output sides of a photo - device where the first variable (X) of the majority - logic function is input to the input side and a photo - device where the third variable (Z) of the majority - logic function is input to the input side. Let the outputs of these two output sides be YX and YZ respectively.

[0117] Z is input to the two output sides of a photo - device where the second variable (Y) of the majority - logic function is input to the input side and a photo - device where the first variable (X) of the majority - logic function is input to the input side. Let the outputs of these two output sides be ZY and ZX respectively.

[0118] XY is input to one output side of a photo - device where the first variable (X) of the majority - logic function is input to the input side. Let the output of this one output side be XYX.

[0119] XZ is input to one output side of a photo - device where the first variable (X) of the majority - logic function is input to the input side. Let the output of this one output side be XZX.

[0120] YX is input to one output side of a photo - device where the second variable (Y) of the majority - logic function is input to the input side. Let the output of this one output side be YXY.

[0121] YZ is input to one output side of a photo - device where the second variable (Y) of the majority - logic function is input to the input side. Let the output of this one output side be YZY.

[0122] ZY is input to one output side of a photo - device where the third variable (Z) of the majority - logic function is input to the input side. Let the output of this one output side be ZYZ.

[0123] ZX is input to one output side of a photo device where the third variable (Z) of the majority logic function is input to the input side. Let the output of this one output side be ZXZ.

[0124] YXY and ZXZ are input to one output side of a photo device where the first variable (X) of the majority logic function is input to the input side. Let the output of this one output side be YXYX + ZXZX.

[0125] XYX and ZYZ are input to one output side of a photo device where the second variable (Y) is input to the input side. Let the output of this one output side be XYXY + ZYZY.

[0126] YZY and XZX are input to one output side of a photo device where the third variable (Z) of the majority logic function is input to the input side. Let the output of this one output side be YZYZ + XZXZ.

[0127] Therefore, the output on the j side is YXYX + ZXZX + XYXY + ZYZY + YZYZ + XZXZ.

[0128] That is, in the logic circuit 80 configured in this way, f ij = XYXY + XZXZ + YXYX + YZYZ + ZYZY + ZXZX holds.

[0129] Here, in the logic circuit 80 shown in FIG. 11, even if there is a disconnection or short - circuit failure in the photo device corresponding to X surrounded by a circle, for example, the normal function as a majority logic function can be maintained. This will be explained in the <Method for simulating a logic circuit using a logic circuit> described later.

[0130] An FTC that can withstand one fault in a logic circuit that realizes a majority logic function using relays is known to be realized by quadruplication. On the other hand, in the logic circuit 80 according to the present embodiment, as shown in FIG. 11, it can be triplicated, that is, composed of 18 photo devices. Therefore, the number of photo devices can be reduced.

[0131] Note that the present invention is also applicable to electromagnetic relays and the like.

[0132] 〈Sensor capable of detecting faults such as disconnection〉 FIG. 12 is a circuit diagram showing the configuration of a sensor capable of detecting faults such as disconnection according to an embodiment of the present invention.

[0133] As shown in FIG. 12, the sensor 140 includes a sensor switch 101 and a normally open photo relay 103 connected in series with the sensor switch 101 via a cable 105. One end of the sensor switch 101 is connected to the cable 105, and the other end is grounded. One end of the input side of the photo relay 103 is connected to the cable 105, and the other end is connected to a power supply E to which a DC voltage of 3V is applied. A resistor 102 is connected in parallel to the sensor switch 101, and a resistor 108 is connected in series to the input side of the photo relay 103. A resistor 110 for setting a threshold value is connected in parallel to the input side of the photo relay 103. An LED 109 that lights up at about 0.5 mA for fault detection is inserted in parallel with the input side of the photo relay 103. One end of the LED 109 is connected to the cable 105 via a resistor 107, and the other end of the LED 109 is connected to the power supply E.

[0134] When the sensor switch 101 is off, a voltage below the threshold value is applied to the photo relay 103, and it becomes off in the same manner as the sensor switch 101. When the sensor switch 101 is on, a voltage above the threshold value is applied to the photo relay 103, and it becomes on in the same manner as the sensor switch 101. Thereby, the sensor 140 detects the connection / disconnection of, for example, a remote sensor switch 101 on the output side of the photo relay 103.

[0135] In this embodiment, the voltage of the power supply E was set to 3V, the resistance value of resistor 102 was set to 1KΩ, the resistance value of resistor 108 was set to 1KΩ, the resistance value of resistor 107 was set to 2kΩ, and the resistance value of resistor 110 was set to 2kΩ. When the voltage of the power supply E was 5V, the resistance value of resistor 110 was set to 470Ω. That is, in this embodiment, a high-resistance resistor 102 is connected in parallel to the sensor switch 101 that is normally open, and the conducting state is constantly monitored with a low voltage and current. When the sensor switch 101 is closed, a voltage and current exceeding the threshold value of the photo relay 103 are applied.

[0136] In the sensor 140 according to this embodiment, by utilizing the fact that the LED 109 lights up at about 0.5mA, a weak current is passed through the LED 109 to confirm the conducting state. That is, when this sensor 140 is normal, the power supply E is connected to the ground side of the sensor switch 101 via resistor 107 etc., a weak current flows and the LED 109 lights up. However, if there is a disconnection fault in the cable 105 or a poor contact in the connector (not shown), the power supply E is not grounded via resistor 107 etc., the current does not flow, and the LED 109 goes out. Thus, in the sensor 140 according to this embodiment, disconnection faults in the cable 105 and poor contacts in the connector (not shown) etc. can be constantly monitored by the LED 109.

[0137] In the above embodiment, the sensor switch 101 is of the normally open type. However, if it is of the normally closed type, faults in the sensor switch 101 can also be detected and distinguished from faults in the photo relay 103 system.

[0138] In the present invention, a photo relay may be used instead of the LED 109. Also, the photo relay 103 and the LED 109 (or photo relay) may be connected in series.

[0139] 〈Simulation method of logic circuit〉 In the conduction function simulator according to this embodiment, typically, in a computer system, a program for configuring a logic circuit using relay elements on its screen as a display unit and executing simulation of the logic circuit is implemented in the computer system.

[0140] In the conduction function simulator according to this embodiment, circuit elements such as relay elements and connection lines exist as one object each. By arranging the circuit elements on the screen and connecting them with connection lines, a logic circuit using relay elements can be configured, and its simulation can be executed. Specifically, it is as follows.

[0141] Circuit elements handled by the conduction function simulator according to this embodiment include, in addition to relay elements and connection lines, a power source and a resistor. Relay elements include a magnetic relay and a photo relay.

[0142] The magnetic relay has three types: open (a contact) in the non-excited state, closed (b contact) in the non-excited state, and contact switching (c contact) in the non-excited / excited state, and has a terminal for excitation (sw). Therefore, the terminals are {r, a, b, sw}.

[0143] The photo relay has normally open (type a) and normally closed (type b).

[0144] The connection line processes the connection between contacts as a connection between two points. The power source includes the logic use (potential) [Zero, True] and excitation use [ON, OFF] for the magnetic relay. This value for excitation use indicates that when the two terminals of sw have opposite logic values, the relay reacts. When the connection line is not connected to the terminal sw in the actual simulation, the excitation use value can be directly input to sw. As values handled by the photo relay, three values of logic use (potential) [Uncertain, Zero, True] are used, and the evaluation of the values shall be as shown in the truth value table of the following elements.

[0145] TIFF2025105993000010.tif55114

[0146] In circuit design, when connecting the sw terminals individually, a logical value can be passed to obtain a value for excitation.

[0147] In the conduction function simulator according to this embodiment, the following are used as test data.

[0148] For contact excitation Number of test patterns: Rn List of contact names: ["R1", "R2", ···, "Rx"] Input data: [[Data sequence corresponding to the contact name] × Rn] For power supply Number of test patterns: Pn List of power supply names: ["PowerR1", "PowerR2,..., "PowerRx"] Input data: [[Data sequence corresponding to the power supply name] × Pn] The outline of the logical calculation is as follows.

[0149] (1) Since the relay logic circuit is an undirected graph in which current flows bidirectionally, it cannot be treated like a general logic simulator. Therefore, it was decided to verify the phenomenon that current flows from the higher potential to the lower potential.

[0150] (2) Verification algorithm a. Initialize (set to Zero) all contacts and each terminal of the connection wires.

[0151] i. Apply excitation data to the contacts and apply power (set to True).

[0152] iii. According to the classification of contacts a, b, and c, flow the True value in the direction from the True value to the Zero value and set it to True.

[0153] iv. For the connection wires as well, flow the True value in the direction from the True value to the Zero value and set it to True.

[0154] v. Repeat steps iii to iv more times than the number of connection stages of the relay logic circuit.

[0155] (3) Test data pattern a. The data sequence as a logic circuit is passed through the excitation pattern.

[0156] b. Therefore, the power supply application pattern is fixed at the time of circuit design, and the simulation of the relay logic circuit is completed.

[0157] c. Verification of the circuit's bidirectionality and addition of fault locations can be implemented by applying the power supply application pattern at any location for verification.

[0158] d. Therefore, as a simulation, simulations of the number of times of the excitation test pattern Rn × the power supply test pattern Pn will be performed.

[0159] Here, in order to evaluate the effectiveness of the circuit as an undirected graph, a simulation is performed in which the current flows from the higher potential to the lower potential. Therefore, after each state simulation is completed, the voltage of each terminal must be cleared to the Zero value. This is a necessary measure for the simulation of the electrical circuit as an undirected graph. In the real world, indicating the value Zero means being in an earthed state and must become Zero.

[0160] That is, the conduction function simulator according to the present embodiment connects each circuit element such as a relay element and a connection wire to form a logic circuit, inputs a voltage corresponding to the variable of the logic function to the input side of the relay element, and shows the voltage application state of each circuit element assuming that a current flows from the terminal with a higher potential to the terminal with a lower potential at both terminals of each circuit element, and obtains a conduction variable as the logic value of the logic function from the output side of the relay element.

[0161] Conventional logic simulators use AND and OR logic gates, and the direction of current is unidirectional. Therefore, in the case of relay elements including magnetic relays and photo relays where current flows in both directions, it is necessary to set conduction functions for each direction of current flow and perform multiple simulations. In contrast, the conduction function simulator according to the present embodiment only needs to perform one simulation. Further, the conduction function simulator according to the present embodiment can handle not only direct current but also alternating current.

[0162] Next, an example of simulating the FTC-converted logic circuit shown in FIG. 11 using the conduction function simulator according to the present embodiment will be described.

[0163] FIG. 13 shows a state in which a program for executing simulation of a logic circuit using a photo relay in a computer system is started, and the FTC-converted logic circuit shown in FIG. 11 is configured on the screen.

[0164] In FIG. 13, the configured logic circuit is shown in most of the upper region of the screen. In this circuit, the regions surrounded by square boxes are circuit elements excluding connection lines. The dotted lines indicate connection lines. The connection lines indicate the state where no voltage is applied (grounded) by dotted lines, and when a voltage is applied, the dotted lines become solid lines.

[0165] Each region surrounded by a square box in the lower region of the screen is a button for executing various commands. For example, when the "simulation" button is clicked, the simulation of the logic circuit displayed on the screen is executed. Also, when "fault setting" is clicked after clicking a predetermined part of the logic circuit on the screen, the predetermined part can be set as a fault. As faults, for example, disconnection or short circuit of connection lines or relay elements can be set.

[0166] The simulation results are displayed in the region between the circuit display region in the upper part of the screen and the command button display region in the lower part of the screen.

[0167] Figure 13 shows the state in which all contacts and each terminal of the connection lines are initialized (set to zero) (the above-mentioned "(2) Verification algorithm a."). In this state, no results are shown in the simulation result display area of Figure 13.

[0168] Execute the simulation from the state shown in Figure 13.

[0169] That is, as per the above-mentioned "(2) Verification algorithm", a. Apply excitation data to the contacts and apply power (set to True).

[0170] b. According to the classification of contacts a, b, and c, let the True value flow in the direction from the True value to the Zero value, and set it to True.

[0171] c. For the connection lines as well, let the True value flow in the direction from the True value to the Zero value, and set it to True.

[0172] d. Repeat steps b to c for more stages of connection of the relay logic circuit.

[0173] Figure 14 shows applying excitation data to the contacts of "X0_E-net" to "X5_E-net", "Y0_E-net" to "Y5_E-net", and "Z0_E-net" to "Z5_E-net", and applying power (set to True) from the "Y0_E-net.r" side (verification algorithm a.). At that time, execute "verification algorithm b." and "verification algorithm c.". The grounded (Z5_E-net.a) side in the simulation result of Figure 14 is zero.

[0174] Displayed in the simulation result display area of Figure 14 X0_E-net.sw0, Y0_E-net.sw0, Z0_E-net.sw0, Y0_E-net.r, Z5_E-net.a Zero, Zero, Zero, True, Zero indicates the above situation.

[0175] That is, the situation in FIG. 14 indicates that in the majority logic circuit shown in FIG. 11, when X = 0, Y = 0, and Z = 0, the logic value of this majority logic circuit is 0.

[0176] FIG. 15 shows the result when X = 0, Y = 0, and Z = 1. (The bottom row of the simulation result display area, and the same applies hereinafter.) FIG. 16 shows the result when X = 0, Y = 1, and Z = 0.

[0177] FIG. 17 shows the result when X = 1, Y = 1, and Z = 0.

[0178] FIG. 18 shows the result when X = 0, Y = 1, and Z = 1.

[0179] FIG. 19 shows the result when X = 1, Y = 0, and Z = 1.

[0180] FIG. 20 shows the result when X = 1, Y = 1, and Z = 1.

[0181] As described above, regarding "Verification Algorithm O.", that is, it is equivalent to repeating steps U to E more times than the number of connection stages of the relay logic circuit.

[0182] From the above simulation results, it can be confirmed that the majority logic circuit shown in FIG. 11 is operating normally.

[0183] As described above, for example, after clicking on a predetermined part of the logic circuit on the screen shown in FIG. 13 and then clicking on "Fault Setting", the predetermined part can be set as a fault. Examples of faults include disconnection or short - circuit of connection lines or relay elements.

[0184] FIG. 21 shows a screen for setting a simulation to check whether this FTC - converted relay element operates normally as a majority logic circuit when one of the connection lines is disconnected. In the figure, the display with an 'X' over '0' is called a 0 - fault and means disconnection. Note that the display with an 'X' over '1' is called a 1 - fault and means short - circuit.

[0185] Simulations corresponding to FIGS. 14 to 20 are shown in FIGS. 22 to 27.

[0186] FIG. 28 is a screen showing a setting of a simulation as to whether the FTC-converted relay element operates normally as a majority logic circuit when one part of the photo-device as the relay element is open-circuited.

[0187] Simulations corresponding to FIGS. 14 to 20 are shown in FIGS. 28 to 34.

[0188] It can be seen that the values in the simulation result display area in FIG. 27 and the values in the simulation result display area in FIG. 34 are consistent with the values in the simulation result display area in FIG. 20. Therefore, in the FTC-converted relay element 80 shown in FIG. 11, it can be verified by the simulation according to the present invention that even if one circuit element has a fault such as an open circuit or a short circuit, the normal function as a majority logic function can be maintained.

[0189] In addition, the simulator according to the present invention can set a circuit for performing a simulation by arranging objects corresponding to circuit elements on a screen, and further can grasp the flow of current and the like in the simulation on the screen. Therefore, for example, when there is a problem in the circuit design, the cause can be intuitively grasped through vision.

[0190] The present invention is not limited to the above-described embodiments, and can be variously modified and implemented, and the scope of its implementation also belongs to the technical scope of the present invention.

Description of Reference Numerals

[0191] 1 Logic circuit 10 Photo relay 11 Input side of photo relay 12 Output side of photo relay 20 Resistance network 21 First resistance group 22 Second resistance group E Input supply voltage 1' Logic Circuit 23 Switch Section 24 Resistor 25 Parallel Resistor 26 Variable Voltage Power Supply 30 Logic Circuit 40 First Photo Relay 41 Output Side of the First Photo Relay 42 Input Side of the First Photo Relay 50 Second Photo Relay 51 Output Side of the Second Photo Relay 52 Input Side of the Second Photo Relay 60 Resistance Network 61 First Switch Section 62 Second Switch Section 63 Resistor 64 Resistor 70 Logic Circuit 71 Relay Group 72 Bidirectional LED E1 First Logic Circuit E2 Second Logic Circuit E3 Third Logic Circuit E4 Fourth Logic Circuit 80 FTC-Converted Logic Circuit 140 Sensor 101 Sensor Switch 102 Resistor 103 Normally Open Photo Relay 105 Cable 107 Resistor 108 Resistor 109 LED

Claims

1. A photo relay, A pair of resistors and a switch unit are provided, which are connected in series, where the switch unit is inserted between one end of the input side of the photo relay and a power source and / or connected in parallel with both ends of the input side of the photo relay, and the switch unit switches between conduction and non-conduction according to a resistor and the input of a logic circuit. A plurality of the pairs of resistors and switch units are combined and configured such that the output of the logic circuit is obtained as a conduction function on the output side of the photo relay. When conducting, the switch unit connects the resistor to the power source side, and when non-conducting, the switch unit connects the resistor to the ground side. A logic circuit using a photo relay.

2. A logic circuit using a photo relay according to Claim 1, having a plurality of the photo relays, configured by combining a plurality of the pairs of resistors, switch units, and the plurality of photo relays such that the output of the logic circuit is obtained as a conduction function on the output side of the photo relay. A logic circuit using a photo relay.

Citation Information

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