Encoder, decoding device, and bitstream transmitter
The encoding apparatus optimizes video coding by deriving correction parameters from specific regions within large blocks, enhancing efficiency and speed while minimizing memory usage, addressing the challenges of existing video coding technologies.
Patent Information
- Application Number
- JP2025076817
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2018-10-22
- Filing Date
- 2025-05-02
- Publication Date
- 2025-07-17
- Estimated Expiration
- 2039-10-18
AI Technical Summary
Existing video coding technologies face challenges in improving encoding efficiency, image quality, reducing processing volume, and circuit scale, while also requiring appropriate selection of elements or operations such as filters, blocks, motion vectors, and reference pictures.
An encoding apparatus that determines the size of a processing target block and derives correction parameters using reconstructed images around a specific processing unit within the block, allowing for efficient correction processing when the block exceeds a predetermined size, thereby reducing the need for redundant parameter derivation and memory usage.
This approach enhances encoding efficiency, improves processing speed, and reduces memory requirements by optimizing the use of correction parameters and operations, leading to improved image quality and reduced processing complexity.
Smart Images

Figure 2025107356000001_ABST
Abstract
Description
Technical Field
[0001] The present disclosure relates to video coding, for example, systems, components, and methods in video encoding and decoding, etc.
Background Art
[0002] Video coding technology has advanced from H.261 and MPEG-1 to H.264 / AVC (Advanced Video Coding), MPEG-LA, H.265 / HEVC (High Efficiency Video Coding), and H.266 / VVC (Versatile Video Codec). Along with this progress, it is always necessary to provide improvements and optimizations to video coding technology in order to process the continuously increasing amount of digital video data in various applications.
[0003] Non-Patent Document 1 relates to an example of a conventional standard regarding the video coding technology described above.
Prior Art Documents
Non-Patent Documents
[0004]
Non-Patent Document 1
Summary of the Invention
Problems to be Solved by the Invention
[0005] Regarding the encoding method as described above, in order to improve encoding efficiency, improve image quality, reduce processing volume, reduce circuit scale, or make an appropriate selection of elements or operations such as filters, blocks, sizes, motion vectors, reference pictures, or reference blocks, etc., a new method is desired to be proposed.
[0006] The present disclosure provides a configuration or method that can contribute to, for example, improvement of encoding efficiency, improvement of image quality, reduction of processing amount, reduction of circuit scale, improvement of processing speed, and appropriate selection of elements or operations. Note that the present disclosure may include a configuration or method that can contribute to benefits other than the above.
Means for Solving the Problems
[0007] For example, an encoding apparatus according to one aspect of the present disclosure includes a circuit and a memory connected to the circuit. In operation, the circuit determines whether the size of a processing target block of an image is larger than a predetermined size. When the size of the processing target block is not larger than the predetermined size, a correction parameter is derived using a reconstructed image around the processing target block, and correction processing for the processing target block is performed based on the derived correction parameter. When the size of the processing target block is larger than the predetermined size, the correction parameter is derived using only the reconstructed image around a processing unit of the predetermined size located at the upper left in the processing target block among the reconstructed images around the processing target block, and correction processing for the processing target block is performed based on the derived correction parameter.
[0008] Some implementations of the embodiments in the present disclosure may improve encoding efficiency, may simplify encoding / decoding processing, may increase the encoding / decoding processing speed, or may efficiently select appropriate components / operations used for encoding and decoding, such as appropriate filters, block sizes, motion vectors, reference pictures, reference blocks, etc.
[0009] Further advantages and effects in one aspect of the present disclosure will be apparent from the specification and the drawings. Such advantages and / or effects can be obtained by some embodiments and the features described in the specification and the drawings, respectively, but not all are necessarily provided in order to obtain one or more advantages and / or effects.
[0010] Note that these general or specific aspects may be implemented in a system, a method, an integrated circuit, a computer program, a recording medium, or any combination thereof.
Advantages of the Invention
[0011] The configuration or method according to an aspect of the present disclosure may contribute to, for example, one or more of improvement in coding efficiency, improvement in image quality, reduction in processing amount, reduction in circuit scale, improvement in processing speed, and appropriate selection of elements or operations. Note that the configuration or method according to an aspect of the present disclosure may contribute to benefits other than those described above.
Brief Description of the Drawings
[0012]
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DETAILED DESCRIPTION OF THE INVENTION
[0013] An encoding device according to one aspect of the present disclosure includes a circuit and a memory connected to the circuit. In operation, when the size of a processing target block of an image is larger than a predetermined size, the circuit derives correction parameters using only the reconstructed image around a processing unit of the predetermined size located at the upper left in the processing target block among the reconstructed images around the processing target block, and performs correction processing on the processing target block based on the derived correction parameters.
[0014] As a result, it is possible to obtain all the signals necessary to derive correction parameters for the processing target block by using only the reconstructed images around a processing unit of a predetermined size located at the upper left in the processing target block, so that the processing speed can be improved. Further, it is possible to match the processing results between the case where correction processing is performed for each processing target block and the case where the processing target block is divided into a plurality of processing units of a predetermined size and correction processing is performed for each such processing unit. Also, among the reconstructed images adjacent to the periphery of the processing target block, only the reconstructed images adjacent to the periphery of the region corresponding to the processing unit of a predetermined size located at the upper left in the processing target block are used, so that the amount of memory for storing the reconstructed images can be reduced.
[0015] For example, when the size of the processing target block is larger than the predetermined size, the circuit divides the processing target block into a plurality of processing units of the predetermined size, derives the correction parameters for the processing unit located at the upper left in the processing target block, and commonly uses the derived correction parameters for the plurality of processing units within the processing target block, whereby correction processing may be performed for each of the plurality of processing units.
[0016] As a result, there is no need to newly derive correction parameters for processing units other than the processing unit located at the upper left in the processing target block, so that the processing amount can be reduced and the processing speed can be improved.
[0017] For example, in the LIC process of inter prediction, when the size of the processing target block is larger than the predetermined size, the circuit uses the reconstructed image around the processing unit located at the upper left in the processing target block and the reconstructed image around the reference block corresponding to the processing unit located at the upper left to derive LIC correction parameters, and performs correction processing on the predicted image of the processing target block by LIC processing using the derived LIC correction parameters.
[0018] As a result, when performing LIC processing on the predicted image of the processing unit located at the upper left in the processing target block, all signals necessary for deriving the correction parameter for the LIC processing of the predicted image of the processing target block can be acquired, so that the processing speed can be improved. Further, it is possible to match the processing results between the case where LIC processing is performed for each processing target block and the case where the processing target block is divided into a plurality of processing units of a predetermined size and LIC processing is performed for each such processing unit. Also, among the reconstructed images adjacent to the periphery of the processing target block, only the reconstructed images adjacent to the periphery of the region corresponding to the processing unit of the predetermined size located at the upper left in the processing target block are used, so that the amount of memory for storing the reconstructed images can be reduced.
[0019] For example, the predetermined size may be the size of a pipeline processing unit.
[0020] As a result, a processing unit of an appropriate size can be set based on the size of the pipeline processing unit, so that the amount of memory to be implemented can be appropriately reduced.
[0021] For example, the predetermined size may be 64×64 pixels.
[0022] As a result, the amount of memory to be implemented can be appropriately reduced.
[0023] Also, a decoding apparatus according to an aspect of the present disclosure includes a circuit and a memory connected to the circuit. In operation, when the size of a processing target block of an image is larger than a predetermined size, among the reconstructed images around the processing target block, only the reconstructed images around the processing unit of the predetermined size located at the upper left in the processing target block are used to derive a correction parameter, and correction processing for the processing target block is performed based on the derived correction parameter.
[0024] As a result, it is possible to obtain all signals necessary for deriving correction parameters for the processing target block by using only the reconstructed images around a processing unit of a predetermined size located in the upper left corner in the processing target block, so that the processing speed can be improved. Furthermore, it is possible to match the processing results between the case of performing correction processing for each processing target block and the case of dividing the processing target block into a plurality of processing units of a predetermined size and performing correction processing for each such processing unit. Also, among the reconstructed images adjacent to the periphery of the processing target block, only the reconstructed images adjacent to the periphery of the region corresponding to the processing unit of a predetermined size located in the upper left corner in the processing target block are used, so that the amount of memory for storing the reconstructed images can be reduced.
[0025] For example, when the size of the processing target block is larger than the predetermined size, the circuit divides the processing target block into a plurality of processing units of the predetermined size, derives the correction parameters for the processing unit located in the upper left corner in the processing target block, and commonly uses the derived correction parameters for the plurality of processing units within the processing target block, so that correction processing for each of the plurality of processing units may be performed.
[0026] As a result, there is no need to newly derive correction parameters for other pipeline processing units than the first pipeline processing unit in the processing target block, so that the processing amount can be reduced and the processing speed can be improved.
[0027] For example, in the LIC process of inter prediction, when the size of the processing target block is larger than the predetermined size, the circuit derives LIC correction parameters by using the reconstructed images around the processing unit located in the upper left corner in the processing target block and the reconstructed images around the reference block corresponding to the processing unit located in the upper left corner, and performs correction processing by the LIC process on the predicted image of the processing target block by using the derived LIC correction parameters.
[0028] As a result, when performing LIC processing on the predicted image of the processing unit located in the upper left of the processing target block, all signals necessary for deriving the correction parameters for the LIC processing of the predicted image of the processing target block can be acquired, thus enabling improvement in the processing speed. Further, it is possible to make the processing results match between the case of performing LIC processing for each processing target block and the case of dividing the processing target block into a plurality of processing units of a predetermined size and performing LIC processing for each such processing unit. Also, among the reconstructed images adjacent to the periphery of the processing target block, only the reconstructed images adjacent to the periphery of the region corresponding to the processing unit of the predetermined size located in the upper left of the processing target block are used, so that it is possible to reduce the memory amount for storing the reconstructed images.
[0029] For example, the predetermined size may be a pipeline processing unit.
[0030] As a result, since a processing unit of an appropriate size can be set based on the size of the pipeline processing unit, the memory amount to be implemented can be appropriately reduced.
[0031] For example, the predetermined size may be 64×64 pixels.
[0032] As a result, the memory amount to be implemented can be appropriately reduced.
[0033] Also, in the encoding method according to one aspect of the present disclosure, when the size of the processing target block of the image is larger than a predetermined size, among the reconstructed images around the processing target block, only the reconstructed images around the processing unit of the predetermined size located in the upper left of the processing target block are used to derive correction parameters, and correction processing for the processing target block is performed based on the derived correction parameters.
[0034] As a result, it is possible to obtain all the signals necessary for deriving correction parameters for the processing target block by using only the reconstructed images around a processing unit of a predetermined size located at the upper left in the processing target block, so that the processing speed can be improved. Further, it is possible to match the processing results between the case where correction processing is performed for each processing target block and the case where the processing target block is divided into a plurality of processing units of a predetermined size and correction processing is performed for each such processing unit. Also, since only the reconstructed images adjacent to the periphery of the region corresponding to the processing unit of the predetermined size located at the upper left in the processing target block among the reconstructed images adjacent to the periphery of the processing target block are used, it is possible to reduce the memory amount for storing the reconstructed images.
[0035] Also, in the decoding method according to one aspect of the present disclosure, when the size of the processing target block of the image is larger than a predetermined size, correction parameters are derived using only the reconstructed images around the processing unit of the predetermined size located at the upper left in the processing target block among the reconstructed images around the processing target block, and correction processing for the processing target block is performed based on the derived correction parameters.
[0036] As a result, it is possible to obtain all the signals necessary for deriving correction parameters for the processing target block by using only the reconstructed images around a processing unit of a predetermined size located at the upper left in the processing target block, so that the processing speed can be improved. Further, it is possible to match the processing results between the case where correction processing is performed for each processing target block and the case where the processing target block is divided into a plurality of processing units of a predetermined size and correction processing is performed for each such processing unit. Also, since only the reconstructed images adjacent to the periphery of the region corresponding to the processing unit of the predetermined size located at the upper left in the processing target block among the reconstructed images adjacent to the periphery of the processing target block are used, it is possible to reduce the memory amount for storing the reconstructed images.
[0037] Furthermore, these general or specific aspects may be implemented in a system, apparatus, method, integrated circuit, computer program, or a non-transitory recording medium such as a computer-readable CD-ROM, or may be implemented in any combination of a system, apparatus, method, integrated circuit, computer program, and recording medium.
[0038] Hereinafter, embodiments will be specifically described with reference to the drawings. Note that all of the embodiments described below show general or specific examples. Numerical values, shapes, materials, components, arrangement positions and connection forms of components, steps, relationships and orders of steps, etc. shown in the following embodiments are merely examples and are not intended to limit the scope of the claims.
[0039] Hereinafter, embodiments of an encoding device and a decoding device will be described. The embodiments are examples of an encoding device and a decoding device to which the processes and / or configurations described in each aspect of the present disclosure are applicable. The processes and / or configurations can also be implemented in encoding devices and decoding devices different from the embodiments. For example, regarding the processes and / or configurations applied to the embodiments, any of the following may be implemented.
[0040] (1) Any one of a plurality of components of the encoding device or decoding device of the embodiment described in each aspect of the present disclosure may be replaced or combined with any other component described in any aspect of the present disclosure.
[0041] (2) In the encoding device or decoding device of the embodiment, arbitrary changes such as addition, replacement, deletion, etc. of functions or processes performed by some of the plurality of components of the encoding device or decoding device may be made. For example, any function or process may be replaced or combined with any other function or process described in any aspect of the present disclosure.
[0042] (3) In the method implemented by the encoding device or decoding device of the embodiment, for some of the plurality of processes included in the method, arbitrary changes such as addition, replacement, and deletion may be made. For example, any process in the method may be replaced or combined with other processes described in any of the aspects of the present disclosure.
[0043] (4) Some of the plurality of components constituting the encoding device or decoding device of the embodiment may be combined with the components described in any of the aspects of the present disclosure, or may be combined with components having a part of the functions described in any of the aspects of the present disclosure, or may be combined with components that implement a part of the processes implemented by the components described in each aspect of the present disclosure.
[0044] (5) A component having a part of the functions of the encoding device or decoding device of the embodiment, or a component that implements a part of the processes of the encoding device or decoding device of the embodiment, may be combined or replaced with a component described in any of the aspects of the present disclosure, a component having a part of the functions described in any of the aspects of the present disclosure, or a component that implements a part of the processes described in any of the aspects of the present disclosure.
[0045] (6) In the method implemented by the encoding device or decoding device of the embodiment, any of the plurality of processes included in the method may be replaced or combined with the processes described in any of the aspects of the present disclosure, or with any of the similar processes.
[0046] (7) Some of the plurality of processes included in the method implemented by the encoding device or decoding device of the embodiment may be combined with the processes described in any of the aspects of the present disclosure.
[0047] (8) The manner of implementing the processes and / or configurations described in each aspect of the present disclosure is not limited to the encoding device or decoding device of the embodiments. For example, the processes and / or configurations may be implemented in a device used for purposes different from the moving image encoding or moving image decoding disclosed in the embodiments.
[0048] [Encoding device] First, the encoding device according to the embodiment will be described. FIG. 1 is a block diagram showing the functional configuration of the encoding device 100 according to the embodiment. The encoding device 100 is a moving image encoding device that encodes a moving image in units of blocks.
[0049] As shown in FIG. 1, the encoding device 100 is a device that encodes an image in units of blocks, and includes a division unit 102, a subtraction unit 104, a conversion unit 106, a quantization unit 108, an entropy encoding unit 110, an inverse quantization unit 112, an inverse conversion unit 114, an addition unit 116, a block memory 118, a loop filter unit 120, a frame memory 122, an intra prediction unit 124, an inter prediction unit 126, and a prediction control unit 128.
[0050] The encoding device 100 is realized by, for example, a general-purpose processor and a memory. In this case, when a software program stored in the memory is executed by the processor, the processor functions as the division unit 102, the subtraction unit 104, the conversion unit 106, the quantization unit 108, the entropy encoding unit 110, the inverse quantization unit 112, the inverse conversion unit 114, the addition unit 116, the loop filter unit 120, the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128. Further, the encoding device 100 may be realized as one or more dedicated electronic circuits corresponding to the division unit 102, the subtraction unit 104, the conversion unit 106, the quantization unit 108, the entropy encoding unit 110, the inverse quantization unit 112, the inverse conversion unit 114, the addition unit 116, the loop filter unit 120, the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128.
[0051] First, after explaining the overall processing flow of the encoding device 100, each component included in the encoding device 100 will be described.
[0052] [Overall Flow of Encoding Process] FIG. 2 is a flowchart showing an example of the overall encoding process by the encoding device 100.
[0053] First, the splitting unit 102 of the encoding device 100 splits each picture included in the input picture, which is a moving picture, into a plurality of fixed-size blocks (for example, 128×128 pixels) (step Sa_1). Then, the splitting unit 102 selects a splitting pattern (also referred to as a block shape) for the fixed-size block (step Sa_2). That is, the splitting unit 102 further splits the fixed-size block into a plurality of blocks that constitute the selected splitting pattern. Then, the encoding device 100 performs the processing of steps Sa_3 to Sa_9 for each of the plurality of blocks, that is, for the block (i.e., the encoding target block).
[0054] That is, the prediction processing unit, which consists of all or part of the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128, generates a prediction signal (also referred to as a prediction block) for the encoding target block (also referred to as the current block) (step Sa_3).
[0055] Next, the subtraction unit 104 generates the difference between the encoding target block and the prediction block as a prediction residual (also referred to as a difference block) (step Sa_4).
[0056] Next, the conversion unit 106 and the quantization unit 108 perform conversion and quantization on the difference block to generate a plurality of quantization coefficients (step Sa_5). Note that a block consisting of a plurality of quantization coefficients is also referred to as a coefficient block.
[0057] Next, the entropy encoding unit 110 generates an encoded signal (step Sa_6) by performing encoding (specifically, entropy encoding) on the coefficient block and the prediction parameters related to the generation of the prediction signal. Note that the encoded signal is also referred to as an encoded bit stream, a compressed bit stream, or a stream.
[0058] Next, the inverse quantization unit 112 and the inverse transform unit 114 restore a plurality of prediction residuals (i.e., difference blocks) by performing inverse quantization and inverse transform on the coefficient block (step Sa_7).
[0059] Next, the addition unit 116 reconstructs the current block into a reconstructed image (also referred to as a reconstructed block or a decoded image block) by adding the prediction block to the restored difference block (step Sa_8). Thereby, a reconstructed image is generated.
[0060] When this reconstructed image is generated, the loop filter unit 120 performs filtering on the reconstructed image as necessary (step Sa_9).
[0061] Then, the encoding device 100 determines whether the encoding of the entire picture is completed (step Sa_10). If it is determined that the encoding is not completed (No in step Sa_10), the processing from step Sa_2 is repeatedly executed.
[0062] In the above example, the encoding device 100 selects one division pattern for the fixed-size block and performs encoding of each block according to the division pattern. However, encoding of each block may be performed according to each of a plurality of division patterns. In this case, the encoding device 100 may evaluate the cost for each of the plurality of division patterns, and select, for example, the encoded signal obtained by encoding according to the division pattern with the smallest cost as the output encoded signal.
[0063] As shown, the processes of these steps Sa_1 to Sa_10 are sequentially performed by the encoding device 100. Alternatively, a plurality of some of these processes may be performed in parallel, and the order of these processes may be changed, etc.
[0064] [Splitting unit] The splitting unit 102 splits each picture included in the input moving image into a plurality of blocks, and outputs each block to the subtraction unit 104. For example, the splitting unit 102 first splits the picture into blocks of a fixed size (for example, 128x128). Other fixed block sizes may be adopted. These blocks of fixed size are sometimes called coding tree units (CTUs). Then, the splitting unit 102 splits each of the fixed-size blocks into variable-size blocks (for example, 64x64 or less) based on, for example, recursive quadtree and / or binary tree block splitting. That is, the splitting unit 102 selects a splitting pattern. These variable-size blocks are sometimes called coding units (CUs), prediction units (PUs), or transform units (TUs). In various processing examples, it is not necessary to distinguish between CUs, PUs, and TUs, and some or all of the blocks in the picture may be the processing units of CUs, PUs, and TUs.
[0065] FIG. 3 is a conceptual diagram showing an example of block splitting in the embodiment. In FIG. 3, the solid line represents the block boundary by quadtree block splitting, and the broken line represents the block boundary by binary tree block splitting.
[0066] Here, the block 10 is a square block of 128x128 pixels (128x128 block). This 128x128 block 10 is first split into four square 64x64 blocks (quadtree block splitting).
[0067] The upper left 64x64 block is further vertically divided into two rectangular 32x64 blocks, and the left 32x64 block is further vertically divided into two rectangular 16x64 blocks (binary tree block division). As a result, the upper left 64x64 block is divided into two 16x64 blocks 11, 12 and a 32x64 block 13.
[0068] The upper right 64x64 block is horizontally divided into two rectangular 64x32 blocks 14, 15 (binary tree block division).
[0069] The lower left 64x64 block is divided into four square 32x32 blocks (quad-tree block division). Among the four 32x32 blocks, the upper left block and the lower right block are further divided. The upper left 32x32 block is vertically divided into two rectangular 16x32 blocks, and the right 16x32 block is further horizontally divided into two 16x16 blocks (binary tree block division). The lower right 32x32 block is horizontally divided into two 32x16 blocks (binary tree block division). As a result, the lower left 64x64 block is divided into a 16x32 block 16, two 16x16 blocks 17, 18, two 32x32 blocks 19, 20, and two 32x16 blocks 21, 22.
[0070] The lower right 64x64 block 23 is not divided.
[0071] As described above, in FIG. 3, block 10 is divided into 13 variable-size blocks 11 to 23 based on recursive quad-tree and binary tree block division. Such division is sometimes called QTBT (quad-tree plus binary tree) division.
[0072] In FIG. 3, one block was divided into four or two blocks (quad-tree or binary-tree block division), but the division is not limited to these. For example, one block may be divided into three blocks (ternary-tree block division). Such a division including ternary-tree block division may be called MBT (multi type tree) division.
[0073] [Picture Composition: Slice / Tile] To decode pictures in parallel, a picture may be composed of slices or tiles. A picture composed of slices or tiles may be configured by the dividing unit 102.
[0074] A slice is a basic encoding unit that constitutes a picture. A picture is composed of, for example, one or more slices. Also, a slice consists of one or more consecutive CTUs (Coding Tree Units).
[0075] FIG. 4A is a conceptual diagram showing an example of the configuration of a slice. For example, a picture includes 11×8 CTUs and is divided into four slices (Slice 1 - 4). Slice 1 consists of 16 CTUs, Slice 2 consists of 21 CTUs, Slice 3 consists of 29 CTUs, and Slice 4 consists of 22 CTUs. Here, each CTU in the picture belongs to one of the slices. The shape of the slice is in the form of horizontally dividing the picture. The boundary of the slice does not have to be at the edge of the screen and may be anywhere among the boundaries of the CTUs within the screen. The processing order (encoding order or decoding order) of the CTUs in the slice is, for example, the raster scan order. Also, a slice includes header information and encoded data. The header information may describe features of the slice such as the CTU address at the start of the slice and the slice type.
[0076] A tile is a unit of a rectangular area that constitutes a picture. A number called TileId may be assigned to each tile in the raster scan order.
[0077] FIG. 4B is a conceptual diagram showing an example of the tile configuration. For example, a picture includes 11×8 CTUs and is divided into tiles (tiles 1-4) in four rectangular regions. When tiles are used, the processing order of CTUs is changed compared to when tiles are not used. When tiles are not used, a plurality of CTUs in a picture are processed in raster scan order. When tiles are used, at least one CTU in each of the plurality of tiles is processed in raster scan order. For example, as shown in FIG. 4B, the processing order of the plurality of CTUs included in tile 1 is from the left end of the first row of tile 1 to the right end of the first row of tile 1, and then from the left end of the second row of tile 1 to the right end of the second row of tile 1.
[0078] Note that one tile may include one or more slices, and one slice may include one or more tiles.
[0079] [Subtraction unit] The subtraction unit 104 receives an input from the division unit 102 and subtracts a prediction signal (a prediction sample input from the prediction control unit 128 shown below) from the original signal (original sample) in block units divided by the division unit 102. That is, the subtraction unit 104 calculates the prediction error (also referred to as the residual) of the block to be encoded (hereinafter referred to as the current block). Then, the subtraction unit 104 outputs the calculated prediction error (residual) to the conversion unit 106.
[0080] The original signal is an input signal of the encoding device 100 and is a signal representing an image of each picture constituting a moving image (for example, a luminance signal and two chroma signals). Hereinafter, the signal representing an image may also be referred to as a sample.
[0081] [Conversion unit] The conversion unit 106 converts the prediction error in the spatial domain into conversion coefficients in the frequency domain and outputs the conversion coefficients to the quantization unit 108. Specifically, the conversion unit 106 performs, for example, a predetermined discrete cosine transform (DCT) or discrete sine transform (DST) on the prediction error in the spatial domain. The predetermined DCT or DST may be predefined.
[0082] Note that the conversion unit 106 may adaptively select a conversion type from among a plurality of conversion types and convert the prediction error into conversion coefficients using a conversion basis function corresponding to the selected conversion type. Such a conversion is sometimes referred to as an explicit multiple core transform (EMT) or an adaptive multiple transform (AMT).
[0083] The plurality of conversion types include, for example, DCT-II, DCT-V, DCT-VIII, DST-I, and DST-VII. FIG. 5A is a table showing the conversion basis functions corresponding to the conversion type examples. In FIG. 5A, N indicates the number of input pixels. The selection of the conversion type from among these plurality of conversion types may depend on, for example, the type of prediction (intra prediction and inter prediction) or the intra prediction mode.
[0084] Information indicating whether or not such an EMT or AMT is applied (for example, referred to as an EMT flag or an AMT flag) and information indicating the selected conversion type are usually signaled at the CU level. Note that the signaling of this information is not necessarily limited to the CU level and may be at other levels (for example, the bit sequence level, the picture level, the slice level, the tile level, or the CTU level).
[0085] Further, the conversion unit 106 may re-convert the conversion coefficient (conversion result). Such re-conversion may be referred to as AST (adaptive secondary transform) or NSST (non-separable secondary transform). For example, the conversion unit 106 performs re-conversion for each sub-block (e.g., 4x4 sub-block) included in the block of conversion coefficients corresponding to the intra prediction error. Information indicating whether to apply NSST and information regarding the conversion matrix used for NSST are usually signaled at the CU level. Note that the signaling of this information is not necessarily limited to the CU level and may be at other levels (e.g., sequence level, picture level, slice level, tile level, or CTU level).
[0086] A separable transform and a non-separable transform may be applied to the conversion unit 106. The separable transform is a method in which conversion is performed multiple times by separating for each direction by the number of dimensions of the input, and the non-separable transform is a method in which when the input is multi-dimensional, two or more dimensions are regarded as one dimension and conversion is performed together.
[0087] For example, as an example of the non-separable transform, when the input is a 4×4 block, it is regarded as an array having 16 elements, and a conversion process is performed on the array with a 16×16 conversion matrix.
[0088] Further, in a further example of the non-separable transform, after regarding a 4×4 input block as an array having 16 elements, a transform (Hypercube Givens Transform) in which Givens rotation is performed multiple times on the array may be performed.
[0089] In the conversion by the conversion unit 106, the type of basis for conversion to the frequency domain can also be switched according to the region within the CU. As an example, there is SVT (Spatially Varying Transform). In SVT, as shown in FIG. 5B, the CU is divided into two equal parts in the horizontal or vertical direction, and conversion to the frequency domain is performed only on one of the regions. The type of conversion basis can be set for each region. For example, DST7 and DCT8 are used. In this example, only one of the two regions within the CU is converted, and the other is not, but both regions may be converted. Also, the splitting method can be made more flexible, not only by splitting into two equal parts, but also by splitting into four equal parts, or by separately encoding information indicating the split and signaling it in the same way as CU splitting. Note that SVT is sometimes also called SBT (Sub-block Transform).
[0090] [Quantization Unit] The quantization unit 108 quantizes the conversion coefficients output from the conversion unit 106. Specifically, the quantization unit 108 scans the conversion coefficients of the current block in a predetermined scanning order, and quantizes the conversion coefficients based on the quantization parameter (QP) corresponding to the scanned conversion coefficients. Then, the quantization unit 108 outputs the quantized conversion coefficients (hereinafter referred to as quantization coefficients) of the current block to the entropy encoding unit 110 and the inverse quantization unit 112. The predetermined scanning order may be predefined.
[0091] The predetermined scanning order is the order for quantization / inverse quantization of the conversion coefficients. For example, the predetermined scanning order may be defined in ascending order of frequency (from low frequency to high frequency) or descending order of frequency (from high frequency to low frequency).
[0092] The quantization parameter (QP) is a parameter that defines the quantization step (quantization width). For example, as the value of the quantization parameter increases, the quantization step also increases. That is, as the value of the quantization parameter increases, the quantization error increases.
[0093] Also, a quantization matrix may be used for quantization. For example, several types of quantization matrices may be used corresponding to frequency conversion sizes such as 4x4 and 8x8, prediction modes such as intra prediction and inter prediction, and pixel components such as luminance and color difference. Note that quantization refers to digitizing values sampled at a predetermined interval by associating them with a predetermined level, and in this technical field, it may be referred to using other expressions such as rounding, truncating, and scaling, or rounding, truncating, and scaling may be adopted. The predetermined interval and level may be predefined.
[0094] As methods of using a quantization matrix, there are a method of using a quantization matrix directly set on the encoder side and a method of using a default quantization matrix (default matrix). On the encoder side, by directly setting the quantization matrix, a quantization matrix corresponding to the characteristics of the image can be set. However, in this case, there is a demerit that the amount of code increases due to the encoding of the quantization matrix.
[0095] On the other hand, there is also a method of quantizing both the coefficients of the high-frequency components and the coefficients of the low-frequency components without using a quantization matrix. Note that this method is equivalent to a method of using a quantization matrix (flat matrix) in which all coefficients have the same value.
[0096] The quantization matrix may be specified, for example, in an SPS (Sequence Parameter Set) or a PPS (Picture Parameter Set). The SPS includes parameters used for a sequence, and the PPS includes parameters used for a picture. The SPS and PPS may simply be called parameter sets.
[0097] [Entropy Encoding Unit] The entropy encoding unit 110 generates an encoded signal (encoded bit stream) based on the quantized coefficients input from the quantization unit 108. Specifically, the entropy encoding unit 110, for example, binarizes the quantized coefficients, arithmetically encodes the binary signal, and outputs a compressed bit stream or sequence.
[0098] [Inverse Quantization Unit] The inverse quantization unit 112 inverse-quantizes the quantized coefficients input from the quantization unit 108. Specifically, the inverse quantization unit 112 inverse-quantizes the quantized coefficients of the current block in a predetermined scanning order. Then, the inverse quantization unit 112 outputs the inverse-quantized transform coefficients of the current block to the inverse transform unit 114. The predetermined scanning order may be predefined.
[0099] [Inverse Transform Unit] The inverse transform unit 114 restores the prediction error (residual) by inverse-transforming the transform coefficients input from the inverse quantization unit 112. Specifically, the inverse transform unit 114 performs an inverse transform corresponding to the transform by the transform unit 106 on the transform coefficients to restore the prediction error of the current block. Then, the inverse transform unit 114 outputs the restored prediction error to the addition unit 116.
[0100] Note that since information is usually lost due to quantization, the restored prediction error does not match the prediction error calculated by the subtraction unit 104. That is, the restored prediction error usually includes a quantization error.
[0101] [Addition Unit] The addition unit 116 reconstructs the current block by adding the prediction error input from the inverse transform unit 114 and the prediction sample input from the prediction control unit 128. Then, the addition unit 116 outputs the reconstructed block to the block memory 118 and the loop filter unit 120. The reconstructed block may also be called a local decoding block.
[0102] [Block Memory] The block memory 118 is, for example, a storage unit for storing blocks that are referred to in intra prediction and are blocks within an encoded target picture (referred to as the current picture). Specifically, the block memory 118 stores the reconstructed block output from the addition unit 116.
[0103] [Frame Memory] The frame memory 122 is, for example, a storage unit for storing reference pictures used in inter prediction, and may also be called a frame buffer. Specifically, the frame memory 122 stores the reconstructed block filtered by the loop filter unit 120.
[0104] [Loop Filter Unit] The loop filter unit 120 applies a loop filter to the block reconstructed by the addition unit 116 and outputs the filtered reconstructed block to the frame memory 122. The loop filter is a filter (in-loop filter) used within the encoding loop, and includes, for example, a deblocking filter (DF or DBF), a sample adaptive offset (SAO), and an adaptive loop filter (ALF).
[0105] In the case of the ALF, a least squares error filter for removing encoding distortion is applied, and for example, for each 2x2 sub-block within the current block, one filter selected from a plurality of filters is applied based on the local gradient direction and activity.
[0106] Specifically, first, sub-blocks (for example, 2x2 sub-blocks) are classified into a plurality of classes (for example, 15 or 25 classes). The classification of the sub-blocks is performed based on the gradient direction and activity. For example, a classification value C (for example, C = 5D + A) is calculated using the gradient direction value D (for example, 0 to 2 or 0 to 4) and the gradient activity value A (for example, 0 to 4). Then, based on the classification value C, the sub-blocks are classified into a plurality of classes.
[0107] The gradient direction value D is derived, for example, by comparing the gradients in a plurality of directions (for example, horizontal, vertical, and two diagonal directions). Further, the gradient activity value A is derived, for example, by adding the gradients in a plurality of directions and quantizing the addition result.
[0108] Based on the results of such classification, a filter for the sub-block is determined from among a plurality of filters.
[0109] As the shape of the filter used in ALF, for example, a circularly symmetric shape is utilized. FIGS. 6A to 6C are diagrams showing a plurality of examples of the shape of the filter used in ALF. FIG. 6A shows a 5x5 diamond-shaped filter, FIG. 6B shows a 7x7 diamond-shaped filter, and FIG. 6C shows a 9x9 diamond-shaped filter. Information indicating the shape of the filter is usually signaled at the picture level. Note that the signaling of the information indicating the shape of the filter is not necessarily limited to the picture level, and may be at other levels (for example, sequence level, slice level, tile level, CTU level, or CU level).
[0110] The on / off of ALF may be determined, for example, at the picture level or the CU level. For example, whether to apply ALF at the CU level may be determined for luminance, and whether to apply ALF at the picture level may be determined for color difference. Information indicating the on / off of ALF is usually signaled at the picture level or the CU level. Note that the signaling of the information indicating the on / off of ALF is not necessarily limited to the picture level or the CU level, and may be at other levels (for example, sequence level, slice level, tile level, or CTU level).
[0111] The coefficient sets of a plurality of selectable filters (for example, up to 15 or 25 filters) are usually signaled at the picture level. Note that the signaling of the coefficient sets is not necessarily limited to the picture level, and may be at other levels (for example, sequence level, slice level, tile level, CTU level, CU level, or sub-block level).
[0112] [Loop filter section > Deblocking filter] In the deblocking filter, the loop filter section 120 reduces the distortion occurring at the block boundary by performing filter processing on the block boundary of the reconstructed image.
[0113] FIG. 7 is a block diagram showing an example of the detailed configuration of the loop filter section 120 that functions as a deblocking filter.
[0114] The loop filter section 120 includes a boundary determination section 1201, a filter determination section 1203, a filter processing section 1205, a processing determination section 1208, a filter characteristic determination section 1207, and switches 1202, 1204, and 1206.
[0115] The boundary determination section 1201 determines whether or not a pixel to be deblocking-filtered (i.e., a target pixel) exists near the block boundary. Then, the boundary determination section 1201 outputs the determination result to the switches 1202 and the processing determination section 1208.
[0116] When it is determined by the boundary determination section 1201 that the target pixel exists near the block boundary, the switch 1202 outputs the image before the filter processing to the switch 1204. Conversely, when it is determined by the boundary determination section 1201 that the target pixel does not exist near the block boundary, the switch 1202 outputs the image before the filter processing to the switch 1206.
[0117] The filter determination section 1203 determines whether or not to perform deblocking filter processing on the target pixel based on the pixel values of at least one neighboring pixel around the target pixel. Then, the filter determination section 1203 outputs the determination result to the switches 1204 and the processing determination section 1208.
[0118] When the switch 1204 is determined by the filter determination unit 1203 to perform deblocking filter processing on the target pixel, the switch 1204 outputs the image before the filter processing obtained via the switch 1202 to the filter processing unit 1205. Conversely, when the switch 1204 is determined by the filter determination unit 1203 not to perform deblocking filter processing on the target pixel, the switch 1204 outputs the image before the filter processing obtained via the switch 1202 to the switch 1206.
[0119] When the filter processing unit 1205 obtains the image before the filter processing via the switches 1202 and 1204, the filter processing unit 1205 performs deblocking filter processing having the filter characteristics determined by the filter characteristic determination unit 1207 on the target pixel. Then, the filter processing unit 1205 outputs the pixel after the filter processing to the switch 1206.
[0120] The switch 1206 selectively outputs the pixel that has not been subjected to the deblocking filter processing and the pixel that has been subjected to the deblocking filter processing by the filter processing unit 1205 according to the control by the processing determination unit 1208.
[0121] The processing determination unit 1208 controls the switch 1206 based on the determination results of the boundary determination unit 1201 and the filter determination unit 1203 respectively. That is, when the processing determination unit 1208 is determined by the boundary determination unit 1201 that the target pixel exists near the block boundary and is determined by the filter determination unit 1203 to perform deblocking filter processing on the target pixel, the processing determination unit 1208 causes the switch 1206 to output the pixel that has been subjected to the deblocking filter processing. In addition, in other cases than the above, the processing determination unit 1208 causes the switch 1206 to output the pixel that has not been subjected to the deblocking filter processing. By repeatedly outputting such pixels, the image after the filter processing is output from the switch 1206.
[0122] FIG. 8 is a conceptual diagram showing an example of a deblocking filter having filter characteristics symmetric with respect to the block boundary.
[0123] In the deblocking filter process, for example, using the pixel value and the quantization parameter, one of two deblocking filters with different characteristics, namely the strong filter and the weak filter, is selected. In the strong filter, as shown in FIG. 8, when there are pixels p0 to p2 and pixels q0 to q2 sandwiching the block boundary, the pixel values of each of the pixels q0 to q2 are changed to pixel values q'0 to q'2, for example, by performing the operation shown in the following formula.
[0124] q'0 = (p1 + 2 × p0 + 2 × q0 + 2 × q1 + q2 + 4) / 8 q'1 = (p0 + q0 + q1 + q2 + 2) / 4 q'2 = (p0 + q0 + q1 + 3 × q2 + 2 × q3 + 4) / 8 In the above formulas, p0 to p2 and q0 to q2 are the pixel values of pixels p0 to p2 and pixels q0 to q2, respectively. Also, q3 is the pixel value of pixel q3 adjacent to pixel q2 on the side opposite to the block boundary. Also, in the right side of each of the above formulas, the coefficient multiplied by the pixel value of each pixel used in the deblocking filter process is the filter coefficient.
[0125] Furthermore, in the deblocking filter process, clip processing may be performed so that the pixel value after the operation is not set to exceed the threshold value. In this clip processing, the pixel value after the operation by the above formula is clipped to "operation target pixel value ± 2 × threshold value" using the threshold value determined from the quantization parameter. Thereby, excessive smoothing can be prevented.
[0126] FIG. 9 is a conceptual diagram for explaining the block boundary where the deblocking filter process is performed. FIG. 10 is a conceptual diagram showing an example of the Bs value.
[0127] The block boundary where deblocking filter processing is performed is, for example, the boundary of a PU (Prediction Unit) or TU (Transform Unit) of an 8×8 pixel block as shown in FIG. 9. The deblocking filter processing can be performed in units of 4 rows or 4 columns. First, for blocks P and Q shown in FIG. 9, a Bs (Boundary Strength) value is determined as shown in FIG. 10.
[0128] According to the Bs value in FIG. 10, even for block boundaries belonging to the same image, it is determined whether to perform deblocking filter processing with different strengths. The deblocking filter processing for the chrominance signal is performed when the Bs value is 2. The deblocking filter processing for the luminance signal is performed when the Bs value is 1 or more and a predetermined condition is satisfied. The predetermined condition may be determined in advance. Note that the determination condition of the Bs value is not limited to that shown in FIG. 10, and may be determined based on other parameters.
[0129] [Prediction processing unit (intra prediction unit · inter prediction unit · prediction control unit)] FIG. 11 is a flowchart showing an example of the processing performed by the prediction processing unit of the encoding apparatus 100. Note that the prediction processing unit includes all or some of the components of the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128.
[0130] The prediction processing unit generates a prediction image of the current block (step Sb_1). This prediction image is also referred to as a prediction signal or a prediction block. Note that the prediction signal includes, for example, an intra prediction signal or an inter prediction signal. Specifically, the prediction processing unit generates a prediction image of the current block using the reconstructed image that has already been obtained by performing generation of a prediction block, generation of a difference block, generation of a coefficient block, restoration of the difference block, and generation of a decoded image block.
[0131] The reconstructed image may be, for example, an image of a reference picture, or an image of an encoded block in the current picture that is the picture including the current block. The encoded block in the current picture is, for example, an adjacent block of the current block.
[0132] FIG. 12 is a flowchart showing another example of the processing performed by the prediction processing unit of the encoding apparatus 100.
[0133] The prediction processing unit generates a prediction image in a first method (step Sc_1a), generates a prediction image in a second method (step Sc_1b), and generates a prediction image in a third method (step Sc_1c). The first method, the second method, and the third method are different methods for generating a prediction image, and may be, for example, an inter prediction method, an intra prediction method, and other prediction methods, respectively. In these prediction methods, the above-described reconstructed image may be used.
[0134] Next, the prediction processing unit selects any one of the plurality of prediction images generated in steps Sc_1a, Sc_1b, and Sc_1c (step Sc_2). The selection of this prediction image, that is, the selection of the method or mode for obtaining the final prediction image, may be performed based on calculating the cost for each generated prediction image and based on that cost. Alternatively, the selection of the prediction image may be performed based on the parameters used in the encoding process. The encoding apparatus 100 may signal information for specifying the selected prediction image, method, or mode in an encoded signal (also referred to as an encoded bit stream). The information may be, for example, a flag or the like. Thereby, the decoding apparatus can generate a prediction image according to the method or mode selected in the encoding apparatus 100 based on the information. Note that in the example shown in FIG. 12, the prediction processing unit selects any prediction image after generating prediction images in each method. However, the prediction processing unit may select a method or mode based on the parameters used in the above-described encoding process before generating those prediction images, and generate a prediction image according to the method or mode.
[0135] For example, the first method and the second method are intra prediction and inter prediction, respectively, and the prediction processing unit may select the final prediction image for the current block from the prediction images generated according to these prediction methods.
[0136] FIG. 13 is a flowchart showing another example of the processing performed by the prediction processing unit of the encoding apparatus 100.
[0137] First, the prediction processing unit generates a prediction image by intra prediction (step Sd_1a) and generates a prediction image by inter prediction (step Sd_1b). Note that the prediction image generated by intra prediction is also referred to as an intra prediction image, and the prediction image generated by inter prediction is also referred to as an inter prediction image.
[0138] Next, the prediction processing unit evaluates each of the intra prediction image and the inter prediction image (step Sd_2). A cost may be used for this evaluation. That is, the prediction processing unit calculates the cost C of each of the intra prediction image and the inter prediction image. This cost C can be calculated by an equation of an R-D optimization model, for example, C = D + λ × R. In this equation, D is the encoding distortion of the prediction image, and is represented by, for example, the sum of absolute differences between the pixel values of the current block and the pixel values of the prediction image. Also, R is the amount of generated code of the prediction image, and specifically, is the amount of code required for encoding motion information or the like for generating the prediction image. Also, λ is, for example, a Lagrange undetermined multiplier.
[0139] Then, the prediction processing unit selects, as the final prediction image of the current block, the prediction image for which the smallest cost C has been calculated from the intra prediction image and the inter prediction image (step Sd_3). That is, the prediction method or mode for generating the prediction image of the current block is selected.
[0140] [Intra Prediction Unit] The intra prediction unit 124 generates a prediction signal (intra prediction signal) by performing intra prediction (also referred to as in-picture prediction) of the current block with reference to the blocks within the current picture stored in the block memory 118. Specifically, the intra prediction unit 124 generates an intra prediction signal by performing intra prediction with reference to samples (e.g., luminance values, chrominance difference values) of blocks adjacent to the current block, and outputs the intra prediction signal to the prediction control unit 128.
[0141] For example, the intra prediction unit 124 performs intra prediction using one of a plurality of predefined intra prediction modes. The plurality of intra prediction modes usually include one or more non-directional prediction modes and a plurality of directional prediction modes. The plurality of predefined modes may be predefined in advance.
[0142] The one or more non-directional prediction modes include, for example, the Planar prediction mode and the DC prediction mode defined in the H.265 / HEVC standard.
[0143] The plurality of directional prediction modes include, for example, the 33-direction prediction mode defined in the H.265 / HEVC standard. Note that the plurality of directional prediction modes may further include a 32-direction prediction mode (a total of 65 directional prediction modes) in addition to the 33 directions. FIG. 14 is a conceptual diagram showing all 67 intra prediction modes (2 non-directional prediction modes and 65 directional prediction modes) that can be used in intra prediction. The solid arrows represent the 33 directions defined in the H.265 / HEVC standard, and the dashed arrows represent the additional 32 directions (the 2 non-directional prediction modes are not shown in FIG. 14).
[0144] In various processing examples, in intra prediction of a chrominance block, a luminance block may be referred to. That is, based on the luminance component of a current block, the chrominance component of the current block may be predicted. Such intra prediction is sometimes called CCLM (cross-component linear model) prediction. Such an intra prediction mode of a chrominance block that refers to a luminance block (for example, called the CCLM mode) may be added as one of the intra prediction modes of the chrominance block.
[0145] The intra prediction unit 124 may correct the pixel value after intra prediction based on the gradients of the reference pixels in the horizontal / vertical directions. Such intra prediction with such correction is sometimes called PDPC (position dependent intra prediction combination). Information indicating the presence or absence of application of PDPC (for example, called a PDPC flag) is usually signaled at the CU level. Note that the signaling of this information is not necessarily limited to the CU level and may be at other levels (for example, sequence level, picture level, slice level, tile level, or CTU level).
[0146] [Inter prediction unit] The inter prediction unit 126 generates a prediction signal (inter prediction signal) by performing inter prediction (also referred to as inter-picture prediction) of the current block with reference to a reference picture stored in the frame memory 122 that is different from the current picture. The inter prediction is performed in units of the current block or a current sub-block (e.g., 4x4 block) within the current block. For example, the inter prediction unit 126 performs motion estimation within the reference picture for the current block or current sub-block, and finds the reference block or sub-block that most matches the current block or current sub-block. Then, the inter prediction unit 126 acquires motion information (e.g., a motion vector) for compensating for the motion or change from the reference block or sub-block to the current block or sub-block. The inter prediction unit 126 performs motion compensation (or motion prediction) based on the motion information, and generates an inter prediction signal for the current block or sub-block. The inter prediction unit 126 outputs the generated inter prediction signal to the prediction control unit 128.
[0147] The motion information used for motion compensation may be signaled as an inter prediction signal in various forms. For example, the motion vector may be signaled. As another example, the difference between the motion vector and the motion vector predictor may be signaled.
[0148] [Basic Flow of Inter Prediction] FIG. 15 is a flowchart showing an example of the basic flow of inter prediction.
[0149] The inter prediction unit 126 first generates a prediction image (steps Se_1 to Se_3). Next, the subtraction unit 104 generates the difference between the current block and the prediction image as a prediction residual (step Se_4).
[0150] Here, in generating the prediction image, the inter prediction unit 126 generates the prediction image by determining the motion vector (MV) of the current block (steps Se_1 and Se_2) and performing motion compensation (step Se_3). Also, in determining the MV, the inter prediction unit 126 determines the MV by selecting candidate motion vectors (candidate MVs) (step Se_1) and deriving the MV (step Se_2). The selection of the candidate MV is performed, for example, by selecting at least one candidate MV from a candidate MV list. Also, in deriving the MV, the inter prediction unit 126 may determine the selected at least one candidate MV as the MV of the current block by further selecting at least one candidate MV from the at least one candidate MV. Alternatively, the inter prediction unit 126 may determine the MV of the current block by searching the area of the reference picture indicated by the candidate MV for each of the selected at least one candidate MVs. Note that searching the area of this reference picture may be referred to as motion estimation.
[0151] Also, in the above example, steps Se_1 to Se_3 are performed by the inter prediction unit 126, but processing such as step Se_1 or step Se_2 may be performed by other components included in the encoding device 100.
[0152] [Flow of Derivation of Motion Vector] FIG. 16 is a flowchart showing an example of motion vector derivation.
[0153] The inter prediction unit 126 derives the MV of the current block in a mode in which motion information (e.g., MV) is encoded. In this case, for example, the motion information is encoded as a prediction parameter and signaled. That is, the encoded motion information is included in the encoded signal (also referred to as an encoded bitstream).
[0154] Alternatively, the inter prediction unit 126 derives the MV in a mode in which the motion information is not encoded. In this case, the motion information is not included in the encoded signal.
[0155] Here, the modes for MV derivation may include, for example, the normal inter mode, the merge mode, the FRUC mode, and the affine mode, which will be described later. Among these modes, the modes for encoding the motion information include the normal inter mode, the merge mode, and the affine mode (specifically, the affine inter mode and the affine merge mode). Note that the motion information may include not only the MV but also the predicted motion vector selection information, which will be described later. Also, the mode for not encoding the motion information includes the FRUC mode. The inter prediction unit 126 selects a mode for deriving the MV of the current block from these multiple modes, and derives the MV of the current block using the selected mode.
[0156] FIG. 17 is a flowchart showing another example of motion vector derivation.
[0157] The inter prediction unit 126 derives the MV of the current block in a mode in which the differential MV is encoded. In this case, for example, the differential MV is encoded as a prediction parameter and signaled. That is, the encoded differential MV is included in the encoded signal. This differential MV is the difference between the MV of the current block and its predicted MV.
[0158] Alternatively, the inter prediction unit 126 derives the MV in a mode in which the differential MV is not encoded. In this case, the encoded differential MV is not included in the encoded signal.
[0159] Here, as described above, the modes for deriving the MV include the normal inter, merge mode, FRUC mode, and affine mode, etc., which will be described later. Among these modes, the modes for encoding the differential MV include the normal inter mode and the affine mode (specifically, the affine inter mode), etc. Also, the modes for not encoding the differential MV include the FRUC mode, the merge mode, and the affine mode (specifically, the affine merge mode), etc. The inter prediction unit 126 selects a mode for deriving the MV of the current block from these multiple modes, and derives the MV of the current block using the selected mode.
[0160] [Flow of Deriving Motion Vector] FIG. 18 is a flowchart showing another example of the motion vector derivation. There are multiple modes for the MV derivation mode, that is, the inter prediction mode, which can be roughly divided into a mode for encoding the differential MV and a mode for not encoding the differential motion vector. The modes for not encoding the differential MV include the merge mode, the FRUC mode, and the affine mode (specifically, the affine merge mode). The details of these modes will be described later. Briefly, the merge mode is a mode for deriving the MV of the current block by selecting a motion vector from the surrounding encoded blocks, and the FRUC mode is a mode for deriving the MV of the current block by performing a search between the encoded regions. Also, the affine mode is a mode for deriving the motion vector of each of the multiple sub-blocks constituting the current block as the MV of the current block assuming an affine transformation.
[0161] Specifically, as shown in the figure, when the inter-prediction mode information indicates 0 (0 in Sf_1), the inter-prediction unit 126 derives a motion vector in the merge mode (Sf_2). Further, when the inter-prediction mode information indicates 1 (1 in Sf_1), the inter-prediction unit 126 derives a motion vector in the FRUC mode (Sf_3). Further, when the inter-prediction mode information indicates 2 (2 in Sf_1), the inter-prediction unit 126 derives a motion vector in the affine mode (specifically, the affine merge mode) (Sf_4). Further, when the inter-prediction mode information indicates 3 (3 in Sf_1), the inter-prediction unit 126 derives a motion vector in the mode that encodes the differential MV (for example, the normal inter mode) (Sf_5).
[0162] [MV Derivation > Normal Inter Mode] The normal inter mode is an inter-prediction mode that derives the MV of the current block based on a block similar to the image of the current block from the area of the reference picture indicated by the candidate MV. Also, in this normal inter mode, the differential MV is encoded.
[0163] FIG. 19 is a flowchart showing an example of inter-prediction by the normal inter mode.
[0164] The inter-prediction unit 126 first obtains a plurality of candidate MVs for the current block based on information such as the MVs of a plurality of encoded blocks temporally or spatially around the current block (step Sg_1). That is, the inter-prediction unit 126 creates a candidate MV list.
[0165] Next, the inter-prediction unit 126 extracts each of N candidate MVs (where N is an integer of 2 or more) from among the plurality of candidate MVs obtained in step Sg_1 as a predicted motion vector candidate (also referred to as a predicted MV candidate) according to a predetermined priority order (step Sg_2). Note that the priority order may be determined in advance for each of the N candidate MVs.
[0166] Next, the inter prediction unit 126 selects one prediction motion vector candidate from among the N prediction motion vector candidates as the prediction motion vector (also referred to as the prediction MV) of the current block (step Sg_3). At this time, the inter prediction unit 126 encodes prediction motion vector selection information for identifying the selected prediction motion vector into the stream. Note that the stream is the encoded signal or encoded bit stream described above.
[0167] Next, the inter prediction unit 126 refers to the encoded reference picture and derives the MV of the current block (step Sg_4). At this time, the inter prediction unit 126 further encodes the difference value between the derived MV and the prediction motion vector as the differential MV into the stream. Note that the encoded reference picture is a picture composed of a plurality of blocks reconstructed after encoding.
[0168] Finally, the inter prediction unit 126 generates a predicted image of the current block by performing motion compensation on the current block using the derived MV and the encoded reference picture (step Sg_5). Note that the predicted image is the inter prediction signal described above.
[0169] Also, information indicating the inter prediction mode (normal inter mode in the above example) used for generating the predicted image included in the encoded signal is encoded as, for example, prediction parameters.
[0170] Note that the candidate MV list may be used in common with lists used in other modes. Also, the processing related to the candidate MV list may be applied to the processing related to the lists used in other modes. The processing related to this candidate MV list is, for example, extraction or selection of candidate MVs from the candidate MV list, rearrangement of candidate MVs, or deletion of candidate MVs.
[0171] [MV Derivation > Merge Mode] The merge mode is an inter prediction mode that derives an MV by selecting a candidate MV from a candidate MV list as the MV of the current block.
[0172] Figure 20 is a flowchart showing an example of inter prediction by the merge mode.
[0173] The inter prediction unit 126 first obtains a plurality of candidate MVs for the current block based on information such as the MVs of a plurality of encoded blocks temporally or spatially around the current block (step Sh_1). That is, the inter prediction unit 126 creates a candidate MV list.
[0174] Next, the inter prediction unit 126 derives the MV of the current block by selecting one candidate MV from the plurality of candidate MVs obtained in step Sh_1 (step Sh_2). At this time, the inter prediction unit 126 encodes the MV selection information for identifying the selected candidate MV into the stream.
[0175] Finally, the inter prediction unit 126 generates a predicted image of the current block by performing motion compensation on the current block using the derived MV and the encoded reference picture (step Sh_3).
[0176] Also, information indicating the inter prediction mode (merge mode in the above example) used for generating the predicted image included in the encoded signal is encoded as, for example, prediction parameters.
[0177] Figure 21 is a conceptual diagram for explaining an example of the motion vector derivation process of the current picture by the merge mode.
[0178] First, a predicted MV list in which candidates for predicted MVs are registered is generated. As candidates for predicted MVs, there are a spatial adjacent predicted MV which is an MV of a plurality of encoded blocks spatially adjacent to the target block, a temporal adjacent predicted MV which is an MV of a neighboring block obtained by projecting the position of the target block in the encoded reference picture, a combined predicted MV which is an MV generated by combining the MV values of the spatial adjacent predicted MV and the temporal adjacent predicted MV, and a zero predicted MV which is an MV with a value of zero, and the like.
[0179] Next, one predicted MV is selected from among the plurality of predicted MVs registered in the predicted MV list, and is determined as the MV of the target block.
[0180] Furthermore, in the variable length encoding unit, a merge_idx which is a signal indicating which predicted MV is selected is described in the stream and encoded.
[0181] Note that the predicted MVs registered in the predicted MV list described in FIG. 21 are merely examples, and may have a number different from the number in the figure, may have a configuration that does not include some of the types of predicted MVs in the figure, or may have a configuration in which predicted MVs other than the types of predicted MVs in the figure are added.
[0182] The final MV may be determined by performing a DMVR (decoder motion vector refinement) process described later using the MV of the target block derived by the merge mode.
[0183] Note that the candidates for predicted MVs are the above-described candidate MVs, and the predicted MV list is the above-described candidate MV list. Also, the candidate MV list may be referred to as a candidate list. Also, merge_idx is MV selection information.
[0184] [MV Derivation > FRUC Mode] Motion information may be derived on the decoder side without being signaled from the encoder side. Note that, as described above, the merge mode defined in the H.265 / HEVC standard may be used. Also, for example, motion information may be derived by performing motion search on the decoder side. In the embodiment, on the decoder side, motion search is performed without using the pixel values of the current block.
[0185] Here, a mode for performing motion search on the decoder side will be described. This mode for performing motion search on the decoder side may be called the PMMVD (pattern matched motion vector derivation) mode or the FRUC (frame rate up-conversion) mode.
[0186] An example of the FRUC process is shown in FIG. 22 in the form of a flowchart. First, by referring to the motion vectors of the encoded blocks that are spatially or temporally adjacent to the current block, a list of a plurality of candidates, each having a predicted motion vector (MV) (that is, a candidate MV list, which may be common to the merge list), is generated (step Si_1). Next, the best candidate MV is selected from among the plurality of candidate MVs registered in the candidate MV list (step Si_2). For example, an evaluation value of each candidate MV included in the candidate MV list is calculated, and one candidate MV is selected based on the evaluation value. Then, based on the motion vector of the selected candidate, a motion vector for the current block is derived (step Si_4). Specifically, for example, the motion vector of the selected candidate (the best candidate MV) is directly derived as the motion vector for the current block. Also, for example, in the peripheral region of the position in the reference picture corresponding to the motion vector of the selected candidate, by performing pattern matching, a motion vector for the current block may be derived. That is, for the region around the best candidate MV, search using pattern matching and evaluation values in the reference picture is performed, and if there is an MV with a better evaluation value, the best candidate MV may be updated to the MV, and that may be used as the final MV of the current block. It is also possible to adopt a configuration in which the process of updating to an MV with a better evaluation value is not performed.
[0187] Finally, the inter-prediction unit 126 generates a predicted image of the current block by performing motion compensation on the current block using the derived MV and the encoded reference picture (step Si_5).
[0188] When processing is performed in units of sub-blocks, the same processing may be used.
[0189] The evaluation value may be calculated by various methods. For example, the reconstructed image of the region in the reference picture corresponding to the motion vector is compared with the reconstructed image of a predetermined region (the region may be, for example, the region of another reference picture or the region of an adjacent block of the current picture as shown below). The predetermined region may be determined in advance.
[0190] Then, the difference between the pixel values of the two reconstructed images may be calculated and used as the evaluation value of the motion vector. In addition to the difference value, other information may be used to calculate the evaluation value.
[0191] Next, an example of pattern matching will be described in detail. First, one candidate MV included in the candidate MV list (for example, the merge list) is selected as the start point of the search by pattern matching. For example, as the pattern matching, the first pattern matching or the second pattern matching may be used. The first pattern matching and the second pattern matching may be called bilateral matching and template matching, respectively.
[0192] [MV Derivation > FRUC > Bilateral Matching] In the first pattern matching, pattern matching is performed between two blocks in two different reference pictures that are along the motion trajectory of the current block. Therefore, in the first pattern matching, as the predetermined region for calculating the evaluation value of the above-described candidate, the region in another reference picture along the motion trajectory of the current block is used. The predetermined region may be determined in advance.
[0193] FIG. 23 is a conceptual diagram for explaining an example of first pattern matching (bilateral matching) between two blocks in two reference pictures along a motion trajectory. As shown in FIG. 23, in the first pattern matching, two motion vectors (MV0, MV1) are derived by searching for the most matching pair among pairs of two blocks in two different reference pictures (Ref0, Ref1) that are two blocks along the motion trajectory of the current block (Cur block). Specifically, for the current block, the difference between the reconstructed image at the specified position in the first encoded reference picture (Ref0) specified by the candidate MV and the reconstructed image at the specified position in the second encoded reference picture (Ref1) specified by the symmetric MV obtained by scaling the candidate MV by the display time interval is derived, and an evaluation value is calculated using the obtained difference value. It is possible to select the candidate MV with the best evaluation value among a plurality of candidate MVs as the final MV, which can bring good results.
[0194] Under the assumption of a continuous motion trajectory, the motion vectors (MV0, MV1) indicating the two reference blocks are proportional to the temporal distances (TD0, TD1) between the current picture (Cur Pic) and the two reference pictures (Ref0, Ref1). For example, when the current picture is temporally located between the two reference pictures and the temporal distances from the current picture to the two reference pictures are equal, mirror-symmetric bidirectional motion vectors are derived in the first pattern matching.
[0195] [MV Derivation > FRUC > Template Matching] In the second pattern matching (template matching), pattern matching is performed between a template in the current picture (a block adjacent to the current block in the current picture (e.g., the upper and / or left adjacent block)) and a block in the reference picture. Therefore, in the second pattern matching, a block adjacent to the current block in the current picture is used as the predetermined area for calculating the evaluation value of the above-described candidate.
[0196] FIG. 24 is a conceptual diagram for explaining an example of pattern matching (template matching) between a template in a current picture and a block in a reference picture. As shown in FIG. 24, in the second pattern matching, the motion vector of the current block is derived by searching in the reference picture (Ref0) for the block that most closely matches the block adjacent to the current block (Cur block) in the current picture (Cur Pic). Specifically, for the current block, the difference between the reconstructed image of the coded region of both or either of the left adjacent and upper adjacent regions and the reconstructed image at the equivalent position in the coded reference picture (Ref0) specified by the candidate MV is derived, an evaluation value is calculated using the obtained difference value, and it is possible to select, as the best candidate MV, the candidate MV having the best evaluation value among a plurality of candidate MVs.
[0197] Information indicating whether or not to apply such a FRUC mode (for example, called a FRUC flag) may be signaled at the CU level. Also, when the FRUC mode is applied (for example, when the FRUC flag is true), information indicating the applicable pattern matching method (the first pattern matching or the second pattern matching) may be signaled at the CU level. Note that the signaling of this information does not necessarily have to be limited to the CU level and may be at other levels (for example, sequence level, picture level, slice level, tile level, CTU level, or sub-block level).
[0198] [MV Derivation > Affine Mode] Next, an affine mode for deriving a motion vector in sub-block units based on the motion vectors of a plurality of adjacent blocks will be described. This mode is sometimes called an affine motion compensation prediction mode.
[0199] FIG. 25A is a conceptual diagram for explaining an example of deriving a motion vector for each sub-block based on motion vectors of a plurality of adjacent blocks. In FIG. 25A, a current block includes 16 4x4 sub-blocks. Here, based on the motion vectors of adjacent blocks, a motion vector v0 of the upper left control point of the current block is derived, and similarly, based on the motion vectors of adjacent sub-blocks, a motion vector v1 of the upper right control point of the current block is derived. Then, the two motion vectors v0 and v1 may be projected according to the following formula (1A), and the motion vectors (v x , v y ) of each sub-block within the current block may be derived.
[0200]
Equation
[0201] Here, x and y respectively indicate the horizontal position and vertical position of the sub-block, and w indicates a predetermined weight coefficient. The predetermined weight coefficient may be determined in advance.
[0202] Information indicating such an affine mode (for example, called an affine flag) may be signaled at the CU level. Note that the signaling of the information indicating this affine mode does not have to be limited to the CU level, and may be at other levels (for example, sequence level, picture level, slice level, tile level, CTU level or sub-block level).
[0203] Also, such an affine mode may include several modes in which the methods for deriving the motion vectors of the upper left and upper right control points are different. For example, the affine mode includes two modes: an affine inter (also called an affine normal inter) mode and an affine merge mode.
[0204] [MV Derivation > Affine Mode] FIG. 25B is a conceptual diagram for explaining an example of deriving motion vectors of sub-block units in affine mode having three control points. In FIG. 25B, a current block includes 16 4x4 sub-blocks. Here, based on the motion vectors of adjacent blocks, the motion vector v0 of the upper left control point of the current block is derived, and similarly, based on the motion vectors of adjacent blocks, the motion vector v1 of the upper right control point of the current block and the motion vector v2 of the lower left control point of the current block are derived. Then, the three motion vectors v0, v1, and v2 may be projected by the following equation (1B), and the motion vectors (v x , v y ) of each sub-block within the current block may be derived.
[0205] [Equation]
[0206] Here, x and y indicate the horizontal position and vertical position of the sub-block center, respectively, w indicates the width of the current block, and h indicates the height of the current block.
[0207] The affine modes with different numbers of control points (for example, two and three) may be switched and signaled at the CU level. Note that information indicating the number of control points of the affine mode used at the CU level may be signaled at other levels (for example, sequence level, picture level, slice level, tile level, CTU level, or sub-block level).
[0208] Also, in such an affine mode having three control points, it may include several modes in which the methods of deriving the motion vectors of the upper left, upper right, and lower left control points are different. For example, the affine mode includes two modes: affine inter (also called affine normal inter) mode and affine merge mode.
[0209] [MV Derivation > Affine Merge Mode] Figures 26A, 26B, and 26C are conceptual diagrams for explaining the affine merge mode.
[0210] In the affine merge mode, as shown in Figure 26A, for example, among the encoded blocks A (left), B (above), C (upper right), D (lower left), and E (upper left) adjacent to the current block, a plurality of motion vectors corresponding to the blocks encoded in the affine mode are used. Based on these motion vectors, the predicted motion vectors of the respective control points of the current block are calculated. Specifically, these blocks are inspected in the order of encoded block A (left), block B (above), block C (upper right), block D (lower left), and block E (upper left), and the first valid block encoded in the affine mode is identified. Based on the plurality of motion vectors corresponding to this identified block, the predicted motion vectors of the control points of the current block are calculated.
[0211] For example, as shown in Figure 26B, when the block A adjacent to the left of the current block is encoded in the affine mode having two control points, the motion vectors v3 and v4 projected onto the upper left corner and upper right corner positions of the encoded block including block A are derived. Then, from the derived motion vectors v3 and v4, the predicted motion vector v0 of the control point at the upper left corner of the current block and the predicted motion vector v1 of the control point at the upper right corner are calculated.
[0212] For example, as shown in Figure 26C, when the block A adjacent to the left of the current block is encoded in the affine mode having three control points, the motion vectors v3, v4, and v5 projected onto the upper left corner, upper right corner, and lower left corner positions of the encoded block including block A are derived. Then, from the derived motion vectors v3, v4, and v5, the predicted motion vector v0 of the control point at the upper left corner of the current block, the predicted motion vector v1 of the control point at the upper right corner, and the predicted motion vector v2 of the control point at the lower left corner are calculated.
[0213] Note that this predicted motion vector derivation method may also be used to derive the respective predicted motion vectors of the control points of the current block in step Sj_1 of FIG. 29 described later.
[0214] FIG. 27 is a flowchart showing an example of the affine merge mode.
[0215] In the affine merge mode, as shown in the figure, first, the inter prediction unit 126 derives the respective predicted MVs of the control points of the current block (step Sk_1). The control points are, as shown in FIG. 25A, the upper left and upper right points of the current block, or, as shown in FIG. 25B, the upper left, upper right, and lower left points of the current block.
[0216] That is, as shown in FIG. 26A, the inter prediction unit 126 inspects these blocks in the order of the encoded block A (left), block B (upper), block C (upper right), block D (lower left), and block E (upper left), and identifies the first valid block encoded in the affine mode.
[0217] When block A is identified and block A has two control points, as shown in FIG. 26B, the inter prediction unit 126 calculates the motion vector v0 of the control point at the upper left corner of the current block and the motion vector v1 of the control point at the upper right corner from the motion vectors v3 and v4 at the upper left and upper right corners of the encoded block including block A. For example, the inter prediction unit 126 projects the motion vectors v3 and v4 at the upper left and upper right corners of the encoded block onto the current block to calculate the predicted motion vector v0 of the control point at the upper left corner of the current block and the predicted motion vector v1 of the control point at the upper right corner.
[0218] Alternatively, when block A is specified and block A has three control points, as shown in FIG. 26C, the inter prediction unit 126 calculates the motion vectors v0, v1, and v2 of the control points at the upper left corner, upper right corner, and lower left corner of the current block from the motion vectors v3, v4, and v5 at the upper left corner, upper right corner, and lower left corner of the encoded block including block A. For example, the inter prediction unit 126 projects the motion vectors v3, v4, and v5 at the upper left corner, upper right corner, and lower left corner of the encoded block onto the current block to calculate the predicted motion vector v0 of the control point at the upper left corner of the current block, the predicted motion vector v1 of the control point at the upper right corner, and the motion vector v2 of the control point at the lower left corner.
[0219] Next, the inter prediction unit 126 performs motion compensation for each of the plurality of sub-blocks included in the current block. That is, the inter prediction unit 126 calculates the motion vector of each of the plurality of sub-blocks as an affine MV using two predicted motion vectors v0 and v1 and the above-described equation (1A), or three predicted motion vectors v0, v1, and v2 and the above-described equation (1B) (step Sk_2). Then, the inter prediction unit 126 performs motion compensation for the sub-block using those affine MVs and the encoded reference picture (step Sk_3). As a result, motion compensation is performed on the current block, and a predicted image of the current block is generated.
[0220] [MV Derivation > Affine Inter Mode] FIG. 28A is a conceptual diagram for explaining the affine inter mode having two control points.
[0221] In this affine interpolation mode, as shown in FIG. 28A, the motion vector selected from the motion vectors of the encoded blocks A, B, and C adjacent to the current block is used as the predicted motion vector v0 of the control point at the upper left corner of the current block. Similarly, the motion vector selected from the motion vectors of the encoded blocks D and E adjacent to the current block is used as the predicted motion vector v1 of the control point at the upper right corner of the current block.
[0222] FIG. 28B is a conceptual diagram for explaining the affine interpolation mode having three control points.
[0223] In this affine interpolation mode, as shown in FIG. 28B, the motion vector selected from the motion vectors of the encoded blocks A, B, and C adjacent to the current block is used as the predicted motion vector v0 of the control point at the upper left corner of the current block. Similarly, the motion vector selected from the motion vectors of the encoded blocks D and E adjacent to the current block is used as the predicted motion vector v1 of the control point at the upper right corner of the current block. Further, the motion vector selected from the motion vectors of the encoded blocks F and G adjacent to the current block is used as the predicted motion vector v2 of the control point at the lower left corner of the current block.
[0224] FIG. 29 is a flowchart showing an example of the affine interpolation mode.
[0225] As shown in the figure, in the affine interpolation mode, first, the inter prediction unit 126 derives the respective predicted MVs (v0, v1) or (v0, v1, v2) of two or three control points of the current block (step Sj_1). The control points are the points at the upper left corner, upper right corner, or lower left corner of the current block, as shown in FIG. 25A or FIG. 25B.
[0226] That is, the inter prediction unit 126 derives the predicted motion vectors (v0, v1) or (v0, v1, v2) of the control points of the current block by selecting the motion vector of any one of the encoded blocks near each control point of the current block shown in FIG. 28A or FIG. 28B. At this time, the inter prediction unit 126 encodes the prediction motion vector selection information for identifying the two selected motion vectors into the stream.
[0227] For example, the inter prediction unit 126 determines which block's motion vector to select as the predicted motion vector of the control point from the encoded blocks adjacent to the current block using cost evaluation or the like, and may describe a flag indicating which predicted motion vector is selected in the bit stream.
[0228] Next, while updating the predicted motion vectors respectively selected or derived in step Sj_1 (step Sj_2), the inter prediction unit 126 performs motion search (steps Sj_3 and Sj_4). That is, the inter prediction unit 126 calculates the motion vectors of the respective sub-blocks corresponding to the updated predicted motion vectors as affine MVs using the above formula (1A) or formula (1B) (step Sj_3). Then, the inter prediction unit 126 performs motion compensation on each sub-block using those affine MVs and the encoded reference picture (step Sj_4). As a result, in the motion search loop, the inter prediction unit 126 determines, for example, the predicted motion vector that obtains the smallest cost as the motion vector of the control point (step Sj_5). At this time, the inter prediction unit 126 further encodes the difference value between the determined MV and each predicted motion vector as a differential MV into the stream.
[0229] Finally, the inter prediction unit 126 generates a predicted image of the current block by performing motion compensation on the current block using the determined MV and the encoded reference picture (step Sj_6).
[0230] [MV Derivation > Affine Inter Mode] When switching and signaling affine modes with different numbers of control points (e.g., two and three) at the CU level, the number of control points may be different between the coded block and the current block. FIGS. 30A and 30B are conceptual diagrams for explaining a method of deriving a prediction vector of control points when the number of control points is different between the coded block and the current block.
[0231] For example, as shown in FIG. 30A, when the current block has three control points at the upper left corner, upper right corner, and lower left corner, and the block A adjacent to the left of the current block is coded in an affine mode with two control points, motion vectors v3 and v4 projected onto the upper left corner and upper right corner positions of the coded block including block A are derived. Then, from the derived motion vectors v3 and v4, a predicted motion vector v0 of the control point at the upper left corner of the current block and a predicted motion vector v1 of the control point at the upper right corner are calculated. Further, from the derived motion vectors v0 and v1, a predicted motion vector v2 of the control point at the lower left corner is calculated.
[0232] For example, as shown in FIG. 30B, when the current block has two control points at the upper left corner and upper right corner, and the block A adjacent to the left of the current block is coded in an affine mode with three control points, motion vectors v3, v4, and v5 projected onto the upper left corner, upper right corner, and lower left corner positions of the coded block including block A are derived. Then, from the derived motion vectors v3, v4, and v5, a predicted motion vector v0 of the control point at the upper left corner of the current block and a predicted motion vector v1 of the control point at the upper right corner are calculated.
[0233] This prediction motion vector derivation method may be used to derive each predicted motion vector of the control points of the current block in step Sj_1 of FIG. 29.
[0234] [MV Derivation > DMVR] FIG. 31A is a flowchart showing the relationship between the merge mode and DMVR.
[0235] The inter prediction unit 126 derives the motion vector of the current block in the merge mode (step Sl_1). Next, the inter prediction unit 126 determines whether to perform motion vector search, that is, motion search (step Sl_2). Here, if the inter prediction unit 126 determines not to perform motion search (No in step Sl_2), it determines the motion vector derived in step Sl_1 as the final motion vector for the current block (step Sl_4). That is, in this case, the motion vector of the current block is determined in the merge mode.
[0236] On the other hand, if it is determined to perform motion search in step Sl_1 (Yes in step Sl_2), the inter prediction unit 126 derives the final motion vector for the current block by searching the peripheral region of the reference picture indicated by the motion vector derived in step Sl_1 (step Sl_3). That is, in this case, the motion vector of the current block is determined by DMVR.
[0237] FIG. 31B is a conceptual diagram for explaining an example of the DMVR process for determining the MV.
[0238] First, the optimal MVP set for the current block (for example, in the merge mode) is used as the candidate MV. Then, according to the candidate MV (L0), reference pixels are specified from the first reference picture (L0), which is the encoded picture in the L0 direction. Similarly, according to the candidate MV (L1), reference pixels are specified from the second reference picture (L1), which is the encoded picture in the L1 direction. A template is generated by taking the average of these reference pixels.
[0239] Next, using the template, search for the peripheral regions of the candidate MVs of the first reference picture (L0) and the second reference picture (L1), respectively, and determine the MV with the minimum cost as the final MV. Note that the cost value may be calculated using, for example, the difference value between each pixel value of the template and each pixel value of the search region, the candidate MV value, and the like.
[0240] Note that typically, in the encoding device and the decoding device described later, the configuration and operation of the processing described here are basically common.
[0241] Even if it is not the processing example itself described here, any processing may be used as long as it is a processing capable of searching the periphery of the candidate MV to derive the final MV.
[0242] [Motion Compensation > BIO / OBMC] In motion compensation, there are modes for generating a predicted image and correcting the predicted image. Those modes are, for example, BIO and OBMC described later.
[0243] FIG. 32 is a flowchart showing an example of generating a predicted image.
[0244] The inter prediction unit 126 generates a predicted image (step Sm_1) and corrects the predicted image by, for example, any of the above-described modes (step Sm_2).
[0245] FIG. 33 is a flowchart showing another example of generating a predicted image.
[0246] The inter prediction unit 126 determines the motion vector of the current block (step Sn_1). Next, the inter prediction unit 126 generates a prediction image (step Sn_2) and determines whether to perform correction processing (step Sn_3). Here, when the inter prediction unit 126 determines to perform correction processing (Yes in step Sn_3), it generates a final prediction image by correcting the prediction image (step Sn_4). On the other hand, when the inter prediction unit 126 determines not to perform correction processing (No in step Sn_3), it outputs the prediction image as the final prediction image without correction (step Sn_5).
[0247] Also, in motion compensation, there is a mode in which the luminance is corrected when generating a prediction image. That mode is, for example, LIC described later.
[0248] FIG. 34 is a flowchart showing another example of generating a prediction image.
[0249] The inter prediction unit 126 derives the motion vector of the current block (step So_1). Next, the inter prediction unit 126 determines whether to perform luminance correction processing (step So_2). Here, when the inter prediction unit 126 determines to perform luminance correction processing (Yes in step So_2), it generates a prediction image while performing luminance correction (step So_3). That is, the prediction image is generated by LIC. On the other hand, when the inter prediction unit 126 determines not to perform luminance correction processing (No in step So_2), it generates a prediction image by normal motion compensation without performing luminance correction (step So_4).
[0250] [Motion Compensation > OBMC] Not only the motion information of the current block obtained by motion search but also the motion information of adjacent blocks may be used to generate an inter prediction signal. Specifically, an inter prediction signal may be generated on a sub-block basis within the current block by weighted addition of a prediction signal based on the motion information obtained by motion search (within the reference picture) and a prediction signal based on the motion information of adjacent blocks (within the current picture). Such inter prediction (motion compensation) is sometimes called OBMC (overlapped block motion compensation).
[0251] In the OBMC mode, information indicating the size of sub-blocks for OBMC (for example, called OBMC block size) may be signaled at the sequence level. Further, information indicating whether to apply the OBMC mode (for example, called OBMC flag) may be signaled at the CU level. Note that the signaling levels of these pieces of information do not have to be limited to the sequence level and the CU level, and may be other levels (for example, picture level, slice level, tile level, CTU level or sub-block level).
[0252] An example of the OBMC mode will be described more specifically. FIGS. 35 and 36 are a flowchart and a conceptual diagram for explaining the outline of prediction image correction processing by OBMC processing.
[0253] First, as shown in FIG. 36, a predicted image (Pred) by normal motion compensation is obtained using the motion vector (MV) assigned to the processing target (current) block. In FIG. 36, the arrow “MV” points to the reference picture and indicates what the current block of the current picture is referring to in order to obtain the predicted image.
[0254] Next, the motion vector (MV_L) already derived for the encoded left adjacent block is applied (reused) to the block to be encoded to obtain a predicted image (Pred_L). The motion vector (MV_L) is indicated by the arrow "MV_L" pointing from the current block to the reference picture. Then, the first correction of the predicted image is performed by superimposing the two predicted images Pred and Pred_L. This has the effect of blending the boundaries between adjacent blocks.
[0255] Similarly, the motion vector (MV_U) already derived for the encoded upper adjacent block is applied (reused) to the block to be encoded to obtain a predicted image (Pred_U). The motion vector (MV_U) is indicated by the arrow "MV_U" pointing from the current block to the reference picture. Then, the second correction of the predicted image is performed by superimposing the predicted image Pred_U on the predicted image (e.g., Pred and Pred_L) that has undergone the first correction. This has the effect of blending the boundaries between adjacent blocks. The predicted image obtained by the second correction is the final predicted image of the current block with the boundaries blended (smoothed) with adjacent blocks.
[0256] Note that the above example is a two-pass correction method using left and upper adjacent blocks, but the correction method may also be a three-pass or more-pass correction method using right and / or lower adjacent blocks.
[0257] Note that the region for superimposition may be only a partial region near the block boundary, rather than the pixel region of the entire block.
[0258] Here, the prediction image correction process of OBMC for obtaining one prediction image Pred by superimposing additional prediction images Pred_L and Pred_U from one reference picture has been described. However, when the prediction image is corrected based on a plurality of reference images, the same process may be applied to each of the plurality of reference pictures. In such a case, by performing the image correction of OBMC based on a plurality of reference pictures, after obtaining the corrected prediction images from each of the reference pictures, the final prediction image is obtained by further superimposing the obtained plurality of corrected prediction images.
[0259] Note that in OBMC, the unit of the target block may be a prediction block unit or a sub-block unit obtained by further dividing the prediction block.
[0260] As a method for determining whether to apply the OBMC process, for example, there is a method using an obmc_flag which is a signal indicating whether to apply the OBMC process. As a specific example, the encoding device may determine whether the target block belongs to a region with complex motion. When the target block belongs to a region with complex motion, the encoding device sets the value 1 as the obmc_flag and performs encoding by applying the OBMC process. When the target block does not belong to a region with complex motion, the encoding device sets the value 0 as the obmc_flag and performs block encoding without applying the OBMC process. On the other hand, in the decoding device, by decoding the obmc_flag described in the stream (for example, the compressed sequence), decoding is performed by switching whether to apply the OBMC process according to the value.
[0261] In the above example, the inter prediction unit 126 generates one rectangular prediction image for the rectangular current block. However, the inter prediction unit 126 may generate a plurality of prediction images with shapes different from the rectangle for the rectangular current block, and generate the final rectangular prediction image by combining these plurality of prediction images. The shape different from the rectangle may be, for example, a triangle.
[0262] FIG. 37 is a conceptual diagram for explaining the generation of two predicted images of a triangle.
[0263] The inter prediction unit 126 generates a predicted image of a triangle by performing motion compensation on the first partition of the triangle in the current block using the first MV of the first partition. Similarly, the inter prediction unit 126 generates a predicted image of a triangle by performing motion compensation on the second partition of the triangle in the current block using the second MV of the second partition. Then, the inter prediction unit 126 generates a predicted image of a rectangle identical to the current block by combining these predicted images.
[0264] In the example shown in FIG. 37, the first partition and the second partition are each a triangle, but they may be trapezoids, or they may have different shapes from each other. Further, in the example shown in FIG. 37, the current block is composed of two partitions, but it may be composed of three or more partitions.
[0265] Also, the first partition and the second partition may overlap. That is, the first partition and the second partition may include the same pixel region. In this case, a predicted image of the current block may be generated using the predicted image in the first partition and the predicted image in the second partition.
[0266] Also, in this example, an example in which predicted images are generated by inter prediction for both of the two partitions is shown, but predicted images may be generated by intra prediction for at least one partition.
[0267] [Motion Compensation > BIO] Next, a method for deriving a motion vector will be described. First, a mode for deriving a motion vector based on a model assuming uniform linear motion will be described. This mode is sometimes called the BIO (bi-directional optical flow) mode.
[0268] Figure 38 is a conceptual diagram for explaining a model assuming uniform linear motion. In Figure 38, (vx, vy) represents the velocity vector, and τ0 and τ1 represent the temporal distances between the current picture (Cur Pic) and two reference pictures (Ref0, Ref1), respectively. (MVx0, MVy0) represents the motion vector corresponding to the reference picture Ref0, and (MVx1, MVy1) represents the motion vector corresponding to the reference picture Ref1.
[0269] At this time, under the assumption of uniform linear motion of the velocity vector (vx, vy), (MVx0, MVy0) and (MVx1, MVy1) are represented by (vxτ0, vyτ0) and (-vxτ1, -vyτ1), respectively, and the following optical flow equation (2) may be adopted.
[0270] [Equation]
[0271] Here, I(k) represents the luminance value of the reference image k (k = 0, 1) after motion compensation. This optical flow equation indicates that the sum of (i) the temporal derivative of the luminance value, (ii) the product of the horizontal velocity and the horizontal component of the spatial gradient of the reference image, and (iii) the product of the vertical velocity and the vertical component of the spatial gradient of the reference image is equal to zero. Based on the combination of this optical flow equation and Hermite interpolation, the motion vector in block units obtained from the merge list or the like may be corrected in pixel units.
[0272] Note that the motion vector may be derived on the decoder side by a method different from the derivation of the motion vector based on the model assuming uniform linear motion. For example, the motion vector may be derived in sub-block units based on the motion vectors of a plurality of adjacent blocks.
[0273] [Motion Compensation > LIC] Next, an example of a mode for generating a predicted image (prediction) using LIC (local illumination compensation) processing will be described.
[0274] FIG. 39 is a conceptual diagram for explaining an example of a method for generating a predicted image using luminance correction processing by LIC processing.
[0275] First, an MV is derived from the encoded reference picture to obtain a reference image corresponding to the current block.
[0276] Next, for the current block, information indicating how the luminance value changes between the reference picture and the current picture is extracted. This extraction is performed based on the luminance pixel values in the encoded left adjacent reference region (peripheral reference region) and the encoded upper adjacent reference region (peripheral reference region) in the current picture, and the luminance pixel values at equivalent positions in the reference picture specified by the derived MV. Then, a luminance correction parameter is calculated using the information indicating how the luminance value changes.
[0277] A predicted image for the current block is generated by performing a luminance correction process of applying the luminance correction parameter to the reference image in the reference picture specified by the MV.
[0278] Note that the shape of the peripheral reference region in FIG. 39 is an example, and other shapes may be used.
[0279] Also, although the process of generating a predicted image from one reference picture has been described here, the same applies to the case of generating a predicted image from a plurality of reference pictures. After performing luminance correction processing on the reference images obtained from each reference picture in the same manner as described above, a predicted image may be generated.
[0280] As a method for determining whether to apply LIC processing, for example, there is a method that uses lic_flag, which is a signal indicating whether to apply LIC processing. As a specific example, in an encoding device, it is determined whether the current block belongs to an area where a luminance change has occurred. If it belongs to an area where a luminance change has occurred, a value of 1 is set as lic_flag and encoding is performed by applying LIC processing. If it does not belong to an area where a luminance change has occurred, a value of 0 is set as lic_flag and encoding is performed without applying LIC processing. On the other hand, in a decoding device, by decoding the lic_flag described in the stream, decoding may be performed by switching whether to apply LIC processing according to the value thereof.
[0281] As another method for determining whether to apply LIC processing, for example, there is also a method of determining according to whether LIC processing has been applied to surrounding blocks. As a specific example, when the current block is in merge mode, it is determined whether the encoded block around selected when deriving the MV in the merge mode processing has been encoded by applying LIC processing. Encoding is performed by switching whether to apply LIC processing according to the result. Note that also in the case of this example, the same processing is applied to the processing on the decoder side.
[0282] Although the mode of LIC processing (luminance correction processing) has been described with reference to FIG. 39, the details will be described below.
[0283] First, the inter prediction unit 126 derives a motion vector for acquiring a reference image corresponding to the encoding target block from the reference picture, which is an encoded picture.
[0284] Next, the inter prediction unit 126 extracts information indicating how the luminance values change between the reference picture and the picture to be coded, using the luminance pixel values in the left and upper adjacent coded peripheral reference regions for the block to be coded and the luminance pixel values at the equivalent positions in the reference picture specified by the motion vector, and calculates the luminance correction parameter. For example, let the luminance pixel value of a certain pixel in the peripheral reference region within the picture to be coded be p0, and let the luminance pixel value of the pixel in the peripheral reference region within the reference picture at the equivalent position to this pixel be p1. The inter prediction unit 126 calculates, as the luminance correction parameter, the coefficients A and B that optimize A×p1 + B = p0 for a plurality of pixels in the peripheral reference region.
[0285] Next, the inter prediction unit 126 performs luminance correction processing on the reference image in the reference picture specified by the motion vector using the luminance correction parameter, thereby generating a prediction image for the block to be coded. For example, let the luminance pixel value in the reference image be p2, and let the luminance pixel value of the prediction image after the luminance correction processing be p3. The inter prediction unit 126 generates the prediction image after the luminance correction processing by calculating A×p2 + B = p3 for each pixel in the reference image.
[0286] Note that the shape of the peripheral reference region in FIG. 39 is an example, and other shapes may be used. Also, a part of the peripheral reference region shown in FIG. 39 may be used. For example, a region including a predetermined number of pixels decimated from each of the upper adjacent pixel and the left adjacent pixel may be used as the peripheral reference region. Also, the peripheral reference region is not limited to the region adjacent to the block to be coded, and may be a region not adjacent to the block to be coded. The predetermined number regarding the pixels may be determined in advance.
[0287] Also, in the example shown in FIG. 39, the peripheral reference region in the reference picture is the region specified by the motion vector of the picture to be coded from the peripheral reference region within the picture to be coded, but it may be the region specified by another motion vector. For example, the other motion vector may be the motion vector of the peripheral reference region within the picture to be coded.
[0288] Here, the operation of the encoding device 100 has been described. However, the operation of the decoding device 200 is typically the same.
[0289] Note that the LIC process may be applied not only to luminance but also to color difference. At this time, correction parameters may be derived individually for each of Y, Cb, and Cr, or a common correction parameter may be used for any of them.
[0290] Also, the LIC process may be applied in sub-block units. For example, correction parameters may be derived using the peripheral reference region of the current sub-block and the peripheral reference region of the reference sub-block in the reference picture specified by the MV of the current sub-block.
[0291] [Prediction control unit] The prediction control unit 128 selects either the intra-prediction signal (the signal output from the intra-prediction unit 124) or the inter-prediction signal (the signal output from the inter-prediction unit 126), and outputs the selected signal as the prediction signal to the subtraction unit 104 and the addition unit 116.
[0292] As shown in FIG. 1, in various examples of an encoding device, the prediction control unit 128 may output prediction parameters input to the entropy encoding unit 110. The entropy encoding unit 110 may generate an encoded bit stream (or sequence) based on the prediction parameters input from the prediction control unit 128 and the quantization coefficients input from the quantization unit 108. The prediction parameters may be used in a decoding device. The decoding device may receive and decode the encoded bit stream and perform the same processing as the prediction processing performed in the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128. The prediction parameters may include a selection prediction signal (e.g., a motion vector, a prediction type, or a prediction mode used in the intra prediction unit 124 or the inter prediction unit 126), or any index, flag, or value based on or indicating the prediction processing performed in the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128.
[0293] [Example of Implementation of Encoding Device] FIG. 40 is a block diagram showing an example of the implementation of the encoding device 100. The encoding device 100 includes a processor a1 and a memory a2. For example, a plurality of components of the encoding device 100 shown in FIG. 1 are implemented by the processor a1 and the memory a2 shown in FIG. 40.
[0294] The processor a1 is a circuit that performs information processing and is a circuit that can access the memory a2. For example, the processor a1 is a dedicated or general-purpose electronic circuit that encodes moving images. The processor a1 may be a processor such as a CPU. Also, the processor a1 may be an aggregate of a plurality of electronic circuits. Also, for example, the processor a1 may perform the roles of a plurality of components among the plurality of components of the encoding device 100 shown in FIG. 1 and the like.
[0295] Memory a2 is a dedicated or general-purpose memory in which information for the processor a1 to encode a moving image is stored. Memory a2 may be an electronic circuit and may be connected to the processor a1. Also, memory a2 may be included in the processor a1. Further, memory a2 may be an aggregate of a plurality of electronic circuits. Also, memory a2 may be a magnetic disk, an optical disk, etc., or may be expressed as a storage or a recording medium, etc. Also, memory a2 may be a non-volatile memory or a volatile memory.
[0296] For example, memory a2 may store the moving image to be encoded, or may store the bit string corresponding to the encoded moving image. Also, a program for the processor a1 to encode a moving image may be stored in memory a2.
[0297] Also, for example, memory a2 may play the role of a component for storing information among a plurality of components of the encoding device 100 shown in FIG. 1 etc. For example, memory a2 may play the role of the block memory 118 and the frame memory 122 shown in FIG. 1. More specifically, memory a2 may store the reconstructed blocks, the reconstructed pictures, etc.
[0298] Note that in the encoding device 100, not all of the plurality of components shown in FIG. 1 etc. need to be implemented, and not all of the plurality of processes described above need to be performed. A part of the plurality of components shown in FIG. 1 etc. may be included in another device, and a part of the plurality of processes described above may be executed by another device.
[0299] [Decoder device] Next, for example, a decoder device capable of decoding the encoded signal (encoded bit stream) output from the above encoding device 100 will be described. FIG. 41 is a block diagram showing the functional configuration of the decoder device 200 according to the embodiment. The decoder device 200 is a moving image decoder device that decodes a moving image in block units.
[0300] As shown in FIG. 41, the decoding apparatus 200 includes an entropy decoding unit 202, an inverse quantization unit 204, an inverse transformation unit 206, an addition unit 208, a block memory 210, a loop filter unit 212, a frame memory 214, an intra prediction unit 216, an inter prediction unit 218, and a prediction control unit 220.
[0301] The decoding apparatus 200 is realized by, for example, a general-purpose processor and a memory. In this case, when a software program stored in the memory is executed by the processor, the processor functions as the entropy decoding unit 202, the inverse quantization unit 204, the inverse transformation unit 206, the addition unit 208, the loop filter unit 212, the intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220. Further, the decoding apparatus 200 may be realized as one or more dedicated electronic circuits corresponding to the entropy decoding unit 202, the inverse quantization unit 204, the inverse transformation unit 206, the addition unit 208, the loop filter unit 212, the intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220.
[0302] After explaining the overall processing flow of the decoding apparatus 200 below, each component included in the decoding apparatus 200 will be described.
[0303] [Overall Flow of Decoding Process] FIG. 42 is a flowchart showing an example of the overall decoding process by the decoding apparatus 200.
[0304] First, the entropy decoding unit 202 of the decoding apparatus 200 specifies a division pattern of a block of a fixed size (for example, 128×128 pixels) (step Sp_1). This division pattern is the division pattern selected by the encoding apparatus 100. Then, the decoding apparatus 200 performs the processing of steps Sp_2 to Sp_6 for each of the plurality of blocks constituting the division pattern.
[0305] That is, the entropy decoding unit 202 decodes (specifically, entropy decodes) the encoded quantization coefficients and prediction parameters of the block to be decoded (also referred to as the current block) (step Sp_2).
[0306] Next, the inverse quantization unit 204 and the inverse transform unit 206 restore a plurality of prediction residuals (that is, difference blocks) by performing inverse quantization and inverse transform on the plurality of quantization coefficients (step Sp_3).
[0307] Next, a prediction processing unit composed of all or part of the intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220 generates a prediction signal (also referred to as a prediction block) of the current block (step Sp_4).
[0308] Next, the addition unit 208 reconstructs the current block into a reconstructed image (also referred to as a decoded image block) by adding the prediction block to the difference block (step Sp_5).
[0309] Then, when this reconstructed image is generated, the loop filter unit 212 performs filtering on the reconstructed image (step Sp_6).
[0310] Then, the decoding device 200 determines whether the decoding of the entire picture is completed (step Sp_7). If it is determined that the decoding is not completed (No in step Sp_7), the processing from step Sp_1 is repeatedly executed.
[0311] As shown in the figure, the processing of steps Sp_1 to Sp_7 is sequentially performed by the decoding device 200. Alternatively, a plurality of some of these processes may be performed in parallel, or the order may be changed, etc.
[0312] [Entropy Decoding Unit] The entropy decoding unit 202 entropy-decodes the encoded bit stream. Specifically, the entropy decoding unit 202, for example, arithmetically decodes the encoded bit stream into a binary signal. Then, the entropy decoding unit 202 de-binarizes the binary signal. The entropy decoding unit 202 outputs quantization coefficients to the inverse quantization unit 204 in block units. The entropy decoding unit 202 may output prediction parameters included in the encoded bit stream (see FIG. 1) to the intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220 in the embodiment. The intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220 can execute the same prediction processing as that performed by the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128 on the encoding device side.
[0313] [Inverse quantization unit] The inverse quantization unit 204 inverse-quantizes the quantization coefficients of the block to be decoded (hereinafter referred to as the current block), which is the input from the entropy decoding unit 202. Specifically, the inverse quantization unit 204 inverse-quantizes each of the quantization coefficients of the current block based on the quantization parameter corresponding to the quantization coefficient. Then, the inverse quantization unit 204 outputs the inverse-quantized quantization coefficients (i.e., transform coefficients) of the current block to the inverse transform unit 206.
[0314] [Inverse transform unit] The inverse transform unit 206 restores the prediction error by inverse-transforming the transform coefficients, which is the input from the inverse quantization unit 204.
[0315] For example, when the information decoded from the encoded bit stream indicates that EMT or AMT is to be applied (e.g., the AMT flag is true), the inverse transform unit 206 inverse-transforms the transform coefficients of the current block based on the information indicating the decoded transform type.
[0316] Also, for example, when the information decoded from the encoded bit stream indicates that NSST is to be applied, the inverse transform unit 206 applies inverse reverse transformation to the transform coefficients.
[0317] [Addition unit] The addition unit 208 reconstructs the current block by adding the prediction error, which is the input from the inverse conversion unit 206, and the prediction sample, which is the input from the prediction control unit 220. Then, the addition unit 208 outputs the reconstructed block to the block memory 210 and the loop filter unit 212.
[0318] [Block memory] The block memory 210 is a storage unit for storing blocks within the decoded target picture (hereinafter referred to as the current picture), which are blocks referred to in intra prediction. Specifically, the block memory 210 stores the reconstructed block output from the addition unit 208.
[0319] [Loop filter unit] The loop filter unit 212 applies a loop filter to the block reconstructed by the addition unit 208 and outputs the filtered reconstructed block to the frame memory 214 and a display device, etc.
[0320] When the information indicating the on / off of the ALF read from the encoded bitstream indicates that the ALF is on, one filter is selected from a plurality of filters based on the local gradient direction and activity, and the selected filter is applied to the reconstructed block.
[0321] [Frame memory] The frame memory 214 is a storage unit for storing reference pictures used in inter prediction and may also be called a frame buffer. Specifically, the frame memory 214 stores the reconstructed block filtered by the loop filter unit 212.
[0322] [Prediction processing unit (intra prediction unit, inter prediction unit, prediction control unit)] FIG. 43 is a flowchart showing an example of the processing performed by the prediction processing unit of the decoding apparatus 200. The prediction processing unit includes all or some of the components of the intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220.
[0323] The prediction processing unit generates a predicted image of the current block (step Sq_1). This predicted image is also referred to as a prediction signal or a prediction block. Note that the prediction signal includes, for example, an intra prediction signal or an inter prediction signal. Specifically, the prediction processing unit generates a predicted image of the current block using the reconstructed image already obtained by performing generation of a prediction block, generation of a difference block, generation of a coefficient block, restoration of the difference block, and generation of a decoded image block.
[0324] The reconstructed image may be, for example, an image of a reference picture, or may be an image of a decoded block in the current picture that is a picture including the current block. The decoded block in the current picture is, for example, an adjacent block of the current block.
[0325] FIG. 44 is a flowchart showing another example of the processing performed by the prediction processing unit of the decoding apparatus 200.
[0326] The prediction processing unit determines a method or mode for generating a predicted image (step Sr_1). For example, this method or mode may be determined based on, for example, prediction parameters.
[0327] When the prediction processing unit determines the first method as the mode for generating the predicted image, it generates the predicted image according to the first method (step Sr_2a). When the prediction processing unit determines the second method as the mode for generating the predicted image, it generates the predicted image according to the second method (step Sr_2b). When the prediction processing unit determines the third method as the mode for generating the predicted image, it generates the predicted image according to the third method (step Sr_2c).
[0328] The first method, the second method, and the third method are different methods for generating a predicted image, and may be, for example, an inter prediction method, an intra prediction method, and other prediction methods, respectively. In these prediction methods, the above-described reconstructed image may be used.
[0329] [Intra Prediction Unit] The intra prediction unit 216 generates a prediction signal (intra prediction signal) by performing intra prediction with reference to a block in the current picture stored in the block memory 210 based on the intra prediction mode decoded from the encoded bitstream. Specifically, the intra prediction unit 216 generates an intra prediction signal by performing intra prediction with reference to samples (e.g., luminance values, color difference values) of blocks adjacent to the current block, and outputs the intra prediction signal to the prediction control unit 220.
[0330] Note that when an intra prediction mode that refers to a luminance block in the intra prediction of a color difference block is selected, the intra prediction unit 216 may predict the color difference component of the current block based on the luminance component of the current block.
[0331] Also, when the information decoded from the encoded bitstream indicates the application of PDPC, the intra prediction unit 216 corrects the pixel value after intra prediction based on the gradients of the reference pixels in the horizontal / vertical directions.
[0332] [Inter Prediction Unit] The inter prediction unit 218 predicts the current block by referring to the reference picture stored in the frame memory 214. The prediction is performed in units of the current block or sub-blocks (e.g., 4x4 blocks) within the current block. For example, the inter prediction unit 218 generates an inter prediction signal for the current block or sub-block by performing motion compensation using motion information (e.g., motion vectors) decoded from the encoded bitstream (e.g., prediction parameters output from the entropy decoding unit 202), and outputs the inter prediction signal to the prediction control unit 220.
[0333] When the information decoded from the encoded bitstream indicates that the OBMC mode is to be applied, the inter prediction unit 218 generates an inter prediction signal using not only the motion information of the current block obtained by motion search but also the motion information of adjacent blocks.
[0334] Also, when the information decoded from the encoded bitstream indicates that the FRUC mode is to be applied, the inter prediction unit 218 derives motion information by performing motion search according to the pattern matching method (bilateral matching or template matching) decoded from the encoded stream. Then, the inter prediction unit 218 performs motion compensation (prediction) using the derived motion information.
[0335] Also, the inter prediction unit 218 derives a motion vector based on a model assuming uniform linear motion when the BIO mode is applied. Also, when the information decoded from the encoded bitstream indicates that the affine motion compensation prediction mode is to be applied, the inter prediction unit 218 derives a motion vector in units of sub-blocks based on the motion vectors of a plurality of adjacent blocks.
[0336] [MV Derivation > Normal Inter Mode] When the information decoded from the symbolized bitstream indicates that the normal inter mode is to be applied, the inter prediction unit 218 derives an MV based on the information decoded from the coded stream, and performs motion compensation (prediction) using the MV.
[0337] FIG. 45 is a flowchart showing an example of inter prediction in the normal inter mode in the decoding apparatus 200.
[0338] The inter prediction unit 218 of the decoding apparatus 200 performs motion compensation for each block. The inter prediction unit 218 acquires a plurality of candidate MVs for the current block based on information such as the MVs of a plurality of decoded blocks temporally or spatially around the current block (step Ss_1). That is, the inter prediction unit 218 creates a candidate MV list.
[0339] Next, the inter prediction unit 218 extracts, as prediction motion vector candidates (also referred to as prediction MV candidates), each of N (N is an integer of 2 or more) candidate MVs from among the plurality of candidate MVs acquired in step Ss_1 according to a predetermined priority order (step Ss_2). Note that the priority order may be determined in advance for each of the N prediction MV candidates.
[0340] Next, the inter prediction unit 218 decodes prediction motion vector selection information from the input stream (that is, the symbolized bitstream), and uses the decoded prediction motion vector selection information to select one prediction MV candidate from among the N prediction MV candidates as the prediction motion vector (also referred to as prediction MV) of the current block (step Ss_3).
[0341] Next, the inter prediction unit 218 decodes the differential MV from the input stream, and derives the MV of the current block by adding the differential value, which is the decoded differential MV, to the selected prediction motion vector (step Ss_4).
[0342] Finally, the inter prediction unit 218 generates a predicted image of the current block by performing motion compensation on the current block using the derived MV and the decoded reference picture (step Ss_5).
[0343] [Prediction control unit] The prediction control unit 220 selects either the intra prediction signal or the inter prediction signal, and outputs the selected signal as a prediction signal to the adder 208. Overall, the configuration, function, and processing of the prediction control unit 220, the intra prediction unit 216, and the inter prediction unit 218 on the decoder side may correspond to the configuration, function, and processing of the prediction control unit 128, the intra prediction unit 124, and the inter prediction unit 126 on the encoder side.
[0344] [Implementation example of decoder] FIG. 46 is a block diagram showing an implementation example of the decoder 200. The decoder 200 includes a processor b1 and a memory b2. For example, a plurality of components of the decoder 200 shown in FIG. 41 are implemented by the processor b1 and the memory b2 shown in FIG. 46.
[0345] The processor b1 is a circuit that performs information processing and is a circuit that can access the memory b2. For example, the processor b1 is a dedicated or general-purpose electronic circuit that decodes an encoded moving image (i.e., an encoded bitstream). The processor b1 may be a processor such as a CPU. Also, the processor b1 may be an aggregate of a plurality of electronic circuits. Also, for example, the processor b1 may perform the roles of a plurality of components among the plurality of components of the decoder 200 shown in FIG. 41 and the like.
[0346] Memory b2 is a dedicated or general-purpose memory in which information for the processor b1 to decode the encoded bitstream is stored. Memory b2 may be an electronic circuit and may be connected to processor b1. Also, memory b2 may be included in processor b1. Further, memory b2 may be an aggregate of a plurality of electronic circuits. Also, memory b2 may be a magnetic disk, an optical disk, etc., or may be expressed as a storage or recording medium, etc. Also, memory b2 may be a non-volatile memory or a volatile memory.
[0347] For example, a moving image or an encoded bitstream may be stored in memory b2. Also, a program for the processor b1 to decode the encoded bitstream may be stored in memory b2.
[0348] Also, for example, memory b2 may serve as a component for storing information among a plurality of components of the decoding device 200 shown in FIG. 41 etc. Specifically, memory b2 may serve as the block memory 210 and the frame memory 214 shown in FIG. 41. More specifically, reconstructed blocks, reconstructed pictures, etc. may be stored in memory b2.
[0349] Note that in the decoding device 200, not all of the plurality of components shown in FIG. 41 etc. need to be implemented, and not all of the plurality of processes described above need to be performed. A part of the plurality of components shown in FIG. 41 etc. may be included in another device, and a part of the plurality of processes described above may be executed by another device.
[0350] [Definitions of Each Term] Each term may be defined as follows as an example.
[0351] A picture is an array of a plurality of luminance samples in a monochrome format, or an array of a plurality of luminance samples and two corresponding arrays of a plurality of chrominance samples in color formats of 4:2:0, 4:2:2, and 4:4:4. The picture may be a frame or a field.
[0352] A frame is a composition of a top field where a plurality of sample rows 0, 2, 4, ··· occur, and a bottom field where a plurality of sample rows 1, 3, 5, ··· occur.
[0353] A slice is an integer number of coded tree units included in one independent slice segment and all subsequent dependent slice segments (if any) preceding the next independent slice segment (if any) in the same access unit.
[0354] A tile is a rectangular area of a plurality of coded tree blocks in a specific tile column and a specific tile row in a picture. The tile may be a rectangular area of a frame that is still intended to be independently decoded and encoded, although a loop filter spanning the edges of the tile may still be applied.
[0355] A block is an MxN (N rows and M columns) array of a plurality of samples, or an MxN array of a plurality of transform coefficients. The block may be a square or rectangular area of a plurality of pixels consisting of a plurality of matrices of one luminance and two chrominances.
[0356] A CTU (Coded Tree Unit) may be a coded tree block of a plurality of luminance samples of a picture having three sample arrays, or two corresponding coded tree blocks of a plurality of chrominance samples. Alternatively, a CTU may be a coded tree block of a plurality of samples of either a monochrome picture or a picture encoded using a syntax structure used for encoding three separate color planes and a plurality of samples.
[0357] The super block may constitute one or two mode information blocks, or may be a square block of 64×64 pixels that is recursively divided into four 32×32 blocks and can be further divided.
[0358] [First Aspect] Hereinafter, the first aspect will be described. When the size of the processing target block of the image is larger than a predetermined size, the encoding device 100 according to the first aspect uses only the reconstructed image around a predetermined-size processing unit (also called the so-called first processing unit) located at the upper left in the processing target block among the reconstructed images around the processing target block to derive a correction parameter, and performs a correction process on the processing target block based on the derived correction parameter. Also, when the size of the processing target block of the image is larger than a predetermined size, the decoding device 200 according to the first aspect uses only the reconstructed image around a predetermined-size processing unit (the so-called first processing unit) located at the upper left in the processing target block among the reconstructed images around the processing target block to derive a correction parameter, and performs a correction process on the processing target block based on the derived correction parameter.
[0359] First, the pipeline processing unit will be described with reference to FIG. 47. FIG. 47 is a diagram schematically showing an example of the pipeline processing unit. Note that the pipeline processing unit is a processing unit of a predetermined size.
[0360] The largest encoding processing unit is the coding tree unit (CTU). The image is divided into CTUs, which are blocks of a fixed size, and each CTU is further divided into coding units (CUs), which are encoding processing units. Basically, the prediction process is performed in CU units. The CU is smaller than or equal to the CTU in size. For example, when the size of the CTU is 128×128 pixels, the size of the CU is a size of 128×128 pixels or less, such as 4×4 pixels, 4×8 pixels, 8×4 pixels, 8×8 pixels, ···, 128×128 pixels.
[0361] Also, as another processing unit when performing prediction processing, there is a unit called VPDU (Virtual Pipeline Decoding Unit). This is the block size that can be processed in one stage when performing pipeline processing in hardware, and it is a fixed unit. Hereinafter, the block size that can be processed in one stage in pipeline processing is referred to as a pipeline processing unit (VPDU). Specifically, the size of the pipeline processing unit may be the largest size that can be taken among the block sizes to which the conversion process is applied. For example, when the size of the CU is 128×128 pixels or 64×64 pixels, the size of the VPDU is 64×64 pixels, and when the size of the CU is 32×32 pixels, the size of the VPDU is 32×32 pixels.
[0362] In addition, in pipeline processing, when the processing target block (the above-mentioned CU) is smaller than the VPDU, it is assumed that a plurality of processing target blocks included in the VPDU are processed together in one stage. On the other hand, when the processing target block is larger than the VPDU, it is assumed that the processing target block is divided into a plurality of VPDUs and each VPDU is processed in one stage.
[0363] Note that the pipeline processing unit may be a virtual area when it is assumed that the processing target block is divided.
[0364] Subsequently, a configuration for executing pipeline processing (hereinafter, pipeline configuration) will be described with reference to FIG. 48. FIG. 48 is a diagram schematically showing an example of the pipeline configuration in the decoding device 200.
[0365] In Stage1, the circuit of the decoding device 200 performs entropy decoding processing on the input stream to be decoded to obtain information necessary for decoding (S001).
[0366] Generally, in Stage1, processing is performed not in the VPDU described in FIG. 47 but in units of CU, CTU, or a size larger than CTU.
[0367] Next, in Stage 2, the circuit of the decoding device 200 derives the motion vector (MV) of the processing target block (S002), and performs memory transfer of the reference image using the derived motion vector (S003).
[0368] Next, in Stage 3, the circuit of the decoding device 200 performs DMVR (Decoder Motion Vector Refinement) processing, and corrects the motion vector by searching the periphery of the motion vector derived in Stage 2 (S004).
[0369] Next, in Stage 4, the circuit of the decoding device 200 performs motion compensation (MC) processing using the corrected motion vector (S005).
[0370] Next, in Stgae 5, the circuit of the decoding device 200 corrects the predicted image by applying LIC processing (S006) or BIO (BI - directional Optical flow) processing (S007) to the predicted image obtained by motion compensation. Note that BIO is sometimes called BDOF (Bi - Direction Optical Flow). At the same time, the circuit of the decoding device 200 generates a reconstructed image by adding the residual image generated by performing inverse quantization and inverse transformation processing (S008) and the predicted image generated by performing intra - prediction (S009) or inter - prediction (S010) (S011). Since the generated reconstructed image is used as an adjacent reference pixel of another processing target block to be processed next, it is fed back to the LIC processing (S006) and the intra - prediction processing (S009) (S012).
[0371] Next, in Stage 6, the circuit of the decoding device 200 generates a decoded image by applying a loop filter such as de - blocking to the generated reconstructed image (S013).
[0372] Note that in and after Stage 2, the processing of each stage is performed with the VPDU described in FIG. 47 as a pipeline processing unit.
[0373] Generally, the larger the block size processed in one stage, the larger the amount of memory implemented in one stage. Therefore, by setting the block size that can be processed in one stage to an appropriate size, for example, by adopting a stage configuration that processes each VPDU instead of each CTU (maximum CU), the amount of memory that needs to be ensured in each stage can be reduced. Logically, if the amount of memory required for processing the size of the VPDU (for example, 64×64 pixels) is ensured in each stage, pipeline processing becomes possible. Therefore, according to this pipeline configuration, it is possible to significantly reduce the circuit scale compared to a pipeline configuration that ensures the amount of memory required for processing the size of the CTU (for example, 128×128 pixels) in each stage.
[0374] Note that the schematic of the pipeline configuration shown in FIG. 48 is an example. A part of the processing described in the figure may be removed from the pipeline configuration, processing not described may be added to the pipeline configuration, or the way of dividing the stages of the pipeline configuration may be changed.
[0375] Although there is an advantage in dividing the CTU into VPDUs and performing pipeline processing for each VPDU as described above, the following problems occur in the conventional LIC processing.
[0376] Conventionally, when a processing target block is divided into a plurality of VPDUs and LIC processing is performed on the predicted image of each VPDU, results different from those obtained when LIC processing is performed on the predicted image of the processing target block without dividing the processing target block into VPDUs may be derived. For example, in software, since pipeline processing is basically not performed, it is not necessary to divide the processing target block into VPDUs for processing. Also, for example, in hardware with a large circuit scale, since a memory amount sufficient to execute pipeline processing on the processing target block is ensured, it is not necessary to divide the processing target block into VPDUs for processing. With such a decoding device and a decoding device that divides the processing target block into VPDUs for processing, the decoding results may be different even when the same image is processed. Hereinafter, this problem will be described more specifically with reference to FIGS. 49A and 49B.
[0377] FIG. 49A is a diagram schematically showing an example of conventional LIC processing. FIG. 49B is a diagram schematically showing another example of conventional LIC processing. Here, the size of the processing target block is larger than the size of the VPDU. For example, the size of the processing target block is 128×128 pixels, and the size of the VPDU is 64×64 pixels.
[0378] First, a case will be described where a conventional decoding apparatus performs LIC processing for each processing target block without dividing the processing target block into VPDUs. In this case, as shown in FIG. 49A, the correction parameter of the LIC processing (hereinafter also referred to as the LIC correction parameter) is the reconstructed image adjacent to the periphery of the processing target block (regions a and b in the figure) and the reconstructed image adjacent to the periphery of the reference block in the reference image specified by the derived motion vector (MV) (regions c and d in the figure). The reconstructed images adjacent to the periphery of the reference block (regions c and d) are all included in the pixel region (the region surrounded by the broken line in FIG. 49A) transferred in the memory transfer (S003) for the motion compensation processing (S005) performed before the LIC processing (S006) shown in FIG. 48. Therefore, the decoding apparatus can acquire all the signals of the reconstructed images (regions c and d) adjacent to the periphery of the reference block necessary for deriving the LIC correction parameter during the LIC processing of the predicted image of the processing target block.
[0379] Next, a case will be described in which a conventional decoding device divides a processing target block into VPDUs and performs LIC processing for each VPDU. In this case, as shown in FIG. 49B, the correction parameter of the LIC processing (so-called LIC correction parameter) is the reconstructed image adjacent to the periphery of the processing target block (regions a and b in the figure) and the reconstructed image adjacent to the periphery of the reference block in the reference image specified by the derived motion vector (MV) (regions c and d in the figure). It is necessary to be derived using. However, at the time of performing LIC processing on the predicted image of the first VPDU (VPDU1 in the figure) in the processing target block, only the motion compensation processing (S005 in FIG. 48) corresponding to VPDU1 has been performed, and the motion compensation processing corresponding to VPDU1. In the pixel area (the area surrounded by the broken line in FIG. 49B) transferred in the memory transfer (S003 in FIG. 48) for, there may be no part of the signal of the reconstructed image (regions c and d) adjacent to the periphery of the reference block necessary for deriving the LIC correction parameter. Therefore, the derived LIC correction parameter may be different between the case where the processing target block is divided into VPDUs and LIC processing is performed and the case where LIC processing is performed without dividing the processing target block into VPDUs.
[0380] Therefore, the circuit of the decoding device 200 according to this aspect (hereinafter simply referred to as the decoding device 200) is, in the LIC processing of the inter prediction, when the size of the processing target block is larger than a predetermined size (here, the size of the pipeline processing unit), The LIC correction parameter is derived using the reconstructed image around the first pipeline processing unit located in the upper left of the processing target block and the reconstructed image around the reference block corresponding to the first pipeline processing unit, and the derived LIC correction parameter is used. Correction processing by LIC processing on the predicted image of the processing target block is performed.
[0381] The operation in the LIC process of the decoder 200 according to this embodiment will be described below with reference to FIGS. 50A and 50B. FIG. 50A is a flowchart showing an example of the operation in the LIC process of the decoder 200 according to this embodiment. FIG. 50B is a flowchart showing another example of the operation in the LIC process of the decoder 200 according to this embodiment. More specifically, FIG. 50A shows an example of the operation of the decoder 200 when performing LIC processing for each processing target block without dividing the processing target block into VPDUs. Further, FIG. 50B shows an example of the operation of the decoder 200 when dividing the processing target block into VPDUs and performing LIC processing for each VPDU.
[0382] First, the operation when the decoder 200 performs LIC processing for each processing target block without dividing the processing target block into VPDUs will be described. As shown in FIG. 50A, the decoder 200 starts loop processing for each processing target block (so-called CU) (S1001). The decoder 200 determines whether the size of the processing target block is larger than the size of a predefined pipeline processing unit (VPDU) (S1002). Here, the predefined size of the VPDU may be 64×64 pixels. When the decoder 200 determines that the size of the processing target block is not larger than the size of the VPDU (No in S1002), it derives LIC correction parameters using the reconstructed image adjacent to the periphery of the processing target block and the reconstructed image adjacent to the periphery of the reference block as usual (S1003). Then, the decoder 200 performs correction processing by LIC processing on the predicted image of the processing target block using the derived LIC correction parameters (S1004).
[0383] On the other hand, when the decoding device 200 determines that the size of the processing target block is larger than the size of the VPDU (Yes in S1002), it derives the LIC correction parameter using only the reconstructed image adjacent to the area corresponding to the leading VPDU (S1005). More specifically, the decoding device 200 derives the LIC correction parameter using the reconstructed image adjacent to the area corresponding to the leading VPDU of the processing target block and the reconstructed image adjacent to the area corresponding to the leading VPDU in the reference block. Then, the decoding device 200 performs correction processing by LIC on the predicted image of the entire processing target block (i.e., the predicted image of the processing target block) using the derived LIC correction parameter (S1006). The details of the processing in S1005 and S1006 will be described later with reference to FIG. 51A.
[0384] When the correction processing by LIC on the predicted image of all the processing target blocks in the processing target image is completed, the decoding device 200 ends the loop processing for each processing target block (S1007).
[0385] Next, the operation when the decoding device 200 divides the processing target block into VPDUs and performs LIC processing for each VPDU will be described. As shown in FIG. 50B, the decoding device 200 starts loop processing for each processing target block (S2001). The decoding device 200 determines whether the size of the processing target block is larger than the size of the predefined VPDU (S2002). Similar to FIG. 50A, the size of the predefined VPDU may be 64×64 pixels. When the decoding device 200 determines that the size of the processing target block is not larger than the size of the VPDU (No in S2002), it derives the LIC correction parameter using the reconstructed image adjacent to the processing target block and the reconstructed image adjacent to the reference block in the normal manner (S2003). Then, the decoding device 200 performs correction processing by LIC on the predicted image of the processing target block using the derived LIC correction parameter (S2004).
[0386] On the other hand, when the decoding device 200 determines that the size of the processing target block is larger than the size of the VPDU (Yes in S2002), it divides the processing target block into a plurality of VPDUs (not shown) and starts loop processing for each VPDU (S2005). The decoding device 200 determines whether the processing target VPDU is the first VPDU in the processing target block (S2006). When the processing target VPDU is the first VPDU in the processing target block (Yes in S2006), the decoding device 200 derives LIC correction parameters using the reconstructed image adjacent to the periphery of the first VPDU and the reconstructed image adjacent to the periphery of the region corresponding to the first VPDU in the reference block (S2007). Then, the decoding device 200 performs correction processing by LIC on the predicted image of the first VPDU in the processing target block using the derived LIC correction parameters (S2008). On the other hand, when the processing target VPDU is not the first VPDU in the processing target block (No in S2006), the decoding device 200 applies the LIC correction parameters for the first VPDU derived in the process of S2007 without deriving the LIC correction parameters for the processing target VPDU (not shown). Then, the decoding device 200 performs correction processing by LIC on the predicted image of the processing target VPDU using the LIC correction parameters (S2008). When the processing of S2006 to S2008 for all VPDUs in the processing target block is completed, the decoding device 200 ends the loop for each VPDU (S2009). Note that the details of the processing of S2006 to S2008 will be described later with reference to FIG. 51B.
[0387] When the LIC correction processing for the predicted images of all the processing target blocks in the processing target image is completed, the decoding device 200 ends the loop processing for each processing target block (S2010).
[0388] Note that the processing flows shown in FIGS. 50A and 50B are merely examples, and a part of the processing described in the figures may be removed from the processing flow, or processing or conditional determination not described may be added.
[0389] Here, the processing flow of the decoding device 200 has been described. However, the only difference between the encoding device and the decoding device is whether to encode the signals required for processing into a stream or decode them from the stream. Therefore, the processing flow of the decoding device described here is basically common to the processing flow of the encoding device.
[0390] Next, the outline of the LIC processing in this embodiment will be described more specifically with reference to FIGS. 51A and 51B. FIG. 51A is a diagram schematically showing an example of the LIC processing in this embodiment. FIG. 51B is a diagram schematically showing another example of the LIC processing in this embodiment. More specifically, FIG. 51A shows an example of the operation of the decoding device 200 when performing LIC processing for each processing target block without dividing the processing target block into VPDUs. Also, FIG. 51B shows an example of the operation of the decoding device 200 when dividing the processing target block into VPDUs and performing LIC processing for each VPDU. Here too, similar to the examples shown in FIGS. 50A and 50B, the size of the processing target block is larger than the size of the pipeline processing unit (VPDU). For example, the size of the processing target block is 128×128 pixels, and the size of the VPDU is 64×64 pixels.
[0391] The LIC processing in this embodiment differs from the conventional LIC processing described in FIGS. 49A and 49B in the following points. The decoding device 200 uses the reconstructed images adjacent to the region corresponding to the leading VPDU in the processing target block (regions a1 and b1 in the figure) and the reconstructed images adjacent to the region corresponding to the leading VPDU in the reference picture specified by the derived motion vector (MV) (that is, the reference block of VPDU1) (regions a2 and b2 in the figure) to derive the LIC correction parameter.
[0392] First, a case where the decoding device 200 performs LIC processing for each processing target block without dividing the processing target block into VPDUs will be described. In this case, as shown in FIG. 51A, the LIC correction parameter is derived using the reconstructed images (regions a1 and b1) adjacent to the periphery of the region corresponding to the first VPDU in the processing target block and the reconstructed images (regions a2 and b2) adjacent to the periphery of the region corresponding to the first VPDU in the reference block. The decoding device 200 performs correction processing by LIC processing on the predicted image of the entire processing target block (that is, the predicted image of the processing target block) using the derived LIC correction parameter. At this time, the reconstructed images (regions a2 and b2) adjacent to the periphery of the region corresponding to the first VPDU in the reference block are all included within the pixel region (the region surrounded by the broken line in the figure) transferred in the memory transfer for the motion compensation processing executed before the LIC processing. Therefore, the decoding device 200 can acquire all the signals necessary for deriving the LIC correction parameter when performing the LIC processing on the predicted image of the processing target block.
[0393] Next, a case where the decoding device 200 divides the processing target block into a plurality of VPDUs and performs LIC processing for each VPDU will be described. In this case, as shown in FIG. 51B, the LIC correction parameter is based on the reconstructed images (regions a1 and b1 in the figure) adjacent to the periphery of the first VPDU (VPDU1 in the figure) in the processing target block and the reconstructed images (regions a2 and b2 in the figure) adjacent to the periphery of the region corresponding to the first VPDU in the reference block. Then, the decoding device 200 commonly uses the LIC correction parameter derived for VPDU1 for all VPDUs in the processing target block to perform LIC processing on the predicted image of each VPDU. In this case, the reconstructed images (regions a2 and b2) adjacent to the periphery of the region corresponding to VPDU1 in the reference picture (so-called, the reference block of VPDU1) are all included in the pixel region (the region surrounded by the broken line in the figure) transferred in the memory transfer for the motion compensation process corresponding to VPDU1. Therefore, the decoding device 200 can acquire all the signals necessary for deriving the LIC correction parameter of the predicted image of the processing target block when performing LIC processing on the predicted image of VPDU1. As a result, the processing speed is improved compared to the conventional LIC processing. Further, according to the LIC processing in this aspect, it is possible to match the processing results between the case of performing LIC processing for each processing target block and the case of dividing the processing target block into a plurality of VPDUs and performing LIC processing for each VPDU.
[0394] Also, according to the LIC process in this aspect, among the reconstructed images adjacent to the periphery of the processing target block, only the reconstructed images adjacent to the periphery of the region corresponding to the first VPDU are used. Therefore, it is possible to reduce the memory amount for storing the reconstructed images. Further, in this aspect, the decoding device 200 commonly uses the LIC correction parameters derived in the processing of VPDU1 for other VPDUs (VPDU2, VPDU3, and VPDU4 in the figure) other than the first VPDU (VPDU1 in the figure) in the processing target block, and performs LIC processing on each of the predicted images of all VPDUs in the processing target block. Therefore, according to the LIC process in this aspect, since it is not necessary to derive the LIC correction parameters for other VPDUs other than the first VPDU in the processing target block, it is also possible to reduce the processing amount.
[0395] Note that although the LIC process has been described here, the decoding method according to this aspect may also be applied to processes other than the LIC process. When the size of the processing target block is larger than a predetermined size (for example, the size of a pipeline processing unit), the decoding method according to this aspect derives correction parameters using only the reconstructed images adjacent to the periphery of the first pipeline processing unit located in the upper left of the processing target block among the reconstructed images adjacent to the periphery of the processing target block, and may perform correction processing on the processing target block based on the derived correction parameters. Note that the present invention is not limited to the decoding method, and the encoding method is also applicable to the LIC process and processes other than the LIC process.
[0396] Hereinafter, an example of applying the above method to the LMCS (Luma Mapping Chroma Scaling) process will be described. FIG. 52 is a diagram for explaining the outline of the LMCS process in this aspect. Here, the LMCS process in the decoding device 200 will be described.
[0397] The LMCS process consists of two processes: the LM process and the CS process. The LM process is a process of converting the pixel value of Luma into another pixel value. The CS process is a Chroma scaling process that applies it to the Chroma residual coefficient when Mapping occurs in Luma. Among these two processes, the above method is applied to the Chroma Scaling process.
[0398] First, the LM process will be described in more detail with reference to FIGS. 52 and 53. FIG. 53 is a diagram showing an example of a Luma Mapping table. The horizontal axis represents the pixel value before conversion, and the vertical axis represents the pixel value after conversion. The pixel value before conversion is, for example, the pixel value of the input image and the output image of the decoding device 200, and the pixel value after conversion is, for example, the pixel value used during the decoding process inside the decoding device 200. Note that in the encoding device 100, the pixel value before conversion is the pixel value of the input image and the output image of the device, and the pixel value after conversion is the pixel value used during the encoding process inside the device.
[0399] As shown in FIG. 53, if the pixel value of Luma is, for example, 10 bits, it is 0 to 1023. Not all of these pixel values have information equally. Among these pixel values, the low-luminance pixel values have little information, and the high-luminance pixel values do not have useful information. Therefore, it is better to perform a conversion so that important parts (for example, the central part of the pixel value) within the range of the pixel value can be divided more finely and expressed. For example, in the part where the slope of the curve shown by the solid line in the figure is large, the pixel value is sampled finely, and in the part where the slope is small, the pixel value is sampled coarsely. Sampling the pixel value coarsely means that, for example, when the pixel value before conversion is 300, the pixel value after conversion is converted to 170. In other words, it means that a signal having 300 steps is converted into a coarse signal having 170 steps. In this way, the Luma Mapping process performs a conversion that assigns more luminance to important parts within the range of the pixel value.
[0400] In the Luma Mapping process, interpolation, prediction, orthogonal transformation, etc. are performed using the pixel values after transformation. For example, as shown in FIG. 52, the decoding device 200 performs inverse orthogonal transformation and quantization (S3001) using the Luma pixel values after transformation, performs intra prediction (S3003), and adds the residual coefficients to the derived predicted image to generate a reconstructed image (S3002). In the Luma Mapping process, when outputting the reconstructed image, it is converted back to the pixel values before transformation by the Inverse Mapping process (S3004), and a loop filter is applied to the reconstructed image to generate a decoded image (S3005). The DPB in the figure is a display memory. The decoding device 200 outputs the decoded image to the DPB (S3006). On the other hand, in the case of inter prediction, the pixel values that are ready for display are read from the DPB, and motion compensation (S3007) is performed to generate a predicted image. At this point, since the pixel values of the predicted image are the pixel values before transformation, Forward Mapping processing is performed (S3008). Since the Mapping process has been described in FIG. 53, the description here is omitted.
[0401] As described above, the decoding device 200 performs, by the LM process, a transformation that divides the important part within the range of the Luma pixel values more finely and assigns more luminance. However, if there are many more finely divided portions in the image, the amount of information increases. Therefore, Chroma scaling processing is performed to reduce the amount of information of the Chroma pixel values by the amount by which the amount of information of the Luma pixel values increases.
[0402] Subsequently, the CS process will be described with reference to FIGS. 52 and 54. FIG. 54 is a diagram for explaining the outline of the CS process.
[0403] In the CS process, the amount of information in Chroma is adjusted by the amount by which the amount of information in Luma has increased by the LM process. For example, as shown in FIG. 52, the decoding apparatus 200 uses the pixel values after conversion that have undergone the intra prediction process (S3003) and the Forward Mapping process (S3008) of Luma in the CS process (S3009). More specifically, as shown in FIG. 54, when the decoding apparatus 200 processes a Chroma block, it uses the reconstructed image adjacent to the periphery of the Luma processing target block corresponding to the Chroma processing target block. At this time, when the size of the Chroma processing target block is larger than the size of the pipeline processing unit (VPDU), the decoding apparatus 200 calculates the average value of the Luma pixel values in the reconstructed image (regions a3 and b3) adjacent to the periphery of the region (VPDU1 in the figure) in the Luma processing target block corresponding to the leading VPDU in the Chroma processing target block. Then, the average value is input to the Luma Mapping table. At this time, the vertical axis of the Luma Mapping table is used as the input and the horizontal axis is used as the output. Then, a scale is derived from the ratio of the input to the output. Note that, as shown in S3009 of FIG. 52, a scale may be derived by multiplying the slope of the conversion curve of the Luma Mapping table by the residual image of Chroma when the average value of the Luma pixel values is used as the input. Using the derived scale, the pixel values of the residual image of Chroma are scaled (S3009).
[0404] Next, the decoding apparatus 200 performs intra prediction (S3011), and adds the residual coefficients to the derived prediction image to generate a reconstructed image (S3010). Next, the decoding apparatus 200 applies a loop filter to the reconstructed image to generate a decoded image (S3012). Then, the decoding apparatus 200 outputs the decoded image to the DPB (S3013). On the other hand, in the case of inter prediction, pixel values that are ready for display are read from the DPB, and motion compensation (S3014) is performed to generate a prediction image.
[0405] Here, although the CM process in the decoding device 200 has been described, the encoding device 100 also executes the same process. Note that in the encoding device 100, in the CM process, it is different from the process in the decoding device 200 in that the residual image of Chroma is divided by the slope of the conversion curve of the Luma Mapping table.
[0406] [Effect] As described above, according to the encoding device 100 and the decoding device 200 according to this aspect, whether the processing target block is processed for each processing target block or the processing target block is divided into a plurality of processing units of a predetermined size (for example, VPDU) and processed for each such processing unit, it is possible to make the processing results of encoding and decoding match. In addition, since it is possible to design an encoding device and a decoding device using a pipeline having a stage configuration in units of VPDU as described with reference to FIGS. 47 and 48, there is a high possibility of realizing a significant reduction in circuit scale while suppressing deterioration of encoding performance.
[0407] [Typical example of processing] Typical examples of the processing of the encoding device 100 and the decoding device 200 shown above are shown below.
[0408] FIG. 55 is a flowchart showing the operations performed by the encoding device 100. The encoding device 100 includes a circuit and a memory connected to the circuit. The circuit and the memory included in the encoding device 100 may correspond to the processor a1 and the memory a2 shown in FIG. 40. The circuit of the encoding device 100 performs the following in operation.
[0409] For example, when the size of the processing target block of the image is larger than a predetermined size, the circuit of the encoding device 100 derives correction parameters using only the reconstructed image around a processing unit of a predetermined size located at the upper left in the processing target block among the reconstructed images around the processing target block (S4001). At this time, for example, the circuit of the encoding device 100 may divide the processing target block into a plurality of processing units of a predetermined size and derive correction parameters for the processing unit located at the upper left in the processing target block.
[0410] Then, the circuit of the encoding device 100 performs correction processing on the block to be processed based on the derived correction parameter (S4002). At this time, for example, the circuit of the encoding device 100 may perform correction processing on each of a plurality of processing units in the block to be processed by commonly using the derived correction parameter for the plurality of processing units.
[0411] As described above, according to the encoding device 100, it is possible to acquire all the signals necessary for deriving the correction parameter for the block to be processed by using only the reconstructed image around a processing unit of a predetermined size located at the upper left in the block to be processed. Therefore, the processing speed can be improved. Further, it is possible to match the processing results between the case where correction processing is performed for each block to be processed and the case where the block to be processed is divided into a plurality of processing units of a predetermined size and the correction processing is performed for each processing unit. Also, among the reconstructed images adjacent to the periphery of the block to be processed, only the reconstructed image adjacent to the periphery of the region corresponding to the processing unit of a predetermined size located at the upper left in the block to be processed is used. Therefore, it is possible to reduce the memory amount for storing the reconstructed image.
[0412] Note that the correction processing may be processing for correcting the Luma pixel value using the Luma pixel value, may be processing for correcting the Chroma pixel value using the Luma pixel value, or may be prediction processing such as intra prediction or inter prediction.
[0413] Also, according to the encoding device 100, since it is not necessary to newly derive a correction parameter for other processing units other than the processing unit located at the upper left in the block to be processed, it is possible to reduce the processing amount and improve the processing speed.
[0414] Therefore, according to the encoding device 100, it is possible to improve the encoding efficiency, improve the image quality, reduce the processing amount, reduce the circuit scale, and improve the processing speed.
[0415] FIG. 56 is a flowchart showing the operations performed by the decoding device 200. For example, the decoding device 200 includes a circuit and a memory connected to the circuit. The circuit and memory included in the decoding device 200 may correspond to the processor b1 and the memory b2 shown in FIG. 46. The circuit of the decoding device 200 performs the following in operation.
[0416] For example, when the size of the processing target block of the image is larger than a predetermined size, the circuit of the decoding device 200 derives correction parameters using only the reconstructed image around the processing unit located at the upper left in the processing target block among the reconstructed images around the processing target block (S5001). At this time, for example, the circuit of the decoding device 200 may divide the processing target block into a plurality of processing units of a predetermined size and derive correction parameters for the processing unit located at the upper left in the processing target block.
[0417] Then, the circuit of the decoding device 200 performs correction processing on the processing target block based on the derived correction parameters (S5002). At this time, for example, the circuit of the decoding device 200 may perform correction processing for each of the plurality of processing units by commonly using the derived correction parameters for the plurality of processing units within the processing target block.
[0418] As described above, according to the decoding device 200, it is possible to obtain all the signals necessary for deriving the correction parameters for the processing target block by using only the reconstructed image around the processing unit of a predetermined size located at the upper left in the processing target block, so that the processing speed can be improved. Further, it is possible to make the processing results match between the case of performing correction processing for each processing target block and the case of dividing the processing target block into a plurality of processing units of a predetermined size and performing correction processing for each such processing unit. Also, since only the reconstructed image adjacent to the periphery of the region corresponding to the processing unit of a predetermined size located at the upper left among the reconstructed images adjacent to the periphery of the processing target block is used, it is possible to reduce the memory amount for storing the reconstructed image.
[0419] Note that the correction process may be a process of correcting the Luma pixel value using the Luma pixel value, a process of correcting the Chroma pixel value using the Luma pixel value, or a prediction process such as intra prediction or inter prediction.
[0420] In addition, according to the decoding apparatus 200, since there is no need to newly derive correction parameters for processing units other than the processing unit located at the upper left in the processing target block, it is possible to reduce the processing amount and improve the processing speed.
[0421] Therefore, according to the decoding apparatus 200, it is possible to improve the processing efficiency, improve the image quality, reduce the processing amount, reduce the circuit scale, and improve the processing speed.
[0422] In addition, as described above, each component may be a circuit. These circuits may constitute one circuit as a whole, or may be separate circuits respectively. Further, each component may be realized by a general-purpose processor or a dedicated processor.
[0423] Also, the processing executed by a specific component may be executed by another component. Also, the order in which the processing is executed may be changed, or a plurality of processes may be executed in parallel. Further, the encoding / decoding apparatus may include the encoding apparatus 100 and the decoding apparatus 200.
[0424] As described above, the aspects of the encoding apparatus 100 and the decoding apparatus 200 have been described based on a plurality of examples. However, the aspects of the encoding apparatus 100 and the decoding apparatus 200 are not limited to these examples. As long as the gist of the present disclosure is not deviated from, forms obtained by applying various modifications conceived by those skilled in the art to each example or forms constructed by combining components in different examples may also be included in the scope of the aspects of the encoding apparatus 100 and the decoding apparatus 200.
[0425] One or more of the aspects disclosed herein may be implemented in combination with at least a part of other aspects in the present disclosure. Also, some of the processes described in the flowchart of one or more of the aspects disclosed herein, some of the configurations of the apparatus, some of the syntax, etc. may be implemented in combination with other aspects.
[0426] [Implementation and Application] In each of the above embodiments, each of the functional or operative blocks can usually be realized by an MPU (micro processing unit), a memory, etc. Also, the processing by each of the functional blocks may be realized as a program execution unit such as a processor that reads and executes software (program) recorded on a recording medium such as a ROM. The software may be distributed. The software may be recorded on various recording media such as semiconductor memories. Note that each functional block can also be realized by hardware (a dedicated circuit). Various combinations of hardware and software can be adopted.
[0427] The processing described in each embodiment may be realized by centralized processing using a single device (system), or may be realized by distributed processing using a plurality of devices. Also, the processor that executes the above program may be singular or plural. That is, centralized processing may be performed, or distributed processing may be performed.
[0428] The aspects of the present disclosure are not limited to the above embodiments, and various modifications are possible, and they are also included within the scope of the aspects of the present disclosure.
[0429] Furthermore, here, application examples of the moving image encoding method (image encoding method) or moving image decoding method (image decoding method) shown in each of the above embodiments, and various systems for implementing such application examples will be described. Such a system may be characterized by having an image encoding device using the image encoding method, an image decoding device using the image decoding method, or an image encoding / decoding device having both. Other configurations of such a system can be appropriately changed as the case may be.
[0430] [Usage Example] FIG. 57 is a diagram showing the overall configuration of a suitable content supply system ex100 for realizing a content distribution service. The communication service providing area is divided into a desired size, and base stations ex106, ex107, ex108, ex109, ex110, which are fixed radio stations in the illustrated example, are installed in each cell.
[0431] In this content supply system ex100, devices such as a computer ex111, a game machine ex112, a camera ex113, home appliances ex114, and a smartphone ex115 are connected to the Internet ex101 via an Internet service provider ex102 or a communication network ex104 and base stations ex106 to ex110. The content supply system ex100 may be connected by combining any of the above devices. In various implementations, the devices may be directly or indirectly connected to each other via a telephone network or short-range wireless etc. without going through base stations ex106 to ex110. Furthermore, the streaming server ex103 may be connected to devices such as a computer ex111, a game machine ex112, a camera ex113, home appliances ex114, and a smartphone ex115 via the Internet ex101 or the like. Also, the streaming server ex103 may be connected to terminals etc. within a hotspot in an airplane ex117 via a satellite ex116.
[0432] Note that instead of the base stations ex106 to ex110, a wireless access point, a hotspot, or the like may be used. Further, the streaming server ex103 may be directly connected to the communication network ex104 without going through the Internet ex101 or the Internet service provider ex102, or may be directly connected to the airplane ex117 without going through the satellite ex116.
[0433] The camera ex113 is a device capable of taking still images and videos such as a digital camera. Further, the smartphone ex115 is a smartphone device, a mobile phone, or a PHS (Personal Handy-phone System) or the like corresponding to the mobile communication system methods called 2G, 3G, 3.9G, 4G, and in the future 5G.
[0434] The home appliance ex114 is a device included in a refrigerator or a household fuel cell cogeneration system.
[0435] In the content supply system ex100, a terminal having a photographing function is connected to the streaming server ex103 through the base station ex106 or the like, enabling live distribution and the like. In live distribution, the terminal (the computer ex111, the game machine ex112, the camera ex113, the home appliance ex114, the smartphone ex115, and the terminal in the airplane ex117, etc.) may perform the encoding process described in each of the above embodiments on the still image or video content photographed by the user using the terminal, may multiplex the video data obtained by encoding with the audio data obtained by encoding the sound corresponding to the video, and may transmit the obtained data to the streaming server ex103. That is, each terminal functions as an image encoding device according to an aspect of the present disclosure.
[0436] On the one hand, the streaming server ex103 streams the transmitted content data to the requested client. The client is a computer ex111, a game console ex112, a camera ex113, a household appliance ex114, a smartphone ex115, or a terminal in an airplane ex117, etc., which can decode the encoded data. Each device that receives the distributed data may decode and play back the received data. That is, each device may function as an image decoding device according to an aspect of the present disclosure.
[0437] [Distributed processing] Also, the streaming server ex103 may be a plurality of servers or a plurality of computers that distribute, process, and record data. For example, the streaming server ex103 may be implemented by a CDN (Content Delivery Network), and content delivery may be realized by a network connecting a large number of edge servers distributed around the world. In a CDN, an edge server physically close to the client can be dynamically assigned according to the client. Then, by caching and distributing the content to the edge server, the delay can be reduced. Also, when several types of errors occur or the communication state changes due to an increase in traffic, etc., the processing can be distributed among multiple edge servers, the distribution entity can be switched to another edge server, or the part of the network with a failure can be bypassed to continue the distribution, so high-speed and stable distribution can be realized.
[0438] In addition to merely performing distributed processing of the distribution itself, the encoding process of the captured data may be performed on each terminal, on the server side, or may be shared between them. As an example, generally in the encoding process, the processing loop is performed twice. In the first loop, the complexity of the image in units of frames or scenes, or the amount of code is detected. Also, in the second loop, a process is performed to improve the encoding efficiency while maintaining the image quality. For example, by having the terminal perform the first encoding process and the server side that receives the content perform the second encoding process, it is possible to improve the quality and efficiency of the content while reducing the processing load on each terminal. In this case, if there is a requirement to receive and decode in almost real time, since the already encoded data from the first encoding performed by the terminal can be received and played back by other terminals, more flexible real-time distribution becomes possible.
[0439] As another example, cameras such as ex113 extract feature amounts (amounts of features or characteristics) from images, compress the data regarding the feature amounts as metadata, and transmit it to the server. The server performs compression according to the meaning of the image (or the importance of the content), for example, by judging the importance of the object from the feature amounts and switching the quantization accuracy. Feature amount data is particularly effective in improving the accuracy and efficiency of motion vector prediction during re-compression on the server. Also, simple encoding such as VLC (Variable Length Coding) may be performed on the terminal, and encoding with a large processing load such as CABAC (Context Adaptive Binary Arithmetic Coding) may be performed on the server.
[0440] As yet another example, in a stadium, a shopping mall, or a factory, etc., there may be a case where there are multiple video data in which substantially the same scene is captured by a plurality of terminals. In this case, using the plurality of terminals that performed the shooting, and other terminals and servers that did not perform shooting as necessary, encoding processes are respectively assigned and distributed processing is performed, for example, in units of GOP (Group of Picture), picture units, or tile units obtained by dividing a picture. Thereby, the delay can be reduced and more real-time performance can be realized.
[0441] Since the plurality of video data is of substantially the same scene, the server may manage and / or give instructions so that the video data captured by each terminal can be referred to each other. Also, the server may receive the encoded data from each terminal and change the reference relationship among the plurality of data, or correct or replace the picture itself and re-encode it. Thereby, a stream with improved quality and efficiency of each piece of data can be generated.
[0442] Furthermore, the server may perform transcoding to change the encoding method of the video data and then distribute the video data. For example, the server may convert an MPEG-based encoding method to a VP-based (e.g., VP9) method, or convert H.264 to H.265, etc.
[0443] In this way, the encoding process can be performed by the terminal or one or more servers. Therefore, hereinafter, descriptions such as "server" or "terminal" are used as the subject performing the process, but part or all of the processes performed by the server may be performed by the terminal, or part or all of the processes performed by the terminal may be performed by the server. Also, regarding these, the same applies to the decoding process.
[0444] [3D, Multi-angle] There is an increasing trend to integrate and use different scenes captured by terminals such as a plurality of cameras ex113 and / or smartphones ex115 that are substantially synchronized with each other, or images or videos captured of the same scene from different angles. The videos captured by each terminal can be integrated based on the relative positional relationship between the terminals obtained separately, or the regions where the feature points included in the videos match.
[0445] The server may not only encode two-dimensional moving images, but also automatically encode still images based on scene analysis of the moving images or at a time specified by the user, and transmit them to the receiving terminal. When the server can further obtain the relative positional relationship between the imaging terminals, it can generate the three-dimensional shape of the scene based on not only two-dimensional moving images but also videos taken from different angles of the same scene. The server may separately encode three-dimensional data generated by a point cloud or the like, or generate the video to be transmitted to the receiving terminal by selecting or reconstructing from the videos taken by a plurality of terminals based on the results of recognizing or tracking a person or an object using the three-dimensional data.
[0446] In this way, the user can arbitrarily select each video corresponding to each imaging terminal to enjoy the scene, or enjoy the content obtained by cutting out the video from the selected viewpoint from the three-dimensional data reconstructed using a plurality of images or videos. Further, sounds are also collected from a plurality of different angles together with the video, and the server may multiplex the sound from a specific angle or space with the corresponding video and transmit the multiplexed video and sound.
[0447] In recent years, content associating the real world and the virtual world, such as Virtual Reality (VR) and Augmented Reality (AR), has also become popular. In the case of VR images, the server may create viewpoint images for the right eye and the left eye respectively, and perform encoding that allows reference between each viewpoint video by Multi-View Coding (MVC) or the like, or may encode them as separate streams without referring to each other. At the time of decoding the separate streams, they may be reproduced in synchronization with each other so that a virtual three-dimensional space is reproduced according to the user's viewpoint.
[0448] In the case of an AR image, the server may superimpose virtual object information in the virtual space on the camera information in the real space based on the three-dimensional position or the movement of the user's viewpoint. The decoding device may acquire or hold the virtual object information and the three-dimensional data, generate a two-dimensional image according to the movement of the user's viewpoint, and create superimposed data by smoothly connecting them. Alternatively, in addition to requesting the virtual object information, the decoding device may transmit the movement of the user's viewpoint to the server. The server may create superimposed data according to the movement of the viewpoint received from the three-dimensional data held by the server, encode the superimposed data, and distribute it to the decoding device. Note that the superimposed data typically has an α value indicating transparency in addition to RGB, and the server may set the α value of the portion other than the object created from the three-dimensional data to 0 or the like, and encode it in a state where the portion is transparent. Alternatively, the server may set an RGB value of a predetermined value as a background like a chroma key, and generate data in which the portion other than the object is the background color. The RGB value of the predetermined value may be determined in advance.
[0449] Similarly, the decoding process of the distributed data may be performed on the client (e.g., a terminal), on the server side, or shared between them. As an example, a certain terminal may once send a reception request to the server, receive the content corresponding to the request on another terminal, perform the decoding process, and the decoded signal may be transmitted to a device having a display. By dispersing the process regardless of the performance of the communicable terminal itself and selecting appropriate content, it is possible to reproduce data with good image quality. As another example, while receiving large-size image data on a TV or the like, a part of the area such as a tile in which the picture is divided may be decoded and displayed on the personal terminal of the viewer. Thereby, while sharing the overall image, it is possible to check at hand the area that is one's own responsibility or the area that one wants to check in more detail.
[0450] In a situation where multiple short-range, medium-range, or long-range wireless communications inside and outside a building are available, it may be possible to seamlessly receive content using a delivery system standard such as MPEG-DASH. The user may freely select a decoding device or display device such as the user's terminal or a display arranged inside and outside the building and switch in real time. Also, using the user's own location information or the like, decoding can be performed while switching the terminal to be decoded and the terminal to be displayed. As a result, while the user is moving to a destination, it becomes possible to map and display information on a part of the wall surface or ground of an adjacent building in which a displayable device is embedded. Also, based on the ease of access to encoded data on the network, such as the encoded data being cached in a server that can be accessed from a receiving terminal in a short time or being copied to an edge server in a content delivery service, it is also possible to switch the bitrate of the received data.
[0451] [Scalable encoding] Regarding content switching, it will be described using a scalable stream that is compression-encoded by applying the moving image encoding method shown in each of the above embodiments shown in FIG. 58. The server may have a plurality of streams having the same content but different qualities as individual streams, but by taking advantage of the characteristics of a temporally / spatially scalable stream realized by encoding by dividing into layers as shown in the figure, it may be configured to switch content. That is, by determining which layer to decode according to internal factors such as performance on the decoding side and external factors such as the state of the communication band, the decoding side can freely switch between low-resolution content and high-resolution content for decoding. For example, when the user wants to watch the continuation of a video being viewed on a smartphone ex115 while moving on a device such as an Internet TV after returning home, the device only needs to decode the same stream to a different layer, so the burden on the server side can be reduced.
[0452] Furthermore, as described above, pictures are encoded layer by layer. In addition to the configuration that realizes scalability in the enhancement layer above the base layer, the enhancement layer may include meta information based on statistical information of the image or the like. The decoder side may generate high-quality content by super-resolving the picture of the base layer based on the meta information. The super-resolution may improve the signal-to-noise ratio while maintaining and / or enlarging the resolution. The meta information includes information for specifying linear or non-linear filter coefficients for use in the super-resolution process, or information for specifying parameter values in filter processing, machine learning, or least-squares operations used in the super-resolution process, and the like.
[0453] Alternatively, a configuration may be provided in which a picture is divided into tiles or the like according to the meaning of an object or the like in the image. The decoder side decodes only a part of the area by selecting the tile to be decoded. Further, by storing the attributes of the object (such as a person, a car, a ball, etc.) and the position in the video (such as the coordinate position in the same image) as meta information, the decoder side can specify the position of a desired object based on the meta information and determine the tile including the object. For example, as shown in FIG. 59, the meta information may be stored using a data storage structure different from pixel data, such as an SEI (supplemental enhancement information) message in HEVC. This meta information indicates, for example, the position, size, or color of the main object.
[0454] The meta information may be stored in a unit composed of a plurality of pictures, such as a stream, a sequence, or a random access unit. The decoder side can obtain the time when a specific person appears in the video, etc., and by combining the information per picture and the time information, can specify the picture in which the object exists and determine the position of the object in the picture.
[0455] [Optimization of Web Page] FIG. 60 is a diagram showing an example of a display screen of a web page on a computer ex111 or the like. FIG. 61 is a diagram showing an example of a display screen of a web page on a smartphone ex115 or the like. As shown in FIGS. 60 and 61, a web page may include a plurality of link images that are links to image contents, and the appearance thereof may be different depending on the device being viewed. When a plurality of link images are visible on the screen, until the user explicitly selects a link image, or until the link image approaches the vicinity of the center of the screen or the entire link image enters the screen, the display device (decoding device) may display a still image or an I picture that each content has as a link image, or may display a video like a gif animation with a plurality of still images or I pictures, etc., or may receive only the base layer and decode and display the video.
[0456] When a link image is selected by the user, the display device performs decoding, for example, with the base layer having the highest priority. If there is information indicating that the HTML constituting the web page is scalable content, the display device may decode up to the enhancement layer. Further, in order to ensure real-time performance, before being selected or when the communication bandwidth is very strict, the display device can reduce the delay between the decoding time and the display time of the leading picture (the delay from the start of content decoding to the start of display) by decoding and displaying only the forward-reference pictures (I pictures, P pictures, B pictures with only forward reference). Furthermore, the display device may deliberately ignore the reference relationship of the pictures, roughly decode all B pictures and P pictures with forward reference, and perform normal decoding as the received pictures increase over time.
[0457] [Autonomous Driving] Also, when transmitting and receiving still image or video data such as two-dimensional or three-dimensional map information for autonomous driving or driving support of a vehicle, the receiving terminal may receive, in addition to the image data belonging to one or more layers, weather or construction information etc. as meta information, and decode these in association with each other. Note that the meta information may belong to a layer, or may simply be multiplexed with the image data.
[0458] In this case, since vehicles, drones, airplanes, etc. including the receiving terminal move, the receiving terminal can realize seamless reception and decoding by transmitting the position information of the receiving terminal while switching between the base stations ex106 to ex110. Further, the receiving terminal can dynamically switch how much meta information to receive or how much to update the map information according to the user's selection, the user's situation, and / or the state of the communication band.
[0459] In the content supply system ex100, the client can receive, decode, and play the encoded information transmitted by the user in real time.
[0460] [Delivery of Personal Content] Also, in the content supply system ex100, not only high-quality and long-duration content by video delivery providers but also unicast or multicast delivery of low-quality and short-duration content by individuals is possible. Such personal content is considered to increase in the future. In order to make personal content into better content, the server may perform encoding processing after performing editing processing. This can be realized, for example, using the following configuration.
[0461] During shooting in real-time or accumulating and then after shooting, the server performs recognition processing such as shooting error, scene search, semantic analysis, and object detection on the original picture data or encoded data. Then, based on the recognition results, the server manually or automatically corrects issues such as out-of-focus or camera shake, deletes less important scenes such as scenes with lower brightness or out-of-focus compared to other pictures, emphasizes the edges of objects, or performs editing such as changing the color tone. The server encodes the edited data based on the editing results. Also, it is known that if the shooting time is too long, the viewing rate will decrease. The server may automatically clip not only less important scenes but also scenes with little movement within a specific time range according to the shooting time so that it becomes content within that range, based on the image processing results. Or, the server may generate and encode a digest based on the result of the semantic analysis of the scene.
[0462] In the case of personal content, there are cases where it contains something that would directly infringe copyright, moral rights of the author, or the right of portrait as it is, and there may be inconveniences for individuals such as the sharing range exceeding the intended range. Therefore, for example, the server may deliberately change the image to be out of focus, such as the faces of people in the peripheral part of the screen or inside a house, and then encode it. Furthermore, the server may recognize whether a face of a person different from the pre-registered person appears in the image to be encoded, and if it does, perform processing such as applying a mosaic to the face part. Or, as pre-processing or post-processing of encoding, the user may specify a person or background area that the user wants to process the image from the perspective of copyright, etc. The server may perform processing such as replacing the specified area with another video or blurring the focus. In the case of a person, in a moving image, the person can be tracked and the video of the face part of the person can be replaced.
[0463] Since viewing personal content with a small amount of data requires strong real-time performance, depending on the bandwidth, the decoding device may first receive the base layer with the highest priority and perform decoding and playback. During this time, the decoding device may receive the enhancement layer and, when the playback is looped or played back two or more times, play back high-quality video including the enhancement layer. For a stream with scalable encoding like this, the video is rough when not selected or at the beginning of viewing, but it can provide an experience where the stream gradually becomes smarter and the image quality improves. In addition to scalable encoding, a similar experience can be provided even if a rough stream played back for the first time and a second stream encoded with reference to the first video are configured as one stream.
[0464] [Other implementation and application examples] Also, these encoding or decoding processes are generally processed in the LSIex500 that each terminal has. The LSI (large scale integration circuitry) ex500 (see Fig. 57) may be a one-chip configuration or a configuration consisting of multiple chips. Note that software for video encoding or decoding may be incorporated into some recording medium (such as a CD-ROM, flexible disk, or hard disk) that can be read by a computer ex111 or the like, and the encoding or decoding process may be performed using the software. Furthermore, when the smartphone ex115 has a camera, the video data acquired by the camera may be transmitted. The video data at this time may be data encoded by the LSIex500 that the smartphone ex115 has.
[0465] Note that the LSIex500 may be configured to download and activate application software. In this case, the terminal first determines whether the terminal supports the content encoding method or has the ability to execute a specific service. If the terminal does not support the content encoding method or does not have the ability to execute a specific service, the terminal may download a codec or application software and then acquire and play the content.
[0466] In addition, not limited to the content supply system ex100 via the Internet ex101, at least one of the moving image encoding device (image encoding device) or the moving image decoding device (image decoding device) of the above-described embodiments can be incorporated into a digital broadcast system. Since multiplexed data in which video and audio are multiplexed is transmitted and received by loading it on a broadcast radio wave using a satellite or the like, there is a difference in that it is more suitable for multicast than the unicast-oriented configuration of the content supply system ex100, but the same application is possible for the encoding process and the decoding process.
[0467] [Hardware Configuration] FIG. 62 is a diagram showing further details of the smartphone ex115 shown in FIG. 57. Also, FIG. 63 is a diagram showing a configuration example of the smartphone ex115. The smartphone ex115 includes an antenna ex450 for transmitting and receiving radio waves to and from the base station ex110, a camera unit ex465 capable of capturing video and still images, and a display unit ex458 for displaying data obtained by decoding video captured by the camera unit ex465 and video received by the antenna ex450. The smartphone ex115 further includes an operation unit ex466 such as a touch panel, an audio output unit ex457 such as a speaker for outputting audio or sound, an audio input unit ex456 such as a microphone for inputting audio, a memory unit ex467 capable of storing captured video or still images, recorded audio, received video or still images, encoded data such as emails, or decoded data, and a slot unit ex464 which is an interface unit with the SIM ex468 for identifying the user and authenticating access to various data including the network. Note that an external memory may be used instead of the memory unit ex467.
[0468] A main control unit ex460 capable of comprehensively controlling the display unit ex458, the operation unit ex466, etc., a power supply circuit unit ex461, an operation input control unit ex462, a video signal processing unit ex455, a camera interface unit ex463, a display control unit ex459, a modulation / demodulation unit ex452, a multiplexing / demultiplexing unit ex453, an audio signal processing unit ex454, a slot unit ex464, and a memory unit ex467 are connected via a synchronization bus ex470.
[0469] When the power key is turned on by the user's operation, the power supply circuit unit ex461 activates the smartphone ex115 to an operable state and supplies power to each unit from the battery pack.
[0470] The smartphone ex115 performs processes such as calls and data communication based on the control of the main control unit ex460 having a CPU, ROM, RAM, etc. During a call, the voice signal picked up by the voice input unit ex456 is converted into a digital voice signal by the voice signal processing unit ex454, subjected to spread spectrum processing by the modulation / demodulation unit ex452, and subjected to digital-to-analog conversion processing and frequency conversion processing by the transmission / reception unit ex451, and the resulting signal is transmitted via the antenna ex450. Also, the received data is amplified and subjected to frequency conversion processing and analog-to-digital conversion processing, subjected to inverse spread spectrum processing by the modulation / demodulation unit ex452, converted into an analog voice signal by the voice signal processing unit ex454, and then output from the voice output unit ex457. In the data communication mode, text, still images, or video data can be sent under the control of the main control unit ex460 via the operation input control unit ex462 based on operations of the operation unit ex466 of the main body unit or the like. Similar transmission and reception processes are performed. When transmitting video, still images, or video and audio in the data communication mode, the video signal processing unit ex455 compresses and encodes the video signal stored in the memory unit ex467 or the video signal input from the camera unit ex465 by the moving image encoding method shown in each of the above embodiments, and sends the encoded video data to the multiplexing / demultiplexing unit ex453. The voice signal processing unit ex454 encodes the voice signal picked up by the voice input unit ex456 while the video or still image is being captured by the camera unit ex465, and sends the encoded voice data to the multiplexing / demultiplexing unit ex453. The multiplexing / demultiplexing unit ex453 multiplexes the encoded video data and the encoded voice data in a predetermined manner, performs modulation processing and conversion processing by the modulation / demodulation unit (modulation / demodulation circuit unit) ex452 and the transmission / reception unit ex451, and transmits it via the antenna ex450. The predetermined manner may be determined in advance.
[0471] When receiving a video attached to an email or chat, or a video linked to a web page, etc., in order to decode the multiplexed data received via the antenna ex450, the multiplexing / demultiplexing unit ex453 separates the multiplexed data into a bit stream of video data and a bit stream of audio data by separating the multiplexed data, supplies the video data encoded via the synchronization bus ex470 to the video signal processing unit ex455, and supplies the encoded audio data to the audio signal processing unit ex454. The video signal processing unit ex455 decodes the video signal by a video decoding method corresponding to the moving image encoding method shown in each of the above embodiments, and a video or a still image included in the linked moving image file is displayed from the display unit ex458 via the display control unit ex459. The audio signal processing unit ex454 decodes the audio signal, and audio is output from the audio output unit ex457. Since real-time streaming is becoming increasingly popular, depending on the user's situation, it may not be socially appropriate to play audio. Therefore, as an initial value, it is desirable to have a configuration that plays only video data without playing the audio signal, and the audio may be played synchronously only when the user performs an operation such as clicking on the video data.
[0472] Also, although the smartphone ex115 has been described as an example here, as the terminal, in addition to the transceiver type terminal having both an encoder and a decoder, other implementation forms such as a transmitting terminal having only an encoder and a receiving terminal having only a decoder are conceivable. In the digital broadcast system, it has been described as receiving or transmitting multiplexed data in which audio data is multiplexed with video data. However, in the multiplexed data, character data related to the video, etc. may be multiplexed in addition to the audio data. Also, instead of the multiplexed data, the video data itself may be received or transmitted.
[0473] Although the main control unit ex460 including a CPU has been described as controlling the encoding or decoding process, many types of terminals are often equipped with a GPU. Therefore, a configuration in which a wide area is processed collectively by taking advantage of the performance of the GPU using a memory shared by the CPU and the GPU, or a memory whose address is managed so that it can be used in common, may be adopted. As a result, the encoding time can be shortened, real-time performance can be ensured, and low latency can be achieved. In particular, it is efficient to perform motion search, deblocking filter, SAO (Sample Adaptive Offset), and transform / quantization processes collectively in units such as pictures using the GPU instead of the CPU.
Industrial Applicability
[0474] The present disclosure can be applied to, for example, a television receiver, a digital video recorder, a car navigation system, a mobile phone, a digital camera, a digital video camera, a video conferencing system, or an electronic mirror.
Explanation of Signs
[0475] 100 Encoding device 102 Splitting unit 104 Subtraction unit 106 Transformation unit 108 Quantization unit 110 Entropy encoding unit 112, 204 Inverse quantization unit 114, 206 Inverse transformation unit 116, 208 Addition unit 118, 210 Block memory 120, 212 Loop filter unit 122, 214 Frame memory 124, 216 Intra prediction unit 126, 218 Inter prediction unit 128, 220 Prediction control unit 200 Decoding device 202 Entropy decoding unit 1201 Boundary determination unit 1202, 1204, 1206 Switch 1203 Filter Judgment Unit 1205 Filter Processing Unit 1207 Filter Characteristic Determination Unit 1208 Processing Judgment Unit a1, b1 Processor a2, b2 Memory
Claims
1. A circuit, a memory connected to the circuit, and in operation, the circuit determines whether the size of a processing target block of an image is larger than a predetermined size, when the size of the processing target block is not larger than the predetermined size, derives a correction parameter using a reconstructed image around the processing target block, and performs correction processing on the processing target block based on the derived correction parameter, when the size of the processing target block is larger than the predetermined size, derives the correction parameter using only a reconstructed image around a processing unit of the predetermined size located at the upper left in the processing target block among the reconstructed images around the processing target block, and performs correction processing on the processing target block based on the derived correction parameter, an encoding device.
2. A circuit, a memory connected to the circuit, and in operation, the circuit determines whether the size of a processing target block of an image is larger than a predetermined size, when the size of the processing target block is not larger than the predetermined size, derives a correction parameter using a reconstructed image around the processing target block, and performs correction processing on the processing target block based on the derived correction parameter, when the size of the processing target block is larger than the predetermined size, derives the correction parameter using only a reconstructed image around a processing unit of the predetermined size located at the upper left in the processing target block among the reconstructed images around the processing target block, and performs correction processing on the processing target block based on the derived correction parameter, a decoding device.
3. A bitstream transmission device that transmits a bitstream including an encoded and compressed encoded signal for a difference between a moving image encoding processing target block and a prediction block of the encoding processing target block and a prediction parameter related to generation of the prediction block of the encoding processing target block, to a decoding device that inputs the bitstream, decodes the difference and the prediction parameter, generates a prediction block of a decoding processing target block based on processing defined by the prediction parameter, adds the prediction block of the decoding processing target block and the difference to generate a reconstructed image of the decoding processing target block, Determine whether the size of the block to be decoded is larger than a predetermined size. When the size of the block to be decoded is not larger than the predetermined size, derive a correction parameter using the reconstructed image around the block to be decoded, and perform correction processing on the block to be decoded based on the derived correction parameter. When the size of the block to be decoded is larger than the predetermined size, derive the correction parameter using only the reconstructed image around the processing unit of the predetermined size located at the upper left in the block to be decoded among the reconstructed images around the block to be decoded, and perform correction processing on the block to be decoded based on the derived correction parameter. Bitstream transmission device.
Citation Information
Patent Citations
Method and apparatus for illumination compensation and method and apparatus for encoding and decoding video based thereupon
JP2008306720A
Encoding device, decoding device, encoding method, and decoding method
JP7202394B2
Bitstream Transmitter
JP7678912B2
Method for encoding inter-layer video for compensating luminance difference and device therefor, and method for decoding video and device therefor
US20150350642A1
Illumination compensation device, lm predict device, image decoding device, image coding device
WO2014203726A1