Liquid crystal display device

The liquid crystal display device addresses the challenge of visibility in varying light conditions by incorporating reflection and transmission regions with independent control and sensor-activated backlight adjustment, ensuring clear display and low power consumption.

JP2025107401AActive Publication Date: 2025-07-17SEMICON ENERGY LAB CO LTD
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Patent Information

Application Number
JP2025078897
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2009-12-28
Filing Date
2025-05-09
Publication Date
2025-07-17
Estimated Expiration
2030-12-23

AI Technical Summary

Technical Problem

Existing liquid crystal display devices struggle to provide clear image display in both bright and dim environments, with reflective models being ineffective in low light conditions and transmissive models consuming high power and being unsuitable for outdoor use.

Method used

A liquid crystal display device is designed with both reflection and transmission regions in one pixel, utilizing two transistors to independently control these regions, and incorporates a sensor to adjust backlight mode based on environmental brightness, using LEDs for efficient power consumption.

Benefits of technology

The device achieves clear image display in varying light conditions with reduced power consumption by switching between reflection and transmission modes, ensuring visibility in both bright and dim environments.

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Abstract

To provide a liquid crystal display device which can display an image in both modes of a reflective mode with external light used as an illumination light source and a transmissive mode using a backlight.SOLUTION: In one pixel, a region (reflection region) where light made incident through a liquid crystal layer is reflected to perform display and a region (transmission region) where light from a backlight is transmitted to perform display are disposed. Therein, image display can be performed in both modes of a reflective mode with external light used as an illumination light source and a transmissive mode with the backlight used as an illumination light source. In addition, two transistors connected to respective different pixel electrode layers are disposed in one pixel and two transistors are separately operated, so that display in the reflection region and display in the transmission region can be independently controlled.SELECTED DRAWING: Figure 1
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Description

[Technical field]

[0001] The present invention relates to a semiconductor device having a circuit formed of transistors and a manufacturing method thereof. The present invention relates to electronic equipment incorporating an electro-optical device, typically a liquid crystal display panel, as a component. [Background technology]

[0002] In order to obtain high-quality images in a liquid crystal display device, pixel electrodes are arranged in a matrix. An active matrix transistor is used as a switching element connected to each pixel electrode. Liquid crystal display devices are attracting attention.

[0003] A metal oxide is used as a channel forming region for a switching element connected to each pixel electrode. An active matrix type liquid crystal display device using such a transistor is already known (particularly See Patent Document 1 and Patent Document 2).

[0004] Active matrix liquid crystal displays are broadly divided into two types: transmissive and reflective. The type is known.

[0005] A transmissive liquid crystal display uses a backlight such as a cold cathode fluorescent lamp to optically modulate the liquid crystal. By utilizing this effect, light from the backlight passes through the liquid crystal and is output to the outside of the liquid crystal display device. Select the output state and the non-output state, display light and dark, and combine them. By adjusting the brightness of the display, an image is displayed.

[0006] Transmissive LCD devices use a backlight, so they may not be suitable for use in environments with strong external light, such as outdoors. The display is difficult to read.

[0007] In addition, a reflective liquid crystal display device utilizes the optical modulation effect of liquid crystal to output external light, that is, incident light, outside the device after reflection by pixel electrodes, and to output the incident light outside the device. By selecting between these two states and further combining them, image display is performed. Specifically, it selects between a state where incident light is reflected by pixel electrodes and output outside the device, and a state where incident light is not output outside the device, performs bright and dark displays, and further combines them to perform image display. This is what it is.

[0008] Compared with a transmissive liquid crystal display device, a reflective liquid crystal display device has the advantage of low power consumption because it does not use a backlight, and there is high demand as a portable information terminal. It is in high demand.

[0009] Since a reflective liquid crystal display device utilizes external light, it is suitable for image display in environments with strong external light such as outdoors. On the other hand, it is difficult to recognize the display in an environment where the surroundings of the liquid crystal display device are dim, that is, where the external light is weak. This is difficult.

Prior Art Documents

Patent Documents

[0010]

Patent Document 1

Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0011] One of the problems is to provide a liquid crystal display device capable of recognizing image display even in a dim environment around the liquid crystal display device. This is one of the problems.

[0012] Another problem is to provide a liquid crystal display device capable of performing image display in both a reflection mode using external light as an illumination source and a transmission mode using a backlight. This is one of the problems. ​​​

Means for Solving the Problem

[0013] In one pixel, a region (reflection region) that reflects light incident through a liquid crystal layer to perform display and a region (transmission region) that transmits light from a backlight to perform display are provided, and as an illumination light source images can be displayed in both a reflection mode using external light and a transmission mode using a backlight. Also, two transistors connected to different pixel electrode layers are provided in one pixel, and by operating the two transistors separately, the display region of the connected pixel electrode layer can be independently controlled.

[0014] When there is external light and its brightness is sufficient, this liquid crystal display device operates in the reflection mode, and furthermore, power consumption can be reduced by displaying a still image.

[0015] Also, when the external light is weak or there is no external light at all, the backlight is turned on in the transmission mode to enable image display.

[0016] Moreover, it is preferable to provide a sensor for detecting the brightness around the liquid crystal display device and perform reflection mode, transmission mode, or on / off and light amount adjustment of the backlight according to the data obtained by the sensor.

[0017] As the light source of the backlight, it is preferable to use a plurality of light emitting diodes (LEDs) that can reduce power consumption more than a cold cathode fluorescent lamp and can adjust the intensity of light. By using LEDs for the backlight, the intensity of light can be partially adjusted, and an image display with high contrast and high color visibility can be performed.

[0018] One aspect of the present invention disclosed in this specification includes a display panel, a backlight unit, and an image processing circuit. The display panel has transparency and is connected to a first system of scanning lines and a first system of signal lines. It includes a first system of pixel electrodes that control the alignment state of liquid crystal, and a first system of sub-pixels provided with transistors connected to the first system of pixel electrodes. It also includes a plurality of pixels including pairs of second system of sub-pixels that reflect visible light and are connected to a second system of scanning lines and a second system of signal lines, and that include a second system of pixel electrodes that control the alignment state of liquid crystal and transistors connected to the second system of pixel electrodes. A first drive circuit is provided to temporally control a pixel portion including the plurality of pixels. The backlight unit has a plurality of light-emitting elements and a second drive circuit for temporally controlling the plurality of light-emitting elements. The image processing circuit has a storage circuit for storing an image signal and a comparison circuit for comparing the image signal stored in the storage circuit and calculating a difference. When the comparison circuit determines that consecutive frame periods in which a difference is detected are video periods, the image processing circuit outputs a first signal including a video to the first system of signal lines of the display panel, and the image processing circuit outputs a second signal synchronized with the first signal to the backlight unit. In a video mode, when the comparison circuit determines that consecutive frame periods in which no difference is detected are still image periods, the image processing circuit converts the still image in the still image period into a black-and-white still image, and the image processing circuit outputs a first signal including the black-and-white still image to the second system of signal lines of the display panel, and the image processing circuit stops outputting a signal to the backlight unit. This is a liquid crystal display device having a still image mode. Another aspect of the present invention disclosed in this specification includes a display panel, a backlight unit, an image processing circuit, and a photometry circuit. The display panel has transparency and is connected to a first system of scanning lines and a first system of signal lines. The display panel has transparency and is connected to a first system of scanning lines and a first system of signal lines. The display panel has transparency and is connected to a first system of scanning lines and a first system of signal lines. The display panel has transparency and is connected to a first system of scanning lines and a first system of signal lines. The display panel has transparency and is connected to a first system of scanning lines and a first system of signal lines. The display panel has transparency and is connected to a first system of scanning lines and a first system of signal lines.

[0019] One aspect of the present invention disclosed in this specification includes a display panel, a backlight unit, and an image processing circuit. The display panel has transparency and is connected to a first system of scanning lines and a first system of signal lines. is connected to the signal line of , and a first system of pixel electrodes for controlling the alignment state of the liquid crystal, and a first system of sub-pixels provided with a transistor connected to the pixel electrodes, reflects visible light, is connected to the second system of scanning lines and the second system of signal lines, and a second system of pixel electrodes for controlling the alignment state of the liquid crystal, and a second system of sub-pixels provided with a transistor connected to the pixel electrodes of the second system, and a first drive circuit for temporally controlling a pixel portion including a plurality of pixels, the backlight unit includes a plurality of light emitting elements and a second drive circuit for temporally controlling the plurality of light emitting elements, the image processing circuit has a storage circuit for storing an image signal and a comparison circuit for comparing the image signal stored in the storage circuit and calculating a difference, the comparison circuit determines that a continuous frame period in which a difference is detected is a moving image period, the image processing circuit outputs a first signal including a moving image to the signal line of the first system of the display panel, and the image processing circuit outputs a second signal synchronized with the first signal to the backlight unit in a moving image mode, the comparison circuit determines that a continuous frame period in which no difference is detected is a still image period, the image processing circuit converts a still image in the still image period into a black-and-white still image, the image processing circuit outputs a first signal including the black-and-white still image to the signal line of the second system of the display panel, and the image processing circuit has a still image mode in which the output of the signal to the backlight unit is stopped, and it is a liquid crystal display device that adjusts the brightness of the backlight according to the brightness of external light detected by a photometric circuit when switching between the still image mode and the moving image mode. A still image mode in which the output of the signal to the backlight unit is stopped, and it is a liquid crystal display device that adjusts the brightness of the backlight according to the brightness of external light detected by a photometric circuit when switching between the still image mode and the moving image mode. Another aspect of the present invention disclosed in this specification has a display panel, a backlight unit, and an image processing circuit. The display panel has translucency and is connected to the first system of scanning lines and the first system of signal lines and a second system of scanning lines and the second system of signal lines. The display panel is provided with a first system of pixel electrodes for controlling the alignment state of the liquid crystal and a first system of sub-pixels provided with a transistor connected to the pixel electrodes, and a second system of pixel electrodes for controlling the alignment state of the liquid crystal and a second system of sub-pixels provided with a transistor connected to the pixel electrodes of the second system. A first drive circuit for temporally controlling a pixel portion including a plurality of pixels, the backlight unit includes a plurality of light emitting elements and a second drive circuit for temporally controlling the plurality of light emitting elements, the image processing circuit has a storage circuit for storing an image signal and a comparison circuit for comparing the image signal stored in the storage circuit and calculating a difference, the comparison circuit determines that a continuous frame period in which a difference is detected is a moving image period, the image processing circuit outputs a first signal including a moving image to the signal line of the first system of the display panel, and the image processing circuit outputs a second signal synchronized with the first signal to the backlight unit in a moving image mode, the comparison circuit determines that a continuous frame period in which no difference is detected is a still image period, the image processing circuit converts a still image in the still image period into a black-and-white still image, the image processing circuit outputs a first signal including the black-and-white still image to the signal line of the second system of the display panel, and the image processing circuit has a still image mode in which the output of the signal to the backlight unit is stopped, and it is a liquid crystal display device that adjusts the brightness of the backlight according to the brightness of external light detected by a photometric circuit when switching between the still image mode and the moving image mode. and a second system of scanning lines and the second system of signal lines. The display panel is provided with a first system of pixel electrodes for controlling the alignment state of the liquid crystal and a first system of sub-pixels provided with a transistor connected to the pixel electrodes, and a second system of pixel electrodes for controlling the alignment state of the liquid crystal and a second system of sub-pixels provided with a transistor connected to the pixel electrodes of the second system. A first drive circuit for temporally controlling a pixel portion including a plurality of pixels, the backlight unit includes a plurality of light emitting elements and a second drive circuit for temporally controlling the plurality of light emitting elements, the image processing circuit has a storage circuit for storing an image signal and a comparison circuit for comparing the image signal stored in the storage circuit and calculating a difference, the comparison circuit determines that a continuous frame period in which a difference is detected is a moving image period, the image processing circuit outputs a first signal including a moving image to the signal line of the first system of the display panel, and the image processing circuit outputs a second signal synchronized with the first signal to the backlight unit in a moving image mode, the comparison circuit determines that a continuous frame period in which no difference is detected is a still image period, the image processing circuit converts a still image in the still image period into a black-and-white still image, the image processing circuit outputs a first signal including the black-and-white still image to the signal line of the second system of the display panel, and the image processing circuit has a still image mode in which the output of the signal to the backlight unit is stopped, and it is a liquid crystal display device that adjusts the brightness of the backlight according to the brightness of external light detected by a photometric circuit when switching between the still image mode and the moving image mode. A still image mode in which the output of the signal to the backlight unit is stopped, and it is a liquid crystal display device that adjusts the brightness of the backlight according to the brightness of external light detected by a photometric circuit when switching between the still image mode and the moving image mode. A still image mode in which the output of the signal to the backlight unit is stopped, and it is a liquid crystal display device that adjusts the brightness of the backlight according to the brightness of external light detected by a photometric circuit when switching between the still image mode and the moving image mode. A still image mode in which the output of the signal to the backlight unit is stopped, and it is a liquid crystal display device that adjusts the brightness of the backlight according to the brightness of external light detected by a photometric circuit when switching between the still image mode and the moving image mode. A still image mode in which the output of the signal to the backlight unit is stopped, and it is a liquid crystal display device that adjusts the brightness of the backlight according to the brightness of external light detected by a photometric circuit when switching between the still image mode and the moving image mode. A still image mode in which the output of the signal to the backlight unit is stopped, and it is a liquid crystal display device that adjusts the brightness of the backlight according to the brightness of external light detected by a photometric circuit when switching between the still image mode and the moving image mode. is.

[0020] Another aspect of the present invention disclosed in this specification has a display panel, a backlight unit, and an image processing circuit. The display panel has translucency and is connected to the first system of scanning lines and the first system of signal lines is connected to a first system of pixel electrodes that control the alignment state of the liquid crystal, and a transistor including an oxide semiconductor layer connected to the first system of pixel electrodes, and a first system of sub-pixels are provided. A second system of pixel electrodes that reflect visible light and are connected to a second system of scanning lines and a second system of signal lines to control the alignment state of the liquid crystal, and a transistor including an oxide semiconductor layer connected to the second system of pixel electrodes, and a plurality of pixels including a pair of second system of sub-pixels are provided. A first driving circuit that temporally controls a pixel portion including the plurality of pixels is provided. The backlight portion has a plurality of light emitting elements and a second driving circuit that temporally controls the plurality of light emitting elements of the backlight portion. The image processing circuit has a storage circuit that stores an image signal and a comparison circuit that calculates a difference by comparing the image signal stored in the storage circuit. When the comparison circuit determines that consecutive frame periods in which a difference is detected are a video period, the image processing circuit outputs a first signal including a video to the first system of signal lines of the display panel, and the image processing circuit outputs a second signal synchronized with the first signal to the backlight portion. In a video mode, when the comparison circuit determines that consecutive frame periods in which no difference is detected are a still image period, the image processing circuit converts the still image data in the still image period into a black-and-white still image, and the image processing circuit outputs a first signal including the black-and-white still image to the second system of signal lines of the display panel, and the image processing circuit stops outputting a signal to the backlight portion in a still image display mode. A liquid crystal display device having such a configuration solves at least one of the above problems. Also, a plurality of structures are provided in one pixel, a reflective electrode is provided on the side surface of the structure, and on the upper part of the structure

[0021]

[0022] Using a pixel electrode having a transparent electrode is also one aspect of the present invention.

[0023] Furthermore, an electronic device can be provided that includes the liquid crystal display device disclosed in this specification and also a solar cell, and the solar cell and the display panel are detachably attached, and the power from the solar cell is supplied to the display panel, the backlight unit, and also the image processing circuit.

[0024] Note that in this specification, a device that can function by utilizing semiconductor characteristics is generally referred to as a semiconductor device, and it can be said that all electro-optical devices, semiconductor circuits, and electronic devices are semiconductor devices.

Advantages of the Invention

[0025] A liquid crystal display device capable of image display according to the brightness of external light in various environments can be provided. Also, low power consumption can be achieved in the display of still images.

Brief Description of the Drawings

[0026]

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Embodiments for Carrying Out the Invention

[0027] Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that the form and details can be variously changed. Also, the present invention is not construed as being limited to the description content of the embodiments shown below.

[0028] (Embodiment 1) In this embodiment, a liquid crystal display device having a still image mode and a moving image mode will be described with reference to FIG. 1. In this specification, the operation in which the display device determines that the image signal input to the display device is a still image and performs the operation is referred to as the still image mode, and the operation in which the display device determines that the image signal is a moving image and performs the operation is referred to as the moving image mode.

[0029] The liquid crystal display device 100 of this embodiment includes an A / D conversion circuit 102, an image processing circuit 110, a display panel 120, and a backlight unit 130 (see FIG. 1).

[0030] The image processing circuit 110 includes a storage circuit 111, a comparison circuit 112, a selection circuit 115, and a display control circuit It has a path 113 and a field sequential signal generation circuit 114.

[0031] The display panel 120 has a drive circuit 121 and a pixel section 122. The pixel section 122 has pixels 123, and each pixel 123 has a first system of sub-pixels 123a connected to a first system of scan lines and a first system of signal lines, and a second system of sub-pixels 123b connected to a second system of scan lines and a second system of signal lines. Also, the sub-pixels 123a and 123b are paired and arranged in a matrix as pixels 123 in the pixel section 122. Moreover, the sub-pixel 123a has a first transistor, a pixel electrode connected to the first transistor, and a capacitive element. A liquid crystal layer is sandwiched between the pixel electrode and a counter electrode facing it,

[0032] and a liquid crystal element is formed. The pixel electrode has light transmissivity. In this specification, an electrode having light transmissivity that transmits visible light is also referred to as a transmissive electrode or a transparent electrode.

[0033] Furthermore, the sub-pixel 123b has a second transistor, a pixel electrode connected to the second transistor, and a capacitive element. A liquid crystal layer is sandwiched between the pixel electrode and a counter electrode facing it, and a liquid crystal element is formed. The pixel electrode reflects light incident through the liquid crystal layer.

[0034] As an example of a liquid crystal element, there is an element that controls light transmission or non-transmission by the optical modulation action of liquid crystal. The element can be structured by a pair of electrodes and a liquid crystal layer. Note that the optical modulation action of liquid crystal is controlled by an electric field applied to the liquid crystal (i.e., a vertical electric field). Specifically, as an example of a liquid crystal element, there are nematic liquid crystal, cholesteric liquid crystal, ​​​​​​ Smectic liquid crystals, discotic liquid crystals, thermotropic liquid crystals, lyotropic liquid crystals, low molecular weight liquid crystals, high molecular weight liquid crystals, polymer dispersed liquid crystals (PDLC), ferroelectric liquid crystals, antiferroelectric liquid crystals, main chain liquid crystals, side chain high molecular weight liquid crystals, banana-shaped liquid crystals, etc. can be mentioned. Also, as the driving method of the liquid crystal, there are TN (Twisted Nematic) mode, STN (Super Twisted Nematic) mode, OCB (Optically Compe nsated Birefringence) mode, ECB (Electricall y Controlled Birefringence) mode, FLC (Ferro electric Liquid Crystal) mode, AFLC (AntiFer roelectric Liquid Crystal) mode, PDLC (Polym er Dispersed Liquid Crystal) mode, PNLC (Pol ymer Network Liquid Crystal) mode, guest-host mode etc.

[0035] The backlight unit 130 has a backlight control circuit 131 and a backlight 132. A light emitting element 133 is arranged on the backlight 132.

[0036] In the present embodiment, the backlight 132 has light emitting elements 133 of a plurality of different emission colors. As a combination of different emission colors, for example, three types of light emitting elements of red (R), green (G), and blue (B) can be used. By using the three primary colors of R, G, and B, a full color image can be displayed.

[0037] In addition, a plurality of light-emitting elements selected from R, G, and B may be simultaneously lit to represent a color (for example, yellow (Y) represented by R and G, cyan (C) represented by G and B, magenta (M) represented by B and R, etc.) Another light-emitting element that emits the above may be arranged in addition to the light-emitting elements of R, G, and B.

[0038] In addition, in order to make the color reproduction characteristics of the display device richer, a light-emitting element that emits light other than the three primary colors may be added. The colors that can be represented using the light-emitting elements of R, G, and B are limited to the colors shown inside the triangle drawn by three points corresponding to the respective emission colors on the chromaticity diagram. Therefore, by adding separately a light-emitting element arranged outside the triangle on the chromaticity diagram, the color reproduction characteristics of the display device can be made rich.

[0039] For example, a deep blue (DB) represented by a certain coordinate point located outside from the center of the chromaticity diagram toward the point corresponding to the blue light-emitting element B on the chromaticity diagram, or from the center of the chromaticity diagram, a light-emitting element that emits a deeper red (DR) represented by a certain coordinate point located outside toward the point on the chromaticity diagram corresponding to the red light-emitting element R can be used in addition to the R, G, and B of the backlight 1 32. Next, the signal flow in the display device illustrated in this embodiment will be described.

[0040] An analog image signal 140 is input from the image signal source 101 to the liquid crystal display device 100

[0041] . The analog image signal includes an image signal, for example, signals corresponding to red (R), green (G), and blue (B) .

[0042] The A / D conversion circuit 102 converts the analog image signal into a digital image signal 141 (digital image signal ​​​Convert it to a digital signal (Data) and output it to the image processing circuit 110. By converting the image signal into a digital signal in advance, when detecting the difference of the image signal later, the detection can be easily performed, which is preferable. By performing the conversion in advance, when detecting the difference of the image signal later, the detection can be easily performed, which is preferable.

[0043] The image processing circuit 110 generates an LC image signal 142 and a backlight signal 143 from the input digital image signal Data. The LC image signal 142 is an image signal for controlling the display panel 120, and the backlight signal 143 is a signal for controlling the backlight unit 130.

[0044] The storage circuit 111 provided in the image processing circuit 110 has a plurality of frame memories for storing image signals related to a plurality of frames. The number of frame memories included in the storage circuit 111 is not particularly limited, and any element capable of storing image signals related to a plurality of frames may be used. The frame memory may be configured using a storage element such as DRAM (Dynamic Random Access Memory) or SRAM (Static Random Access Memory). Note that the frame memory only needs to be configured to store image signals for each frame period, and the number of frame memories is not particularly limited. The image signals in the frame memory are selectively read out by the comparison circuit 112 and the display control circuit 113.

[0045] Note that the frame memory only needs to be configured to store image signals for each frame period, and the number of frame memories is not particularly limited. Also, the image signals in the frame memory are selectively read out by the comparison circuit 112 and the display control circuit 113.

[0046] The comparison circuit 112 selectively reads out the image signals of consecutive frame periods stored in the storage circuit 111, compares the image signals between consecutive frames pixel by pixel, and is a circuit for detecting the difference.

[0047] ​​​​​​​​​​​​ The operations in the display control circuit 113 and the selection circuit 115 are determined according to whether the difference is detected or not. By comparing the image signals in the comparison circuit 112, when a difference is detected in any pixel, the consecutive frame periods in which the difference is detected are determined to be a video period. On the other hand, by comparing the image signals in the comparison circuit 112, when no difference is detected in all pixels, the consecutive frame periods in which no difference is detected are determined to be a still image period. That is, the comparison circuit 112 determines whether the image signal in the consecutive frame periods is an image signal for displaying a video or an image signal for displaying a still image by detecting the difference in the comparison circuit 112. It should be noted that the difference obtained by the comparison may be set to be determined as a detected difference when it exceeds a certain level. The comparison circuit 112 may be set to determine the detection of the difference based on the absolute value of the difference regardless of the magnitude of the difference.

[0048] In this embodiment, a configuration for determining a video or a still image by detecting the difference in the image signals in consecutive frame periods by the comparison circuit 112 has been shown. However, a configuration may be adopted in which a signal for switching between a still image and a video is supplied from the outside, and the video or the still image is displayed according to the switching signal.

[0049] A video refers to an image that is recognized by the human eye as a moving image by rapidly switching a plurality of images time-divisionally in a plurality of frames. Specifically, for example, by switching images 60 times (60 frames) or more per second, the human eye recognizes it as a video with little flicker.

[0050] ​On the other hand, a still image is composed of a plurality of images time-divisionally arranged over a plurality of frame periods, which is different from a moving image. Although it operates by rapidly switching these images, the image signal that does not change between consecutive frame periods, for example, between the n-th frame and the (n + 1)-th frame, is what is referred to here.

[0051] The selection circuit 115 is configured to include a plurality of switches, for example, switches formed by transistors. When a difference is detected by the operation of the difference in the comparison circuit 112, that is, when the image displayed between consecutive frames is a moving image, it is a circuit for selecting an image signal from the frame memory in the memory circuit 111 where the image signal is stored and outputting it to the display control circuit 113.

[0052] When no difference in the image signal is detected by the operation in the comparison circuit 112, that is, when the image displayed between consecutive frames is a still image, the selection circuit 115 is a circuit that does not output the image signal to the display control circuit 113. In the case of a still image, the selection circuit 115 is configured not to output the image signal from the frame memory to the display control circuit 113, thereby reducing power consumption.

[0053] In the display device of the present embodiment, the operation performed by the comparison circuit 112 when it determines a still image is called the still image mode, and the operation performed by the comparison circuit 112 when it determines a moving image is called the moving image mode.

[0054] Also, the image processing circuit exemplified in the present embodiment may have a mode switching function. The mode switching function is a function for switching between the moving image mode and the still image mode by the user of the display device selecting the operation mode of the display device manually or using an external connection device. ​​​​​​​​​​​

[0055] Therefore, the display device exemplified in this embodiment may have a mode switching circuit. . The mode switching circuit is connected to the selection circuit 115. The mode switching circuit is for the user of the display device to switch the operation mode of the display device manually or using an external connection device. It is an input means for switching.

[0056] The selection circuit 115 can also output an image signal to the display control circuit 113 according to the signal input from the mode switching circuit.

[0057] For example, when operating in the still image mode, if the user switches the operation mode and a mode switching signal is input from the mode switching circuit to the selection circuit 115, even if the comparison circuit 112 has not detected the difference in the image signal in consecutive frame periods, the selection circuit 115 outputs the input image signal to the display control circuit 113 sequentially, that is, can execute the video mode. Also, when operating in the video mode, if the user switches the operation mode and a mode switching signal is input from the mode switching circuit to the selection circuit 115 when, even if the comparison circuit 112 has detected the difference in the image signal in consecutive frame periods, the selection circuit 115 can execute the mode of outputting only the signal of the selected one-frame image signal, that is, the still image mode. Therefore, when the display device of this embodiment is operating in the video display mode, among the images time-divided into a plurality of frames, one frame is displayed as a still image.

[0058] The display control circuit 113 is selected by the selection circuit 115 according to the detection of the difference by the comparison circuit 112. A circuit for optimizing the obtained image signal for the display panel 120 and the backlight unit 130 is.

[0059] For example, even when the digital image signal 141 consists of R, G, and B signals, it is preferable to optimize the image signal according to the light emission characteristics of the R, G, and B light emitting elements of the backlight 132. Also, when the backlight 132 is provided with light emitting elements other than R, G, and B, the display control circuit 113 generates a signal for driving the light emitting elements from the original image signal to optimize the color reproduction characteristics of the display device. Optimize the image signal according to the light emission characteristics of the R, G, and B light emitting elements of the backlight 132. Also, when the backlight 132 is provided with light emitting elements other than R, G, and B, the display control circuit 113 generates a signal for driving the light emitting elements from the original image signal to optimize the color reproduction characteristics of the display device. Generate a signal for driving the light emitting elements from the original image signal to optimize the color reproduction characteristics of the display device. Generate a signal for driving the light emitting elements from the original image signal to optimize the color reproduction characteristics of the display device.

[0060] For example, when converting a digital image signal Data(1) consisting of R, G, and B into a digital image signal Data(4) suitable for the backlight 132 provided with five-color light emitting elements of R, G, B, DR , and DB, the display control circuit 113 generates a digital image signal Data(2) expressed using the light emitting elements DR and DB from the original digital image signal Data(1 ). At the same time, subtract the digital image signal Data(2) expressed using the light emitting elements DR and DB from the original digital image signal Data(1) to generate a digital image signal Data( 3). Next, generate an optimized digital image signal Data(4) for the backlight 132 provided with five-color light emitting elements of R, G, B, DR, and DB, including the digital image signal Data(2) expressed using the light emitting elements DR and DB and the digital image signal Data( 3) expressed using the light emitting elements R, G, and B. Subtract the digital image signal Data(2) expressed using the light emitting elements DR and DB from the original digital image signal Data(1) to generate a digital image signal Data( 3). Next, generate an optimized digital image signal Data(4) for the backlight 132 provided with five-color light emitting elements of R, G, B, DR, and DB, including the digital image signal Data(2) expressed using the light emitting elements DR and DB and the digital image signal Data( 3) expressed using the light emitting elements R, G, and B. 3) expressed using the light emitting elements R, G, and B. Generate an optimized digital image signal Data(4) for the backlight 132 provided with five-color light emitting elements of R, G, B, DR, and DB.

[0061] Also, the display device illustrated in this embodiment is a first system of signals connected to the first system of signal lines. The second system of sub-pixels 123a and the second system of sub-pixels 123b are connected to the second system of signal lines. Then, the display control circuit 113 determines the signal line to which the image signal is output.

[0062] Specifically, when the comparison circuit 112 judges that the image is a moving image, the display control circuit 113 outputs an image signal to the sub-pixels 123a of the first system, and if the comparator circuit 112 determines that the image is a still image, The image signal is output to the sub-pixels 123b of the second system.

[0063] The field sequential signal generating circuit 114 outputs the image signal generated by the display control circuit 113. Based on the signal, the driving circuit 121 of the display panel 120 and the backlight of the backlight unit 130 are This is a circuit for controlling the output control circuit 131.

[0064] The field sequential signal generating circuit 114 also includes a display panel 120 and a backlight. A start pulse SP for synchronizing the start unit 130 and a control signal such as a clock signal CK are supplied. It is also a circuit for controlling switching on and off.

[0065] Next, the field sequential signal generating circuit 114 outputs a driving circuit 1 21, and a method for controlling the backlight control circuit 131 of the backlight unit 130 The operation of the field sequential signal generating circuit 114 is as follows. The operation differs depending on whether the image is judged to be a still image or not. The backlight 132 includes R, G, and B light emitting elements (specifically The lighting fixture shall have an LED.

[0066] First, the field sequential signal generation circuit when the comparison circuit 112 judges that the image is a moving image The operation of path 114 will be described. The field sequential signal generation circuit 114 processes the image signal including the moving image in video mode. Specifically, the field sequential signal generation circuit 114 compresses the image signals optimized by the display control circuit 113 by 1 / (3n) times respectively with respect to the time axis. Here, n is the same value as the n used when dividing one frame into n sub-frames. Then, the field sequential color image signals (for example, R1, G1 B1, R2, G2, B2) corresponding to R, G, B compressed by 1 / (3n) times with respect to the time axis are supplied to the drive circuit 121.

[0067] Also, the field sequential signal generation circuit 114 supplies the backlight signal 143 to the backlight 132. The backlight signal 143 is a signal for lighting the R, G, and B light emitting elements provided in the backlight 132, and is a signal paired with the field sequential color image signals corresponding to R, G, B.

[0068] Also, the display panel 120 and the backlight unit 130 operate in synchronization with the synchronization signal emitted by the field sequential signal generation circuit 114, and the video is displayed.

[0069] On the other hand, when the comparison circuit 112 determines that the image signal is a still image, the field sequential signal generation circuit 114 does not generate a field sequential color image signal, and supplies the still image data for one frame to the drive circuit 121 of the display panel 120.

[0070] After that, the field sequential signal generation circuit 114 stops supplying the image signal and each control signal to the drive circuit 121 and the backlight control circuit 131. ​​​​​​​​​​

[0071] Further, the display device exemplified in the embodiment may have a photometry circuit. When the photometry circuit is provided, the display device can detect the brightness of the environment in which the display device is placed. As a result, the display control circuit 113 to which the photometry circuit is connected can change the driving method of the display panel 120 according to the signal input from the photometry circuit.

[0072] For example, when the photometry circuit detects that the display device exemplified in the present embodiment is being used in a dim environment, even if the comparison circuit 112 determines that it is a still image, the display control circuit 113 outputs the image signal to the first-system sub-pixels 123a and turns on the backlight 132. Since the first-system sub-pixels 123a have a light-transmissive pixel electrode, a still image with high visibility can be provided by the backlight.

[0073] Also, for example, when the photometry circuit detects that the display device exemplified in the present embodiment is being used under extremely bright external light ( for example, under direct sunlight outdoors), even if the comparison circuit 112 determines that it is a moving image, the display control circuit 113 outputs the image signal to the second-system sub-pixels 123 b. Since the second-system sub-pixels 123b have a pixel electrode that reflects light incident through the liquid crystal layer, highly visible still images and moving images can be provided even under extremely bright external light.

[0074] During the period of displaying a still image according to the configuration of the present embodiment, operations such as frequently writing an image signal can be reduced. Also, since a still image can be displayed without using a backlight, the power consumption is extremely small.

[0075] In addition, the display device exemplified in the present embodiment can reduce power consumption and display still images. Moreover, without using a color filter, it is possible to display a full-color image and a moving image. Since the color filter does not absorb the light of the backlight, the light utilization efficiency is high, and the power consumption is suppressed even in the display of a full-color image and a moving image.

[0076] In addition, when visually recognizing an image by writing an image signal multiple times, the human eye will visually recognize an image that switches over multiple times. Therefore, it may appear as fatigue to the human eye. As described in the present embodiment, by adopting a configuration that reduces the number of times of writing an image signal, there is also an effect of reducing eye fatigue.

[0077] Note that the present embodiment can be appropriately combined with other embodiments shown in this specification. .

[0078] (Embodiment 2) In the present embodiment, a driving method of a liquid crystal display device will be described using a pixel connection diagram, a timing chart, etc. First, FIG. 2 shows a schematic diagram of a display panel of a liquid crystal display device. FIG. 2 includes a pixel portion 151, a first scanning line 152 (also referred to as a gate line), a first signal line 153 (also referred to as a data line), a second scanning line 154, a second signal line 155, a pixel 156 , a common electrode 169 (also referred to as a common electrode), a capacitance line 170, a first scanning line driving circuit 157 , a first signal line driving circuit 158, a second scanning line driving circuit 159, and a second signal line driving circuit 1 60.

[0079] The pixel 156 is roughly divided into a transmissive electrode portion 161 and a reflective electrode portion 162. The transmissive electrode portion 161 , and includes a pixel transistor 163, a liquid crystal element 164, and a capacitor element 165. The gate of the pixel transistor 163 is connected to the first scanning line 152, and one of the source or drain, i.e., the first terminal, is connected to the first signal line 153, and the other of the source or drain, i.e., the second terminal, is connected to one electrode of the liquid crystal element 164 and the first electrode of the capacitor element 165. Note that the other electrode of the liquid crystal element 164 is connected to the common electrode 169. Also, the second electrode of the capacitor element 165 is connected to the capacitor line 170. The gate of the pixel transistor 163 is connected to the first scanning line 152, and one of the source or drain, i.e., the first terminal, is connected to the first signal line 153, and the other of the source or drain, i.e., the second terminal, is connected to one electrode of the liquid crystal element 164 and the first electrode of the capacitor element 165. Note that the other electrode of the liquid crystal element 164 is connected to the common electrode 169. Also, the second electrode of the capacitor element 165 is connected to the capacitor line 170. In addition, the reflective electrode portion 162 includes a pixel transistor 166, a liquid crystal element 167, and a capacitor element 168. The gate of the pixel transistor 166 is connected to the second scanning line 154, and one of the source or drain, i.e., the first terminal, is connected to the second signal line 155, and the other of the source or drain, i.e., the second terminal, is connected to one electrode of the liquid crystal element 167 and the first electrode of the capacitor element 168. Note that the other electrode of the liquid crystal element 167 is connected to the common electrode 169. Also, the second electrode of the capacitor element 168 is connected to the capacitor line 170. In FIG. 2, the first scanning line 152 and the second scanning line 154 are driven separately by the first scanning line driving circuit 157 and the second scanning line driving circuit 159. Also, the first signal line 153 and the second signal line 155 are supplied with different image signals (hereinafter referred to as the first data and the second data) by the first signal line driving circuit 158 and the second signal line driving circuit 160. And for the liquid crystal element 164 in the transmissive electrode portion 161 and the liquid crystal element 167 in the reflective electrode portion 162, gradation control based on different image signals is performed.

[0080] Moreover, the reflective electrode portion 162 includes a pixel transistor 166, a liquid crystal element 167, and a capacitor element 168. The gate of the pixel transistor 166 is connected to the second scanning line 154, and one of the source or drain, i.e., the first terminal, is connected to the second signal line 155, and the other of the source or drain, i.e., the second terminal, is connected to one electrode of the liquid crystal element 167 and the first electrode of the capacitor element 168. The gate of the pixel transistor 166 is connected to the second scanning line 154, and one of the source or drain, i.e., the first terminal, is connected to the second signal line 155, and the other of the source or drain, i.e., the second terminal, is connected to one electrode of the liquid crystal element 167 and the first electrode of the capacitor element 168. Note that the other electrode of the liquid crystal element 167 is connected to the common electrode 169. Also, the second electrode of the capacitor element 168 is connected to the capacitor line 170. In FIG. 2, the first scanning line 152 and the second scanning line 154 are driven separately by the first scanning line driving circuit 157 and the second scanning line driving circuit 159. Also, the first signal line 153 and the second signal line 155 are supplied with different image signals (hereinafter referred to as the first data and the second data) by the first signal line driving circuit 158 and the second signal line driving circuit 160. And for the liquid crystal element 164 in the transmissive electrode portion 161 and the liquid crystal element 167 in the reflective electrode portion 162, gradation control based on different image signals is performed. Note that the other electrode of the liquid crystal element 167 is connected to the common electrode 169. Also, the second electrode of the capacitor element 168 is connected to the capacitor line 170. In FIG. 2, the first scanning line 152 and the second scanning line 154 are driven separately by the first scanning line driving circuit 157 and the second scanning line driving circuit 159. Also, the first signal line 153 and the second signal line 155 are supplied with different image signals (hereinafter referred to as the first data and the second data) by the first signal line driving circuit 158 and the second signal line driving circuit 160. And for the liquid crystal element 164 in the transmissive electrode portion 161 and the liquid crystal element 167 in the reflective electrode portion 162, gradation control based on different image signals is performed.

[0081] In FIG. 2, the first scanning line 152 and the second scanning line 154 are driven separately by the first scanning line driving circuit 157 and the second scanning line driving circuit 159. Also, the first signal line 153 and the second signal line 155 are supplied with different image signals (hereinafter referred to as the first data and the second data) by the first signal line driving circuit 158 and the second signal line driving circuit 160. And for the liquid crystal element 164 in the transmissive electrode portion 161 and the liquid crystal element 167 in the reflective electrode portion 162, gradation control based on different image signals is performed. Also, the first signal line 153 and the second signal line 155 are supplied with different image signals (hereinafter referred to as the first data and the second data) by the first signal line driving circuit 158 and the second signal line driving circuit 160. And for the liquid crystal element 164 in the transmissive electrode portion 161 and the liquid crystal element 167 in the reflective electrode portion 162, gradation control based on different image signals is performed. Also, the first signal line 153 and the second signal line 155 are supplied with different image signals (hereinafter referred to as the first data and the second data) by the first signal line driving circuit 158 and the second signal line driving circuit 160. And for the liquid crystal element 164 in the transmissive electrode portion 161 and the liquid crystal element 167 in the reflective electrode portion 162, gradation control based on different image signals is performed. Moreover, the reflective electrode portion 162 includes a pixel transistor 166, a liquid crystal element 167, and a capacitor element 168. The gate of the pixel transistor 166 is connected to the second scanning line 154, and one of the source or drain, i.e., the first terminal, is connected to the second signal line 155, and the other of the source or drain, i.e., the second terminal, is connected to one electrode of the liquid crystal element 167 and the first electrode of the capacitor element 168. Note that the other electrode of the liquid crystal element 167 is connected to the common electrode 169. Also, the second electrode of the capacitor element 168 is connected to the capacitor line 170. In FIG. 2, the first scanning line 152 and the second scanning line 154 are driven separately by the first scanning line driving circuit 157 and the second scanning line driving circuit 159. Also, the first signal line 153 and the second signal line 155 are supplied with different image signals (hereinafter referred to as the first data and the second data) by the first signal line driving circuit 158 and the second signal line driving circuit 160. And for the liquid crystal element 164 in the transmissive electrode portion 161 and the liquid crystal element 167 in the reflective electrode portion 162, gradation control based on different image signals is performed.

[0082] Note that the pixel transistor 163 and the pixel transistor 166 preferably include a thin-film oxide semiconductor layer and are preferably configured by thin-film transistors (hereinafter also referred to as TFTs).

[0083] Note that a thin-film transistor is an element having at least three terminals including a gate, a drain, and a source, has a channel region between the drain region and the source region, and current can flow through the drain region, the channel region, and the source region. Here, since the source and the drain vary depending on the structure and operating conditions of the transistor, it is difficult to limit which one is the source or the drain. Therefore, in this document (specification, claims, drawings, etc.), the regions functioning as the source and the drain may not be referred to as the source or the drain. In that case, as an example, they may be respectively referred to as the first terminal and the second terminal. Alternatively, they may be respectively referred to as the first electrode and the second electrode. Alternatively, they may be referred to as the source region and the drain region.

[0084] Note that the first scanning line driving circuit 157, the first signal line driving circuit 158, the second scanning line driving circuit 159, and the second signal line driving circuit 160 are preferably provided on the same substrate as the pixel portion 151, but it is not necessarily required to be provided on the same substrate as the pixel portion 151. By providing the first scanning line driving circuit 157, the first signal line driving circuit 158, the second scanning line driving circuit 159, and the second signal line driving circuit 160 on the same substrate as the pixel portion 151, the number of external connection terminals can be reduced

[0085] Note that the pixels 156 are arranged in a matrix. Here, when the pixels are arranged in a matrix it means that in the vertical or horizontal direction, the pixels are arranged in a straight line or arranged on a zigzag line.

[0086] Note that when it is explicitly described that A and B are connected, it includes the case where A and B are electrically connected , the case where A and B are functionally connected, and the case where A and B are directly connected .

[0087] Next, the operation of the display panel will be described together with the operation of the backlight in Fig. 3(A). As described in the above embodiment, the operation of the display panel is roughly divided into a video display period 301 and a still image display period 302. As described above, the operation of the display panel is roughly divided into a video display period 301 and a still image display period 302. The video display period 301 and the still image display period 302.

[0088] Note that in the video display period 301, the period of one frame (or frame frequency) is desirably 1 / 60 second or less (60 Hz or more). By increasing the frame frequency, it is possible to prevent a person viewing the image from feeling flicker. Also, in the still image display period 302, by making the period of one frame extremely long, for example, 1 minute or more (0. 017 Hz or less), it is possible to reduce eye fatigue compared to the case of switching the same image multiple times. 017 Hz or less), it is possible to reduce eye fatigue compared to the case of switching the same image multiple times. By making the period of one frame extremely long, for example, 1 minute or more (0. 017 Hz or less), it is possible to reduce eye fatigue compared to the case of switching the same image multiple times.

[0089] Note that when an oxide semiconductor is used as the semiconductor layer of the pixel transistor 163 and the pixel transistor 166, the off-current can be reduced. Therefore, in the pixel, the holding time of electrical signals such as image signals can be lengthened, and the writing interval can also be set long. Therefore the holding time of electrical signals such as image signals can be lengthened, and the writing interval can also be set long. Therefore The period of one frame can be lengthened, and the frequency of the refresh operation during the still image display period 302 can be reduced, so that the effect of suppressing power consumption can be enhanced further.

[0090] During the video display period 301 shown in FIG. 3(A), as described in the above embodiment, a drive circuit control signal for displaying a video by field sequential drive is supplied to the first scanning line drive circuit 157 and the first signal line drive circuit 158 (hereinafter referred to as the first drive circuit). and a drive circuit control signal for displaying black on each pixel is supplied to the second scanning line drive circuit 159 and the second signal line drive circuit 160 (hereinafter referred to as the second drive circuit), and the first drive circuit and the second drive circuit operate. Also, during the video display period 301 shown in FIG. 3(A), a backlight signal 143 for performing color display by field sequential drive is supplied to the backlight, and the backlight operates. Then, the display panel can perform a color moving image display.

[0091] During the still image display period 302 shown in FIG. 3(A), as described in the above embodiment, black-and-white gradations (denoted as BK / W in the figure) are expressed by transmission or non-transmission of reflected light, so a drive circuit control signal for writing an image signal of a still image is supplied to the second drive circuit, and the second drive circuit operates. Note that power consumption can be reduced by setting the drive circuit control signal in a period other than when writing the image signal to the second drive circuit to be non-operative. Also, during the still image display period 302 shown in FIG. 3(A), since the display is configured to be visually recognized using reflected light from external light, the backlight is turned off by a backlight control signal. Then, the display panel can perform a still image display with black-and-white gradations. ​

[0092] Next, the video display period 301 in FIG. 3(A) is described in FIG. 3(B), and the still image display period 302 is described in FIG. 3(C) in terms of its details using a timing chart. Note that the timing charts shown in FIGS. 3(B) and 3(C) are exaggerated for explanatory purposes, and it is noted that, unless otherwise specified, the respective signals do not operate synchronously.

[0093] First, FIG. 3(B) is described. In FIG. 3(B), as an example, the clock signals GCK (GCK1, 2 in the figure), and the start pulses GSP (GSP1, 2 in the figure) supplied to the first scanning line drive circuit 157 and the second scanning line drive circuit 159 during the video display period 301, the clock signal SCK (SCK1, 2 in the figure), and the start pulse SSP (SSP1, 2 in the figure) supplied to the first signal line drive circuit 158 and the second signal line drive circuit 160, the first data, the second data, and the lighting state of the backlight are shown. Note that as the backlight, as an example of a plurality of light-emitting elements, a configuration in which three colors of RGB are sequentially lit will be described. Note that as the backlight, by using LEDs, low power consumption and long life can be achieved. During the video display period 301, the clock signals GCK1, 2 are clock signals that are constantly supplied. Also, the start pulses GSP1, 2 are pulses corresponding to the vertical synchronization frequency. Also, the clock signals SCK1, 2 are clock signals that are constantly supplied. Also, the start pulses SSP1, 2 are pulses corresponding to one gate selection period. Note that during the video display period 301,

[0094] During the video display period 301, the clock signals GCK1, 2 become clock signals that are constantly supplied. Also, the start pulses GSP1, 2 become pulses corresponding to the vertical synchronization frequency. Also, the clock signals SCK1, 2 become clock signals that are constantly supplied. Also, the start pulses SSP1, 2 become pulses corresponding to one gate selection period. Note that during the video display period 301, ​​​​In order to display video in a field sequential manner, the image signal is first sent to the camera for displaying R (red). Then, the R backlight is turned on, and then the G (green) display is turned on. Then, write to each pixel, turn on the G backlight, and then display B (blue). The image signal is varied by repeatedly writing to each pixel and then turning on the backlight of B. By doing so, the viewer can visually recognize the color display in the video. In the example of 01, the second data is an image signal for displaying the gradation of BK (black), and pixel 1 The second data is written to the reflective electrode portion 162 of the pixel 56. By converting the image signal into an image signal, the reflective electrode portion 162 is irradiated with external light. This causes light leakage. This can improve the problem of visibility of the moving image of the transparent electrode portion 161, that is, the visibility is reduced. Cut.

[0095] Next, FIG. 3C will be described. In FIG. 3C, for the still image display period 302, The still image writing period 303 and the still image holding period 304 will be described separately.

[0096] In the still image writing period 303, the clock supplied to the second scanning line driving circuit 159 is The signal GCK2 is a clock signal for writing one screen. The second scanning line driving circuit 1 The start pulse GSP2 supplied to 59 is a pulse for writing one screen. The clock signal SCK2 supplied to the signal line driver circuit 160 is a clock for writing one screen. A start pulse SSP2 is supplied to the second signal line driving circuit 160. This is a pulse for writing one screen. In the still image writing period 303, reflected light is used. To display a still image with an image signal BK / W for displaying black-and-white gradations, the backlight for color display is turned off.

[0097] During the still image holding period 304, for driving the first driving circuit and the second driving circuit the clock signals GCK1, 2, the start pulses GSP1, 2, the clock signals SCK1, 2, the start pulses SSP1, 2 will have their supply stopped. Therefore, during the still image holding period 304, power consumption can be reduced and low power consumption can be achieved. Note that during the still image holding period 304, the image signal written to the pixels during the still image writing period 303 is held by pixel transistors with an extremely small off-current, so a still image in color display can be held for a period of one minute or more. Also, during the still image holding period 304, before the image signal held by the capacitor changes over a certain period, a new still image writing period 303 is provided to write the same image signal as the previous period's image signal (refresh operation), and then the still image holding period 304 can be set again.

[0098] The liquid crystal display device described in this embodiment can achieve low power consumption when performing still image display.

[0099] This embodiment can be implemented in appropriate combination with the configuration described in Embodiment 1.

[0100] (Embodiment 3) In this embodiment, a configuration different from the driving method of the liquid crystal display device described in the above Embodiment 2 will be described using a timing chart and the like. First, The driving method of the backlight during the video display period 301 described in 2 will be described with reference to a timing chart. This will be shown and explained.

[0101] The difference between the timing chart of Fig. 4(A) and Fig. 3(B) is that following the writing of the image signal, after the backlight is turned on, a backlight off period (BL in Fig. 4(A)) is provided. By providing a period to turn off the backlight before writing the next image signal, color flickering and the like can be reduced, and visibility can be improved.

[0102] Also, a configuration different from Fig. 4(A) is shown in Fig. 4(B). The difference between the timing chart of Fig. 4(B) and Fig. 4(A) is that instead of the backlight off period BL, a light emission period of B (blue) is provided. By providing a blue light emission period before writing the next image signal, similar to the case of providing an off period, color flickering and the like can be reduced, and visibility can be improved. This is possible.

[0103] Also, in the above-described Embodiment 2, as an example of a plurality of light emitting elements used for the backlight, an example using three colors of RGB has been described, but other configurations may also be used. As an example, as shown in Fig. 5(A), a configuration may be adopted in which the backlight is controlled using five-color light emitting elements 311. This is possible.

[0104] As an example, the light emitting element 311 shown in Fig. 5(A) shows the first red light emitting element R1, the second red light emitting element R2, the green light emitting element G, the first blue light emitting element B1, and the second blue light emitting element B2. Next, in Fig. 5(B), in the same manner as Figs. 4(A) and (B), when the backlight shown in Fig. 5(A) is turned on during the video display period 301 described in the above-described Embodiment 2, this is shown. The control will be described.

[0105] In FIG. 5(B), following the writing of the image signal of R, the first red light-emitting element R1 and the first blue light-emitting element B1 of the backlight are turned on. Also, following the writing of the image signal of G, the green light-emitting element G and the second blue light-emitting element B2 of the backlight are turned on. Also, following the writing of the image signal of B, the first blue light-emitting element B1 and the second blue light-emitting element B2 of the backlight are turned on. Next, following the writing of the image signal of R, the second red light-emitting element R2 and the second blue light-emitting element B2 of the backlight are turned on. Also, following the writing of the image signal of G, the green light-emitting element G and the first blue light-emitting element B1 of the backlight are turned on. Also, following the writing of the image signal of B, the second blue light-emitting element B2 and the first blue light-emitting element B1 of the backlight are turned on. By adopting the configuration of FIG. 5(B), a blue emission period can be provided during the period when the RGB color elements are switched, so that the same effect as in FIG. 4(B) can be obtained. Also, it is possible to use light-emitting elements made of materials with different color coordinates for the first red light-emitting element R1 and the second red light-emitting element R2, the first blue light-emitting element B1 and the second blue light-emitting element B2, and thus the color expression range in color display can be widened.

[0106]

[0107] The liquid crystal display device described in this embodiment can achieve low power consumption when displaying a still image.

[0108] This embodiment can be implemented in appropriate combination with the configuration described in Embodiment 1. ​

[0109] (Embodiment 4) 6 shows the configuration of the liquid crystal display module 190. The liquid crystal display module 190 has a backlight. a display unit 130, a display panel 120 in which liquid crystal elements are arranged in a matrix, and a display panel 1 The backlight unit 130 has a polarizing plate 125a and a polarizing plate 125b sandwiching the polarizing plate 20. Light elements, such as three primary color LEDs (133R, 133G, and 133B) arranged in a matrix A diffusion plate 134 is disposed between the display panel 120 and the light emitting element. It can be used as the light emitting part 130. In addition, the FPC (flexible printed circuit board) which is the external input terminal can be used as the light emitting part 130. The printed circuit 126 is electrically connected to a terminal portion provided on the display panel 120. There are.

[0110] In FIG. 6, three colors of light 135 are shown by arrows (R, G, and B). The pulsed lights of different colors are sequentially emitted from the light source unit 130 in synchronization with the backlight unit 130. The liquid crystal display module 190 modulates the light emitted by the liquid crystal elements of the display panel 120 that operate in conjunction with the liquid crystal display module 190. The light emitted sequentially reaches the observer, who perceives the light as an image.

[0111] In addition, in FIG. 6, external light 139 passes through the liquid crystal element on the display panel 120 and is reflected by the lower electrode. The intensity of the light passing through the liquid crystal element is controlled by the image signal. Since the image is modulated by the reflected light of the outside light 139, the observer can also capture the image. .

[0112] FIG. 7(A) is a plan view of the display area, and FIG. 7(B) is an equivalent circuit, showing one pixel. FIG. 8 is a cross-sectional view taken along lines V1-V2, W1-W2, and X1-X2 in FIG. 7(A). It is a figure.

[0113] In FIG. 7, a plurality of source wiring layers (including source electrode layer or drain electrode layers 555b, 565 b) are arranged parallel to each other (extending in the vertical direction in the figure) and spaced apart from each other. A plurality of gate wiring layers (including gate electrode layer 551) extend in a direction substantially orthogonal to the source wiring layer (in the left - right direction in the figure) and are arranged spaced apart from each other. The capacitor wiring layer is arranged at a position adjacent to each of the plurality of gate wiring layers and extends in a direction substantially parallel to the gate wiring layer, that is, in a direction substantially orthogonal to the source wiring layer (in the left - right direction in the figure). The liquid crystal display devices of FIGS. 7 and 8 are transflective liquid crystal display devices, and the pixel region is composed of a reflection region 49 8 and a transmission region 499. In the reflection region 498, a reflection electrode

[0114] layer 577 is formed as a pixel electrode layer, and in the transmission region 499, a transparent electrode layer 576 is formed as a pixel electrode layer. As shown in FIGS. 7 and 8, when the transparent electrode layer 576 and the reflection electrode layer 577 are laminated so that their ends overlap via an insulating film 571, an effective display region can be provided in the pixel region. In FIG. 8, an example of laminating the transparent electrode layer 576, the insulating film 57 1, and the reflection electrode layer 577 in this order on the interlayer film 413 is shown, but a structure in which the reflection electrode layer 57 7, the insulating film 571, and the transparent electrode layer 576 are laminated in this order on the interlayer film 413 may also be used. In FIG. 7(B), as shown in the equivalent circuit, a transistor 560 electrically connected to the reflection electrode layer 577 and the source electrode layer or drain electrode layer 565b in one pixel, and a transistor 550 electrically connected to the transparent electrode layer 576 and the source electrode layer or drain electrode layer 555b are provided.

[0115] ​​​It has. Transistor 560 is a transistor for the reflection region that controls the on / off of the reflection region, and transistor 550 is a transistor for the transmission region that controls the on / off of the transmission region. Transistor 550 is a transistor for the transmission region that controls the on / off of the transmission region. It is.

[0116] Insulating films 407, 409, and interlayer film 413 are provided on transistors 550 and 560. At each opening (contact hole) formed in insulating films 407, 409, and interlayer film 413, transistor 550 is electrically connected to transparent electrode layer 576, and transistor 560 is electrically connected to reflection electrode layer 577 respectively. At each opening (contact hole) formed in insulating films 407, 409, and interlayer film 413, transistor 550 is electrically connected to transparent electrode layer 576, and transistor 560 is electrically connected to reflection electrode layer 577 respectively. It is electrically connected.

[0117] As shown in FIG. 8, a common electrode layer (also referred to as a counter electrode layer) 448 is formed on the second substrate 442, and faces the transparent electrode layer 576 and reflection electrode layer 577 on the first substrate 441 with the liquid crystal layer 444 in between. In the liquid crystal display device of FIGS. 7 and 8, an alignment film 460a is provided between the transparent electrode layer 576 and reflection electrode layer 577 and the liquid crystal layer 444, and an alignment film 460b is provided between the common electrode layer 448 and the liquid crystal layer 444. Alignment films 460a and 460b are insulating layers having a function of controlling the alignment of the liquid crystal, and may not be provided depending on the liquid crystal material. It is formed and faces the transparent electrode layer 576 and reflection electrode layer 577 on the first substrate 441 with the liquid crystal layer 444 in between. In the liquid crystal display devices of FIGS. 7 and 8, an alignment film 460a is provided between the transparent electrode layer 576 and reflection electrode layer 577 and the liquid crystal layer 444, and an alignment film 460b is provided between the common electrode layer 448 and the liquid crystal layer 444. An alignment film 460a is provided between the transparent electrode layer 576 and reflection electrode layer 577 and the liquid crystal layer 444, and an alignment film 460b is provided between the common electrode layer 448 and the liquid crystal layer 444. Alignment films 460a and 460b are insulating layers having a function of controlling the alignment of the liquid crystal, and may not be provided depending on the liquid crystal material. They are insulating layers having a function of controlling the alignment of the liquid crystal, and may not be provided depending on the liquid crystal material. It is okay.

[0118] Transistors 550 and 560 are examples of bottom-gate structure reverse staggered transistors. Transistor 550 includes a gate electrode layer 551, a gate insulating layer 402, a semiconductor layer 553, a source electrode layer or drain electrode layer 555a, and a source electrode layer or drain electrode layer 555b. Transistor 560 includes a gate electrode layer 551, a gate insulating layer 402, a semiconductor layer 563, a source electrode layer or drain electrode layer 565a, and a source electrode layer or drain electrode layer 565b. Transistor 550 includes a gate electrode layer 551, a gate insulating layer 402, a semiconductor layer 553, a source electrode layer or drain electrode layer 555a, and a source electrode layer or drain electrode layer 555b. Transistor 550 includes a gate electrode layer 551, a gate insulating layer 402, a semiconductor layer 553, a source electrode layer or drain electrode layer 555a, and a source electrode layer or drain electrode layer 555b. Transistor 560 includes a gate electrode layer 551, a gate insulating layer 402, a semiconductor layer 563, a source electrode layer or drain electrode layer 565a, and a source electrode layer or drain electrode layer 565b. Transistor 560 includes a gate electrode layer 551, a gate insulating layer 402, a semiconductor layer 563, a source electrode layer or drain electrode layer 565a, and a source electrode layer or drain electrode layer 565b. It includes layer 565b. Also, transistors 550 and 560 each have a capacitance. As shown in FIG. 8, in the reflection region 498, a capacitance wiring layer 558 formed in the same process as the gate electrode layer 551, a gate insulating layer 402, and a conductive layer 579 formed in the same process as the source electrode layer or drain electrode layers 555a, 555b, 565a, 565b are laminated to form a capacitance. Note that a wiring layer 580 formed in the same process as the reflective electrode layer 577 formed of any reflective conductive film such as aluminum (Al) or silver (Ag) is preferably formed so as to cover the capacitance wiring layer 558.

[0119] In the transflective liquid crystal display device according to the present embodiment, color display of a moving image is performed in the transmission region 499 by on / off control of the transistor 550, and monochrome (black and white) display of a still image is performed in the reflection region 498 by on / off control of the transistor 560. By operating the transistor 550 and the transistor 560 separately, the display in the reflection region 49 8 and the display in the transmission region 499 can be controlled independently.

[0120] In the transmission region 499, display is performed by incident light from a backlight provided on the first substrate 441 side. Color display can be performed by using RGB light-emitting diodes (LEDs) for the backlight. Further, in the present embodiment, a sequential addition color mixing method (field sequential method) of performing color display by time division using light-emitting diodes (LEDs) is adopted.

[0121] On the other hand, in the reflection region 498, display is performed by reflecting external light incident from the second substrate 442 side by the reflective electrode layer 5 77.

[0122] In a liquid crystal display device, examples of forming irregularities on the reflective electrode layer 577 are shown in FIGS. 9 and 10. FIG. 9 shows an example of forming an irregular shape on the reflective electrode layer 577 by making the surface of the interlayer film 413 have an irregular shape in the reflective region 498. The irregular shape of the surface of the interlayer film 413 may be formed by selectively performing etching process. For example, a photosensitive organic resin can be subjected to a photolithography process to form an interlayer film 413 having an irregular shape. Further, FIG. 10 shows an example of forming an irregular shape on the reflective electrode layer 577 by providing a convex structure on the interlayer film 413 in the reflective region 498. Note that FIG. 10 forms a convex structure by laminating the insulating layer 480 and the insulating layer 482. For example, an inorganic insulating layer such as silicon oxide or silicon nitride can be used as the insulating layer 480, and an organic resin such as a polyimide resin or an acrylic resin can be used as the insulating layer 482. First, a silicon oxide film is formed on the interlayer film 413 by a sputtering method, and a polyimide resin film is formed on the silicon oxide film by a coating method. Using the silicon oxide film as an etching stopper, the polyimide resin film is etched. By etching the silicon oxide film using the processed polyimide resin layer as a mask, a convex structure composed of the laminated insulating layer 480 and insulating layer 482 as shown in FIG. 10 can be formed. 10 can be formed. 10 can be formed. 10 can be formed. 10 can be formed. 10 can be formed. 10 can be formed. 10 can be formed. 10 can be formed.

[0123] As shown in FIGS. 9 and 10, when the surface of the reflective electrode layer 577 has irregularities, the incident external light is diffusely reflected, and better display can be performed. Therefore, the visibility in the display is improved.

[0124] This embodiment can be freely combined with Embodiments 1 to 3 respectively.​

[0125] (Embodiment 5) In this embodiment, examples of transistors applicable to the liquid crystal display device disclosed in this specification are shown. The structure of the transistor applicable to the liquid crystal display device disclosed in this specification is not particularly limited , and for example, staggered and planar types of top gate structures or bottom gate structures can be used . Also, the transistor may have a single gate structure in which one channel formation region is formed, a double gate structure in which two are formed, or a triple gate structure in which three are formed . Further, a dual gate type having two gate electrode layers disposed via a gate insulating layer above and below the channel region may be used. Incidentally, an example of the cross-sectional structure of the transistor is shown below in FIGS. 11(A) to 11(D) . The transistors shown in FIGS. 11(A) to 11(D) use an oxide semiconductor as the semiconductor . The merit of using an oxide semiconductor is that high mobility and low off-current can be obtained by a relatively simple and low-temperature process . Of course, other semiconductors may also be used . The transistor 410 shown in FIG. 11(A) is one of the thin film transistors with a bottom gate structure, and is also called an inverted staggered type thin film transistor . .

[0126] ..

[0127] The transistor 410 includes a gate electrode layer 401, a gate insulating layer 402, an oxide semiconductor layer 403, a source electrode layer 405a, and a drain electrode layer 405b on a substrate 400 having an insulating surface . Also, an insulating film 407 that covers the transistor 410 and is laminated on the oxide semiconductor layer 403 is provided . An insulating film 409 is further formed on the insulating film 407 .

[0128] The transistor 420 shown in FIG. 11(B) is one of the bottom gate structures called channel protection type (also called channel stop type), and is also called an inverted staggered thin film transistor. It has a bottom gate structure called channel protection type (also called channel stop type), and is also called an inverted staggered thin film transistor.

[0129] The transistor 420 includes a gate electrode layer 401, a gate insulating layer 402, an oxide semiconductor layer 403, an insulating layer 427 that functions as a channel protection layer covering the channel formation region of the oxide semiconductor layer 403, a source electrode layer 405a, and a drain electrode layer 405b on a substrate 400 having an insulating surface. Further, an insulating film 409 is formed to cover the transistor 420. The transistor 420 includes a gate electrode layer 401, a gate insulating layer 402, an oxide semiconductor layer 403, an insulating layer 427 that functions as a channel protection layer covering the channel formation region of the oxide semiconductor layer 403, a source electrode layer 405a, and a drain electrode layer 405b on a substrate 400 having an insulating surface. Further, an insulating film 409 is formed to cover the transistor 420. The transistor 420 includes a gate electrode layer 401, a gate insulating layer 402, an oxide semiconductor layer 403, an insulating layer 427 that functions as a channel protection layer covering the channel formation region of the oxide semiconductor layer 403, a source electrode layer 405a, and a drain electrode layer 405b on a substrate 400 having an insulating surface. Further, an insulating film 409 is formed to cover the transistor 420. The transistor 420 includes a gate electrode layer 401, a gate insulating layer 402, an oxide semiconductor layer 403, an insulating layer 427 that functions as a channel protection layer covering the channel formation region of the oxide semiconductor layer 403, a source electrode layer 405a, and a drain electrode layer 405b on a substrate 400 having an insulating surface. Further, an insulating film 409 is formed to cover the transistor 420.

[0130] The transistor 430 shown in FIG. 11(C) is a bottom gate type thin film transistor, and includes a gate electrode layer 401, a gate insulating layer 402, a source electrode layer 405a, a drain electrode layer 405b, and an oxide semiconductor layer 403 on a substrate 400 having an insulating surface. Further, an insulating film 407 in contact with the oxide semiconductor layer 403 is provided to cover the transistor 430. An insulating film 409 is further formed on the insulating film 407. The transistor 430 shown in FIG. 11(C) is a bottom gate type thin film transistor, and includes a gate electrode layer 401, a gate insulating layer 402, a source electrode layer 405a, a drain electrode layer 405b, and an oxide semiconductor layer 403 on a substrate 400 having an insulating surface. Further, an insulating film 407 in contact with the oxide semiconductor layer 403 is provided to cover the transistor 430. An insulating film 409 is further formed on the insulating film 407. The transistor 430 shown in FIG. 11(C) is a bottom gate type thin film transistor, and includes a gate electrode layer 401, a gate insulating layer 402, a source electrode layer 405a, a drain electrode layer 405b, and an oxide semiconductor layer 403 on a substrate 400 having an insulating surface. Further, an insulating film 407 in contact with the oxide semiconductor layer 403 is provided to cover the transistor 430. An insulating film 409 is further formed on the insulating film 407. The transistor 430 shown in FIG. 11(C) is a bottom gate type thin film transistor, and includes a gate electrode layer 401, a gate insulating layer 402, a source electrode layer 405a, a drain electrode layer 405b, and an oxide semiconductor layer 403 on a substrate 400 having an insulating surface. Further, an insulating film 407 in contact with the oxide semiconductor layer 403 is provided to cover the transistor 430. An insulating film 409 is further formed on the insulating film 407. The transistor 430 shown in FIG. 11(C) is a bottom gate type thin film transistor, and includes a gate electrode layer 401, a gate insulating layer 402, a source electrode layer 405a, a drain electrode layer 405b, and an oxide semiconductor layer 403 on a substrate 400 having an insulating surface. Further, an insulating film 407 in contact with the oxide semiconductor layer 403 is provided to cover the transistor 430. An insulating film 409 is further formed on the insulating film 407.

[0131] In the transistor 430, the gate insulating layer 402 is provided in contact with the substrate 400 and the gate electrode layer 401, and the source electrode layer 405a and the drain electrode layer 405b are provided in contact with the gate insulating layer 402. Then, the oxide semiconductor layer 403 is provided on the gate insulating layer 402, and the source electrode layer 405a and the drain electrode layer 405b. In the transistor 430, the gate insulating layer 402 is provided in contact with the substrate 400 and the gate electrode layer 401, and the source electrode layer 405a and the drain electrode layer 405b are provided in contact with the gate insulating layer 402. Then, the oxide semiconductor layer 403 is provided on the gate insulating layer 402, and the source electrode layer 405a and the drain electrode layer 405b. In the transistor 430, the gate insulating layer 402 is provided in contact with the substrate 400 and the gate electrode layer 401, and the source electrode layer 405a and the drain electrode layer 405b are provided in contact with the gate insulating layer 402. Then, the oxide semiconductor layer 403 is provided on the gate insulating layer 402, and the source electrode layer 405a and the drain electrode layer 405b. In the transistor 430, the gate insulating layer 402 is provided in contact with the substrate 400 and the gate electrode layer 401, and the source electrode layer 405a and the drain electrode layer 405b are provided in contact with the gate insulating layer 402. Then, the oxide semiconductor layer 403 is provided on the gate insulating layer 402, and the source electrode layer 405a and the drain electrode layer 405b.

[0132] The transistor 440 shown in FIG. 11(D) is one of the top gate structure thin film transistors. The transistor 440 includes an insulating layer 437, an oxide The transistor 440 shown in FIG. 11(D) is one of the top gate structure thin film transistors. The transistor 440 includes an insulating layer 437, an oxide The oxide semiconductor layer 403, the source electrode layer 405a, the drain electrode layer 405b, and the gate insulating layer include the gate insulating layer 402 and the gate electrode layer 401. The wiring layer 436a and the wiring layer 436b are respectively in contact with and electrically connected to the source electrode layer 405a and the drain electrode layer 405b.

[0133] In this embodiment, as described above, the oxide semiconductor layer 403 is used as the semiconductor layer. As the oxide semiconductor used for the oxide semiconductor layer 403, oxides of quaternary metals such as In-Sn-Ga-Zn-O, oxides of ternary metals such as In-Ga-Zn-O, In-Sn-Zn-O, In-Al-Zn-O, Sn-Ga-Zn-O, Al-Ga-Zn-O, Sn-Al-Zn-O, oxides of binary metals such as In-Zn-O, Sn-Zn-O, Al-Zn-O, Zn-Mg-O, Sn-Mg-O, In-Mg-O, In-O, Sn-O, Zn-O, etc. can be used. Further, the oxide semiconductor may contain SiO2. Here, for example, the In-Ga-Zn-O-based oxide semiconductor is an oxide containing at least In, Ga, and Zn, and there is no particular limitation on its composition ratio. It may also contain elements other than In, Ga, and Zn. Further, a thin film represented by the chemical formula InMO3(ZnO)m (m>0) can be used for the oxide semiconductor layer 403. Here, M represents one or more metal elements selected from Ga, Al, Mn, and Co. For example, as M, there are Ga, Ga and Al, Ga and Mn, or Ga and Co, etc.

[0134] The transistors 410, 420, 430, and 440 using the oxide semiconductor layer 403 are in the off state.

[0135] The current value (off-current value) in the state can be lowered. Therefore, for image image data the holding time of electrical signals such as can be extended, and the writing interval can also be set longer. Therefore , since the frequency of the refresh operation can be reduced, the effect of suppressing power consumption is achieved .

[0136] In addition, transistors 410, 420, 430, and 440 using the oxide semiconductor layer 403 can obtain a relatively high field-effect mobility, so they can be driven at high speed. Therefore, by using the transistor in the pixel portion of the liquid crystal display device color separation can be suppressed, and a high-quality image can be provided. Further, since the transistor can be manufactured separately for the drive circuit portion or the pixel portion on the same substrate, the number of components of the liquid crystal display device can be reduced .

[0137] There is no major limitation on the substrate that can be used for the substrate 400 having an insulating surface, but a glass substrate such as barium borosilicate glass or aluminoborosilicate glass is used.

[0138] In the transistors 410, 420, 430 having a bottom gate structure, an insulating film serving as an underlying film may be provided between the substrate and the gate electrode layer. The underlying film has a function of preventing the diffusion of impurity elements from the substrate, and can be formed by a laminated structure of one or a plurality of films selected from a silicon nitride film, a silicon oxide film, a silicon oxynitride film, or a silicon nitride oxide film.

[0139] The material of the gate electrode layer 401 is a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, scandium, etc. or an alloy having these as a main component It can be formed using a metal material, either as a single layer or by lamination.

[0140] The gate insulating layer 402 can be formed using a plasma CVD method, sputtering method, or the like to form a silicon oxide layer, silicon nitride layer, silicon oxynitride layer, silicon nitride oxide layer, aluminum oxide layer, aluminum nitride layer, aluminum oxynitride layer, aluminum nitride oxide layer, or hafnium oxide layer, either as a single layer or by lamination. For example, a silicon nitride layer (SiNy (y>0)) with a film thickness of 50 nm or more and 200 nm or less is formed as the first gate insulating layer by the plasma CVD method, and a silicon oxide layer (SiOx (x>0)) with a film thickness of 5 nm or more and 300 nm or less is laminated as the second gate insulating layer on the first gate insulating layer to form a gate insulating layer with a total film thickness of 200 nm.

[0141] As the conductive film used for the source electrode layer 405a and the drain electrode layer 405b, for example, an element selected from Al, Cr, Cu, Ta, Ti, Mo, W, or an alloy film containing the above-described elements or an alloy film combining the above-described elements can be used. Also, a configuration in which a high melting point metal layer such as Ti, Mo, or W is laminated on one or both of the lower side and the upper side of a metal layer such as Al or Cu may be employed. Further, the heat resistance can be improved by using an Al material added with an element (such as Si, Nd, Sc) that prevents the generation of hillocks and whiskers in the Al film.

[0142] Conductive films such as the wiring layer 436a and the wiring layer 436b connected to the source electrode layer 405a and the drain electrode layer 405b can also use the same materials as the source electrode layer 405a and the drain electrode layer 405b.

[0143] In addition, the source electrode layer 405a, the drain electrode layer 405b (wiring formed in the same layer as this The conductive film (including the layer) may be formed of a conductive metal oxide. The oxides are indium oxide (In2O3), tin oxide (SnO2), zinc oxide (ZnO ), indium oxide tin oxide alloy (In2O3-SnO2, abbreviated as ITO), indium oxide Indium zinc oxide alloy (In2O3-ZnO) or these metal oxide materials with silicon oxide Containing kon can be used.

[0144] The insulating film 407 and the insulating layers 427 and 437 are typically made of a silicon oxide film or a silicon oxynitride film. An inorganic insulating film such as an aluminum oxide film or an aluminum oxynitride film is used. can be done.

[0145] The insulating film 409 may be a silicon nitride film, an aluminum nitride film, a silicon oxynitride film, or a silicon oxynitride film. An inorganic insulating film such as an aluminum film can be used.

[0146] In addition, a planarizing insulating film is formed on the insulating film 409 in order to reduce surface irregularities caused by the transistor. The planarizing insulating film may be made of polyimide, acrylic, benzocyclobutene, etc. In addition to the above organic materials, low-k materials can be used. In addition, a plurality of insulating films made of these materials can be laminated. A planarization insulating film may be formed by this.

[0147] In this manner, in this embodiment, by using a transistor including an oxide semiconductor layer, It is possible to provide a more highly functional liquid crystal display device.

[0148] (Embodiment 6) This embodiment will be described in detail with reference to FIG. 12 for an example of a transistor including an oxide semiconductor layer and a manufacturing method. The same parts or parts having similar functions and processes as those in the above embodiments can be carried out in the same manner as in the above embodiments, and repeated descriptions will be omitted. Also, detailed descriptions of the same locations will be omitted.

[0149] FIGS. 12(A) to 12(E) show an example of the cross-sectional structure of a transistor. The transistor 510 shown in FIGS. 12(A) to 12(E) is an inverted staggered thin film transistor having the same bottom gate structure as the transistor 410 shown in FIG. 11(A).

[0150] The oxide semiconductor used for the semiconductor layer in this embodiment is an i-type (intrinsic) oxide semiconductor or an oxide semiconductor that is extremely close to the i-type (intrinsic) by removing hydrogen, which is an n-type impurity, from the oxide semiconductor and purifying it so that impurities other than the main component of the oxide semiconductor are not contained as much as possible. That is, instead of adding impurities to make it i-type, impurities such as hydrogen and water are removed as much as possible, thereby purifying it to an i-type (intrinsic semiconductor) or approaching it. Therefore, the oxide semiconductor layer included in the transistor 510 is an oxide semiconductor layer that is purified and electrically i-type (intrinsic).

[0151] In addition, carriers are extremely few (close to zero) in the purified oxide semiconductor, and the carrier concentration is less than 1×1014 / cm3, preferably less than 1×1012 / cm3, and more preferably less than 1×1011 / cm3.

[0152] ​Since the number of carriers in the oxide semiconductor is extremely small, the off-current of the transistor 510 can be reduced. The smaller the off-current, the better.

[0153] Specifically, the thin-film transistor having the above-described oxide semiconductor layer has an off-current density of 10 aA / μm (1×10-17 A / μm) or less at room temperature for a channel width of 1 μm. It is further possible to make it 1 aA / μm (1×10-18 A / μm) or less, and further 10 zA / μm (1×10-20 A / μm) or less.

[0154] By using a transistor having an extremely small current value (off-current value) in the off state as the transistor in the pixel portion of Embodiment 1, the number of write operations for the refresh operation in the still image region can be reduced.

[0155]

[0156] In addition, the transistor 510 having the above-described oxide semiconductor layer has almost no temperature dependence of the on-current, and the off-current remains very small.

[0156] Hereinafter, the process of manufacturing the transistor 510 on the substrate 505 will be described with reference to FIGS. 12(A) to 12(E).

[0157] First, after forming a conductive film on the substrate 505 having an insulating surface, a gate electrode layer 511 is formed by a first photolithography process. Note that a resist mask may be formed by an inkjet method. When a resist mask is formed by an inkjet method, since a photomask is not used, the manufacturing cost can be reduced.

[0158]

[0158] As the substrate 505 having an insulating surface, a substrate similar to the substrate 400 shown in Embodiment 5 is used. This is possible. In this embodiment, a glass substrate is used as the substrate 505.

[0159] An insulating film serving as an underlayer film may be provided between the substrate 505 and the gate electrode layer 511. The underlayer film has a function of preventing the diffusion of impurity elements from the substrate 505, and may be formed by a laminated structure of one or more films selected from a silicon nitride film, a silicon oxide film, a silicon oxynitride film, or a silicon nitride oxide film.

[0160] In addition, the material of the gate electrode layer 511 can be formed as a single layer or by lamination using a metal material such as molybdenum, titanium, tantalum, tungsten, aluminum, copper, neodymium, scandium, or an alloy material mainly composed of these.

[0161] Next, a gate insulating layer 507 is formed on the gate electrode layer 511. The gate insulating layer 507 can be formed as a single layer or by lamination using a plasma CVD method, a sputtering method, or the like to form a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, a silicon nitride oxide layer, an aluminum oxide layer, an aluminum nitride layer, an aluminum oxynitride layer, a silicon nitride aluminum oxide layer, or a hafnium oxide layer.

[0162] In this embodiment, an impurity-removed, i-type or substantially i-type oxide semiconductor is used. Since such a highly purified oxide semiconductor is extremely sensitive to interface states and interface charges, the interface between the oxide semiconductor layer and the gate insulating layer is important. Therefore, the gate insulating layer in contact with the highly purified oxide semiconductor is required to have high quality.

[0163] For example, high-density plasma CVD using microwaves (e.g., frequency 2.45 GHz) is preferable because it can form a high-quality insulating layer that is dense and has a high breakdown voltage. By closely contacting a highly purified oxide semiconductor with a high-quality gate insulating layer, the interface states can be reduced and the interface characteristics can be made good for this reason.

[0164] Of course, if a high-quality insulating layer can be formed as the gate insulating layer, other film-forming methods such as sputtering method and plasma CVD method can be applied. Also, an insulating layer whose film quality and interface characteristics with the oxide semiconductor are modified by heat treatment after film formation is also good. In any case, it is needless to say that the film quality as the gate insulating layer is good, and as long as it can reduce the interface state density with the oxide semiconductor and form a good interface.

[0165] Also, in order to minimize the inclusion of hydrogen, hydroxyl groups, and moisture in the gate insulating layer 507 and the oxide semiconductor film 530, as a pretreatment for the formation of the oxide semiconductor film 530, the substrate 505 on which the gate electrode layer 511 is formed in the preheating chamber of the sputtering apparatus, or the substrate 505 on which up to the gate insulating layer 5 07 is formed is preheated to desorb and exhaust impurities such as hydrogen and moisture adsorbed on the substrate 505. Note that the exhaust means provided in the preheating chamber is preferably a cryo pump. Note that this preheating process can also be omitted. Also, this preheating can be similarly performed on the substrate 505 on which the source electrode layer 515a and the drain electrode layer 515b are formed up to before the formation of the insulating layer 516.

[0166] Next, on the gate insulating layer 507, with a film thickness of 2 nm or more and 200 nm or less, preferably 5 nm or more An oxide semiconductor film 530 having a thickness of 30 nm or less is formed (see FIG. 12A).

[0167] Note that before the oxide semiconductor film 530 is formed by a sputtering method, argon gas is introduced. The reverse sputtering is performed by introducing the metal into the gate insulating layer 507 to generate plasma. It is preferable to remove the powdery substances (also called particles or dust) that are stuck to the surface. In the experiment, no voltage was applied to the target side, and a voltage was applied to the substrate side using an RF power supply in an argon atmosphere. This method applies a voltage to generate plasma near the substrate to modify the surface. Instead of the atmosphere, nitrogen, helium, oxygen, etc. may be used.

[0168] The oxide semiconductor used for the oxide semiconductor film 530 is the oxide semiconductor of the quaternary metal described in Embodiment 5. oxides of ternary metals, oxides of binary metals, In-O, Sn-O, Zn- O-based oxide semiconductors can be used. In this embodiment, the oxide semiconductor film 530 is an In—Ga—Zn—O-based oxide. The film is formed by sputtering using a nitride target. The cross section at this stage is shown in Fig. 12. The oxide semiconductor film 530 is heated in a rare gas (typically, argon) atmosphere. The material is deposited by sputtering in a mixed atmosphere of rare gas and oxygen, or in a gas atmosphere of oxygen. It can be formed.

[0169] Examples of targets for forming the oxide semiconductor film 530 by a sputtering method include The composition ratio is In2O3:Ga2O3:ZnO=1:1:1 [molar ratio]. In addition, In2O3:Ga2O3:ZnO=1:1:2 [mol number ratio], or In2O3:Ga2O3:ZnO=1:1:4 [molar ratio] The filling rate of the oxide semiconductor film forming target is 90% or more and 10% or more. The filling rate is 0% or less, preferably 95% to 99.9%. By using the target, the formed oxide semiconductor film becomes a dense film.

[0170] The oxide semiconductor film 530 is formed using a sputtering gas of hydrogen, water, a hydroxyl group, or hydrogen. It is preferable to use a high-purity gas from which impurities such as oxides have been removed.

[0171] The substrate is held in a film-forming chamber maintained in a reduced pressure state, and the substrate temperature is preferably set to 100° C. or more and 600° C. or less. The temperature is preferably 200° C. or higher and 400° C. or lower. In addition, the concentration of impurities in the oxide semiconductor film can be reduced. Damage caused by etching is reduced. The removed sputtering gas is introduced, and an oxide semiconductor is deposited on the substrate 505 using the target. In order to remove the residual moisture in the deposition chamber, a suction type vacuum pump, e.g. For example, it is preferable to use a cryopump, an ion pump, or a titanium sublimation pump. The exhaust means is preferably a turbo pump with a cold trap. The deposition chamber evacuated using a cryopump may be filled with, for example, hydrogen atoms, water (H2O), Compounds containing hydrogen atoms (and more preferably compounds containing carbon atoms) are exhausted. Therefore, the impurity concentration in the oxide semiconductor film formed in the deposition chamber can be reduced.

[0172] As an example of the film formation conditions, the distance between the substrate and the target is 100 mm, and the pressure is 0.6 Pa. 、A DC (direct current) power source of 0.5 kW and conditions under an oxygen (oxygen flow rate ratio 100%) atmosphere are applied. Note that when using a pulsed DC power source, it is preferable because the powdery substances (referred to as particles, debris) generated during film formation can be reduced and the film thickness distribution becomes uniform.

[0173] Next, the oxide semiconductor film 530 is processed into island-shaped oxide semiconductor layers by a second photolithography process. Also, a resist mask for forming the island-shaped oxide semiconductor layer may be formed by an inkjet method. When the resist mask is formed by the inkjet method, since a photomask is not used, the manufacturing cost can be reduced.

[0174] Also, when forming a contact hole in the gate insulating layer 507, the process can be performed simultaneously during the processing of the oxide semiconductor film 530.

[0175] Note that the etching of the oxide semiconductor film 530 here may be dry etching, wet etching, or both may be used. For example, as the etching solution used for wet etching of the oxide semiconductor film 530, a solution obtained by mixing phosphoric acid, acetic acid, and nitric acid can be used. Also, ITO07N (manufactured by Kanto Chemical Co., Inc.) may be used.

[0176] Next, a first heat treatment is performed on the oxide semiconductor layer. By this first heat treatment, dehydration or dehydrogenation of the oxide semiconductor layer can be performed. The temperature of the first heat treatment is 400°C or higher and 750°C or lower, or 400°C or higher and less than the strain point of the substrate. Here, the substrate is introduced into an electric furnace, which is one of the heat treatment apparatuses, and after performing a heat treatment at 450°C for 1 hour in a nitrogen atmosphere on the oxide semiconductor layer, without exposing it to the atmosphere, water or water vapor to the oxide semiconductor layer ​ Prevent re - mixing of the raw materials and obtain the oxide semiconductor layer 531 (see Fig. 12(B)).

[0177] Note that the heat treatment apparatus is not limited to an electric furnace, and it may be equipped with an apparatus for heating the object to be treated by heat conduction or heat radiation from a heating element such as a resistance heating element. For example, it may be equipped with an RTA (Rapid Thermal An neal) apparatus such as a GRTA (Gas Rapid Thermal Anneal) apparatus or an LRTA (Lamp Rapid Thermal Anneal) apparatus. The LRTA apparatus is an apparatus that heats the object to be treated by the radiation of light (electromagnetic wave) emitted from a lamp such as a halogen lamp, a metal halide lamp, a xenon arc lamp, a carbon arc lamp, a high - pressure sodium lamp, or a high - pressure mercury lamp. The GRTA apparatus is an apparatus that performs heat treatment using a high - temperature gas. As the high - temperature gas, an inert gas such as argon or an inert gas that does not react with the object to be treated by heat treatment, such as nitrogen, is used.

[0178] For example, as the first heat treatment, the substrate is moved and placed into an inert gas heated to a high temperature of 650°C or higher and 700°C or lower, heated for several minutes, and then the substrate is moved and taken out from the inert gas heated to a high temperature, and GRTA may be performed.

[0179] Note that in the first heat treatment, it is preferable that nitrogen or a noble gas such as helium, neon, or argon does not contain water, hydrogen, etc. Or, the purity of nitrogen, or a noble gas such as helium, neon, or argon introduced into the heat treatment apparatus is 6N (99.9999%) or higher and preferably 7N (99.99999%) or higher (that is, the impurity concentration is 1 ppm or lower, preferably Or it is preferably 0.1 ppm or less.

[0180] Also, after heating the oxide semiconductor layer in the first heat treatment, high-purity oxygen gas, high-purity N2O gas, or ultra-dry air (dew point of -40°C or lower, preferably -60°C or lower) may be introduced into the same furnace. It is preferable that oxygen gas or N2O gas does not contain water, hydrogen, etc. Or the purity of the oxygen gas or N2O gas introduced into the heat treatment apparatus is 6N or higher, preferably 7N or higher (that is, the impurity concentration in the oxygen gas or N2O gas is 1 ppm or less, preferably 0.1 ppm or less). By the action of oxygen gas or N2O gas, the oxygen that has simultaneously decreased due to the step of removing impurities by dehydration or dehydrogenation treatment is supplied, thereby purifying the oxide semiconductor layer and making it electrically i-type (intrinsic).

[0181] Also, the first heat treatment of the oxide semiconductor layer can also be performed on the oxide semiconductor film 530 before processing it into an island-shaped oxide semiconductor layer. In that case, after the first heat treatment, the substrate is taken out from the heating apparatus and a photolithography process is performed.

[0182] In addition to the above, the first heat treatment can be performed after forming the source electrode layer and the drain electrode layer on the oxide semiconductor layer, or after forming an insulating layer on the source electrode layer and the drain electrode layer, as long as it is after the formation of the oxide semiconductor layer.

[0183] Also, when forming a contact hole in the gate insulating layer 507, the process may be performed before or after performing the first heat treatment on the oxide semiconductor film 530.

[0184] Also, by forming the oxide semiconductor layer in two steps and performing heat treatment in two steps, regardless of the material of the underlying member being an oxide, nitride, metal, or other material, an oxide semiconductor layer having a thick crystal region (single crystal region), that is, a crystal region with c-axis orientation perpendicular to the film surface, may be formed. For example, a first oxide semiconductor film with a thickness of 3 nm or more and 15 nm or less is formed, and in an atmosphere of nitrogen, oxygen, noble gas, or dry air, a first heat treatment is performed at 450°C or more and 850°C or less, preferably 550°C or more and 750°C or less, to form a first oxide semiconductor film having a crystal region (including plate-like crystals) in the region including the surface. Then, a second oxide semiconductor film thicker than the first oxide semiconductor film is formed, and a second heat treatment is performed at 450°C or more and 850°C or less, preferably 600°C or more and 70 0°C or less. Using the first oxide semiconductor film as a seed for crystal growth, crystal growth is performed upward to crystallize the entire second oxide semiconductor film, and as a result, an oxide semiconductor layer having a thick crystal region may be formed.

[0185] Next, a conductive film that will become the source electrode layer and the drain electrode layer (including wiring formed of the same layer) is formed on the gate insulating layer 507 and the oxide semiconductor layer 531. As the conductive film used for the source electrode layer and the drain electrode layer, the materials used for the source electrode layer 4 05a and the drain electrode layer 405b shown in Embodiment 5 can be applied.

[0186] A resist mask is formed on the conductive film by a third photolithography process, and after selectively etching to form the source electrode layer 515a and the drain electrode layer 515b, the resist mask is removed (see Fig. 12(C)).

[0187] For the exposure during resist mask formation in the third photolithography process, it is advisable to use ultraviolet light, KrF laser light, or ArF laser light. The channel length L of the transistor formed later is determined by the spacing width between the lower ends of the adjacent source electrode layers and the lower ends of the drain electrode layers on the oxide semiconductor layer 531. When performing exposure with a channel length L of less than 25 nm, it is advisable to perform the exposure during resist mask formation in the third photolithography process using extreme ultraviolet light with a wavelength as short as several nm or more and several tens of nm or less. Exposure with extreme ultraviolet light has high resolution and a large depth of focus. Therefore, it is possible to set the channel length L of the transistor formed later to be 10 nm or more and 1000 nm or less, which can increase the operating speed of the circuit. Furthermore, since the off-current value is extremely small, low power consumption can also be achieved. Also, in order to reduce the number of photomasks and the number of processes used in the photolithography process, the etching process may be performed using a resist mask formed by a multi-tone mask, which is an exposure mask in which the transmitted light has multiple intensities. The resist mask formed using the multi-tone mask has a shape with multiple film thicknesses, and the shape can be further deformed by performing etching. Therefore, it can be used in multiple etching processes for processing different patterns. Thus, with a single multi-tone mask, it is possible to form a resist mask corresponding to at least two or more different patterns. Therefore, the number of exposure masks can be reduced, and the corresponding photolithography process can also be reduced, enabling the simplification of the process.

[0188]

[0189] ​​​​​​​​​​​​​​​​Note that when the conductive film is etched, the oxide semiconductor layer 531 is etched and divided. It is desirable to optimize the etching conditions so that no defects are found. It is possible to obtain a condition in which the oxide semiconductor layer 531 is etched without being etched at all. Therefore, the oxide semiconductor layer 531 is only partially etched during etching of the conductive film. The oxide semiconductor layer may have a groove (a recess).

[0190] In this embodiment, a Ti film is used as the conductive film, and an In-Ga- Since a Zn-O-based oxide semiconductor was used, ammonia hydrogen peroxide (AH) was used as an etchant for the conductive film. A mixture of ammonia, water, and hydrogen peroxide is used.

[0191] Then, a plasma treatment is performed using a gas such as N2O, N2, or Ar to remove the exposed Water or the like adsorbed on the surface of the oxide semiconductor layer may be removed by the plasma treatment. In this case, the insulating layer 5, which is a protective insulating film that is in contact with a part of the oxide semiconductor layer without being exposed to the air, is formed. Form 16.

[0192] The insulating layer 516 has a thickness of at least 1 nm. The insulating layer 6 can be formed by using a method that does not allow impurities such as water and hydrogen to be mixed in. When hydrogen is contained in the insulating film 516, the hydrogen penetrates into the oxide semiconductor layer or the hydrogen is absorbed in the oxide semiconductor layer. The oxygen in the oxide semiconductor layer is extracted, and the back channel of the oxide semiconductor layer becomes low-resistance (n-type). Therefore, the insulating layer 516 should be as thin as possible. It is important that the deposition process does not use hydrogen, resulting in a hydrogen-free film.

[0193] In this embodiment, a silicon oxide film with a thickness of 200 nm is formed as the insulating layer 516 by sputtering. The substrate temperature during film formation may be room temperature or higher and 300 °C or lower, and is set to 100 °C in this embodiment. The film formation of the silicon oxide film by sputtering can be carried out in an atmosphere of a noble gas (typically argon), an oxygen atmosphere, or a mixed atmosphere of a noble gas and oxygen. Also, a silicon oxide target or a silicon target can be used as the target. For example, silicon oxide can be formed by sputtering in an atmosphere containing oxygen using a silicon target. The insulating layer 516 formed in contact with the oxide semiconductor layer is an inorganic insulating film that does not contain impurities such as moisture, hydrogen ions, and OH−, and blocks these from entering from the outside. Typically, a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, or an aluminum oxynitride film can be used. Similar to the film formation of the oxide semiconductor film 530, in order to remove the residual moisture in the film formation chamber of the insulating layer 516, it is preferable to use an adsorption type vacuum pump (such as a cryopump). The concentration of impurities contained in the insulating layer 516 formed in the film formation chamber evacuated using a cryopump can be reduced. Also, as an exhaust means for removing the residual moisture in the film formation chamber of the insulating layer 516, a turbo pump with a cold trap added thereto may be used. It is preferable to use a high-purity gas from which impurities such as hydrogen, water, hydroxyl groups, or hydrides have been removed as the sputtering gas used when forming the insulating layer 516. (Typically argon) atmosphere, an oxygen atmosphere, or a mixed atmosphere of a noble gas and oxygen. Also, a silicon oxide target or a silicon target can be used as the target. For example, silicon oxide can be formed by sputtering in an atmosphere containing oxygen using a silicon target. The insulating layer 516 formed in contact with the oxide semiconductor layer is an inorganic insulating film that does not contain impurities such as moisture, hydrogen ions, and OH−, and blocks these from entering from the outside. Typically, a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, or an aluminum oxynitride film can be used. Similar to the film formation of the oxide semiconductor film 530, in order to remove the residual moisture in the film formation chamber of the insulating layer 516, it is preferable to use an adsorption type vacuum pump (such as a cryopump). The concentration of impurities contained in the insulating layer 516 formed in the film formation chamber evacuated using a cryopump can be reduced. Also, as an exhaust means for removing the residual moisture in the film formation chamber of the insulating layer 516, a turbo pump with a cold trap added thereto may be used.

[0194] Similar to the film formation of the oxide semiconductor film 530, in order to remove the residual moisture in the film formation chamber of the insulating layer 516, it is preferable to use an adsorption type vacuum pump (such as a cryopump). The concentration of impurities contained in the insulating layer 516 formed in the film formation chamber evacuated using a cryopump can be reduced. Also, as an exhaust means for removing the residual moisture in the film formation chamber of the insulating layer 516, a turbo pump with a cold trap added thereto may be used. Also, as an exhaust means for removing the residual moisture in the film formation chamber of the insulating layer 516, a turbo pump with a cold trap added thereto may be used. Also, as an exhaust means for removing the residual moisture in the film formation chamber of the insulating layer 516, a turbo pump with a cold trap added thereto may be used.

[0195] It is preferable to use a high-purity gas from which impurities such as hydrogen, water, hydroxyl groups, or hydrides have been removed as the sputtering gas used when forming the insulating layer 516. It is preferable to use a high-purity gas from which impurities such as hydrogen, water, hydroxyl groups, or hydrides have been removed as the sputtering gas used when forming the insulating layer 516.

[0196] Next, a second heat treatment (preferably at 2 00°C or higher and 400°C or lower, for example, 250°C or higher and 350°C or lower) is performed in an inert gas atmosphere or an oxygen gas atmosphere. For example, a second heat treatment at 250°C for 1 hour is performed in a nitrogen atmosphere. When the second heat treatment is performed, a part of the oxide semiconductor layer (channel formation region) is heated in contact with the insulating layer 516. By going through the above steps, a first heat treatment is performed on the oxide semiconductor film to intentionally remove impurities such as hydrogen, moisture, hydroxyl groups, or hydrides (also referred to as hydrogen compounds) from the oxide semiconductor layer, and at the same time, oxygen that would otherwise decrease due to the impurity removal process can be supplied. Therefore, the oxide semiconductor layer becomes highly purified and electrically i-type (intrinsic).

[0197] The transistor 510 is formed through the above steps (see FIG. 12(D)). Furthermore, when using a silicon oxide layer that contains many defects in the oxide insulating layer, heat treatment after the formation of the silicon oxide layer causes impurities such as hydrogen, moisture, hydroxyl groups, or hydrides contained in the oxide semiconductor layer to diffuse into the oxide insulating layer, resulting in the effect of further reducing the impurities contained in the oxide semiconductor layer. An additional protective insulating layer 506 may be formed on the insulating layer 516. For example, a silicon nitride film is formed using the RF sputtering method. The RF sputtering method is preferable as a film formation method for the protective insulating layer because of its good mass productivity. The protective insulating layer 506 does not contain impurities such as moisture and uses an inorganic insulating film that blocks these from entering from the outside, and a silicon nitride film, aluminum nitride film, etc. can be used. In this embodiment, the protective insulating layer 506 is formed using a silicon nitride film.

[0198] formed using a silicon nitride film.

[0199] Also, if a silicon oxide layer containing many defects is used for the oxide insulating layer, heat treatment after the formation of the silicon oxide layer causes impurities such as hydrogen, moisture, hydroxyl groups, or hydrides contained in the oxide semiconductor layer to diffuse into the oxide insulating layer, resulting in the effect of further reducing the impurities contained in the oxide semiconductor layer. formed using a silicon nitride film. formed using a silicon nitride film. formed using a silicon nitride film.

[0200] A further protective insulating layer 506 may be formed on the insulating layer 516. For example, a silicon nitride film is formed using the RF sputtering method. Since the RF sputtering method has good mass productivity, it is preferable as a film formation method for the protective insulating layer. The protective insulating layer 506 does not contain impurities such as moisture and uses an inorganic insulating film that blocks these from entering from the outside, and a silicon nitride film, aluminum nitride film, etc. can be used. In this embodiment, the protective insulating layer 506 is formed using a silicon nitride film. formed using a silicon nitride film. formed using a silicon nitride film. formed using a silicon nitride film. It is formed using a silicon nitride film (see Fig. 12(E)).

[0201] In this embodiment, as the protective insulating layer 506, the substrate 505 formed up to the insulating layer 516 is heated to a temperature of 100°C or higher and 400°C or lower, and high-purity nitrogen containing hydrogen and moisture removed is introduced as a sputtering gas, and a silicon nitride film is formed using a silicon semiconductor target . Also in this case, similar to the insulating layer 516, it is preferable to form the protective insulating layer 506 while removing residual moisture in the processing chamber.

[0202] After forming the protective insulating layer 506, heat treatment may be further performed in an air atmosphere at 100°C or higher and 200°C or lower for 1 hour or more and 30 hours or less. This heat treatment may be performed while maintaining a constant heating temperature or may be performed by repeating multiple times the temperature increase from room temperature to a heating temperature of 100°C or higher and 200°C or lower and the temperature decrease from the heating temperature to room temperature.

[0203] Thus, by using the transistor including the highly purified oxide semiconductor layer manufactured using this embodiment, the current value in the off state (off-current value) can be made lower. Therefore, the holding time of an electric signal such as image data can be lengthened, and the writing interval can also be set longer. Therefore, the frequency of the refresh operation can be made lower , and thus the power consumption can be reduced.

[0204] In addition, since a high field-effect mobility can be obtained for the transistor including the highly purified oxide semiconductor layer, high-speed driving is possible. Therefore, by using the transistor in the pixel portion of a liquid crystal display device , a high-quality image can be provided. Also, the transistor is on the same substrate ​​​​ Since it can be separately fabricated on either the drive circuit section or the pixel section, the components of the liquid crystal display device can be reduced in number.

[0205] This embodiment can be implemented in appropriate combination with other embodiments.

[0206] (Embodiment 7) In this embodiment, a pixel configuration for improving the amount of reflected light and the amount of transmitted light per pixel of a transflective liquid crystal display device will be described with reference to FIGS. 14, 15, and 16. FIG. 14 is a diagram for explaining the planar configuration of the pixel shown in this embodiment. FIG. 15 shows the cross-sectional configurations of the S1-S2 section, T1-T2 section, and U1-U2 section indicated by the dashed line in FIG. 14.

[0207] The pixel described in this embodiment has a transparent electrode 823 and a reflective electrode 825 laminated on a substrate 800 with an insulating layer 824 interposed therebetween as pixel electrodes. The transparent electrode 823 is connected to the drain electrode 857 of the transistor 851 through a contact hole 855 provided in the insulating film 827, insulating film 828, and organic resin film 822. The drain electrode 857 overlaps the capacitance wiring 853 via a gate insulating layer to form a holding capacitance 871 (see FIG. 15(A)).

[0208]

[0209]

[0210] Also, the gate electrode 858 of the transistor 851 is connected to the wiring 852, and the source electrode 856 is connected to the wiring 854. The transistor 851 can use the transistors described in other embodiments (see FIG. 14).

[0210] ​​The reflective electrode 825 is connected to the drain electrode 867 of the transistor 861 through the contact hole 865 provided in the insulating film 827, the insulating film 828, and the organic resin film 822 (see Fig. 15(E)). The drain electrode 867 overlaps with the capacitor wiring 863 through the gate insulating layer to form the holding capacitor 872. The gate electrode 868 of the transistor 861 is connected to the wiring 862, and the source electrode 866 is connected to the wiring 864. The transistor 861 can use the transistors described in other embodiments (see Fig. 14).

[0211]

[0212] By reflecting external light with the reflective electrode 825, the pixel electrode can function as the pixel electrode of a reflective liquid crystal display device. A plurality of openings 826 are provided in the reflective electrode 825. There is no reflective electrode 825 in the opening 826, and the structure 820 and the transparent electrode 823 protrude (see Fig. 15(B)). By allowing the light of the backlight to pass through the opening 826, the pixel electrode can function as the pixel electrode of a transmissive liquid crystal display device.

[0213] In the transflective liquid crystal display device shown in this embodiment, the reflective electrode 825 and the transparent electrode 823 are electrically separated by the insulating layer 824. Also, since the potential applied to the transparent electrode 823 can be controlled by the transistor 851 and the potential applied to the reflective electrode 825 can be controlled by the transistor 861, the potentials of the reflective electrode 825 and the transparent electrode 823 can be independently controlled. Therefore, when the transflective liquid crystal display device functions as a transmissive type, the liquid crystal display on the reflective electrode 825 can be made to be a black display.

[0214] ​​​​​​​​​​​​​​ FIG. 16 is a cross-sectional view showing an example different from FIG. 15(B), and at the opening 826 , there is an embodiment of the present invention having a structure in which the structure 820 and the transparent electrode 823 do not protrude. In FIG. 15(B), the backlight emission light port 841 and the opening 826 are substantially the same size , whereas in FIG. 16, the size of the backlight emission light port 841 and the size of the opening 826 are different, and the distances from the backlight incident light port 842 are also different. Therefore, compared with FIG. 16 , FIG. 15(B) can increase the amount of transmitted light, and it can be said that it has a preferable cross-sectional shape.

[0215] A structure 820 is formed in the opening 826 so as to overlap the opening 826. FIG. 15(B ) is a cross-sectional view of the T1-T2 portion in FIG. 14, showing the configuration of the pixel electrode and the structure 820. FIG. 15(C) is an enlarged view of the portion 880, and FIG. 15(D) is an enlarged view of the portion 881.

[0216] The reflected light 832 indicates external light reflected by the reflective electrode 825. The organic resin film 822 has a concavo-convex curved surface on the upper surface. By reflecting the concavo-convex curved surface on the reflective electrode 825 , the area of the reflection region is increased, and the reflection of light other than the display image is reduced, so the visibility of the display image can be improved. From the most bent point of the reflective electrode 82 5 having a curved surface in the cross-sectional shape, the angle θR formed by the two opposing inclined surfaces is 90° or more, preferably 100° or more and 120° or less (see FIG. 15(D)).

[0217] The structure 820 has a backlight emission light port 841 on the opening 826 side, and the backlight ( ​​The backlight entrance port 842 is provided on the side of the structure 820 (not shown). , which is located above the surface of the reflective electrode 825 and protrudes from the upper end of the reflective electrode. That is, the distance H between the upper end of the structure 820 and the upper end of the reflective electrode is 0.1 μm or more and 3 μm or less. The area of the backlight exit port 841 is preferably 0.3 μm or more and 2 μm or less. The area of the backlight entrance 842 is made larger than that of the structure 820. The surfaces (surfaces other than the backlight exit port 841 and the backlight entrance port 842) are provided with a reflective layer. The structure 820 is made of silicon oxide, silicon nitride, silicon oxynitride, etc. The reflective layer 821 can be made of a material having a light-transmitting property, such as aluminum. Materials with high light reflectance, such as aluminum (Al) or silver (Ag), can be used.

[0218] Transmitted light 831 emitted from the backlight passes through the backlight incident light port 842 and enters the structure. A part of the incident transmitted light 831 passes directly through the backlight exit port 84 1, but a part of it is reflected by the reflective layer 821 toward the backlight exit port 841. The light is reflected and partly reflected back towards the backlight entrance port 842 .

[0219] At this time, light passes through the backlight exit port 841 and the backlight entrance port 842 of the structure 820. When the cross-sectional shape of the structure 820 is viewed, the opposing side surfaces on the left and right are inclined. The angle θT between the side surfaces is less than 90°, preferably between 10° and 60°. The transmitted light 831 incident from the backlight incident light port 842 is efficiently emitted to the backlight. It can be guided to the light port 841 (see FIG. 15(C)).

[0220] For example, in one pixel, assuming the area of the pixel electrode is 100%, and the electrode area functioning as a reflective electrode is SR, and the electrode area functioning as a transmissive electrode (the area of the opening 826) is ST. In this case, in a conventional transflective liquid crystal display device, the total area of the electrode area SR functioning as a reflective electrode and the electrode area ST functioning as a transmissive electrode corresponds to 100% of the area of the pixel electrode. In the transflective liquid crystal display device having the pixel configuration shown in this embodiment, since the electrode area ST functioning as a transmissive electrode corresponds to the area of the backlight incident light port 842, the area ST of the opening 826 can be increased. Also, since the electrode area ST functioning as a transmissive electrode corresponds to the area of the backlight incident light port 842, the amount of transmitted light can be improved without increasing

[0221] the brightness of the backlight. As a result, the total area of the electrode area SR functioning as a reflective electrode and the electrode area ST functioning as a transmissive

[0222] (Embodiment 8) In this embodiment, an example of an electronic device including the liquid crystal display device described in the above embodiment will be described.

[0223] FIG. 13(A) shows an electronic book (also referred to as an E-book), which can have a housing 9630, a display unit 9631, operation keys 9632, a solar cell 9633, and a charge / discharge control circuit 9634. The electronic book shown in FIG. 13(A) can display various A function to display, a function to display a calendar, date, time, etc. on a display unit, and operate or edit the information displayed on the display unit. It can also have functions such as controlling processing by various software (programs). Note that in Fig. 13(A), as an example of the charge and discharge control circuit 9634, a configuration having a battery 9635 and a DCDC converter (hereinafter abbreviated as converter 9636) is shown. When configured as shown in Fig. 13(A), when using a transflective liquid crystal display device as the display unit 9631, use under relatively bright conditions is also expected, and power generation by the solar cell 9633 and charging of the battery 9635 can be efficiently performed, which is preferable. The solar cell 9633 is preferably configured to efficiently charge the battery 9635 on the front and back surfaces of the housing 9630. As the battery 9635, using a lithium-ion battery has advantages such as enabling miniaturization. Next, an example of the operation when power is generated by the solar cell 9633 due to external light will be described. The power generated by the solar cell becomes a voltage for charging the battery 9635, and is converted by the converter 9636. The voltage converted by the converter 9636 is supplied to the battery 9635 through the switch SW1. When the voltage of the battery 9635 is lower than a certain value, the switch SW1 is turned on, and the converted voltage is used to charge the battery 9635. When the voltage of the battery 9635 reaches a certain value, the switch SW1 is turned off. At this time, the battery 9635 supplies power to the display unit 9631 through the converter 9637 and the switch SW2.

[0224] The power supplied from the battery 9635 to the display unit 9631 is converted by the converter 9637 to a voltage suitable for driving the display unit 9631 and is supplied to the display unit 9631 through the switch SW2. When the power supply from the battery 9635 is insufficient, the switch SW3 is turned on, and the battery 9635 supplies power to the converter 9636 through the switch SW3. The converter 9636 converts the voltage of the battery 9635 into a voltage for charging the battery 9635 and charges the battery 9635. The configuration and operation of the charge and discharge control circuit 9634 shown in Fig. 13(A) will be illustrated and explained with a block diagram in Fig. 13(B). Fig. 13(B) shows the solar cell 9633, battery 9635, converter 9636, converter 9637, switches SW1 to SW3, and display unit 9631. The battery 9635, converter 9636, converter 9637, and switches SW1 to SW3 correspond to the charge and discharge control circuit 9634. First, an example of the operation when power is generated by the solar cell 9633 due to external light will be described. The power generated by the solar cell becomes a voltage for charging the battery 9635, and is converted by the converter 9636.

[0225] The voltage converted by the converter 9636 is supplied to the battery 9635 through the switch SW1. When the voltage of the battery 9635 is lower than a certain value, the switch SW1 is turned on, and the converted voltage is used to charge the battery 9635. When the voltage of the battery 9635 reaches a certain value, the switch SW1 is turned off. At this time, the battery 9635 supplies power to the display unit 9631 through the converter 9637 and the switch SW2. The power supplied from the battery 9635 to the display unit 9631 is converted by the converter 9637 to a voltage suitable for driving the display unit 9631 and is supplied to the display unit 9631 through the switch SW2.

[0226] First, an example of the operation when power is generated by the solar cell 9633 due to external light will be described. The power generated by the solar cell becomes a voltage for charging the battery 9635, and is converted by the converter 9636. It is stepped up or down by the converter 9636. When the power from the solar cell 9633 is used for the operation of the display unit 9631, the switch SW1 is turned on, and the converter 9637 steps up or down the voltage to the voltage required for the display unit 9631. When the display unit 9631 is not displaying, SW1 may be turned off and SW2 may be turned on to charge the battery 9635 .

[0227] Next, an example of the operation when power generation is not performed by the solar cell 9633 due to external light will be described . The power stored in the battery 9635 is stepped up or down by the converter 9637 by turning on the switch SW3. Then, the power from the battery 9635 is used for the operation of the display unit 9631 .

[0228] Although the solar cell 9633 has been shown as an example of the charging means, a configuration in which the battery 9635 is charged by other means may be used. Also, a configuration in which other charging means are combined may be used

[0229] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments .

Explanation of Signs

[0230] 100 Liquid crystal display device 101 Image signal source 102 A / D conversion circuit 110 Image processing circuit 111 Memory circuit 112 Comparison circuit 113 Display control circuit 114 Field sequential signal generation circuit 115 Selection circuit 120 Display panel​ 121 Drive circuit 122 Pixel section 123 Pixel section 123a Sub-pixel 123b Sub-pixel 125a Polarizing plate 125b Polarizing plate 126 FPC 130 Backlight section 131 Backlight control circuit 132 Backlight 133 Light-emitting element 133R LED 133G LED 133B LED 134 Diffusion plate 135 Light 139 External light 140 Analog image signal 141 Digital image signal 142 LC image signal 143 Backlight signal 151 Pixel section 152 First scanning line 153 First signal line 154 Second scanning line 155 Second signal line 156 Pixel 157 First scanning line drive circuit 158 First signal line drive circuit 159 Second scanning line drive circuit 160 Second signal line drive circuit 161 Transparent electrode section 162 Reflective electrode section 163 Pixel transistor 164 Liquid crystal element 165 Capacitive element 166 Pixel transistor 167 Liquid crystal element 168 Capacitive element 169 Common electrode 170 Capacitor line 190 Liquid crystal display module 301 Video display period 302 Still image display period 303 Still image writing period 304 Still image holding period 311 Light-emitting element 400 Substrate 401 Gate electrode layer 402 Gate insulating layer 403 Oxide semiconductor layer 405a Source electrode layer 405b Drain electrode layer 407 Insulating film 409 Insulating film 410 Transistor 413 Interlayer film 420 Transistor 427 Insulating layer 430 Transistor 436a Wiring layer 436b Wiring layer 437 Insulating layer 440 Transistor 441 Substrate 442 Substrate 444 Liquid crystal layer 448 Common electrode layer 460a Alignment film 460b Alignment film 480 Insulating layer 482 Insulating layer 498 Reflective region 499 Transmissive region 505 Substrate 506 Protective insulating layer 507 Gate insulating layer 510 Transistor 511 Gate electrode layer 515a Source electrode layer 515b Drain electrode layer 516 Insulating layer 530 Oxide semiconductor film 531 Oxide semiconductor layer 550 Transistor 551 Gate electrode layer 553 Semiconductor layer 555a Source electrode layer or drain electrode layer 555b Source electrode layer or drain electrode layer 558 Capacitance wiring layer 560 Transistor 563 Semiconductor layer 565a Source electrode layer or drain electrode layer 565b Source electrode layer or drain electrode layer 571 Insulating film 576 Transparent electrode layer 577 Reflective electrode layer 579 Conductive layer 580 Wiring layer 800 Substrate 820 Structure 821 Reflective layer 822 Organic resin film 823 Transparent electrode 824 Insulating layer 825 Reflective electrode 826 Opening 827 Insulating film 828 Insulating film 831 Transmitted light 832 Reflected light 841 Backlight emission light port 842 Backlight incident light port 851 Transistor 852 Wiring 853 Capacitance wiring 854 Wiring 855 Contact hole 856 Source electrode 857 Drain electrode 858 Gate electrode 861 Transistor 862 Wiring 863 Capacitance wiring 864 Wiring 865 Contact hole 866 Source electrode 867 Drain electrode 868 Gate electrode 871 Holding capacitance 872 Holding capacitance 880 Site 881 Site 9630 Housing 9631 Display unit 9632 Operation key 9633 Solar cell 9634 Charge / discharge control circuit 9635 Battery 9636 Converter 9637 Converter

Claims

1. A liquid crystal display device having a backlight and a display panel, wherein the display panel has a first pixel electrode, a second pixel electrode, and a structure, wherein the first pixel electrode has a function of transmitting light, wherein the second pixel electrode has a function of reflecting light, wherein the first pixel electrode and the second pixel electrode have an overlapping region via an insulating layer, wherein the first pixel electrode has a region located on the structure, wherein the insulating layer has a region located on the first pixel electrode, wherein the second pixel electrode has a region located on the insulating layer, wherein the second pixel electrode has a plurality of openings, wherein one of the plurality of openings has a region overlapping with the structure, wherein in one of the plurality of openings, the structure has a region protruding beyond the upper surface of the second pixel electrode, wherein the backlight is disposed below the first pixel electrode.

2. A liquid crystal display device having a backlight and a display panel, wherein the display panel has a first pixel electrode, a second pixel electrode, a structure, and a transistor, wherein the first pixel electrode has a function of transmitting light, wherein the second pixel electrode has a function of reflecting light, wherein the first pixel electrode and the second pixel electrode have an overlapping region via an insulating layer, wherein the first pixel electrode has a region located on the structure, wherein the insulating layer has a region located on the first pixel electrode, wherein the second pixel electrode has a region located on the insulating layer, wherein the second pixel electrode has a plurality of openings, wherein one of the plurality of openings has a region overlapping with the structure, wherein in one of the plurality of openings, the structure has a region protruding beyond the upper surface of the second pixel electrode, wherein the backlight is disposed below the first pixel electrode, wherein the second pixel electrode is electrically connected to one of the source or drain of the transistor, wherein the transistor has an oxide semiconductor in a channel formation region, wherein the oxide semiconductor is In - O.

Citation Information

Patent Citations

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