Liquid jet head and liquid jet recording apparatus

Abstract

To provide a liquid jet head which enables improvement of reliability, and to provide a liquid jet recording apparatus.SOLUTION: A liquid jet head according to an embodiment of the present disclosure includes: a jet section including one or multiple nozzles configured to jet a liquid; and one or multiple drive circuit units configured to generate a drive signal for jetting the liquid from the nozzles based on input data supplied from an external head control unit and output the drive signal to the jet section. The drive circuit unit includes: a signal generation unit configured to generate the drive signal based on the input data; a detection unit configured to detect presence or absence of an occurrence of an abnormal state related to generation of the drive signal; and a storage unit configured to store information representing the abnormal state when the occurrence of the abnormal state is detected by the detection unit.SELECTED DRAWING: Figure 2

Description

Technical Field

[0001] The present disclosure relates to a liquid ejection head and a liquid ejection recording apparatus.

Background Art

[0002] Liquid ejection recording apparatuses equipped with liquid ejection heads are used in various fields, and various types of liquid ejection heads have been developed. Further, for example, Patent Document 1 proposes a data transfer method in a liquid ejection head.

Prior Art Documents

Patent Documents

[0003]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0004] In such a liquid ejection head, generally, improvement in reliability is required. It is desirable to provide a liquid ejection head and a liquid ejection recording apparatus capable of improving reliability.

Means for Solving the Problems

[0005] A liquid ejection head according to an embodiment of the present disclosure includes an ejection unit having one or more nozzles for ejecting a liquid, and one or more drive circuit units that generate a drive signal for ejecting the liquid from the nozzles based on input data supplied from an external head control unit and output the drive signal to the ejection unit. The drive circuit unit includes a signal generation unit that generates a drive signal based on the input data, a detection unit that detects the presence or absence of an abnormal state related to the generation of the drive signal, and a storage unit that stores information indicating the abnormal state when the detection unit detects the occurrence of the abnormal state.

[0006] A liquid jet recording apparatus according to an embodiment of the present disclosure includes the liquid jet head according to the embodiment of the present disclosure and the head control unit.

Advantages of the Invention

[0007] According to the liquid jet head and the liquid jet recording apparatus according to an embodiment of the present disclosure, it is possible to improve reliability.

Brief Description of the Drawings

[0008]

Figure 1

Figure 2

Figure 3

Figure 4

Figure 5

Figure 6

Figure 7

Figure 8

Figure 9

Embodiments for Carrying Out the Invention

[0009] Hereinafter, embodiments of the present disclosure will be described in detail with reference to the drawings. The description will be made in the following order. 1. Embodiment (Example of data transfer using a single serial data signal) 2. Modification (Examples of other data transfers, etc.)

[0010] <1. Embodiment> [Configuration of Printer 3] FIG. 1 shows a schematic configuration example of a printer 3 as a liquid jet recording apparatus according to an embodiment of the present disclosure in a block diagram. Further, FIG. 2 shows a configuration example of each drive circuit unit (drive circuit units 12a, 12b, 12c described later) in the inkjet head 1 as the liquid jet head shown in FIG. 1 in a block diagram. In these FIGS. 1 and 2, “ / N” (N: an integer of 2 or more) shown on the signal wiring indicates the number of wirings. Also, in each drawing used in the description of this specification, the scale of each member is appropriately changed in order to make each member recognizable in size.

[0011] Printer 3 is an inkjet printer that performs recording (printing) of images, characters, etc. on a recording medium (for example, recording paper) using ink 9 described later. As shown in FIG. 1, this printer 3 includes an inkjet head 1 and a head control unit 2.

[0012] Note that the inkjet head corresponds to a specific example of the “liquid jet head” in the present disclosure, and the printer 3 corresponds to a specific example of the “liquid jet recording apparatus” in the present disclosure. Also, the ink 9 corresponds to a specific example of the “liquid” in the present disclosure.

[0013] (A. Head Control Unit 2) The head control unit 2 supplies various types of information (data) to the inkjet head 1. Specifically, as shown in FIG. 1, the head control unit 2 supplies a single serial data signal Ds and a single clock signal CLK to a drive circuit unit 12a (the frontmost drive circuit unit) described later in the inkjet head 1, respectively.

[0014] Here, these serial data signals Ds and clock signal CLK are each transmitted, for example, by LVDS (Low Voltage Differential Signaling). This enables high-speed transmission with small-amplitude signals and improves the ability to remove common-mode noise by using differential signals. Also, as shown in FIG. 1, the serial data signal Ds and the clock signal CLK are each transmitted on a single signal line. Further, the serial data signal Ds is synchronized with the clock signal CLK and includes serial data for 7 bits within one clock period (the period of one cycle T described later). However, it is not limited to 7 bits and may be serial data of a plurality of bits other than 7 bits.

[0015] Also, in the present embodiment, in the serial data signal Ds, although details will be described later (see FIG. 3), other signals are multiplexed together with an m-bit (m: an integer of 2 or more, 4 bits in this example) serial pixel data signal PDs. Specifically, in this example, the serial data signal Ds is configured to include a 4-bit serial pixel data signal PDs, a latch signal LATCH, a firing signal (ejection start signal) FIRE, and a strobe signal STB (STROBE), which will be described later. Also, in the present embodiment, such a single serial data signal Ds includes serial pixel data signals PDs individually defined for all of a plurality of nozzles in the inkjet head 1 described later.

[0016] Note that the above-described serial data signal Ds and clock signal CLK each correspond to a specific example of "input data" in the present disclosure.

[0017] (B. Inkjet head 1) The inkjet head 1 is a head that ejects (discharges) droplet-shaped ink 9 onto a recording medium from a plurality of nozzles, which will be described later, as indicated by the dashed arrows in FIGS. 1 and 2, to perform recording of images, characters, and the like. As shown in FIG. 1, this inkjet head 1 includes an ejection unit 11 and a plurality of drive circuit units (in this example, three drive circuit units 12a, 12b, and 12c). Incidentally, ink 9 is supplied into such an inkjet head 1 from an ink tank (not shown) via a supply tube or the like.

[0018] (B-1. Ejection Unit 11) As shown in FIG. 1, the ejection unit 11 is configured to include a plurality (three in this example) of ejection units 11a, 11b, and 11c. The ejection units 11a, 11b, and 11c are respectively arranged so as to individually correspond to the above-described drive circuit units 12a, 12b, and 12c. Each of these ejection units 11a, 11b, and 11c has the above-described plurality of nozzles, and ejects ink 9 from these nozzles according to a drive signal Sd (drive voltage Vd) individually supplied from the drive circuit units 12a, 12b, and 12c.

[0019] Each of such ejection units 11a, 11b, and 11c is configured to include, for example, as shown in FIG. 2, a piezoelectric actuator (actuator plate) 111 and a nozzle plate 112.

[0020] The nozzle plate 112 is a plate made of a film material such as polyimide or a metal material, and has the above-described plurality of nozzles (five nozzle holes Hn1 to Hn5 in this example: hereinafter, collectively referred to as nozzle holes Hn as appropriate) as shown in FIG. 2. These nozzle holes Hn1 to Hn5 are formed, for example, in a straight line (in one row) at a predetermined interval and are, for example, circular in shape.

[0021] Incidentally, each of these nozzle holes Hn1 to Hn5 (a plurality of nozzle holes Hn) corresponds to a specific example of the "nozzle" in the present disclosure.

[0022] The piezoelectric actuator 111 is a plate made of a piezoelectric material such as PZT (lead zirconate titanate). A plurality of channels (pressure chambers), not shown, are provided in the piezoelectric actuator 111. These channels are portions for applying pressure to the ink 9, and are arranged side by side at a predetermined interval so as to be parallel to each other. Each channel is defined by a drive wall (not shown) made of a piezoelectric body, and has a concave groove portion in a cross-sectional view.

[0023] In such channels, there are a discharge channel for discharging the ink 9 and a dummy channel (non-discharge channel) for not discharging the ink 9. In other words, while the discharge channel is filled with the ink 9, the dummy channel is not filled with the ink 9. The ink 9 is supplied into the discharge channel through the supply tube and a predetermined flow path described above. Each discharge channel communicates with the nozzle hole Hn in the nozzle plate 112 described above, while each dummy channel does not communicate with the nozzle hole Hn. These discharge channels and dummy channels are arranged side by side alternately.

[0024] Drive electrodes (not shown) are provided on the opposing inner surfaces of the drive wall described above. On this drive electrode, there are a common electrode (shared electrode) provided on the inner surface facing the discharge channel and an active electrode (individual electrode) provided on the inner surface facing the dummy channel. Between these drive electrodes and the drive circuit units 12a, 12b, 12c described later, they are electrically connected via a plurality of lead electrodes (not shown) formed on a flexible substrate (not shown). Thereby, the drive voltage Vd (drive signal Sd) described above is applied to each drive electrode from the drive circuit units 12a, 12b, 12c via this flexible substrate (see FIGS. 1 and 2).

[0025] (B-2. Drive Circuit Units 12a, 12b, 12c) As shown in FIG. 1, the drive circuit units 12a, 12b, and 12c are circuits that supply drive signals Sd (drive voltages Vd) for ejecting ink 9 from the respective nozzle holes Hn to the corresponding ejection units 11a, 11b, and 11c. Specifically, the drive circuit units 12a, 12b, and 12c each generate a drive signal Sd based on the serial data signal Ds and the clock signal CLK supplied from the head control unit 2 described above, and output this drive signal Sd individually to the corresponding ejection units 11a, 11b, and 11c.

[0026] Also, as shown in FIG. 1, these plurality of drive circuit units 12a, 12b, and 12c are connected in series in multiple stages (cascade connection) to each other inside the inkjet head 1 (on a drive circuit board not shown). In other words, the number of stages of the cascade connection between the drive circuit units 12a, 12b, and 12c in the inkjet head 1 is three stages. Specifically, as shown in FIG. 1, a cascade connection from the front stage side to the rear stage side is made in the order of the head control unit 2, the drive circuit unit 12a (the frontmost stage), the drive circuit unit 12b, and the drive circuit unit 12c (the last stage). Although details will be described later, data transfer is performed in this order.

[0027] Here, each of such drive circuit units 12a, 12b, and 12c has, for example, as shown in FIG. 2, a serial / parallel conversion unit 121, a drive signal generation unit 122, a parallel / serial conversion unit 123, a detection unit 124, a storage unit 125, and a notification unit 126. Note that the serial / parallel conversion unit 121 and the drive signal generation unit 122 correspond to a specific example of the "signal generation unit" in the present disclosure.

[0028] (Serial / Parallel Conversion Unit 121) The serial / parallel conversion unit 121 is a circuit that performs a predetermined serial / parallel conversion based on the serial data signal Ds composed of the above-described m-bit (4 bits in this example) serial pixel data signal PDs and the clock signal CLK. Through such serial / parallel conversion, as shown in FIG. 2, an m-bit (4 bits in this example) parallel pixel data signal PDp (PDp[3:0]) is generated.

[0029] Specifically, as shown in FIG. 2, the serial / parallel conversion unit 121 generates the above-described latch signal LATCH, firing signal FIRE, and strobe signal STB, together with the 4-bit parallel pixel data signal PDp, by performing such serial / parallel conversion. Note that the clock signal CLK is also output from this serial / parallel conversion unit 121 (see FIG. 2).

[0030] (Drive signal generation unit 122) The drive signal generation unit 122 generates the above-described drive signal Sd (drive voltage Vd) for each of the plurality of nozzle holes Hn. Specifically, as shown in FIG. 2, the drive signal generation unit 122 generates such a drive signal Sd based on the m-bit (4 bits in this example) parallel pixel data signal PDp, latch signal LATCH, firing signal FIRE, strobe signal STB, and clock signal CLK.

[0031] Such a drive signal generation unit 122 has, as shown in FIG. 2, a shift register unit 122A, a latch circuit unit 122B, a waveform generation circuit unit 122C, a level conversion circuit 122D, and a logical product circuit (AND circuit) 40.

[0032] The logical product circuit 40 is a logic circuit that generates a logical product signal (AND signal) Scom of the strobe signal STB and the clock signal CLK, as shown in FIG. 2.

[0033] The shift register section 122A is a circuit that sequentially transfers and holds the parallel pixel data signals PDp for each of the plurality of nozzle holes Hn in correspondence with the drive signals Sd for each of the plurality of nozzle holes Hn, from the front stage side (nozzle hole Hn1 side) to the rear stage side (nozzle hole Hn5 side) (see FIG. 2). This shift register section 122A has the same number (five in this example) of D-FF (flip-flop) circuits 41 as the number of the plurality of nozzle holes Hn, and in each D-FF circuit 41, it is possible to hold a 4-bit parallel pixel data signal PDp. Also, as shown in FIG. 2, a logical product signal Scom generated by the above-described logical product circuit 40 is input to each D-FF circuit 41 as a shift clock during sequential transfer. In other words, this shift register section 122A sequentially transfers the above-described parallel pixel data signal PDp in synchronization with the above-described logical product signal Scom.

[0034] As shown in FIG. 2, the latch circuit section 122B is a circuit that holds the 4-bit parallel pixel data signals PDp for each of the plurality of nozzle holes Hn output from each D-FF circuit 41 in the shift register section 122A in synchronization with the latch signal LATCH. This latch circuit section 122B has the same number (five in this example) of latch circuits 42 as the number of the plurality of nozzle holes Hn, and in each latch circuit 42, it is possible to hold a 4-bit parallel pixel data signal PDp.

[0035] As shown in FIG. 2, the waveform generation circuit section 122C is a circuit that generates a waveform signal serving as a basis for the drive signal Sd based on the 4-bit parallel pixel data signals PDp for each of the plurality of nozzle holes Hn output from each latch circuit 42 in the latch circuit section 122B. This waveform generation circuit section 122C has the same number (five in this example) of waveform generation circuits 43 as the number of the plurality of nozzle holes Hn, and in each waveform generation circuit 43, such a waveform signal is generated in synchronization with the firing signal FIRE.

[0036] As shown in FIG. 2, the level conversion circuit 122D is a circuit that generates drive signals Sd for each of the plurality of nozzle holes Hn based on the waveform signals for each of the plurality of nozzle holes Hn output from each waveform generation circuit 43 in the waveform generation circuit section 122C. Specifically, the level conversion circuit 122D generates drive signals Sd having drive voltages Vd corresponding to the respective nozzle holes Hn by converting the levels (voltage values) of the respective waveform signals.

[0037] (Parallel / serial conversion section 123) The parallel / serial conversion section 123 is a circuit that performs a predetermined parallel / serial conversion based on the above-described m-bit (4 bits in this example) parallel pixel data signal PDp and the clock signal CLK. By such parallel / serial conversion, as shown in FIG. 2, the above-described serial data signal Ds is generated (regenerated), and the serial data signal Ds and the clock signal CLK are each output to the outside of the respective drive circuit sections 12a, 12b, 12c.

[0038] Specifically, the parallel / serial conversion section 123 performs the above-described parallel / serial conversion based on the 4-bit parallel pixel data signal PDp output from the shift register section 122A (the last-stage D-FF circuit 41), the clock signal CLK, the strobe signal STB, the latch signal LATCH, and the firing signal FIRE (see FIG. 2).

[0039] Here, as shown in FIGS. 1 and 2, the serial data signal Ds and the clock signal CLK output from the parallel / serial conversion unit 123 in the drive circuit unit located relatively on the front stage side are respectively input to the serial / parallel conversion unit 121 in the drive circuit unit located relatively on the rear stage side. Specifically, the serial data signal Ds and the clock signal CLK output from the drive circuit unit 12a on the relatively front stage side are respectively input to the drive circuit unit 12b on the relatively rear stage side. Similarly, the serial data signal Ds and the clock signal CLK output from the drive circuit unit 12b on the relatively front stage side are respectively input to the drive circuit unit 12c on the relatively rear stage side. As a result, as shown in FIG. 1, a plurality of drive circuit units 12a, 12b, and 12c are connected in series in multiple stages (cascade connection) with each other.

[0040] (Detection unit 124) The detection unit 124 detects the presence or absence of the occurrence of various abnormal states regarding the generation of the drive signal Sd in the drive signal generation unit 122. Although the details of the content of such various abnormal states will be described later, as an example, a so-called "duplicate trigger state" can be mentioned. This duplicate trigger state means an abnormal state in which the drive circuit units 12a to 12c receive input data (serial data signal Ds and clock signal CLK) from the head control unit 2 during the generation period of the drive signal Sd.

[0041] (Storage unit 125) The storage unit 125 is a part where information (status register Rs) indicating such an abnormal state is stored when the detection unit 124 detects the occurrence of the various abnormal states described above. Also, although the details will be described later, the information of the status register Rs stored in the storage unit 125 is configured to be readable by the head control unit 2 using, for example, the function of the register read / write Rrw (see FIGS. 1 and 2).

[0042] Note that the above-described status register Rs corresponds to a specific example of the "information indicating an abnormal state" in the present disclosure.

[0043] (Notification unit 126) The notification unit 126 uses a notification signal Sn (such as an interrupt signal) to perform a predetermined notification to the head control unit 2. As an example, the notification unit 126 is configured to notify the head control unit 2 of the information of the status register Rs stored in the storage unit 125 using the notification signal Sn (see FIGS. 1 and 2).

[0044] Note that the detailed operations and the like in the detection unit 124, the storage unit 125, and the notification unit 126 will be described later (FIGS. 8 and 9).

[0045] [Operations, functions, and effects] (A. Basic operation of the printer 3) In this printer 3, a recording operation (printing operation) such as an image or characters on a recording medium is performed using an ink ejection operation of the inkjet head 1 as follows. Specifically, in the inkjet head 1 of the present embodiment, an ink ejection operation using a shear mode is performed as follows. In this printer 3, in the initial state, the ink 9 in the ink tank described above is filled in the discharge channel in the piezoelectric actuator 111 of the inkjet head 1 through a supply tube and a predetermined flow path and the like.

[0046] First, each drive circuit unit 12a, 12b, 12c applies a drive voltage Vd (drive signal Sd) to the drive electrodes (common electrode and active electrode) in the piezoelectric actuator 111 in the corresponding ejection unit 11a, 11b, 11c. Specifically, each drive circuit unit 12a, 12b, 12c applies a drive voltage Vd to each drive electrode disposed on a pair of drive walls that define the discharge channel described above. As a result, each of these pair of drive walls deforms so as to protrude toward the dummy channel side adjacent to the discharge channel.

[0047] At this time, the drive wall will bend and deform in a V shape with the intermediate position in the depth direction of the drive wall as the center. Then, due to such bending deformation of the drive wall, the discharge channel deforms as if it swells. In this way, the volume of the discharge channel increases due to the bending deformation caused by the piezoelectric thickness shear effect in the pair of drive walls. And, as the volume of the discharge channel increases, the ink 9 is induced into the discharge channel.

[0048] Next, the ink 9 induced into the discharge channel in this way propagates inside the discharge channel as a pressure wave. And at the timing when this pressure wave reaches the nozzle holes Hn of the nozzle plate 112, the drive voltage Vd applied to the drive electrode becomes 0 (zero) V. As a result, the drive wall returns from the above-described bent deformation state, and the volume of the discharge channel that once increased returns to its original state again.

[0049] In this way, in the process of the volume of the discharge channel returning to its original state, the pressure inside the discharge channel increases, and the ink 9 inside the discharge channel is pressurized. As a result, the ink 9 in droplet form is discharged to the outside (toward the recording medium) through the nozzle holes Hn (see FIGS. 1 and 2). In this way, the ejection operation (discharge operation) of the ink 9 in the inkjet head 1 is performed, and as a result, the recording operation of an image, characters, etc. on the recording medium is performed.

[0050] (B. Data transfer operation) Next, with reference to FIGS. 3 to 5 in addition to FIGS. 1 and 2, the data transfer operation between the head control unit 2 and the drive circuit unit 12a and between the drive circuit units 12a, 12b, and 12c will be described in detail.

[0051] First, as shown in FIG. 2, each of the drive circuit units 12a, 12b, and 12c of the present embodiment is provided with a serial / parallel conversion unit 121 and a parallel / serial conversion unit 123, respectively. And in each of the drive circuit units 12a, 12b, and 12c and the entire inkjet head 1, the data transfer operation is performed as follows.

[0052] FIG. 3 schematically shows an operation example (data transfer operation example) in each of the drive circuit units 12a, 12b, and 12c shown in FIG. 2 as a timing diagram, and FIG. 4 schematically shows a part of the operation example shown in FIG. 5 in an enlarged manner as a timing diagram. Further, FIG. 5 schematically shows the data transfer operation of the entire inkjet head 1 shown in FIG. 1 as a timing diagram.

[0053] In these FIGS. 3 to 5, the horizontal axis represents time t, and the same applies to the subsequent timing diagrams. Also, in FIGS. 3 to 5, one cycle of the clock signal CLK is shown as a period T, and the same applies to the subsequent timing diagrams.

[0054] Here, in FIGS. 3 and 4, (A), (B), and (C) respectively represent the clock signal CLK, the serial data signal Ds, and the 7-bit parallel data (including the 4-bit parallel pixel data signal PDp[3:0]) after the serial data signal Ds is serially / parallel converted, which are input to each of the drive circuit units 12a, 12b, and 12c (the serial / parallel conversion unit 121 therein).

[0055] On the other hand, in FIG. 3, (D), (E), and (F) respectively represent the clock signal CLK, the serial data signal Ds, and the 7-bit parallel data (including the 4-bit parallel pixel data signal PDp[3:0]) before the parallel / serial conversion, which are output from each of the drive circuit units 12a, 12b, and 12c (the parallel / serial conversion unit 123 therein).

[0056] Also, in FIG. 5, (A) shows the clock signal CLK, and (B) to (E), (F) to (I), and (J) to (M) respectively show the 7-bit parallel data (including the 4-bit parallel pixel data signal PDp[3:0]) in the drive circuit units 12a, 12b, and 12c. Specifically, (B), (F), and (J) respectively show the 4-bit parallel pixel data signal PDp[3:0], and (C), (G), and (K) respectively show the latch signal LATCH. Also, (D), (H), and (L) respectively show the firing signal FIRE, and (E), (I), and (M) respectively show the strobe signal STB.

[0057] In FIGS. 3 to 5, in the parallel pixel data signal PDp[3:0], "n", "a", and "b" in "Dn_a_b" respectively mean the following numbers. Also, "N / A" means invalid data (Not Available). "n": The bit number in the parallel pixel data signal PDp "a": The number of the nozzle hole Hn "b": The number in the plurality of cascade-connected drive circuit units (in this example, three drive circuit units 12a, 12b, and 12c)

[0058] Also, in FIG. 5, for convenience, the contents of each bit in the 4-bit parallel pixel data signal PDp[3:0] are summarized and the symbols are simplified, and it is shown as "Dab" instead of "Dn_a_b" defined above.

[0059] The data transfer operation of this embodiment is as follows in each of the drive circuit units 12a, 12b, and 12c, as shown in FIGS. 3 and 4, for example. That is, first, the serial data signal Ds includes 7-bit serial data within a period of period T (one clock period) in synchronization with the clock signal CLK (see FIGS. 3(A), 3(B), 4(A), and 4(B)). This serial data signal Ds is serially / parallel converted in the serial / parallel conversion unit 121 to generate a 4-bit parallel pixel data signal PDp[3:0], a latch signal LATCH, a firing signal FIRE, and a strobe signal STB, respectively (see the dashed arrows in FIG. 4). In this example, as shown in FIG. 4, the first 4 bits from the start of the serial data signal Ds become the serial pixel data signal PDs, and then they are arranged in the order of the latch signal LATCH, the firing signal FIRE, and the strobe signal STB.

[0060] Here, only during the period when the strobe signal STB = "1" generated in this way (the period from timing t11 to t16), a shift clock (logical product signal Scom) is input to each D-FF circuit 41 in the shift register unit 122A. Therefore, this period becomes the valid period for data input (input of the parallel pixel data signal PDp) to the shift register unit 122A (see FIGS. 3(C) and 4(C)).

[0061] During this period, first, parallel pixel data signals PDp corresponding to the respective nozzle holes Hn1 to Hn5 are sequentially input to the shift register section 122A. Next, within this shift register section 122A, the parallel pixel data signals PDp that are sequentially transferred and held are held in the respective latch circuits 42 within the latch circuit section 122B at the timing (timing t17) when the latch signal LATCH changes from "0" to "1" (see FIG. 3(C)). Subsequently, at the timing (timing t19) when the firing signal FIRE changes from "0" to "1", each waveform generation circuit 43 within the waveform generation circuit section 122C starts generating a waveform signal that serves as the basis for the drive signal Sd based on the parallel pixel data signal PDp held in each latch circuit 42 (see FIG. 3(C)). Then, in the level conversion circuit 122D, based on each such waveform signal, a drive signal Sd corresponding to each nozzle hole Hn is generated, and based on this drive signal Sd, the above-described drive wall is driven (as a result, for example, ink 9 is ejected from each nozzle hole Hn) (see the timings t19 to t20 in FIGS. 1, 2, and 3).

[0062] Also, at this time, the 4-bit parallel pixel data signal PDp[3:0] output from the D-FF circuit 41 at the last stage of the shift register section 122A is subjected to parallel / serial conversion in the parallel / serial conversion section 123. Specifically, parallel / serial conversion is performed based on this 4-bit parallel pixel data signal PDp[3:0], the latch signal LATCH, the firing signal FIRE, and the strobe signal STB, thereby regenerating the above-described serial data signal Ds (see FIGS. 3(D) to 3(F)). Then, the serial data signal Ds regenerated in this way is output from the parallel / serial conversion section 123 to the outside of each of the drive circuit sections 12a, 12b, 12c together with the clock signal CLK (see FIGS. 3(D) and 3(E)). Note that at timings t16 to t23 in "PDp[3:0]" (IN) in FIG. 3(C), since the strobe signal STB = "0", the sequential transfer described above is not performed. Therefore, as shown at timings t18 to t23 in "PDp[3:0]" (OUT) in FIG. 3(F), the parallel pixel data signal PDp remains "Dn_5_1" and does not change.

[0063] Note that at this time, as indicated by the dashed arrows P10 and P11 in FIG. 3, for example, within each of the drive circuit sections 12a, 12b, 12c, each data sequentially shifts for a period of seven cycles T (seven-cycle period) from data input to data output. Specifically, the parallel pixel data signal PDp included in the serial data signal Ds input during the period up to timing t11 is included in and output from the serial data signal Ds during the period of timings t13 to t18 (see the dashed arrow P10). Similarly, the parallel pixel data signal PDp included in the serial data signal Ds input during the period of timings t11 to t16 is included in and output from the serial data signal Ds during the period of timings t18 to t23 (see the dashed arrow P11).

[0064] Also, for example, as shown in FIG. 5, the data transfer operation of the entire inkjet head 1 is as follows. That is, first, the 4-bit parallel pixel data signal PDp in the drive circuit section 12a becomes the serial data signal Ds as described above and is output to the drive circuit section 12b at the subsequent stage of this drive circuit section 12a (see arrows P21 to P23 in FIG. 5). Similarly, the 4-bit parallel pixel data signal PDp in this drive circuit section 12b becomes the serial data signal Ds as described above and is output to the drive circuit section 12c at the subsequent stage (the last stage) of this drive circuit section 12b (see arrows P31 to P33 in FIG. 5). In addition, also in FIG. 5, during the period when the strobe signal STB = "0", the sequential transfer described above is not performed, and the parallel pixel data signal PDp[3:0] remains as "D_5_1" or "D_5_2" without changing.

[0065] At this time, the parallel pixel data signals PDp for each of the drive circuit sections 12a, 12b, and 12c are sequentially transferred from the drive circuit section 12a to the drive circuit sections 12b and 12c while being sequentially shifted (see arrows P21 to P23, P31 to P33 in FIG. 5).

[0066] (C. Regarding the occurrence of abnormal states) By the way, when generating the drive signal Sd as described above, there are cases where various abnormal states regarding the generation of the drive signal Sd occur. Specifically, for example, the following abnormal states can occur, including the so-called overlapping trigger state described above.

[0067] · Overlapping trigger state (a state in which the drive circuit sections 12a to 12c receive input data (serial data signal Ds and clock signal CLK) from the head control unit 2 during the generation period of the drive signal Sd) · Error state in the differential signal (e.g., LVDS signal) for transmitting the serial data signal Ds, etc. (a state of deviation from the level standard, or a state of (1,1) pattern or (0,0) pattern in the differential signal) · A state in which a CRC (Cyclic Redundancy Check) error has occurred in the serial data signal Ds or the like · A collision state in the output analog switch (multiplexer) in the waveform generation circuit 43

[0068] Also, examples of the causes of the above-mentioned overlapping trigger state (the cause of receiving the input data again within the generation period of the drive signal Sd) include the following. For example, when the time interval of the drive signal Sd is set to the limit within the generation period of the drive waveform, due to encoder jitter or the like, there is a possibility that the drive waveform is emitted before the generation of the drive waveform is completed.

[0069] · Generation of noise (By checking the pulse width in the drive signal Sd, it is possible to eliminate a certain amount of noise) · Generation of jitter in the drive signal Sd (Output of the encoder for media conveyance, etc.)

[0070] Here, in a conventional general inkjet head, as will be described in detail in the comparative example below, even if the occurrence of the above abnormal state is detected during the generation of the drive signal Sd, it is ignored, and the external (print control unit 12) cannot grasp the occurrence of the abnormal state. Therefore, conventionally, it has been necessary to calculate and set a time interval (the time interval of the drive signal Sd) to avoid the occurrence of such an abnormal state, or to visually check by an image monitor or a human whether the print quality on the printed matter has deteriorated.

[0071] In this way, in the conventional inkjet head, since the occurrence of the abnormal state during the generation of the drive signal Sd cannot be grasped externally, it is not easy to execute various countermeasures, and there is a risk that the reliability of the inkjet head is impaired.

[0072] Therefore, in the inkjet head 1 of the present embodiment, when an abnormal state as described above is detected during the generation of the drive signal Sd, information indicating the abnormal state (status register Rs) is stored in the storage unit 125. Hereinafter, operation examples during normal times and when an abnormal state occurs (abnormal times) will be described in detail while comparing between comparative examples (Comparative Examples 1 to 3) and examples of the present embodiment (Examples 1 to 3).

[0073] FIG. 6 schematically shows timing diagrams of operation examples during normal times ((A) to (C)) and operation examples during abnormal times according to Comparative Example 1 ((D) to (F)). Further, FIG. 7 schematically shows timing diagrams of operation examples during abnormal times according to Comparative Example 2 ((A) to (C)) and operation examples during abnormal times according to Comparative Example 3 ((D) to (F)). Specifically, FIG. 6(A), FIG. 6(D), FIG. 7(A), and FIG. 7(D) respectively show the clock signal CLK, FIG. 6(B), FIG. 6(E), FIG. 7(B), and FIG. 7(E) respectively show the firing signal FIRE, and FIG. 6(C), FIG. 6(F), FIG. 7(C), and FIG. 7(F) respectively show the situation of waveform generation (and ejection of the ink 9) regarding the drive signal Sd.

[0074] On the other hand, FIG. 8 schematically shows timing diagrams of operation examples during abnormal times according to Example 1 ((A) to (D)) and operation examples during abnormal times according to Example 2 ((E) to (H)). Further, FIG. 9 schematically shows an operation example during abnormal times according to Example 3 ((A) to (E)). Specifically, FIG. 8(A), FIG. 8(E), and FIG. 9(A) respectively show the clock signal CLK, FIG. 8(B), FIG. 8(F), and FIG. 9(B) respectively show the firing signal FIRE. Also, FIG. 8(C), FIG. 8(G), and FIG. 9(C) respectively show the aforementioned status register Rs, FIG. 8(D), FIG. 8(H), and FIG. 9(E) respectively show the situation of waveform generation (and ejection of the ink 9) regarding the drive signal Sd, and FIG. 9(D) shows the FIRE (ejection request) reception temporary storage signal CLKt to be described later.

[0075] (C-1. Normal operation examples during normal times and abnormal times for Comparative Examples 1 to 3) First, in the normal operation examples shown in FIGS. 6(A) to 6(C), when the firing signal FIRE becomes valid (in the "H" state) during the generation period of the drive signal Sd, the following occurs. That is, along with this, the generation (waveform generation) of the drive signal Sd is started, and the ejection operation of the ink 9 based on the generated drive signal Sd is performed (see the solid arrows in FIG. 6).

[0076] On the other hand, during abnormal times (when an abnormal state occurs) for Comparative Examples 1 to 3, the operations are as follows respectively.

[0077] First, in the operation example of Comparative Example 1 shown in FIGS. 6(D) to 6(F), since the pulse width of the firing signal FIRE generated during the generation period of the drive signal Sd is shorter than the specified time width, it is in an invalid state (see reference numeral P101 in FIG. 6). Therefore, in this Comparative Example 1, the generation (waveform generation) of the drive signal Sd is not performed (see the dashed arrow in FIG. 6).

[0078] Also, in both the operation example of Comparative Example 2 shown in FIGS. 7(A) to 7(C) and the operation example of Comparative Example 3 shown in FIGS. 7(D) to 7(F), the above-described overlapping trigger state has occurred. That is, in these Comparative Examples 2 and 3, the input data from the head control unit 2 is received again during the generation period of the drive signal Sd, and the firing signal FIRE is generated (see reference numerals P102 and P103 in FIG. 7). Incidentally, the firing signal FIRE in Comparative Example 3, similar to the case of Comparative Example 1 described above, is in an invalid state because its pulse width is shorter than the specified range. And in these Comparative Examples 2 and 3 respectively, the occurrence of such a firing signal FIRE is ignored, and the generation (waveform generation) of the drive signal Sd is not performed.

[0079] As described above, in all of Comparative Examples 1 to 3, since the occurrence of the abnormal state during the generation of the drive signal Sd cannot be grasped externally (by the head control unit 2), it is not easy to execute various countermeasures, and there is a risk of impairing the reliability of the inkjet head and the entire apparatus.

[0080] (Operation examples during abnormal conditions according to Examples 1 to 3) On the other hand, in Examples 1 to 3 according to the present embodiment, when the occurrence of the above abnormal state is detected, information indicating the above abnormal state (status register Rs) is stored in the storage unit 125, and the following occurs.

[0081] That is, first, in both the operation example of Example 1 shown in FIGS. 8(A) to (D) and the operation example of Example 2 shown in FIGS. 8(E) to (H), the above-described overlapping trigger state occurs in the same manner as in Comparative Examples 2 and 3. That is, in these Examples 1 and 2, the input data from the head control unit 2 is received again during the generation period of the drive signal Sd, and the firing signal FIRE is generated (see reference numerals P41 and P42 in FIG. 8). Incidentally, the firing signal FIRE in Example 2 is in an invalid state because its pulse width is shorter than the specified time width, as in the cases of the above-described Comparative Examples 1 and 3.

[0082] Here, in these Examples 1 and 2, unlike Comparative Examples 1 to 3 described above, when the occurrence of such an abnormal state during the generation of the drive signal Sd is detected by the detection unit 124, information indicating the abnormal state (status register Rs) is stored in the storage unit 125. Specifically, as shown in FIGS. 8(C) and (G), the status register Rs is set to 1 (``H'' state), and the information of this status register Rs is acquired by the head control unit 2. That is, the information of the status register Rs stored in the storage unit 125 is configured to be readable (periodically) by the head control unit 2 as described above. Further, the information of the status register Rs stored in the storage unit 125 is notified to the head control unit 2 by the notification unit 126 as described above. Then, as shown in FIGS. 8(C) and (G), when the head control unit 2 acquires the information of the status register Rs in this way, for example, it executes a predetermined recovery process (error recovery process) for recovering such an abnormal state.

[0083] Also, in the operation example of Example 3 shown in FIGS. 9(A) to 9(E), when the firing signal FIRE is generated, the FIRE reception temporary storage signal CLKt (FIG. 9(D)) becomes the "H" state (see arrows P431 and P435 in FIG. 9). Along with this, the generation operation of the drive signal Sd and the ejection operation of the ink 9 are each started (see arrows P432 and P436 in FIG. 9).

[0084] Also in this Example 3, similar to the above-described Examples 1 and 2, when the detection unit 124 detects the occurrence of an abnormal state (such as a duplicate trigger state) during the generation of the drive signal Sd, information indicating the abnormal state (status register Rs) is stored in the storage unit 125. Specifically, as shown by arrow P434 in FIG. 9(C) and FIG. 9, the status register Rs is set to 1 ("H" state), and the information of this status register Rs is acquired by the head control unit 2 by the same method as in Examples 1 and 2. And similar to Examples 1 and 2, when the head control unit 2 acquires the information of the status register Rs, for example, it executes a predetermined recovery process (error recovery process) for recovering such an abnormal state (see FIG. 8(C)).

[0085] Furthermore, in this Example 3, different from the cases of the above-described Examples 1 and 2, when the detection unit 124 detects the occurrence of a duplicate trigger state (see reference numeral P433 in FIG. 9), the generation operation of the drive signal Sd by the drive signal generation unit 122 and the like are also performed as follows. Specifically, the input data from the head control unit 2 is received again during the generation period of the drive signal Sd, and when the firing signal FIRE is generated, the status register Rs is stored, and using the above-described FIRE reception temporary storage signal CLKt, the generation operation of the drive signal Sd and the ejection operation of the ink 9 are each started (see arrows P433 to P436 in FIG. 9). At this time, after the generation period of the current drive signal Sd ends, the drive signal generation unit 122 generates the next drive signal Sd based on the input data (serial data signal Ds and clock signal CLK) received (re-received) during the generation period of the drive signal Sd (see arrow P436 in FIG. 9).

[0086] Also, when the generation of the next drive signal Sd is performed based on the input data received during the generation period of the current drive signal Sd in this manner, error information indicating that is acquired by the head control unit 2 (see FIG. 9(E)). That is, for example, such error information is configured to be readable by the head control unit 2. Alternatively, for example, such error information is notified to the head control unit 2 by the notification unit 126. Thereby, for example, it becomes possible to prompt the head control unit 2 to correct parameter settings or the like.

[0087] (D. Operation and Effect) In this way, in the inkjet head 1 of the present embodiment, when the above-described abnormal state regarding the generation of the drive signal Sd based on the input data (serial data signal Ds and clock signal CLK) supplied from the external head control unit 2 is detected, information (status register Rs) indicating the abnormal state is stored in the storage unit 125. Thereby, even when such an abnormal state occurs, the occurrence of the abnormal state is not ignored and is stored as the status register Rs, so that the status register Rs can be used for various countermeasures. As a result, in the present embodiment, it becomes possible to improve the reliability of the inkjet head 1.

[0088] Also, in the present embodiment, since the status register Rs stored in the storage unit 125 is configured to be readable by the head control unit 2, information regarding the occurrence of the above-described abnormal state can be grasped by the external head control unit 2. Therefore, in the present embodiment, it is also possible to improve convenience.

[0089] Furthermore, in the present embodiment, since the information of the status register Rs stored in the storage unit 125 is notified to the head control unit 2 by the notification unit 126, the following occurs. That is, information regarding the occurrence of the above abnormal state can be easily grasped by the external head control unit 2. Therefore, in the present embodiment, it is possible to further improve convenience.

[0090] In addition, in the present embodiment, when it is detected that the above-described overlapping trigger state has occurred, and when the generation of the next drive signal Sd is performed based on the input data received during the generation period of the current drive signal Sd after the generation period of the current drive signal Sd has ended, the following occurs. That is, since the input data received at the occurrence of such an overlapping trigger state is also utilized for the generation of the drive signal Sd, it is possible to improve convenience.

[0091] Also, in the present embodiment, when the generation of the next drive signal Sd is performed based on the input data received during the generation period of the current drive signal Sd as described above, and when the error state information indicating that is configured to be readable by the head control unit 2, the following occurs. That is, regarding the fact that the generation of the next drive signal Sd has been performed as described above, it can be grasped by the external head control unit 2 (prompting modification of parameter settings, etc.), so it is possible to improve convenience.

[0092] Furthermore, in the present embodiment, when the generation of the next drive signal Sd is performed based on the input data received during the generation period of the current drive signal Sd as described above, and when the notification unit 126 notifies the head control unit 2 to that effect, the following occurs. That is, since the fact that the generation of the next drive signal Sd has been performed as described above can be easily grasped by the external head control unit 2 (easily prompting modification of parameter settings, etc.), it is possible to further improve convenience.

[0093] In addition, in the present embodiment, when the head control unit 2 acquires the information of the status register Rs stored in the storage unit 125 and executes a predetermined recovery process for recovering the above-described abnormal state, the following occurs. That is, since the recovery process for recovering such an abnormal state is executed, it becomes possible to further improve the reliability of the inkjet head 1.

[0094] <2. Modification Example> As described above, the present disclosure has been described with some embodiments and examples, but the present disclosure is not limited to these embodiments and the like, and various modifications are possible.

[0095] For example, in the above-described embodiments and the like, the configuration examples (shape, arrangement, number, etc.) of each member in the printer 3 and the inkjet head 1 have been specifically described. However, the present disclosure is not limited to those described in the above-described embodiments and the like, and other shapes, arrangements, numbers, etc. may be used. Specifically, in the above-described embodiments and the like, an example in which a plurality of nozzle holes Hn are provided in each ejection unit 11a to 11c of the inkjet head 1 has been described. However, the present disclosure is not limited to this example. That is, for example, when applied to a so-called 3D printer, only one nozzle hole Hn may be provided in each ejection unit 11a to 11c.

[0096] In addition, as the structure of the inkjet head, various types can be applied. That is, for example, a so-called side-shoot type inkjet head that ejects the ink 9 from the central portion in the extending direction of each discharge channel in the piezoelectric actuator 111 may be used. Alternatively, for example, a so-called edge-shoot type inkjet head that ejects the ink 9 along the extending direction of each discharge channel may be used. Furthermore, the printer type is not limited to the type described in the above-described embodiments and the like, and various types such as a thermal type (bubble jet type), a MEMS (Micro Electro Mechanical Systems) type, a thermal paper type, and a dot impact type can be applied.

[0097] Furthermore, for example, the present disclosure can be applied to either a circulating inkjet head that circulates and uses ink 9 between an ink container and an inkjet head, or a non-circulating inkjet head that uses ink 9 without circulation.

[0098] In addition, in the above-described embodiments and the like, examples of data transfer methods have been specifically described. However, the examples given in the above-described embodiments and the like are not limited thereto, and data transfer may be performed using other methods. Specifically, for example, in the above-described embodiments and the like, data transfer using a serial data signal Ds has been performed, and examples of cases where serial / parallel conversion and parallel / serial conversion are performed within each drive circuit unit 12a to 12c have been described. However, the examples in this case are not limited thereto. That is, for example, data transfer using a parallel data signal may be performed. Further, for example, in a data transfer method according to the so-called "8B / 10B method", the method of the present disclosure can be applied by providing an 8B / 10B decoder, encoder, and protocol control circuit.

[0099] Also, the series of processes described in the above-described embodiments and the like may be performed by hardware (circuit) or may be performed by software (program). When performed by software, the software is composed of a group of programs for causing a computer to execute each function. Each program may be, for example, pre-installed in the above computer and used, or may be installed from a network or a recording medium into the above computer and used.

[0100] Furthermore, in the above-described embodiments and the like, as a specific example of the "liquid ejection recording apparatus" in the present disclosure, the printer 3 (inkjet printer) has been described as an example, but the present disclosure is not limited to this example, and the present disclosure can also be applied to other apparatuses other than inkjet printers. In other words, the "liquid ejection head" (inkjet head) of the present disclosure may be applied to other apparatuses other than inkjet printers. Specifically, for example, the "liquid ejection head" of the present disclosure may be applied to apparatuses such as so-called 3D printers, facsimiles, and on-demand printers.

[0101] In addition, the various examples described so far may be applied in any combination.

[0102] Note that the effects described in this specification are merely examples and are not limiting, and there may be other effects.

[0103] Also, the present disclosure can also adopt the following configurations. (1) An ejection unit having one or more nozzles for ejecting a liquid, One or more drive circuit units that generate a drive signal for ejecting the liquid from the nozzle based on input data supplied from an external head control unit and output the drive signal to the ejection unit Comprising The drive circuit unit A signal generation unit that generates the drive signal based on the input data, A detection unit that detects the presence or absence of an abnormal state related to the generation of the drive signal, A storage unit that stores information indicating the abnormal state when the detection unit detects the occurrence of the abnormal state A liquid ejection head having (2) The information indicating the abnormal state stored in the storage unit is configured to be readable by the head control unit The liquid ejection head according to (1) above. (3) The drive circuit unit further includes a notification unit that performs a predetermined notification. The notification unit notifies the head control unit of the information indicating the abnormal state stored in the storage unit. The liquid ejection head according to the above (1) or (2). (4) The abnormal state is a state in which the input data is received from the head control unit during the generation period of the drive signal. The liquid ejection head according to any one of the above (1) to (3). (5) The signal generation unit When the detection unit detects the occurrence of a state in which the input data is received from the head control unit during the generation period of the drive signal, after the current generation period of the drive signal ends, the next drive signal is generated based on the input data received during the generation period of the drive signal. The liquid ejection head according to the above (4). (6) The drive circuit unit further includes a notification unit that performs a predetermined notification. When the next drive signal is generated based on the input data received during the current generation period of the drive signal, the notification unit notifies the head control unit to that effect. The liquid ejection head according to the above (5). (7) In the signal generation unit, when the next drive signal is generated based on the input data received during the current generation period of the drive signal, information on an error state indicating that is configured to be readable by the head control unit. The liquid ejection head according to the above (5) or (6). (8) The liquid ejection head according to any one of the above (1) to (7), the head control unit, and a liquid ejection recording apparatus provided with the same. (9) The head control unit When information indicating the abnormal state stored in the storage unit is acquired, Execute a predetermined recovery process for recovering the abnormal state The liquid jet recording apparatus according to (8) above.

Explanation of Signs

[0104] 1... Inkjet head, 11, 11a, 11b, 11c... Jetting part, 111... Piezoelectric actuator (actuator plate), 112... Nozzle plate, 12a, 12b, 12c... Drive circuit part, 121... Serial / parallel conversion part, 122... Drive signal generation part, 122A... Shift register part, 122B... Latch circuit part, 122C... Waveform generation circuit part, 122D... Level conversion circuit, 123... Parallel / serial conversion part, 124... Detection part, 125... Storage part, 126... Notification part, 2... Head control part, 3... Printer, 40... AND circuit (logical product circuit), 41... D-FF circuit, 42... Latch circuit, 43... Waveform generation circuit, 9... Ink, Hn, Hn1~Hn5... Nozzle holes, Ds... Serial data signal, PDs... Serial pixel data signal, PDp... Parallel pixel data signal, CLK... Clock signal, CLKt... FIRE reception temporary storage signal, STB... Strobe signal, LATCH... Latch signal, FIRE... Firing signal, Scom... Logical product signal, Sd... Drive signal, Vd... Drive voltage, Rs... Status register, Rrw... Register read / write, Sn... Notification signal, t... Time, t11~t23... Timing, T... Period.

Claims

1. An injection unit having one or more nozzles for injecting a liquid, One or more drive circuit units that generate a drive signal for injecting the liquid from the nozzle based on input data supplied from an external head control unit, and output the drive signal to the injection unit Comprising The drive circuit unit A signal generation unit that generates the drive signal based on the input data, A detection unit that detects the presence or absence of an abnormal state related to the generation of the drive signal, A storage unit that stores information indicating the abnormal state when the detection unit detects the occurrence of the abnormal state A liquid injection head having

2. The information indicating the abnormal state stored in the storage unit is configured to be readable by the head control unit The liquid injection head according to Claim 1.

3. The drive circuit unit further has a notification unit that performs a predetermined notification, The notification unit notifies the head control unit of the information indicating the abnormal state stored in the storage unit The liquid injection head according to Claim 1.

4. The abnormal state is a state in which the input data is received from the head control unit during the generation period of the drive signal The liquid injection head according to any one of Claims 1 to 3.

5. The signal generation unit When the detection unit detects the occurrence of a state in which the input data is received from the head control unit during the generation period of the drive signal, After the current generation period of the drive signal ends, the next drive signal is generated based on the input data received during the generation period of the drive signal The liquid injection head according to Claim 4.

6. The drive circuit unit further has a notification unit that performs a predetermined notification, When the next drive signal is generated based on the input data received during the current generation period of the drive signal, the notification unit notifies the head control unit to that effect The liquid injection head according to Claim 5.

7. In the signal generation unit, when the next drive signal is generated based on the input data received during the current generation period of the drive signal, information on an error state indicating that is configured to be readable by the head control unit The liquid injection head according to Claim 5.

8. The liquid injection head according to any one of Claims 1 to 3, And the head control unit A liquid jet recording apparatus comprising

9. The head control unit When acquiring the information indicating the abnormal state stored in the storage unit, Performs a predetermined recovery process for recovering the abnormal state The liquid jet recording apparatus according to claim 8.

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