Current-sense amplifier

The current sense amplifier with a common voltage suppressor and programmable gain settings addresses the challenge of wide DC voltage input handling, ensuring precise operation and adjustable output offset, suitable for motor control circuits.

JP2025112798AActive Publication Date: 2025-08-01オムニビジョン インテグレーテッド サーキッツ グループ インク
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Patent Information

Application Number
JP2024007270
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-01-22
Publication Date
2025-08-01
Estimated Expiration
2044-01-22

AI Technical Summary

Technical Problem

Current sense amplifiers used in drive circuits for motors face challenges in handling a wide range of DC voltage inputs, particularly on the high side, and require precise gain and output offset voltage settings.

Method used

A current sense amplifier with a common voltage suppressor that includes a voltage dividing resistor and transistors to suppress common-mode voltage, allowing for programmable gain and offset voltage settings, and a preamplifier and postamplifier configuration to handle high input voltages and provide differential signal processing.

Benefits of technology

The amplifier can operate with input voltages up to 40V, maintaining common-mode voltage below the power supply level and enabling precise gain and offset adjustments, suitable for both bipolar and unipolar operations.

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Abstract

To enable a current-sense amplifier to be adapted to a wide range of DC voltages at input.SOLUTION: A current-sense amplifier 100 receives as input the upper-side voltage and the lower-side voltage of a current detection resistor 1, and obtains an output corresponding to the difference between the upper-side voltage and the lower-side voltage. A common voltage suppressor 12 includes: voltage dividing resistors R6a, R6b which are supplied with the upper-side voltage and the lower-side voltage at both ends and obtain a divided voltage; a first transistor M1 to one end of which the upper-side voltage is input, and the other end of which is connected to a prescribed power source; and a second transistor M2 to the one end of which the lower-side voltage is input, and the other end of which is connected to a prescribed power source. The control end of the first transistor M1 and the control end of the second transistor M2 are connected in common, and the divided voltage is input to a portion connected in common.SELECTED DRAWING: Figure 1
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Description

Technical Field

[0001] The present disclosure relates to a current sense amplifier that detects a current flowing through a current detection resistor.

Background Art

[0002] In a drive circuit that drives a load such as a motor, a drive transistor for controlling the drive current is used. In order to control the drive current of the motor, it is necessary to detect the current flowing through the drive transistor, and a current sense amplifier is used to detect the drive current of the motor. In order to achieve excellent motor control, the current sense amplifier requires high speed, high precision, and low temperature drift.

[0003] Here, as the drive transistor, a power MOSFET is often used. However, since this power MOSFET conducts a large current, it is relatively large in size and is often used externally on the semiconductor substrate constituting the drive circuit.

[0004] In such a case, a current detection resistor is connected in series with the power MOSFET, and the drive current of the motor can be detected by detecting the voltage drop across the current detection resistor with a current sense amplifier.

Prior Art Documents

Patent Documents

[0005]

Patent Document 1

Summary of the Invention

Problems to be Solved by the Invention

[0006] The current sense amplifier is used either on the upstream side (high side) or the downstream side (low side) of the load depending on the application. Therefore, it is desirable that the current sense amplifier can handle a wide range of DC voltage inputs.

[0007] In particular, in the case of a current sense amplifier used on the high side, it must operate where its input voltage is much higher than the power supply voltage of the amplifier itself.

[0008] Therefore, it is desirable that the current sense amplifier can set the gain and the output offset voltage under the condition that it can correspond to a wide range of DC voltages at the input.

Means for Solving the Problems

[0009] The current sense amplifier according to the present disclosure is a current sense amplifier that receives the upper voltage and the lower voltage of a current detection resistor and obtains an output corresponding to the difference between the upper voltage and the lower voltage, and includes a common voltage suppressor that suppresses the common-mode voltage in the upper voltage and the lower voltage. The common voltage suppressor includes a voltage dividing resistor that supplies the upper voltage and the lower voltage to both ends to obtain a divided voltage, a first transistor with the upper voltage input to one end and the other end connected to a predetermined power supply, and a second transistor with the lower voltage input to one end and the other end connected to a predetermined power supply. The control end of the first transistor and the control end of the second transistor are commonly connected, and the divided voltage is input here.

Effects of the Invention

[0010] Since the common voltage suppressor can suppress the common-mode voltage in the input voltage, it can correspond to a wide range of DC voltages at the input and can perform gain setting and output offset voltage setting.

Brief Description of the Drawings

[0011]

Figure 1

Figure 2

Figure 3

Figure 4

Best Mode for Carrying Out the Invention

[0012] Hereinafter, embodiments of the present disclosure will be described below with reference to the drawings. Note that the following embodiments do not limit the present disclosure, and configurations formed by selectively combining a plurality of examples are also included in the present disclosure.

[0013] 「Overall Configuration」 FIG. 1 is a circuit diagram showing the configuration of a current sense amplifier according to an embodiment. The current sense amplifier 100 is a high-side current sense amplifier that detects the current flowing through the current detection resistor 2 disposed on the upstream side of the load 1. Here, the load 1 is, for example, a motor, and the current flowing through the load 1 is controlled by a drive transistor (not shown) connected in series with the load 1 and the current detection resistor 2. For example, PWM control is used for this current control. Further, as the transistor, for example, a MOSFET (metal oxide semiconductor field effect transistor) is used.

[0014] The current sense amplifier 100 includes four blocks: a preamplifier 10, a common voltage suppressor 12, a postamplifier 14, and an offset voltage switch 16. The current sense amplifier 100 is usually formed on a semiconductor substrate as a semiconductor integrated circuit.

[0015] The voltages at both ends of the current detection resistor 2 (upper voltage Vip and lower voltage Vin) are input to the preamplifier 10, and a pair of positive and negative voltages corresponding to the difference between these inputs are output as output voltages Vc and Vb. The upper voltage Vip is input to the negative input terminal (-) of the operational amplifier OPA1 via the resistor R1a. The lower voltage Vin is input to the positive input terminal (+) of the operational amplifier OPA1 via the resistor R1b.

[0016] Operational amplifier OPA1 amplifies the difference between the inputs (upper voltage Vip and lower voltage Vin) with the common voltage Vcm as the center voltage. The negative input terminal and the negative output terminal of operational amplifier OPA1 are connected by two resistors R20a and R21a connected in series. The positive input terminal and the positive output terminal are connected by two resistors R20b and R21b connected in series. And the connection point of the two resistors R20a and R21a and the connection point of the two resistors R20b and R21b are connected by a variable resistor R22.

[0017] In this way, preamplifier 10 is a fully differential amplifier, and its gain is determined by the resistance values of the above-mentioned resistors R20a, R21a, R20b, R21b, and R22. However, by changing the resistance value of the variable resistor R22, the gain of operational amplifier OPA1 can be changed. Therefore, operational amplifier OPA1 can be operated with a programmable gain setting. Let the voltage at the negative input terminal of operational amplifier OPA1 be Va, the voltage at the negative output terminal be Vc, and the voltage at the positive output terminal be Vb.

[0018] A common voltage suppressor 12 is connected to the positive and negative input terminals of operational amplifier OPA1. The negative input terminal of operational amplifier OPA1 is connected to the drain of an n-channel transistor M1. The positive input terminal of operational amplifier OPA1 is connected to the drain of an n-channel transistor M2. The gates of transistors M1 and M2 are connected. Between the drains of transistors M1 and M2, they are connected by resistors R6a and R6b connected in series, and the connection point of resistors R6a and R6b is connected to the gates of transistors M1 and M2. Also, the sources of transistors M1 and M2 are connected to the ground GND, which is a predetermined power supply.

[0019] In such a common voltage suppressor 12, it is advisable to use the same type of transistors for M1 and M2 and make the resistance values of resistors R6a and R6b the same. In this case, the transconductance of both transistors M1 and M2 is gm, and the common-mode impedance is 1 / gm. Also, the differential impedance is 2xR6 (R6a = R6b = R6).

[0020] Therefore, the voltage Va can be reduced to a low voltage by the attenuation due to the difference in magnitude between the resistors R1a, R1b and the in-phase impedance 1 / gm. That is, even if the input DC voltage is 40V, the voltage Va can be set near the threshold voltage Vth of the transistors M1 and M2.

[0021] In other words, even when the input DC component varies in the range from -2V to +40V, the negative input voltage Va and the common voltage Vcm of the preamplifier 10 can be maintained below 3V, which is the operating power supply voltage of the current sense amplifier 100.

[0022] In this way, the common voltage suppressor 12 is connected to the preamplifier 10 and consumes the common mode current flowing through the differential input of the preamplifier 10. Therefore, the preamplifier 10 only needs to respond to the differential signal from the input.

[0023] The post amplifier 14 has an operational amplifier OPA2 inside, and a pair of outputs Vb and Vc of the operational amplifier OPA1 are input. The outputs Vb and Vc are input to the negative input terminal (-) and the positive input terminal (+) of the operational amplifier OPA2 through the resistors R3a and R3b, respectively.

[0024] The operational amplifier OPA2 is a single-ended operational amplifier with one output, and an output Vout which is a voltage output can be obtained. And the output Vout becomes the output signal of the current sense amplifier 100. In this way, an output signal suitable for the ADC (Analog-to-Digital Converter) can be obtained by the operational amplifier OPA2.

[0025] Also, the output terminal and the negative input terminal of the operational amplifier OPA2 are connected by a feedback resistor R5. Further, a bias voltage Vbias is supplied to the negative input terminal of the operational amplifier OPA2 via a resistor R4a and to the positive input terminal via a resistor R4b. Let the voltage at the negative input terminal of the operational amplifier OPA2 be Vd.

[0026] With such a configuration, the post - amplifier 14 outputs an output Vout corresponding to the difference between the outputs Vb and Vc of the pre - amplifier 10. Also, the output Vout is offset according to the voltage Vbias.

[0027] Here, the voltage Vbias is supplied from the offset voltage switch 16. The offset voltage switch 16 can set the voltage Vbias to either the reference voltage Vref or the ground GND. Therefore, the offset voltage switch 16 can switch and apply two offset voltages to the output of the post - amplifier 14.

[0028] By making the common voltage Vcm of the pre - amplifier 10 proportional to the reference voltage Vref and keeping the ratio of the resistors R4a, R4b arranged in the supply path of the voltage Vbias and the resistors R3a, R3b arranged in the input path of the operational amplifier OPA2 constant, the offset voltage switch 16 with a simple configuration can set the desired offset voltage for the output of the post - amplifier 14. For example, the offset voltage of the output Vout can be selectively set to one of two offset values such as Vref / 2 and Vref / 8. Vref / 2 is suitable for bipolar operation, and Vref / 8 is suitable for unipolar operation. Note that the setting of the offset voltage will be described later.

[0029] "Regarding the functions of the pre - amplifier and the post - amplifier" <Gain of the pre - amplifier 10> The gain of the pre - amplifier 10 will be described. Assuming that the difference in the output of the pre - amplifier 10 is Vpreo, Vpreo = Vc - Vb That is.

[0030] Also, in this example, let R1a = R1b = R1, R20a = R20b = R20, and R21a = R21b = R21.

[0031] Here, assuming that the common voltage is 0V (Vcm = 0), Vip+Vin = 0.

[0032] Therefore, Vip = -Vin, Vc = -Vb, Va = 0 and the gain Gpre of the preamplifier 10 is expressed as follows. Gpre = Vpreo / (Vip - Vin) = Vc / Vip

[0033] Next, the gain adjustment by the variable resistor R22 will be described. Assuming Vip / R1 = i, the current on the negative side is ia, and the current on the positive side is ib, R20 * i = R22 * ia / 2, ia = i * 2 * R20 / R22 R21 * (i + ia) + R20 * i = Vc R21 * (i + 2 * i * R20 / R22) + R20 * i = Vc i * [R20 + R21 * (1 + 2 * R20 / R22)] = Vc Vip / R1 * [R20 + R21 * (1 + 2 * R20 / R22)] = Vc This results in.

[0034] Therefore, the gain Gpre of the preamplifier 10 is expressed as follows. Gpre = [R20 + R21 * (1 + 2 * R20 / R22)] / R1

[0035] Therefore, by adjusting the resistance value of the variable resistor R22, the gain of the preamplifier 10 can be adjusted.

[0036] When R22 = ∞, that is, when the variable resistor R22 is not provided, the feedback resistor is R20 + R21, and the normal gain is as follows.

[0037] Gpre = (R20 + R21) / R1

[0038] <Post - amplifier gain> The gain Gpost of the post - amplifier 14 will be described. Assume R3a = R3b = R3, R4a = R4b = R4.

[0039] The gain Gpost of the post - amplifier 14 is Gpost = Vout / (Vc - Vb) That is.

[0040] The outputs Vb and Vc of the pre - amplifier 10 are expressed as follows. Vb=-Vpreo / 2 + Vcm, Vc = Vpreo / 2 + Vcm

[0041] Assuming Vbias = 0 here, it becomes as follows. Vd = Vc*R4 / (R3 + R4) (Vout - Vd) / R5 = Vd / R4+(Vd - Vb) / R3 Vout - Vd = Vd*(R5 / R4 + R5 / R3)-Vb*R5 / R3 Vout = Vd*[1 + R5*(R3 + R4) / (R3*R4)]-Vb*R5 / R3 = Vc*R4*[1 / (R3 + R4)+R5 / (R3*R4)]-Vb*R5 / R3 =(Vpreo / 2 + Vcm)*[R4 / (R3 + R4)+R5 / R3] +(Vpreo / 2 - Vcm)*R5 / R3 =(Vpreo / 2)*[R4 / (R3 + R4)+2*R5 / R3] + Vcm*R4 / (R3 + R4) = Vpreo*[(R4 / 2) / (R3 + R4)+R5 / R3] + Vcm*R4 / (R3 + R4)

[0042] The gain of the post - amplifier 14 is Gpost = ΔVout / ΔVpreo That is, Gpost=(R4 / 2) / (R3 + R4)+R5 / R3 That is, the gain can be set by the resistance values of the resistors R3, R4, and R5.

[0043] <Regarding the offset voltage of the output Vout> When Vbias = 0, the output Vout is expressed as follows for the inputs Vip and Vin. Vout = Gpost * Gpre * (Vip - Vin) + Vcm * R4 / (R3 + R4)

[0044] Here, Vip = Vin. Therefore, the output Vout is expressed as follows. Vout = Vd = Vcm * R4 / (R3 + R4) + Vbias * R3 / (R3 + R4)

[0045] Consider the case where the offset voltage at Vout is set to Vref / 2 when Vref is selected by the offset voltage switch 16. When Vbias = Vref, Vout = Vref / 2 In this case,[[]] Vref / 2 = Vcm * R4 / (R3 + R4) + Vref * R3 / (R3 + R4) holds.

[0046] Next, consider the case where the offset voltage at Vout is set to Vref / 8 when GND is selected by the offset voltage switch 16. When Vbias = 0 and Vout = Vref / 8,[[]] Vref / 8 = Vcm * R4 / (R3 + R4) holds.

[0047] When both of the above two cases hold,[[]] Vref / 2 = Vref / 8 + Vref * R3 / (R3 + R4) 4 = 1 + 8 * r3 / (r3 + r4) 3 / 8 = R3 / (R3 + R4) R3:R4 = 3:5 results.

[0048] Therefore, by setting R3:R4 = 3:5, when Vref is selected by the offset voltage switch 16, the offset voltage of Vout can be set to Vref / 2, and when GND is selected by the offset voltage switch 16, the offset voltage of Vout can be set to Vref / 8.

[0049] Also, when such a setting is made, the common voltage Vcm of the preamplifier 10 is set to Vref / 5 as follows.

[0050] Vcm = Vref / 8 * (R3 + R4) / R4 = Vref / 8 * (3 + 5) / 5 = Vref / 5

[0051] Thus, in the current sense amplifier 100 shown in FIG. 1, when Vbias = 0, Vout = Gpost * Gpre * (Vip - Vin) + Vref / 8 and when Vbias = Vref, Vout = Gpost * Gpre * (Vip - Vin) + Vref / 2 and

[0052] Also, the gains of the post - amplifier 14 and the pre - amplifier 10 are expressed as follows. Gpost = 5 / (2 * 8) + R5 / R3 = R5 / R3 + 5 / 16 Gpre = [R20 + R21 * (1 + 2 * R20 / R22)] / R1

[0053] "Modification Example 1" FIG. 2 is a circuit diagram showing the configuration of Modification Example 1. In this example, the variable resistor R22 of the pre - amplifier 10 in FIG. 1 is removed. Therefore, it is not necessary to divide the resistors in the feedback path, and the resistors for negative feedback and positive feedback are each a single resistor R2a and R2b.

[0054] Here, if R2a = R2b = R2, the gain of the pre - amplifier 10 becomes Gpre = R2 / R1. Thus, Modification Example 1 is a single - gain amplifier in which the gain of the pre - amplifier 10 cannot be changed.

[0055] "Modification Example 2" Figure 3 is a circuit diagram showing the configuration of Modification 2. In this example, current sources I1 and I2 are added to the common voltage suppressor 12. That is, current sources I1 and I2 are connected to the drains of transistors M1 and M2 to ensure a constant current (bias current) in transistors M1 and M2.

[0056] Therefore, even when sufficient common-mode current is not supplied through inputs Vip and Vin, it is possible to prevent the operation of the common voltage suppressor 12 from becoming unstable.

[0057] "Modification 3" Figure 4 is a circuit diagram showing the configuration of Modification 3. In this example, current sources I1 and I2 are added to the common voltage suppressor 12 in the same manner as the configuration of Figure 3, and the feedback resistors of the preamplifier 10 are made into two, R2a and R2b, in the same manner as the configuration of Figure 2.

[0058] Furthermore, resistor R5a is employed as the negative feedback resistor of operational amplifier OPA2, and voltage Vcm is supplied to the positive input terminal via resistor R5b. Also, the offset voltage switch 16 and resistors R4a and R4b are removed. As a result, the gain of the post amplifier 14 is determined by resistors R3a and R5a, and the offset voltage is determined by resistors R3b and R5b.

Explanation of Reference Numerals

[0059] 1 Load, 2 Current Detection Resistor, 10 Preamplifier, 12 Common Voltage Suppressor, 14 Post Amplifier, 16 Offset Voltage Switch, 100 Current Sense Amplifier.

Claims

1. A current sense amplifier that receives an upper voltage and a lower voltage of a current detection resistor and obtains an output corresponding to a difference between the upper voltage and the lower voltage, including a common voltage suppressor that suppresses a common-mode voltage in the upper voltage and the lower voltage, wherein the common voltage suppressor includes a voltage dividing resistor that receives the upper voltage and the lower voltage at both ends to obtain a divided voltage, a first transistor having the upper voltage input to one end and the other end connected to a predetermined power supply, a second transistor having the lower voltage input to one end and the other end connected to a predetermined power supply, and a control terminal of the first transistor and a control terminal of the second transistor are commonly connected, and the divided voltage is input thereto. Current sense amplifier.

2. The current sense amplifier according to claim 1, wherein the first and second transistors are n-channel MOSFETs. Current sense amplifier.

3. The current sense amplifier according to claim 1, further including a preamplifier that receives the upper voltage and the lower voltage and obtains a positive output and a negative output corresponding to a voltage difference between the upper voltage and the lower voltage, and a postamplifier that receives the positive output and the negative output of the preamplifier and obtains an output corresponding to a difference between the positive output and the negative output. Current sense amplifier.

4. The current sense amplifier according to claim 3, wherein the postamplifier is supplied with a reference voltage, and an offset voltage of an output of the postamplifier is set by a combination of resistors that enter between an input terminal of the reference voltage and two outputs of the preamplifier. Current sense amplifier.

5. The current sense amplifier according to claim 4, wherein there are two types of the reference voltage and they are switchable. Current sense amplifier.

6. The current sense amplifier according to claim 1, further including a first constant current source that supplies a constant current to one end of the first transistor, and a second constant current source that supplies a constant current to one end of the second transistor. Current sense amplifier.

7. The current sense amplifier according to claim 6, wherein the first and second constant current sources are implemented by a current mirror circuit. Current sense amplifier.

8. The current sense amplifier according to claim 1, wherein the voltage dividing resistor is implemented by a resistor having a plurality of taps, and the divided voltage is obtained by selecting a tap. Current sense amplifier.

9. The current sense amplifier according to claim 1, wherein the voltage dividing resistor is implemented by a potentiometer. Current sense amplifier.

10. The current sense amplifier according to claim 1, wherein the first and second transistors are bipolar transistors. Current sense amplifier.

Citation Information

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