Analog-digital converter

The ADC design using electromagnetic waves, phase modulators, and non-linear signal conversion in a multiplexing unit addresses the limitations of conventional ADCs by enabling high-speed, low-power operation with multi-bit resolution.

JP2025112876AActive Publication Date: 2025-08-01KK TOYOTA CHUO KENKYUSHO
View PDF 8 Cites 0 Cited by

Patent Information

Application Number
JP2024007395
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-01-22
Publication Date
2025-08-01
Estimated Expiration
2044-01-22

AI Technical Summary

Technical Problem

Conventional analog-to-digital converters (ADCs) face limitations in achieving high resolution and high conversion frequency simultaneously due to the exponential increase in circuit scale and power consumption with higher resolution, making it impractical to implement beyond about 10 bits.

Method used

An ADC design utilizing electromagnetic continuous waves, phase modulators, a multiplexing unit for non-linear signal conversion, and binarizers to convert signals into a unique code sequence, which is then converted into an arbitrary code, allowing for high-speed operation while minimizing power consumption.

Benefits of technology

The proposed ADC achieves high-speed operation with reduced power consumption by processing analog signals into digital signals at the speed of light, completing primary quantization calculations in parallel and outputting a binary code sequence without significant power consumption.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2025112876000001_ABST
    Figure 2025112876000001_ABST
Patent Text Reader

Abstract

To make it possible to achieve a more high-speed operation while suppressing increase in power consumption.SOLUTION: An Analog-Digital converter comprises: a plurality of signal lines that transmits a source signal with an electromagnetic continuous wave as the source signal; a plurality of phase modulators that respectively modulates respective phases of the plurality of source signals in responce to an input signal; a multiplexor that has an input unit inputting a plurality of phase modulation signals having the phase modulated by the phase modulator, a multiplexing unit spatially and continuously multiplexing the plurality of phase modulation signals to be input to the input unit and causing the phase modulation signal a non-linear signal conversion, and one or more output units outputting a signal having the signal converted; and one or more binarizers that binarize respectively the signal output from the multiplexor at an arbitrary value.SELECTED DRAWING: Figure 1
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to an analog-to-digital converter.

Background Art

[0002] An analog-to-digital converter (ADC) that has been put into practical use is basically realized by a semiconductor integrated circuit that handles electrical (electronic) signals. Non-Patent Document 1 discloses a diagram showing the performance trends in each method of conventional electronic ADCs. The main performance indicators of an ADC are resolution and conversion frequency. However, as can be seen from the diagram disclosed in Non-Patent Document 1, it is difficult to achieve both high resolution and high conversion frequency, that is, to be included in the upper right region of the graph shown. Various ADC methods have been proposed and improvements have been made, but basically, "resolution × conversion frequency" generally determines the limit, and they are used appropriately according to the application. Despite years of worldwide research and development, in view of this current situation, this can also be considered, circumstantially, as a limit in using electrical signals.

[0003] The method that operates fastest among conventional electronic ADCs is the parallel type (flash type) disclosed in Non-Patent Document 2. In a parallel type ADC, when an analog signal voltage is input to the input terminal of the ADC for the analog signal, a "1" is output from a plurality of comparators according to the value of this voltage. The analog signal may be interpreted as an input signal. If the value of the voltage of the input signal is large, the number of comparators that output "1" increases, and if the value of the voltage of the input signal is small, the number of comparators that output "1" decreases. This is an output form like a so-called level meter (water level gauge). Such an input signal is instantaneously converted into a binary code sequence by parallel processing, so the conversion speed of the input signal is increased. However, this binary code sequence is not binary-coded. It simply divides the input voltage value by the number of comparators, so an encoder binary-codes that level value.

Prior Art Documents

Patent Documents

[0004]

Patent Document 1

Non-Patent Document

[0005]

Non-Patent Document 1

Non-Patent Document 2

Summary of the Invention

Problems to be Solved by the Invention

[0006] The parallel ADC disclosed in Non-Patent Document 2 is a type of ADC that operates the fastest among various ADCs, but as shown in Non-Patent Document 1, there is a limit to achieving high resolution. When trying to finely divide the input signal for high resolution, the voltage range borne by each comparator becomes smaller, and very high performance (such as voltage variation) is required for each of the multiple comparators. For example, when trying to divide a maximum 1V input signal into 10 bits (1024 gradations), the voltage range borne by each comparator is about 100 μV, and the variation in offset voltage must be made sufficiently lower than that.

[0007] In addition, the number of comparators increases exponentially with the resolution N (N is a natural number of 1 or more). For example, if a 10-bit ADC is to be used, 1023 comparators (2 to the power of N - 1) need to be arranged. Therefore, each time the resolution increases by 1 bit, the circuit scale and power consumption approximately double. In order to achieve high resolution in parallel type, a large number of high-precision comparators need to be arranged, which increases the circuit scale, power consumption, and cost. Therefore, such a configuration is practically impossible to implement (the upper limit of such a configuration is considered to be about 10 bits, for example). As described above, the prior art has room for improvement in realizing further high-speed operation while suppressing the increase in power consumption.

[0008] The present disclosure has been made in consideration of the above facts, and an object thereof is to provide an analog-to-digital converter capable of realizing further high-speed operation while suppressing an increase in power consumption.

Means for Solving the Problems

[0009] To achieve the above object, an analog-to-digital converter according to a first aspect includes a plurality of signal lines for transmitting a source signal using an electromagnetic continuous wave as the source signal, a plurality of phase modulators each modulating the phase of each of the plurality of source signals according to an input signal, an input unit for inputting a plurality of phase-modulated signals whose phases are modulated by the plurality of phase modulators, a multiplexing unit for spatially and continuously multiplexing the plurality of phase-modulated signals input to the input unit to cause a non-linear signal conversion in the phase-modulated signals, and one or more output units for outputting the signal signal-converted by the multiplexing unit, and a multiplexer having the multiplexer, and one or more binarizers each binarizing the signal output from the multiplexer with an arbitrary threshold value.

[0010] In the analog-to-digital converter according to the second aspect, the relationship of the phase differences between the plurality of phase-modulated signals input to the multiplexing unit is made different for a second input signal different from the first input signal.

[0011] The analog-to-digital converter according to the third aspect further includes a code converter that converts the binary code sequence output from the binarizer into an arbitrary code.

[0012] The analog-to-digital converter according to the fourth aspect is such that the multiplexing unit includes an object, a structure, or a mechanism that affects the signal in the process of propagation of the signal within the multiplexing unit.

[0013] In the analog-to-digital converter according to the fifth aspect, the influence includes at least one of refraction, reflection, diffraction, scattering, and deceleration of the signal within the multiplexing unit.

Advantages of the Invention

[0014] As described above, according to the present disclosure, it is possible to provide an analog-to-digital converter that can achieve further high-speed operation while suppressing an increase in power consumption.

Brief Description of the Drawings

[0015]

Figure 1

Figure 2A

Figure 2B

Figure 3A

Figure 3B

Figure 4

Figure 5

Embodiments for Carrying Out the Invention

[0016] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings. In each drawing, the same or equivalent components and parts are denoted by the same reference numerals. Also, the dimensional ratios in the drawings are exaggerated for the convenience of explanation and may be different from the actual ratios.

[0017] FIG. 1 is a diagram showing the configuration of an analog-digital converter 100 according to an embodiment of the present disclosure. The analog-digital converter 100 may be interpreted as a circuit that converts an analog input signal into a digital signal using an electromagnetic continuous wave as a source signal and outputs the converted signal to a digital processing circuit or the like.

[0018] The electromagnetic continuous wave as the source signal may be interpreted as an interferable wave, a coherent wave, a continuous wave (CW), etc. The electromagnetic continuous wave as the source signal may be interpreted, for example, as continuous light irradiated from a laser light source LD, and the continuous light may be interpreted as CW light, interferable light, coherent light, etc.

[0019] The analog-digital converter 100 may include a signal line 1, a distributor 2, a plurality of phase modulators 3, a plurality of signal lines 4, a combiner 5, a plurality of photodetectors 6, a current-voltage conversion circuit 7, one or more binarizers 8, a code converter 9, a voltage regulator 10, and a plurality of signal lines 11.

[0020] The signal line 1 may be interpreted as a waveguide for transmitting the source signal. The distributor 2 may divide the source signal (light) transmitted through the signal line 1 into M (M is a natural number of 1 or more) and output each of the divided source signals (light) to M signal lines 4. The plurality of signal lines 4 may be interpreted as waveguides for transmitting the source signal.

[0021] Each of the plurality of phase modulators 3 may be interpreted as a phase shifter that modulates (shifts) the phase of the source signal transmitted on the signal line 4. The plurality of phase modulators 3 may modulate the phase of each of the plurality of source signals according to the input signal. Specifically, the plurality of phase modulators 3 may change the amount of phase modulation of each of the plurality of source signals. The input signal may be interpreted as a signal input to the analog-to-digital converter 100, specifically, the output signal (analog signal) of the sensor.

[0022] The voltage regulator 10 may convert the input signal into a voltage signal (electrical signal, control signal) for controlling the plurality of phase modulators 3. The voltage regulator 10 may be composed of, for example, M voltage amplification amplifiers.

[0023] The multiplexer 5 may include an input section 51, a multiplexing section 52, and an output section 53.

[0024] The input section 51 may input a plurality of phase modulation signals whose phases are modulated by the phase modulator 3.

[0025] The multiplexing section 52 may spatially and continuously multiplex the plurality of phase modulation signals input to the input section 51, causing a non-linear signal conversion in the phase modulation signals.

[0026] The relationship of the phase differences between the plurality of phase modulation signals input to the multiplexing section 52 may be made different for a second input signal different from the first input signal.

[0027] The output section 53 may output the signal converted by the multiplexing section 52 to the signal line 11. The signal line 11 may be interpreted as a waveguide that transmits the signal converted by the multiplexing section 52.

[0028] Each of the plurality of photodetectors 6 may detect the amount of light of the signal (light) output to the signal line 11. The current-voltage conversion circuit 7 may convert the signal detected by the photodetector 6 into a voltage signal. Each of the one or more binarizers 8 may binarize the signal output from the multiplexing section 52, that is, the voltage signal converted by the current-voltage conversion circuit 7, at an arbitrary threshold value.

[0029] The symbol converter 9 may convert the binary code sequence output from one or more binarizers 8 into an arbitrary code by a sampling clock (electrical signal).

[0030] The operation of the analog-to-digital converter 100 will be described below.

[0031] The continuous light (source signal such as CW light, coherent light, and coherent light) emitted from the laser light source LD is carried by the waveguide (signal line 1), and the continuous light carried by the waveguide is divided into M by the distributor 2 and carried by M waveguides (signal lines 4) respectively. Usually, the light quantity is evenly divided into M.

[0032] The divided continuous light is phase-modulated (shifted) by the phase modulator 3 (phase shifter) installed in the middle of each waveguide (signal line 4).

[0033] The amount of phase modulation in the phase modulator 3 is usually controlled by an electrical signal (voltage, current, power). As described above, in the present disclosure, the output signal from the sensor is used as the input signal, and the amount of phase modulation changes according to its magnitude. However, the signal level output from the sensor (for example, several mV level) and the control signal level of the phase modulator 3 (for example, several V level) are usually different. Therefore, the voltage regulator 10 may convert the input signal into an appropriate level for controlling the phase modulator 3, and the amount of phase modulation may be controlled by the output control signal. In addition, since the output signal from a sensor or the like is usually single (1ch) or differential (2ch), the voltage regulator 10 may convert it into a voltage signal for controlling a plurality of phase modulators 3. The voltage regulator 10 may be composed of, for example, M voltage amplification amplifiers.

[0034] Each light (phase modulation signal) in the signal line 4 phase-modulated according to the input signal is input to the multiplexing unit 52 via the input unit 51 of the multiplexer 5, and M types of lights with different phases interfere complexly in the multiplexing unit 52. When interfering lights interfere, the light is converted into an amplitude (light intensity) signal corresponding to the phase difference. This phase difference and amplitude have a non-linear relationship, and the phase modulation signal is converted into non-linear amplitude information. The generated interference light further interferes with another interference light in the multiplexing unit 52, repeating the interference continuously and spatially. Further, for the purpose of generating a stronger non-linear signal, an object that inhibits the propagation of light may be installed in the multiplexing unit 52. Specifically, the multiplexing unit 52 may include an object, structure, or mechanism (hereinafter referred to as a structure, etc.) that affects the signal during the propagation process of the signal in the multiplexing unit 52. The influence may include at least one of refraction, reflection, diffraction, scattering, and deceleration of the signal in the multiplexing unit 52. Details of the structure, etc. will be described later.

[0035] The phase modulation signal (phase modulation light) input to the multiplexing unit 52 propagates through the multiplexing unit 52 while repeating a complex interference (non-linear conversion) process and reaches the output unit 53 provided on the opposite side.

[0036] N waveguides (signal lines 11) are connected to the output unit 53, and the arriving light is output from the waveguide (signal line 11) at that position, respectively. Then, the photodetector 6 detects the amount of light of the output light. In the photodetector 6, a current corresponding to the amount of light flows and is converted into a voltage signal by the current-voltage conversion circuit 7. Note that this process is merely a pre-process for binarizing the output signal from the multiplexer 5, and the present disclosure is not limited to this processing method.

[0037] Each signal (phase modulation signal) that has become a voltage signal is binarized by a binarizer 8 having an arbitrary threshold value and output in parallel as an N-bit digital (binary) code sequence. This threshold value may be different for each binarizer 8 according to the level of the signal output from each photodetector 6, etc.

[0038] Since the digital code at this time is a unique code generated based on the signal generated by the complex conversion in the multiplexing section 52, it is often difficult to use as it is. Therefore, this N-bit digital code may be converted into an arbitrary code sequence that is easy to handle a unique code sequence using a code converter 9 (such as a conversion table). However, when the subsequent digital processing circuit is configured to accept a unique code sequence, the code converter 9 is not essential.

[0039] In the present disclosure, from the input of the signal to the output of the unique code sequence, it is processed analogously and instantaneously in one go without being sampled (sampled). Therefore, sampling is performed by the last code converter 9 for input to the subsequent digital processing circuit.

[0040] Note that the multiplexing section 52, which is a configuration necessary for the ADC of the present disclosure to function, needs to have a different state of the phase difference between each phase modulation signal coming out of the phase modulator 3 if the values of the input signals are different (details will be described later). This is because if the same phase difference state occurs despite different values of the input signals, the same code sequence will be output, making it impossible to distinguish and precluding proper conversion.

[0041] (Structure, etc.) Here, the structure and the like included in the multiplexing unit 52 will be described. The structure and the like can be exemplified by the multiplexing unit 52 disclosed in Patent Document 1, for example. Specifically, the structure and the like may include two or more types of shapes, materials of two or more types of sizes, or materials having two or more different refractive indices. The structure and the like act on the propagation of the light after multiplexing. For example, it may act on the propagation of the light after multiplexing by preventing the propagation of the light after multiplexing, changing the propagation direction, or changing the propagation speed. The structure and the like may be composed of a material and a shape capable of scattering light or changing the propagation direction, or a material and a shape capable of changing the propagation speed of light. The structure and the like may be formed of a material different from that of the multiplexing unit 52 and may have a shape such as a perfect circle, an ellipse, a triangle, or a square. The structure and the like may be a region in which two different materials are alternately arranged at a period shorter than the wavelength. Further, the structure and the like may be a region of the same material as the multiplexing unit 52 but having different doping concentrations. With the structure and the like, the input optical signal can be output as different optical signals due to the difference in refractive index during propagation.

[0042] (Flow of signals in the analog-digital converter 100) Hereinafter, the signal flow in the analog-digital converter 100 will be described. In the present disclosure, the phase modulator 3 is controlled by an input signal (such as a control signal via the voltage regulator 10). By changing this input signal, the phase of the optical signal passing through each waveguide changes. For example, when the input signal (control signal) is a voltage, voltage-optical phase conversion will be performed. Each optical signal that has passed through the phase modulator 3 basically has the same light quantity (amplitude), and only the phase changes. Then, the lights with different phases proceed while interfering complexly in the multiplexing section 52 in the multiplexer 5. When interfering lights interfere with each other, the amplitude of the wave generated according to the phase difference between those lights changes. That is, phase-amplitude conversion occurs. This conversion is a non-linear conversion. Such non-linear conversion is continuously repeated in the multiplexing section 52, and finally, the optical signal reaches the output section 53. Then, the light quantity (amplitude) at the time of arrival is observed by the photodetector 6, and light quantity-current conversion is performed here. Further, current-voltage conversion is performed by a current-voltage conversion circuit 7 or the like. By binarizing this voltage with the binarizer 8, a parallel binary code sequence (digital bit sequence) is obtained. That is, at the moment when the input signal (control signal) is applied to the analog-digital converter 100, it is converted into a digital signal at approximately the speed of light.

[0043] (Requirements for functioning as an optical ADC) As described above, the requirement for the analog-digital converter 100 of the present disclosure to function as an optical ADC is that if the values of the input signals are different, the state of the phase difference between each phase modulation signal output from the phase modulator 3 is different. This is because if the same state of the phase difference occurs despite different values of the input signals, the same code sequence will be output, making it impossible to distinguish and impossible to perform appropriate conversion.

[0044] Referring to FIGS. 2A and 2B, the state of the phase difference between each phase modulation signal will be specifically described. FIGS. 2A and 2B are diagrams for explaining the state of the phase difference between each phase modulation signal. In the upper diagrams of FIGS. 2A and 2B, the phase of each phase modulation signal when the input signal (control signal) is 1.0 V and the phase difference between each phase modulation signal are shown. In the lower diagrams of FIGS. 2A and 2B, the phase of each phase modulation signal when the input signal (control signal) is 1.1 V and the phase difference between each phase modulation signal are shown.

[0045] As shown in FIG. 2A, when the voltage of the input signal (control signal) is changed from 1.0 V to 1.1 V, a change occurs in the phase of each phase modulation signal. However, the phase difference between each phase modulation signal is the same at 1.0 V and 1.1 V respectively. This means that the same phase difference state occurs for different input signals. When such phase modulation signals are input to the multiplexer 5 shown in FIG. 1, the signals output from the multiplexer 5 are the same, and the analog-to-digital converter 100 does not function as an optical ADC. That is, the analog-to-digital converter 100 should not have the phases of each phase modulation signal move in the same way (for example, all move 5° at once) in response to changes in the input signal.

[0046] On the other hand, FIG. 2B illustrates the case where the phase difference between each phase modulation signal is different at 1.0 V and 1.1 V respectively. As shown in FIG. 2B, in order to make the phase difference between each phase modulation signal different, it is necessary to generate different phase difference relationships (phase difference states) by the input signal. There are mainly two methods as shown below for generating different phase difference relationships.

[0047] (1) Arrange a plurality of phase modulators 3 having different characteristics (relationships) of voltage-phase change amounts. As a specific method, actually, due to manufacturing errors, the characteristics of each of the plurality of phase modulators 3 are not exactly the same. Therefore, there is a method of utilizing the manufacturing errors, but there are cases where the difference in characteristics is not so large. Thus, as another method, it is conceivable to intentionally make the design parameters of each of the plurality of phase modulators 3 different, actively give differences in characteristics, or mix and arrange a plurality of phase modulators 3 having different modulation principles themselves.

[0048] (2) When the characteristics of each of the plurality of phase modulators 3 cannot be actively changed as in the method of (1) above and the characteristics of each phase modulator 3 are substantially the same, the voltage regulator 10 may be configured to apply different control voltages to each phase modulator 3 with respect to the input signal. By making the control voltages applied to each phase modulator 3 different with respect to the change in the input signal, it is possible to prevent the same phase difference state from occurring.

[0049] Note that if different phase difference states can be generated with respect to the input signal, it is not limited to the above two methods.

[0050] (Unique code sequence) The binary code sequence output from the binarizer 8 of the present disclosure is a code sequence generated as a result of complex non-linear conversion in the interference field. Therefore, for example, even if the input signal is gradually increased, the output binary code sequence does not conform to the input, and the binarizer 8 outputs random values without regularity.

[0051] FIGS. 3A and 3B are diagrams showing the relationship between the input and output when the binary code sequence output from the binarizer 8 is converted to a decimal number. FIGS. 3A and 3B show the random values of the binary code sequence.

[0052] As shown in the right diagram of FIG. 3A, the output of the binarizer 8 becomes a unique code in which there is no regular output change with respect to the input, but the same output does not occur for different inputs.

[0053] This unique code may be converted by the code converter 9 into an easy-to-handle code with input-output correspondence as shown in the figure on the right side of FIG. 3B. Since the quantization itself, which has a high processing load (such as power consumption and processing time), is completed in the multiplexing unit 52, the processing load in the code converter 9 is negligible compared to the processing load of the multiplexing unit 52 and the like.

[0054] (First Modification Example) FIG. 4 is a diagram showing the configuration of the analog-digital converter 100A according to the first modification example. The difference between the analog-digital converter 100 shown in FIG. 1 and the analog-digital converter 100A shown in FIG. 4 is that the analog-digital converter 100A does not include the distributor 2 shown in FIG. 1, and continuous light irradiated from a plurality of laser light sources LD is input to the phase modulator 3. When the light amount of the signal output from the multiplexer 5 is low and there is a possibility that the signal cannot be detected by the photodetector 6, the configuration of the analog-digital converter 100A is effective. Note that since the analog-digital converter 100 shown in FIG. 1 can use continuous light irradiated from a single laser light source LD, the increase in the number of laser light sources LD can be suppressed, the manufacturing cost of the analog-digital converter 100 can be reduced, the increase in power consumption in the laser light source LD can be suppressed, and the size of the analog-digital converter 100 can be reduced.

[0055] (Second Modification Example) FIG. 5 is a diagram showing the configuration of the analog-digital converter 100B according to the second modification example. The difference between the analog-digital converter 100 shown in FIG. 1 and the analog-digital converter 100B shown in FIG. 5 is that the analog-digital converter 100B uses a plurality of output units 53, a plurality of signal lines 11, a plurality of photodetectors 6, and a plurality of current-voltage conversion circuits 7. Specifically, a signal line 11 is connected to each of the plurality of output units 53, a photodetector 6 and a current-voltage conversion circuit 7 are connected to each signal line 11, and a plurality of binarizers 8 are connected to each current-voltage conversion circuit 7. The information amount of a unique code sequence may be increased by using a plurality of binarizers 8 with different threshold values for the output of one photodetector 6.

[0056] (Others) In the present disclosure, as the coherent signal source, the light generated mainly from the laser light source LD is assumed. However, there is also a possibility that the ADC of the present disclosure can be implemented with radio waves radiated by an antenna.

[0057] The signal line 1, the signal line 4, and the signal line 11 are not limited to waveguides, and may be those capable of transporting light in a coherent state, such as optical fibers. Also, those capable of transporting light in a coherent state may be silicon waveguides, silicon nitride waveguides, etc. mounted on an optical integration circuit by silicon photonics. Note that when the signal medium is not light but an electrical high-frequency signal or the like, the signal line 1, the signal line 4, and the signal line 11 may be waveguides or the like.

[0058] The phase modulator 3 may be a modulator that changes the phase of the passing light by a temperature change due to a control signal (voltage, power, current). Also, the phase modulator 3 may be a modulator that changes the phase of the passing light by a change in carrier density due to a control signal (voltage, power, current). The means for changing the phase is not limited to the phase modulator 3. Also, the control signal does not have to be an electrical signal such as voltage. The control signal is not particularly limited as long as it affects the phase of the passing light.

[0059] The multiplexing section 52 of the multiplexer 5 may have any configuration as long as the input light interferes within its space and the light as a result of the interference exits to the output side. It is desirable that the interference light does not leak from outside the output-side waveguide. It is desirable that the light once entering the interference field does not return to the input-side waveguide. The number of inputs and the number of outputs do not have to match.

[0060] The current-voltage conversion circuit 7 may be realized by an amplification circuit such as a trans-impedance amplifier (TIA), or may be realized by a circuit composed of a simple resistor. However, when high-speed AD conversion is expected, a TIA is desirable.

[0061] The binarizer 8 is not limited in any way as long as it outputs 0 or 1 according to a certain threshold value. If adjustment of the threshold value is not necessary, logic elements such as a digital buffer or digital inverter fixed to a certain threshold value may be used.

[0062] The number of input bits and the number of output bits of the code converter 9 do not necessarily have to match.

[0063] (Effect, action) As described above, the analog-to-digital converters 100, 100A, and 100B of the present disclosure include a plurality of phase modulators 3, a multiplexer 5 that spatially and continuously multiplexes a plurality of phase modulation signals to cause a non-linear signal conversion in the phase modulation signal, and one or more binarizers 8 that binarize the signal output from the multiplexer 5 with an arbitrary threshold value.

[0064] With this configuration, due to the non-linear conversion action in the multiplexing unit 52 caused by interference of coherent signals or the like, the input phase information is converted into non-linear intensity information. In the process of light propagation in the multiplexing unit 52, the primary processing (calculation) necessary for quantizing the analog signal (input signal) is completed at the speed of light. Also, when the signal is input, the processing proceeds in parallel, and a binary code sequence with an arbitrary number of bits is output all at once. Further, the power consumption in the processing (calculation) process in the multiplexing unit 52 is substantially 0. Therefore, it is possible to realize a low-power consumption, high-speed operation, and multi-bit ADC that exceeds the performance limit line of an ADC realized by a conventional electronic (electrical) circuit.

[0065] Furthermore, the present disclosure is not limited to the above, and it goes without saying that various modifications can be made and implemented within the scope not departing from the gist thereof other than the above.

[0066] Regarding the above-described embodiments, the following additional remarks are further disclosed.

[0067] (Additional remark 1) Using an electromagnetic continuous wave as a source signal, a plurality of signal lines for transmitting the source signal, A plurality of phase modulators, each of which modulates the phase of each of the plurality of source signals according to an input signal; An input unit that inputs a plurality of phase-modulated signals whose phases are modulated by the plurality of phase modulators; a multiplexer that spatially and continuously multiplexes the plurality of phase-modulated signals input to the input unit to cause a non-linear signal conversion in the phase-modulated signals; and one or more output units that output the signal signal-converted by the multiplexer. One or more binary converters, each of which binarizes the signal output from the multiplexer with an arbitrary threshold value; An analog-to-digital converter comprising:

[0068] (Appendix 2) The analog-to-digital converter according to Appendix 1, wherein the relationship of the phase differences between the plurality of phase-modulated signals input to the multiplexer is made different for a second input signal different from the first input signal.

[0069] (Appendix 3) The analog-to-digital converter according to Appendix 1 or 2, further comprising a code converter that converts the binary code sequence output from the binary converter into an arbitrary code.

[0070] (Appendix 4) The analog-to-digital converter according to any one of Appendices 1 to 3, wherein the multiplexer includes an object, a structure, or a mechanism that affects the signal in the process of signal propagation in the multiplexer.

[0071] (Appendix 5) The analog-to-digital converter according to Appendix 4, wherein the influence includes at least one of refraction, reflection, diffraction, scattering, and deceleration of the signal in the multiplexer.

Explanation of Signs

[0072] 1 Signal line 2 Distributor 3 Phase modulator 4 Signal line 5 Multiplexer 6 Photodetector 7 Current-Voltage Conversion Circuit 8 Binary Converter 9 Sign Converter 10 Voltage Regulator 11 Signal Line 51 Input Section 52 Multiplexing Section 53 Output Section 100, 100A, 100B Analog-Digital Converters LD Laser Light Source

Claims

1. A plurality of signal lines for transmitting the source signal, with an electromagnetic continuous wave as the source signal; A plurality of phase modulators, each of which modulates the phase of each of the plurality of source signals according to an input signal; An input unit for inputting a plurality of phase-modulated signals whose phases are modulated by the plurality of phase modulators, a multiplexing unit for spatially and continuously multiplexing the plurality of phase-modulated signals input to the input unit to cause a non-linear signal conversion in the phase-modulated signals, and one or more output units for outputting the signals signal-converted by the multiplexing unit; a multiplexer having; One or more binarizers, each of which binarizes the signal output from the multiplexer at an arbitrary threshold; An analog-to-digital converter comprising:

2. The relationship of the phase differences between the plurality of phase-modulated signals input to the multiplexing unit is made different for a second input signal different from the first input signal. The analog-to-digital converter according to claim 1.

3. The analog-to-digital converter according to claim 1, further comprising a code converter for converting the binary code sequence output from the binarizer into an arbitrary code.

4. The multiplexing unit includes an object, a structure, or a mechanism that affects the signal in the process of signal propagation within the multiplexing unit. The analog-to-digital converter according to claim 1.

5. The influence includes at least one of refraction, reflection, diffraction, scattering, and deceleration of the signal within the multiplexing unit. The analog-to-digital converter according to claim 4.

Citation Information

Patent Citations

  • Optical quantizer based on multimode interference coupler

    CN112612168A

  • Optical signal processor

    JP2001255567A

  • Semiconductor optical modulation element and optical module

    JP2013168440A

  • Optical signal conversion device, and optical signal calculation system

    JP2022080891A

  • Multichannel analog-digital converter device for an optoelectronic sensor, method for signal modulation in an optoelectronic sensor and laser-based distance and / or speed sensor

    US20200200882A1