Display device

Abstract

To provide a semiconductor device comprising a thin film transistor improved in electric characteristics by using an oxide semiconductor layer and provide a method of manufacturing a semiconductor device which reduces the number of increasing processes by configuring a plurality of kinds of circuits by manufacturing a plurality of kinds of structures of thin film transistors on the same substrate.SOLUTION: A metal thin film is deposited on an insulation surface, an oxide semiconductor layer is then laminated and oxidization processing such as heating processing is performed thereafter, thereby oxidizing a part of or all the metal thin film. Thin film transistors of different structures are disposed in a circuit such as a logic circuit, in which high priority is given to high-speed operation, and a matrix circuit.SELECTED DRAWING: Figure 1

Description

Technical Field

[0001] A semiconductor device having a circuit composed of thin film transistors (hereinafter referred to as TFTs) and a method for manufacturing the same. For example, it relates to an electro-optical device typified by a liquid crystal display panel and an electronic device equipped with a light-emitting display device having an organic light-emitting element as a component.

[0002] In addition, in this specification, the semiconductor device refers to all devices that can function by utilizing semiconductor characteristics, and the electro-optical device, semiconductor circuit, and electronic device are all semiconductor devices.

Background Art

[0003] Metal oxides exist in various forms and are used in a variety of applications. Indium oxide is a well-known material and is used as a transparent electrode material required in liquid crystal displays and the like.

[0004] Some metal oxides exhibit semiconductor characteristics. Metal oxides that exhibit semiconductor characteristics are a type of compound semiconductor. A compound semiconductor is a semiconductor formed by the bonding of two or more kinds of atoms. Generally, metal oxides are insulators. However, depending on the combination of elements constituting the metal oxide, it is known to become a semiconductor.

[0005] For example, among metal oxides, tungsten oxide, tin oxide, indium oxide, zinc oxide, etc. are known to exhibit semiconductor characteristics. Thin film transistors having a transparent semiconductor layer made of such a metal oxide as a channel formation region have been disclosed (Patent Documents 1 to 4, Non-Patent Document 1).

[0006] Incidentally, metal oxides include not only single-component oxides but also multi-component oxides. For example, InGaO3(ZnO) with homologous phase m (m: natural number) is a known material (non Patent Documents 2 to 4).

[0007] The In-Ga-Zn oxide was used as the channel layer of a thin-film transistor. It has been confirmed that this is applicable (Patent Document 5, Non-Patent Documents 5 and 6).

[0008] In addition, thin film transistors are fabricated using oxide semiconductors and applied to electronic and optical devices. For example, zinc oxide and In-Ga-Z Thin-film transistors were fabricated using nO-based oxide semiconductors, and switching of image display devices was achieved. The technology used for the element is disclosed in Patent Documents 6 and 7. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] Japanese Patent Application Publication No. 1988-1986 [Patent Document 2] Japanese Patent Application Publication No. 8-264794 [Patent Document 3] Special Publication No. 11-505377 [Patent Document 4] Japanese Patent Application Laid-Open No. 2000-150900 [Patent Document 5] Japanese Patent Application Laid-Open No. 2004-103957 [Patent Document 6] Japanese Patent Application Laid-Open No. 2007-123861 [Patent Document 7] Japanese Patent Application Laid-Open No. 2007-096055 [Non-patent literature]

[0010] [Non-Patent Document 1] M. W. Prins, K. O. Grosse-Holz, G. Muller, J. F. M. Cillessen, J. B. Giesbers, R. P. Weening, and R. M. Wolf, "A ferroelectric transparent thin-film transistor", Appl. Phys. Lett., 17 June 1996, Vol.68 p.3650-3652 [Non-Patent Document 2] M. Nakamura, N. Kimizuka, and T. Mohri, "The Phase Relations in the In2O3-Ga2ZnO4-ZnO System at 1350℃", J. Solid State Chem., 1991, Vol.93, p.298-315 [Non-Patent Document 3] N. Kimizuka, M. Isobe, and M. Nakamura, "Syntheses and Single-Crystal Data of Homologous Compounds, In2O3(ZnO)m(m=3,4, and 5), InGaO3(ZnO)3, and Ga2O3(ZnO)m(m=7,8,9, and 16) in the In2O3-ZnGa2O4-ZnO System", J. Solid State Chem., 1995, Vol.116, p.170-178 [Non-Patent Document 4] Shinsuke Nakamura, Noboru Kimizuka, Hisahiko Mohri, Mitsumasa Ibe, "Synthesis and Crystal Structure of Homologous Phase, InFeO3(ZnO)m (m: natural number) and Its Isomorphic Compounds", Solid State Physics, 1993, Vol.28, No.5, p.317-327 [Non-Patent Document 5] K. Nomura, H. Ohta, K. Ueda, T. Kamiya, M. Hirano, and H. Hosono, "Thin-film transistor fabricated in single-crystalline transparent oxide semiconductor", SCIENCE, 2003, Vol.300, p.1269-1272

Non-Patent Document 6

Summary of the Invention

Problems to be Solved by the Invention

[0011] To provide a semiconductor device including a thin-film transistor having excellent electrical characteristics by using an oxide semiconductor layer is one of the problems.

[0012] Also, to provide a method for manufacturing a semiconductor device in which structures of a plurality of types of thin-film transistors are formed on the same substrate to form a plurality of types of circuits, and the number of increasing processes is small is one of the problems.

Means for Solving the Problems

[0013] After forming a metal thin film on an insulating surface, an oxide semiconductor layer thicker than the metal thin film is laminated and then, by performing an oxidation treatment such as a heat treatment, a part or all of the metal thin film is oxidized . As the metal thin film, a material showing a semiconductor by an oxidation treatment, for example, indium, zinc, tin It is preferable to use molybdenum or tungsten. The oxidized metal thin film is The first oxide semiconductor layer is formed, and the second oxide semiconductor layer is stacked thereon. The first oxide semiconductor layer has a higher electrical resistivity than the second oxide semiconductor layer. The first oxide semiconductor layer has a low conductivity (i.e., a high conductivity). The thin film transistor is placed on the side with the closest spacing and is in contact with at least the gate insulating film. By fabricating a thin film transistor with excellent electrical properties (such as field-effect mobility), A film transistor can be realized.

[0014] One of the configurations of the invention disclosed in this specification is to form a gate electrode on an insulating surface, An insulating layer is formed on the insulating layer, a metal thin film is formed on the insulating layer, and an oxide semiconductor layer is formed on the metal thin film. After the oxide semiconductor layer is formed, an oxidation treatment is performed to oxidize at least a part of the metal thin film. The present invention relates to a method for manufacturing a semiconductor device.

[0015] The above configuration solves at least one of the above problems.

[0016] The metal thin film is formed by sputtering, vacuum deposition, coating, or the like. The thickness of the thin film is greater than 0 nm and less than 10 nm, preferably greater than 3 nm and less than 5 nm. Also, a laminate of different metal thin films may be used, with the total thickness being 10 nm or less. Oxidizing at least a part of the metal thin film means that it functions as a thin film transistor and can be switched. In other words, the gate voltage is applied and the gate voltage is not applied. The current flowing between the source and drain electrodes remains almost constant, or the source electrode The metal thin film is oxidized so that the drain electrode is not brought into a conductive state.

[0017] The oxidation treatment may be carried out in an atmosphere containing oxygen, in the air, or in a nitrogen atmosphere. Heat treatment (200℃ to 600℃). Heat treatment should also be performed in a nitrogen atmosphere. The metal thin film is formed on the oxide semiconductor layer (second oxide semiconductor layer) in contact with the metal thin film. In this case, the presence of the metal thin film prevents the second oxide semiconductor from forming. Oxygen in the oxide layer is extracted, and oxygen vacancy regions can be formed in the second oxide semiconductor layer. In addition, the heat treatment is not limited to a nitrogen atmosphere, but may be performed in an oxygen-containing atmosphere or in the air. The presence of the metal thin film also causes oxygen to be extracted from the second oxide semiconductor layer, An oxygen vacancy region can be formed in the second oxide semiconductor layer. By forming the electron deficiency region, the field effect mobility can be improved. Depending on the material of the metal thin film, this heat treatment may cause a bond between the metal thin film and the oxide semiconductor layer formed on top. Although the interface may be unclear, the oxide semiconductor layer on the gate insulating layer side, i.e., the oxide semiconductor The lower part of the oxide semiconductor layer and the upper part of the oxide semiconductor layer have different electrical characteristics.

[0018] The second oxide semiconductor layer is an oxide semiconductor containing In, M, or Zn. , Ga, Fe, Ni, Mn, Co, or the like. However, M does not include elements such as Cd and Hg, i.e., substances that are toxic to the human body. In this specification, when Ga is used as M, this thin film is called In-G In this specification, In, Ga, and Zn are also referred to as a-Zn—O-based non-single crystal film. The semiconductor layer formed using the oxide semiconductor film containing is also referred to as an "IGZO semiconductor layer". Also , in the above oxide semiconductor, in addition to the metal element contained as M, Fe is included as an impurity element , Ni and other transition metal elements, or oxides of the transition metals are included in some cases. Also , the second oxide semiconductor layer may contain insulating impurities. As the impurities, insulating oxides typified by silicon oxide, germanium oxide, aluminum oxide, etc., insulating nitrides typified by silicon nitride, aluminum nitride, etc., or insulating oxynitrides such as silicon oxynitride, aluminum oxynitride are applied. These insulating oxides, insulating nitrides, or insulating oxynitrides are added at a concentration that does not impair the electrical conductivity of the oxide semiconductor . By including insulating impurities in the oxide semiconductor, crystallization of the oxide semiconductor can be suppressed. By suppressing the crystallization of the oxide semiconductor, it becomes possible to stabilize the characteristics of the thin film transistor .

[0019] By including impurities such as silicon oxide in the In-Ga-Zn-O-based oxide semiconductor, , even when heat treatment is performed at 300 °C to 600 °C, crystallization or generation of fine crystal grains of the oxide semiconductor can be prevented. In the manufacturing process of a thin film transistor having an In-Ga-Zn-O-based oxide semiconductor layer as a channel formation region, by performing heat treatment, it is possible to improve the S value (subthreshold swing value) and the field effect mobility, but even in such a case, it is possible to prevent the thin film transistor from becoming normally on . Also, even when thermal stress and bias stress are applied to the thin film transistor, fluctuation of the threshold voltage can be prevented.

[0020] In addition to the above, as an oxide semiconductor applied to the channel formation region of a thin film transistor, In -Sn-Zn-O system, In-Al-Zn-O system, Sn-Ga-Zn-O system, Al-Ga- Zn-O system, Sn-Al-Zn-O system, In-Zn-O system, Sn-Zn-O system, Al-Z n-O system, In-O system, Sn-O system, Zn-O system oxide semiconductors can be applied . That is, by adding impurities that suppress crystallization and keep these oxide semiconductors in an amorphous state, the characteristics of thin film transistors can be stabilized. The impurities are insulating oxides typified by silicon oxide, germanium oxide, aluminum oxide, etc., insulating nitrides typified by silicon nitride, aluminum nitride, etc., or insulating oxynitrides such as silicon oxynitride, aluminum oxynitride, etc.

[0021] For example, when forming a film of an In-Sn-Zn-O system oxide semiconductor added with silicon oxide by sputtering, a target obtained by sintering In2O3, SnO2, ZnO, and SiO2 in a predetermined ratio is used. Also, in the case of an In-Al-Zn- O system oxide semiconductor added with silicon oxide, a film is formed using a target obtained by sintering In2O3, Al2O3, ZnO, and Si O2 in a predetermined ratio.

[0022] Also, as an oxide semiconductor applied to the n + layer of a thin film transistor, an In -Ga-Zn-O based non-single crystal film containing nitrogen, that is, an In-Ga-Zn-O―N based non-single crystal film (also called an IGZO N film) may be used. This In-Ga-Zn-O―N based non-single crystal film is a target composed of an oxide containing indium, gallium, and zinc in an atmosphere containing nitrogen gas ​​​​​ It is obtained by heat-treating an oxynitride film containing indium, gallium, and zinc formed using a sputtering method.

[0023] Further, the film thickness of the second oxide semiconductor layer is preferably at least thicker than the film thickness of the metal thin film. For example, it is 2 times or more the film thickness of the metal thin film, specifically 30 nm or more, and preferably 60 nm or more and 150 nm or less. Further, the second oxide semiconductor layer preferably contains at least one of the same elements as the metal thin film. If the second oxide semiconductor layer contains at least one of the same elements as the metal thin film, the second oxide semiconductor layer and the metal thin film can be removed in the same etching step using the same etching solution or etching gas, so the number of steps can be reduced.

[0024] Further, by fabricating a matrix circuit and a drive circuit on the same substrate, the manufacturing cost of the semiconductor device is reduced. The drive circuit includes, for example, a circuit that prioritizes high-speed operation such as a logic circuit. Such a circuit is configured using a thin film transistor using a stack of a first oxide semiconductor layer and a second oxide semiconductor layer, and the matrix circuit constituting the pixel portion is configured using a thin film transistor using a single layer of a third oxide semiconductor layer. By doing so, thin film transistors with different structures can be arranged for a circuit that prioritizes high-speed operation such as a logic circuit and the matrix circuit.

[0025] Another configuration of the other invention has a matrix circuit on an insulating surface and a drive circuit that drives the matrix circuit. The drive circuit has a stack of a first oxide semiconductor layer and a second oxide semiconductor layer that overlaps with a first gate electrode via a first gate insulating film. A first thin film transistor ​​​​​​​​​​It has a resistor, and the matrix circuit has a second thin film transistor having a third oxide semiconductor layer overlapping with a second gate electrode through a second gate insulating film. The first oxide semiconductor layer and the second oxide semiconductor layer are made of different materials, and the semiconductor device is such that the second oxide semiconductor layer and the third oxide semiconductor layer are made of the same material.

[0026] The above configuration solves at least one of the above problems.

[0027] In the above configuration, the first thin film transistor has a first gate insulating film on the first gate electrode, a first oxide semiconductor layer on the first gate insulating film, and a second oxide semiconductor layer on the first oxide semiconductor layer. The electrical resistivity of the first oxide semiconductor layer is lower than that of the second oxide semiconductor layer. Also, in the above configuration, the second thin film transistor has a second gate insulating film on the second gate electrode and a third oxide semiconductor layer on the second gate insulating film.

[0028] Also, a manufacturing process for obtaining the above configuration is also one of the inventions, and its configuration is a method for manufacturing a semiconductor device having a matrix circuit and a drive circuit for driving the matrix circuit on the same substrate. A first oxide semiconductor layer is formed on the matrix circuit region and the drive circuit region of the substrate, etching is performed to remove the first oxide semiconductor layer on the matrix circuit region, a second oxide semiconductor layer is formed on the first oxide semiconductor layer in the drive circuit region, and a third oxide semiconductor layer is formed on the matrix circuit region. A method for manufacturing a semiconductor device is provided, in which a first thin film transistor using a stack of the first oxide semiconductor layer and the second oxide semiconductor layer is formed in the drive circuit region, and a second thin film transistor using the third oxide semiconductor layer is formed in the matrix circuit region. ​​​​​​​​​​​​​

[0029] Alternatively, the first oxide semiconductor layer can be formed by oxidizing a selectively formed metal thin film. This manufacturing process is also one of the inventions, and the configuration is such that a matrix circuit and the corresponding A method for manufacturing a semiconductor device having a driver circuit for driving a matrix circuit, a metal thin film formed on the pixel circuit region and the drive circuit region; The oxide semiconductor layer is then removed by etching, and the oxide semiconductor layer is then removed from the metal thin film in the driver circuit area and the matrix. After forming the oxide semiconductor layer on the semiconductor circuit area, the metal thin film is oxidized to form a drive circuit. A first thin film transistor using a stack of a first oxide semiconductor layer and a second oxide semiconductor layer in an operating circuit region. a second thin-film transistor using a third oxide semiconductor layer in the matrix circuit region; The present invention relates to a method for manufacturing a semiconductor device in which a stator is formed.

[0030] In each of the configurations relating to the above-described manufacturing method, the electrical resistivity of the first oxide semiconductor layer is The electrical resistivity of the oxide semiconductor layer is lower than that of the oxide semiconductor layer. The first oxide semiconductor layer and the second oxide semiconductor layer are made of different materials. The materials of the oxide semiconductor layers of 3 are the same.

[0031] In this specification, terms indicating directions such as top, bottom, side, horizontal, vertical, etc. refer to the direction of a device on a substrate surface. This refers to the direction based on the board surface when the chair is placed. [Effects of the Invention]

[0032] A semiconductor device including a thin film transistor with excellent electrical characteristics using a stacked oxide semiconductor layer is provided. It can be achieved.

[0033] In addition, a thin-film transistor having a stacked oxide semiconductor layer on the same substrate and a thin-film transistor having a single-layer oxide semiconductor layer can be fabricated to form a plurality of types of circuits.

Brief Description of the Drawings

[0034]

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MODE FOR CARRYING OUT THE INVENTION

[0035] One embodiment of the present invention will be described below.

[0036] One embodiment will be described in detail with reference to the drawings. However, it is not limited to the following description and it will be easily understood by those skilled in the art that the form and details can be variously changed without departing from the spirit and its scope Therefore, it should not be construed as being limited to the description of the embodiments shown below. In the configurations described below, the same parts or parts having the same functions are commonly used with the same reference numerals among different drawings, and the repeated description thereof will be omitted

[0037] (Embodiment 1) FIG. 1(A), FIG. 1(B), FIG. 1(C), and FIG. 1(D) show an example of a manufacturing example in which a first thin film transistor 430 used for a driving circuit and a second thin film transistor 170 used for a pixel portion (also called a matrix circuit) are provided on the same substrate. In the present embodiment, thin film transistors having different structures are formed on the same substrate, and high-speed operation is possible

[0038] ​​​​A novel structure having a driving circuit and a pixel portion with a thin-film transistor having a large on-off ratio, and a novel manufacturing method are provided. Further, in the present embodiment, a novel manufacturing method of a thin-film transistor having a channel formation region formed by laminating oxide semiconductor layers is also provided.

[0039] The driving circuit for driving the pixel portion requires high-speed driving and is configured using an inverter circuit, a capacitor, or a resistor or the like. When forming an inverter circuit by combining two n-channel type TFTs, there are cases where it is formed by combining an enhancement type transistor and a depletion type transistor (hereinafter referred to as an EDMOS circuit), and cases where it is formed by enhancement type TFTs (hereinafter referred to as an EEMOS circuit). When the threshold voltage of the n-channel type TFT is positive, it is defined as an enhancement type transistor, and when the threshold voltage of the n-channel type TFT is negative, it is defined as a depletion type transistor, and this specification shall follow this definition throughout.

[0040] Also, the thin-film transistor of the pixel portion requires a large on-off ratio in order to switch the application of voltage to the pixel electrode on and off. The on-off ratio is the ratio of the off-current to the on-current (I O N OFF / I) and the larger it is, the better the switching characteristics are, which contributes to improving the contrast of the display. The on-current refers to the current flowing between the source ) and the drain electrodes when the transistor is in the on state. The off-current refers to the current flowing between the source electrode and the drain electrode when the transistor is in the off state. For example, in the case of an n-type transistor, when the gate voltage is lower than the threshold voltage of the transistor, the source electrode and the drain electrode are in a state where current does not flow.​​​​​ It is the current flowing between the source electrode and the drain electrode. Thus, in order to achieve high contrast and low power consumption driving, it is preferable to use an enhancement type transistor in the pixel portion. In order to achieve high contrast and low power consumption driving, it is preferable to use an enhancement type transistor in the pixel portion.

[0041] As described above, since the prioritized electrical characteristics are different between the pixel portion and the driving circuit, it is preferable to use thin film transistors having different structures. In this embodiment, an example of the manufacturing method is shown below. In this embodiment, an example of the manufacturing method is shown below.

[0042] First, a first gate electrode 401 and a second gate electrode 101 are provided on a substrate 400 having an insulating surface. The materials of the first gate electrode 401 and the second gate electrode 101 can be formed as a single layer or laminated using a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, scandium, or an alloy material mainly composed of these. The materials of the first gate electrode 401 and the second gate electrode 101 can be formed as a single layer or laminated using a metal material such as molybdenum, titanium, chromium, tantalum, tungsten, aluminum, copper, neodymium, scandium, or an alloy material mainly composed of these. For example, as a two-layer laminated structure of the first gate electrode 401 and the second gate electrode 101, a two-layer laminated structure in which a molybdenum layer is laminated on an aluminum layer, or a two-layer structure in which a molybdenum layer is laminated on a copper layer, or a two-layer structure in which a titanium nitride layer or a tantalum nitride layer is laminated on a copper layer, or a two-layer structure in which a titanium nitride layer and a molybdenum layer are laminated is preferable. Also, there is a lamination of a copper oxide layer containing Ca as a barrier layer on a copper layer containing Ca, or a lamination of a copper oxide layer containing Mg as a barrier layer on a copper layer containing Mg. Further, as a three-layer laminated structure, a tungsten layer or a tungsten nitride layer, an alloy layer of aluminum and silicon or an alloy layer of aluminum and titanium, and a titanium nitride layer or a titanium layer are laminated. For example, as a two-layer laminated structure of the first gate electrode 401 and the second gate electrode 101, a two-layer laminated structure in which a molybdenum layer is laminated on an aluminum layer, or a two-layer structure in which a molybdenum layer is laminated on a copper layer, or a two-layer structure in which a titanium nitride layer or a tantalum nitride layer is laminated on a copper layer, or a two-layer structure in which a titanium nitride layer and a molybdenum layer are laminated is preferable. Also, there is a lamination of a copper oxide layer containing Ca as a barrier layer on a copper layer containing Ca, or a lamination of a copper oxide layer containing Mg as a barrier layer on a copper layer containing Mg. Further, as a three-layer laminated structure, a tungsten layer or a tungsten nitride layer, an alloy layer of aluminum and silicon or an alloy layer of aluminum and titanium, and a titanium nitride layer or a titanium layer are laminated.

[0043] For example, as a two-layer laminated structure of the first gate electrode 401 and the second gate electrode 101, a two-layer laminated structure in which a molybdenum layer is laminated on an aluminum layer, or a two-layer structure in which a molybdenum layer is laminated on a copper layer, or a two-layer structure in which a titanium nitride layer or a tantalum nitride layer is laminated on a copper layer, or a two-layer structure in which a titanium nitride layer and a molybdenum layer are laminated is preferable. For example, as a two-layer laminated structure of the first gate electrode 401 and the second gate electrode 101, a two-layer laminated structure in which a molybdenum layer is laminated on an aluminum layer, or a two-layer structure in which a molybdenum layer is laminated on a copper layer, or a two-layer structure in which a titanium nitride layer or a tantalum nitride layer is laminated on a copper layer, or a two-layer structure in which a titanium nitride layer and a molybdenum layer are laminated is preferable. For example, as a two-layer laminated structure of the first gate electrode 401 and the second gate electrode 101, a two-layer laminated structure in which a molybdenum layer is laminated on an aluminum layer, or a two-layer structure in which a molybdenum layer is laminated on a copper layer, or a two-layer structure in which a titanium nitride layer or a tantalum nitride layer is laminated on a copper layer, or a two-layer structure in which a titanium nitride layer and a molybdenum layer are laminated is preferable. For example, as a two-layer laminated structure of the first gate electrode 401 and the second gate electrode 101, a two-layer laminated structure in which a molybdenum layer is laminated on an aluminum layer, or a two-layer structure in which a molybdenum layer is laminated on a copper layer, or a two-layer structure in which a titanium nitride layer or a tantalum nitride layer is laminated on a copper layer, or a two-layer structure in which a titanium nitride layer and a molybdenum layer are laminated is preferable. For example, as a two-layer laminated structure of the first gate electrode 401 and the second gate electrode 101, a two-layer laminated structure in which a molybdenum layer is laminated on an aluminum layer, or a two-layer structure in which a molybdenum layer is laminated on a copper layer, or a two-layer structure in which a titanium nitride layer or a tantalum nitride layer is laminated on a copper layer, or a two-layer structure in which a titanium nitride layer and a molybdenum layer are laminated is preferable. For example, as a two-layer laminated structure of the first gate electrode 401 and the second gate electrode 101, a two-layer laminated structure in which a molybdenum layer is laminated on an aluminum layer, or a two-layer structure in which a molybdenum layer is laminated on a copper layer, or a two-layer structure in which a titanium nitride layer or a tantalum nitride layer is laminated on a copper layer, or a two-layer structure in which a titanium nitride layer and a molybdenum layer are laminated is preferable. For example, as a two-layer laminated structure of the first gate electrode 401 and the second gate electrode 101, a two-layer laminated structure in which a molybdenum layer is laminated on an aluminum layer, or a two-layer structure in which a molybdenum layer is laminated on a copper layer, or a two-layer structure in which a titanium nitride layer or a tantalum nitride layer is laminated on a copper layer, or a two-layer structure in which a titanium nitride layer and a molybdenum layer are laminated is preferable. For example, as a two-layer laminated structure of the first gate electrode 401 and the second gate electrode 101, a two-layer laminated structure in which a molybdenum layer is laminated on an aluminum layer, or a two-layer structure in which a molybdenum layer is laminated on a copper layer, or a two-layer structure in which a titanium nitride layer or a tantalum nitride layer is laminated on a copper layer, or a two-layer structure in which a titanium nitride layer and a molybdenum layer are laminated is preferable. ​​​This is preferable.

[0044] Next, a gate insulating layer 403 is formed to cover the first gate electrode 401 and the second gate electrode 101. The gate insulating layer 403 is formed by using a sputtering method, a PCVD method, etc., and the film thickness is set to 50 to 400 nm.

[0045] For example, a silicon oxide film is used as the gate insulating layer 403 and formed with a thickness of 100 nm by a sputtering method. Of course, the gate insulating layer 403 is not limited to such a silicon oxide film, and other insulating films such as a silicon oxynitride film, a silicon nitride film, an aluminum oxide film, an aluminum nitride film, an aluminum oxynitride film, and a tantalum oxide film can be used, and it may be formed as a single-layer or laminated structure made of these materials. When laminating, for example, a silicon nitride film is formed by a PCVD method, and a silicon oxide film is formed thereon by a sputtering method. Also, when a silicon oxynitride film, a silicon nitride film, etc. are used as the gate insulating layer 403, impurities from the glass substrate, such as sodium, can be blocked from diffusing and penetrating into the oxide semiconductor formed later above.

[0046] In addition, it is also possible to form a silicon oxide layer as the gate insulating layer 403 by a CVD method using an organic silane gas. As the organic silane gas, ethyl silicate (TEOS: chemical formula Si(OC2H5)4), tetramethylsilane (TMS: chemical formula Si(CH3)4), tetramethylcyclotetrasiloxane (TMCTS), octamethylcyclotetrasiloxane (OMCTS), hexamethyldisilazane (HMDS), triethoxysilane (Si H(OC2H5)3), tris(dimethylamino)silane (SiH(N(CH3)2)3), etc. ​ A silicon-containing compound can be used.

[0047] Next, a metal thin film such as indium, zinc, tin, molybdenum, or tungsten is formed on the gate insulating layer 403. Also, these alloy thin films or these laminated films can be used. The metal thin film is formed by a sputtering method, a vacuum evaporation method, or a coating method. Here, an indium film is formed to be thicker than 0 nm and 10 nm or less, preferably 3 nm or more and 5 nm or less by the evaporation method. Note that, as the metal thin film, an oxide having a lower electrical resistivity than the oxide semiconductor layer formed later in contact with the metal thin film after heat treatment is used. Depending on the material and film formation conditions of the metal thin film, instead of a film covering the surface of the gate insulating layer 403, a part of the gate insulating layer 403 may be exposed, for example, when the metal is dispersed in a cluster form. Even when the metal is dispersed in a cluster form, if it becomes an oxide semiconductor by subsequent oxidation treatment, the field mobility of the thin film transistor can be improved. Also, when dispersing the metal in a cluster form, the metal is not limited to the materials described above, and aluminum, copper, etc. can be used, and further, by forming a metal thin film of indium thereon, the electrical characteristics of the thin film transistor can be improved. Next, the metal thin film is selectively removed using photolithography technology. For this removal process, wet etching or dry etching can be used. In this way, the metal thin film 470 is provided in the drive circuit region. A cross-sectional process diagram showing the state at this stage corresponds to FIG. 1(A). Note that, when using photolithography technology, since the metal thin film is exposed to the atmosphere, gold When the metal is dispersed in a cluster form, even if it becomes an oxide semiconductor by subsequent oxidation treatment, the field mobility of the thin film transistor can be improved. Also, when dispersing the metal in a cluster form, the metal is not limited to the materials described above, and aluminum, copper, etc. can be used, and further, by forming a metal thin film of indium thereon, the electrical characteristics of the thin film transistor can be improved. Furthermore, not limited to the materials described above, aluminum, copper, etc. can be used, and by forming a metal thin film of indium thereon, the electrical characteristics of the thin film transistor can be improved. Next, the metal thin film is selectively removed using photolithography technology. For this removal process, wet etching or dry etching can be used. In this way, the metal thin film 470 is provided in the drive circuit region. A cross-sectional process diagram showing the state at this stage corresponds to FIG. 1(A). Note that, when using photolithography technology, since the metal thin film is exposed to the atmosphere, gold

[0048] Next, the metal thin film is selectively removed using photolithography technology. For this removal process, wet etching or dry etching can be used. In this way, the metal thin film 470 is provided in the drive circuit region. A cross-sectional process diagram showing the state at this stage corresponds to FIG. 1(A). Note that, when using photolithography technology, since the metal thin film is exposed to the atmosphere, gold region. A cross-sectional process diagram showing the state at this stage corresponds to FIG. 1(A). Note that, when using photolithography technology, since the metal thin film is exposed to the atmosphere, gold corresponds to. Note that, when using photolithography technology, since the metal thin film is exposed to the atmosphere, gold Depending on the material of the thin film, a natural oxide film is formed on the surface. Even if a natural oxide film is formed, it can function as part of the oxide semiconductor layer.

[0049] Also, by using a shadow mask in the sputtering method, areas other than the desired area can be shielded, and a metal thin film can be formed only in the desired area. Further, an oxide semiconductor layer can be formed on the metal thin film without exposing it to the atmosphere by using a shadow mask in the sputtering method. By doing so, the interface between the metal thin film and the oxide semiconductor layer can be kept clean, and the number of photomasks can be reduced.

[0050] Next, an oxide semiconductor layer is formed on the metal thin film 470 and on the gate insulating layer 403. The film thickness of the oxide semiconductor layer is preferably thicker than the film thickness of the metal thin film 470. Specifically, it is 30 nm or more, preferably 60 nm or more and 150 nm or less. In this embodiment, a first In-Ga-Zn-O based non-single crystal film is formed as the oxide semiconductor layer. An oxide semiconductor target containing In (indium), Ga (gallium), and Zn (zinc) with a diameter of 8 inches (molar ratio In2O3:Ga2O3:ZnO = 1:1:1) is used, and the distance between the substrate and the target is 170 mm, the pressure is 0.4 Pa, the DC (direct current) power supply is 0.5 kW, and the film is formed in an argon or oxygen atmosphere. Note that using a pulsed DC power supply is preferable because dust can be reduced and the film thickness distribution becomes uniform.

[0051] When forming an In-Ga-Zn-O based oxide semiconductor layer by the sputtering method, even if an insulating impurity is included in the oxide semiconductor target containing In, Ga, and Zn, Good. The impurities include insulating oxides typified by silicon oxide, germanium oxide, aluminum oxide, etc., insulating nitrides typified by silicon nitride, aluminum nitride, etc., or insulating oxynitrides such as silicon oxynitride, aluminum oxynitride, etc. For example, it is preferable to include SiO2 in the oxide semiconductor target in a proportion of 0.1% by weight or more and 10% by weight or less, preferably 1% by weight or more and 6% by weight or less. By including insulating impurities in the oxide semiconductor, it becomes easier to amorphize the formed oxide semiconductor. Further, when the oxide semiconductor film is heat-treated, crystallization can be suppressed. In addition to the In-Ga-Zn-O-based oxide semiconductor, the same effect can be obtained by including insulating impurities in oxide semiconductors such as In-Sn-Zn-O-based, In-Al-Zn-O-based, Sn-Ga-Zn-O-based, Al-Ga-Zn-O-based, Sn-Al-Zn-O-based, In-Zn-O-based, Sn-Zn-O-based, Al-Zn-O-based, In-O-based, Sn-O-based, and Zn-O-based. For example, when forming a film of an In-Sn-Zn-O-based oxide semiconductor added with silicon oxide by sputtering, a target obtained by sintering In2O3, SnO2, ZnO, and SiO2 in a predetermined ratio is used. Also, in the case of an In-Al-Zn-O-based oxide semiconductor added with silicon oxide, a film is formed using a target obtained by sintering In2O3, Al2O3, ZnO, and SiO2 in a predetermined ratio.

[0052]

[0053] In addition to the In-Ga-Zn-O-based oxide semiconductor, for oxide semiconductors such as In-Sn-Zn-O-based, In-Al-Zn-O-based, Sn-Ga-Zn-O-based, Al-Ga-Zn-O-based, Sn-Al-Zn-O-based, In-Zn-O-based, Sn-Zn-O-based, Al-Zn-O-based, In-O-based, Sn-O-based, and Zn-O-based, the same effect can be obtained by including insulating impurities.

[0054] For example, when forming a film of an In-Sn-Zn-O-based oxide semiconductor added with silicon oxide by sputtering, a target obtained by sintering In2O3, SnO2, ZnO, and SiO2 in a predetermined ratio is used.

[0055] Next, without exposing to the atmosphere, an oxide semiconductor film having a lower resistance than the first In-Ga-Zn-O based non-single crystal film (the second In-Ga-Zn-O based non-single crystal film in the present embodiment) is formed by sputtering. Here, a target with In2O3:Ga2O3:ZnO = 1:1:1 is used, and the film formation conditions are as follows: the pressure is 0.4 Pa, the power is 500 W, the film formation temperature is room temperature , and argon gas flow rate of 40 sccm is introduced to perform sputtering film formation. Despite intentionally using a target with In2O3:Ga 2O3:ZnO = 1:1:1, an In-Ga-Zn-O based non-single crystal film containing crystal grains with a size of 1 nm to 10 nm may be formed immediately after film formation. Note that the component ratio of the target, the film formation pressure (0.1 Pa to 2.0 Pa), the power (250 W to 3000 W: 8-inch φ), the temperature (room temperature to 100 °C), the film formation conditions of reactive sputtering, etc. can be appropriately adjusted so that the presence or absence of crystal grains, the density of crystal grains, and the diameter size can be said to be adjustable in the range of 1 nm to 10 nm. The film thickness of the second In-Ga-Zn-O based non-single crystal film is set to 5 nm to 20 nm. Of course, when crystal grains are contained in the film, the size of the contained crystal grains does not exceed the film thickness. In the present embodiment, the film thickness of the second In-Ga- Zn-O based non-single crystal film is 5 nm. The film formation conditions of the first In-Ga-Zn-O based non-single crystal film are made different from those of the second In-Ga-Zn-O based non-single crystal film. For example, the ratio of the oxygen gas flow rate to the argon gas flow rate in the film formation conditions of the second In-Ga-Zn-O based non-single crystal film is set such that the ratio of the oxygen gas flow rate in the film formation conditions of the first In-Ga-Zn-O based non-single crystal film is higher. Specifically, the first ... By appropriately adjusting the film formation conditions such as the film formation conditions of the first In-Ga-Zn-O based non-single crystal film, the presence or absence of crystal grains, the density of crystal grains, and the diameter size can be adjusted within the range of 1 nm to 10 nm. The film thickness of the second In-Ga-Zn-O based non-single crystal film is set to 5 nm to 20 nm. Of course, when crystal grains are contained in the film, the size of the contained crystal grains does not exceed the film thickness. In the present embodiment, the film thickness of the second In-Ga-Zn-O based non-single crystal film is 5 nm. The film formation conditions of the first In-Ga-Zn-O based non-single crystal film are made different from those of the second In-Ga-Zn-O based non-single crystal film. For example, the ratio of the oxygen gas flow rate to the argon gas flow rate in the film formation conditions of the second In-Ga-Zn-O based non-single crystal film is set such that the ratio of the oxygen gas flow rate in the film formation conditions of the first In-Ga-Zn-O based non-single crystal film is higher. Specifically, the first ... The film formation conditions of the first In-Ga-Zn-O based non-single crystal film are made different from those of the second In-Ga-Zn-O based non-single crystal film. For example, the ratio of the oxygen gas flow rate to the argon gas flow rate in the film formation conditions of the second In-Ga-Zn-O based non-single crystal film is set such that the ratio of the oxygen gas flow rate in the film formation conditions of the first In-Ga-Zn-O based non-single crystal film is higher. Specifically, the first ...

[0056] The first In-Ga-Zn-O based non-single crystal film is made different from the film formation conditions of the second In-Ga-Zn-O based non-single crystal film. For example, the ratio of the oxygen gas flow rate in the film formation conditions of the first In-Ga-Zn-O based non-single crystal film is made higher than the ratio of the oxygen gas flow rate to the argon gas flow rate in the film formation conditions of the second In-Ga-Zn-O based non-single crystal film. Specifically, the first ... The film formation conditions of the first In-Ga-Zn-O based non-single crystal film are made different from those of the second In-Ga-Zn-O based non-single crystal film. For example, the ratio of the oxygen gas flow rate in the film formation conditions of the first In-Ga-Zn-O based non-single crystal film is made higher than the ratio of the oxygen gas flow rate to the argon gas flow rate in the film formation conditions of the second In-Ga-Zn-O based non-single crystal film. Specifically, the first ... The film formation conditions of the In-Ga-Zn-O-based polycrystalline film are as follows: under an atmosphere of a rare gas (such as argon or helium) or an atmosphere with 10% or less oxygen gas and 90% or more argon gas, and the first The film formation conditions of the In-Ga-Zn-O-based polycrystalline film are under an oxygen atmosphere (or the ratio of the oxygen gas flow rate to the argon gas flow rate is 1:1 or more).

[0057] Note that in this embodiment, an example of providing a second In-Ga-Zn-O-based polycrystalline film is shown but it is not particularly limited and may not be provided.

[0058] For the sputtering method, there are an RF sputtering method using a high-frequency power supply as the sputtering power supply and a DC sputtering method and there is also a pulsed DC sputtering method that applies a bias pulse.

[0059] In addition, there is also a multi-source sputtering apparatus capable of installing a plurality of targets made of different materials. The multi-source sputtering apparatus can stack and deposit different material films in the same chamber, or can simultaneously discharge and deposit multiple types of materials in the same chamber to form a film.

[0060] In addition, there are sputtering apparatuses using a magnetron sputtering method equipped with a magnet mechanism inside the chamber and sputtering apparatuses using an ECR sputtering method that uses plasma generated using microwaves without using glow discharge method.

[0061] In addition, as a film formation method using the sputtering method, there are a reactive sputtering method that chemically reacts a target substance and a sputtering gas component during film formation to form a compound thin film thereof, and a bias sputtering method that also applies a voltage to the substrate during film formation There is also.

[0062] Next, a photolithography process is performed to form a resist mask, and the first In-Ga- Etch the Zn-O based polycrystalline film and the second In-Ga-Zn-O based polycrystalline film. Here, unnecessary portions are removed by wet etching using ITO07N (manufactured by Kanto Chemical Co., Inc.) to form the oxide semiconductor films 485a and 4 85b, which are the first In-Ga-Zn-O based polycrystalline films, and the oxide semiconductor films 486a and 48 6b, which are the second In-Ga-Zn-O based polycrystalline films. Also, in the case of using an indium film, a zinc film, or a tin film as the metal thin film 470, it is etched by the same ITO07N (manufactured by Kanto Chemical Co., Inc.). In this embodiment, since an example of using an indium film is given, the metal thin film 470 has substantially the same upper surface shape as the oxide semiconductor film 485a, which is the first In-Ga-Zn-O based polycrystalline film. Note that the etching here is not limited to wet etching, and dry etching may be used. A cross-sectional view at this stage is shown in FIG. 1(B).

[0063] Also, when the metal thin film 470 remains in the above etching step, an etching step of selectively removing the metal thin film by changing the etchant or etching gas using the resist mask used in the above etching step as it is may be performed.

[0064] Next, a photolithography process is performed to form a resist mask, and unnecessary portions are removed by etching to form contact holes reaching wiring or electrode layers made of the same material as the gate electrode layer. These contact holes are provided to be directly connected to a conductive film to be formed later. For example, in a drive circuit section, when forming a thin film transistor that is directly in contact with the gate electrode layer and the source electrode layer or the drain electrode layer, or a terminal that is electrically connected to the gate wiring of a terminal section. A contact hole is formed therein. Here, a photolithography process is performed, and later an example of forming a contact hole for direct connection to a conductive film to be formed later is shown, but it is not particularly limited. A contact hole reaching the gate electrode layer may be formed in the same process as the contact hole for connection to the pixel electrode later, and electrical connection may be made with the same material as the pixel electrode . When electrical connection is made with the same material as the pixel electrode, the number of masks can be reduced by one .

[0065] Next, a conductive film made of a metal material is formed on the oxide semiconductor films 486a and 486b, which are the second In-Ga-Zn-O-based non-single crystal films, and the gate insulating layer 403 by sputtering or vacuum evaporation .

[0066] Examples of the material of the conductive film include elements selected from Al, Cr, Ta, Ti, Mo, and W, or alloys containing the above-mentioned elements as components, or alloy films formed by combining the above-mentioned elements. Further, when heat treatment at 200°C to 600°C is performed, it is preferable to endow the conductive film with heat resistance to withstand this heat treatment . Since pure Al has problems such as inferior heat resistance and easy corrosion, it is formed in combination with a heat-resistant conductive material . Examples of the heat-resistant conductive material combined with Al include elements selected from titanium (Ti), tantalum (Ta), tungsten (W), molybdenum (Mo ), chromium (Cr), neodymium (Nd), scandium (Sc), or alloys containing the above-mentioned elements as components, alloys formed by combining the above-mentioned elements, or nitrides containing the above-mentioned elements as components . Here, a single-layer structure of a titanium film is used as the conductive film. Also, the conductive film may have a two-layer structure .

[0067] Alternatively, a titanium film may be laminated on an aluminum film. An aluminum film containing Nd (Al-Nd) is layered on top of the Ti film, and then The conductive film may be a single layer of aluminum film containing silicon. It may also have a layered structure.

[0068] Next, a photolithography process is performed to form a resist mask, and then etching is performed to remove the unwanted The necessary portions are removed to form the source electrode layer or drain electrode layer 105a, 105b, and the source electrode layer 105b. n functioning as source or drain region + Layers 104a and 104b are formed, and a driving circuit section The first wiring 409, the second wiring 410, and the so n functioning as source or drain regions + Layers 406a and 406b are formed. Wet etching or dry etching is used as the etching method. When using an aluminum film or an aluminum alloy film as the conductive film, a mixture of phosphoric acid, acetic acid, and nitric acid is used. Wet etching can be performed using a solution containing ammonia peroxide. Wet etching using water (hydrogen peroxide:ammonia:water = 5:2:2) The conductive film, which is an I film, is etched to form a source electrode layer or a drain electrode layer, and a second I Etching of n-Ga-Zn-O based non-single crystal film + Forming layers 104a and 104b In this etching step, the exposed region of the oxide semiconductor layer is also partially etched, and the oxide The compound semiconductor layer 103 is formed. + The oxide semiconductor layer 103 between the layers 104a and 104b The channel region is a region with a small film thickness. 05b, n + Since the etching of the layers 104a and 104b is performed in the same process using an etching material of ammonia peroxide, as shown in Fig. 1(C), the source electrode layer or the drain electrode layer 10 5a, 105b and n The ends of the layers 104a and 104b coincide and have a continuous structure. In the above process, a second thin film transistor 170 having the oxide semiconductor layer 103 as a channel formation region can be fabricated in the pixel portion. + The ends of the layers 104a and 104b coincide and have a continuous structure. In the above process, a second thin film transistor 170 having the oxide semiconductor layer 103 as a channel formation region can be fabricated in the pixel portion.

[0069] Next, a heat treatment (including photo annealing) is performed at 200°C to 600°C, typically 300°C to 500°C. Here, it is placed in a furnace and heat-treated at 350°C for 1 hour in a nitrogen atmosphere. This heat treatment is also called an oxidation treatment for oxidizing part or all of the metal thin film 470. In this embodiment it becomes an indium oxide film and becomes the first oxide semiconductor layer 471. In the above process, a first thin film transistor 430 having a stack of the first oxide semiconductor layer 471 and the second oxide semiconductor layer 405 can be fabricated in the driving circuit. The cross-sectional view at this stage is shown in Fig. 1(C). Also by this heat treatment, atomic-level rearrangement of the In-Ga-Zn-O-based non-single crystal film is performed. Note that the timing of the heat treatment is not particularly limited as long as it is after the formation of the second In-Ga-Zn-O-based non-single crystal film, and for example, it may be performed after the formation of the pixel electrode. Note that the timing of the heat treatment is not particularly limited as long as it is after the formation of the second In-Ga-Zn-O-based non-single crystal film, and for example, it may be performed after the formation of the pixel electrode.

[0070] In Fig. 1(C), the film thickness of the metal thin film 470 before and after the heat treatment and the film thickness of the first oxide semiconductor layer after the metal thin film is oxidized are shown to be approximately the same, but the film thickness of the first oxide semiconductor layer 471 may be thicker than the film thickness of the metal thin film before the heat treatment due to oxidation. Also when the film thickness of the first oxide semiconductor layer 471 becomes thicker, the second oxide semiconductor above may be affected. Further, when the film thickness of the first oxide semiconductor layer 471 becomes thicker, the second oxide semiconductor above ​​​The film thickness of layer 405 may become thinner than before the heat treatment.

[0071] Next, the resist mask is removed, and a protective insulating layer 412 covering the first thin-film transistor 430 and the second thin-film transistor 170 is formed. The protective insulating layer 412 is made of a silicon nitride film, a silicon oxide film, a silicon oxynitride film, an aluminum oxide film, an aluminum nitride film, an aluminum oxynitride film, or a tantalum oxide film obtained by using a sputtering method or the like. A single layer or a laminate of these can be used. The protective insulating layer 412 has a film thickness of 50 to 400 n m.

[0072] Next, a photolithography process is performed to form a resist mask, and a contact hole reaching the source electrode layer or the drain electrode layer 105b is formed by etching the protective insulating layer 412.

[0073] Next, after removing the resist mask and forming a conductive film, a photolithography process is performed to form a resist mask, and a first electrode 472 electrically connected to the source electrode layer or the drain electrode layer 105b is formed by etching the conductive film. Next, an insulating layer 473 that functions as a partition for insulating the first electrode from the adjacent pixel is formed. Next, an organic compound layer 475 including a light-emitting layer is formed on the first electrode 472, and a second electrode 474 is further formed thereon. The light-emitting element has at least the first electrode 472, an organic compound layer 475 including a light-emitting layer, and the second electrode 474. A cross-sectional view at this stage is shown in FIG. 1(D).

[0074] Note that in this embodiment, an example of a light-emitting display device using a light-emitting element is shown, but it is not particularly limited. , a liquid crystal display device or an electronic paper can be manufactured.

[0075] For peripheral circuits such as a gate line driving circuit or a source line driving circuit used in a liquid crystal display device, a light-emitting display device, or an electronic paper, a thin-film transistor using a laminated oxide semiconductor is used. High-speed driving and low power consumption can be achieved. Also, without significantly increasing the number of processes, both a pixel portion and a driving circuit can be provided on the same substrate. By providing various circuits other than the pixel portion on the same substrate, the manufacturing cost of the display device can be reduced. .

[0076] (Embodiment 2) In this embodiment, an example of constructing an inverter circuit using two n-channel thin-film transistors will be described below. This inverter circuit is used as part of a driving circuit. Note that since the first thin-film transistor 430 shown in Embodiment 1 and the first thin-film transistor 430 shown in Fig. 2(A) are the same, detailed description will be omitted.

[0077] In this embodiment, a novel structure having a driving circuit capable of high-speed operation and a novel manufacturing method are provided on a substrate having an insulating surface. Also, a novel manufacturing method for a first thin-film transistor having a laminated oxide semiconductor layer as a channel formation region and a second thin-film transistor having a single layer of an oxide semiconductor layer as a channel formation region is provided.

[0078] The cross-sectional structure of the inverter circuit of the driving circuit is shown in Fig. 2(A). In Fig. 2(A), a first gate electrode 401 and a second gate electrode 402 are provided on a substrate 400.

[0079] Also, it has a gate insulating layer 403 that covers the first gate electrode 401 and the second gate electrode 402. On the gate insulating layer 403, at a position overlapping with the first gate electrode 401, it has a stack of a first oxide semiconductor layer 471 and a second oxide semiconductor layer 405, and at a position overlapping with the second gate electrode 402, it provides a stack of a third oxide semiconductor layer 451 and a fourth oxide semiconductor layer 407.

[0080] Also, a first wiring 409, a second wiring 410, and a third wiring 411 are provided above the second oxide semiconductor layer 405 or above the fourth oxide semiconductor layer 407. The second wiring 410 is directly connected to the second gate electrode 402 through a contact hole 404 formed in the gate insulating layer 403. Note that the process order of forming the contact hole 404 is not particularly limited as long as it is after the formation of the gate insulating layer 403. For example, it may be formed after the etching of the oxide semiconductor film performed later or after the subsequent heat treatment. Note that an n layer 406a is provided between the second oxide semiconductor layer 405 and the first wiring 409, and an n layer 406b is provided between the second oxide semiconductor layer 405 and the second wiring 410. Also, an n layer 408a is provided between the fourth oxide semiconductor layer 407 and the second wiring 410, and an n layer 408b is provided between the fourth oxide semiconductor layer 407 and the third wiring 411. + + + +

[0081] The first thin film transistor 430 has the first gate electrode 401 and, through the gate insulating layer 403, a stack of a first oxide semiconductor layer 471 and a second oxide semiconductor layer 405 at a position overlapping with the first gate electrode 401. The first wiring 409 is a power line (ground power line) at a ground potential. ​ This power line at the ground potential can also be the power line (negative power line) to which the negative voltage VDL is applied. That's fine.

[0082] Also, the second thin-film transistor 431 has a third oxide semiconductor layer 451 and a fourth oxide semiconductor layer 407 laminated at a position overlapping with the second gate electrode 402 via the gate insulating layer 403. The third wiring 411 is the power line (positive power line) to which the positive voltage VDD is applied. 3, and the third wiring 411 is the power line (positive power line) to which the positive voltage VDD is applied. source line (positive power line). source line (positive power line).

[0083] As shown in FIG. 2(A), the second wiring 410 electrically connected to both the second oxide semiconductor layer 405 and the fourth oxide semiconductor layer 407 is directly connected to the second gate electrode 402 of the second thin-film transistor 431 via the contact hole 404 formed in the gate insulating layer 403. By directly connecting the second wiring 410 and the second gate electrode 402, good contact can be obtained and the contact resistance can be reduced. Compared with the case where the second gate electrode 402 and the second wiring 410 are connected via another conductive film, for example, a transparent conductive film, the number of contact holes can be reduced, and the occupied area can be reduced due to the reduction in the number of contact holes. good contact can be obtained and the contact resistance can be reduced. Compared with the case where the second gate electrode 402 and the second wiring 410 are connected via another conductive film, for example, a transparent conductive film, the number of contact holes can be reduced, and the occupied area can be reduced due to the reduction in the number of contact holes. connected. connected. good contact can be obtained and the contact resistance can be reduced. Compared with the case where the second gate electrode 402 and the second wiring 410 are connected via another conductive film, for example, a transparent conductive film, the number of contact holes can be reduced, and the occupied area can be reduced due to the reduction in the number of contact holes. polar 402 and the second wiring 410 are connected via another conductive film, for example, a transparent conductive film, the number of contact holes can be reduced, and the occupied area can be reduced due to the reduction in the number of contact holes. can be achieved.

[0084] Also, the top view of the inverter circuit of the drive circuit is shown in FIG. 2(C). In FIG. 2(C), the cross-section cut along the chain line Z1-Z2 corresponds to FIG. 2(A). section cut along the chain line Z1-Z2 corresponds to FIG. 2(A).

[0085] Also, the equivalent circuit of the EDMOS circuit is shown in FIG. 2(B). The circuit connections shown in FIGS. 2(A) and 2(C) correspond to FIG. 2(B). The first thin-film transistor 430 is an enhancement-type n-channel transistor, and the second thin-film transistor 431 is a depletion-type n n-channel transistor, and the second thin-film transistor 431 is a depletion-type n This is an example of a channel-type transistor.

[0086] Also, in FIG. 2, an example of an EDMOS circuit is shown, but an EEMOS circuit can also be used. . The equivalent circuit of the EEMOS circuit is shown in FIG. 3. In the equivalent circuit of FIG. 3, either a combination of enhancement-type n-channel transistors may be used, or the first thin-film tra nsistor 460 is an enhancement-type n-channel transistor, and the other tra nsistor, the second thin-film transistor 461, may be a depletion-type n-channel tra nsistor. A drive circuit can be configured using either combination.

[0087] Using the circuit configuration of FIG. 3, which can be fabricated with a combination of the same enhancement-type n-channel transistors for both, in the drive circuit is preferable because the fabrication process does not increase since the transistors used in the pixel portion are also the same enhancement-type n-channel transistors. It can be said to be preferable.

[0088] Also, in Embodiment 1, an example was shown in which after laminating a metal thin film and an oxide semiconductor layer, the metal thin film was oxidized to fabricate a laminate of a first oxide semiconductor layer and a second oxide semiconductor layer, but it is not particularly limited. For example, after forming the first oxide semiconductor layer over the entire surface, the region of the pixel portion may be removed by etching in a state where the first oxide semiconductor layer of the drive circuit is covered with a resist, and after removing the resist, the second oxide semiconductor layer may be formed over the entire surface. Such a manufacturing process would result in a pixel portion with thin-film transistors arranged using a single-layer oxide semiconductor layer on the same substrate, and a drive circuit with thin-film transistors arranged using a laminated oxide semiconductor layer. ​ can be formed.

[0089] In addition, this embodiment can be freely combined with Embodiment 1.

[0090] (Embodiment 3) In a display device which is an example of a semiconductor device, an example of manufacturing a thin film transistor to be disposed in a pixel portion and at least a part of a driving circuit on the same substrate will be described below. The thin film transistor to be disposed in the pixel portion is formed according to Embodiment 1. Further, since the thin film transistor is an n-channel type TFT, a part of the driving circuit that can be configured by n-channel type TFTs is formed on the same substrate as the thin film transistor in the pixel portion.

[0091] The thin film transistor to be disposed in the pixel portion is formed according to Embodiment 1. Also, since the thin film transistor is an n-channel type TFT, a part of the driving circuit configured by n-channel type TFTs in the driving circuit is formed on the same substrate as the thin film transistor in the pixel portion. Since the thin film transistor is an n-channel type TFT, a part of the driving circuit that can be configured by n-channel type TFTs in the driving circuit is formed on the same substrate as the thin film transistor in the pixel portion. A block diagram example of an active matrix liquid crystal display device which is an example of a semiconductor device is shown in FIG. 4(A). The display device shown in FIG. 4(A) includes a pixel portion 5301 having a plurality of pixels each including a display element on a substrate 5300, a scanning line driving circuit 5302 for selecting each pixel, and a signal line driving circuit 5303 for controlling the input of a video signal to the selected pixel.

[0092] A block diagram example of an active matrix liquid crystal display device which is an example of a semiconductor device is shown in FIG. 4(A). The display device shown in FIG. 4(A) has a pixel portion 5301 having a plurality of pixels each having a display element on a substrate 5300, a scanning line driving circuit 5302 for selecting each pixel, and a signal line driving circuit 5303 for controlling the input of a video signal to the selected pixel. A block diagram example of an active matrix liquid crystal display device which is an example of a semiconductor device is shown in FIG. 4(A). The display device shown in FIG. 4(A) has a pixel portion 5301 having a plurality of pixels each having a display element on a substrate 5300, a scanning line driving circuit 5302 for selecting each pixel, and a signal line driving circuit 5303 for controlling the input of a video signal to the selected pixel. A block diagram example of an active matrix liquid crystal display device which is an example of a semiconductor device is shown in FIG. 4(A). The display device shown in FIG. 4(A) has a pixel portion 5301 having a plurality of pixels each having a display element on a substrate 5300, a scanning line driving circuit 5302 for selecting each pixel, and a signal line driving circuit 5303 for controlling the input of a video signal to the selected pixel. A block diagram example of an active matrix liquid crystal display device which is an example of a semiconductor device is shown in FIG. 4(A). The display device shown in FIG. 4(A) has a pixel portion 5301 having a plurality of pixels each having a display element on a substrate 5300, a scanning line driving circuit 5302 for selecting each pixel, and a signal line driving circuit 5303 for controlling the input of a video signal to the selected pixel.

[0093] Also, the thin film transistor shown in Embodiment 1 is an n-channel type TFT, and a signal line driving circuit configured by n-channel type TFTs will be described with reference to FIG. 5. Also, the thin film transistor shown in Embodiment 1 is an n-channel type TFT, and a signal line driving circuit configured by n-channel type TFTs will be described with reference to FIG. 5.

[0094] The signal line driving circuit shown in FIG. 5 includes a driver IC 5601, a switch group 5602_1 to 5602_M, a first wiring 5611, a second wiring 5612, a third wiring 5613, and wirings 5621_1 to 5621_M. Each of the switch groups 5602_1 to 5602_M has a first wiring 5611, a second wiring 5612, a third wiring 5613, and wirings 5621_1 to 5621_M. The signal line driving circuit shown in FIG. 5 includes a driver IC 5601, a switch group 5602_1 to 5602_M, a first wiring 5611, a second wiring 5612, a third wiring 5613, and wirings 5621_1 to 5621_M. The signal line driving circuit shown in FIG. 5 includes a driver IC 5601, a switch group 5602_1 to 5602_M, a first wiring 5611, a second wiring 5612, a third wiring 5613, and wirings 5621_1 to 5621_M. It has a first thin film transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor 5603c.

[0095] The pixel section 5301 is connected to the signal line driving circuit 5303 by a plurality of signal lines S1 to Sm (not shown) extending in the column direction, and is connected to the scanning line driving circuit 5302 by a plurality of scanning lines G1 to Gn (not shown) extending in the row direction. It has a plurality of pixels (not shown) arranged in a matrix corresponding to the signal lines S1 to Sm and the scanning lines G1 to Gn. And each pixel is connected to a signal line Sj (any one of the signal lines S1 to Sm) and a scanning line Gi (any one of the scanning lines G1 to Gn).

[0096] The driver IC 5601 is connected to a first wiring 5611, a second wiring 5612, a third wiring 5613, and wirings 5621_1 to 5621_M. And each of the switch groups 5602_1 to 5602_M is connected to the first wiring 5611, the second wiring 5612, the third wiring 5613, and the wirings 5621_1 to 5621_M corresponding to each of the switch groups 5602_1 to 5602_M. And each of the wirings 5621_1 to 5621_M is connected to three signal lines via a first thin film transistor 5603a, a second thin film transistor 5603b, and a third thin film transistor 5603c. For example, the wiring 5621_J (any one of the wirings 5621_1 to 5621_M) in the Jth column is connected to the signal lines Sj-1, Sj, and S via the first thin film transistor 5603a, the second thin film transistor 5603b, and the third thin film transistor 5603c that the switch group 5602_J has. j+1. It is connected to j + 1.

[0097] In addition, signals are input to the first wiring 5611, the second wiring 5612, and the third wiring 5613, respectively. A signal is input.

[0098] Note that the driver IC 5601 is preferably formed on a single-crystalline semiconductor substrate. Furthermore, it is desirable that the switch groups 5602_1 to 5602_M are formed on the same substrate as the pixel portion. Therefore, the driver IC 5601 and the switch groups 5602_1 to 5602_M may be connected via an FPC or the like.

[0099] Next, the operation of the signal line driving circuit shown in FIG. 5 will be described with reference to the timing chart of FIG. 6. Note that the timing chart of FIG. 6 shows the timing chart when the scanning line Gi in the i-th row is selected. Furthermore, the selection period of the scanning line Gi in the i-th row is divided into a first sub-selection period T1, a second sub-selection period T2, and a third sub-selection period T3. Furthermore, the signal line driving circuit in FIG. 5 operates in the same manner as FIG. 6 even when scanning lines of other rows are selected.

[0100] Note that the timing chart of FIG. 6 shows the case where the wiring 5621_J in the J-th column is connected to the signal lines Sj-1, Sj, and Sj + 1 via the first thin film transistor 5603a, the second thin film transistor 5603b, and the third thin film transistor 5603c.

[0101] Note that the timing chart of FIG. 6 shows the timing when the scanning line Gi in the i-th row is selected, the on / off timing 5703a of the first thin film transistor 5603a, and the second thin film transistor ​​​​​​​​​​​ The on / off timing 5703b of the switch 5603b, the third thin film transistor 560 The on / off timing 5703c of 3c and the signal 5721_J input to the wiring 5621_J in the J-th column are shown.

[0102] Note that different video signals are input to the wirings 5621_1 to 5621_M during the first sub-selection period T1, the second sub-selection period T2, and the third sub-selection period T3, respectively. For example, the video signal input to the wiring 5621_J during the first sub-selection period T1 is input to the signal line Sj-1, the video signal input to the wiring 5621_J during the second sub-selection period T2 is input to the signal line Sj, and the video signal input to the wiring 5621_J during the third sub-selection period T3 is input to the signal line Sj+1. Further, during the first sub-selection period T1, the second sub-selection period T2, and the third sub-selection period T3, the video signals input to the wiring 5621_ J are respectively denoted as Data_j-1, Data_j, and Data_j+ 1.

[0103] As shown in FIG. 6, during the first sub-selection period T1, the first thin film transistor 5603a is turned on, and the second thin film transistor 5603b and the third thin film transistor 5603c are turned off. At this time, Data_j-1 input to the wiring 5621_J is input to the signal line Sj-1 through the first thin film tr ansistor 5603a. During the second sub-selection period T2, the second thin film transistor 5603b is turned on, and the first thin film transistor 5603a and the third thin film transistor 5603c are turned off. At this time, Data_j input to the wiring 5621_J is input to the signal line Sj through the second thin film transistor 5603b. In the third sub-selection period T3, the third thin film transistor 5603c is turned on, and the first thin film transistor 5603a and the second thin film transistor 5603b are turned off. At this time, Data_j+1 input to the wiring 5621_J is input to the signal line Sj+1 through the third thin film transistor 560 3c.

[0104] From the above, the signal line driving circuit in FIG. 5 divides one gate selection period into three, and can input a video signal from one wiring 5621 to three signal lines during one gate selection period. Therefore, the signal line driving circuit in FIG. 5 can reduce the number of connections between the substrate on which the driver IC5601 is formed and the substrate on which the pixel portion is formed to about 1 / 3 compared to the number of signal lines. By reducing the number of connections to about 1 / 3, the signal line driving circuit in FIG. 5 can improve reliability, yield, etc.

[0105] Note that as shown in FIG. 5, if one gate selection period is divided into a plurality of sub-selection periods, and in each of the plurality of sub-selection periods, a video signal can be input from one wiring to each of the plurality of signal lines, the arrangement, number, and driving method of the thin film transistors are not limited.

[0106] For example, when inputting a video signal from one wiring to each of three or more signal lines in each of three or more sub-selection periods, wiring for controlling the thin film transistors and the thin film transistors may be added. However, if one gate selection period is divided into four or more sub-selection periods, one sub-selection period becomes short. Therefore, it is desirable that one gate selection period be divided into two or three sub-selection periods.

[0107] ​​​As another example, as shown in the timing chart of FIG. 7, one selection period may be divided into a precharge period Tp, a first sub-selection period T1, a second sub-selection period T2, and a third sub-selection period T3. Furthermore, the timing chart of FIG. 7 shows the timing at which the scanning line Gi in the i-th row is selected, the on / off timing 5803a of the first thin film transistor 5603a, the on / off timing 5803b of the second thin film transistor 5603b, the on / off timing 5803c of the third thin film transistor 5603c, and the signal 5821_J input to the wiring 5621_J in the J-th column. As shown in FIG. 7, in the precharge period Tp, the first thin film transistor 5603a, the second thin film transistor 5603b and the third thin film transistor 5603c are turned on. At this time, the precharge voltage Vp input to the wiring 5621_J is input to the signal lines Sj-1, Sj, and Sj+1 through the first thin film transistor 5603a, the second thin film transistor 5603b and the third thin film transistor 5603c, respectively. In the first sub-selection period T1, the first thin film transistor 5603a is turned on, and the second thin film transistor 5603b and the third thin film transistor 5603c are turned off. At this time, Data_j-1 input to the wiring 5621_J is input to the signal line Sj-1 through the first thin film transistor 5603a. In the second sub-selection period T2, the second thin film transistor 5603b is turned on, and the first thin film transistor 5603a and the third thin film transistor 5603c are turned off. At this time, Data_j input to the wiring 5621_J is input to the signal line Sj through the second thin film transistor 5603b. In the third sub-selection period T3, the third thin film transistor 5 In the third sub-selection period T3, the third thin film transistor 5 is turned on, and the first thin film transistor 5603a and the second thin film transistor 5603b are turned off. At this time, Data_j+1 input to the wiring 5621_J is input to the signal line Sj+1 through the third thin film transistor 5603c. is turned on, and the first thin film transistor 5603a and the second thin film transistor 5603b are turned off. At this time, 603c turns on, and the first thin film transistor 5603a and the second thin film transistor 56 03b turn off. At this time, Data_j+1 input to the wiring 5621_J is input to the signal line Sj+1 through the third thin film transistor 5603c.

[0108] From the above, the signal line driving circuit of FIG. 5 to which the timing chart of FIG. 7 is applied can pre-charge the signal line by providing a pre-charge selection period before the sub-selection period, so that the video signal can be written to the pixel at high speed. In FIG. 7, the same components as those in FIG. 6 are denoted by common reference numerals, and detailed descriptions of the same parts or parts having the same functions are omitted. FIG. 6 are shown using common reference numerals, and detailed descriptions of the same parts or parts having the same functions are omitted.

[0109] Next, the configuration of the scanning line driving circuit will be described. The scanning line driving circuit has a shift register and a buffer. In some cases, it may also have a level shifter. In the scanning line driving circuit, a selection signal is generated when a clock signal (CLK) and a start pulse signal (SP ) are input to the shift register. The generated selection signal is buffer-amplified in the buffer and supplied to the corresponding scanning line. The gate electrodes of the transistors of one line of pixels are connected to the scanning line. And since the transistors of one line of pixels must be turned on all at once, a buffer that can pass a large current is used. connected. And since the transistors of one line of pixels must be turned on all at once, a buffer that can pass a large current is used. used.

[0110] One form of the shift register used in a part of the scanning line driving circuit will be described with reference to FIGS. 8 and 9.

[0111] ​​Fig. 8 shows the circuit configuration of the shift register. The shift register shown in Fig. 8 is composed of a plurality of flip-flops 5701_1 to 5701_n. Also, a first clock signal, a second clock signal, a start pulse signal, and a reset signal are input and operate.

[0112] The connection relationship of the shift register in Fig. 8 will be described. In the shift register of Fig. 8, the i-th stage flip-flop 5701_i (any one of the flip-flops 5701_1 to 5701_n) has the first wiring 5501 shown in Fig. 9 connected to the seventh wiring 5717_i - 1, the second wiring 5502 shown in Fig. 9 connected to the seventh wiring 5717_i + 1, the third wiring 5503 shown in Fig. 9 connected to the seventh wiring 5717_i, and the sixth wiring 5506 shown in Fig. 9 connected to the fifth wiring 5715. Also, the fourth wiring 5504 shown in Fig. 9 is connected to the second wiring 5 712 in the odd-stage flip-flops and to the third wiring 5713 in the even-stage flip-flops, and the fifth wiring 5505 shown in Fig. 9 is connected to the fourth wiring 5714.

[0113] However, the first wiring 5501 of the first-stage flip-flop 5701_1 shown in Fig. 9 is connected to the first wiring 5711, and the second wiring 5502 of the n-th stage flip-flop 5701_n shown in Fig. 9 is connected to the sixth wiring 5716.

[0114] Note that the first wiring 5711, the second wiring 5712, the third wiring 5713, and the sixth wiring 57 16 may also be referred to as the first signal line, the second signal line, the third signal line, and the fourth signal line, respectively.

[0115] Okay. Further, the fourth wiring 5714 and the fifth wiring 5715 may be referred to as the first power supply line and the second power supply line, respectively.

[0116] Next, the details of the flip-flop shown in FIG. 8 are shown in FIG. 9. The flip-flop shown in FIG. 9 includes a first thin film transistor 5571, a second thin film transistor 5572, a third thin film transistor 5573, a fourth thin film transistor 5574, a fifth thin film transistor 5575, a sixth thin film transistor 5576, a seventh thin film transistor 5577, and an eighth thin film transistor 5578. Note that the first thin film transistor 5571, the second thin film transistor 5572, the third thin film transistor 5573, the fourth thin film transistor 5574, the fifth thin film transistor 5575, the sixth thin film transistor 5576, the seventh thin film transistor 5577, and the eighth thin film transistor 5578 are n-channel type transistors and are assumed to be in a conductive state when the gate-source voltage (Vgs) exceeds the threshold voltage (Vth).

[0117] In FIG. 9, the gate electrode of the third thin film transistor 5573 is electrically connected to the power supply line. Also, the circuit formed by connecting the third thin film transistor 5573 and the fourth thin film transistor 5574 (the circuit surrounded by the chain line in FIG. 9) can be said to correspond to the circuit configuration shown in FIG. 2(A). Here, an example is shown in which all the thin film transistors are enhancement type n-channel transistors, but it is not particularly limited. For example, the third thin film transistor 5573 may also be a depletion type n-channel transistor to drive the drive circuit.

[0118] Next, the connection configuration of the flip-flop shown in FIG. 9 is shown below.

[0119] The first electrode (one of the source electrode or the drain electrode) of the first thin film transistor 5571 is connected to the fourth wiring 5504, and the second electrode (the other of the source electrode or the drain electrode) of the first thin film transistor 5571 is connected to the third wiring 5503.

[0120] The first electrode of the second thin film transistor 5572 is connected to the sixth wiring 5506, and the second electrode of the second thin film transistor 5572 is connected to the third wiring 5503.

[0121] The first electrode of the third thin film transistor 5573 is connected to the fifth wiring 5505, and the second electrode of the third thin film transistor 5573 is connected to the gate electrode of the second thin film transistor 5572 and the gate electrode of the third thin film transistor 5573 is connected to the fifth wiring 5505. is connected.

[0122] The first electrode of the fourth thin film transistor 5574 is connected to the sixth wiring 5506, and the second electrode of the fourth thin film transistor 5574 is connected to the gate electrode of the second thin film transistor 5572 and the gate electrode of the fourth thin film transistor 5574 is connected to the gate electrode of the first thin film transistor 5 571.

[0123] The first electrode of the fifth thin film transistor 5575 is connected to the fifth wiring 5505, and the second electrode of the fifth thin film transistor 5575 is connected to the gate electrode of the first thin film transistor 5571 and the gate electrode of the fifth thin film transistor 5575 is connected to the first wiring 5501. is connected.

[0124] The first electrode of the sixth thin film transistor 5576 is connected to the sixth wiring 5506, and the sixth the second electrode of the thin film transistor 5576 is connected to the gate electrode of the first thin film transistor 5571 and the gate electrode of the sixth thin film transistor 5576 is connected to the gate electrode of the second thin film transistor 5 572.

[0125] The first electrode of the seventh thin film transistor 5577 is connected to the sixth wiring 5506, and the seventh the second electrode of the thin film transistor 5577 is connected to the gate electrode of the first thin film transistor 5571 and the gate electrode of the seventh thin film transistor 5577 is connected to the second wiring 5502 The first electrode of the eighth thin film transistor 5578 is connected to the sixth wiring 5506 and the second electrode of the eighth thin film transistor 5578 is connected to the gate electrode of the second thin film transistor 5572, and the gate electrode of the eighth thin film transistor 5578 is connected to the first wiring 550 1.

[0126] Note that the connection points of the gate electrode of the first thin film transistor 5571, the gate electrode of the fourth thin film transistor 5574 , the second electrode of the fifth thin film transistor 5575, the second electrode of the sixth thin film transistor 5576 and the second electrode of the seventh thin film transistor 5577 are defined as node 5543. Further, the connection points of the gate electrode of the second thin film transistor 5572, the second electrode of the third thin film transistor 5573, the second electrode of the fourth thin film transistor 5574 , the gate electrode of the sixth thin film transistor 5576 and the second electrode of the eighth thin film transistor 5578 are defined as node 5544. Note that the connection points of the first wiring 5501, the second wiring 5502, the third wiring 5503 and the fourth wiring 5

[0127] Note that the first wiring 5501, the second wiring 5502, the third wiring 5503 and the fourth wiring 5 504 may be referred to as a first signal line, a second signal line, a third signal line, and a fourth signal line, respectively. Furthermore, the fifth wiring 5505 may be referred to as a first power supply line, and the sixth wiring 5506 may be referred to as a second power supply line.

[0128] Also, it is possible to fabricate the signal line driving circuit and the scanning line driving circuit only with the n-channel type TFTs shown in Embodiment 2. Since the n-channel type TFTs shown in Embodiment 2 have a large mobility of transistors, it is possible to increase the driving frequency of the driving circuit. For example, the scanning line driving circuit using the n-channel type TFTs shown in Embodiment 2 can be operated at high speed, so that it is possible to increase the frame frequency or to realize black screen insertion. Furthermore, by increasing the channel width of the transistors in the scanning line driving circuit or by arranging a plurality of scanning line driving circuits, it is possible to realize an even higher frame frequency. When arranging a plurality of scanning line driving circuits, the scanning line driving circuit for driving the even-numbered scanning lines is arranged on one side, and the scanning line driving circuit for driving the odd-numbered scanning lines is arranged on the opposite side, thereby realizing an increase in the frame frequency. Also, when signals are output to the same scanning line by a plurality of scanning line driving circuits, it is advantageous for the reduction in size of the display device.

[0129] Moreover, when fabricating an active matrix light-emitting display device which is an example of a semiconductor device, since a plurality of thin film transistors are arranged in at least one pixel, it is preferable to arrange a plurality of scanning line driving circuits. An example of a block diagram of the active matrix light-emitting display device is shown in FIG. 4 (B). circuits. By arranging the scanning line driving circuit for driving the odd-numbered scanning lines on the opposite side, it is possible to increase the frame frequency. Also, when signals are output to the same scanning line by a plurality of scanning line driving circuits, it is advantageous for the reduction in size of the display device. Furthermore, when fabricating an active matrix light-emitting display device which is an example of a semiconductor device, since a plurality of thin film transistors are arranged in at least one pixel, it is preferable to arrange a plurality of scanning line driving circuits. An example of a block diagram of the active matrix light-emitting display device is shown in FIG. 4 (B).

[0130] Also, when fabricating an active matrix light-emitting display device which is an example of a semiconductor device, since a plurality of thin film transistors are arranged in at least one pixel, it is preferable to arrange a plurality of scanning line driving circuits. An example of a block diagram of the active matrix light-emitting display device is shown in FIG. 4 (B). (B) is shown.

[0131] The light-emitting display device shown in Fig. 4(B) has a plurality of pixels each having a display element on a substrate 5400. It has a pixel section 5401, a first scanning line driving circuit 5402 and a second scanning line driving circuit 5404 for selecting each pixel, and a signal line driving circuit 54 03 for controlling the input of video signals to the selected pixels.

[0132] When the video signal input to the pixel of the light-emitting display device shown in Fig. 4(B) is in digital format , the pixel becomes a light-emitting or non-light-emitting state by switching the transistor on and off. Therefore, grayscale display can be performed using the area grayscale method or the time grayscale method. The area grayscale method is a driving method for performing grayscale display by dividing one pixel into a plurality of sub-pixels and driving each sub-pixel independently based on a video signal. The time grayscale method is a driving method for performing grayscale display by controlling the period during which the pixel emits light. Since the light-emitting element has a higher response speed than a liquid crystal element, etc., it is more suitable for the time grayscale method than a liquid crystal element. Specifically, when performing display by the time grayscale method, one frame period is divided into a plurality of sub-frame periods. Then, according to the video signal, the light-emitting element of the pixel is made to emit light or not emit light in each sub-frame period. By dividing into a plurality of sub-frame periods,

[0133] the total length of the period during which the pixel actually emits light within one frame period can be controlled by the video signal, and grayscale can be displayed. Note that in the light-emitting display device shown in Fig. 4(B), when arranging two switching TFTs in one pixel, the first scanning line which is the gate wiring of one of the switching TFTs has an input to it, and the other is connected to the second scanning line. When the video signal input to the pixel is in digital format, the pixel becomes a light-emitting or non-light-emitting state by switching the transistor on and off. Therefore, grayscale display can be performed using the area grayscale method or the time grayscale method. The area grayscale method is a driving method for performing grayscale display by dividing one pixel into a plurality of sub-pixels and driving each sub-pixel independently based on a video signal. The time grayscale method is a driving method for performing grayscale display by controlling the period during which the pixel emits light. Since the light-emitting element has a higher response speed than a liquid crystal element, etc., it is more suitable for the time grayscale method than a liquid crystal element. Specifically, when performing display by the time grayscale method, one frame period is divided into a plurality of sub-frame periods. Then, according to the video signal, the light-emitting element of the pixel is made to emit light or not emit light in each sub-frame period. By dividing into a plurality of sub-frame periods, the total length of the period during which the pixel actually emits light within one frame period can be controlled by the video signal, and grayscale can be displayed. Note that in the light-emitting display device shown in Fig. 4(B), when arranging two switching TFTs in one pixel, the first scanning line which is the gate wiring of one of the switching TFTs has an input to it, and the other is connected to the second scanning line. to it, and the other is connected to the second scanning line. When the video signal input to the pixel is in digital format, the pixel becomes a light-emitting or non-light-emitting state by switching the transistor on and off. Therefore, grayscale display can be performed using the area grayscale method or the time grayscale method. The area grayscale method is a driving method for performing grayscale display by dividing one pixel into a plurality of sub-pixels and driving each sub-pixel independently based on a video signal. The time grayscale method is a driving method for performing grayscale display by controlling the period during which the pixel emits light. Since the light-emitting element has a higher response speed than a liquid crystal element, etc., it is more suitable for the time grayscale method than a liquid crystal element. Specifically, when performing display by the time grayscale method, one frame period is divided into a plurality of sub-frame periods. Then, according to the video signal, the light-emitting element of the pixel is made to emit light or not emit light in each sub-frame period. By dividing into a plurality of sub-frame periods, the total length of the period during which the pixel actually emits light within one frame period can be controlled by the video signal, and grayscale can be displayed. Note that in the light-emitting display device shown in Fig. 4(B), when arranging two switching TFTs in one pixel, the first scanning line which is the gate wiring of one of the switching TFTs has an input to it, and the other is connected to the second scanning line.

[0134] In addition, in the light-emitting display device shown in Fig. 4(B), when arranging two switching TFTs in one pixel, if the first scanning line, which is the gate wiring of one of the switching TFTs, has an input The signal is generated by the first scanning line driving circuit 5402, and the signal input to the second scanning line, which is the gate line of the other switching TFT, is generated by the second scanning line driving circuit 5404. Although an example is shown, the signal input to the first scanning line and the signal input to the second scanning line may both be generated by one scanning line driving circuit. Also, for example, depending on the number of switching TFTs included in one pixel, a plurality of scanning lines may be provided for each pixel to control the operation of the switching elements. In this case, the signals input to the plurality of scanning lines may all be generated by one scanning line driving circuit, or may be generated by a plurality of respective scanning line driving circuits. In the light-emitting display device as well, a part of the driving circuit that can be composed of n-channel type TFTs can be formed on the same substrate as the thin film transistors in the pixel portion. Also, the signal line driving circuit and the scanning line driving circuit can be fabricated in the same manner as the n-channel type TFT shown in Embodiment 2. Further, the above-described driving circuit is not limited to a liquid crystal display device or a light-emitting display device, and may be used for an electronic paper that drives electronic ink using an element electrically connected to a switching element. An electronic paper is also called an electrophoretic display device (electrophoretic display), and has advantages such as being as easy to read as paper, having lower power consumption compared to other display devices, and being able to have a thin and light shape. The electrophoretic display can be considered in various forms, but a microcapsule containing a first particle having a positive charge and a second particle having a negative charge is dissolved in a solvent or a solute. Although an example is shown, the signal input to the first scanning line and the signal input to the second scanning line may both be generated by one scanning line driving circuit. Also, for example, depending on the number of switching TFTs included in one pixel, a plurality of scanning lines may be provided for each pixel to control the operation of the switching elements. In this case, the signals input to the plurality of scanning lines may all be generated by one scanning line driving circuit, or may be generated by a plurality of respective scanning line driving circuits. In the light-emitting display device as well, a part of the driving circuit that can be composed of n-channel type TFTs can be formed on the same substrate as the thin film transistors in the pixel portion. Also, the signal line driving circuit and the scanning line driving circuit can be fabricated in the same manner as the n-channel type TFT shown in Embodiment 2. Further, the above-described driving circuit is not limited to a liquid crystal display device or a light-emitting display device, and may be used for an electronic paper that drives electronic ink using an element electrically connected to a switching element. An electronic paper is also called an electrophoretic display device (electrophoretic display), and has advantages such as being as easy to read as paper, having lower power consumption compared to other display devices, and being able to have a thin and light shape.

[0135] In the light-emitting display device as well, a part of the driving circuit that can be composed of n-channel type TFTs can be formed on the same substrate as the thin film transistors in the pixel portion. Also, the signal line driving circuit and the scanning line driving circuit can be fabricated in the same manner as the n-channel type TFT shown in Embodiment 2. In the light-emitting display device as well, a part of the driving circuit that can be composed of n-channel type TFTs can be formed on the same substrate as the thin film transistors in the pixel portion. Also, the signal line driving circuit and the scanning line driving circuit can be fabricated in the same manner as the n-channel type TFT shown in Embodiment 2. Further, the above-described driving circuit is not limited to a liquid crystal display device or a light-emitting display device, and may be used for an electronic paper that drives electronic ink using an element electrically connected to a switching element. An electronic paper is also called an electrophoretic display device (electrophoretic display), and has advantages such as being as easy to read as paper, having lower power consumption compared to other display devices, and being able to have a thin and light shape. The electrophoretic display can be considered in various forms, but a microcapsule containing a first particle having a positive charge and a second particle having a negative charge is dissolved in a solvent or a solute.

[0136] Further, the above-described driving circuit is not limited to a liquid crystal display device or a light-emitting display device, and may be used for an electronic paper that drives electronic ink using an element electrically connected to a switching element. An electronic paper is also called an electrophoretic display device (electrophoretic display), and has advantages such as being as easy to read as paper, having lower power consumption compared to other display devices, and being able to have a thin and light shape. The electrophoretic display can be considered in various forms, but a microcapsule containing a first particle having a positive charge and a second particle having a negative charge is dissolved in a solvent or a solute. The electrophoretic display can be considered in various forms, but a microcapsule containing a first particle having a positive charge and a second particle having a negative charge is dissolved in a solvent or a solute. The electrophoretic display can be considered in various forms, but a microcapsule containing a first particle having a positive charge and a second particle having a negative charge is dissolved in a solvent or a solute. The electrophoretic display can be considered in various forms, but a microcapsule containing a first particle having a positive charge and a second particle having a negative charge is dissolved in a solvent or a solute.

[0137] The electrophoretic display can be considered in various forms, but a microcapsule containing a first particle having a positive charge and a second particle having a negative charge is dissolved in a solvent or a solute. The electrophoretic display can be considered in various forms, but a microcapsule containing a first particle having a positive charge and a second particle having a negative charge is dissolved in a solvent or a solute. They are dispersed in plurality, and by applying an electric field to the microcapsules, the particles in the micro capsules are moved in opposite directions to each other, and only the color of the particles aggregated on one side is displayed. Note that the first particle or the second particle contains a dye and does not move in the absence of an electric field. Also, the color of the first particle and the color of the second particle are different (including colorless). (including colorless).

[0138] Thus, the electrophoresis display is a display that utilizes the so-called dielectrophoretic effect in which a substance with a high dielectric constant moves to a high electric field region. The electrophoresis display does not require a polarizing plate or a counter substrate, which are necessary for a liquid crystal display device, and the thickness and weight are reduced by half. display device, and the thickness and weight are reduced by half.

[0139] A dispersion of the above microcapsules in a solvent is called electronic ink, and this electronic ink can be printed on the surfaces of glass, plastic, cloth, paper, etc. Also, color display is possible by using particles having color filters or dyes.

[0140] Also, if a plurality of the above microcapsules are appropriately arranged between two electrodes on an active matrix substrate, an active matrix type display device is completed, and display can be performed by applying an electric field to the microcapsules. For example, an active matrix substrate obtained by the thin film transistors of Embodiment 1 or Embodiment 2 can be used. 2 can be used.

[0141] Note that the first particle and the second particle in the microcapsules are made of a conductor material, an insulator material, a semiconductor material, a magnetic material, a liquid crystal material, a ferroelectric material, an electroluminescent material, an electro​​​​​​​​ One kind of material selected from a chromic material and a magnetophoretic material, or a composite material thereof may be used. It may be used.

[0142] Through the above steps, a highly reliable display device can be manufactured as a semiconductor device.

[0143] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0144] (Embodiment 4) In this embodiment, an example of a light-emitting display device is shown as a semiconductor device. As the display element of the display device, a light-emitting element using electroluminescence is shown here. The light-emitting element using electroluminescence is classified according to whether the light-emitting material is an organic compound or an inorganic compound. The former is called an organic EL element, and the latter is called an inorganic EL element. The light-emitting element using electroluminescence is classified according to whether the light-emitting material is an organic compound or an inorganic compound, and the former is called an organic EL element and the latter is called an inorganic EL element. The light-emitting element using electroluminescence is classified according to whether the light-emitting material is an organic compound or an inorganic compound, and the former is called an organic EL element and the latter is called an inorganic EL element. It is.

[0145] In the organic EL element, by applying a voltage to the light-emitting element, electrons and holes are injected from a pair of electrodes into a layer containing a light-emitting organic compound, and a current flows. Then, when these carriers (electrons and holes) recombine, the light-emitting organic compound forms an excited state, and light is emitted when the excited state returns to the ground state. From such a mechanism, such a light-emitting element is called a current-excited type light-emitting element. In the organic EL element, by applying a voltage to the light-emitting element, electrons and holes are injected from a pair of electrodes into a layer containing a light-emitting organic compound, and a current flows. Then, when these carriers (electrons and holes) recombine, the light-emitting organic compound forms an excited state, and light is emitted when the excited state returns to the ground state. From such a mechanism, such a light-emitting element is called a current-excited type light-emitting element. In the organic EL element, by applying a voltage to the light-emitting element, electrons and holes are injected from a pair of electrodes into a layer containing a light-emitting organic compound, and a current flows. Then, when these carriers (electrons and holes) recombine, the light-emitting organic compound forms an excited state, and light is emitted when the excited state returns to the ground state. From such a mechanism, such a light-emitting element is called a current-excited type light-emitting element. In the organic EL element, by applying a voltage to the light-emitting element, electrons and holes are injected from a pair of electrodes into a layer containing a light-emitting organic compound, and a current flows. Then, when these carriers (electrons and holes) recombine, the light-emitting organic compound forms an excited state, and light is emitted when the excited state returns to the ground state. From such a mechanism, such a light-emitting element is called a current-excited type light-emitting element. In the organic EL element, by applying a voltage to the light-emitting element, electrons and holes are injected from a pair of electrodes into a layer containing a light-emitting organic compound, and a current flows. Then, when these carriers (electrons and holes) recombine, the light-emitting organic compound forms an excited state, and light is emitted when the excited state returns to the ground state. From such a mechanism, such a light-emitting element is called a current-excited type light-emitting element.

[0146] The inorganic EL element is classified into a dispersed inorganic EL element and a thin-film inorganic EL element according to its element configuration. The dispersed inorganic EL element has a light-emitting layer in which particles of a light-emitting material are dispersed in a binder, and the light-emitting mechanism uses a donor-acceptor level using a donor level and an acceptor level. The dispersed inorganic EL element has a light-emitting layer in which particles of a light-emitting material are dispersed in a binder, and the light-emitting mechanism uses a donor-acceptor level using a donor level and an acceptor level. The dispersed inorganic EL element has a light-emitting layer in which particles of a light-emitting material are dispersed in a binder, and the light-emitting mechanism uses a donor-acceptor level using a donor level and an acceptor level. It is acceptor recombination type light emission. The thin film inorganic EL element has a structure in which a light emitting layer is sandwiched between dielectric layers, and further sandwiched between electrodes, and the light emission mechanism is localized light emission that utilizes inner shell electron transition of metal ions. Here, an organic EL element is used as the light emitting element for explanation.

[0147] FIG. 10 is a diagram showing an example of a pixel configuration to which digital time gradation driving can be applied as an example of a semiconductor device.

[0148] The configuration and operation of a pixel to which digital time gradation driving can be applied will be described. Here, an example in which two n-channel transistors using an oxide semiconductor layer (typically, an In-Ga-Zn-O based non-single crystal film) in the channel formation region are used in one pixel is shown.

[0149] Pixel 6400 has a switching transistor 6401, a driving transistor 6402, a light emitting element 6404, and a capacitor element 6403. The gate of the switching transistor 64 01 is connected to the scanning line 6406, one of the first electrodes (either the source electrode or the drain electrode) is connected to the signal line 6405, and the second electrode (the other of the source electrode and the drain electrode) is connected to the gate of the driving transistor 6402. The driving transistor 6402 has a gate connected to the power supply line 6407 via the capacitor element 6403, a first electrode connected to the power supply line 640 7, and a second electrode connected to the first electrode (pixel electrode) of the light emitting element 6404. The second electrode of the light emitting element 6404 corresponds to the common electrode 6408. The common electrode 6408 is electrically connected to a common potential line formed on the same substrate, and the connection portion can be used as a common connection portion.

[0150] Note that a low power supply potential is set for the second electrode (common electrode 6408) of the light emitting element 6404. The low power supply potential is a potential that satisfies the low power supply potential < high power supply potential with reference to the high power supply potential set for the power supply line 6407. For example, GND, 0V, etc. may be set as the low power supply potential. A potential difference between this high power supply potential and the low power supply potential is applied to the light emitting element 6404 to cause a current to flow through the light emitting element 6404 and make the light emitting element 6404 emit light. Therefore, the respective potentials are set so that the potential difference between the high power supply potential and the low power supply potential is equal to or greater than the forward threshold voltage of the light emitting element 6404.

[0151] Note that the capacitor element 6403 can also be omitted by substituting for the gate capacitance of the driving transistor 6402. Regarding the gate capacitance of the driving transistor 6402, a capacitance may be formed between the channel region and the gate electrode.

[0152] Here, in the case of the voltage input voltage driving method, a video signal that causes the driving transistor 6402 to be in one of two states, fully on or fully off, is input to the gate of the driving transistor 6402. That is, the driving transistor 6402 operates in the linear region. Since the driving transistor 6402 operates in the linear region, a voltage higher than the voltage of the power supply line 6407 is applied to the gate of the driving transistor 6402. Note that a voltage equal to or higher than (power supply line voltage + Vth of the driving transistor 6402) is applied to the signal line 6405.

[0153] Also, when performing analog gradation driving instead of digital time gradation driving, the same pixel configuration as in FIG. 10 can be used by changing the signal input.

[0154] When performing analog gradation driving, a voltage equal to or higher than the forward voltage of the light-emitting element 6404 plus the Vth of the driving transistor 6402 is applied to the gate of the driving transistor 6402. The forward voltage of the light-emitting element 6404 refers to the voltage when a desired luminance is set, and includes at least the forward threshold voltage. Note that a video signal is input so that the driving transistor 6402 operates in the saturation region, whereby a current can flow through the light-emitting element 6404. To operate the driving transistor 6402 in the saturation region, the potential of the power supply line 6407 is set higher than the gate potential of the driving transistor 6402. By using an analog video signal, a current corresponding to the video signal can flow through the light-emitting element 6404, and analog gradation driving can be performed. Note that the pixel configuration shown in FIG. 10 is not limited to this. For example, a new switch, resistor element, capacitor element, transistor, or logic circuit may be added to the pixel shown in FIG. 10. Next, the configuration of the light-emitting element will be described with reference to FIG. 11. Here, the case where the driving TFT is an n-type will be taken as an example, and the cross-sectional structure of the pixel will be described. The TFTs 7001, 7011, and 7021, which are driving TFTs used in the semiconductor devices of FIGS. 11(A), 11(B), and 11(C), can be manufactured in the same manner as the second thin-film transistor 170 shown in Embodiment 1, and are thin-film transistors including an oxide semiconductor film as a semiconductor layer. For the light-emitting element, at least one of the anode and the cathode needs to be transparent in order to extract light. Thus, a thin-film transistor and a light-emitting element are formed on a substrate, and top emission for extracting light from the surface opposite to the substrate, bottom emission for extracting light from the surface on the substrate side, or emission from both the substrate side and the side opposite to the substrate Note that the pixel configuration shown in FIG. 10 is not limited to this. For example, a new switch, resistor element, capacitor element, transistor, or logic circuit may be added to the pixel shown in FIG. 10. Next, the configuration of the light-emitting element will be described with reference to FIG. 11. Here, the case where the driving TFT is an n-type will be taken as an example, and the cross-sectional structure of the pixel will be described. The TFTs 7001, 7011, and 7021, which are driving TFTs used in the semiconductor devices of FIGS. 11(A), 11(B), and 11(C), can be manufactured in the same manner as the second thin-film transistor 170 shown in Embodiment 1, and are thin-film transistors including an oxide semiconductor film as a semiconductor layer. For the light-emitting element, at least one of the anode and the cathode needs to be transparent in order to extract light. Thus, a thin-film transistor and a light-emitting element are formed on a substrate, and top emission for extracting light from the surface opposite to the substrate, bottom emission for extracting light from the surface on the substrate side, or emission from both the substrate side and the side opposite to the substrate Note that the pixel configuration shown in FIG. 10 is not limited to this. For example, a new switch, resistor element, capacitor element, transistor, or logic circuit may be added to the pixel shown in FIG. 10.

[0155] Note that the pixel configuration shown in FIG. 10 is not limited to this. For example, a new switch, resistor element, capacitor element, transistor, or logic circuit may be added to the pixel shown in FIG. 10. Note that the pixel configuration shown in FIG. 10 is not limited to this. For example, a new switch, resistor element, capacitor element, transistor, or logic circuit may be added to the pixel shown in FIG. 10.

[0156] Next, the configuration of the light-emitting element will be described with reference to FIG. 11. Here, the case where the driving TFT is an n-type will be taken as an example, and the cross-sectional structure of the pixel will be described. The TFTs 7001, 7011, and 7021, which are driving TFTs used in the semiconductor devices of FIGS. 11(A), 11(B), and 11(C), can be manufactured in the same manner as the second thin-film transistor 170 shown in Embodiment 1, and are thin-film transistors including an oxide semiconductor film as a semiconductor layer. Next, the configuration of the light-emitting element will be described with reference to FIG. 11. Here, the case where the driving TFT is an n-type will be taken as an example, and the cross-sectional structure of the pixel will be described. The TFTs 7001, 7011, and 7021, which are driving TFTs used in the semiconductor devices of FIGS. 11(A), 11(B), and 11(C), can be manufactured in the same manner as the second thin-film transistor 170 shown in Embodiment 1, and are thin-film transistors including an oxide semiconductor film as a semiconductor layer. Next, the configuration of the light-emitting element will be described with reference to FIG. 11. Here, the case where the driving TFT is an n-type will be taken as an example, and the cross-sectional structure of the pixel will be described. The TFTs 7001, 7011, and 7021, which are driving TFTs used in the semiconductor devices of FIGS. 11(A), 11(B), and 11(C), can be manufactured in the same manner as the second thin-film transistor 170 shown in Embodiment 1, and are thin-film transistors including an oxide semiconductor film as a semiconductor layer. Next, the configuration of the light-emitting element will be described with reference to FIG. 11. Here, the case where the driving TFT is an n-type will be taken as an example, and the cross-sectional structure of the pixel will be described. The TFTs 7001, 7011, and 7021, which are driving TFTs used in the semiconductor devices of FIGS. 11(A), 11(B), and 11(C), can be manufactured in the same manner as the second thin-film transistor 170 shown in Embodiment 1, and are thin-film transistors including an oxide semiconductor film as a semiconductor layer. Next, the configuration of the light-emitting element will be described with reference to FIG. 11. Here, the case where the driving TFT is an n-type will be taken as an example, and the cross-sectional structure of the pixel will be described. The TFTs 7001, 7011, and 7021, which are driving TFTs used in the semiconductor devices of FIGS. 11(A), 11(B), and 11(C), can be manufactured in the same manner as the second thin-film transistor 170 shown in Embodiment 1, and are thin-film transistors including an oxide semiconductor film as a semiconductor layer.

[0157] For the light-emitting element, at least one of the anode and the cathode needs to be transparent in order to extract light. Thus, a thin-film transistor and a light-emitting element are formed on a substrate, and top emission for extracting light from the surface opposite to the substrate, bottom emission for extracting light from the surface on the substrate side, or emission from both the substrate side and the side opposite to the substrate For the light-emitting element, at least one of the anode and the cathode needs to be transparent in order to extract light. Thus, a thin-film transistor and a light-emitting element are formed on a substrate, and top emission for extracting light from the surface opposite to the substrate, bottom emission for extracting light from the surface on the substrate side, or emission from both the substrate side and the side opposite to the substrate For the light-emitting element, at least one of the anode and the cathode needs to be transparent in order to extract light. Thus, a thin-film transistor and a light-emitting element are formed on a substrate, and top emission for extracting light from the surface opposite to the substrate, bottom emission for extracting light from the surface on the substrate side, or emission from both the substrate side and the side opposite to the substrate There is a light-emitting element with a double-sided emission structure that extracts light from the side surface, and the pixel configuration can be applied to light-emitting elements of any emission structure.

[0158] The light-emitting element with the top emission structure will be described with reference to Fig. 11(A).

[0159] Fig. 11(A) shows a cross-sectional view of a pixel when the TFT 7001, which is a driving TFT, is of the n-type and the light emitted from the light-emitting element 7002 escapes to the anode 7005 side. The TFT 7001 uses an In-Sn-Zn-O-based oxide semiconductor added with silicon oxide as the semiconductor layer. By including impurities such as silicon oxide, crystallization of the oxide semiconductor or generation of microcrystalline grains can be prevented even when heat treatment is performed at 300°C to 600°C. In Fig. 11(A), the cathode 7003 of the light-emitting element 7002 and the TFT 7001, which is a driving TFT, are electrically connected, and the light-emitting layer 7004 and the anode 7005 are sequentially laminated on the cathode 7003. The cathode 7003 can be made of various materials as long as it is a conductive film with a low work function and that reflects light. For example, Ca, Al, CaF, MgAg, AlLi, etc. are desirable. The light-emitting layer 7004 may be composed of a single layer or a plurality of layers laminated. When it is composed of a plurality of layers, an electron injection layer, an electron transport layer, a light-emitting layer, a hole transport layer, and a hole injection layer are laminated in this order on the cathode 7003. It is not necessary to provide all of these layers. The anode 7005 is formed using a conductive material having light-transmitting properties, for example, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium oxide containing titanium oxide. Indium tin oxide, indium tin oxide (hereinafter referred to as ITO), indium zinc oxide, A light-transmitting conductive material such as indium tin oxide doped with silicon oxide may also be used. stomach.

[0160] The region where the light-emitting layer 7004 is sandwiched between the cathode 7003 and the anode 7005 is the light-emitting element 7002. In the case of the pixel shown in FIG. 11(A), light emitted from the light emitting element 7002 is The light is emitted toward the anode 7005 as shown by the mark.

[0161] Next, a light emitting element with a bottom emission structure will be described with reference to FIG. When 011 is n-type and light emitted from the light emitting element 7012 is emitted to the cathode 7013 side, The cross-sectional view of the pixel is shown. The TFT7011 uses an I-type semiconductor layer with silicon oxide added. n-Al-Zn-O oxide semiconductor is used. Impurities such as silicon oxide are included. Therefore, even if heat treatment is performed at 300° C. to 600° C., the oxide semiconductor is not crystallized or microcrystallized. In Figure 11(B), the driver TFT 7011 is electrically connected to the A cathode 7013 of the light-emitting element 7012 is formed on the light-transmitting conductive film 7017. A light-emitting layer 7014 and an anode 7015 are stacked in this order on the cathode 7013. When the anode 7015 is light-transmitting, a light-reflecting or light-shielding layer is formed on the anode. The cathode 7013 may be formed in the same manner as in FIG. In addition, various conductive materials with small work functions can be used. The film thickness is set to a level that allows light to pass through (preferably, about 5 nm to 30 nm). An aluminum film having a thickness of 100 μm can be used as the cathode 7013. The optical layer 7014 may be composed of a single layer or may be configured by laminating a plurality of layers, similar to FIG. 11(A). The anode 7015 does not need to transmit light but can be formed using a conductive material having translucency, similar to FIG. 11(A). And the shielding film 7016 can use, for example, a metal that reflects light, but is not limited to a metal film. For example, a resin added with a black pigment can also be used.

[0162] The region sandwiching the light-emitting layer 7014 between the cathode 7013 and the anode 7015 corresponds to the light-emitting element 7012 In the case of the pixel shown in FIG. 11(B), the light emitted from the light-emitting element 7012 is emitted toward the cathode 7013 side as indicated by the arrow.

[0163] Next, the light-emitting element with a double-sided emission structure will be described with reference to FIG. 11(C). FIG. 11(C) shows that the cathode 7023 of the light-emitting element 7022 is formed on a translucent conductive film 7027 electrically connected to the driving TFT 7021, and the light-emitting layer 7024 and the anode 7025 are sequentially laminated on the cathode 7023. The TFT 7021 uses an Sn-Al-Zn-O-based oxide semiconductor added with silicon oxide as a semiconductor layer. By including impurities such as silicon oxide it is possible to prevent crystallization or generation of fine crystal grains of the oxide semiconductor even when heat treatment is performed at 300°C to 600°C. The cathode 7023 can use various materials as long as they are conductive materials with a small work function, similar to the case of FIG. 11(A). However, the film thickness should be such that light can pass through. For example, Al with a film thickness of 20 nm can be used as the cathode 7023 And the light-emitting layer 7024, similar to FIG. 11(A), can be a single layer ​​​​It may be configured in either way, whether it is composed of a single layer or multiple layers are stacked. Anode The anode 7025 can be formed using a conductive material having translucency that transmits light, similar to FIG. 11(A). It can be formed.

[0164] The portion where the cathode 7023, the light-emitting layer 7024, and the anode 7025 overlap corresponds to the light-emitting element 70 22. In the case of the pixel shown in FIG. 11(C), the light emitted from the light-emitting element 7022 is emitted to both the anode 7025 side and the cathode 7023 side as indicated by the arrows.

[0165] Here, although the organic EL element has been described as the light-emitting element, it is also possible to provide an inorganic EL element as the light-emitting element.

[0166] In this embodiment, an example in which a thin-film transistor (driving TFT) for controlling the driving of the light-emitting element and the light-emitting element are electrically connected has been shown. However, a configuration in which a current control TFT is connected between the driving TFT and the light-emitting element may also be used.

[0167] Next, the appearance and cross-section of a light-emitting display panel (also referred to as a light-emitting panel) corresponding to one form of the semiconductor device will be described with reference to FIG. 12. FIG. 12(A) is a top view of the panel in which the thin-film transistors and the light-emitting elements formed on the first substrate are sealed with a sealing material between the second substrate, and FIG. 12(B) corresponds to the cross-sectional view at H-I in FIG. 12(A). The pixel portion 4502, the signal line driving circuits 4503a, 450

[0168] 3b, and the scanning line driving circuits 4504a, 4504b provided on the first substrate 4501 are surrounded by a sealing material 4505 is provided. Also, the pixel portion 4502, the signal line driving circuits 4503a, 4503b, and the scanning line driving circuits 4504a, 4504b A second substrate 4506 is provided on the scanning line driving circuits 4504a and 4504b. Thus, the pixel portion 4502, the signal line driving circuits 4503a and 4503b, and the scanning line driving circuits 45 04a and 4504b are sealed together with a filling material 4507 by the first substrate 4501, a sealing material 4505, and the second substrate 4506. In this way, at least the pixel portion 450 2 is not exposed to the outside air, and it is preferable to package (enclose) it with a highly airtight and low outgassing protective film (such as a bonding film, an ultraviolet curable resin film, etc.) or a cover material. Moreover, the pixel portion 4502, the signal line driving circuits 4503a and 4503b, and the scanning line driving circuits 4504a and 4504b provided on the first substrate 4501 have a plurality of thin film transistors. In FIG. 12(B), the thin film transistor 4510 included in the pixel portion 4502 and the thin film transistor 4509 included in the signal line driving circuit 4503a are exemplified. The thin film transistor 4509 applies the first thin film transistor shown in Embodiment 1 including a stack of oxide semiconductor layers as a semiconductor layer, and the thin film transistor 4510 applies the second thin film transistor shown in Embodiment 1 including an In-Ga-Z n-O based non-single crystal film as a single layer. In the present embodiment, the thin film transistors 4509 and 4510 are n-channel type thin film transistors.

[0169] Also, 4511 corresponds to a light emitting element, and a first electrode layer 4517 which is a pixel electrode of the light emitting element 4511 is electrically connected to the source electrode layer or the drain electrode layer of the thin film transistor 4510. 503b, and the scanning line driving circuits 4504a and 4504b have a plurality of thin film transistors. In FIG. 12(B), the thin film transistor 4510 included in the pixel portion 4502 and the thin film transistor 4509 included in the signal line driving circuit 4503a are exemplified. The thin film transistor 4509 applies the first thin film transistor shown in Embodiment 1 including a stack of oxide semiconductor layers as a semiconductor layer, and the thin film transistor 4510 applies the second thin film transistor shown in Embodiment 1 including an In-Ga-Z n-O based non-single crystal film as a single layer. In the present embodiment, the thin film transistors 4509 and 4510 are n-channel type thin film transistors.

[0170] The thin film transistor 4509 applies the first thin film transistor shown in Embodiment 1 including a stack of oxide semiconductor layers as a semiconductor layer, and the thin film transistor 4510 applies the second thin film transistor shown in Embodiment 1 including an In-Ga-Z n-O based non-single crystal film as a single layer. In the present embodiment, the thin film transistors 4509 and 4510 are n-channel type thin film transistors. n-O based non-single crystal film as a single layer. In the present embodiment, the thin film transistors 4509 and 4510 are n-channel type thin film transistors. The thin film transistors 4509 and 4510 are n-channel type thin film transistors. The thin film transistors 4509 and 4510 are n-channel type thin film transistors.

[0171] Also, 4511 corresponds to a light emitting element, and a first electrode layer 4517 which is a pixel electrode of the light emitting element 4511 is electrically connected to the source electrode layer or the drain electrode layer of the thin film transistor 4510. The first electrode layer 4517 which is a pixel electrode of the light emitting element 4511 is electrically connected to the source electrode layer or the drain electrode layer of the thin film transistor 4510. It is connected to. Note that the structure of the light-emitting element 4511 is a laminated structure of a first electrode layer 4517, an electroluminescent layer 4512, and a second electrode layer 4513, but it is not limited to the structure shown in this embodiment. According to the direction of the light extracted from the light-emitting element 4511, etc., the structure of the light-emitting element 4511 can be appropriately changed.

[0172] The partition wall 4520 is formed using an organic resin film, an inorganic insulating film, or an organic polysiloxane. Particularly, using a photosensitive material, an opening is formed on the first electrode layer 4517, and the side wall of the opening is preferably formed so as to be an inclined surface formed with a continuous curvature.

[0173] The electroluminescent layer 4512 may be composed of a single layer or may be configured such that a plurality of layers are laminated. Either is acceptable.

[0174] A protective film may be formed on the second electrode layer 4513 and the partition wall 4520 so that oxygen, hydrogen, moisture, carbon dioxide, etc. do not enter the light-emitting element 4511. As the protective film, a silicon nitride film, a silicon oxynitride film, a DLC film, etc. can be formed.

[0175] Also, various signals and potentials applied to the signal line drive circuits 4503a, 4503b, the scan line drive circuits 4504a, 4504b , or the pixel portion 4502 are supplied from the FPCs 4518a, 4518 b.

[0176] In this embodiment, the connection terminal electrode 4515 is formed of the same conductive film as the first electrode layer 4 517 of the light-emitting element 4511, and the terminal electrode 4516 is formed of the same conductive film as the source electrode layer and the drain electrode layer of the thin film transistors 4509, 4 510.

[0177] The connection terminal electrode 4515 is electrically connected to the terminal of the FPC 4518a through the anisotropic conductive film 4519.

[0178] The second substrate located in the light extraction direction from the light emitting element 4511 must be translucent. In that case, a translucent material such as a glass plate, a plastic plate, a polyester film, or an acrylic film is used.

[0179] In addition to inert gases such as nitrogen and argon, an ultraviolet curable resin or a thermosetting resin can be used as the filler 4507, and PVC (polyvinyl chloride), acrylic, polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral), or EVA (ethylene vinyl acetate) can be used. In this embodiment, nitrogen is used as the filler.

[0180] Also, if necessary, an optical film such as a polarizing plate, a circular polarizing plate (including an elliptical polarizing plate), a retardation plate (λ / 4 plate, λ / 2 plate), or a color filter can be appropriately provided on the light emitting surface of the light emitting element. Also, an antireflection film can be provided on the polarizing plate or the circular polarizing plate. For example, an antiglare treatment that diffuses the reflected light due to the surface irregularities and reduces the reflection can be performed.

[0181] The signal line drive circuits 4503a and 4503b and the scan line drive circuits 4504a and 4504b may be mounted by a drive circuit formed of a single crystal semiconductor film or a polycrystalline semiconductor film on a separately prepared substrate. Also, only the signal line drive circuit, or a part thereof, or only the scan line drive circuit, or a part thereof may be separately formed and mounted, and this embodiment is not limited to the configuration of FIG. 12. ​​​​​​​​​​

[0182] Through the above steps, a highly reliable light-emitting display device (display panel) can be fabricated as a semiconductor device. It is possible to do so.

[0183] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. It is possible.

[0184] (Embodiment 5) In this embodiment, different from Embodiment 1, an example is shown in FIG. 13 where the upper surface area of the metal thin film is different, that is, the position of the end portion of the metal thin film is separated from the end portion of the second oxide semiconductor layer. Note that since parts other than the different shapes of the metal thin film are the same as those in FIG. 1, the same reference numerals are used for the same parts for description. First, as in Embodiment 1, a first gate electrode 401 and a second gate electrode 101 are provided on a substrate 400 having an insulating surface. Note that when forming the first gate electrode 401 and the second gate electrode 101, a capacitance wiring 108 in the pixel portion and a first terminal 121 in the terminal portion are also formed. Next, a gate insulating layer 403 is formed to cover the first gate electrode 401 and the second gate electrode 101. It is formed.

[0185] Next, a metal thin film such as indium, zinc, tin, molybdenum, or tungsten is formed on the gate insulating layer 403. Also, these alloy thin films or these laminated films can be used. The metal thin film is formed using a sputtering method, a vacuum evaporation method, or a coating method. Here, a zinc film is formed to be thicker than 0 nm and 10 nm or less, preferably 3 nm or more and 5 nm or less, using a sputtering method. And the second gate electrode 101. When forming the electrode 101, the capacitance wiring 108 in the pixel portion and the first terminal 121 in the terminal portion are also formed. It is formed.

[0186] Next, a gate insulating layer 403 is formed to cover the first gate electrode 401 and the second gate electrode 101. It is formed.

[0187] Next, a metal thin film such as indium, zinc, tin, molybdenum, or tungsten is formed on the gate insulating layer 403. Also, these alloy thin films or these laminated films can be used. The metal thin film is formed using a sputtering method, a vacuum evaporation method, or a coating method. Here, a zinc film is formed to be thicker than 0 nm and 10 nm or less, preferably 3 nm or more and 5 nm or less, using a sputtering method. And these laminated films can also be used. The metal thin film is formed using a sputtering method, a vacuum evaporation method, or a coating method. Here, a zinc film is formed to be thicker than 0 nm and 10 nm or less, preferably 3 nm or more and 5 nm or less using a sputtering method.

[0188] Next, the metal thin film is selectively removed using photolithography technology. In this etching process, the metal thin film 490 is formed so that an area smaller than the pattern shape of the oxide semiconductor layer to be formed later remains. Note that the metal thin film 490 is formed at a position that at least partially overlaps with the first gate electrode 401 via the gate insulating layer 403. By forming such a metal thin film 490, the side surface of the metal thin film 490 is covered with the oxide semiconductor layer, and even if the oxidation of the metal thin film is not sufficiently performed by the heat treatment to be performed later, the first wiring 409 and the second wiring 410 can be prevented from short-circuiting due to the metal thin film.

[0189] Next, an oxide semiconductor layer that covers the upper surface and the side surface of the metal thin film 490 is formed. In this embodiment, a first In-Ga-Zn-O-based non-single crystal film is formed as the oxide semiconductor layer by sputtering.

[0190] When forming the first In-Ga-Zn-O-based oxide semiconductor layer by sputtering, insulating impurities may be included in the oxide semiconductor target containing In, Ga, and Zn. The impurities are insulating oxides typified by silicon oxide, germanium oxide, aluminum oxide, etc., insulating nitrides typified by silicon nitride, aluminum nitride, etc., or insulating oxynitrides such as silicon oxynitride, aluminum oxynitride, etc. For example, it is preferable to include SiO2 in the oxide semiconductor target at a ratio of 0.1 wt% or more and 10 wt% or less, preferably 1 wt% or more and 6 wt% or less.

[0191] Next, without exposing to the atmosphere, a second In-Ga-Zn-O-based non-single crystal film having a lower resistance than the first In-Ga-Zn-O-based non-single crystal film is formed. An oxide semiconductor film (in this embodiment, a second In-Ga-Zn-O based non-single crystal film) is formed by sputtering.

[0192] Next, a photolithography process is performed to form a resist mask, and the first In-Ga-Zn-O based non-single crystal film and the second In-Ga-Zn-O based non-single crystal film are etched. By etching, unnecessary portions are removed to form oxide semiconductor films 485a and 485b that are the first In-Ga-Zn-O based non-single crystal film, and oxide semiconductor films 486a and 486b that are the second In-Ga-Zn-O based non-single crystal film. A cross-sectional view at this stage is shown in FIG. 13(A). As shown in FIG. 13(A), the oxide semiconductor film 485a that is the first In-Ga-Zn-O based non-single crystal film covers the upper surface and the side surface of the metal thin film 490, and there is no exposed portion on the metal thin film 490.

[0193] Note that in this embodiment, an example of providing a second In-Ga-Zn-O based non-single crystal film is shown, but it is not particularly limited and may not be provided.

[0194] Next, a photolithography process is performed to form a resist mask, and unnecessary portions are removed by etching to form contact holes that reach wirings and electrode layers made of the same material as the gate electrode layer. These contact holes are provided to be directly connected to a conductive film to be formed later. For example, in a drive circuit section, contact holes are formed when forming a thin film transistor that is directly in contact with the gate electrode layer and the source electrode layer or the drain electrode layer, or when forming a terminal that is electrically connected to the gate wiring in a terminal section.

[0195] Next, oxide semiconductor films 486a and 486 that are the second In-Ga-Zn-O based non-single crystal film​​​​​​​​​​​​ A conductive film made of a metal material is formed on b and the gate insulating layer 403 by sputtering.

[0196] Next, a photolithography process is performed to form a resist mask, and unnecessary portions are removed by etching to form the source electrode layers or drain electrode layers 105a and 105b, the n layers 104a and 104b that function as source regions or drain regions in the pixel portion, and the first wiring 409, the second wiring 410, and the n layers 406a and 406b that function as source regions or drain regions in the drive circuit portion. In this etching process, a part of the exposed region of the oxide semiconductor layer is also etched to form the oxide semiconductor + layer 103. Therefore, the channel region of the oxide semiconductor layer 103 between the n layers 104a and 104b becomes a region with a thin film thickness. In the above process, a second thin film transistor 170 with the oxide semiconductor layer 103 as a channel forming region can be fabricated in the pixel portion. Also, in this photolithography process, a second terminal 122 made of the same material as the source electrode layers or drain electrode layers 105a and 105b is left in the terminal portion. Note that the second terminal 122 is electrically connected to the source wiring (the source wiring including the source electrode layers or drain electrode layers 105a and 105b). + In the terminal portion, the connection electrode 120 is directly connected to the first terminal 121 of the terminal portion through a contact hole formed in the gate insulating film (see FIG. 15). Although not shown here, the source wiring or drain wiring and the gate electrode of the thin film transistor in the drive circuit are directly connected through the same process as the above-described process. In this etching process, a part of the exposed region of the oxide semiconductor layer is also etched to form the oxide semiconductor layer 103. Therefore, the channel region of the oxide semiconductor layer 103 between the n + layers 104a and 104b becomes a region with a thin film thickness. In the above process, a second thin film transistor 170 with the oxide semiconductor layer 103 as a channel forming region can be fabricated in the pixel portion. Also, in this photolithography process, a second terminal 122 made of the same material as the source electrode layers or drain electrode layers 105a and 105b is left in the terminal portion. Note that the second terminal 122 is electrically connected to the source wiring (the source wiring including the source electrode layers or drain electrode layers 105a and 105b). In the terminal portion, the connection electrode 120 is directly connected to the first terminal 121 of the terminal portion through a contact hole formed in the gate insulating film (see FIG. 15). Although not shown here, the source wiring or drain wiring and the gate electrode of the thin film transistor in the drive circuit are directly connected through the same process as the above-described process. process, a second terminal 122 made of the same material as the source electrode layers or drain electrode layers 105a and 105b is left in the terminal portion. Note that the second terminal 122 is electrically connected to the source wiring (the source wiring including the source electrode layers or drain electrode layers 105a and 105b). In the terminal portion, the connection electrode 120 is directly connected to the first terminal 121 of the terminal portion through a contact hole formed in the gate insulating film (see FIG. 15). Although not shown here, the source wiring or drain wiring and the gate electrode of the thin film transistor in the drive circuit are directly connected through the same process as the above-described process. In the terminal portion, the connection electrode 120 is directly connected to the first terminal 121 of the terminal portion through a contact hole formed in the gate insulating film (see FIG. 15). Although not shown here, the source wiring or drain wiring and the gate electrode of the thin film transistor in the drive circuit are directly connected through the same process as the above-described process. In the terminal portion, the connection electrode 120 is directly connected to the first terminal 121 of the terminal portion through a contact hole formed in the gate insulating film (see FIG. 15). Although not shown here, the source wiring or drain wiring and the gate electrode of the thin film transistor in the drive circuit are directly connected through the same process as the above-described process.

[0197] Also, in the terminal portion, the connection electrode 120 is directly connected to the first terminal 121 of the terminal portion through a contact hole formed in the gate insulating film (see FIG. 15). Note that although not shown here, the source wiring or drain wiring and the gate electrode of the thin film transistor in the drive circuit are directly connected through the same process as the above-described process. In the terminal portion, the connection electrode 120 is directly connected to the first terminal 121 of the terminal portion through a contact hole formed in the gate insulating film (see FIG. 15). Note that although not shown here, the source wiring or drain wiring and the gate electrode of the thin film transistor in the drive circuit are directly connected through the same process as the above-described process. In the terminal portion, the connection electrode 120 is directly connected to the first terminal 121 of the terminal portion through a contact hole formed in the gate insulating film (see FIG. 15). Note that although not shown here, the source wiring or drain wiring and the gate electrode of the thin film transistor in the drive circuit are directly connected through the same process as the above-described process. In the terminal portion, the connection electrode 120 is directly connected to the first terminal 121 of the terminal portion through a contact hole formed in the gate insulating film (see FIG. 15). Note that although not shown here, the source wiring or drain wiring and the gate electrode of the thin film transistor in the drive circuit are directly connected through the same process as the above-described process.

[0198] Next, heat treatment (including photo annealing) is performed at 200°C to 600°C, typically 300°C to 500°C. Here, it is placed in a furnace and heat treatment is performed at 350°C for 1 hour in an air atmosphere. This heat treatment is also called an oxidation treatment that oxidizes part or all of the metal thin film 490. In this embodiment it becomes the first oxide semiconductor layer 491 as a zinc oxide film having conductivity. Through the above steps a first thin film transistor 420 having a stack of the first oxide semiconductor layer 491 and the second oxide semiconductor layer 405 can be fabricated in the drive circuit. A cross-sectional view at this stage is shown in FIG. 13(B). Also, by this heat treatment, atomic-level rearrangement of the In-Ga-Zn-O-based amorphous film is performed. Note that the timing of performing the heat treatment is not particularly limited as long as it is after the formation of the second In-Ga-Zn-O-based amorphous film, and for example, it may be performed after the formation of the pixel electrode. Next, the resist mask is removed, and a protective insulating layer 412 that covers the first thin film transistor 420 and the second thin film transistor 170 is formed. Next, a photolithography process is performed to form a resist mask, and contact holes that reach the source electrode layer or the drain electrode layer 105b are formed by etching the protective insulating layer 412. Also, contact holes that reach the second terminal 122 and contact holes that reach the connection electrode 120 are formed by the etching here. Next, after removing the resist mask, a transparent conductive film is formed. As materials for the transparent conductive film are indium oxide (In2O3) and indium tin oxide (In2O3 - SnO2, IT

[0199] Next, the resist mask is removed, and a protective insulating layer 412 that covers the first thin film transistor 420 and the second thin film transistor 170 is formed. Next, a photolithography process is performed to form a resist mask, and contact holes that reach the source electrode layer or the drain electrode layer 105b are formed by etching the protective insulating layer 412. Also, contact holes that reach the second terminal 122 and contact holes that reach the connection electrode 120 are formed by the etching here.

[0200] Next, a photolithography process is performed to form a resist mask, and contact holes that reach the source electrode layer or the drain electrode layer 105b are formed by etching the protective insulating layer 412. Also, contact holes that reach the second terminal 122 and contact holes that reach the connection electrode 120 are formed by the etching here. Next, after removing the resist mask, a transparent conductive film is formed. As materials for the transparent conductive film are indium oxide (In2O3) and indium tin oxide (In2O3 - SnO2, IT Next, after removing the resist mask, a transparent conductive film is formed. As materials for the transparent conductive film

[0201] Next, after removing the resist mask, a transparent conductive film is formed. As materials for the transparent conductive film are indium oxide (In2O3) and indium tin oxide (In2O3 - SnO2, IT (abbreviated as O) and the like are formed by using a sputtering method, a vacuum evaporation method, or the like. For such materials The etching treatment is performed with a hydrochloric acid-based solution. However, especially for the etching of ITO, residues are likely to occur so an indium oxide-zinc oxide alloy (In 2O3-ZnO) may be used to improve the etching processability.

[0202] Next, a photolithography process is performed to form a resist mask, and unnecessary portions are removed by etching to form the pixel electrode layer 110. Also, in this photolithography process a holding capacitor is formed by the capacitor wiring 108 and the pixel electrode layer 110, with the gate insulating layer 403 and the protective insulating layer 412 in the capacitor portion as dielectrics. Also, in this photolithography process, the first terminal and the second terminal are covered with a resist mask, leaving the transparent conductive films 128 and 129 formed on the terminal portion. The transparent conductive films 128 and 129 serve as electrodes or wirings used for connection with the FPC. The transparent conductive film 128 formed on the connection electrode 120 directly connected to the first terminal 121 becomes a terminal electrode for connection that functions as an input terminal of the gate wiring. The transparent conductive film 129 formed on the second terminal 122 is a terminal electrode for connection that functions as an input terminal of the source wiring (see FIG. 15).

[0203] Here, an example is shown in which a holding capacitor is formed by the capacitor wiring 108 and the pixel electrode layer 110, with the gate insulating layer 403 and the protective insulating layer 412 as dielectrics, but it is not particularly limited. An electrode made of the same material as the source electrode or drain electrode is provided above the capacitor wiring, and a holding capacitor is formed by that electrode, the capacitor wiring, and the gate insulating layer 403 as a dielectric therebetween, and the electrode and the pixel electrode may be electrically connected. ​​​​​​​

[0204] Next, the resist mask is removed, and the cross-sectional view at this stage is shown in FIG. A top view of the second thin film transistor 170 in the pixel portion at this stage corresponds to FIG.

[0205] 14. Also, a cross-sectional view taken along line A1-A2 in FIG. 14 and a cross-sectional view taken along line B1-B2 in FIG. The cross-sectional view corresponding to the figure is shown in FIG. 15. FIG. 15 shows the second thin film transistor in the pixel section. 170, the cross-sectional structure of the capacitance part in the pixel part, and the cross-sectional structure of the terminal part. are.

[0206] 16(A) and 16(B) are a top view and a cross-sectional view of the source wiring terminal portion, respectively. 16(A) is a cross-sectional view taken along the line D1-D2 in FIG. 16(B). In FIG. 16(A), a transparent conductive film 155 formed on a protective insulating film 154 is a terminal electrode for connection that functions as an input terminal. In the sub-region, an electrode 156 made of the same material as the gate wiring is electrically connected to the source wiring. The electrode 156 overlaps the second terminal 150 via the gate insulating layer 152. The electrode 156 is not electrically connected to the first terminal 150, and the electrode 156 is set to a potential different from that of the second terminal 150. For example, if you set it to floating, GND, 0V, etc., you can reduce the capacitance or The second terminal 150 can form a capacitance for static electricity countermeasures. The transparent conductive film 155 is electrically connected to the protective insulating film 154. is the same as the protective insulating layer 412.

[0207] A plurality of gate wirings, source wirings, and capacitance wirings are provided depending on the pixel density. In addition, in the terminal portion, a plurality of first terminals at the same potential as the gate wiring, second terminals at the same potential as the source wiring, third terminals at the same potential as the capacitor wiring, etc. are arranged side by side. The number of each terminal may be set to an arbitrary number, and the implementer may appropriately determine it.

[0208] In this way, a drive circuit having a first thin film transistor 420 with a stacked structure of an oxide semiconductor layer, a second thin film transistor 170 which is a bottom gate type n-channel thin film transistor, a pixel portion having a holding capacitor, and a terminal portion can be completed.

[0209] When manufacturing an active matrix type liquid crystal display device, a liquid crystal layer is provided between an active matrix substrate and a counter substrate provided with a counter electrode, and the active matrix substrate and the counter substrate are fixed. A common electrode electrically connected to the counter electrode provided on the counter substrate is provided on the active matrix substrate, and a terminal electrically connected to the common electrode is provided in the terminal portion. This terminal is a terminal for setting the common electrode to a fixed potential, for example, GND, 0V, etc.

[0210] Further, this embodiment is not limited to the pixel configuration of FIG. 14, and an example of a top view different from FIG. 14 is shown in FIG. 17. In FIG. 17, no capacitor wiring is provided, and an example of forming a holding capacitor by overlapping a pixel electrode with the gate wiring of adjacent pixels via a protective insulating film and a gate insulating layer. In this case, the third terminal connected to the capacitor wiring and the capacitor wiring can be omitted. In FIG. 17, the same parts as those in FIG. 14 are described using the same reference numerals.

[0211] In an active matrix type liquid crystal display device, pixel electrodes arranged in a matrix​​​​ By driving it, a display pattern is formed on the screen. Specifically, for the selected pixel When a voltage is applied between the electrode and the counter electrode corresponding to the pixel electrode, the pixel electrode and the optical modulation of the liquid crystal layer disposed between the counter electrode are performed, and this optical modulation is recognized by the observer as the display pattern .

[0212] In the video display of a liquid crystal display device, since the response of the liquid crystal molecules themselves is slow, there are problems such as afterimages and blurring of the video. To improve the video characteristics of the liquid crystal display device, there is a driving technique called so-called black insertion in which all-black display is performed every other frame.

[0213] Also, to improve the video characteristics, a driving technique called so-called double-speed driving may be used in which the vertical synchronization frequency is set to 1.5 times, preferably 2 times or more of the normal value.

[0214] Also, to improve the video characteristics of the liquid crystal display device, a surface light source is configured using a plurality of LED (light emitting diode) light sources or a plurality of EL light sources as the backlight, and each light source constituting the surface light source is driven by intermittent lighting within one frame period independently. As the surface light source, three or more types of LEDs may be used, or white light-emitting LEDs may be used. Since a plurality of LEDs can be controlled independently, the emission timing of the LEDs can be synchronized with the switching timing of the optical modulation of the liquid crystal layer. Since this driving technique can turn off the LEDs partially, in particular, in the case of video display where the ratio of the black display area occupying one screen is large, the effect of reducing power consumption can be achieved. D emission timing can also be synchronized.

[0215] By combining these driving techniques, display characteristics such as the video characteristics of the liquid crystal display device can be improved compared to the past.

[0216] The first thin film transistor 420 obtained in this embodiment is made of oxide semiconductors having different conductivities. The combination of these drive technologies is possible because they use a stack of layers and have good dynamic characteristics. This can be done.

[0217] Furthermore, this embodiment provides a display device with high electrical characteristics and high reliability at low cost. It is possible.

[0218] (Sixth embodiment) A thin film transistor is manufactured using a stack of oxide semiconductor layers having different electrical conductivities. A liquid crystal display device having a display function can be manufactured by using the transistor in a driving circuit and further in a pixel portion. In addition, a part or the whole of the driver circuit can be formed on the same substrate as the pixel portion. The system on panel can be formed integrally on the substrate.

[0219] A liquid crystal display device includes a liquid crystal element (also called a liquid crystal display element) as a display element.

[0220] The liquid crystal display device comprises a panel in which a display element is sealed, and a controller for the panel. Furthermore, the liquid crystal display device includes a module in which an IC including a controller is mounted. Regarding the element substrate corresponding to one form before the display element is completed in the manufacturing process, The daughter substrate includes means for supplying a current to each of the plurality of pixels. Specifically, only the pixel electrodes of the display element may be formed, or the pixel electrodes may be formed. Even if the conductive film is formed after etching and before forming the pixel electrode, Good, and all forms apply.

[0221] In addition, the liquid crystal display device in this specification refers to an image display device, a display device, or a light source (including an illumination device). Also, a connector, for example, an FPC (Flexible printed circuit) or a TAB (Tape Automated B onding) tape or a TCP (Tape Carrier Package) attached module, a module with a printed wiring board provided at the tip of the TAB tape or TCP, or a module in which an IC (integrated circuit) is directly mounted on a display element by the COG (Chip On Glass) method shall all be included in the liquid crystal display device.

[0222] Regarding the appearance and cross-section of a liquid crystal display panel corresponding to one form of the liquid crystal display device, it will be described with reference to FIG. 18. FIG. 18 is a top view of the panel in which the liquid crystal element 4013 is sealed between the first substrate 4001 and the second substrate 4006 by a sealing material 4005, and FIG. 18(B) corresponds to a cross-sectional view taken along M-N of FIGS. 18(A1)(A2). The sealing material 4005 is provided so as to surround the pixel portion 4002 and the scanning line driving circuit 4004 provided on the first substrate 4001. Also, the second substrate 4006 is provided on the pixel portion 4002 and the scanning line driving circuit 4004.

[0223] Therefore, the pixel portion 4002 and the scanning line driving circuit 4004 are sealed together with the liquid crystal layer 4008 by the first substrate 4001, the sealing material 4005, and the second substrate 4006. In this embodiment, the liquid crystal layer 400 8 is not particularly limited, but a liquid crystal material showing a blue phase is used. The liquid crystal material showing a blue phase has a short response speed of 1 msec or less from the voltage-free state to the voltage-applied state, and high ​​​It is capable of rapid response. It contains a liquid crystal and a chiral agent as a liquid crystal material showing a blue phase. The chiral agent is used to orient the liquid crystal in a helical structure and express the blue phase. For example, a liquid crystal material mixed with 5% by weight or more of the chiral agent may be used for the liquid crystal layer. The liquid crystal uses a thermotropic liquid crystal, a low-molecular liquid crystal, a high-molecular liquid crystal, a ferroelectric liquid crystal, an antiferroelectric liquid crystal, etc.

[0224] Further, FIG. 18(A1) shows that a signal line driving circuit 4003 formed of a single-crystal semiconductor film or a polycrystalline semiconductor film is mounted on a separately prepared substrate in a region different from the region surrounded by the sealing material 4005 on the first substrate 4001. Note that FIG. 18(A2) is an example in which a part of the signal line driving circuit is formed of thin film transistors using a stack of oxide semiconductors having different conductivities on the first substrate 4001, and a signal line driving circuit 4003b is formed on the first substrate 4001, and a signal line driving circuit 4003a formed of a single-crystal semiconductor film or a polycrystalline semiconductor film is mounted on a separately prepared substrate.

[0225] Note that the connection method of the separately formed driving circuit is not particularly limited, and a COG method, a wire bonding method, or a TAB method can be used. FIG. 18(A1) is an example in which the signal line driving circuit 4003 is mounted by the COG method, and FIG. 18(A2) is an example in which the signal line driving circuit 4003 is mounted by the TAB method.

[0226] In addition, the pixel portion 4002 provided on the first substrate 4001 and the scanning line driving circuit 4004 each have a plurality of thin film transistors. In FIG. 18(B), the thin film transistor 4010 included in the pixel portion 4002 and the thin film transistor 4011 included in the scanning line driving circuit 4004 ​​​​​​​​​are exemplified. An insulating layer 4020 and an interlayer film are formed on the thin film transistors 4010 and 4011. 4021 is provided. The thin film transistor 4010 applies the first thin film transistor shown in Embodiment 1 including a stack of oxide semiconductor layers having different conductivities as a semiconductor layer, and the thin film transistor 4011 can apply the second thin film transistor shown in Embodiment 1 including an In-Ga-Zn-O based non-single crystal film as a single layer. In this embodiment, the thin film transistors 4010 and 4011 are n-channel type thin film transistors. In addition, a pixel electrode layer 4030 and a common electrode layer 4031 are provided on the first substrate 4001, and the pixel electrode layer 4030 is electrically connected to the thin film transistor 4010. The liquid crystal element 4013 includes a pixel electrode layer 4030, a common electrode layer 4031, and a liquid crystal layer 4008. In this

[0227] embodiment, a method of generating an electric field substantially parallel to the substrate (i.e., in a horizontal direction) and moving liquid crystal molecules in a plane parallel to the substrate to control gradation is used. As such a method, an electrode configuration used in an IPS (In Plane Switching) mode or an electrode configuration used in an FFS (Fringe Field Switching) mode can be applied. Note that polarizing plates 4032 and 4033 are provided outside the first substrate 4001 and the second substrate 4006, respectively. As such a method, an electrode configuration used in an IPS (In Plane Switching) mode or an electrode configuration used in an FFS (Fringe Field Switching) mode can be applied. Note that polarizing plates 4032 (Fringe Field Switching) mode can be applied. Note that polarizing plates 4032 and 4033 are provided outside the first substrate 4001 and the second substrate 4006, respectively. Note that polarizing plates 4032 and 4033 are provided outside the first substrate 4001 and the second substrate 4006, respectively.

[0228] Note that as the first substrate 4001 and the second substrate 4006, glass, plastic, or the like having translucency can be used. As the plastic, FRP (Fiberglass Reinforced Plastics) plates, PVF (polyvinyl fluoride ), etc. can be used. ) A film, a polyester film, or an acrylic resin film can be used. Also, a sheet having a structure in which an aluminum foil is sandwiched between a PVF film and a polyester film can also be used.

[0229] Also, 4035 is a columnar spacer obtained by selectively etching an insulating film, and is provided to control the film thickness (cell gap) of the liquid crystal layer 4008. Note that a spherical spacer may be used.

[0230] Also, in the liquid crystal display device of FIG. 18, an example is shown in which a polarizing plate is provided on the outside (viewing side) of the substrate. However, the polarizing plate may be provided inside the substrate. It may be appropriately set according to the material of the polarizing plate and the manufacturing process conditions. Also, a light-shielding layer that functions as a black matrix may be provided.

[0231] The interlayer film 4021 is a translucent resin layer. Also, a part of the interlayer film 4021 is made into a light-shielding layer 4012. The light-shielding layer 4012 covers the thin film transistors 4010 and 4011. In FIG. 18(B), a light-shielding layer 4034 is provided on the side of the second substrate 4006 so as to cover above the thin film transistors 4010 and 4011. By providing the light-shielding layer 4012 and the light-shielding layer 4034, the effect of further improving the contrast and stabilizing the thin film transistors can be enhanced.

[0232] When the light-shielding layer 4034 is provided, the intensity of light incident on the semiconductor layer of the thin film transistor can be attenuated, and fluctuations in the electrical characteristics of the thin film transistor due to the photosensitivity of the oxide semiconductor can be prevented, and the effect of stabilization can be obtained.

[0233] It may be configured to be covered with an insulating layer 4020 that functions as a protective film for the thin film transistor. However, particularly It is not limited to this.

[0234] Note that the protective film is for preventing the intrusion of contaminating impurities such as organic substances, metallic substances, and water vapor floating in the atmosphere, and a dense film is preferred. The protective film may be formed of a single layer or a laminate of a silicon oxide film, a silicon nitride film, a silicon oxynitride film, a silicon nitride oxide film, an aluminum oxide film, an aluminum nitride film, an aluminum oxynitride film, or an aluminum nitride oxide film by using a sputtering method. It may be formed by a single layer or a laminate.

[0235] In addition, when further forming a light-transmissive insulating layer as a planarizing insulating film, heat-resistant organic materials such as polyimide, acrylic, benzocyclobutene, polyamide, and epoxy can be used. In addition to the above organic materials, low dielectric constant materials (low-k materials), siloxane-based resins, PSG (phosphosilicate glass), BPSG (borophosphosilicate glass), etc. can also be used. Note that an insulating layer may be formed by laminating a plurality of insulating films formed of these materials.

[0236] The method for forming the insulating layer to be laminated is not particularly limited, and depending on the material, a sputtering method, a SOG method, spin coating, dipping, spray coating, a droplet discharge method (inkjet method, screen printing, offset printing, etc.), a doctor knife, a roll coater, a curtain coater, a knife coater, etc. can be used. When forming the insulating layer using a material liquid, annealing of the semiconductor layer (200°C to 400°C) may be performed simultaneously in the baking process. By combining the baking process of the insulating layer and the annealing of the semiconductor layer, it is possible to efficiently manufacture a liquid crystal display device.

[0237] The pixel electrode layer 4030 and the common electrode layer 4031 are made of indium oxide containing tungsten oxide. , indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, Indium tin oxide containing titanium oxide, indium tin oxide (hereinafter referred to as ITO), Translucent materials such as indium zinc oxide and indium tin oxide doped with silicon oxide A conductive material can be used.

[0238] The pixel electrode layer 4030 and the common electrode layer 4031 are made of a conductive polymer (conductive polymer The conductive composition may be formed using a conductive material containing a conductive film.

[0239] A signal line driver circuit 4003 and a scanning line driver circuit 4004 or a pixel section 4 Various signals and potentials applied to 002 are supplied from FPC4018.

[0240] In addition, thin film transistors are easily damaged by static electricity, so the gate line or source It is preferable to provide a protection circuit for protecting the driver circuit on the same substrate as the line. is preferably configured using a nonlinear element using an oxide semiconductor.

[0241] In FIG. 18, the connection terminal electrode 4015 is formed from the same conductive film as the pixel electrode layer 4030. The terminal electrode 4016 is connected to the source electrode layer and the drain electrode layer of the thin film transistors 4010 and 4011. It is formed from the same conductive film as the electrode layer.

[0242] The connection terminal electrode 4015 is connected to the terminal of the FPC 4018 via the anisotropic conductive film 4019. are electrically connected.

[0243] In FIG. 18, an example is shown in which the signal line driving circuit 4003 is separately formed and mounted on the first substrate 4001, but the present invention is not limited to this configuration. The scanning line driving circuit may be separately formed and mounted, or only a part of the signal line driving circuit or a part of the scanning line driving circuit may be separately formed and mounted. Although an example in which the scanning line driving circuit is separately formed and mounted is shown, the present invention is not limited to this configuration. The scanning line driving circuit may be separately formed and mounted, or only a part of the signal line driving circuit or a part of the scanning line driving circuit may be separately formed and mounted.

[0244] FIG. 19 is an example of a cross-sectional structure of a liquid crystal display device, in which the element substrate 2600 and the counter substrate 2601 are fixed by a sealing material 2602, and an element layer 2603 including a TFT or the like and a liquid crystal layer 2604 are provided therebetween. When color display is performed, light emitting diodes that emit a plurality of types of light emission colors are arranged in the backlight unit. In the case of the RGB method, the red light emitting diode 2910R, the green light emitting diode 2910G, and the blue light emitting diode 2910B are respectively arranged in divided areas obtained by dividing the display area of the liquid crystal display device into a plurality of parts.

[0245] A polarizing plate 2606 is provided outside the counter substrate 2601, and a polarizing plate 2607 and an optical sheet 2613 are disposed outside the element substrate 2600. The light source is composed of the red light emitting diode 2910R, the green light emitting diode 2910G, the blue light emitting diode 2910B, and a reflector 2611, and the LED control circuit 2912 provided on the circuit board 2612 is connected to the wiring circuit portion 2608 of the element substrate 2600 by a flexible printed wiring board 2609, and further, external circuits such as a control circuit and a power supply circuit are incorporated. When color display is performed, light emitting diodes that emit a plurality of types of light emission colors are arranged in the backlight unit. In the case of the RGB method, the red light emitting diode 2910R, the green light emitting diode 2910G, and the blue light emitting diode 2910B are respectively arranged in divided areas obtained by dividing the display area of the liquid crystal display device into a plurality of parts.

[0246] A polarizing plate 2606 is provided outside the counter substrate 2601, and a polarizing plate 2607 and an optical sheet 2613 are disposed outside the element substrate 2600. The light source is composed of the red light emitting diode 2910R, the green light emitting diode 2910G, the blue light emitting diode 2910B, and a reflector 2611, and the LED control circuit 2912 provided on the circuit board 2612 is connected to the wiring circuit portion 2608 of the element substrate 2600 by a flexible printed wiring board 2609, and further, external circuits such as a control circuit and a power supply circuit are incorporated. A polarizing plate 2606 is provided outside the counter substrate 2601, and a polarizing plate 2607 and an optical sheet 2613 are disposed outside the element substrate 2600. The light source is composed of the red light emitting diode 2910R, the green light emitting diode 2910G, the blue light emitting diode 2910B, and a reflector 2611, and the LED control circuit 2912 provided on the circuit board 2612 is connected to the wiring circuit portion 2608 of the element substrate 2600 by a flexible printed wiring board 2609, and further, external circuits such as a control circuit and a power supply circuit are incorporated. A polarizing plate 2606 is provided outside the counter substrate 2601, and a polarizing plate 2607 and an optical sheet 2613 are disposed outside the element substrate 2600. The light source is composed of the red light emitting diode 2910R, the green light emitting diode 2910G, the blue light emitting diode 2910B, and a reflector 2611, and the LED control circuit 2912 provided on the circuit board 2612 is connected to the wiring circuit portion 2608 of the element substrate 2600 by a flexible printed wiring board 2609, and further, external circuits such as a control circuit and a power supply circuit are incorporated. A polarizing plate 2606 is provided outside the counter substrate 2601, and a polarizing plate 2607 and an optical sheet 2613 are disposed outside the element substrate 2600. The light source is composed of the red light emitting diode 2910R, the green light emitting diode 2910G, the blue light emitting diode 2910B, and a reflector 2611, and the LED control circuit 2912 provided on the circuit board 2612 is connected to the wiring circuit portion 2608 of the element substrate 2600 by a flexible printed wiring board 2609, and further, external circuits such as a control circuit and a power supply circuit are incorporated. A polarizing plate 2606 is provided outside the counter substrate 2601, and a polarizing plate 2607 and an optical sheet 2613 are disposed outside the element substrate 2600. The light source is composed of the red light emitting diode 2910R, the green light emitting diode 2910G, the blue light emitting diode 2910B, and a reflector 2611, and the LED control circuit 2912 provided on the circuit board 2612 is connected to the wiring circuit portion 2608 of the element substrate 2600 by a flexible printed wiring board 2609, and further, external circuits such as a control circuit and a power supply circuit are incorporated. A polarizing plate 2606 is provided outside the counter substrate 2601, and a polarizing plate 2607 and an optical sheet 2613 are disposed outside the element substrate 2600. The light source is composed of the red light emitting diode 2910R, the green light emitting diode 2910G, the blue light emitting diode 2910B, and a reflector 2611, and the LED control circuit 2912 provided on the circuit board 2612 is connected to the wiring circuit portion 2608 of the element substrate 2600 by a flexible printed wiring board 2609, and further, external circuits such as a control circuit and a power supply circuit are incorporated.

[0247] In this embodiment, an example of a field sequential type liquid crystal display device is shown in which the LEDs are individually caused to emit light by the LED control circuit 2912, but the present invention is not particularly limited. ​​​​​ Alternatively, a cold cathode tube or white LED may be used as the light source of the backlight, and a color filter may be provided. This is also acceptable.

[0248] In addition, in this embodiment, an example of the electrode configuration used in the IPS mode is shown, but it is not particularly limited. For example, the TN (Twisted Nematic) mode, MVA (Multi-domain Vertical Alignment) mode, PVA (Patterned Ve rtical Alignment) mode, ASM (Axially Symmetr ic aligned Micro-cell) mode, OCB (Optical Co mpensated Birefringence) mode, FLC (Ferroele ctric Liquid Crystal) mode, AFLC (AntiFerroe lectric Liquid Crystal) mode, etc. can be used.

[0249] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. This is possible.

[0250] (Embodiment 7) In this embodiment, an example of performing exposure using a halftone mask is shown in order to reduce the number of masks. Note that a halftone mask is a mask capable of performing three exposure levels, namely an exposed portion, an intermediate exposed portion, and an unexposed portion, and is an exposure mask in which the transmitted light has multiple intensities. By performing a single exposure and development process, it is possible to form a resist mask having regions of a plurality (typically two types) of thicknesses. Therefore, by using a halftone mask, it is possible to reduce the number of exposure masks.

[0251] ​​​Typical examples of multi-tone masks include grayscale masks and halftone masks.

[0252] A grayscale mask is composed of a light-transmissive substrate, a light-shielding portion formed thereon, and a diffraction grating. In the light-shielding portion, the light transmittance is 0%. On the other hand, for the diffraction grating, the intervals between light-transmissive portions such as slits, dots, and meshes are set to be less than the resolution limit of the light used for exposure, so that the light transmittance can be controlled. Note that either a periodic slit, dot, mesh, or an aperiodic slit, dot, or mesh can be used for the diffraction grating.

[0253] A halftone mask is composed of a light-transmissive substrate, a semi-transmissive portion formed thereon, and a light-shielding portion. For the semi-transmissive portion, materials such as MoSiN, MoSi, MoSiO, MoSiON, and CrSi can be used. The light-shielding portion can be formed using a light-absorbing light-shielding material such as chromium or chromium oxide. When the halftone mask is irradiated with exposure light, in the light-shielding portion, the light transmittance is 0%, and in the regions where neither the light-shielding portion nor the semi-transmissive portion is provided, the light transmittance is 100%. Also, in the semi-transmissive portion, it can be adjusted within the range of 10 - 70%. The adjustment of the light transmittance in the semi-transmissive portion can be achieved by adjusting the material of the semi-transmissive portion.

[0254] Figures 20(A) to 20(E) correspond to cross-sectional views showing the manufacturing process of the thin-film transistor 360.

[0255] In Figure 20(A), a gate electrode layer 351 is provided on a substrate 350 provided with an insulating film 357. In this embodiment, a silicon oxide film (film thickness: 100 nm) is used as the insulating film 357. On the gate electrode layer 351, a gate insulating layer 352, a metal thin film 380, and an oxide semiconductor film 381 and a conductive film 383 are sequentially laminated. In the present embodiment, as the metal thin film 380, a 3-nm-thick indium film formed by sputtering and a 3-nm-thick zinc film formed by sputtering are laminated and used.

[0256] A mask 384 is formed on the gate insulating layer 352, the metal thin film 380, the oxide semiconductor film 381, and the conductive film 383.

[0257] In the present embodiment, an example of performing exposure using a multi-tone (high-tone) mask to form the mask 384 is shown. is shown.

[0258] After exposure using a multi-tone mask in which the transmitted light has multiple intensities and development, a mask 384 having regions with different film thicknesses as shown in FIG. 2 0(B) can be formed. By using a multi-tone mask, it is possible to reduce the number of exposure masks.

[0259] Next, a first etching process is performed using the mask 384 to etch the metal thin film 380, the oxide semiconductor film 381, and the conductive film 383 into an island shape. As a result, a patterned metal thin film 390, an oxide semiconductor layer 385, and a conductive layer 387 can be formed (see FIG. 2 0(B)).

[0260] Next, the mask 384 is ashed. As a result, the area of the mask is reduced and the thickness becomes thinner . At this time, the resist of the mask in the region with a thin film thickness (the region overlapping with a part of the gate electrode layer 351) is removed, and a separated mask 388 can be formed (see FIG. 20(C)). ).

[0261] Using the mask 388, the oxide semiconductor layer 385 and the conductive layer 387 are etched by a second etching process to form the semiconductor layer 353, the source electrode layer or the drain electrode layers 355a and 355b. (See FIG. 20(D).). Note that only a part of the semiconductor layer 353 is etched, resulting in a semiconductor layer having a groove (recess), and even at the ends, a part is etched and exposed to form an exposed shape.

[0262] When oxygen gas (O2) (preferably 15% or more) is added to a chlorine-based gas (Cl2) for etching, when a silicon oxynitride film is used for the gate insulating layer 352, the selectivity ratio with respect to the In-Ga-Zn-O-based non-single crystal film used for the oxide semiconductor layer 485 can be increased, so that only the oxide semiconductor film 481 can be selectively etched.

[0263] When the oxide semiconductor film 381 and the conductive film 383 are dry-etched in the first etching process, since the oxide semiconductor film 381 and the conductive film 383 are anisotropically etched, the ends of the mask 384 and the ends of the oxide semiconductor layer 385 and the conductive layer 387 coincide to form a continuous shape.

[0264] Similarly, when the oxide semiconductor layer 385 and the conductive layer 387 are dry-etched in the second etching process, since the oxide semiconductor layer 385 and the conductive layer 387 are anisotropically etched, the ends of the mask 388 and the recess and ends of the semiconductor layer 353, and the ends of the source electrode layer or the drain electrode layers 35 5a and 355b coincide to form a continuous shape.

[0265] Also, in this embodiment, the ends of the semiconductor layer 353, the source electrode layer or the drain electrode layers 355a, 355b exhibit a shape in which they are continuously laminated at the same taper angle, but the etching conditions Depending on the materials of the members, the oxide semiconductor layer, and the conductive layer, the etching rate is different, so it may have different taper angles or discontinuous end shapes.

[0266] Thereafter, the mask 388 is removed.

[0267] Next, heating is performed at 200°C to 600°C in an atmosphere containing oxygen to oxidize the metal thin film 390 and form the first oxide semiconductor layer 391 (see Fig. 20(E)). In this embodiment the first oxide semiconductor layer 391 is a mixed layer of indium oxide and zinc oxide.

[0268] Through the above steps, an inverted staggered thin film transistor 360 having a stack of the semiconductor layer 353, which is the second oxide semiconductor layer, on the first oxide semiconductor layer 391 can be manufactured.

[0269] When using a resist mask having a plurality (typically two types) of thickness regions formed by a multi-tone mask as in this embodiment, the number of resist masks can be reduced, so the process can be simplified and the cost can be reduced. Therefore, a reliable semiconductor device can be manufactured with high productivity at low cost.

[0270] In this embodiment, both the thin film transistor disposed in the driving circuit and the thin film transistor disposed in the pixel portion are the inverted staggered thin film transistor 360 having a stack of the semiconductor layer 353, which is the second oxide semiconductor layer, on the first oxide semiconductor layer 391. That is, in this embodiment the structures of the thin film transistors in the driving circuit and the pixel portion are substantially the same, and an example is shown in which different manufacturing methods are not used for each circuit.

[0271] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0272] (Embodiment 8) In Embodiment 1 or Embodiment 2, an example of a bottom gate structure was shown. In this embodiment, an example of a bottom contact structure (also called an inverted coplanar type) will be described below with reference to FIG. 21. .

[0273] An example of the manufacturing process of the inverter circuit is shown in FIGS. 21(A), 21(B), and 21(C). .

[0274] On the substrate 740, a first conductive film is formed by sputtering, and using a first photomask, the first conductive film is selectively etched to form a first gate electrode 741 and a second gate electrode 742. Next, a gate insulating layer 743 covering the first gate electrode 741 and the second gate electrode 742 is formed using plasma CVD or sputtering. The gate insulating layer 743 can be formed as a single layer or a laminate of a silicon oxide layer, a silicon nitride layer, a silicon oxynitride layer, or a silicon nitride oxide layer using CVD, sputtering, or the like. Also, as the gate insulating layer 743, a silicon oxide layer can be formed by CVD using an organic silane gas. It is also possible. It can be formed by laminating. Next, using a second photomask, the gate insulating layer 743 is selectively etched to form a contact hole 744 reaching the second gate electrode 742. The cross-sectional view at this stage corresponds to FIG. 21(A). It is also possible.

[0275] Next, a second conductive film is formed by sputtering, and using a third photomask, it is selectively conducted using. The cross-sectional view up to this stage corresponds to FIG. 21(A).

[0276] Next, a second conductive film is formed by sputtering, and using a third photomask, it is selectively conducted Etch the electrofilm to form the first wiring 746, the second wiring 750, and the third wiring 751. The third wiring 751 is directly connected to the second gate electrode 742 through the contact hole 744.

[0277] Next, a stack of a metal thin film and an oxide semiconductor film is formed by sputtering. Before forming the metal thin film by sputtering, it is preferable to perform reverse sputtering by introducing argon gas to generate plasma to remove dust adhering to the surface of the gate insulating layer 743 and the bottom surface of the contact hole 744. Reverse sputtering is a method of modifying the surface by applying a voltage to the substrate side using an RF power source in an argon atmosphere without applying a voltage to the target side to form plasma on the substrate. Note that nitrogen, helium, etc. may be used instead of the argon atmosphere. Also, it may be performed in an atmosphere in which oxygen, hydrogen, N2O, etc. are added to the argon atmosphere. Also, it may be performed in an atmosphere in which Cl2, CF4, etc. are added to the argon atmosphere.

[0278] Next, selectively etch the metal thin film and the oxide semiconductor film using a fourth photomask.

[0279] Next, perform a heat treatment at 200°C to 600°C in an air atmosphere or a nitrogen atmosphere. By this heat treatment, the metal thin film is oxidized to form the first oxide semiconductor layer 748 and the third oxide semiconductor layer 749. At the stage when the heat treatment is completed, the second oxide semiconductor layer 745 is laminated on the first oxide semiconductor layer 748, and the first thin film transistor 760 is formed. Note that the conductivity of the first oxide semiconductor layer 748 and the second oxide semiconductor layer 745 is different, and the conductivity of the first oxide semiconductor layer 748 is high, and the field effect mobility of the first thin film transistor 760 is high. Similarly, a fourth oxide semiconductor layer is formed on the third oxide semiconductor layer 749. A thin film transistor 761 is formed by laminating a thin film layer 747 thereon. The timing of the treatment is not limited, and may be any time after the formation of the second oxide semiconductor film. For example, a heat treatment may be performed before etching using a fourth photomask to remove the metal. If the thin film is oxidized to form the first oxide semiconductor film, a fourth photomask can be used. During etching, the oxide semiconductor film is stacked, so etching residues are reduced. Etching is possible.

[0280] Next, a protective layer 752 is formed, and the protective layer 752 is selectively etched using a fifth photomask. After etching to form contact holes, a third conductive film is formed. The third conductive film is selectively etched using a photomask to electrically connect to the second wiring 750. A connecting wiring 753 is formed. The cross section at this stage corresponds to FIG. 21(C). .

[0281] The above-described process sequence is an example and is not particularly limited. Although the number of sheets increases, the photomask for etching the metal thin film and the photomask for etching part of the oxide semiconductor film are Alternatively, etching may be performed using separate photomasks for etching.

[0282] In addition, an In-Ga-Zn-O-N non-single crystal film was laminated on the second conductive film by sputtering. Post-patterning is performed to form the first wiring 746, the second wiring 750, and the second oxide semiconductor layer 7 n placed between 45 + layer, or the second wiring 750 and the third wiring 751 and the fourth acid n-type nitride semiconductor layer 747+ It may function as a layer. In this case, In -Ga-Zn-O―N based non-single crystal film is provided in a region where the first wiring 746 and the second wiring 750 overlap with the second oxide semiconductor layer 745, and in a region where the second wiring 750 and the third wiring 751 overlap with the fourth oxide semiconductor layer 747.

[0283] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments is possible.

[0284] (Embodiment 9) In this embodiment, an example of electronic paper is shown as a semiconductor device.

[0285] FIG. 22(A) is a cross-sectional view showing an active matrix type electronic paper. As the thin film transistor 581 disposed in the display unit used in the semiconductor device, it can be manufactured in the same manner as the second thin film transistor shown in Embodiment 1, and is a thin film transistor having high electrical characteristics including an oxide semiconductor film as a semiconductor layer. In this embodiment, a thin film transistor having high electrical characteristics including a Zn-O―Si based oxide semiconductor as a semiconductor layer is used. Also, a drive circuit using a thin film transistor having high electrical characteristics including a Zn-O―Si based oxide semiconductor as a semiconductor layer may be provided on the same substrate, but it is not particularly necessary to provide it. Also, the first thin film transistor having a stack of oxide semiconductor layers shown in Embodiment 1 may also be used as the thin film transistor 581 of this embodiment. FIG. 22(A) is a cross-sectional view showing an active matrix type electronic paper. As the thin film transistor 581 disposed in the display unit used in the semiconductor device, it can be manufactured in the same manner as the second thin film transistor shown in Embodiment 1, and is a thin film transistor having high electrical characteristics including an oxide semiconductor film as a semiconductor layer. In this embodiment, a thin film transistor having high electrical characteristics including a Zn-O―Si based oxide semiconductor as a semiconductor layer is used. Also, a drive circuit using a thin film transistor having high electrical characteristics including a Zn-O―Si based oxide semiconductor as a semiconductor layer may be provided on the same substrate, but it is not particularly necessary to provide it. Also, the first thin film transistor having a stack of oxide semiconductor layers shown in Embodiment 1 may also be used as the thin film transistor 581 of this embodiment. FIG. 22(A) is a cross-sectional view showing an active matrix type electronic paper. As the thin film transistor 581 disposed in the display unit used in the semiconductor device, it can be manufactured in the same manner as the second thin film transistor shown in Embodiment 1, and is a thin film transistor having high electrical characteristics including an oxide semiconductor film as a semiconductor layer. In this embodiment, a thin film transistor having high electrical characteristics including a Zn-O―Si based oxide semiconductor as a semiconductor layer is used. Also, a drive circuit using a thin film transistor having high electrical characteristics including a Zn-O―Si based oxide semiconductor as a semiconductor layer may be provided on the same substrate, but it is not particularly necessary to provide it. Also, the first thin film transistor having a stack of oxide semiconductor layers shown in Embodiment 1 may also be used as the thin film transistor 581 of this embodiment. FIG. 22(A) is a cross-sectional view showing an active matrix type electronic paper. As the thin film transistor 581 disposed in the display unit used in the semiconductor device, it can be manufactured in the same manner as the second thin film transistor shown in Embodiment 1, and is a thin film transistor having high electrical characteristics including an oxide semiconductor film as a semiconductor layer. In this embodiment, a thin film transistor having high electrical characteristics including a Zn-O―Si based oxide semiconductor as a semiconductor layer is used. Also, a drive circuit using a thin film transistor having high electrical characteristics including a Zn-O―Si based oxide semiconductor as a semiconductor layer may be provided on the same substrate, but it is not particularly necessary to provide it. Also, the first thin film transistor having a stack of oxide semiconductor layers shown in Embodiment 1 may also be used as the thin film transistor 581 of this embodiment. FIG. 22(A) is a cross-sectional view showing an active matrix type electronic paper. As the thin film transistor 581 disposed in the display unit used in the semiconductor device, it can be manufactured in the same manner as the second thin film transistor shown in Embodiment 1, and is a thin film transistor having high electrical characteristics including an oxide semiconductor film as a semiconductor layer. In this embodiment, a thin film transistor having high electrical characteristics including a Zn-O―Si based oxide semiconductor as a semiconductor layer is used. Also, a drive circuit using a thin film transistor having high electrical characteristics including a Zn-O―Si based oxide semiconductor as a semiconductor layer may be provided on the same substrate, but it is not particularly necessary to provide it. Also, the first thin film transistor having a stack of oxide semiconductor layers shown in Embodiment 1 may also be used as the thin film transistor 581 of this embodiment. FIG. 22(A) is a cross-sectional view showing an active matrix type electronic paper. As the thin film transistor 581 disposed in the display unit used in the semiconductor device, it can be manufactured in the same manner as the second thin film transistor shown in Embodiment 1, and is a thin film transistor having high electrical characteristics including an oxide semiconductor film as a semiconductor layer. In this embodiment, a thin film transistor having high electrical characteristics including a Zn-O―Si based oxide semiconductor as a semiconductor layer is used. Also, a drive circuit using a thin film transistor having high electrical characteristics including a Zn-O―Si based oxide semiconductor as a semiconductor layer may be provided on the same substrate, but it is not particularly necessary to provide it. Also, the first thin film transistor having a stack of oxide semiconductor layers shown in Embodiment 1 may also be used as the thin film transistor 581 of this embodiment. FIG. 22(A) is a cross-sectional view showing an active matrix type electronic paper. As the thin film transistor 581 disposed in the display unit used in the semiconductor device, it can be manufactured in the same manner as the second thin film transistor shown in Embodiment 1, and is a thin film transistor having high electrical characteristics including an oxide semiconductor film as a semiconductor layer. In this embodiment, a thin film transistor having high electrical characteristics including a Zn-O―Si based oxide semiconductor as a semiconductor layer is used. Also, a drive circuit using a thin film transistor having high electrical characteristics including a Zn-O―Si based oxide semiconductor as a semiconductor layer may be provided on the same substrate, but it is not particularly necessary to provide it. Also, the first thin film transistor having a stack of oxide semiconductor layers shown in Embodiment 1 may also be used as the thin film transistor 581 of this embodiment. FIG. 22(A) is a cross-sectional view showing an active matrix type electronic paper. As the thin film transistor 581 disposed in the display unit used in the semiconductor device, it can be manufactured in the same manner as the second thin film transistor shown in Embodiment 1, and is a thin film transistor having high electrical characteristics including an oxide semiconductor film as a semiconductor layer. In this embodiment, a thin film transistor having high electrical characteristics including a Zn-O―Si based oxide semiconductor as a semiconductor layer is used. Also, a drive circuit using a thin film transistor having high electrical characteristics including a Zn-O―Si based oxide semiconductor as a semiconductor layer may be provided on the same substrate, but it is not particularly necessary to provide it. Also, the first thin film transistor having a stack of oxide semiconductor layers shown in Embodiment 1 may also be used as the thin film transistor 581 of this embodiment. FIG. 22(A) is a cross-sectional view showing an active matrix type electronic paper. As the thin film transistor 581 disposed in the display unit used in the semiconductor device, it can be manufactured in the same manner as the second thin film transistor shown in Embodiment 1, and is a thin film transistor having high electrical characteristics including an oxide semiconductor film as a semiconductor layer. In this embodiment, a thin film transistor having high electrical characteristics including a Zn-O―Si based oxide semiconductor as a semiconductor layer is used. Also, a drive circuit using a thin film transistor having high electrical characteristics including a Zn-O―Si based oxide semiconductor as a semiconductor layer may be provided on the same substrate, but it is not particularly necessary to provide it. Also, the first thin film transistor having a stack of oxide semiconductor layers shown in Embodiment 1 may also be used as the thin film transistor 581 of this embodiment.

[0286] The electronic paper in FIG. 22(A) is an example of a display device using the twisted ball display method. The twisted ball display method is a method that uses spherical particles painted white and black as electrodes for display elements It is arranged between the first electrode layer and the second electrode layer which are layers, and a potential difference is generated between the first electrode layer and the second electrode layer to control the orientation of spherical particles, thereby performing display. This is a method of performing display by generating a potential difference to control the orientation of spherical particles.

[0287] The thin film transistor 581 sealed between the substrate 580 and the substrate 596 has a bottom gate structure and is a thin film transistor. It is in contact with and electrically connected to the first electrode layer 58 7 through openings formed in the insulating layers 583, 584, and 585. Between the first electrode layer 587 and the second electrode layer 588, there are a black region 590a and a white region 5 90b, and spherical particles 589 including a cavity 594 filled with liquid around it are provided . The periphery of the spherical particles 589 is filled with a filler 595 such as resin (see Fig. 22 (A)). In this embodiment, the first electrode layer 587 corresponds to a pixel electrode, and the second electrode layer 588 corresponds to a common electrode. The second electrode layer 588 is electrically connected to a common potential line provided on the same substrate as the thin film transistor 58 . At the common connection part, the second electrode layer 588 and the common potential line can be electrically connected through conductive particles arranged between a pair of substrates.

[0288] Also, instead of the twisted ball, it is also possible to use an electrophoresis element. A transparent liquid is enclosed with positively charged white fine particles and negatively charged black fine particles, and microcapsules with a diameter of about 10 μm to 20 0 μm are used. The microcapsules provided between the first electrode layer and the second electrode layer, when an electric field is applied by the first electrode layer and the second electrode layer, the white fine particles and the black fine particles move in opposite directions, and white or black can be displayed. This The display element applying the principle is an electrophoretic display element, which is called electronic paper. Electric Since the electrophoretic display element has a higher reflectance than a liquid crystal display element, an auxiliary light is not required, and moreover, the power consumption is small, and the display part can be recognized even in a dim place. Also, even when no power is supplied to the display part, since it is possible to hold the image once displayed, even when the semiconductor device with a display function (simply referred to as a display device or a semiconductor device including a display device) is moved away from the radio wave transmission source, it is possible to save the displayed image.

[0289] By fabricating a thin film transistor according to the process shown in Embodiment 1, it is possible to fabricate an electronic paper with reduced manufacturing cost as a semiconductor device. The electronic paper can be used in electronic devices in any field as long as it can display information. For example, it can be applied to displays on various cards such as electronic books (e-books), posters, in-vehicle advertisements on vehicles such as trains, and credit cards. An example of an electronic device is shown in FIG. 22(B). FIG. 22(B) shows an example of an electronic book 2700. For example, the electronic book 2700 is composed of two housings, a housing 2701 and a housing 2703. The housing 2701 and the housing 2703 are integrated by a shaft portion 2711, and opening and closing operations can be performed around the shaft portion 2711 as an axis. With such a configuration, it is possible to perform operations similar to those of a paper book.

[0290] A display part 2705 is incorporated in the housing 2701, and a display part 2707 is incorporated in the housing 2703. The housing 2701 and the housing 2703 are integrated by a shaft portion 2711, and opening and closing operations can be performed around the shaft portion 2711 as an axis. With such a configuration, it is possible to perform operations similar to those of a paper book. With such a configuration, it is possible to perform operations similar to those of a paper book.

[0291] A display part 2705 is incorporated in the housing 2701, and a display part 2707 is incorporated in the housing 2703. ​​It is incorporated. The display unit 2705 and the display unit 2707 may be configured to display a continuation screen or may be configured to display different screens. With such a configuration of displaying different screens, for example, a text can be displayed on the right display unit (display unit 2705 in FIG. 22(B)), and an image can be displayed on the left display unit (display unit 2707 in FIG. 22(B)).

[0292] Also, FIG. 22(B) shows an example in which the housing 2701 is provided with an operation unit or the like. For example, the housing 2701 is provided with a power supply 2721, operation keys 2723, a speaker 2725, etc. Pages can be sent by the operation keys 2723. Note that the housing may be configured to be provided with a keyboard, a pointing device, etc. on the same surface as the display unit of the housing. Also, the back surface or side surface of the housing may be provided with external connection terminals (earphone terminals, USB terminals, or terminals connectable to various cables such as an AC adapter and a USB cable), a recording medium insertion part, etc. Furthermore, the electronic book 2700 may be configured to have a function as an electronic dictionary.

[0293]

[0294]

[0295] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments.

[0295] (Embodiment 10) A semiconductor device including a thin film transistor using an oxide semiconductor layer is used in various electronic devices (gaming It can be applied to (including technical devices). Examples of electronic devices include television sets ( also called TVs or television receivers), monitors for computers, etc., digital cameras, digital video cameras, digital photo frames, mobile phones (also called mobile telephone devices), portable game machines, portable information terminals, audio playback devices, pachinko machines, etc. Examples also include large game machines, etc.

[0296] FIG. 23(A) shows an example of a television set 9600. The television set 96 00 has a display unit 9603 incorporated in a housing 9601. The display unit 9603 can display an image. Here, a configuration is shown in which the housing 9601 is fixed to a wall and supported from the back side.

[0297] The operation of the television set 9600 can be performed by operation switches provided in the housing 9601 or by a separate remote control unit 9610. The operation keys 9609 provided on the remote control unit 9610 can be used to operate channels and volume, and to operate the image displayed on the display unit 9603. Further, the remote control unit 9610 may be configured to include a display unit 9607 for displaying information output from the remote control unit 9610.

[0298] Note that the television set 9600 is configured to include a receiver, a modem, etc. The receiver can receive general television broadcasts, and further, by connecting to a communication network via a modem, either wired or wirelessly, it is possible to perform one-way (from sender to receiver) or two-way information communication (between sender and receiver, or between receivers, etc.).

[0299] Fig. 23(B) shows a portable gaming machine, which is composed of two housings, a housing 9881 and a housing 9891, and is connected in an openable and closable manner by a connecting portion 9893. A display portion 9882 is incorporated in the housing 9881, and a display portion 9883 is incorporated in the housing 9891. In addition, the portable gaming machine shown in Fig. 23(B) also includes, among other things, a speaker portion 9884, a recording medium insertion portion 9886, an LED lamp 9890, input means (operation keys 9885, connection terminals 9887, a sensor 9888 (including functions for measuring force, displacement, position, speed, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor or infrared rays), a microphone 9889), etc. Of course, the configuration of the portable gaming machine is not limited to the above, and it may be a configuration having at least a semiconductor device, and other accessory equipment may be provided as appropriate. The portable gaming machine shown in Fig. 23(B) has functions of reading a program or data recorded on a recording medium and displaying it on the display portion, and performing wireless communication with other portable gaming machines to share information. Note that the functions of the portable gaming machine shown in Fig. 23(B) are not limited to this, and it can have various functions. It is composed of two housings, a housing 9881 and a housing 9891, and is connected in an openable and closable manner by a connecting portion 9893. A display portion 9882 is incorporated in the housing 9881, and a display portion 9883 is incorporated in the housing 9891. In addition, the portable gaming machine shown in Fig. 23(B) also includes, among other things, a speaker portion 9884, a recording medium insertion portion 9886, an LED lamp 9890, input means (operation keys 9885, connection terminals 9887, a sensor 9888 (including functions for measuring force, displacement, position, speed, acceleration, angular velocity, rotational speed, distance, light, liquid, magnetism, temperature, chemical substances, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient, vibration, odor or infrared rays), a microphone 9889), etc. Of course, the configuration of the portable gaming machine is not limited to the above, and it may be a configuration having at least a semiconductor device, and other accessory equipment may be provided as appropriate. The portable gaming machine shown in Fig. 23(B) has functions of reading a program or data recorded on a recording medium and displaying it on the display portion, and performing wireless communication with other portable gaming machines to share information. Note that the functions of the portable gaming machine shown in Fig. 23(B) are not limited to this, and it can have various functions. Fig. 24(A) shows an example of a mobile phone 1000. The mobile phone 1000 includes, in addition to a display portion 1002 incorporated in a housing 1001, operation buttons 1003, an external connection port 1004, a speaker 1005, a microphone 1006, etc. The mobile phone 1000 shown in Fig. 24(A) can, by touching the display portion 1002 with a finger or the like, Of course, the configuration of the portable gaming machine is not limited to the above, and it may be a configuration having at least a semiconductor device, and other accessory equipment may be provided as appropriate. The portable gaming machine shown in Fig. 23(B) has functions of reading a program or data recorded on a recording medium and displaying it on the display portion, and performing wireless communication with other portable gaming machines to share information. Note that the functions of the portable gaming machine shown in Fig. 23(B) are not limited to this, and it can have various functions. Fig. 24(A) shows an example of a mobile phone 1000. The mobile phone 1000 includes, in addition to a display portion 1002 incorporated in a housing 1001, operation buttons 1003, an external connection port 1004, a speaker 1005, a microphone 1006, etc. The mobile phone 1000 shown in Fig. 24(A) can, by touching the display portion 1002 with a finger or the like, Note that the functions of the portable gaming machine shown in Fig. 23(B) are not limited to this, and it can have various functions.

[0300] Fig. 24(A) shows an example of a mobile phone 1000. The mobile phone 1000 includes, in addition to a display portion 1002 incorporated in a housing 1001, operation buttons 1003, an external connection port 1004, a speaker 1005, a microphone 1006, etc. The mobile phone 1000 shown in Fig. 24(A) can, by touching the display portion 1002 with a finger or the like, Fig. 24(A) shows an example of a mobile phone 1000. The mobile phone 1000 includes, in addition to a display portion 1002 incorporated in a housing 1001, operation buttons 1003, an external connection port 1004, a speaker 1005, a microphone 1006, etc.

[0301] Fig. 24(A) shows an example of a mobile phone 1000. The mobile phone 1000 includes, in addition to a display portion 1002 incorporated in a housing 1001, operation buttons 1003, an external connection port 1004, a speaker 1005, a microphone 1006, etc. A report can be input. Also, operations such as making a phone call or sending an email can be performed by touching the display unit 1002 with a finger or the like.

[0302] The screen of the display unit 1002 mainly has three modes. The first is the display mode mainly for displaying images, and the second is the input mode mainly for inputting information such as characters. The third is the display + input mode in which the two modes of the display mode and the input mode are mixed.

[0303] For example, when making a phone call or creating an email, the display unit 1002 can be set to the character input mode mainly for character input, and an input operation on the characters displayed on the screen can be performed. In this case , it is preferable to display a keyboard or number buttons on most of the screen of the display unit 1002. , preferably.

[0304] Also, by providing a detection device having sensors such as a gyro and an acceleration sensor inside the mobile phone 1000, the orientation (vertical or horizontal) of the mobile phone 1000 can be determined, and the screen display of the display unit 1002 can be automatically switched.

[0305] Also, the screen mode can be switched by touching the display unit 1002 or operating the operation button 1003 of the housing 1001. It can also be switched according to the type of image displayed on the display unit 1002. For example, if the image signal displayed on the display unit is video data, it is switched to the display mode, and if it is text data, it is switched to the input mode.

[0306] Also, in the input mode, the signal detected by the optical sensor of the display unit 1002 is detected and displayed ​​If there is no input by the touch operation of the unit 1002 for a certain period of time, the screen mode may be controlled to switch from the input mode to the display mode.

[0307] The display unit 1002 can also function as an image sensor. For example, by touching the palm or finger on the display unit 10 02, it is possible to perform personal authentication by imaging palm prints, fingerprints, etc. In addition, if a backlight that emits near-infrared light or a light source for sensing that emits near-infrared light is used for the display unit, it is also possible to image finger veins, palm veins, etc.

[0308] FIG. 24(B) is also an example of a mobile phone. The mobile phone in FIG. 24(B) includes a display device 9410 including a housing 9411, a display unit 9412, and operation buttons 9413, and a communication device 9400 including operation buttons 9402, an external input terminal 9403, a microphone 9404, a speaker 9405, and a light emitting unit 9406 that emits light when there is an incoming call in the housing 9401. The display device 9410 having a display function is detachable in two directions of the arrow from the communication device 9400 having a telephone function. Therefore, it is possible to attach the short axes of the display device 9410 and the communication device 9400 to each other, or to attach the long axes of the display device 9410 and the communication device 9400 to each other. Further, when only the display function is required, the display device 9410 can be removed from the communication device 9400, and the display device 9410 can be used alone. The communication device 9400 and the display device 9410 can exchange image or input information by wireless communication or wired communication, and each has a rechargeable battery.

[0309] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments.

Explanation of Reference Numerals

[0310] 101 Gate electrode 103 Oxide semiconductor layer 108 Capacitance wiring 110 Pixel electrode layer 120 Connection electrode 121 Terminal 122 Terminal 128 Transparent conductive film 129 Transparent conductive film 150 Terminal 154 Protective insulating film 155 Transparent conductive film 156 Electrode 350 Substrate 351 Gate electrode layer 352 Gate insulating layer 353 Semiconductor layer 357 Insulating film 360 Thin film transistor 380 Metal thin film 381 Oxide semiconductor film 383 Conductive film 384 Mask 385 Oxide semiconductor layer 387 Conductive layer 388 Mask 390 Metal thin film 391 Oxide semiconductor layer 400 Substrate 401 Gate electrode 402 Gate electrode 403 Gate insulating layer 404 Contact hole 405 Oxide semiconductor layer 407 Oxide semiconductor layer 409 First wiring 410 Second wiring 411 Third wiring 412 Protective insulating layer 420 Thin film transistor 430 Thin film transistor 431 Thin film transistor 451 Oxide semiconductor layer 460 Thin film transistor 461 Thin film transistor 470 Metal thin film 471 Oxide semiconductor layer 472 Electrode 473 Insulating layer 474 Electrode 475 Organic compound layer 481 Oxide semiconductor film 485 Oxide semiconductor layer 490 Metal thin film 491 Oxide semiconductor layer

Claims

1. A display device having a scanning line driving circuit including multiple stages of circuits, At least one circuit among the plurality of stages of circuits has a function of supplying a signal to a first wiring, the one circuit includes first to fourth transistors, one of the source and the drain of the first transistor is always electrically connected to the first wiring; one of the source and the drain of the second transistor is always electrically connected to the first wiring; one of the source and the drain of the third transistor is always electrically connected to the gate of the first transistor; the other of the source and the drain of the third transistor is always electrically connected to the gate of the third transistor; one of the source and the drain of the fourth transistor is always electrically connected to the second wiring; the other of the source and the drain of the fourth transistor is always electrically connected to the gate of the first transistor; a gate of the fourth transistor is always electrically connected to a gate of the second transistor; the third transistor includes a first conductive layer that functions as a gate of the third transistor, a first semiconductor layer having a region disposed on the first conductive layer, a second conductive layer that functions as one of a source and a drain of the third transistor and has a region disposed on the first semiconductor layer, and a third conductive layer that functions as the other of the source and the drain of the third transistor and has a region disposed on the first semiconductor layer; the fourth transistor includes: a fourth conductive layer having a function as a gate of the fourth transistor; a second semiconductor layer having a region disposed on the fourth conductive layer; a fifth conductive layer having a function as one of a source or a drain of the fourth transistor and having a region disposed on the second semiconductor layer; and the second conductive layer having a function as the other of the source or the drain of the fourth transistor and having a region disposed on the second semiconductor layer; each of the first semiconductor layer and the second semiconductor layer includes a first oxide semiconductor layer and a second oxide semiconductor layer having a region disposed on the first oxide semiconductor layer; the first oxide semiconductor layer has a higher electrical conductivity than the second oxide semiconductor layer; the second conductive layer has a first region in contact with an upper surface of the first semiconductor layer and a second region in contact with an upper surface of the second semiconductor layer; a maximum width of the first region in a channel width direction of the third transistor is greater than a maximum width of the second region in a channel width direction of the fourth transistor; Display device.

2. A display device having a scanning line driving circuit including multiple stages of circuits, At least one circuit among the plurality of stages of circuits has a function of supplying a signal to a first wiring, the one circuit includes first to fourth transistors, one of the source and the drain of the first transistor is always electrically connected to the first wiring; one of the source and the drain of the second transistor is always electrically connected to the first wiring; one of the source and the drain of the third transistor is always electrically connected to the gate of the first transistor; the other of the source and the drain of the third transistor is always electrically connected to the gate of the third transistor; one of the source and the drain of the fourth transistor is always electrically connected to the second wiring; the other of the source and the drain of the fourth transistor is always electrically connected to the gate of the first transistor; a gate of the fourth transistor is always electrically connected to a gate of the second transistor; a first voltage for turning off the first transistor is applied to the second wiring; a second voltage is applied to the other of the source and the drain of the third transistor to turn on the first transistor; the third transistor includes a first conductive layer that functions as a gate of the third transistor, a first semiconductor layer having a region disposed on the first conductive layer, a second conductive layer that functions as one of a source and a drain of the third transistor and has a region disposed on the first semiconductor layer, and a third conductive layer that functions as the other of the source and the drain of the third transistor and has a region disposed on the first semiconductor layer; the fourth transistor includes: a fourth conductive layer having a function as a gate of the fourth transistor; a second semiconductor layer having a region disposed on the fourth conductive layer; a fifth conductive layer having a function as one of a source or a drain of the fourth transistor and having a region disposed on the second semiconductor layer; and the second conductive layer having a function as the other of the source or the drain of the fourth transistor and having a region disposed on the second semiconductor layer; each of the first semiconductor layer and the second semiconductor layer includes a first oxide semiconductor layer and a second oxide semiconductor layer having a region disposed on the first oxide semiconductor layer; the first oxide semiconductor layer has a higher electrical conductivity than the second oxide semiconductor layer; the second conductive layer has a first region in contact with an upper surface of the first semiconductor layer and a second region in contact with an upper surface of the second semiconductor layer; a maximum width of the first region in a channel width direction of the third transistor is greater than a maximum width of the second region in a channel width direction of the fourth transistor; Display device.

3. A display device having a scanning line driving circuit including multiple stages of circuits, At least one circuit among the plurality of stages of circuits has a function of supplying a signal to a first wiring, the one circuit includes first to fourth transistors, one of the source and the drain of the first transistor is always electrically connected to the first wiring; one of the source and the drain of the second transistor is always electrically connected to the first wiring; one of the source and the drain of the third transistor is always electrically connected to the gate of the first transistor; the other of the source and the drain of the third transistor is always electrically connected to the gate of the third transistor; one of the source and the drain of the fourth transistor is always electrically connected to the second wiring; the other of the source and the drain of the fourth transistor is always electrically connected to the gate of the first transistor; a gate of the fourth transistor is always electrically connected to a gate of the second transistor; the third transistor includes a first conductive layer that functions as a gate of the third transistor, a first semiconductor layer having a region disposed on the first conductive layer, a second conductive layer that functions as one of a source and a drain of the third transistor and has a region disposed on the first semiconductor layer, and a third conductive layer that functions as the other of the source and the drain of the third transistor and has a region disposed on the first semiconductor layer; the fourth transistor includes: a fourth conductive layer having a function as a gate of the fourth transistor; a second semiconductor layer having a region disposed on the fourth conductive layer; a fifth conductive layer having a function as one of a source or a drain of the fourth transistor and having a region disposed on the second semiconductor layer; and the second conductive layer having a function as the other of the source or the drain of the fourth transistor and having a region disposed on the second semiconductor layer; each of the first semiconductor layer and the second semiconductor layer includes a first oxide semiconductor layer and a second oxide semiconductor layer having a region disposed on the first oxide semiconductor layer; the first oxide semiconductor layer has a higher electrical conductivity than the second oxide semiconductor layer; the second conductive layer has a first region in contact with an upper surface of the first semiconductor layer and a second region in contact with an upper surface of the second semiconductor layer; a maximum width of the first region in a channel width direction of the third transistor is greater than a maximum width of the second region in a channel width direction of the fourth transistor; a channel width of the third transistor is larger than a channel width of the fourth transistor; Display device.

4. A display device having a scanning line driving circuit including multiple stages of circuits, At least one circuit among the plurality of stages of circuits has a function of supplying a signal to a first wiring, the one circuit includes first to fourth transistors, one of the source and the drain of the first transistor is always electrically connected to the first wiring; one of the source and the drain of the second transistor is always electrically connected to the first wiring; one of the source and the drain of the third transistor is always electrically connected to the gate of the first transistor; the other of the source and the drain of the third transistor is always electrically connected to the gate of the third transistor; one of the source and the drain of the fourth transistor is always electrically connected to the second wiring; the other of the source and the drain of the fourth transistor is always electrically connected to the gate of the first transistor; a gate of the fourth transistor is always electrically connected to a gate of the second transistor; a first voltage for turning off the first transistor is applied to the second wiring; a second voltage is applied to the other of the source and the drain of the third transistor to turn on the first transistor; the third transistor includes a first conductive layer that functions as a gate of the third transistor, a first semiconductor layer having a region disposed on the first conductive layer, a second conductive layer that functions as one of a source and a drain of the third transistor and has a region disposed on the first semiconductor layer, and a third conductive layer that functions as the other of the source and the drain of the third transistor and has a region disposed on the first semiconductor layer; the fourth transistor includes: a fourth conductive layer having a function as a gate of the fourth transistor; a second semiconductor layer having a region disposed on the fourth conductive layer; a fifth conductive layer having a function as one of a source or a drain of the fourth transistor and having a region disposed on the second semiconductor layer; and the second conductive layer having a function as the other of the source or the drain of the fourth transistor and having a region disposed on the second semiconductor layer; each of the first semiconductor layer and the second semiconductor layer includes a first oxide semiconductor layer and a second oxide semiconductor layer having a region disposed on the first oxide semiconductor layer; the first oxide semiconductor layer has a higher electrical conductivity than the second oxide semiconductor layer; the second conductive layer has a first region in contact with an upper surface of the first semiconductor layer and a second region in contact with an upper surface of the second semiconductor layer; a maximum width of the first region in a channel width direction of the third transistor is greater than a maximum width of the second region in a channel width direction of the fourth transistor; a channel width of the third transistor is larger than a channel width of the fourth transistor; Display device.

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