Display device

Abstract

To provide a display device capable of limiting a viewing angle.SOLUTION: A display device according to an embodiment includes a substrate, an insulating layer disposed over the substrate, a first lower electrode and a second lower electrode that are disposed on the insulating layer and are apart from each other, a rib having a single pixel opening overlapping with the first lower electrode and the second lower electrode, a partition wall including a lower part with conductivity disposed over the rib and an upper part disposed on the lower part and having an opening surrounded by an edge part projecting from a side surface of the lower part, an organic layer in contact with the first lower electrode and the second lower electrode through the pixel opening and including a light-emitting layer, an upper electrode covering the organic layer and disposed in contact with the lower part, and a lens formed to have a convex shape projecting to a side opposite to the substrate and overlapping with the opening. The organic layer is in contact with the insulating layer through the pixel opening between the first lower electrode and the second lower electrode.SELECTED DRAWING: Figure 5

Description

[Technical Field]

[0001] FIELD An embodiment of the present invention relates to a display device. [Background technology]

[0002] In recent years, there has been a demand for display devices that can vary the viewing angle at which a predetermined contrast ratio can be obtained. For example, in a display device mounted on a vehicle such as an automobile, there is a demand for viewing angle control so that the displayed image can be viewed from the passenger seat, but cannot be viewed from the driver's seat while driving. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2021-135346 [Patent Document 2] US Patent Application Publication No. 2022 / 0399529 Summary of the Invention [Problem to be solved by the invention]

[0004] An object of the present invention is to provide a display device that can limit the viewing angle. [Means for solving the problem]

[0005] According to one embodiment, a display device comprises a substrate, an insulating layer arranged above the substrate, first and second lower electrodes arranged on the insulating layer and spaced apart from each other, a rib having a single pixel opening overlapping the first and second lower electrodes, a partition including a conductive lower portion arranged above the rib and an upper portion arranged on the lower portion and having an opening surrounded by an edge protruding from a side of the lower portion, an organic layer having an emitting layer and contacting the first and second lower electrodes through the pixel opening, an upper electrode covering the organic layer and contacting the lower portion, and a lens formed in a convex shape protruding toward the opposite side of the substrate and overlapping the opening, and the organic layer is in contact with the insulating layer between the first and second lower electrodes through the pixel opening. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 1 is a diagram showing an example of the configuration of a display device according to an embodiment. [Figure 2] FIG. 2 is a circuit diagram showing an example of a circuit configuration of a sub-pixel. [Figure 3] FIG. 3 is a schematic plan view showing an example of a layout of sub-pixels. [Figure 4] FIG. 4 is a plan view showing an example of the layout of the partition walls and lenses shown in FIG. [Figure 5] FIG. 5 is a cross-sectional view showing an example of the configuration of the display device taken along the line AA' shown in FIG. [Figure 6] FIG. 6 is a diagram for explaining the role of the lenses shown in FIG. [Figure 7] FIG. 7 is a diagram showing a state in which a display device mounted on an in-vehicle device displays an image in the first mode. [Figure 8] FIG. 8 is a diagram showing a state in which the display device mounted on the in-vehicle device displays an image in the second mode. [Figure 9] FIG. 9 is a schematic plan view showing another example of the layout of sub-pixels. [Figure 10] FIG. 10 is a plan view showing an example of the layout of the partition walls and lenses shown in FIG. [Figure 11] FIG. 11 is a diagram for explaining the role of the lenses shown in FIG. [Figure 12] FIG. 12 is a schematic plan view showing yet another example of the layout of sub-pixels. [Figure 13] FIG. 13 is a plan view showing an example of the layout of the partition walls and lenses shown in FIG. [Figure 14] FIG. 14 is a diagram for explaining the role of the lenses shown in FIG. [Figure 15] FIG. 15 is a schematic plan view showing yet another example of the layout of sub-pixels. [Figure 16] FIG. 16 is a plan view showing an example of the layout of the partition walls and lenses shown in FIG. [Figure 17] FIG. 17 is a schematic plan view showing yet another example of the layout of sub-pixels. [Figure 18] FIG. 18 is a plan view showing an example of the layout of the partition walls and lenses shown in FIG. [Figure 19] FIG. 19 is a cross-sectional view showing an example of the configuration of the display device taken along the line BB' and the line CC' shown in FIG. [Figure 20] FIG. 20 is a schematic plan view showing yet another example of the layout of sub-pixels. [Figure 21] FIG. 21 is a plan view showing an example of the layout of the partition walls and lenses shown in FIG. [Figure 22] FIG. 22 is a circuit diagram showing another example of the circuit configuration of the sub-pixel. [Figure 23] FIG. 23 is a schematic plan view showing yet another example of the layout of sub-pixels. [Figure 24] FIG. 24 is a plan view showing an example of the layout of the partition walls and lenses shown in FIG. [Figure 25] FIG. 25 is a cross-sectional view showing an example of the configuration of the display device taken along the line DD' shown in FIG. [Figure 26] FIG. 26 is a diagram for explaining the role of the lens shown in FIG. DETAILED DESCRIPTION OF THE INVENTION

[0007] Some embodiments will be described with reference to the drawings. The disclosure is merely an example, and appropriate modifications that a person skilled in the art can easily make while maintaining the gist of the invention are naturally included within the scope of the present invention. Furthermore, the drawings may be schematic in terms of the width, thickness, shape, etc. of each part compared to the actual embodiment for the sake of clarity, but these are merely examples and are not intended to limit the interpretation of the present invention. Furthermore, in this specification and each drawing, components that perform the same or similar functions as those described above with reference to the previous drawings are designated by the same reference numerals, and redundant detailed descriptions may be omitted as appropriate.

[0008] In the drawings, mutually perpendicular X-axis, Y-axis, and Z-axis are shown as necessary to facilitate understanding. The direction along the X-axis is referred to as the X-direction, the direction along the Y-axis is referred to as the Y-direction, and the direction along the Z-axis is referred to as the Z-direction. Viewing various elements parallel to the Z-direction is referred to as a planar view.

[0009] The display device according to this embodiment is an organic electroluminescence display device having organic light-emitting diodes (OLEDs) as display elements, and can be installed in televisions, personal computers, in-vehicle devices, tablet terminals, smartphones, mobile phone terminals, and the like.

[0010] 1 is a diagram showing an example of the configuration of a display device DSP according to one embodiment. The display device DSP includes a display panel PNL having a display area DA for displaying an image and a peripheral area SA outside the display area DA, on an insulating substrate 10. The substrate 10 may be made of glass or a flexible resin film.

[0011] 1, the shape of the substrate 10 in plan view is a rectangle with long sides parallel to the X direction. However, the shape of the substrate 10 in plan view is not limited to this example and may be other shapes such as a rectangle with long sides parallel to the Y direction, a square, a circle, or an ellipse.

[0012] The display area DA includes a plurality of pixels PX arranged in a matrix in the X and Y directions. Each pixel PX includes a plurality of subpixels SP. In one example, the pixel PX includes a first color subpixel SP1, a second color subpixel SP2, and a third color subpixel SP3. The first, second, and third colors are different from one another. Note that the pixel PX may include subpixels SP of another color, such as white, in addition to or instead of the subpixels SP1, SP2, and SP3.

[0013] Although not described in detail, the peripheral area SA is provided with terminals for connecting an IC chip or a flexible printed circuit board.

[0014] 2 is a circuit diagram showing an example of the circuit configuration of a subpixel SP. The subpixel SP includes a pixel circuit 1 and display elements DEa and DEb driven by the pixel circuit 1. The pixel circuit 1 includes a pixel switch 2, a drive transistor 3, a capacitor 4, and a switching element SW. The pixel switch 2, the drive transistor 3, and the switching element SW are each composed of, for example, a thin-film transistor.

[0015] The gate electrode of the pixel switch 2 is connected to the scanning line GL. One of the source electrode and drain electrode of the pixel switch 2 is connected to the signal line SL, and the other is connected to the gate electrode of the drive transistor 3 and the capacitor 4. One of the source electrode and drain electrode of the drive transistor 3 is connected to the power line PL and the capacitor 4, and the other is connected to the anode of the display element DEa and also to one of the source electrode and drain electrode of the switching element SW. The other of the source electrode and drain electrode of the switching element SW is connected to the anode of the display element DEb. The display element DEa (first display element) is connected in series to the drive transistor 3, and the display element DEb (second display element) is connected in parallel to the display element DEa. The switching element SW is arranged between the drive transistor 3 and the display element DEb. The gate electrode of the switching element SW is connected to a switch wiring SWL. A signal for switching between a first mode and a second mode, which will be described later, is supplied to the switch wiring SWL.

[0016] The configuration of the pixel circuit 1 is not limited to the example shown in the figure. For example, the pixel circuit 1 may include more thin film transistors and capacitors.

[0017] The display elements DEa and DEb are organic light-emitting diodes (OLEDs) as light-emitting elements, and may be referred to as organic EL elements.

[0018] The display device DSP has a first mode in which the switching element SW is in an off state and a second mode in which the switching element SW is in an on state.

[0019] When the display device DSP is in the first mode, the switching element SW is in the off state, so that the drive transistor 3 and the anode of the display element DEa are electrically connected, but the drive transistor 3 and the anode of the display element DEb are not electrically connected. Therefore, in the first mode, the display element DEa emits light, but the display element DEb does not emit light.

[0020] When the display device DSP is in the second mode, the switching element SW is on, so that the drive transistor 3 and the display element DEa, and the drive transistor 3 and the display element DEb are conductive. Therefore, in the second mode, the display elements DEa and DEb emit light.

[0021] In this way, by switching between the first mode and the second mode, the lighting state of the display element DEb can be switched.

[0022] Fig. 3 is a schematic plan view showing an example of the layout of subpixels SP1, SP2, and SP3. In the example of Fig. 3, subpixels SP2 and SP3 are aligned in the Y direction. Subpixels SP1 and SP2 are aligned in the X direction, and subpixels SP1 and SP3 are aligned in the X direction.

[0023] When the subpixels SP1, SP2, and SP3 are laid out in this manner, the display area DA is formed, for example, with columns in which the subpixels SP2 and SP3 are alternately arranged in the Y direction and columns in which multiple subpixels SP1 are repeatedly arranged in the Y direction. These columns are arranged alternately in the X direction.

[0024] The layout of the subpixels SP1, SP2, and SP3 is not limited to the example in Fig. 3. As another example, the subpixels SP1, SP2, and SP3 in each pixel PX may be arranged in order in the X direction.

[0025] In the display area DA, an inorganic insulating layer 5 and partition walls 6 are arranged. The inorganic insulating layer 5 has openings A51, A52, and A53 (pixel openings) in the subpixels SP1, SP2, and SP3, respectively. The inorganic insulating layer 5 having these openings A51, A52, and A53 may be referred to as a rib.

[0026] The partition wall 6 overlaps the inorganic insulating layer 5 in a plan view. The partition wall 6 is formed in a lattice shape surrounding the openings A51, A52, and A53. The partition wall 6 has openings A61, A62, and A63 that are surrounded by the upper edge of the partition wall 6, which will be described later with reference to FIG. 5. The opening A61 surrounds the opening A51 in the subpixel SP1. The opening A62 surrounds the opening A52 in the subpixel SP2. The opening A63 surrounds the opening A53 in the subpixel SP3. In the example of FIG. 3, the corners of the openings A51, A52, and A53 and the openings A61, A62, and A63 are rounded, but they may be right-angled, or the openings A51, A52, and A53 and the openings A61, A62, and A63 may be formed in other shapes such as circles or ellipses. The partition wall 6 is conductive and is electrically connected to a terminal at a common potential among a plurality of terminals provided in the peripheral area SA shown in FIG.

[0027] The subpixels SP1, SP2, and SP3 include display elements DE1, DE2, and DE3, respectively, as the display element DE. The display elements DE1, DE2, and DE3 have light-emitting layers made of materials that emit light of different colors.

[0028] The display element DE1 of the subpixel SP1 includes display elements DE1a and DE1b. The display element DE1a includes a lower electrode LE11, an upper electrode UE1, and an organic layer OR1. The display element DE1b includes a lower electrode LE12, an upper electrode UE1, and an organic layer OR1. The upper electrode UE1 and the organic layer OR1 continuously overlap the lower electrodes LE11 and LE12. The lower electrodes LE11 and LE12, the upper electrode UE1, and the organic layer OR1 overlap the openings A51 and A61, respectively. The peripheral portions of the organic layer OR1 and the upper electrode UE1 overlap the inorganic insulating layer 5 in a planar view. The organic layer OR1 includes a light-emitting layer that emits light in, for example, a green wavelength region.

[0029] The display element DE2 of the subpixel SP2 includes display elements DE2a and DE2b. The display element DE2a includes a lower electrode LE21, an upper electrode UE2, and an organic layer OR2. The display element DE2b includes a lower electrode LE22, an upper electrode UE2, and an organic layer OR2. The upper electrode UE2 and the organic layer OR2 continuously overlap the lower electrodes LE21 and LE22. The lower electrodes LE21 and LE22, the upper electrode UE2, and the organic layer OR2 overlap the openings A52 and A62, respectively. The peripheral portions of the organic layer OR2 and the upper electrode UE2 overlap the inorganic insulating layer 5 in a planar view. The organic layer OR2 includes a light-emitting layer that emits light in, for example, a blue wavelength region.

[0030] The display element DE3 of the subpixel SP3 includes display elements DE3a and DE3b. The display element DE3a includes a lower electrode LE31, an upper electrode UE3, and an organic layer OR3. The display element DE3b includes a lower electrode LE32, an upper electrode UE3, and an organic layer OR3. The upper electrode UE3 and the organic layer OR3 continuously overlap the lower electrodes LE31 and LE32. The lower electrodes LE31 and LE32, the upper electrode UE3, and the organic layer OR3 overlap the openings A53 and A63, respectively. The peripheral portions of the organic layer OR3 and the upper electrode UE3 overlap the inorganic insulating layer 5 in a planar view. The organic layer OR3 includes a light-emitting layer that emits light in the red wavelength range, for example.

[0031] The display elements DE1a, DE2a, and DE3a correspond to the display element DEa shown in Fig. 2. The display elements DE1b, DE2b, and DE3b correspond to the display element DEb shown in Fig. 2.

[0032] 3, the lower electrodes LE11, LE21, and LE31 are each formed in a rectangular shape with long sides parallel to the Y direction. The short sides of the lower electrodes LE11, LE21, and LE31, which are parallel to the X direction, overlap the inorganic insulating layer 5 and the partition wall 6 in a planar view. The short sides do not necessarily overlap the inorganic insulating layer 5 and the partition wall 6 in a planar view. The shape of each of the lower electrodes LE11, LE21, and LE31 is not limited to a rectangular shape.

[0033] The lower electrodes LE11 and LE12 are spaced apart from each other. In the example shown in FIG. 3, the lower electrode LE11 is surrounded by the lower electrode LE12 in a planar view. The lower electrodes LE21 and LE22 are spaced apart from each other. In the example shown in FIG. 3, the lower electrode LE21 is surrounded by the lower electrode LE22 in a planar view. The lower electrodes LE31 and LE32 are spaced apart from each other. In the example shown in FIG. 3, the lower electrode LE31 is surrounded by the lower electrode LE32 in a planar view.

[0034] In one example, the lower electrode LE11 corresponds to the anode of the display element DE1a, the lower electrode LE21 corresponds to the anode of the display element DE2a, and the lower electrode LE31 corresponds to the anode of the display element DE3a. In another example, the lower electrode LE12 corresponds to the anode of the display element DE1b, the lower electrode LE22 corresponds to the anode of the display element DE2b, and the lower electrode LE32 corresponds to the anode of the display element DE3b. The lower electrodes LE11, LE21, and LE31 are connected to the source or drain electrode of the drive transistor 3 in each subpixel SP shown in FIG. 2. The lower electrodes LE12, LE22, and LE32 are connected to the source or drain electrode of the switching element SW in each subpixel SP shown in FIG. 2. The upper electrodes UE1, UE2, and UE3 correspond to the cathodes of the display elements or common electrodes, and are in contact with the partition wall 6.

[0035] The organic layer OR1 has, in a planar view, a first region AR11 corresponding to the region where the opening A51 and the lower electrode LE11 overlap, and a second region AR12 corresponding to the region where the opening A51 and the lower electrode LE12 overlap. The organic layer OR2 has, in a planar view, a first region AR21 corresponding to the region where the opening A52 and the lower electrode LE21 overlap, and a second region AR22 corresponding to the region where the opening A52 and the lower electrode LE22 overlap. The organic layer OR3 has, in a planar view, a first region AR31 corresponding to the region where the opening A53 and the lower electrode LE31 overlap, and a second region AR32 corresponding to the region where the opening A53 and the lower electrode LE32 overlap.

[0036] In the example of FIG. 3, the first areas AR11, AR21, and AR31 and the second areas AR12, AR22, and AR32 are indicated by diagonal hatching.

[0037] When the display device DSP is in the first mode, as described above, the display element DEa shown in Fig. 2 emits light, but the display element DEb does not emit light. Therefore, in the first mode, the first regions AR11, AR21, and AR31 emit light, but the second regions AR12, AR22, and AR32 do not emit light.

[0038] When the display device DSP is in the second mode, the display elements DEa and DEb shown in Fig. 2 emit light as described above. Therefore, in the second mode, the first regions AR11, AR21, and AR31 and the second regions AR12, AR22, and AR32 emit light.

[0039] 3, the outlines of the lower electrodes LE11, LE12, LE21, LE22, LE31, and LE32 are indicated by dotted lines, and the outlines of the organic layers OR1, OR2, and OR3 and the upper electrodes UE1, UE2, and UE3 are indicated by dashed-dotted lines. Note that the outlines of the lower electrodes, organic layers, and upper electrodes shown in the figure do not necessarily reflect the exact shapes.

[0040] In the example of FIG. 3, the areas of the openings A51, A52, and A53 are different from one another. The area of opening A51 is larger than the area of opening A52, which is larger than the area of opening A53. The sum of the areas of the lower electrodes LE11 and LE12 exposed through opening A51 is larger than the sum of the areas of the lower electrodes LE21 and LE22 exposed through opening A52. The sum of the areas of the lower electrodes LE21 and LE22 exposed through opening A52 is larger than the sum of the areas of the lower electrodes LE31 and LE32 exposed through opening A53. The size relationship between the areas of the openings A51, A52, and A53 is not limited to the example shown in the figure.

[0041] 3, the areas of the openings A61, A62, and A63 are different from one another. The area of the opening A61 is larger than the area of the opening A62, which is larger than the area of the opening A63. The size relationship between the areas of the openings A61, A62, and A63 is not limited to the example shown in the figure.

[0042] Fig. 4 is a plan view showing an example of the layout of the partition walls 6 and the lenses ML1 and ML2 shown in Fig. 3. Note that in Fig. 4, the inorganic insulating layer, the organic layer, the upper electrode, etc. are not shown.

[0043] In the opening A61, the edge portion of the partition wall 6 includes opening edges AE1 and AE2. The opening edges AE1 and AE2 are parallel to the Y direction. The opening edges AE1 and AE2 face each other along the X direction. In the example shown in FIG. 4, the opening edges AE1 and AE2 overlap with the lower electrode LE12 in a plan view.

[0044] In the opening A62, the edge portion of the partition wall 6 includes opening edges AE3 and AE4. The opening edges AE3 and AE4 are parallel to the Y direction. The opening edges AE3 and AE4 face each other along the X direction. In the example shown in FIG. 4, the opening edges AE3 and AE4 overlap with the lower electrode LE22 in a plan view.

[0045] In the opening A63, the edge portion of the partition wall 6 includes opening edges AE5 and AE6. The opening edges AE5 and AE6 are parallel to the Y direction. The opening edges AE5 and AE6 face each other along the X direction. In the example shown in FIG. 4, the opening edges AE5 and AE6 overlap with the lower electrode LE32 in a plan view.

[0046] The display device DSP further includes lenses ML1 and ML2. The lenses ML1 and ML2 extend in the Y direction. The lens ML1 overlaps with the opening A61 in a plan view and also overlaps with the display element DE1. In the example of FIG. 4, the lens ML1 covers the opening A61. The lens ML2 overlaps with the openings A62 and A63 in a plan view and also overlaps with the display elements DE2 and DE3. In the example of FIG. 4, the lens ML2 continuously covers the openings A62 and A63.

[0047] The lens ML1 has lens edges ME1 (first lens edge), ME2 (second lens edge), and a center line MC1. The lens edges ME1, ME2, and the center line MC1 are parallel to the Y direction. In the illustrated example, the lens edges ME1, ME2 each overlap the partition wall 6 in a plan view. The lens edge ME1 is located between the opening edges AE1 and AE4, and between the opening edges AE1 and AE6, in the X direction. The lens edge ME2 is located between the opening edges AE2 and AE3, and between the opening edges AE2 and AE5, in the X direction.

[0048] The center line MC1 is located between the opening edges AE1 and AE2 in the X direction and overlaps with the opening A61 and the display element DE1 in plan view. In the illustrated example, the center line MC1 overlaps with the lower electrode LE11 in plan view.

[0049] The lens ML2 has lens edges ME3 (first lens edge), ME4 (second lens edge), and a center line MC2. The lens edges ME3, ME4, and the center line MC2 are parallel to the Y direction. In the illustrated example, the lens edges ME3, ME4 each overlap the partition wall 6 in a plan view. The lens edge ME3 is located between the opening edges AE2 and AE3 and between the opening edges AE2 and AE5 in the X direction. The lens edge ME4 is located between the opening edges AE1 and AE4 and between the opening edges AE1 and AE6 in the X direction.

[0050] The center line MC2 is located between the opening edges AE3 and AE4 and between the opening edges AE5 and AE6 in the X direction, and overlaps with the openings A62 and A63 and the display elements DE2 and DE3 in plan view. In the illustrated example, the center line MC2 overlaps with the lower electrodes LE21 and LE31 in plan view.

[0051] In this specification, the center line of a lens is a line connecting multiple principal points of the lens. A principal point is a point where the main surface of the lens intersects the optical axis at right angles. The main surface is a plane that includes the intersection of a light ray before incidence and a light ray after emergence when a light ray parallel to the optical axis is incident on the lens and is perpendicular to the optical axis.

[0052] Fig. 5 is a cross-sectional view showing an example of the configuration of the display device DSP taken along line A-A' shown in Fig. 4. Note that, although the subpixels SP1 and SP2 will be described below, the subpixel SP3 is also configured in the same way as the subpixels SP1 and SP2.

[0053] The circuit layer 11 is disposed on the substrate 10. The circuit layer 11 includes various circuits such as the pixel circuit 1 shown in FIG. 2 and various wirings such as the scanning line GL, the signal line SL, and the power supply line PL. The circuit layer 11 is covered with an insulating layer 12. The insulating layer 12 is an organic insulating layer that flattens unevenness caused by the circuit layer 11.

[0054] The lower electrodes LE11, LE12, LE21, and LE22 are disposed on the insulating layer 12 and spaced apart from one another. The inorganic insulating layer 5 is disposed on the insulating layer 12 and the lower electrodes LE12 and LE22. An opening A51 in the inorganic insulating layer 5 overlaps the lower electrodes LE11 and LE12, and an opening A52 overlaps the lower electrodes LE21 and LE22. The insulating layer 12 is covered with the inorganic insulating layer 5 between the lower electrodes LE12 and LE22. The lower electrodes LE11 and LE12 are connected to the pixel circuit 1 of the subpixel SP1 through contact holes provided in the insulating layer 12. The lower electrodes LE21 and LE22 are connected to the pixel circuit 1 of the subpixel SP2 through contact holes provided in the insulating layer 12. Note that the contact holes in the insulating layer 12 are omitted from FIG. 5 .

[0055] The partition wall 6 includes a conductive lower portion 61 disposed on the inorganic insulating layer 5 and an upper portion 62 disposed on the lower portion 61. The lower portion 61 surrounds the display elements DE1 and DE2, respectively, in a plan view. The upper portion 62 has an edge portion AE that surrounds the openings A61 and A62, respectively, in a plan view. The edge portion AE protrudes beyond the side surface of the lower portion 61. This type of shape of the partition wall 6 is called an overhanging shape.

[0056] In the illustrated example, the lower portion 61 has a first conductive layer 63 disposed on the inorganic insulating layer 5 and a second conductive layer 64 disposed on the first conductive layer 63. For example, the first conductive layer 63 is formed thinner than the second conductive layer 64. In addition, in the illustrated example, both end portions of the first conductive layer 63 protrude from the side surfaces of the second conductive layer 64.

[0057] The upper portion 62 has a thin film 65 disposed on the second conductive layer 64 and a thin film 66 disposed on the thin film 65. Both end portions of the thin film 65 and the thin film 66 protrude from the side surfaces of the second conductive layer 64. In the illustrated example, an edge AE of the thin film 65 surrounds the openings A61 and A62. The edge AE corresponds to, for example, the end portion of the thin film 65.

[0058] The organic layer OR1 is in contact with the lower electrodes LE11 and LE12 through the opening A51, covers the lower electrodes LE11 and LE12 exposed from the opening A51, and its peripheral portion is located on the inorganic insulating layer 5. The region where the organic layer OR1 and the lower electrode LE11 contact each other corresponds to the first region AR11, and the region where the organic layer OR1 and the lower electrode LE12 contact each other corresponds to the second region AR12. The organic layer OR1 is in contact with the insulating layer 12 through the opening A51 between the lower electrodes LE11 and LE12. The upper electrode UE1 covers the organic layer OR1 and is in contact with the lower portion 61.

[0059] The organic layer OR2 is in contact with the lower electrodes LE21, LE22 through the opening A52, covers the lower electrodes LE21, LE22 exposed from the opening A52, and has its peripheral edge located on the inorganic insulating layer 5. The region where the organic layer OR2 and the lower electrode LE21 contact each other corresponds to the first region AR21, and the region where the organic layer OR2 and the lower electrode LE22 contact each other corresponds to the second region AR22. The organic layer OR2 is in contact with the insulating layer 12 through the opening A52 between the lower electrodes LE21 and LE22. The upper electrode UE2 covers the organic layer OR2 and is in contact with the lower part 61.

[0060] In the example of FIG. 5, subpixel SP1 has a cap layer CP1 and a first sealing layer SE11, and subpixel SP2 has a cap layer CP2 and a first sealing layer SE12. The cap layers CP1 and CP2 serve as optical adjustment layers that improve the extraction efficiency of light emitted from the organic layers OR1 and OR2, respectively. Note that the cap layers CP1 and CP2 may be omitted. The cap layer CP1 is disposed on the upper electrode UE1. The cap layer CP2 is disposed on the upper electrode UE2.

[0061] The first sealing layer SE11 is disposed on the cap layer CP1, is in contact with the partition wall 6, and continuously covers each component of the subpixel SP1. The first sealing layer SE12 is disposed on the cap layer CP2, is in contact with the partition wall 6, and continuously covers each component of the subpixel SP2.

[0062] 5, parts of the organic layer OR1, the upper electrode UE1, and the cap layer CP1 are located on the partition wall 6 around the subpixel SP1. These parts are spaced apart from parts of the organic layer OR1, the upper electrode UE1, and the cap layer CP1 that are located in the opening A51 (parts that form the display element DE1).

[0063] Similarly, portions of the organic layer OR2, the upper electrode UE2, and the cap layer CP2 are located on the partition 6 around the subpixel SP2, and these portions are spaced apart from the portions of the organic layer OR2, the upper electrode UE2, and the cap layer CP2 that are located in the opening A52 (the portions that constitute the display element DE2).

[0064] In the following description, a multilayer structure including the organic layer OR1, the upper electrode UE1, and the cap layer CP1 will be referred to as a laminated film FL1, and a multilayer structure including the organic layer OR2, the upper electrode UE2, and the cap layer CP2 will be referred to as a laminated film FL2.

[0065] Ends of the first sealing layers SE11 and SE12 and ends of the stacked films FL1 and FL2 are located on the partition wall 6. In the example of FIG. 5, the stacked film FL1 and the first sealing layer SE11 on the partition wall 6 between the subpixels SP1 and SP2 are spaced apart from the stacked film FL2 and the first sealing layer SE12 on the partition wall 6.

[0066] The partition wall 6 and the first sealing layers SE11 and SE12 are covered with an organic insulating layer RS1 (first organic insulating layer). The organic insulating layer RS1 is covered with a second sealing layer SE2. The second sealing layer SE2 is covered with an organic insulating layer RS2 (second organic insulating layer). In the illustrated example, the organic insulating layer RS2 is thicker than the organic insulating layer RS1.

[0067] The lenses ML1 and ML2 are disposed on the organic insulating layer RS2. The lenses ML1 and ML2 are formed in a convex shape that protrudes toward the opposite side of the substrate 10 in the Z direction. The lens ML1 overlaps the lower electrodes LE11 and LE12, the stacked film FL1, and the first sealing layer SE11 in the Z direction. The lens ML2 overlaps the lower electrodes LE21 and LE22, the stacked film FL2, and the first sealing layer SE12 in the Z direction. In one example, the lenses ML1 and ML2 are covered with an air layer. In another example, the lenses ML1 and ML2 are covered with a material having a refractive index smaller than that of the lenses ML1 and ML2.

[0068] The center line MC1 is located at the thickest part of the lens ML1. Although not shown in Fig. 5, the center line MC2 shown in Fig. 4 is located at the thickest part of the lens ML2.

[0069] The focal positions of the lenses ML1 and ML2 desirably coincide with the positions of the light-emitting layers included in the organic layers OR1 and OR2. The focal positions of the lenses ML1 and ML2 can be made to coincide with the positions of the light-emitting layers by, for example, changing the thicknesses of the organic insulating layers RS1 and RS2.

[0070] A cover member such as a polarizing plate and a cover glass may be further disposed above the lenses ML1 and ML2.

[0071] The display device DSP further includes a light-shielding layer BM disposed on the organic insulating layer RS2. The light-shielding layer BM covers the area between the lenses ML1 and ML2 in the X direction. In the illustrated example, the light-shielding layer BM overlaps the lens edges ME1 to ME4. In addition, both ends of the light-shielding layer BM are covered by the lenses ML1 and ML2.

[0072] The inorganic insulating layer 5, the first sealing layers SE11 and SE12, and the second sealing layer SE2 are formed of an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), aluminum oxide (Al2O3), etc. The organic insulating layers RS1 and RS2 are formed of a resin material (organic insulating material) such as epoxy resin or acrylic resin.

[0073] The lower portion 61 of the partition wall 6 is formed of a conductive material and is electrically connected to the upper electrodes UE1 and UE2. The first conductive layer 63 is formed of a titanium-based material such as titanium or a titanium compound. The second conductive layer 64 is formed of a material different from the first conductive layer 63 and the upper portion 62, and is formed of an aluminum-based material such as aluminum or an aluminum compound.

[0074] The upper portion 62 of the partition wall 6 is formed of, for example, a conductive material, but may also be formed of an insulating material. The thin film 65 is formed of, for example, a titanium-based material such as titanium or a titanium compound. The thin film 66 is formed of, for example, an oxide conductive material such as indium tin oxide (ITO).

[0075] The lower electrodes LE11, LE12, LE21, and LE22 are multilayer structures including a transparent layer made of an oxide conductive material such as indium tin oxide (ITO) and a reflective layer made of a metal material such as silver. In one example, the lower electrodes LE11, LE12, LE21, and LE22 are multilayer structures including a reflective layer between a pair of transparent layers. The lower transparent layer functions as an adhesive layer that adheres to the insulating layer 12.

[0076] In one example, organic layer OR1 includes an emissive layer formed of a material that emits green light, and organic layer OR2 includes an emissive layer formed of a material that emits blue light. In another example, organic layer OR1 may include an emissive layer formed of a material that emits blue light, and organic layer OR2 may include an emissive layer formed of a material that emits green light. Each of organic layers OR1 and OR2 includes multiple functional layers, such as a hole injection layer, a hole transport layer, an electron blocking layer, a hole blocking layer, an electron transport layer, and an electron injection layer.

[0077] The upper electrodes UE1 and UE2 are made of a metal material such as an alloy of magnesium and silver (MgAg). The cap layers CP1 and CP2 are multilayer structures of multiple thin films. The multiple thin films are all transparent and have different refractive indices.

[0078] The lenses ML1 and ML2 are formed of a transparent resin material such as epoxy resin, acrylic resin, or polyimide resin.

[0079] Fig. 6 is a diagram illustrating the role of lens ML1 shown in Fig. 5. Light ray L1 emitted in the Z direction from display element DE1a, which overlaps with center line MC1, travels along the Z direction with almost no refraction at the interface between lens ML1 and air. On the other hand, light ray L2 emitted in the Z direction from display element DE1b is refracted at the interface between lens ML1 and air and travels in a direction tilted from the Z direction toward center line MC1 of lens ML1.

[0080] In other words, a user standing in the direction of light ray L1 can see the light emitted from display element DE1a, but can barely see the light emitted from display element DE1b. A user standing in the direction of light ray L2 can see the light emitted from display element DE1b, but can barely see the light emitted from display element DE1a. In this way, lens ML1 refracts the light emitted from the display elements and serves to limit the viewing angle.

[0081] When the display device DSP is in the first mode, the display element DE1a emits light and the display element DE1b does not emit light. Therefore, a user positioned in the direction of travel of the light ray L1 can clearly see the image displayed on the display device DSP, but a user positioned in the direction of travel of the light ray L2 can barely see the image. In other words, in the first mode, the viewing angle of the display device DSP is limited.

[0082] On the other hand, when the display device DSP is in the second mode, the display elements DE1a and DE1b emit light. Therefore, a user standing in the direction of travel of the light rays L1 and L2 can clearly view the image. In other words, in the second mode, the viewing angle of the display device DSP is wider than in the first mode. Therefore, by switching between the first mode and the second mode, it is possible to control the viewing angle of the display device DSP.

[0083] Next, a case where the display device DSP of this embodiment is mounted on a vehicle such as an automobile will be described. Fig. 7 is a diagram showing a state where the display device DSP mounted on the in-vehicle device displays an image in a first mode. Fig. 8 is a diagram showing a state where the display device DSP mounted on the in-vehicle device displays an image in a second mode. As an example, a case where the display device DSP is mounted in front of the passenger seat will be described.

[0084] 7, when an image is displayed in the first mode, a passenger PAS in the passenger seat sitting in front of the display device DSP can clearly see a screen 101 on which an image is displayed in the display area DA. On the other hand, the driver DRV has limited visibility of the displayed image, and can see a darker image than that displayed on the passenger seat side, or a screen 102 on which no image is displayed.

[0085] 8, when an image is displayed in the second mode, the passenger PAS in the passenger seat can clearly see the screen 101 on which the image is displayed in the display area DA. The driver DRV can clearly see the screen 102 on which the same image as the image seen by the passenger PAS in the passenger seat is displayed.

[0086] When driving, if it is desired to make the image displayed on the display device DSP difficult to view from the driver's seat, but viewable from the passenger seat, the image is displayed in the first mode. As a result, as shown in FIG. 7, the image is viewable only from the driver's seat, but is clearly viewable from the passenger seat. On the other hand, when it is desired to view the image from both the driver's seat and the passenger seat with the engine off, the image is displayed in the second mode. As shown in FIG. 8, the image is viewable clearly from both the driver's seat and the passenger seat. In this way, by switching between the first mode and the second mode, the viewing angle is controlled, and it is possible to change the visibility of the image, particularly from the driver's seat.

[0087] Fig. 9 is a schematic plan view showing another example of the layout of subpixels SP1, SP2, and SP3. In the example of Fig. 9, the lower electrodes LE11 and LE21 are aligned along the X direction, the lower electrodes LE21 and LE22 are aligned along the X direction, and the lower electrodes LE31 and LE32 are aligned along the X direction. Furthermore, the first region AR11 is larger than the second region AR12, the first region AR21 is larger than the second region AR22, and the first region AR31 is larger than the second region AR32.

[0088] Fig. 10 is a plan view showing an example of the layout of the partition walls 6 and lenses ML1 and ML2 shown in Fig. 9. In the example shown in Fig. 10, the direction in which the lower electrodes LE11 and LE12 are arranged (X direction) is perpendicular to the center line MC1 of the lens ML1. Furthermore, the direction in which the lower electrodes LE21 and LE22 and the lower electrodes LE31 and LE32 are arranged (X direction) is perpendicular to the center line MC2 of the lens ML2.

[0089] 10, the center line MC1 of the lens ML1 overlaps with the lower electrode LE11 in plan view, and the center line MC2 of the lens ML2 overlaps with the lower electrodes LE21 and LE31 in plan view.

[0090] 10, the opening edge AE1 overlaps the lower electrode LE11 in a plan view, and the opening edge AE2 overlaps the lower electrode LE12 in a plan view. The opening edge AE3 overlaps the lower electrode LE21 in a plan view, and the opening edge AE4 overlaps the lower electrode LE22 in a plan view. Furthermore, the opening edge AE5 overlaps the lower electrode LE31 in a plan view, and the opening edge AE6 overlaps the lower electrode LE32 in a plan view.

[0091] Fig. 11 is a diagram for explaining the role of the lens ML1 shown in Fig. 10. In the following, the direction from the lens edge ME1 toward the center line MC1 along the X direction is defined as the X1 direction, and the direction from the lens edge ME2 toward the center line MC1 along the X direction is defined as the X2 direction.

[0092] Light ray L1 emitted along the Z direction from a portion of display element DE1a that overlaps with center line MC1 travels along the Z direction with almost no refraction at the interface between lens ML1 and air. Light ray L2 emitted along the Z direction from a portion of display element DE1a located on the X2 side of center line MC1 is refracted at the interface between lens ML1 and air and travels along a direction tilted from the Z direction toward center line MC1 of lens ML1 (X1 direction). Light ray L3 emitted along the Z direction from display element DE1b is refracted at the interface between lens ML1 and air and travels along a direction tilted from the Z direction toward center line MC1 of lens ML1 (X2 direction).

[0093] That is, a user standing in the direction of light rays L1 and L2 can see the light emitted from display element DE1a but can barely see the light emitted from display element DE1b. A user standing in the direction of light ray L3 can see the light emitted from display element DE1b but can barely see the light emitted from display element DE1a.

[0094] When the display device DSP is in the first mode, a user standing in the direction of travel of the light rays L1 and L2 can clearly see the image displayed on the display device DSP. When the display device DSP is in the second mode, a user standing in the direction of travel of the light rays L1, L2, and L3 can clearly see the image. Therefore, by switching between the first mode and the second mode, it is possible to control the viewing angle of the display device DSP.

[0095] Fig. 12 is a schematic plan view showing yet another example of the layout of the subpixels SP1, SP2, and SP3. In the example of Fig. 12, the first region AR11 is smaller than the second region AR12, the first region AR21 is smaller than the second region AR22, and the first region AR31 is smaller than the second region AR32.

[0096] Fig. 13 is a plan view showing an example of the layout of the partitions 6 and lenses shown in Fig. 12. In the example shown in Fig. 13, the center line MC1 of the lens ML1 overlaps with the lower electrode LE12 in a planar view. Also, the center line MC2 of the lens ML2 overlaps with the lower electrodes LE22 and LE32 in a planar view.

[0097] Fig. 14 is a diagram illustrating the role of the lens ML1 shown in Fig. 13. A light ray L1 emitted in the Z direction from a portion of the display element DE1b that overlaps with the center line MC1 travels along the Z direction with almost no refraction at the interface between the lens ML1 and air. A light ray L2 emitted in the Z direction from a portion of the display element DE1b that is located on the X1-direction side of the center line MC1 is refracted at the interface between the lens ML1 and air and travels along a direction tilted from the Z direction toward the center line MC1 of the lens ML1 (X2 direction side). A light ray L3 emitted in the Z direction from the display element DE1a is refracted at the interface between the lens ML1 and air and travels along a direction tilted from the Z direction toward the center line MC1 of the lens ML1 (X1 direction side).

[0098] That is, a user standing in the direction of light rays L1 and L2 can see the light emitted from display element DE1b but can barely see the light emitted from display element DE1a. A user standing in the direction of light ray L3 can see the light emitted from display element DE1a but can barely see the light emitted from display element DE1b.

[0099] When the display device DSP is in the first mode, a user standing in the direction of travel of the light beam L3 can clearly view the image displayed on the display device DSP. When the display device DSP is in the second mode, a user standing in the direction of travel of the light beams L1, L2, and L3 can clearly view the image. Therefore, by switching between the first mode and the second mode, it is possible to control the viewing angle of the display device DSP.

[0100] Fig. 15 is a schematic plan view showing yet another example of the layout of the subpixels SP1, SP2, and SP3. In the example shown in Fig. 15, the lower electrodes LE11, LE21, and LE31 are each formed in a rectangular shape with long sides parallel to the X direction. Furthermore, the short sides of the lower electrodes LE11, LE21, and LE31, each parallel to the Y direction, overlap the inorganic insulating layer 5 and the partition wall 6 in plan view.

[0101] In the example shown in FIG. 15, the lower electrode LE11 is surrounded by the lower electrode LE12 in a planar view, the lower electrode LE21 is surrounded by the lower electrode LE22 in a planar view, and the lower electrode LE31 is surrounded by the lower electrode LE32 in a planar view.

[0102] Fig. 16 is a plan view showing an example of the layout of the partition walls 6 and lenses ML1, ML2, and ML3 shown in Fig. 15. In the example shown in Fig. 16, the lenses ML1 and ML2 extend in the X direction. The lens edges ME1 to ME4 and center lines MC1 and MC2 are parallel to the X direction. The lens ML1 covers the opening A61, and the lens ML2 covers the opening A62. In the example shown in Fig. 16, the cross-sectional shape of each of the lenses ML1 and ML2 along the Y direction is convex, protruding toward the opposite side from the substrate 10 (see Fig. 5).

[0103] The display device DSP further includes a lens ML3 in addition to the above-described lenses ML1 and ML2. In the example shown in Fig. 15, the lens ML3 extends in the X direction. The lens ML3 overlaps with the opening A63 in a plan view and also overlaps with the display element DE3. In the example of Fig. 15, the lens ML3 covers the opening A63.

[0104] The lens ML3 has lens edges ME5 (first lens edge) and ME6 (second lens edge), and a center line MC3. The lens edges ME5, ME6, and the center line MC3 are parallel to the X direction. In the example shown, the lens edges ME5, ME6 each overlap the partition wall 6 in a plan view. The center line MC3 also overlaps the opening A63 and the display element DE3 in a plan view. The center line MC3 also overlaps the lower electrode LE31 in a plan view. In the example shown in FIG. 16, the cross-sectional shape of the lens ML3 along the Y direction is convex, protruding toward the side opposite the substrate 10.

[0105] 16, the viewing angle in the Y direction can be controlled by switching between the first mode and the second mode. By controlling the viewing angle in the Y direction, for example, when the display device DSP is installed in an automobile, it is possible to suppress reflection of the displayed image on the automobile windshield.

[0106] Fig. 17 is a schematic plan view showing yet another example of the layout of subpixels SP1, SP2, and SP3. In the example shown in Fig. 17, lower electrodes LE11 and LE12 are aligned in the X and Y directions, lower electrodes LE21 and LE22 are aligned in the X and Y directions, and lower electrodes LE31 and LE32 are aligned in the X and Y directions. Furthermore, lower electrode LE12 is formed in a substantially U-shape along the outer shape of lower electrode LE11, lower electrode LE22 is formed in a substantially U-shape along the outer shape of lower electrode LE21, and lower electrode LE32 is formed in a substantially U-shape along the outer shape of lower electrode LE31.

[0107] Fig. 18 is a plan view showing an example of the layout of the partition walls 6 and lenses ML1, ML2, and ML3 shown in Fig. 17. In the example shown in Fig. 18, the lens ML1 is formed in a shape consisting of lens edges ME1 and ME2 parallel to the Y direction and two semicircular arcs convex outward from the lens ML1 in the Y direction in a plan view. Furthermore, the lens ML2 is formed in a shape consisting of lens edges ME3 and ME4 parallel to the Y direction and two semicircular arcs convex outward from the lens ML2 in the Y direction in a plan view. Note that the lenses ML1 and ML2 may be formed in, for example, an elliptical or circular shape in a plan view.

[0108] 18, the lens ML3 is formed to have a circular shape in a plan view. Note that the lens ML3 may be formed to have an elliptical shape or a shape formed by a straight line parallel to the X direction and two arcs that are convex outward from the lens ML3 in the X direction in a plan view, for example.

[0109] 18, the lenses ML1, ML2, and ML3 do not completely cover the openings A61, A62, and A63, respectively, in a planar view. Note that the lenses ML1, ML2, and ML3 may completely cover the openings A61, A62, and A63, respectively, in a planar view. The portions of the openings A61, A62, and A63 that do not overlap with the lenses ML1, ML2, and ML3 overlap with a light-shielding layer (light-shielding layer BM shown in FIG. 5), not shown.

[0110] Lenses ML1, ML2, and ML3 have principal points P1, P2, and P3, respectively. Principal point P1 overlaps with lower electrode LE11 in a planar view, principal point P2 overlaps with lower electrode LE21 in a planar view, and principal point P3 overlaps with lower electrode LE31 in a planar view. Principal points P1, P2, and P3 are located at the thickest parts of lenses ML1, ML2, and ML3, respectively.

[0111] Fig. 19 is a cross-sectional view showing an example of the configuration of the display device DSP taken along line B-B' and line C-C' shown in Fig. 18. The upper part of Fig. 19 is a cross-sectional view showing an example of the configuration of the display device DSP taken along line B-B' in Fig. 18. The cross-sectional shape of the lens ML1 taken along the X direction is a convex shape that protrudes to the side opposite to the substrate 10. Therefore, as described above, the viewing angle in the X direction is limited.

[0112] The lower part of Fig. 19 is a cross-sectional view showing an example of the configuration of the display device DSP taken along line CC' in Fig. 18. The cross-sectional shape of the lens ML1 in the Y direction is a convex shape that protrudes toward the side opposite to the substrate 10. Therefore, the viewing angle in the Y direction is limited, just like in the X direction. By limiting the viewing angle in the Y direction, for example, when the display device DSP is installed in an automobile, it is possible to suppress reflection of the displayed image on the automobile's windshield.

[0113] 19, the portion between the organic insulating layer RS2 and the substrate 10 is not shown. Between the organic insulating layer RS2 and the substrate 10, the above-described configurations can be applied.

[0114] Similarly to the lens ML1, the cross-sectional shapes of the lenses ML2 and ML3 along the X and Y directions are convex shapes that protrude toward the side opposite to the substrate 10.

[0115] Fig. 20 is a schematic plan view showing yet another example of the layout of the subpixels SP1, SP2, and SP3. The area of the first region AR11 shown in Fig. 20 is smaller than the area of the first region AR11 shown in Fig. 17, the area of the first region AR21 shown in Fig. 20 is smaller than the area of the first region AR21 shown in Fig. 17, and the area of the first region AR31 shown in Fig. 20 is smaller than the area of the first region AR31 shown in Fig. 17.

[0116] Fig. 21 is a plan view showing an example of the layout of the partition walls 6 and lenses ML1, ML2, and ML3 shown in Fig. 20. In the example shown in Fig. 21, principal point P1 overlaps with the lower electrode LE12 in a planar view, principal point P2 overlaps with the lower electrode LE22 in a planar view, and principal point P3 overlaps with the lower electrode LE32 in a planar view. In the display device DSP shown in Fig. 21, the viewing angles in the X and Y directions can be limited.

[0117] 17 to 21, when the X direction corresponds to the first direction, the Y direction corresponds to the second direction. When the Y direction corresponds to the first direction, the X direction corresponds to the second direction.

[0118] 22 is a circuit diagram showing another example of the circuit configuration of the subpixel SP. In addition to the above-mentioned display elements DEa and DEb, the subpixel SP further includes a display element DEc driven by the pixel circuit 1. The display element DEc is connected in parallel with the display element DEb. The anodes of the display elements DEb and DEc are each connected to the source electrode or drain electrode of the switching element SW. Like the display elements DEa and DEb, the display element DEc is an organic light-emitting diode (OLED) as a light-emitting element.

[0119] 22, in the first mode, the switching element SW is in the off state, so the drive transistor 3 and display element DEa are conductive, but the drive transistor 3 and display element DEb, and the drive transistor 3 and display element DEc are not conductive. Therefore, in the first mode, the display element DEa emits light, but the display elements DEb and DEc do not emit light.

[0120] In the second mode, the switching element SW is in the on state, so that the drive transistor 3 and the display element DEa, the drive transistor 3 and the display element DEb, and the drive transistor 3 and the display element DEc are electrically connected, and therefore, in the second mode, the display elements DEa, DEb, and DEc emit light.

[0121] 23 is a schematic plan view showing yet another example of the layout of subpixels SP1, SP2, and SP3. The display element DE1 of subpixel SP1 includes a display element DE1c in addition to the above-described display elements DE1a and DE1b. The display element DE1c includes a lower electrode LE13, an upper electrode UE1, and an organic layer OR1. The upper electrode UE1 and the organic layer OR1 are continuously overlapped with the lower electrodes LE11, LE12, and LE13.

[0122] The lower electrode LE13 is spaced apart from the lower electrodes LE11 and LE12. The lower electrode LE13 overlaps with the openings A51 and A61. The lower electrode LE11 is disposed between the lower electrodes LE12 and LE13 in the X direction.

[0123] The display element DE2 of the subpixel SP2 includes a display element DE2c in addition to the above-described display elements DE2a and DE2b. The display element DE2c includes a lower electrode LE23, an upper electrode UE2, and an organic layer OR2. The upper electrode UE2 and the organic layer OR2 are continuously overlapped with the lower electrodes LE21, LE22, and LE23.

[0124] The lower electrode LE23 is spaced apart from the lower electrodes LE21 and LE22. The lower electrode LE23 overlaps with the openings A52 and A62. The lower electrode LE21 is disposed between the lower electrodes LE22 and LE23 in the X direction.

[0125] The display element DE3 of the subpixel SP3 includes a display element DE3c in addition to the above-described display elements DE3a and DE3b. The display element DE3c includes a lower electrode LE33, an upper electrode UE3, and an organic layer OR3. The upper electrode UE3 and the organic layer OR3 are continuously overlapped with the lower electrodes LE31, LE32, and LE33.

[0126] The lower electrode LE33 is spaced apart from the lower electrodes LE31 and LE32. The lower electrode LE33 overlaps with the openings A53 and A63. The lower electrode LE31 is disposed between the lower electrodes LE32 and LE33 in the X direction.

[0127] Display elements DE1c, DE2c, and DE3c correspond to display element DEc shown in FIG. 22. In one example, lower electrode LE13 corresponds to the anode of display element DE1c, lower electrode LE23 corresponds to the anode of display element DE2c, and lower electrode LE33 corresponds to the anode of display element DE3c. Lower electrodes LE13, LE23, and LE33 are connected to the source electrode or drain electrode of the switching element SW in each subpixel SP shown in FIG. 22. That is, lower electrode LE12 and lower electrode LE13 are electrically connected, lower electrode LE22 and lower electrode LE23 are electrically connected, and lower electrode LE32 and lower electrode LE33 are electrically connected. In the example of FIG. 23, the outlines of lower electrodes LE13, LE23, and LE33 are indicated by dotted lines.

[0128] In addition to the first region AR11 and second region AR12 described above, the organic layer OR1 further includes a third region AR13 corresponding to the region where the opening A51 and the lower electrode LE13 overlap in a planar view. In addition to the first region AR21 and second region AR22 described above, the organic layer OR2 further includes a third region AR23 corresponding to the region where the opening A52 and the lower electrode LE23 overlap in a planar view. In addition to the first region AR31 and second region AR32 described above, the organic layer OR3 further includes a third region AR33 corresponding to the region where the opening A53 and the lower electrode LE33 overlap in a planar view. In the example of FIG. 23, the third regions AR13, AR23, and AR33 are indicated by diagonal hatching.

[0129] When the display device DSP is in the first mode, as described above, the display element DEa shown in Fig. 22 emits light, but the display elements DEb and DEc do not emit light. Therefore, in the first mode, the first regions AR11, AR21, and AR31 emit light, but the second regions AR12, AR22, and AR32 and the third regions AR13, AR23, and AR33 do not emit light.

[0130] When the display device DSP is in the second mode, the display elements DEa, DEb, and DEc shown in Fig. 22 emit light as described above. Therefore, in the second mode, the first regions AR11, AR21, and AR31, the second regions AR12, AR22, and AR32, and the third regions AR13, AR23, and AR33 emit light.

[0131] Fig. 24 is a plan view showing an example of the layout of the partition walls 6 and lenses ML1 and ML2 shown in Fig. 23. In the example shown in Fig. 24, the opening edge AE1 overlaps with the lower electrode LE12 in a plan view, and the opening edge AE2 overlaps with the lower electrode LE13. Furthermore, the opening edge AE3 overlaps with the lower electrode LE22 in a plan view, and the opening edge AE4 overlaps with the lower electrode LE23. Furthermore, the opening edge AE5 overlaps with the lower electrode LE32 in a plan view, and the opening edge AE6 overlaps with the lower electrode LE33.

[0132] 24, the center line MC1 is located between the lower electrodes LE12 and LE13 in the X direction and overlaps with the lower electrode LE11 in a planar view. The center line MC2 is located between the lower electrodes LE22 and LE23 and between the lower electrodes LE32 and LE33 in the X direction and overlaps with the lower electrodes LE21 and LE31 in a planar view.

[0133] 24, the direction in which the lower electrodes LE11, LE12, and LE13 are arranged (X direction) is perpendicular to the center line MC1 of the lens ML1. Also, the direction in which the lower electrodes LE21, LE22, and LE23 are arranged and the direction in which the lower electrodes LE31, LE32, and LE33 are arranged (X direction) are perpendicular to the center line MC2 of the lens ML2.

[0134] 25 is a cross-sectional view showing an example of the configuration of the display device DSP taken along line DD' shown in FIG. 24. The lower electrode LE13 is disposed on the insulating layer 12. The organic layer OR1 is in contact with the lower electrode LE13 through an opening A51. The region where the organic layer OR1 and the lower electrode LE13 are in contact corresponds to a third region AR13. The organic layer OR1 is in contact with the insulating layer 12 through the opening A51 between the lower electrode LE11 and the lower electrode LE13 and between the lower electrode LE12 and the lower electrode LE13.

[0135] In the above example, the lower electrodes LE11, LE21, and LE31 correspond to first lower electrodes, the lower electrodes LE12, LE22, and LE32 correspond to second lower electrodes, and the lower electrodes LE13, LE23, and LE33 correspond to third lower electrodes.

[0136] Fig. 26 is a diagram illustrating the role of lens ML1 shown in Fig. 25. Light ray L1 emitted from display element DE1a along the Z direction is hardly refracted at the interface between lens ML1 and air and travels along the Z direction. Light ray L2 emitted from display element DE1b along the Z direction is refracted at the interface between lens ML1 and air and travels along a direction tilted from the Z direction toward center line MC1 of lens ML1 (X1 direction). Light ray L3 emitted from display element DE1c along the Z direction is refracted at the interface between lens ML1 and air and travels along a direction tilted from the Z direction toward center line MC1 of lens ML1 (X2 direction).

[0137] That is, a user standing in the direction of light ray L1 can see the light emitted from display element DE1a but can barely see the light emitted from display elements DE1b and DE1c. A user standing in the direction of light ray L2 can see the light emitted from display element DE1b but can barely see the light emitted from display elements DE1a and DE1c. A user standing in the direction of light ray L3 can see the light emitted from display element DE1c but can barely see the light emitted from display elements DE1a and DE1b.

[0138] When the display device DSP is in the first mode, the display element DE1a emits light, and the display elements DE1b and DE1c do not emit light. Therefore, a user positioned in the direction of travel of the light ray L1 can clearly see the image displayed on the display device DSP, but a user positioned in the direction of travel of the light rays L2 and L3 can barely see the image. In other words, in the first mode, the viewing angle of the display device DSP is limited.

[0139] On the other hand, when the display device DSP is in the second mode, the display elements DE1a, DE1b, and DE1c emit light. Therefore, a user standing in the direction of travel of the light rays L1, L2, and L3 can clearly view the image. In other words, in the second mode, the viewing angle of the display device DSP is wider than in the first mode. Therefore, by switching between the first mode and the second mode, it is possible to control the viewing angle of the display device DSP.

[0140] All display devices that can be implemented by a person skilled in the art by appropriately modifying the design based on the display devices described above as embodiments of the present invention also fall within the scope of the present invention as long as they include the gist of the present invention.

[0141] Within the scope of the concept of the present invention, a person skilled in the art may conceive of various modifications, and these modifications are also understood to fall within the scope of the present invention. For example, even if a person skilled in the art appropriately adds or deletes components or modifies the design of the above-described embodiment, or adds or omits steps or modifies conditions, these modifications are also included within the scope of the present invention as long as they maintain the gist of the present invention.

[0142] Furthermore, with regard to other effects brought about by the aspects described in the above embodiments, those that are clear from the description in this specification or that can be appropriately thought of by a person skilled in the art are naturally understood to be brought about by the present invention. [Explanation of symbols]

[0143] DSP...display device, PNL...display panel, 10...substrate, 5...inorganic insulating layer, 6...partition wall, 61...lower part, 62...upper part, PX...pixel, SW...switching element, 101, 102...screen, LE11~LE13, LE21~LE23, LE31~LE33...lower electrode, MC1, MC2, MC3...center line, ML1, ML2, ML3...lens, P1, P2, P3...principal point, DRV...driver, PAS...passenger in the front seat.

Claims

1. A substrate; an insulating layer disposed above the substrate; a first lower electrode and a second lower electrode spaced apart from each other and disposed on the insulating layer; a rib having a single pixel opening overlapping the first lower electrode and the second lower electrode; a partition wall including a conductive lower portion disposed above the rib, and an upper portion disposed on the lower portion and having an opening surrounded by an edge portion protruding from a side surface of the lower portion; an organic layer having a light-emitting layer and in contact with the first lower electrode and the second lower electrode through the pixel opening; an upper electrode covering the organic layer and in contact with the lower portion; a lens formed in a convex shape protruding toward the opposite side of the substrate and overlapping with the opening; Equipped with the organic layer is in contact with the insulating layer through the pixel opening between the first lower electrode and the second lower electrode; Display device.

2. the organic layer has a first region in contact with the first lower electrode and a second region in contact with the second lower electrode; a first mode in which the first region emits light; a second mode in which the first region and the second region emit light; The display device according to claim 1 .

3. Furthermore, a drive transistor; a first display element connected in series with the driving transistor and including the first lower electrode; a second display element connected in parallel to the first display element and including the second lower electrode; a switching element disposed between the drive transistor and the second display element; the switching element is configured to not conduct electricity between the driving transistor and the second lower electrode in the first mode, and to conduct electricity between the driving transistor and the second lower electrode in the second mode. The display device according to claim 2 .

4. The first lower electrode is surrounded by the second lower electrode. The display device according to claim 2 .

5. the first lower electrode and the second lower electrode are aligned in one direction, a direction in which the first lower electrode and the second lower electrode are arranged intersects with a center line of the lens; The display device according to claim 2 .

6. the first lower electrode and the second lower electrode are aligned in a first direction, a cross-sectional shape of the lens along the first direction and a second direction intersecting the first direction is a convex shape protruding toward an opposite side to the substrate; The display device according to claim 2 .

7. a principal point of the lens overlaps with the first lower electrode in a plan view; The display device according to claim 6.

8. a third lower electrode disposed on the insulating layer, spaced apart from the first lower electrode and the second lower electrode, and electrically connected to the second lower electrode; the pixel opening overlaps the third lower electrode; the first lower electrode is disposed between the second lower electrode and the third lower electrode; the organic layer is in contact with the third lower electrode through the pixel opening, and is in contact with the insulating layer between the first lower electrode and the third lower electrode and between the second lower electrode and the third lower electrode; The display device according to claim 3 .

9. a direction in which the first lower electrode, the second lower electrode, and the third lower electrode are arranged intersects with a center line of the lens; The display device according to claim 8 .

10. a center line of the lens overlaps with the first lower electrode in a plan view; The display device according to claim 2 or 8.

11. the lens has a first lens edge and a second lens edge parallel to a centerline of the lens; the first lens edge and the second lens edge overlap with the partition wall in a plan view; The display device according to claim 1 .

12. Further, a light-shielding layer is provided that overlaps the first lens edge and the second lens edge in a plan view. The display device according to claim 11.

13. a cap layer disposed on the upper electrode; a first organic insulating layer disposed on the cap layer; a sealing layer formed of an inorganic material and disposed on the first organic insulating layer; a second organic insulating layer disposed between the sealing layer and the lens; The second organic insulating layer is thicker than the first organic insulating layer. The display device according to claim 1 .

14. The lens is made of a transparent resin material. The display device according to claim 1 .

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