Test system, maintenance tool, method for creating inspection abnormality simulation table, and inspection abnormality simulation table creation program
The system addresses inefficiencies in protective relay testing by simulating trip circuit abnormalities without jigs, improving inspection efficiency and preventing errors through direct abnormality signal input.
Patent Information
- Application Number
- JP2024011484
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2024-01-30
- Publication Date
- 2025-08-12
AI Technical Summary
Existing methods for testing digital protective relays using jigs are inefficient due to varying settings and risk incorrect settings, leading to potential malfunctions during factory inspections.
A system that simulates abnormal conditions in trip circuits without jigs by using a maintenance tool to input abnormality signals directly into the inspection function unit, utilizing an inspection abnormality simulation table created through a computer-based method.
Enhances the efficiency of testing the inspection function of protective relays by preventing setting errors and ensuring accurate simulation of abnormal conditions.
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Figure 2025116945000001_ABST
Abstract
Description
[Technical Field]
[0001] The present invention relates to a technique for testing the inspection function of a digital protective relay (hereinafter referred to as a protective relay). [Background technology]
[0002] As is well known, protective relays detect short-circuit faults and ground faults that occur in power plants, substations, transmission and distribution lines, and load equipment that make up the power system, and output a trip signal to the trip circuit to operate a circuit breaker and isolate the faulted section from the power system.
[0003] The protective relay also has an inspection function (trip circuit confirmation system) that checks whether the device itself is normal. That is, it outputs a trip signal as an inspection command signal to the trip circuit that operates the circuit breaker, and determines whether there is an abnormality from the answer signal.
[0004] By periodically operating such an inspection function unit, automatic inspection of the protective relay is performed, and furthermore, during the manufacturing process, the inspection function unit itself is tested to see if it is normal or not before shipping from the factory, etc. This method is publicly known from Patent Document 1. [Prior art documents] [Patent documents]
[0005] [Patent Document 1] Patent Publication No. 2016-180604 Summary of the Invention [Problem to be solved by the invention]
[0006] In Patent Document 1, a jig is attached to the input section of the system that constitutes the inspection function section, and an answer signal that simulates an abnormality is input.
[0007] However, since the settings of the jig differ for each panel, the settings are not easy and often take a lot of time. As a result, tests before shipping from the factory cannot be carried out efficiently, and there is a risk of malfunctions due to incorrect settings of the jig.
[0008] The present invention was made to solve these conventional problems, and aims to simulate abnormal occurrences in trip circuits without using jigs, thereby improving the efficiency of checking the operation of the inspection function part of protective relays and preventing setting errors. [Means for solving the problem]
[0009] One aspect of the present invention is a system for testing a protective relay, comprising: The protective relay includes an inspection function unit that outputs an inspection command signal to a trip circuit that operates a circuit breaker and confirms the operation of the trip circuit from an answer signal in response to the inspection command signal, a maintenance tool that replaces the answer signal with an input signal that simulates an abnormality in the trip circuit and inputs the input signal to the inspection function unit; The operation of the inspection function unit is tested based on an input signal input from the maintenance tool.
[0010] Another aspect of the present invention is a maintenance tool for a protective relay having an inspection function unit that outputs an inspection command signal to a trip circuit that operates a circuit breaker and confirms the operation of the trip circuit from an answer signal corresponding to the inspection command, The answer signal is replaced with an input signal that simulates an abnormality in the relay and is input to the inspection function unit.
[0011] Yet another aspect of the present invention is a method for creating an inspection abnormality simulation table by a computer, comprising the steps of: creating a netlist file in which input / output information of software components extracted from the inspection sequence indicating the logical structure of the inspection function unit is described; creating an inspection information file by extracting input / output information of the inspection information to be simulated from the netlist file based on a bit definition file; and creating the table based on the inspection information file.
[0012] The present invention can also be configured as a program that causes a computer to execute the method for creating an inspection abnormality simulation table. [Effects of the Invention]
[0013] According to the present invention, it is possible to simulate the occurrence of an abnormality in a protective relay without using a jig, which makes it possible to improve the efficiency of normal operation tests of the inspection function unit and prevent setting errors. [Brief explanation of the drawings]
[0014] [Figure 1] FIG. 1 is a configuration diagram of a test system according to an embodiment of the present invention. [Figure 2] FIG. 10 is a chart showing the procedure for creating the inspection abnormality simulation table. [Figure 3] Netlist file corresponding to the inspection sequence in Figure 1. [Figure 4] FIG. 3 is a chart showing the procedure for creating the inspection information file shown in S03 in FIG. 2. [Figure 5] POL format netlist file. [Figure 6] Inspection information file created from the netlist file in Figure 5. [Figure 7] Bitmap auto-generated file. [Figure 8] Example of records in the inspection abnormality simulation table created from the files in Figures 6 and 7. [Figure 9] Maintenance tool display content. DETAILED DESCRIPTION OF THE INVENTION
[0015] A test system according to an embodiment of the present invention will be described below. This test system performs testing (including inspection / maintenance) of an inspection function unit provided in a protection relay.
[0016] That is, the protective relay has an inspection function unit that checks whether the device itself is normal as described above, outputs an inspection command signal from the circuit that executes the inspection function unit to the trip circuit, and determines whether there is an abnormality from the answer signal. [Example]
[0017] An embodiment of the test system will be described with reference to Figure 1. In Figure 1, reference numeral 1 indicates the test system, and reference numeral 2 indicates the inspection sequence of the protective relay. This inspection sequence 2 includes a trip lock confirmation system 5. This trip lock confirmation system 5 constitutes the inspection function unit (trip circuit confirmation system) that is the test target of this embodiment. Here, testing of the trip lock confirmation system 5 will be described as an example of an inspection function unit, but the present invention can also be applied to confirmation tests of other trip signal output circuits, etc.
[0018] 1 indicates a group of n (n=1...k) trip circuits, and 4 indicates a maintenance tool added to the test system 1 of this embodiment. Here, the protective relay operates as follows.
[0019] (1) During normal operation When the protective relay detects an abnormality (overload, overcurrent, overvoltage, etc.) caused by a short circuit fault or a ground fault, it outputs a trip signal O11T1 to O11Tn from the trip lock confirmation system 5 to the trip circuit 11T, and controls the opening and closing of the contacts of a circuit breaker (not shown).
[0020] (2) During inspection The protective relays are inspected automatically and manually to check whether the trip circuit 11T is operating normally. Automatic inspections are carried out every 1-10 days, while manual inspections are carried out by connecting a monitor to the protective relay and operating the HMI screen displayed on the monitor.
[0021] In the case of automatic inspection, the inspection is initiated when the inspection time arrives and an inspection signal (status signal) is input to the trip lock confirmation system 5, and in the case of manual inspection, the inspection signal is input by user operation on the HMI screen (S01).
[0022] As a result, the trip lock confirmation system 5 outputs trip signals O11T1 to O11Tn as inspection signals to the trip circuit 11T (S02). These trip signals O11T1 to O11Tn are input to the trip circuits 11T1 to 11Tn. If the trip circuit 11T operates normally at this time, answer signals I11T1 to I11Tn are input to the trip lock confirmation system 5 as a reply to the input, and an inspection result (normal signal) is output via S04 (STEP 1 of S05). If this normal signal is output, it is determined to be normal.
[0023] If no answer signals I11T1 to I11Tn are input to the trip lock confirmation system 5 within a certain time (100 ms) after the output of the trip signals O11T1 to O11Tn, the inspection is abnormally terminated (S06).
[0024] (3) Shipping test At the time of shipment, a test is performed to determine whether the trip lock confirmation system 5 can correctly determine an inspection abnormality, i.e., whether the abnormality signal S06 is correctly output. At this time, since the product is yet to be shipped, it is difficult to simulate an abnormality by tampering with the trip circuit 11T and control the answer signals I11T1 to I11Tn.
[0025] In the past, a jig was used to input signals that simulated abnormalities to the input sections (input terminals) of the answer signals I11T1 to I11Tn. However, as mentioned above, the settings of the jig differ for each panel, making it difficult to perform tests at the factory before shipping, and there was also the risk of malfunctions occurring due to incorrect settings of the jig.
[0026] Therefore, in this embodiment, the DI input required to output the inspection abnormality signal S06 is forcibly input from the maintenance tool 4. Specifically, the maintenance tool 4 is executed on the same hardware resources (CPU, RAM, ROM, HDD, SSD, etc.) as the control software for the protection relay, and directly rewrites the address of the DI input in memory.
[0027] As a result of the collaboration between these hardware resources and software resources (OS, applications, etc.), the maintenance tool 4 is provided with an inspection abnormality (NG) simulation table 10, and the maintenance tool 4 is connected to the input part so that it can output data, and is incorporated into the production environment of the protection relay.
[0028] Inspection abnormality signals simulating answer signals I11T1 to I11Tn are stored in the inspection abnormality simulation table 10. This stored information is called inspection abnormality simulation signals I11T1 to I11Tn. The maintenance tool 4 tests the trip lock confirmation system 5 by DI inputting the inspection abnormality simulation signals I11T1 to I11Tn to the trip lock confirmation system 5 in the same way as during inspection.
[0029] <Inspection Abnormality Simulation Table 10> The inspection abnormality simulation table 10 is created on hardware (for example, a computer such as a PC) separate from the protective relay. The created inspection abnormality simulation table 10 is read into a maintenance tool 4 running on the protective relay device, thereby testing the trip lock confirmation system 5. Figure 2 shows the overall creation procedure (S21 to S25) for the inspection abnormality simulation table 5. Here, as an example, a method for creating the inspection abnormality simulation table 5 will be described based on the creation conditions shown in Table 1.
[0030] [Table 1]
[0031] Table 1 shows the conditions for creating an inspection abnormality simulation table for five trip circuits 11T (n=5). In this Table 1, "T_11ON" indicates the ON operation of each trip circuit 11T, "AND condition" indicates the operation of the AND element as "0 or 1", and "target DI" indicates the DI input to the trip lock confirmation system 5.
[0032] S21: First, a drawing of the inspection sequence 2 including the trip lock confirmation system 5 to be tested is created using a CAD (Computer Aided Design) tool 31 shown in FIG.
[0033] S22: Next, create a netlist file corresponding to the drawing of inspection sequence 2 created in S21 (see Figure 3). This netlist file contains the input / output information of the software components in the drawing of inspection sequence 2, and can be automatically generated from CAD31.
[0034] S23: An inspection information file is created using an automatic generation tool from the netlist file created in S21 (S23). The inspection information file contains information on the inspection type (e.g., T_11ON), AND condition (0 or 1), and target DI (e.g., 11X1A) for each element.
[0035] The automatic generation tool executes the following processes 1 to 4. · Process 1: Convert the netlist file in Figure 3 into POL (Problem Oriented Language) format. Process 2: Extract all lines except for comment lines from the POL file and create data for each line. Process 3: Search for logic corresponding to the abnormality from the character string in the data, and extract the input information. Process 4: The extracted input information (abnormal target DI information = inspection abnormality simulation signals I11T1 to I11T5) is output to the inspection information file.
[0036] The details of creating the inspection information file will be explained with reference to Fig. 4 and Fig. 5. S23-1 to S23-3 in Fig. 4 indicate processes 2 to 4, S24-1 and S24-2 in Fig. 4 indicate S24 in Fig. 2, S25-1 and S25-2 in Fig. 4 indicate S25 in Fig. 2, and Fig. 5 shows the netlist file in Fig. 3 after conversion into the POL format.
[0037] Here, in the converted netlist file shown in Figure 5, input signals containing "11" in the original logic of the "STEP1" signal are set as target DIs for "11T operation NG" (S23-1 in Figure 4). In this case, if the logic is "FF (flip-flop)", no search is performed.
[0038] For example, when extracting the input information for "STEP1" (inspection results) in Figure 1, "STEP1" on line 29 in Figure 5 is searched for. Here, the logic "and" on the left side corresponds to "&" 20, which is traced in the input direction from "STEP1" in Figure 1. The input "_041_%4" of this logic corresponds to line 28 in Figure 5, and the same "_041_%3" corresponds to line 26 in the same figure.
[0039] Since the logic on line 28 is "FF", the search ends. On the other hand, line 26 describes the input signals "I11T1~I11T5". This corresponds to the DI for "11T operation NG (abnormal)", and this is output as the DI for the test case. This is the inspection information file (TENKENDI.TXT).
[0040] S24, S25: The inspection information file (TENKENDI.TXT) output in S23 is loaded by pressing the "Automatic setting of inspection information" button (see Figure 7) in "bitmap2.xls" (S24-1 in Figure 4). In other words, the automatic generation system is used to extract the data in Figure 6, and the inspection target signals in column R in the same figure are extracted. At this time, the "DIO" data is arranged using the bitmap file (bit definition file) in Table 2 that was created in advance.
[0041] [Table 2]
[0042] The bitmap file in Table 2 shows the correspondence between DIO signal names and addresses, with "I11T1" to "I11T5" written in bits 24 to 28 of "DI1[0]". Here, by pressing the "Automatically set inspection information" button, a search for DIO data is performed, and the inspection information is automatically added to the remarks column of the bitmap file in Table 2 (S24-2). Note that if the information is not automatically added to the remarks column, it must be written and added manually.
[0043] After that, when the "Automatic creation button for inspection NG (abnormal) simulation table" is pressed (S25-1), the address, bit, positive / negative logic, etc. are saved in a file to be incorporated into the device, and the inspection abnormality simulation table 10 shown in Figure 8 is created (S25).
[0044] This database 10 contains information such as "kind (inspection type)", "AND type", "address (address of specified DI)", "bit (bit number)", "logic (logic for determining normality)", and "address name" for each inspection number.
[0045] ≪DI Input≫ We will now explain DI input using the maintenance tool 4. When the user starts the maintenance tool 4, the menu screen in Figure 9(a) is displayed on a terminal emulator (not shown). From the "Memory Dump Service" menu on this menu screen, select "12. Simulation setting for inspection NG: S" and confirm.
[0046] As a result, the "Inspection NG simulation setting startup" screen in Figure 9(b) and the "Inspection NG simulation setting" screen in Figure 9(c) are displayed on the terminal emulator. Enter "y" in the question "Do you want to simulate an inspection NG?" on this screen, and enter "No" to simulate an inspection NG on the "Inspection NG simulation setting" screen in Figure 9(c).
[0047] That is, when simulating the answer signals I11T1 to I11T5 of the trip circuit 11T, the user inputs "No. 1 to No. 5" one by one from the "inspection NG simulation information" in FIG. 9(b) to complete the setting.
[0048] After completing the settings, when inspection is started and S01 is input, inspection abnormality simulation signals I11T1 to I11T5, which turn the DI input to the input section (input terminal) OFF, are forcibly input from the maintenance tool 4. This tests the trip lock confirmation system 5, and if the inspection result (abnormality signal) of "NG11TOFF" in Figure 1 is output, it is determined that the abnormality has been correctly simulated.
[0049] As a result, by creating an inspection abnormality table 10 based on inspection sequence 2, it is possible to input DIs that simulate abnormalities by bit control without using conventional jigs, which makes it possible to improve the efficiency of checking the operation of the inspection function of the protective relay and prevent setting errors.
[0050] The present invention is not limited to the above-described embodiment, and can be modified and implemented within the scope of the claims. For example, the abnormality NG information input to the DI is not limited to "11T operation NG," but may be "11T recovery NG," "relay operation NG," "relay recovery NG," "disconnection NG," etc. In this case, the inspection abnormality simulation table 10 can be created from the inspection sequence corresponding to the abnormal operation to be simulated. The present invention can also be configured as a program for creating the inspection abnormality simulation table 10. A computer having this program installed thereon automatically executes the processes of S22 to S25. [Explanation of symbols]
[0051] 1...Test system 2...Inspection sequence 4. Maintenance tools 5...Trip lock confirmation system 10...Inspection abnormality simulation table 11T...Trip circuit
Claims
1. 1. A system for testing digital protective relays, comprising: The protective relay includes an inspection function unit that outputs an inspection command signal to a trip circuit that operates a circuit breaker and confirms the operation of the trip circuit from an answer signal in response to the inspection command signal, a maintenance tool that replaces the answer signal with an input signal that simulates an abnormality in the trip circuit and inputs the input signal to the inspection function unit; A test system that tests the operation of the inspection function unit based on an input signal input from the maintenance tool.
2. The maintenance tool includes: an inspection abnormality simulation table in which inspection information simulating the abnormality is described; The input signal corresponding to the inspection information is input to the inspection function unit.
2. The test system according to claim 1.
3. The inspection information described in the inspection abnormality simulation table is 3. The test system according to claim 2, wherein the trip circuit is malfunctioning.
4. The maintenance tool includes: Display a menu screen to the user, The input signal simulating an abnormality according to the type displayed on the menu screen is input to the inspection function unit.
3. The test system according to claim 2.
5. An inspection command signal is output to the trip circuit that operates the circuit breaker, A maintenance tool for a digital protective relay device having an inspection function unit that checks the operation of the trip circuit from an answer signal corresponding to the inspection command, A maintenance tool characterized in that the answer signal is replaced with an input signal simulating an abnormality in the relay and input to the inspection function unit.
6. A method for creating an inspection abnormality simulation table according to claim 2 or 3 by a computer, comprising: creating a netlist file in which input / output information of software components extracted from the inspection sequence indicating the logical structure of the inspection function unit is described; creating an inspection information file by extracting input / output information of the inspection information to be simulated from the netlist file based on a bit definition file; creating the table based on the inspection information file; 10. A method for creating an inspection abnormality simulation table, comprising:
7. 7. An inspection abnormality simulation table creating program for causing a computer to execute the inspection abnormality simulation table creating method according to claim 6.
Citation Information
Patent Citations
Test jig for relay
JP2016180604A