Abnormality detection apparatus, reservoir apparatus, abnormality detection method, and program

Abstract

To accurately detect an abnormality of an observation target apparatus with a simple configuration even when an observation signal includes noise.SOLUTION: An abnormality detection apparatus comprises an input unit, a reservoir unit, an output unit, and a determination unit. The input unit outputs a time-series input signal corresponding to an observation signal. The reservoir unit outputs a plurality of output spike signals on the basis of the input signal. The output unit outputs a plurality of prediction signals on the basis of the plurality of output spike signals. The determination unit outputs a determination signal indicating a determination result as to whether the observation target apparatus is normal or abnormal on the basis of the plurality of prediction signals. The reservoir unit includes a plurality of input firing circuits. Each of the plurality of input firing circuits increases a membrane potential according to the input signal, decreases the membrane potential with time in accordance with a preset time constant, and outputs an intermediate spike signal by firing when the membrane potential exceeds a preset threshold potential. Each of the plurality of input firing circuits is set with a different time constant.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] FIELD Embodiments of the present invention relate to an abnormality detection device, a reservoir device, an abnormality detection method, and a program. [Background technology]

[0002] Artificial intelligence (AI) is used for a variety of automated and labor-saving processes. Neural networks are known as a representative AI algorithm. Deep neural networks (DNNs), which are multi-layered neural networks, are used in deep learning algorithms. Recurrent neural networks (RNNs), which are recursively connected from neurons closer to the output to neurons closer to the input, are used for time-series data processing. Long-Short-Term Memory (LSTM) is also known as a neural network that has improved representation capabilities for short-term and long-term memory. LSTM has even greater applicability for time-series data processing.

[0003] RNNs and LSTMs used in time-series data processing are calculated using a general-purpose computing device called a CPU (Central Processing Unit). However, because RNNs and LSTMs require more computation than NNs, they are often calculated using a GP-GPU (General Purpose Graphical Processing Unit). Furthermore, in order to achieve high performance in deep learning, RNNs and LSTMs require precise parameter tuning during training. As a result, RNNs and LSTMs require even more computation during training. This results in longer training times and higher power consumption during training.

[0004] On the other hand, reservoir computing is known as an algorithm for time-series data processing that requires a small amount of computation during learning. Reservoir computing comprises an input unit, a reservoir unit, and an output unit. Reservoir computing does not require the reservoir unit to be trained. However, in order to output a desired signal, reservoir computing requires that the optimal reservoir unit be determined in advance based on the input, and then the weights between the reservoir unit and the output unit must be highly accurate.

[0005] The reservoir unit is implemented in hardware using various media such as electronic circuits. The signal output from the reservoir unit is generally an analog signal. Reservoir computing allows the output weight calculation in the output unit to be performed at high speed using a multiply-accumulate calculator based on analog circuits.

[0006] This type of reservoir computing can detect abnormalities in infrastructure equipment that operates continuously, etc. For example, reservoir computing can detect when infrastructure equipment momentarily and irregularly deviates from its normal state during a period when it is operating normally.

[0007] However, conventional reservoir computing has difficulty detecting irregular, instantaneous anomalies when the observed signals from infrastructure equipment contain noise. Therefore, when reservoir computing is applied to such anomaly detection systems, it is necessary to use a fast Fourier transform (FFT) to decompose the signal into multiple frequency components and remove noise from each of the multiple frequency components. This requires the use of digital processing circuits to perform the FFT, which makes the circuitry large and expensive, thereby negating the advantage of reservoir computing, which can be implemented using analog circuits. [Prior art documents] [Non-patent literature]

[0008] [Non-Patent Document 1] Melika Payvand, Melika Payvand1, Filippo Moro1, Kumiko Nomura, Thomas Dalgaty, Elisa Vianello, Yoshifumi Nishi, Giacomo Indiveri, “Self-organization of an inhomogeneous memristive hardware for sequence learning”, October 2, 2022, Nature Communications volume 13, Article number:5793 (2022) Summary of the Invention [Problem to be solved by the invention]

[0009] The problem that the present invention aims to solve is to accurately detect abnormalities in the observed device with a simple configuration without decomposing the observed signal into multiple frequency components using a digital processing circuit, even if the observed signal obtained from the observed device contains noise. [Means for solving the problem]

[0010] An anomaly detection device according to an embodiment detects an anomaly in an observed device. The anomaly detection device includes an input unit, a reservoir unit, an output unit, and a determination unit. The input unit acquires an observation signal obtained by observing the observed device and outputs a time-series input signal corresponding to the acquired observation signal. The reservoir unit outputs a plurality of output spike signals, each having a waveform that is reproducible to the waveform of the input signal. The output unit outputs a plurality of prediction signals, each obtained by multiplying each of the plurality of output spike signals by a predetermined output weight and summing the results. The determination unit determines whether the observed device is normal or abnormal based on the plurality of prediction signals and outputs a determination signal representing the determination result. The reservoir unit includes a plurality of input firing circuits. Each of the plurality of input firing circuits increases a membrane potential in response to the input signal and decreases the membrane potential over time in accordance with a predetermined time constant. When the membrane potential exceeds a predetermined threshold potential, the input firing circuit fires to output an intermediate spike signal and resets the membrane potential for a certain period of time in response to the output of the intermediate spike signal. The plurality of input firing circuits are set with different time constants. [Brief explanation of the drawings]

[0011] [Figure 1] FIG. 1 is a diagram showing an anomaly detection system according to a first embodiment together with an observation target device. [Figure 2] FIG. 1 is a configuration diagram of an abnormality detection device according to a first embodiment. [Figure 3] FIG. 2 is a configuration diagram of a reservoir part according to the first embodiment. [Figure 4] Schematic diagram of the input firing circuit. [Figure 5] FIG. 1 shows an example of input current, relative threshold and firing period. [Figure 6] FIG. 10 is a diagram showing the relationship between the frequency of an input signal and the frequency of an intermediate spike signal. [Figure 7] Normal and abnormal waveforms of input current, relative thresholds, and firing periods. [Figure 8]FIG. 10 is a diagram for explaining the contents of an abnormality detection process. [Figure 9] FIG. 10 is a configuration diagram of a modified example of the reservoir portion according to the first embodiment. [Figure 10] FIG. 10 is a configuration diagram of an abnormality detection device according to a second embodiment. [Figure 11] FIG. 10 is a diagram showing the configuration of a partial reservoir section. [Figure 12] FIG. 10 is a configuration diagram of a modified example of a partial reservoir portion according to the second embodiment. [Figure 13] FIG. 1 is a hardware configuration diagram of an information processing device. DETAILED DESCRIPTION OF THE INVENTION

[0012] Hereinafter, an embodiment of the present invention will be described with reference to the accompanying drawings.

[0013] (First embodiment) FIG. 1 is a diagram showing the configuration of an anomaly detection system 10 according to the first embodiment, together with an observation target device 100. As shown in FIG.

[0014] When an abnormality occurs in the observation target device 100, the abnormality detection system 10 notifies, for example, an administrator or another device, that an abnormality has occurred.

[0015] The observed device 100 operates continuously. For example, the observed device 100 is a power line switching device or a power supply device in a power conversion facility or a power supply facility. The observed device 100 is not limited to such devices, and may be any device that operates continuously.

[0016] The anomaly detection system 10 includes an anomaly detection device 20 and a notification device 22 .

[0017] The anomaly detection device 20 detects anomalies in the observed device 100. For example, the anomaly detection device 20 detects anomalies that occur momentarily in the observed device 100. Even during periods when the observed device 100 is operating normally, the observed device 100 may occasionally momentarily operate or behave differently from its normal state. Such operation or behavior may be a sign of, for example, a failure or a significant performance degradation in the observed device 100. The anomaly detection device 20 according to the embodiment can discover a sign of a failure or a significant performance degradation in the observed device 100 by continuously detecting such momentary anomalies in the observed device 100 in real time.

[0018] The anomaly detection device 20 acquires an observation signal whose value changes over time, i.e., a time-series observation signal, obtained by observing the observed device 100. In this embodiment, the time-series observation signal is an analog signal. The time-series observation signal may also be a digital signal generated by analog-to-digital conversion of the analog signal at a predetermined sampling interval.

[0019] If the observed device 100 is a device that outputs AC power, the observation signal may be a signal that represents the amplitude of the AC power output by the observed device 100. The observation signal may also be a signal that detects the ground potential or power supply potential of the observed device 100. The observation signal may include white noise, etc. Based on the acquired observation signal, the abnormality detection device 20 outputs a determination signal that indicates whether an abnormality has occurred in the observed device 100 or whether the observed device 100 is normal.

[0020] The notification device 22 receives a determination signal from the abnormality detection device 20. The notification device 22 notifies an administrator of the determination result indicated in the determination signal, for example, by displaying it on a display device or outputting it as audio from an audio output device. The notification device 22 may also transmit the determination result indicated in the determination signal to another device, such as a server, via a network.

[0021] FIG. 2 is a diagram showing the configuration of the abnormality detection device 20 according to the first embodiment.

[0022] The abnormality detection device 20 includes an input unit 30, a reservoir unit 32, an output unit 34, a determination unit 36, and a learning unit 38.

[0023] The input unit 30 acquires an observation signal. Then, the input unit 30 outputs a time-series input signal corresponding to the observation signal. The input unit 30 may output the observation signal as is as the input signal, or may output the difference between the observation signal and a reference signal as the input signal. For example, the reference signal may be a triangular wave, a rectangular wave, or a sine wave with a predetermined period. The input unit 30 supplies the input signal to a reservoir unit 32.

[0024] The reservoir unit 32 receives an input signal and outputs a plurality of output spike signals, each having a waveform that is reproducible to the waveform of the input signal. Each of the output spike signals is a binary signal that indicates firing or non-firing.

[0025] Furthermore, the reservoir section 32 outputs a plurality of intermediate spike signals, each having a waveform that is reproducible to the waveform of the input signal. Each of the intermediate spike signals is a binary signal that represents firing or non-firing.

[0026] The reservoir unit 32 is a recurrent neural network that includes multiple neurons and multiple synapses and is internally recursively connected. In this embodiment, the reservoir unit 32 is a recurrent neural network realized by analog circuits, and more specifically, a spiking neural network.

[0027] Each of the plurality of output spike signals is a signal that indicates whether any of the plurality of neurons has fired.

[0028] Each of the multiple intermediate spike signals is a signal indicating whether a preceding neuron among the multiple neurons has fired. A preceding neuron is a neuron that fires in response to an input signal, or a neuron that fires in response to one or more synaptic signals output from one or more synapses that receive an input signal. In other words, a preceding neuron is a neuron that fires in response to the influence of only an input signal, without receiving a signal as feedback from other neurons.

[0029] In this embodiment, the reservoir section 32 outputs M output spike signals, numbered 1 to M (M is an integer equal to or greater than 2). Also, in this embodiment, the reservoir section 32 outputs N intermediate spike signals, numbered 1 to N (N is an integer equal to or greater than 2).

[0030] The reservoir unit 32 may be realized by a digital computer. Alternatively, the reservoir unit 32 may be a physical reservoir made of electronic components or materials that are responsive to output a signal corresponding to an input signal.

[0031] Such a reservoir unit 32 has reproducibility, i.e., when it receives an input signal with the same waveform, it operates in the same way and outputs multiple intermediate spike signals and multiple output spike signals with the same waveform. In other words, the reservoir unit 32 operates deterministically. Therefore, each of the multiple intermediate spike signals and multiple output spike signals output from the reservoir unit 32 is nonlinear with respect to the input signal, but is a signal that corresponds to the input signal. The reservoir unit 32 temporarily stores information represented by the input signal. The reservoir unit 32 also randomly sets the internal connection strength and connection relationships. Therefore, the reservoir unit 32 can output multiple random output spike signals that mimic the mechanisms of nature. Such a reservoir unit 32 is capable of recursive and dynamic signal processing, similar to the human brain.

[0032] The output unit 34 receives the multiple output spike signals output from the reservoir unit 32. Based on the received multiple output spike signals, the output unit 34 outputs multiple predicted signals. Each of the multiple predicted signals is obtained by multiplying each of the multiple output spike signals by a preset output weight and then summing the results. In other words, the output unit 34 is a fully connected layer in a neural network that receives the multiple output spike signals and outputs multiple predicted signals.

[0033] The output section 34 outputs a plurality of predicted signals, the number of which is the same as the number of intermediate spike signals. In this embodiment, the output section 34 outputs N predicted signals, ie, first to Nth predicted signals.

[0034] The determination unit 36 ​​receives the plurality of prediction signals output from the output unit 34 and the plurality of intermediate spike signals output from the reservoir unit 32. The determination unit 36 ​​determines whether the observed device 100 is normal or abnormal based on the plurality of prediction signals and the plurality of intermediate spike signals.

[0035] Here, the output unit 34 adjusts its output weights so that, when an observation signal obtained by observing the normally operating observation target device 100 is provided to the input unit 30, each of the multiple predicted signals matches a corresponding intermediate spike signal among multiple intermediate spike signals generated in response to the input of the observation signal at the timing to be predicted. In this case, the intermediate spike signal to be compared is a signal generated at the timing when the observed signal of the sample one sample after the predicted signal or later is input. For example, the output unit 34 adjusts its output weights so that a first predicted signal among the N predicted signals matches a first intermediate spike signal among the N intermediate spike signals. The output unit 34 also adjusts its output weights so that a second predicted signal among the N predicted signals matches a second intermediate spike signal among the N intermediate spike signals. The output unit 34 also adjusts its output weights so that an Nth predicted signal among the N predicted signals matches an Nth intermediate spike signal among the N intermediate spike signals. That is, the output section 34 is adjusted so that the nth predicted signal (n is any integer from 1 to N) among the N predicted signals matches the nth intermediate spike signal among the N intermediate spike signals.

[0036] Therefore, the determination unit 36 ​​determines that a signal is normal when each of the multiple predicted signals matches a corresponding intermediate spike signal among the multiple intermediate spike signals, and determines that a signal is abnormal when they do not match. For example, the determination unit 36 ​​determines that a signal is normal when the first predicted signal matches the first intermediate spike signal, the second predicted signal matches the second intermediate spike signal, and the Nth predicted signal matches the Nth intermediate spike signal, and determines that a signal is abnormal when any of the signals do not match. In other words, the determination unit 36 ​​determines that a signal is normal when all of the multiple predicted signals match the corresponding intermediate spike signals, and determines that a signal is abnormal when any one of the signals does not match.

[0037] Then, the determination unit 36 ​​outputs a determination signal indicating the determination result.

[0038] The learning unit 38 sets parameters for the input unit 30, the reservoir unit 32, the output unit 34 and the determination unit 36 ​​prior to the operation of determining an abnormality.

[0039] For example, the learning unit 38 sets a synaptic weight for each of the multiple synapses included in the reservoir unit 32. The learning unit 38 may also set an internal connection relationship between the multiple synapses and the multiple neurons included in the reservoir unit 32. For example, the learning unit 38 may receive a random number when the anomaly detection device 20 is shipped from a factory or prior to the implementation of the anomaly detection device 20, and set a synaptic weight for each of the multiple synapses in accordance with the received random number, or may set an internal connection relationship in the reservoir unit 32.

[0040] For example, during a learning period executed prior to the anomaly determination operation, the learning unit 38 provides the input unit 30 with observation signals obtained by observing the normally operating observed target device 100. During the learning period, the learning unit 38 adjusts the output weights of the output unit 34 so that each of the multiple predicted signals matches a corresponding intermediate spike signal among the multiple intermediate spike signals generated when the predicted signal is input. For example, the learning unit 38 adjusts the output weights so that the first predicted signal matches the first intermediate spike signal, the second predicted signal matches the second intermediate spike signal, and the Nth predicted signal matches the Nth intermediate spike signal. That is, the learning unit 38 adjusts the output weights so that the nth predicted signal matches the nth intermediate spike signal.

[0041] FIG. 3 is a diagram showing the configuration of the reservoir portion 32 according to the first embodiment.

[0042] The reservoir section 32 includes a plurality of input firing circuits 42, a plurality of synapse circuits 44, a plurality of summing circuits 46, and a plurality of output firing circuits 48. In this embodiment, the reservoir section 32 includes N input firing circuits 42, (M×(N+M)) synapse circuits 44, M summing circuits 46, and M output firing circuits 48.

[0043] Each of the plurality of input firing circuits 42 receives an input signal and outputs an intermediate spike signal in response to the input signal. Each of the plurality of input firing circuits 42 functions as a pre-stage neuron in a recurrent neural network.

[0044] Each of the multiple input firing circuits 42 is a firing circuit based on a leaky integrate-and-fire model. A firing circuit based on the leaky integrate-and-fire model maintains a membrane potential. For example, a firing circuit based on the leaky integrate-and-fire model maintains a charge using a capacitor, and maintains a voltage corresponding to the amount of charge stored in the capacitor as a membrane voltage.

[0045] Furthermore, a firing circuit based on the leaky integrate-and-fire model increases the membrane potential in response to an input signal and decreases the membrane potential over time according to a preset time constant. For example, a firing circuit based on the leaky integrate-and-fire model charges a capacitor by supplying an input current to the capacitor in response to the input signal, and discharges the charge stored in the capacitor through a resistor connected in parallel with the capacitor.

[0046] A firing circuit based on the leaky integrate-and-fire model fires when the membrane potential exceeds a preset threshold potential, outputting an intermediate spike signal. The firing circuit based on the leaky integrate-and-fire model then resets the membrane potential in response to the output of the intermediate spike signal. For example, after firing, the firing circuit based on the leaky integrate-and-fire model discharges the charge stored in the capacitor for a predetermined time to reduce the membrane potential below the threshold potential.

[0047] This allows each of the multiple input firing circuits 42 to function as a circuit that models the firing function of a neuron in a spiking neural network.

[0048] Here, different time constants are set for each of the multiple input firing circuits 42. For example, each of the multiple input firing circuits 42 has a different value of resistor connected in parallel to the capacitor. This causes each of the multiple input firing circuits 42 to decrease the membrane potential at a different rate. Therefore, each of the multiple input firing circuits 42 outputs an intermediate spike signal at a different input signal level, i.e., at a different firing input signal level.

[0049] In this embodiment, the first input firing circuit 42-1 of the N input firing circuits 42 outputs a first intermediate spike signal. The second input firing circuit 42-2 of the N input firing circuits 42 outputs a second intermediate spike signal. The Nth input firing circuit 42-N of the N input firing circuits 42 outputs an Nth intermediate spike signal.

[0050] The plurality of synapse circuits 44 are grouped into a plurality of groups. Each of the plurality of groups includes one or more synapse circuits 44. Each of the plurality of synapse circuits 44 is included in one of the plurality of groups.

[0051] In this embodiment, the plurality of synapse circuits 44 are grouped into M groups. In this embodiment, each of the M groups includes (N+M) synapse circuits 44. For example, the (N+M) synapse circuits 44 arranged in the row direction (horizontal direction) shown in FIG. 3 belong to the same group.

[0052] A synapse weight is set for each of the plurality of synapse circuits 44. The synapse weight may be a binary value, a multi-value such as three or more values, or an analog value.

[0053] Each of the plurality of synapse circuits 44 receives an intermediate spike signal or an output spike signal from any one of the plurality of input firing circuits 42 and the plurality of output firing circuits 48. For example, an intermediate spike signal output from each of the plurality of input firing circuits 42 is supplied to at least one synapse circuit 44 of the plurality of synapse circuits 44. Also, for example, an output spike signal output from each of the plurality of output firing circuits 48 is output to at least one synapse circuit 44 of the plurality of synapse circuits 44.

[0054] In this embodiment, N synapse circuits 44 out of the (N+M) synapse circuits 44 included in each of the multiple groups correspond one-to-one to the N input firing circuits 42. In this case, each of the N synapse circuits 44 acquires an intermediate spike signal from a corresponding one of the N input firing circuits 42.

[0055] Furthermore, M synapse circuits 44 among the (N+M) synapse circuits 44 included in each of the plurality of groups correspond one-to-one to M output firing circuits 48. In this case, each of the M synapse circuits 44 obtains an output spike signal from a corresponding one of the M output firing circuits 48.

[0056] Each of the multiple synapse circuits 44 outputs a synapse signal that is influenced by a set synapse weight on the received signal. In this embodiment, each of the multiple synapse circuits 44 may receive a binary intermediate spike signal or a binary output spike signal and output a synapse signal that is obtained by delaying the received signal by a time period corresponding to the set synapse weight. Each of the multiple synapse circuits 44 may output a synapse signal that is obtained by multiplying the level of the received signal by the synapse weight. Each of the multiple synapse circuits 44 may also receive a pulsed signal and output a synapse signal that is obtained by changing the pulse width of the received signal according to the synapse weight.

[0057] Each of the plurality of adder circuits 46 receives synapse signals output from synapse circuits 44 included in a corresponding group of the plurality of synapse circuits 44. In this embodiment, each of the plurality of adder circuits 46 receives synapse signals output from the (N+M) synapse circuits 44 included in the corresponding group. Then, each of the plurality of adder circuits 46 outputs a sum signal obtained by adding the received synapse signals.

[0058] In this embodiment, the first adder circuit 46-1 of the M adder circuits 46 outputs a first summed signal. The second adder circuit 46-2 of the M adder circuits 46 outputs a second summed signal. The Mth adder circuit 46-M of the M adder circuits 46 outputs an Mth summed signal.

[0059] The plurality of output firing circuits 48 correspond one-to-one to the plurality of summing circuits 46. Each of the plurality of output firing circuits 48 receives the summed signal output from a corresponding one of the plurality of summing circuits 46.

[0060] Each of the plurality of output firing circuits 48 fires when the integrated value of the received sum signal exceeds a threshold, thereby outputting an output spike signal. Each of the plurality of output firing circuits 48 functions as a neuron other than the preceding neuron in the recurrent neural network.

[0061] Each of the multiple output firing circuits 48 is a firing circuit based on a leaky integrate-and-fire model. Each of the multiple output firing circuits 48 may have the same circuit configuration as the input firing circuit 42. That is, each of the multiple output firing circuits 48 increases the membrane potential in response to the sum signal and decreases the membrane potential over time in accordance with a preset time constant. Each of the multiple output firing circuits 48 fires and outputs an output spike signal when the membrane potential exceeds a preset threshold potential, and resets the membrane potential for a certain period of time in response to the output of the output spike signal.

[0062] However, each of the multiple output firing circuits 48 is set to the same time constant. Therefore, each of the multiple output firing circuits 48 has the same value of resistor connected in parallel to the capacitor. This causes each of the multiple output firing circuits 48 to decrease the membrane potential at the same speed. Therefore, each of the multiple output firing circuits 48 has the same level of the summed signal that outputs the output spike signal, i.e., the level of the summed signal that fires.

[0063] In this embodiment, the first output firing circuit 48-1 of the M output firing circuits 48 outputs a first output spike signal when a signal is input at a specified timing. The second output firing circuit 48-2 of the M output firing circuits 48 outputs a second output spike signal when a signal is input at a specified timing. The Mth output firing circuit 48-M of the M output firing circuits 48 outputs an Mth output spike signal when a signal is input at a specified timing.

[0064] FIG. 4 is a diagram showing the configuration of the input firing circuit 42.

[0065] Each of the plurality of input firing circuits 42 includes a membrane potential holding circuit 52 , a comparator 54 , and a reset circuit 56 .

[0066] The membrane potential maintaining circuit 52 has one terminal connected to a reference potential and the other terminal connected to a first terminal 60. The membrane potential maintaining circuit 52 includes a membrane capacitor 62 and a membrane resistor 64. Each of the membrane capacitor 62 and the membrane resistor 64 has one terminal connected to the reference potential and the other terminal connected to the first terminal 60. In other words, the membrane capacitor 62 and the membrane resistor 64 are connected in parallel between the first terminal 60 and the reference potential.

[0067] The membrane potential holding circuit 52 receives an input current corresponding to an input signal from a first terminal 60. The membrane potential holding circuit 52 generates a membrane potential corresponding to the charge accumulated in the membrane capacitor 62 from the first terminal 60.

[0068] Furthermore, the membrane potential holding circuit 52 increases the membrane potential by storing charge in the membrane capacitor 62 in accordance with the input current. Furthermore, the membrane potential holding circuit 52 discharges the charge stored in the membrane capacitor 62 through the membrane resistor 64, thereby decreasing the membrane potential over time.

[0069] The comparator 54 compares the membrane potential with a preset threshold potential. The comparator 54 outputs an intermediate spike signal when the membrane potential exceeds the threshold potential. This allows the comparator 54 to fire and output an intermediate spike signal when the membrane potential exceeds the threshold potential.

[0070] In response to the output of an intermediate spike signal, the reset circuit 56 resets the charge accumulated in the membrane capacitor 62. For example, the reset circuit 56 discharges a predetermined amount of charge accumulated in the membrane capacitor 62 after a certain time has elapsed since the output of the intermediate spike signal, and maintains this state for a certain time. In this way, after the output of the intermediate spike signal, the reset circuit 56 reduces the membrane potential below the threshold potential, allowing the membrane capacitor 62 to once again accumulate a charge corresponding to the input current.

[0071] Each of these input firing circuits 42 can function as a firing circuit according to the leaky integrate-and-fire model. Note that each of the input firing circuits 42 is not limited to the configuration shown in Fig. 4 and may have other configurations. For example, each of the input firing circuits 42 may have a configuration in which the positive and negative polarities are reversed from the configuration shown in Fig. 4.

[0072] Here, the multiple input firing circuits 42 each have a different value obtained by multiplying the capacitance of the membrane capacitor 62 by the resistance value of the membrane resistor 64. For example, the multiple input firing circuits 42 each have the same capacitance of the membrane capacitor 62 and different resistance values ​​of the membrane resistor 64. This allows the multiple input firing circuits 42 to function as firing circuits with different time constants in the leaky integrate-and-fire model.

[0073] FIG. 5 is a diagram showing an example of the waveform of the input current, and the relative thresholds and firing periods of the input firing circuits 42 with different time constants.

[0074] When the time constants of firing circuits based on the leaky integrate-and-fire model are different, the level of the input current at which an intermediate spike signal is output, i.e., the relative threshold, changes even if the threshold potential set in the comparator 54 is the same. For example, in a firing circuit based on the leaky integrate-and-fire model, the smaller the time constant, the higher the level of the input current at which the circuit fires. Therefore, because the time constants of the multiple input firing circuits 42 are different from one another, the firing periods at which intermediate spike signals are output differ from one another even when input currents with the same waveform are applied.

[0075] FIG. 6 is a diagram showing the simulation results of the relationship between the frequency of the input signal and the frequency of the intermediate spike signal in each of a plurality of input firing circuits 42 with different time constants.

[0076] As shown in Figure 6, the input firing circuit 42 outputs a higher intermediate spike signal, i.e., the firing rate, as the frequency of the input signal increases. However, the firing rate of the input firing circuit 42 increases as the time constant decreases, and decreases as the time constant increases. For example, in the input firing circuit 42 shown in Figure 4, if the capacitance of the membrane capacitor 62 is the same, the firing rate increases as the resistance value of the membrane resistor 64 decreases, and decreases as the resistance value of the membrane resistor 64 increases.

[0077] Therefore, the plurality of input firing circuits 42 output a plurality of intermediate spike signals with different frequency components, similar to when an input signal is frequency-divided by, for example, FFT.

[0078] FIG. 7 is a diagram showing an example of a normal waveform of the input current, an abnormal waveform of the input current, and the relative thresholds and firing periods of a plurality of input firing circuits 42 with different time constants.

[0079] For example, if an instantaneous abnormality occurs in the observed device 100, the input current may contain abnormal components only at specific frequency components. In such a case, the waveforms of some of the multiple intermediate spike signals will differ from those of normal signals, just as when the input signal is frequency-divided using FFT, but the waveforms of all the other signals will be the same as those of normal signals.

[0080] For example, suppose that an abnormal waveform containing an abnormal component that momentarily exceeds the relative threshold of the first time constant during a portion of a normal waveform, as shown in Fig. 7, is input to the multiple input firing circuits 42. In this case, the waveform of the intermediate spike signal output from the input firing circuit 42 to which the first time constant is set will be different in normal and abnormal situations. However, the waveforms of the intermediate spike signals output from the three input firing circuits 42 to which the second to fourth time constants are set will be the same in normal and abnormal situations.

[0081] FIG. 8 is a diagram for explaining the details of the abnormality detection process in the abnormality detection device 20. In FIG.

[0082] The abnormality detection device 20 generates a plurality of predicted signals that correspond one-to-one to the plurality of intermediate spike signals. The abnormality detection device 20 then performs learning so that each of the plurality of predicted signals is identical to the normal waveform of the corresponding intermediate spike signal among the plurality of intermediate spike signals.

[0083] Therefore, the abnormality detection device 20 can determine whether or not an abnormal component is included for each frequency component by comparing each of the multiple predicted signals with the corresponding intermediate spike signal among the multiple intermediate spike signals at the predicted timing. If a predicted signal with a waveform different from that of the corresponding intermediate spike signal at the predicted timing occurs among the multiple predicted signals, the abnormality detection device 20 outputs a determination signal indicating an abnormality.

[0084] In this way, the anomaly detection device 20 according to this embodiment determines whether or not the input signal contains an abnormal component for each frequency component, in the same way as when the input signal is frequency-divided by FFT. As a result, according to the anomaly detection device 20 according to this embodiment, even if the observed signal acquired from the observed device 100 contains noise, it is possible to accurately detect an abnormality in the observed device 100 with a simple configuration without decomposing the observed signal into multiple frequency components using a digital processing circuit or the like.

[0085] (Modification of the first embodiment) FIG. 9 is a diagram showing the configuration of a modified example of the reservoir portion 32 according to the first embodiment.

[0086] In the first embodiment, the reservoir portion 32 may have a configuration as shown in FIG.

[0087] The reservoir unit 32 according to the modified example further includes a plurality of input synapse circuits 72 and a plurality of input adder circuits 74. In the example shown in FIG. 9, the reservoir unit 32 further includes N×N input synapse circuits 72 and N input adder circuits 74.

[0088] The multiple input synapse circuits 72 are grouped into multiple input groups. Each of the multiple input groups includes one or more input synapse circuits 72. Each of the multiple input synapse circuits 72 is included in one of the multiple input groups.

[0089] In this example, the multiple input synapse circuits 72 are grouped into N input groups. Each of the N input groups includes N input synapse circuits 72. For example, the N input synapse circuits 72 arranged in the row direction (horizontal direction) shown in FIG. 9 belong to the same input group.

[0090] An input synapse weight is set for each of the plurality of input synapse circuits 72. The input synapse weight may be binary, multi-valued (three or more values), or an analog value.

[0091] Each of the multiple input synapse circuits 72 receives an input signal. Each of the multiple input synapse circuits 72 outputs an input synapse signal that is influenced by a set input synapse weight for the input signal. For example, each of the multiple input synapse circuits 72 outputs an input synapse signal that is the input signal delayed by a time corresponding to the set input synapse weight.

[0092] Each of the plurality of input adder circuits 74 receives input synapse signals output from one or more input synapse circuits 72 included in the corresponding input group among the plurality of input synapse circuits 72. Then, each of the plurality of input adder circuits 74 outputs an input sum signal obtained by adding the received one or more input synapse signals.

[0093] In this example, a first input adder circuit 74-1 of the N input adder circuits 74 outputs a first input summed signal. A second input adder circuit 74-2 of the N input adder circuits 74 outputs a second input summed signal. An Nth input adder circuit 74-N of the N input adder circuits 74 outputs an Nth input summed signal.

[0094] The multiple input firing circuits 42 according to the modified example correspond one-to-one to the multiple input adding circuits 74. Each of the multiple input firing circuits 42 receives an input addition signal output from a corresponding one of the multiple input adding circuits 74, instead of an input signal.

[0095] The reservoir section 32 according to such a modified example has the reproducibility of performing the same operation and outputting multiple intermediate spike signals and multiple output spike signals of the same waveform when it receives an input signal of the same waveform.

[0096] Furthermore, the reservoir unit 32 according to the modified example can have a plurality of input firing circuits 42 arranged in parallel with a plurality of output firing circuits 48. This allows the reservoir unit 32 according to the modified example to realize a plurality of input firing circuits 42 by, for example, changing the time constant of a portion of a reservoir device implemented using an existing semiconductor circuit or the like, and can be easily designed.

[0097] (Second embodiment) Next, a second embodiment will be described. The anomaly detection system 10 according to the second embodiment has substantially the same functions and configuration as the anomaly detection system 10 according to the first embodiment, and therefore elements having substantially the same functions and configurations are designated by the same reference numerals and detailed descriptions thereof will be omitted except for differences.

[0098] FIG. 10 is a diagram showing the configuration of an abnormality detection device 20 according to the second embodiment.

[0099] The reservoir portion 32 according to the second embodiment includes a plurality of partial reservoir portions 82.

[0100] Each of the plurality of partial reservoir sections 82 receives an input signal from the input section 30. Each of the plurality of partial reservoir sections 82 outputs one intermediate spike signal and a plurality of output spike signals. In this embodiment, the reservoir section 32 includes first to Nth partial reservoir sections 82-1 to 82-N. Each of the N partial reservoir sections 82-1 to 82-N outputs M output spike signals. The first partial reservoir section 82-1 outputs a first intermediate spike signal. The second partial reservoir section 82-2 outputs a second intermediate spike signal. The Nth partial reservoir section 82-N outputs an Nth intermediate spike signal.

[0101] Each of the plurality of partial reservoir units 82 is a recurrent neural network including a plurality of neurons and a plurality of synapses, which are internally recursively connected. In this embodiment, the reservoir unit 32 is a recurrent neural network realized by an analog circuit, and more specifically, a spiking neural network.

[0102] Each of the plurality of partial reservoir portions 82 may be realized by a digital computer. Also, each of the plurality of partial reservoir portions 82 may be a physical reservoir made of electronic components or materials that are responsive to output a signal corresponding to an input signal.

[0103] Each of the multiple partial reservoirs 82 has reproducibility in that, when it receives an input signal with the same waveform, it operates in the same way and outputs intermediate spike signals and multiple output spike signals with the same waveforms. That is, each of the multiple partial reservoirs 82 operates deterministically. Therefore, the intermediate spike signals and multiple output spike signals output from each of the multiple partial reservoirs 82 are nonlinear with respect to the input signal, but are signals that correspond to the input signal. Each of the multiple partial reservoirs 82 temporarily stores information represented by the input signal. Furthermore, the internal connection strength and connection relationships of each of the multiple partial reservoirs 82 are randomly set. Therefore, each of the multiple partial reservoirs 82 can output multiple output spike signals with randomness that mimics the mechanisms of nature. Each of the multiple partial reservoirs 82 is capable of recursive and dynamic signal processing, like the human brain.

[0104] The output section 34 according to the second embodiment includes a plurality of partial output sections 84.

[0105] The plurality of partial output sections 84 correspond one-to-one to the plurality of partial reservoir sections 82. Each of the plurality of partial output sections 84 acquires a plurality of output spike signals from a corresponding partial reservoir section 82 among the plurality of partial reservoir sections 82. Each of the plurality of partial output sections 84 outputs one prediction signal based on the acquired plurality of output spike signals.

[0106] In this embodiment, the output unit 34 includes first to Nth partial output units 84-1 to 84-N. The first partial output unit 84-1 outputs a first predicted signal. The second partial output unit 84-2 outputs a second predicted signal. The Nth partial output unit 84-N outputs the Nth predicted signal.

[0107] Each of the plurality of predicted signals is obtained by multiplying each of the plurality of output spike signals by a preset output weight and then summing the results. That is, each of the plurality of partial output units 84 is a fully connected layer in a neural network that receives a plurality of output spike signals and outputs one predicted signal.

[0108] Here, the output weights of each of the multiple partial output sections 84 are adjusted so that the output predicted signal matches the corresponding intermediate spike signal among the multiple intermediate spike signals at the prediction time when an observation signal obtained by observing a normally operating observation target device 100 is given to the input section 30. In other words, the multiple partial output sections 84 are adjusted so that the nth predicted signal among the N predicted signals matches the nth intermediate spike signal among the N intermediate spike signals at the prediction time.

[0109] The determination unit 36 ​​acquires a plurality of intermediate spike signals from a plurality of partial reservoir units 82. The determination unit 36 ​​also acquires a plurality of predicted signals from a plurality of partial output units 84. The determination unit 36 ​​then determines that the signal is normal if all of the predicted signals match the corresponding intermediate spike signals, and determines that the signal is abnormal if any one of the predicted signals does not match.

[0110] FIG. 11 is a diagram showing the configuration of the partial reservoir portion 82. As shown in FIG.

[0111] The partial reservoir section 82 includes one input firing circuit 42, a plurality of synapse circuits 44, a plurality of summing circuits 46, and a plurality of output firing circuits 48. In this embodiment, the partial reservoir section 82 includes an input firing circuit 42, (M×(1+M)) synapse circuits 44, M summing circuits 46, and M output firing circuits 48.

[0112] The input firing circuit 42 receives an input signal and outputs an intermediate spike signal in response to the input signal.

[0113] The input firing circuit 42 has the same configuration as one of the multiple input firing circuits 42 included in the reservoir section 32 according to the first embodiment. That is, the input firing circuit 42 included in each of the multiple partial reservoir sections 82 has a time constant set different from that of the input firing circuits 42 included in the other partial reservoir sections 82.

[0114] In this embodiment, the plurality of synapse circuits 44 are grouped into M groups. In this embodiment, each of the M groups includes (1+M) synapse circuits 44. For example, the (1+M) synapse circuits 44 arranged in the row direction (horizontal direction) shown in FIG. 11 belong to the same group.

[0115] Each of the plurality of synapse circuits 44 receives an intermediate spike signal or an output spike signal from either the input firing circuit 42 or one of the plurality of output firing circuits 48. For example, the intermediate spike signal output from the input firing circuit 42 is supplied to at least one synapse circuit 44 of the plurality of synapse circuits 44. Also, for example, the output spike signal output from each of the plurality of output firing circuits 48 is output to at least one synapse circuit 44 of the plurality of synapse circuits 44.

[0116] In this embodiment, one synapse circuit 44 of the (1+M) synapse circuits 44 included in each of the plurality of groups acquires an intermediate spike signal from the input firing circuit 42. M synapse circuits 44 of the (1+M) synapse circuits 44 included in each of the plurality of groups correspond one-to-one to M output firing circuits 48. In this case, each of the M synapse circuits 44 acquires an output spike signal from a corresponding one of the M output firing circuits 48.

[0117] In this embodiment, each of the plurality of adder circuits 46 receives (1+M) synapse signals output from the (1+M) synapse circuits 44 included in the corresponding group. Then, each of the plurality of adder circuits 46 outputs a sum signal obtained by adding the received (1+M) synapse signals.

[0118] The anomaly detection device 20 according to the second embodiment determines whether or not an abnormal component is included in the input signal for each frequency component, in the same way as in the first embodiment when the input signal is frequency-divided by FFT. As a result, the anomaly detection device 20 according to the second embodiment can accurately detect an abnormality in the observed device 100 with a simple configuration, even if the observed signal acquired from the observed device 100 contains noise, without decomposing the observed signal into multiple frequency components using a digital processing circuit or the like.

[0119] (Modification of the second embodiment) FIG. 12 is a diagram showing the configuration of a modified example of the partial reservoir portion 82 according to the second embodiment.

[0120] In the second embodiment, the partial reservoir portion 82 may have a configuration as shown in FIG.

[0121] The partial reservoir unit 82 according to the modified example further includes one or more input synapse circuits 72 and an input adder circuit 74. In the example of FIG. 12, the partial reservoir unit 82 further includes N input synapse circuits 72 and an input adder circuit 74.

[0122] The input addition circuit 74 according to the modified example receives one or more input synapse signals output from one or more input synapse circuits 72. Then, the input addition circuit 74 outputs an input sum signal obtained by adding the received one or more input synapse signals.

[0123] The input firing circuit 42 according to the modified example receives an input sum signal instead of an input signal, and outputs an intermediate spike signal in response to the input sum signal.

[0124] The partial reservoir section 82 according to such a modified example has the reproducibility of performing the same operation and outputting multiple intermediate spike signals and multiple output spike signals of the same waveform when it receives an input signal of the same waveform.

[0125] Furthermore, the partial reservoir unit 82 according to the modified example can arrange the input firing circuits 42 in parallel with the multiple output firing circuits 48. As a result, the partial reservoir unit 82 according to the modified example can realize the input firing circuits 42 by, for example, changing the time constant of part of a reservoir device implemented using an existing semiconductor circuit or the like, and can be easily designed.

[0126] (Hardware configuration of information processing device) FIG. 13 is a diagram illustrating an example of a hardware configuration of an information processing device.

[0127] Instead of an analog circuit, the abnormality detection device 20 may be realized by a computer (information processing device) having a hardware configuration such as that shown in Fig. 13. In this case, the abnormality detection device 20 includes a CPU (Central Processing Unit) 301, a RAM (Random Access Memory) 302, a ROM (Read Only Memory) 303, an operation input device 304, a display device 305, a storage device 306, and a communication device 307. These components are connected by a bus.

[0128] The CPU 301 is a processor that executes arithmetic processing, control processing, etc. in accordance with a program. The CPU 301 uses a predetermined area of ​​the RAM 302 as a work area and executes various processes in cooperation with programs stored in the ROM 303, the storage device 306, etc.

[0129] The RAM 302 is a memory such as an SDRAM (Synchronous Dynamic Random Access Memory), and functions as a work area for the CPU 301. The ROM 303 is a memory that stores programs and various types of information in a non-rewritable manner.

[0130] The operation input device 304 is an input device such as a mouse, a keyboard, etc. The operation input device 304 receives information input by a user as an instruction signal, and outputs the instruction signal to the CPU 301.

[0131] The display device 305 is a display device such as an LCD (Liquid Crystal Display), etc. The display device 305 displays various information based on a display signal from the CPU 301.

[0132] The storage device 306 is a device that writes and reads data to a semiconductor storage medium such as a flash memory, or a magnetically or optically recordable storage medium, etc. The storage device 306 writes and reads data to the storage medium in response to control from the CPU 301. The communication device 307 communicates with external devices via a network in response to control from the CPU 301.

[0133] The program executed by the computer has a modular configuration including an input module, a reservoir module, an output module, a judgment module, and a learning module.

[0134] This program is deployed on RAM 302 and executed by CPU 301 (processor), causing the computer to function as input unit 30, reservoir unit 32, output unit 34, determination unit 36, and learning unit 38. Note that some or all of input unit 30, reservoir unit 32, output unit 34, determination unit 36, and learning unit 38 may be realized by hardware circuits.

[0135] In addition, the program to be executed by a computer is provided as a file in a format that can be installed on a computer or in a format that can be executed by a computer, and is recorded on a computer-readable recording medium such as a CD-ROM, a flexible disk, a CD-R, or a DVD (Digital Versatile Disk).

[0136] This program may also be configured to be stored on a computer connected to a network such as the Internet and provided by being downloaded via the network. This program may also be configured to be provided or distributed via a network such as the Internet. The program executed by the abnormality detection device 20 may also be configured to be provided by being pre-installed in the ROM 303 or the like.

[0137] Although the embodiments of the present invention have been described above, the above-described embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These novel embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the inventions and their equivalents as defined in the claims.

[0138] (Addendum) The above-described embodiments can be summarized as the following technical proposals.

[0139] [Technical proposal 1] An anomaly detection device that detects an anomaly in an observed device, an input unit that acquires an observation signal obtained by observing the target device and outputs a time-series input signal corresponding to the acquired observation signal; a reservoir section for outputting a plurality of output spike signals, each having a waveform that is reproducible to the waveform of the input signal; an output unit that outputs a plurality of predicted signals, each of which is obtained by multiplying each of the plurality of output spike signals by a preset output weight and summing the results; a determination unit that determines whether the observation target device is normal or abnormal based on the plurality of prediction signals and outputs a determination signal representing the determination result; Equipped with the reservoir section includes a plurality of input firing circuits; Each of the plurality of input firing circuits increasing a membrane potential in response to the input signal, and decreasing the membrane potential over time in accordance with a preset time constant; When the membrane potential exceeds a preset threshold potential, the neuron fires to output an intermediate spike signal, and resets the membrane potential for a certain period of time in response to the output of the intermediate spike signal; The plurality of input firing circuits are each set with a different time constant. Anomaly detection device.

[0140] [Technical proposal 2] The determination unit determines that the observed device is abnormal when a first prediction signal among the plurality of prediction signals does not match a first intermediate spike signal, which is the intermediate spike signal output from a first input firing circuit among the plurality of input firing circuits at a predicted timing. An abnormality detection device as described in Technical Proposal 1.

[0141] [Technical proposal 3] The system further includes a learning unit that, during a learning period, supplies the input unit with the observed signal obtained by observing the target device operating normally, and changes the output weight set in the output unit so that the first predicted signal coincides with the first intermediate spike signal in the input at the time of prediction. An abnormality detection device as described in Technical Proposal 2.

[0142] [Technical proposal 4] The output unit adjusts the output weights so that, when the observation signal obtained by observing the observation target device operating normally is given to the input unit, the first predicted signal coincides with the first intermediate spike signal in the input at the time of prediction. An abnormality detection device according to Technical Solution 2 or 3.

[0143] [Technical proposal 5] The reservoir section is a recurrent neural network. An abnormality detection device according to any one of technical proposals 1 to 4.

[0144] [Technical proposal 6] The reservoir is a spiking neural network. An abnormality detection device according to any one of technical proposals 1 to 5.

[0145] [Technical proposal 7] Each of the plurality of input firing circuits is a firing circuit according to a leaky integrate-and-fire model, and the time constants are different from each other. An abnormality detection device as described in Technical Proposal 6.

[0146] [Technical proposal 8] Each of the plurality of input firing circuits a membrane potential holding circuit in which a membrane capacitor and a membrane resistor are connected in parallel, an input current corresponding to the input signal flows, and the membrane potential is generated according to the charge accumulated in the membrane capacitor; a comparator that outputs an intermediate spike signal when the membrane potential becomes greater than or less than the threshold potential; a reset circuit that resets the charge stored in the membrane capacitor in response to the output of the intermediate spike signal; Including, Each of the plurality of input firing circuits has a different value obtained by multiplying the capacitance of the membrane capacitor by the resistance value of the membrane resistor. An abnormality detection device as described in Technical Proposal 7.

[0147] [Technical proposal 9] The reservoir portion is a plurality of synaptic circuits grouped into a plurality of groups; a plurality of adding circuits provided in a one-to-one correspondence with the plurality of groups; a plurality of output firing circuits provided in a one-to-one correspondence with the plurality of adding circuits, each outputting an output spike signal; further comprising each of the plurality of synapse circuits acquires the intermediate spike signal or the output spike signal from any one of the plurality of input firing circuits and the plurality of output firing circuits, and outputs a synapse signal multiplied by a predetermined synapse weight; each of the plurality of adder circuits acquires and adds the synapse signals from one or more synapse circuits included in a corresponding one of the plurality of groups, and outputs an added signal; Each of the plurality of output firing circuits receives an added signal from a corresponding one of the plurality of adding circuits, and fires when an integrated value of the added signal exceeds a threshold to output the output spike signal. An abnormality detection device according to any one of technical proposals 1 to 8.

[0148] [Technical proposal 10] Each of the plurality of output firing circuits comprises: increasing a membrane potential in response to the addition signal, and decreasing the membrane potential over time in response to a preset time constant; When the membrane potential exceeds a preset threshold potential, the neuron fires to output the output spike signal, and resets the membrane potential for a certain period of time in response to the output spike signal; The plurality of output firing circuits are each set to the same time constant. An abnormality detection device described in Technical Proposal 9.

[0149] [Technical proposal 11] The reservoir portion is a plurality of input synapse circuits grouped into a plurality of input groups; a plurality of input adder circuits provided in a one-to-one correspondence with the plurality of input groups; further comprising each of the plurality of input synapse circuits acquires the input signal, and outputs an input synapse signal multiplied by a preset input synapse weight; each of the plurality of input summation circuits acquires and adds the input synapse signals from one or more input synapse circuits included in a corresponding one of the plurality of input groups, and outputs an input summation signal; Each of the plurality of input firing circuits receives the input sum signal from a corresponding one of the plurality of input summing circuits in place of the input signal. An abnormality detection device according to Technical Proposal 9 or 10.

[0150] [Technical proposal 12] the reservoir section includes a plurality of partial reservoir sections each outputting the plurality of output spike signals; the output section includes a plurality of partial output sections corresponding one-to-one to the plurality of partial reservoir sections, each of the plurality of partial output units acquires the plurality of output spike signals output from a corresponding one of the plurality of partial reservoir units, multiplies each of the acquired plurality of output spike signals by a preset output weight, and outputs a predicted signal obtained by summing the multiplied signals; Each of the plurality of partial reservoir portions includes any one of the plurality of input firing circuits. An abnormality detection device according to any one of technical proposals 1 to 8.

[0151] [Technical proposal 13] Each of the plurality of partial reservoir portions includes: one or more input synapse circuits; an input summing circuit; further comprising each of the one or more input synapse circuits acquires the input signal, and outputs an input synapse signal multiplied by a preset input synapse weight; The input summing circuit acquires the input synapse signals from each of the one or more input synapse circuits, adds them together, and outputs an input sum signal. An abnormality detection device as described in Technical Proposal 12.

[0152] [Technical proposal 14] a reservoir section for outputting a plurality of output spike signals, each having a waveform that is reproducible with respect to the waveform of a time-series input signal; an output unit that outputs a plurality of predicted signals, each of which is obtained by multiplying each of the plurality of output spike signals by a preset output weight and summing the results; Equipped with the reservoir section includes a plurality of input firing circuits; Each of the plurality of input firing circuits increasing a membrane potential in response to the input signal, and decreasing the membrane potential over time in accordance with a preset time constant; When the membrane potential exceeds a preset threshold potential, the neuron fires to output an intermediate spike signal, and resets the membrane potential for a certain period of time in response to the output of the intermediate spike signal; The plurality of input firing circuits are each set with a different time constant. Reservoir device.

[0153] [Technical proposal 15] An anomaly detection method for detecting an anomaly in an observation target device using an anomaly detection device, comprising: an input unit of the anomaly detection device acquires an observation signal obtained by observing the observation target device, and outputs a time-series input signal corresponding to the acquired observation signal; a reservoir unit of the abnormality detection device outputs a plurality of output spike signals, each having a waveform that is reproducible with respect to the waveform of the input signal; an input unit of the anomaly detection device outputs a plurality of prediction signals, each of which is obtained by multiplying each of the plurality of output spike signals by a preset output weight and then summing the results; a determination unit of the abnormality detection device determines whether the observation target device is normal or abnormal based on the plurality of prediction signals, and outputs a determination signal representing the determination result; the reservoir section includes a plurality of input firing circuits; Each of the plurality of input firing circuits increasing a membrane potential in response to the input signal, and decreasing the membrane potential over time in accordance with a preset time constant; When the membrane potential exceeds a preset threshold potential, the neuron fires to output an intermediate spike signal, and resets the membrane potential for a certain period of time in response to the output of the intermediate spike signal; The plurality of input firing circuits are each set with a different time constant. Anomaly detection device.

[0154] [Technical proposal 16] A program for causing an information processing device to function as an anomaly detection device that detects an anomaly in an observation target device, The information processing device an input unit that acquires an observation signal obtained by observing the target device and outputs a time-series input signal corresponding to the acquired observation signal; a reservoir section for outputting a plurality of output spike signals, each having a waveform that is reproducible to the waveform of the input signal; an output unit that outputs a plurality of predicted signals, each of which is obtained by multiplying each of the plurality of output spike signals by a preset output weight and summing the results; a determination unit that determines whether the observation target device is normal or abnormal based on the plurality of prediction signals and outputs a determination signal representing the determination result; and make it work, The reservoir portion includes a plurality of input firing portions, Each of the plurality of input firing units is increasing a membrane potential in response to the input signal, and decreasing the membrane potential over time in accordance with a preset time constant; When the membrane potential exceeds a preset threshold potential, the neuron fires to output an intermediate spike signal, and resets the membrane potential for a certain period of time in response to the output of the intermediate spike signal; The plurality of input firing units are each set with a different time constant. program. [Explanation of symbols]

[0155] 10 Anomaly Detection System 100 Observation target device 20 Anomaly detection device 22 Notification device 30 Input section 32 Reservoir section 34 Output section 36 Judgment section 38 Learning Department 42 Input firing circuit 44 Synaptic Circuits 46 Addition Circuit 48 Output firing circuit 52 Membrane potential holding circuit 54 Comparator 56 Reset Circuit 60 1st terminal 62 Membrane Capacitor 64 Membrane Resistance 72 Input synapse circuit 74 Input Adder Circuit 82 Partial reservoir 84 Partial output section

Claims

1. An anomaly detection device that detects an anomaly in an observed device, an input unit that acquires an observation signal obtained by observing the target device and outputs a time-series input signal corresponding to the acquired observation signal; a reservoir section for outputting a plurality of output spike signals, each having a waveform that is reproducible to the waveform of the input signal; an output unit that outputs a plurality of predicted signals, each of which is obtained by multiplying each of the plurality of output spike signals by a preset output weight and summing the results; a determination unit that determines whether the observation target device is normal or abnormal based on the plurality of prediction signals and outputs a determination signal representing the determination result; Equipped with the reservoir section includes a plurality of input firing circuits; Each of the plurality of input firing circuits increasing a membrane potential in response to the input signal, and decreasing the membrane potential over time in accordance with a preset time constant; When the membrane potential exceeds a preset threshold potential, the neuron fires to output an intermediate spike signal, and resets the membrane potential for a certain period of time in response to the output of the intermediate spike signal; The plurality of input firing circuits are each set with a different time constant. Anomaly detection device.

2. The determination unit determines that the observed device is abnormal when a first prediction signal among the plurality of prediction signals does not match a first intermediate spike signal, which is the intermediate spike signal output from a first input firing circuit among the plurality of input firing circuits at the time of input of the prediction timing. The abnormality detection device according to claim 1 .

3. The apparatus further includes a learning unit that, during a learning period, supplies the input unit with the observation signal obtained by observing the target observation device operating normally, and changes the output weight set in the output unit so that the first prediction signal coincides with the first intermediate spike signal at the time of input of the prediction timing. The abnormality detection device according to claim 2 .

4. The output unit adjusts the output weight so that, when the observation signal obtained by observing the observation target device operating normally is given to the input unit, the first prediction signal coincides with the first intermediate spike signal at the input of the prediction timing. The abnormality detection device according to claim 2 .

5. The reservoir section is a recurrent neural network. The abnormality detection device according to claim 1 .

6. The reservoir is a spiking neural network. The abnormality detection device according to claim 1 .

7. Each of the plurality of input firing circuits is a firing circuit according to a leaky integrate-and-fire model, and the time constants are different from each other. The abnormality detection device according to claim 6.

8. Each of the plurality of input firing circuits a membrane potential holding circuit in which a membrane capacitor and a membrane resistor are connected in parallel, an input current corresponding to the input signal flows, and the membrane potential is generated according to the charge accumulated in the membrane capacitor; a comparator that outputs an intermediate spike signal when the membrane potential becomes greater than or less than the threshold potential; a reset circuit that resets the charge stored in the membrane capacitor in response to the output of the intermediate spike signal; Including, Each of the plurality of input firing circuits has a different value obtained by multiplying the capacitance of the membrane capacitor by the resistance value of the membrane resistor. The abnormality detection device according to claim 7 .

9. The reservoir portion is a plurality of synaptic circuits grouped into a plurality of groups; a plurality of adding circuits provided in a one-to-one correspondence with the plurality of groups; a plurality of output firing circuits provided in a one-to-one correspondence with the plurality of adding circuits, each outputting an output spike signal; further comprising each of the plurality of synapse circuits acquires the intermediate spike signal or the output spike signal from any one of the plurality of input firing circuits and the plurality of output firing circuits, and outputs a synapse signal multiplied by a predetermined synapse weight; each of the plurality of adder circuits acquires and adds the synapse signals from one or more synapse circuits included in a corresponding one of the plurality of groups, and outputs an added signal; Each of the plurality of output firing circuits receives an added signal from a corresponding one of the plurality of adding circuits, and fires when an integrated value of the added signal exceeds a threshold to output the output spike signal. The abnormality detection device according to claim 1 .

10. Each of the plurality of output firing circuits comprises: increasing a membrane potential in response to the addition signal, and decreasing the membrane potential over time in response to a preset time constant; When the membrane potential exceeds a preset threshold potential, the neuron fires to output the output spike signal, and resets the membrane potential for a certain period of time in response to the output spike signal; The plurality of output firing circuits are each set to the same time constant. The abnormality detection device according to claim 9 .

11. The reservoir portion is a plurality of input synapse circuits grouped into a plurality of input groups; a plurality of input adder circuits provided in a one-to-one correspondence with the plurality of input groups; further comprising each of the plurality of input synapse circuits acquires the input signal, and outputs an input synapse signal multiplied by a preset input synapse weight; each of the plurality of input summation circuits acquires and adds the input synapse signals from one or more input synapse circuits included in a corresponding one of the plurality of input groups, and outputs an input summation signal; Each of the plurality of input firing circuits receives the input sum signal from a corresponding one of the plurality of input summing circuits in place of the input signal. The abnormality detection device according to claim 9 .

12. the reservoir section includes a plurality of partial reservoir sections each outputting the plurality of output spike signals; the output section includes a plurality of partial output sections corresponding one-to-one to the plurality of partial reservoir sections, each of the plurality of partial output units acquires the plurality of output spike signals output from a corresponding one of the plurality of partial reservoir units, multiplies each of the acquired plurality of output spike signals by a preset output weight, and outputs a predicted signal obtained by summing the multiplied signals; Each of the plurality of partial reservoir portions includes any one of the plurality of input firing circuits. The abnormality detection device according to claim 1 .

13. Each of the plurality of partial reservoir portions includes: one or more input synapse circuits; an input summing circuit; further comprising each of the one or more input synapse circuits receives the input signal, and outputs an input synapse signal multiplied by a preset input synapse weight; The input summing circuit acquires the input synapse signals from each of the one or more input synapse circuits, adds them together, and outputs an input sum signal. The abnormality detection device according to claim 12.

14. a reservoir section for outputting a plurality of output spike signals, each having a waveform that is reproducible with respect to the waveform of a time-series input signal; an output unit that outputs a plurality of predicted signals, each of which is obtained by multiplying each of the plurality of output spike signals by a preset output weight and summing the results; Equipped with the reservoir section includes a plurality of input firing circuits; Each of the plurality of input firing circuits increasing a membrane potential in response to the input signal, and decreasing the membrane potential over time in accordance with a preset time constant; When the membrane potential exceeds a preset threshold potential, the neuron fires to output an intermediate spike signal, and resets the membrane potential for a certain period of time in response to the output of the intermediate spike signal; The plurality of input firing circuits are each set with a different time constant. Reservoir device.

15. An anomaly detection method for detecting an anomaly in an observation target device using an anomaly detection device, comprising: an input unit of the anomaly detection device acquires an observation signal obtained by observing the observation target device, and outputs a time-series input signal corresponding to the acquired observation signal; a reservoir unit of the abnormality detection device outputs a plurality of output spike signals, each having a waveform that is reproducible with respect to the waveform of the input signal; an input unit of the anomaly detection device outputs a plurality of prediction signals, each of which is obtained by multiplying each of the plurality of output spike signals by a preset output weight and then summing the results; a determination unit of the abnormality detection device determines whether the observation target device is normal or abnormal based on the plurality of prediction signals, and outputs a determination signal representing the determination result; the reservoir section includes a plurality of input firing circuits; Each of the plurality of input firing circuits increasing a membrane potential in response to the input signal, and decreasing the membrane potential over time in accordance with a preset time constant; When the membrane potential exceeds a preset threshold potential, the neuron fires to output an intermediate spike signal, and resets the membrane potential for a certain period of time in response to the output of the intermediate spike signal; The plurality of input firing circuits are each set with a different time constant. Anomaly detection device.

16. A program for causing an information processing device to function as an anomaly detection device that detects an anomaly in an observation target device, The information processing device an input unit that acquires an observation signal obtained by observing the target device and outputs a time-series input signal corresponding to the acquired observation signal; a reservoir section for outputting a plurality of output spike signals, each having a waveform that is reproducible to the waveform of the input signal; an output unit that outputs a plurality of predicted signals, each of which is obtained by multiplying each of the plurality of output spike signals by a preset output weight and summing the results; a determination unit that determines whether the observation target device is normal or abnormal based on the plurality of prediction signals and outputs a determination signal representing the determination result; and make it work, The reservoir portion includes a plurality of input firing portions, Each of the plurality of input firing units is increasing a membrane potential in response to the input signal, and decreasing the membrane potential over time in accordance with a preset time constant; When the membrane potential exceeds a preset threshold potential, the neuron fires to output an intermediate spike signal, and resets the membrane potential for a certain period of time in response to the output of the intermediate spike signal; The plurality of input firing units are each set with a different time constant. program.

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