Battery management system

Abstract

To provide a battery management system for performing disconnection detection of a monitoring circuit (measurement circuit) without providing a circuit for disconnection detection outside the monitoring circuit (measurement circuit).SOLUTION: A battery management system includes: a plurality of measurement circuits for measuring at least one of voltage and current of each of a plurality of batteries included in a battery pack and transmitting measurement data of a specific size including the measured information; a communication circuit for performing two-way communication with the measurement circuits and transmitting the measurement data to battery manager for managing the battery pack; a first wiring for connecting the measurement circuit to a first power source for digital; a second wiring for connecting the measurement circuit to a first ground; a third wiring for connecting the measurement circuit to a second power source for analog; and a fourth wiring for connecting the measurement circuit to a second ground for analog. The measurement circuit is provided with a disconnection detection circuit for outputting a disconnection detection signal showing that a disconnection of any of the first wiring to the fourth wiring is detected on the basis of both voltages of the first power source and the second power source.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present disclosure relates to a battery management system. [Background technology]

[0002] The battery management system (BMS) disclosed in Patent Document 1 includes a plurality of monitoring circuits and a communication circuit that communicates with each of the plurality of monitoring circuits, and a battery manager that manages the assembled battery.

[0003] The plurality of monitoring circuits are measurement circuits that measure the current flowing through the battery, the voltage generated in the battery, etc. Each of the plurality of monitoring circuits is connected to a power supply and a ground, and each of the plurality of monitoring circuits is driven by the voltage from the power supply. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-076890 Summary of the Invention [Problem to be solved by the invention]

[0005] However, conventional BMSs do not have a means for transmitting the detection of a wire break to the battery manager when at least a portion of the wiring connecting the monitoring circuit to the power supply or the wiring connecting the monitoring circuit to ground is broken. Therefore, conventional BMSs require a circuit for detecting a wire break outside the monitoring circuit, which can increase the mounting area of ​​the BMS. As such, conventional technologies have room for improvement in terms of wire break detection in monitoring circuits.

[0006] In view of the above circumstances, the present disclosure has an object to provide a battery management system that detects a disconnection in a monitoring circuit (measurement circuit) without providing a circuit for detecting the disconnection external to the monitoring circuit (measurement circuit). [Means for solving the problem]

[0007] In order to solve the above problems, the battery management system of the present disclosure includes a plurality of measurement circuits that measure at least one of the voltage and current of each of a plurality of batteries included in a battery pack and transmit measurement data of a specific size including the measured information; a communication circuit that performs bidirectional communication with the measurement circuits and transmits the measurement data to a battery manager that manages the battery pack; a first wiring that connects the measurement circuits to a first digital power supply; a second wiring that connects the measurement circuits to a first digital ground; a third wiring that connects the measurement circuits to a second analog power supply; and a fourth wiring that connects the measurement circuits to a second analog ground, and the measurement circuits include an open circuit detection circuit that outputs an open circuit detection signal indicating that an open circuit has been detected in any of the first wiring to the fourth wiring based on the voltages of both the first power supply and the second power supply. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a configuration diagram of a battery management system 100 according to an embodiment of the present disclosure. [Figure 2] FIG. 2 is a diagram showing an example of the configuration of the disconnection detection circuit 10. As shown in FIG. [Figure 3] FIG. 3 is a diagram showing an example of the configuration of the output circuit 11. [Figure 4] FIG. 4 is a diagram for explaining the operation of the output circuit 11. In FIG. [Figure 5] FIG. 5 is a timing chart for explaining the operation of the disconnection detection function (disconnection detection circuit 10) of the output circuit 11. [Figure 6] FIG. 6 is a timing chart for explaining the operation of the disconnection detection function (disconnection detection circuit 10) of the output circuit 11. [Figure 7] FIG. 7 is a timing chart for explaining the operation of the disconnection detection function (disconnection detection circuit 10) of the output circuit 11. [Figure 8] FIG. 8 is a timing chart for explaining the operation of the disconnection detection function (disconnection detection circuit 10) of the output circuit 11. [Figure 9] FIG. 9 is a timing chart for explaining the operation of the abnormality detection signal output function of the output circuit 11 (output circuit 11). DETAILED DESCRIPTION OF THE INVENTION

[0009] Hereinafter, embodiments will be described with reference to the drawings. Note that the same or similar reference numerals are used to designate the same functions or configurations, and descriptions thereof will be omitted as appropriate.

[0010] (Embodiment) 1 is a configuration diagram of a battery management system 100 according to an embodiment of the present disclosure. The battery management system 100 may be interpreted as a circuit that monitors the voltage (cell voltage) of each of a plurality of batteries included in a battery pack 200, the current (cell current) flowing through each of the plurality of batteries, and the like. Each of the plurality of batteries may be interpreted as a battery cell, a battery stack including a plurality of battery cells therein, or a battery module including a plurality of battery stacks therein.

[0011] The battery management system 100 may include a communication system 9, a battery manager 20, and a network 30.

[0012] (Network 30) The network 30 connects the battery manager 20 and the communication system 9. As an example, the network 30 may be a CAN (Controller Area Network).

[0013] (Communication System 9) The communication system 9 is communicatively connected to the battery manager 20 via a network 30. The communication system 9 may include a communication circuit 5 and a group of communication devices. The group of communication devices includes a plurality of communication devices, which may be interpreted as measurement circuits 1-1 to 1-11, measurement circuit 7, etc. The measurement circuits 1-1 to 1-11 and measurement circuit 7 may each be realized by a computer equipped with a processor. In the following, for simplicity of explanation, unless otherwise specified, the plurality of measurement circuits (measurement circuits 1-1 to 1-11, 7) may be simply referred to as a plurality of measurement circuits 1.

[0014] (Communication circuit 5) The communication circuit 5 may be connected to the plurality of measurement circuits 1 in a loop by a serial communication line 6. The communication circuit 5 may perform bidirectional communication with each of the plurality of measurement circuits 1 via the serial communication line 6. The communication circuit 5 may perform bidirectional communication with the battery manager 20 via a network 30. The communication circuit 5 may be realized by a computer having a processor.

[0015] The serial communication line 6 may be interpreted as a first communication line that connects multiple measurement circuits 1 (e.g., measurement circuits 1-1 to 1-11, 7) in a daisy chain to the communication circuit 5, and allows bidirectional communication between the multiple measurement circuits 1 and the communication circuit 5. The network 30 may be interpreted as a second communication line that connects the communication circuit 5 to the battery manager 20, and allows bidirectional communication between the communication circuit 5 and the battery manager 20.

[0016] (Measurement circuit 1-1~1-11, 7) The multiple measurement circuits 1 may be connected in series in a daisy chain, each measuring at least one of the voltage and current of each of the multiple batteries included in the battery pack and transmitting measurement data of a specific data size including the measured information. The daisy chain may be interpreted as a connection configuration in which three or more circuits are connected by cables for communication.

[0017] Each of the plurality of measurement circuits 1 may measure at least one of the voltage and current of each of the plurality of batteries included in the battery pack 200. Specifically, upon receiving a measurement start signal from the communication circuit 5, each of the plurality of measurement circuits 1 may start analog-to-digital conversion of at least one of the voltage and current, and transmit the analog-to-digital converted at least one of the voltage and current to the battery manager 20 as measurement data. Note that the measurement circuit 7 may measure the current flowing through the battery pack 200, and transmit measurement data indicating the value of the measured current to the communication circuit 5.

[0018] The measuring circuit 1-1 may include a measuring unit 3-1 and a communication unit 4-1. Similarly, the measuring circuit 1-2 may include a measuring unit 3-2 and a communication unit 4-2, the measuring circuit 1-3 may include a measuring unit 3-3 and a communication unit 4-3, and the measuring circuit 1-11 may include a measuring unit 3-11 and a communication unit 4-11. Each of the measuring units 3-1 to 3-11 may measure the voltage of the battery.

[0019] Although the present disclosure describes an example in which twelve measurement circuits 1 are used, the number of measurement circuits 1 is not limited to twelve, and may be two or more.

[0020] (Measurement section 3-1~3-11) Measurement unit 3-1 may measure the voltage generated across battery #1 and the current flowing through battery #1. Similarly, measurement unit 3-2 may measure the voltage generated across battery #2 and the current flowing through battery #2. Measurement unit 3-3 may measure the voltage generated across battery #3 and the current flowing through battery #3. Measurement unit 3-11 may measure the voltage generated across battery #11 and the current flowing through battery #11.

[0021] (Communications Department 4-1~4-11) The communication unit 4-1 is connected to the adjacent communication unit 4-2 so as to be able to communicate with each other. Similarly, the communication unit 4-2 is connected to the adjacent communication unit 4-3 so as to be able to communicate with each other. The communication unit 4-11 is connected to an adjacent communication unit (not shown) so as to be able to communicate with each other. In this way, a daisy chain is formed by connecting the adjacent communication units 4-1 to 4-11.

[0022] A serial communication line 6 is connected to the measurement circuit 1-1 that constitutes one end of the daisy chain, and another serial communication line 6 is connected to the measurement circuit 1-11 that constitutes the other end of the daisy chain. As a result, the communication units 4-1 to 4-11 and the communication circuit 5 are connected in a loop by the serial communication line 6.

[0023] The communication unit 4-1 may transmit measurement data indicating values ​​such as voltage and current measured by the measurement unit 3-1 to the communication circuit 5. Similarly, the communication unit 4-2 may transmit measurement data measured by the measurement unit 3-2 to the communication circuit 5. The communication unit 4-3 may transmit measurement data measured by the measurement unit 3-3 to the communication circuit 5. The communication unit 4-11 may transmit measurement data measured by the measurement unit 3-11 to the communication circuit 5.

[0024] Each of the multiple measurement circuits 1 configured in this manner starts measuring at least one of the voltage and current when it receives a measurement start signal from the battery manager 20 via the communication circuit 5 indicating that it should start measuring at least one of the voltage and current.

[0025] (Battery Manager 20) The battery manager 20 may manage each of the multiple batteries included in the battery pack 200. Specifically, the battery manager 20 may request measurement of at least one of the voltage and current of each of the multiple batteries included in the battery pack 200, collect measurement data in response to the request, and perform various controls based on the collected measurement data.

[0026] 2 and 3, the disconnection detection function (disconnection detection circuit 10) and the abnormality detection signal output function (output circuit 11) of the measurement circuit 1-1 will be described. Note that these functions may also be provided in each of the measurement circuits 1-2 to 1-11. Here, as an example, a case where the measurement circuit 1-1 has these functions will be described.

[0027] (Disconnection detection circuit 10) 2 is a diagram showing an example of the configuration of the disconnection detection circuit 10. The measurement circuit 1-1 includes the disconnection detection circuit 10. The measurement circuit 1-1 is connected to a first wiring W1, a second wiring W2, a third wiring W3, and a fourth wiring W4. These wirings are included in the communication system 9 shown in FIG.

[0028] The first wiring W1 can be interpreted as the wiring connecting the measurement circuit 1-1 to the first digital power supply DVDD. The second wiring W2 can be interpreted as the wiring connecting the measurement circuit 1-1 to the first digital ground DVSS. The third wiring W3 can be interpreted as the wiring connecting the measurement circuit 1-1 to the second analog power supply AVDD. The fourth wiring W4 can be interpreted as the wiring connecting the measurement circuit 1-1 to the second analog ground AVSS. The reason for separating the power supplies into a digital power supply (first digital power supply DVDD) and an analog power supply (second analog power supply AVDD) is to prevent noise from the digital power supply. Specifically, the digital power supply generates noise from communication and clocks (oscillators), so noise generated by the digital power supply cannot be ignored to achieve high-precision voltage and current measurements. Separating the digital and analog power supplies reduces noise from the digital power supply to the circuits that make up the analog power supply.

[0029] The first wiring W1 and the second wiring W2 may be connected to the power supply input terminal Tin of the measurement circuit 1-1, and the third wiring W3 and the fourth wiring W4 may be connected to the ground terminal Tg of the measurement circuit 1-1.

[0030] The open circuit detection circuit 10 may output open circuit detection signals det_ow_d, det_ow_a indicating that an open circuit has been detected in any of the first wiring W1 to the fourth wiring W4 based on the voltages of both the first power supply DVDD and the second power supply AVDD.

[0031] The open circuit detection circuit 10 may include a digital open circuit detection circuit 10D that outputs the open circuit detection signal det_ow_d, and an analog open circuit detection circuit 10A that outputs the open circuit detection signal det_ow_a.

[0032] The digital-system open circuit detection circuit 10D and the analog-system open circuit detection circuit 10A may each include an N-type switch element N1 whose gate G is connected to a first power supply DVDD, an N-type switch element N2 whose gate G is connected to a second power supply AVDD, an inverter I1, an inverter I2, an inverter I3, and a NAND gate circuit ND.

[0033] (Digital system disconnection detection circuit 10D) The gate G of the switch element N1 of the digital-system open circuit detection circuit 10D is connected to the first power supply DVDD, the drain D of the switch element N1 of the digital-system open circuit detection circuit 10D is connected to the second power supply AVDD, and the source S of the switch element N1 of the digital-system open circuit detection circuit 10D is connected to the second ground AVSS.

[0034] The input of the inverter I1 of the digital-system open circuit detection circuit 10D is connected to the output (drain D) of the switch element N1 of the digital-system open circuit detection circuit 10D. The output of the inverter I1 is input to the NAND gate circuit ND of the digital-system open circuit detection circuit 10D. The inverter I1 may output a open circuit detection signal det_ow_dvdd indicating that a open circuit has been detected in the first digital wiring W1, that is, may output a signal that changes from H level to L level. The open circuit detection signal det_ow_dvdd is input to the NAND gate circuit ND of the digital-system open circuit detection circuit 10D.

[0035] The input of inverter I2 of digital-system open-circuit detection circuit 10D is connected to the output (drain D) of switch element N2 of digital-system open-circuit detection circuit 10D. The output of inverter I2 is connected to the input of inverter I3 of digital-system open-circuit detection circuit 10D. The output of inverter I3 is input to NAND gate circuit ND of digital-system open-circuit detection circuit 10D. Inverter I2 inputs an output obtained by inverting its input to inverter I3, and inverter I3 outputs an output obtained by inverting its input, specifically, an open-circuit detection signal det_ow_dvss indicating that an open circuit has been detected in second digital wiring W2, that is, a signal that changes from H level to L level. The open-circuit detection signal det_ow_dvss is input to NAND gate circuit ND of digital-system open-circuit detection circuit 10D.

[0036] (Analog system disconnection detection circuit 10A) The gate G of the switch element N1 of the analog-system open-circuit detection circuit 10A is connected to the second power supply AVDD, the drain D of the switch element N1 of the analog-system open-circuit detection circuit 10A is connected to the first power supply DVDD, and the source S of the switch element N1 of the analog-system open-circuit detection circuit 10A is connected to the first ground DVSS.

[0037] The input of the inverter I1 of the analog-system open-circuit detection circuit 10A is connected to the output (drain D) of the switch element N1 of the analog-system open-circuit detection circuit 10A. The output of the inverter I1 is input to the NAND gate circuit ND of the analog-system open-circuit detection circuit 10A. The inverter I1 may output a open-circuit detection signal det_ow_avdd indicating that a open circuit has been detected in the third analog wiring W3, that is, may output a signal that changes from H level to L level. The open-circuit detection signal det_ow_avdd is input to the NAND gate circuit ND of the analog-system open-circuit detection circuit 10A.

[0038] The input of the inverter I2 of the analog-system open-circuit detection circuit 10A is connected to the output (drain D) of the switch element N2 of the analog-system open-circuit detection circuit 10A. The output of the inverter I2 is connected to the input of the inverter I3 of the analog-system open-circuit detection circuit 10A. The output of the inverter I3 is input to the NAND gate circuit ND of the analog-system open-circuit detection circuit 10A. The inverter I2 inputs an output obtained by inverting the input to the inverter I3, and the inverter I3 outputs an output obtained by inverting the input, specifically, a open-circuit detection signal det_ow_avss indicating that a open circuit has been detected in the fourth analog wiring W4, that is, a signal that changes from H level to L level. The open-circuit detection signal det_ow_avss is input to the NAND gate circuit ND of the analog-system open-circuit detection circuit 10A.

[0039] The states of the first wiring W1 to the fourth wiring W4 and the output of the circuit will be described below.

[0040] (If there is no disconnection) Since none of the first wiring W1 to the fourth wiring W4 is broken, when the voltages of the first power supply DVDD and the second power supply AVDD are applied to the break detection circuit 10, the break detection circuit 10 does not output a break detection signal. Specifically, the digital break detection circuit 10D and the analog break detection circuit 10A continue to output L-level signals. In other words, the break detection signals det_ow_d and det_ow_a are not output.

[0041] (When the first wiring W1 or the second wiring W2 is disconnected) When the first wiring W1 or the second wiring W2 of the digital system is disconnected, the digital-system disconnection detection circuit 10D detects the disconnection of these wirings using the power supply of the analog system. Specifically, when the third wiring W3 and the fourth wiring W4 are not disconnected but the first wiring W1 or the second wiring W2 is disconnected, the digital-system disconnection detection circuit 10D outputs a disconnection detection signal det_ow_d indicating that a disconnection has occurred in the digital wiring.

[0042] (When the first wiring W1 is broken) Specifically, when the first wiring W1 is broken, the switch element N1 of the digital-system open-circuit detection circuit 10D changes from on to off, and the input of the inverter I1 of the digital-system open-circuit detection circuit 10D changes from low to high, causing the output of the inverter I1 to change from high to low. Because the switch element N2 of the digital-system open-circuit detection circuit 10D remains on, the output of the inverter I3 of the digital-system open-circuit detection circuit 10D remains high. Because the outputs of the inverters I1 and I3 of the digital-system open-circuit detection circuit 10D are low and high, respectively, the output of the NAND gate circuit ND changes from low to high. That is, the NAND gate circuit ND outputs the open-circuit detection signal det_ow_d.

[0043] (When the second wiring W2 is broken) When the second wiring W2 is broken, the switch element N2 of the digital-system open-circuit detection circuit 10D changes from on to off, and the input of the inverter I2 of the digital-system open-circuit detection circuit 10D changes from low to high, causing the output of the inverter I3 to change from high to low. Because the switch element N1 of the digital-system open-circuit detection circuit 10D remains on, the output of the inverter I1 of the digital-system open-circuit detection circuit 10D remains high. Because the outputs of the inverters I1 and I3 of the digital-system open-circuit detection circuit 10D are high and low, the output of the NAND gate circuit ND of the digital-system open-circuit detection circuit 10D changes from low to high. That is, the NAND gate circuit ND outputs the open-circuit detection signal det_ow_d.

[0044] (When the third wiring W3 or the fourth wiring W4 is broken) When the third wiring W3 or the fourth wiring W4 of the analog system is disconnected, the analog system disconnection detection circuit 10A detects the disconnection of these wirings using the power supply of the digital system. Specifically, when the first wiring W1 and the second wiring W2 are not disconnected but the third wiring W3 or the fourth wiring W4 is disconnected, the analog system disconnection detection circuit 10A outputs a disconnection detection signal det_ow_a indicating that a disconnection has occurred in the analog system wiring.

[0045] (When the third wire W3 is broken) Specifically, when the third wiring W3 is broken, the switch element N1 of the analog-system open-circuit detection circuit 10A changes from on to off, and the input of the inverter I1 of the analog-system open-circuit detection circuit 10A changes from low to high, causing the output of the inverter I1 to change from high to low. Because the switch element N2 of the analog-system open-circuit detection circuit 10A remains on, the output of the inverter I3 of the analog-system open-circuit detection circuit 10A remains high. Because the outputs of the inverters I1 and I3 of the analog-system open-circuit detection circuit 10A are low and high, respectively, the output of the NAND gate circuit ND changes from low to high. That is, the NAND gate circuit ND outputs the open-circuit detection signal det_ow_a.

[0046] (When the fourth wire W4 is broken) When the fourth wiring W4 is broken, the switch element N2 of the analog-system open-circuit detection circuit 10A changes from on to off, and the input of the inverter I2 of the analog-system open-circuit detection circuit 10A changes from low to high, causing the output of the inverter I3 to change from high to low. Because the switch element N1 of the analog-system open-circuit detection circuit 10A remains on, the output of the inverter I1 of the analog-system open-circuit detection circuit 10A remains high. Because the outputs of the inverters I1 and I3 of the analog-system open-circuit detection circuit 10A are high and low, the output of the NAND gate circuit ND of the analog-system open-circuit detection circuit 10A changes from low to high. That is, the NAND gate circuit ND outputs the open-circuit detection signal det_ow_a.

[0047] In the following, for the sake of simplicity, the open-circuit detection signals det_ow_d and det_ow_a may be simply referred to as open-circuit detection signals.

[0048] (Output circuit 11) 3 is a diagram showing an example of the configuration of the output circuit 11. The measurement circuit 1-1 includes the output circuit 11. When the output circuit 11 receives an open circuit detection signal, the output circuit 11 may output an abnormality detection signal FAULTN indicating that an abnormality has been detected in any of the measurement circuits 1-1 to 1-11 to at least the battery manager 20 via the communication circuit 5. Specifically, when the output circuit 11 receives either the open circuit detection signal det_ow_d or the open circuit detection signal det_ow_a from the open circuit detection circuit 10, the output circuit 11 may output an L-level abnormality detection signal FAULTN.

[0049] The output circuit 11 may also output the abnormality detection signal FAULTN when it receives a disconnection detection signal output by any of the measurement circuits 1-2 to 1-11 other than the measurement circuit 1-1.

[0050] Each of the measurement circuits 1-2 to 1-11 may also include an output circuit 11.

[0051] The output circuit 11 may include a signal output unit 11a and a signal collection unit 11b as functions for outputting the abnormality detection signal FAULTN.

[0052] The signal output unit 11a outputs an L-level abnormality detection signal FAULTN when either the open circuit detection signal det_ow_d or the open circuit detection signal det_ow_a is input, and does not output the abnormality detection signal FAULTN when neither of these signals is input. The abnormality detection signal FAULTN may be notified to the battery manager 20 directly or via the communication circuit 5, or may be notified to the battery manager 20 via other measurement circuits 1-2 to 1-11.

[0053] The signal output section 11a may include three P-type switch elements P1, P2, and P3, and three N-type switch elements N2, N3, and N4.

[0054] The source S of the switch element P1 may be connected to the first power supply DVDD. Note that another power supply may be used instead of the first power supply DVDD. The drain D of the switch element P1 may be connected to the source S of the switch element P2. The gate G of the switch element P1 may be connected to an input terminal Td that inputs the open-circuit detection signal det_ow_d and to the gate G of the switch element N4.

[0055] The drain D of the switch element P2 may be connected to the source S of the switch element P3. The gate G of the switch element P2 may be connected to the input terminal Ta that inputs the open circuit detection signal det_ow_a and the gate G of the switch element N3.

[0056] The drain D of switch element P3 may be connected to the drain D of each of switch elements N2, N3, and N4 and to output terminal To. The gate G of switch element P3 may be connected to input terminal Tb and to gate G of switch element N2. Input terminal Tb may be interpreted as a terminal that inputs the output of signal collecting unit 11b, that is, a terminal that inputs a signal that detects that an abnormality detection signal FAULTN has been output from output circuit 11 provided in each of measuring circuits 1-2 to 1-11.

[0057] The source S of the switch element N2 may be connected to the first ground DVSS, the source S of the switch element N3 may be connected to the first ground DVSS, and the source S of the switch element N4 may be connected to the second ground AVSS.

[0058] For example, when the input terminal Td receives the open circuit detection signal det_ow_d from the open circuit detection circuit 10, the switch element P1 turns off and the switch element N4 turns on, causing the potential of the output terminal To to become L level and continuing to output the abnormality detection signal FAULTN.

[0059] When the input terminal Ta receives the open circuit detection signal det_ow_a from the open circuit detection circuit 10, the switch element P2 turns off and the switch element N3 turns on, causing the potential of the output terminal To to become L level and continuing to output the abnormality detection signal FAULTN.

[0060] When the input terminal Tb receives a signal from the signal collecting unit 11b, the switch element P3 turns off and the switch element N2 turns on, causing the potential of the output terminal To to become L level, and the abnormality detection signal FAULTN continues to be output.

[0061] (Signal consolidation unit 11b) The signal collection unit 11b receives the abnormality detection signal FAULTN output by one of the measurement circuits 1-2 to 1-11 other than the measurement circuit 1-1, and outputs a signal indicating that the abnormality detection signal FAULTN has been output. As a result, even when the output circuit 11 of a first measurement circuit (e.g., measurement circuit 1-1) among the plurality of measurement circuits 1-1 to 1-12 receives the abnormality detection signal FAULTN from the output circuit 11 of a second measurement circuit (e.g., measurement circuit 1-2) other than the first measurement circuit among the plurality of measurement circuits 1-1 to 1-12 instead of the open circuit detection signal, the output circuit 11 outputs the abnormality detection signal FAULTN to the battery manager 20.

[0062] By providing the signal aggregation unit 11b, when multiple measurement circuits 1 daisy-chained via a serial communication line 6 communicate bidirectionally with the communication circuit 5 and the battery manager 20, a specific measurement circuit (e.g., measurement circuit 1-1) can relay an abnormality detection signal FAULTN from measurement circuits other than the specific measurement circuit (e.g., measurement circuits 1-2, 1-3, etc.).

[0063] The operation of the output circuit 11 will be described below with reference to Figures 4 to 9. Figure 4 is a diagram for explaining the operation of the output circuit 11. Figures 5 to 8 are timing charts for explaining the operation of the disconnection detection function (disconnection detection circuit 10) of the output circuit 11. Figure 9 is a timing chart for explaining the operation of the abnormality detection signal output function (output circuit 11) of the output circuit 11.

[0064] FIG. 4 shows a disconnection location Dis1 in the first wiring W1, a disconnection location Dis2 in the second wiring W2, a disconnection location Dis3 in the third wiring W3, and a disconnection location Dis4 in the fourth wiring W4.

[0065] 5 shows the output signals of each circuit when the first wiring W1 is broken. When the break detection signal det_ow_dvdd changes from H level to L level, the break detection signal det_ow_d changes from L level to H level. This causes the output circuit 11 to output the abnormality detection signal FAULTN. In other words, the output of the output circuit 11 changes from H level to L level.

[0066] 6 shows the output signals of each circuit when the second wiring W2 is broken. When the break detection signal det_ow_dvss changes from H level to L level, the break detection signal det_ow_d changes from L level to H level. This causes the output circuit 11 to output the abnormality detection signal FAULTN.

[0067] 7 shows the output signals of each circuit when the third wiring W3 is broken. When the break detection signal det_ow_avdd changes from H level to L level, the break detection signal det_ow_a changes from L level to H level. This causes the output circuit 11 to output the abnormality detection signal FAULTN.

[0068] 8 shows the output signals of each circuit when the fourth wiring W4 is broken. When the break detection signal det_ow_avss changes from H level to L level, the break detection signal det_ow_a changes from L level to H level. This causes the output circuit 11 to output the abnormality detection signal FAULTN.

[0069] 9 shows the output signals of each circuit when another BLK is detected, that is, when one of the measurement circuits 1-2 to 1-11 other than the measurement circuit 1-1 outputs the abnormality detection signal FAULTN. When the signal (det<1:N>) indicating that an abnormality has been detected in one of the measurement circuits 1-2 to 1-11 other than the measurement circuit 1-1 changes from L level to H level, the abnormality detection signal FAULTN is output from the output circuit 11. In other words, the output of the output circuit 11 changes from H level to L level.

[0070] (Action, effect) As described above, the measurement circuit 1 of the battery management system 100 of the present disclosure includes the open circuit detection circuit 10 that outputs the open circuit detection signals det_ow_d and det_ow_a indicating that an open circuit has been detected among the first wiring W1 to the fourth wiring W4, based on the voltages of both the first power supply DVDD and the second power supply AVDD. This allows the measurement circuit 1 to detect an open circuit in the wiring connected to the measurement circuit 1 by using the voltage applied to the measurement circuit 1, without providing an open circuit detection circuit external to the measurement circuit 1. Therefore, the mounting area of ​​the battery management system 100 can be reduced compared to when a circuit for open circuit detection is provided external to the measurement circuit 1.

[0071] Furthermore, since the open circuit detection circuit 10 and the output circuit 11 can be manufactured on a logic basis, it is possible to suppress an increase in the manufacturing cost of the measurement circuit 1. Therefore, the manufacturing cost of the battery management system 100 can be significantly reduced compared to when a circuit for open circuit detection is provided outside the measurement circuit 1.

[0072] Furthermore, if a circuit for detecting a wire break is provided outside the measuring circuit 1, wiring for the circuit for detecting a wire break to notify the measuring circuit 1, power supply wiring for driving the circuit for detecting a wire break, a circuit for the circuit for detecting a wire break to notify the measuring circuit 1, and a circuit for the measuring circuit 1 to receive the notification from the circuit for detecting a wire break may be required. In contrast, in the measuring circuit 1 of the battery management system 100 of the present disclosure, the circuit for detecting a wire break can be detected by the power supply supplied to the measuring circuit 1, and if a wire break is detected, an abnormality detection signal FAULTN can be sent to the battery manager 20 directly or via the communication circuit 5. This simplifies the circuit configuration of the battery management system 100, and the reliability of the battery management system 100 can be significantly improved.

[0073] In addition, the following supplementary notes are provided in relation to the above description.

[0074] (Appendix 1) a plurality of measurement circuits that measure at least one of the voltage and current of each of a plurality of batteries included in the battery pack and transmit measurement data of a specific size that includes the measurement information; a communication circuit that performs bidirectional communication with the measurement circuit and transmits the measurement data to a battery manager that manages the assembled battery; a first wire connecting the measurement circuit to a first power supply for digital use; a second wiring connecting the measurement circuit to a first digital ground; a third wire connecting the measurement circuit to a second power supply for analog; a fourth wiring that connects the measurement circuit to a second analog ground; Equipped with The measurement circuit A battery management system comprising an open circuit detection circuit that outputs an open circuit detection signal indicating that an open circuit has been detected in any of the first wiring to the fourth wiring based on the voltages of both the first power source and the second power source.

[0075] (Appendix 2) The battery management system described in Appendix 1, wherein the measurement circuit includes an output circuit that, when the open circuit detection signal is input, outputs an abnormality detection signal to at least the battery manager via the communication circuit, indicating that an abnormality in the measurement circuit has been detected.

[0076] (Appendix 3) The output circuit included in a first one of the plurality of measurement circuits is A battery management system as described in Appendix 2, which outputs the abnormality detection signal to the battery manager even when the abnormality detection signal from the output circuit provided in a second measuring circuit other than the first measuring circuit among the plurality of measuring circuits is input instead of the open circuit detection signal. [Explanation of symbols]

[0077] 1, 1-1, 1-2, 1-3, 1-11, 7 measurement circuit 3-1, 3-2, 3-3, 3-11 Measuring section 4-1, 4-2, 4-3, 4-11 Communications Department 5. Communication Circuits 6 serial communication lines 9. Communication Systems 10. Open circuit detection circuit 10A Analog disconnection detection circuit 10D Digital system disconnection detection circuit 11 Output circuit 11a Signal output section 11b Signal consolidation section 20 Battery Manager 30 Network 100 Battery Management System 200 battery packs

Claims

1. a plurality of measurement circuits that measure at least one of the voltage and current of each of a plurality of batteries included in the battery pack and transmit measurement data of a specific size that includes the measurement information; a communication circuit that performs bidirectional communication with the measurement circuit and transmits the measurement data to a battery manager that manages the assembled battery; a first wire connecting the measurement circuit to a first power supply for digital use; a second wiring connecting the measurement circuit to a first digital ground; a third wiring connecting the measurement circuit to a second power supply for analog use; a fourth wiring that connects the measurement circuit to a second analog ground; Equipped with The measurement circuit A battery management system comprising: an open circuit detection circuit that outputs an open circuit detection signal indicating that an open circuit has been detected in any of the first wiring to the fourth wiring based on the voltages of both the first power supply and the second power supply.

2. 2. The battery management system of claim 1, wherein the measurement circuit includes an output circuit that, when the open circuit detection signal is input, outputs an abnormality detection signal to at least the battery manager via the communication circuit, indicating that an abnormality in the measurement circuit has been detected.

3. The output circuit included in a first one of the plurality of measurement circuits is 3. The battery management system according to claim 2, wherein the abnormality detection signal is output to the battery manager even when the abnormality detection signal is input from the output circuit of a second of the plurality of measurement circuits other than the first measurement circuit instead of the open circuit detection signal.

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