Multilayer ceramic electronic component and manufacturing method for the same

Abstract

To provide a multilayer ceramic electronic component that prevents electrode discontinuities and enables thinning of an internal electrode layer.SOLUTION: The multilayer ceramic electronic component includes a multilayer body having multiple insulating layers containing ceramic and multiple internal electrode layers. The aspect ratio of metal particles constituting the internal electrode layers is 1.8 or greater. According to this multilayer ceramic electronic component, it is possible to prevent the occurrence of electrode discontinuities and thin the internal electrode layers.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] The present invention relates to a multilayer ceramic electronic component and a method for manufacturing a multilayer ceramic electronic component. [Background technology]

[0002] Multilayer ceramic capacitors are known as multilayer ceramic electronic components obtained by firing a laminate having a plurality of ceramic-containing insulator layers and a plurality of internal electrode layers. In response to the growing demand for smaller size and larger capacitance, the green sheets and internal electrode layers are becoming thinner and more multilayered.

[0003] As the internal electrode layers become thinner, they may be broken. Patent Document 1 describes a nickel powder that can prevent electrode breaks in the internal electrode layers. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2010-59467 Summary of the Invention [Problem to be solved by the invention]

[0005] Patent Document 1 discloses that it is preferable to use nickel powder containing chromium and magnesium in addition to nickel in order to prevent electrode discontinuities in the internal electrode layers.

[0006] In the manufacturing process of a multilayer ceramic capacitor, a laminate is produced by laminating a plurality of green sheets coated with a conductive paste that will become internal electrode layers, and then firing the green sheets at the firing temperature of the ceramic that constitutes them. During firing, the sintering temperature of the nickel contained in the conductor paste is lower than the firing temperature in the firing process, so the nickel tends to become over-sintered and spherical during the firing process. When the nickel becomes spherical, it is prone to electrode discontinuities, and the probability of electrode discontinuities occurring is particularly high when nickel particles with small particle sizes are used. On the other hand, when nickel particles with a large particle size are used, it is possible to prevent the occurrence of electrode discontinuities due to over-sintering to some extent, but when nickel particles with a large particle size are used, there is a problem that the thickness of the internal electrode layer cannot be made thin, and it is not possible to meet the demand for thinner internal electrode layers.

[0007] Even if the nickel powder described in Patent Document 1 was used, it was difficult to fully prevent the occurrence of electrode discontinuities due to over-sintering and spheroidization for the reasons described above and meet the demand for thinner internal electrode layers.

[0008] The present invention has been made to solve the above-mentioned problems, and has an object to provide a multilayer ceramic electronic component that can prevent electrode discontinuities and reduce the thickness of internal electrode layers, and a method for manufacturing the multilayer ceramic electronic component. [Means for solving the problem]

[0009] The inventors have investigated means for preventing electrode discontinuities and thinning the internal electrode layers, and have found that making the metal grains that make up the internal electrode layers flat is effective, leading to the invention. That is, the multilayer ceramic electronic component of the present invention is a multilayer ceramic electronic component comprising a laminate having a plurality of ceramic-containing insulator layers and a plurality of internal electrode layers, and the aspect ratio of the metal grains constituting the internal electrode layers is 1.8 or more.

[0010] The metal grains constituting the internal electrode layers of the multilayer ceramic electronic component of the present invention are flat particles that are thin relative to the thickness direction of the laminate and elongated in the length and width directions of the laminate, and the aspect ratio is used as an indicator of whether the metal grains have a flat shape. The aspect ratio is calculated as the ratio of the shape of the metal particle (width direction of the laminate / thickness direction of the laminate), and the larger this value, the flatter the particle. A large aspect ratio means that the dimension of the metal particle in the thickness direction is small, which is preferable from the viewpoint of thinning the internal electrode layer. Furthermore, a large aspect ratio means that the metal particle extends in the width direction without being broken, which is preferable from the viewpoint of preventing electrode discontinuities.

[0011] In the multilayer ceramic electronic component of the present invention, the thickness T (μm) of the internal electrode layer and the volume V (mm 3 ) preferably satisfies the following relational expression (1). T≦0.0552×lnV+0.5239 (1) When this relational expression is satisfied, it means that a multilayer ceramic electronic component is obtained in which the thickness of the internal electrode layers is small relative to the volume of the laminate.

[0012] The method for producing a multilayer ceramic electronic component of the present invention includes a lamination step of laminating a plurality of ceramic green sheets, each having an internal electrode pattern for forming an internal electrode layer, to produce a laminated block; a cutting step of cutting the laminated block to obtain a plurality of chips; a heat treatment step of passing the chips through a furnace whose temperature is set to 1200°C to 1600°C for a residence time of 30 seconds or less; and a firing step of firing the chips that have undergone the heat treatment step by increasing the temperature from 900°C to a maximum temperature at a heating rate of 5°C / min or more.

[0013] In the above-described steps, when the heat treatment step and the firing step are performed, the occurrence of electrode discontinuities in the firing step is prevented, and a multilayer ceramic electronic component can be obtained in which the internal electrode layers are thinned and electrode discontinuities are prevented. [Effects of the Invention]

[0014] According to the multilayer ceramic electronic component of the present invention and the method for manufacturing the multilayer ceramic electronic component of the present invention, the occurrence of electrode discontinuities can be prevented and the internal electrode layers can be made thinner. [Brief explanation of the drawings]

[0015] [Figure 1] 1 is a perspective view schematically showing an example of a laminate constituting a multilayer ceramic capacitor, which is an example of a multilayer ceramic electronic component of the present invention. [Figure 2] 1 is a perspective view schematically illustrating an example of a multilayer ceramic capacitor, which is an example of a multilayer ceramic electronic component of the present invention. [Figure 3A] 1 is a cross-sectional view schematically showing an example of a WT cross section of a multilayer ceramic capacitor. [Figure 3B] 1 is a cross-sectional view schematically showing an example of an LT cross section of a multilayer ceramic capacitor. [Figure 4] This is a SIM observation image of the FIB processed surface of a multilayer ceramic capacitor. [Figure 5] This is an image obtained by image processing of a SIM observation image. [Figure 6] 1 is a graph schematically showing a method for determining the cross-sectional area of ​​a metal particle when the cross-sectional areas of the metal particle are accumulated to reach 50% of the total area. [Figure 7] This is an SEM image of a multilayer ceramic capacitor. [Figure 8] This is an image obtained by image processing of an SEM observation image. [Figure 9] FIG. 1 is a diagram showing the relationship between the aspect ratio of metal particles and the thickness of internal electrode layers for multilayer ceramic capacitors manufactured in Examples and Comparative Examples. [Figure 10] 1 is a diagram showing the relationship between the volume of the laminate and the thickness of the internal electrode layer for the multilayer ceramic capacitors manufactured in Examples 3 to 5 and 10. FIG. [Figure 11]10 is a SIM observation image of the FIB processed surface of the multilayer ceramic capacitor produced in Comparative Example 2. DETAILED DESCRIPTION OF THE INVENTION

[0016] Hereinafter, a multilayer ceramic electronic component and a method for manufacturing a multilayer ceramic electronic component according to the present invention will be described with reference to the drawings. However, the present invention is not limited to the following configurations, and can be appropriately modified and applied within the scope of the present invention. Note that a combination of two or more of the individual desirable configurations of the present invention described below also constitutes the present invention. Hereinafter, the laminated ceramic electronic component and the method for manufacturing the laminated ceramic electronic component of the present invention will be described, taking a laminated ceramic capacitor as an example of the laminated ceramic electronic component.

[0017] A multilayer ceramic capacitor comprises a laminate and a plurality of external electrodes provided on parts of the surface of the laminate. Fig. 1 is a perspective view schematically showing an example of a laminate constituting a multilayer ceramic capacitor, which is an example of a multilayer ceramic electronic component of the present invention, and Fig. 2 is a perspective view schematically showing an example of a multilayer ceramic capacitor, which is an example of a multilayer ceramic electronic component of the present invention. The multilayer ceramic capacitor 1 shown in Fig. 2 is formed by providing external electrodes 110 and 120 on parts of the surface of the laminate 10 shown in Fig. 1.

[0018] In the multilayer ceramic capacitor and laminate, the length direction, width direction, and lamination direction are defined by the double-headed arrows L, W, and T in the laminate 10 shown in FIG. 1 and the multilayer ceramic capacitor 1 shown in FIG. 2, respectively. Here, the length direction, width direction, and lamination direction are perpendicular to each other. The lamination direction is the direction in which the multiple dielectric layers 20 and multiple internal electrode layers 30 that make up the laminate 10 are stacked.

[0019] The laminate 10 is a roughly rectangular parallelepiped with six sides, and has a first main surface 11 and a second main surface 12 that face each other in the stacking direction, a first side surface 13 and a second side surface 14 that face each other in the width direction, and a first end surface 15 and a second end surface 16 that face each other in the length direction. The roughly rectangular parallelepiped shape of the laminate includes shapes in which the corners and ridges of the rectangular parallelepiped are rounded, and also includes shapes in which irregularities are formed on the surface.

[0020] 2, an external electrode 110 is provided on a first end face 15 of the laminate 10, and an external electrode 120 is provided on a second end face 16 of the laminate 10. The portions where the external electrodes are provided are portions where the internal electrode layers are drawn out from the end faces of the laminate.

[0021] The dielectric layer is an insulating layer containing ceramic. Examples of the dielectric material constituting the dielectric layer include dielectric ceramics containing a main component such as barium titanate, calcium titanate, strontium titanate, barium calcium titanate, or calcium zirconate. Subcomponents such as Mg compounds, Mn compounds, Si compounds, Al compounds, V compounds, and Ni compounds may also be added to these main components in smaller amounts than the main component.

[0022] The average thickness of the dielectric layers sandwiched between the internal electrode layers is preferably 0.2 μm or more and 2 μm or less. The dielectric layer includes an outer layer portion and an inner layer portion. The outer layer portions are located on both main surfaces of the laminate, and are dielectric layers located between the main surfaces and the internal electrodes closest to the main surfaces. The region sandwiched between the outer layer portions is the inner layer portion. The thickness of each outer layer portion is preferably 5 μm or more and 200 μm or less.

[0023] The external electrode provided on the first end face of the laminate further extends from the first end face to the first side face, the second side face, the first main face, and the second main face, and the external electrode disposed on the second end face of the laminate further extends from the second end face to the first side face, the second side face, the first main face, and the second main face. The external electrodes preferably include a base electrode layer and a plating layer disposed on the base electrode layer, and the base electrode layer preferably includes at least one layer selected from the group consisting of a baked electrode layer, a resin electrode layer, a thin film layer, etc.

[0024] The baked electrode layer includes glass and metal. Examples of the glass that can be used include BaO-SrO-B2O3-SiO2-based glass frit. The metal preferably includes at least one metal selected from the group consisting of Cu, Ni, Ag, Pd, Ag-Pd alloys, and Au. The baked electrode layer may also include multiple layers. The thickness (thickest part) of the baked electrode layer is preferably 5 μm or more and 150 μm or less. The resin electrode layer may contain conductive particles and a thermosetting resin. When forming a resin electrode layer, it may be formed directly on the laminate without forming a baked electrode layer. Furthermore, multiple resin electrode layers may be provided. The thin film layer is formed by a thin film forming method such as sputtering or vapor deposition, and is a layer of deposited metal particles with a thickness of 1 μm or less.

[0025] The plating layer is preferably a layer containing at least one metal selected from the group consisting of Cu, Ni, Ag, Pd, an Ag-Pd alloy, Au, Sn, and the like. The plating layer may be formed of multiple layers. Preferably, it has a two-layer structure of a Ni plating layer and a Sn plating layer. The Ni plating layer can prevent the base electrode layer from being eroded by solder when mounting the multilayer ceramic capacitor. The Sn plating layer can improve the wettability of the solder when mounting the multilayer ceramic capacitor, making mounting easier. The average thickness of the Ni plating layer is preferably 1 μm or more and 15 μm or less, and the average thickness of the Sn plating layer is preferably 1 μm or more and 15 μm or less.

[0026] The plurality of internal electrode layers include a first internal electrode layer and a second internal electrode layer. The internal electrode layers contain metal particles made of metals such as Ni, Cu, Ag, Pd, and Au, or alloys such as Ag-Pd alloy, Ni-Sn alloy, and Ni alloy. The internal electrode layers may further contain dielectric particles of the same composition as the dielectric ceramic contained in the dielectric layers. The number of stacked internal electrode layers is preferably 3 or more and 2000 or less.

[0027] In the multilayer ceramic electronic component of the present invention, the aspect ratio of the metal grains constituting the internal electrode layers is 1.8 or more. The method for measuring and the definition of the aspect ratio of the metal grains will be described below. The aspect ratio of the metal particles is calculated by the following formula (2).

number

[0028] Fig. 3A is a cross-sectional view schematically showing an example of a WT cross-section of a multilayer ceramic capacitor, and Fig. 3B is a cross-sectional view schematically showing an example of an LT cross-section of the multilayer ceramic capacitor. The LT cross-section of the multilayer ceramic capacitor shown in Fig. 3B corresponds to the cross-sectional view of the multilayer ceramic capacitor 1 taken along line AA shown in Fig. 2, and is a cross-section cutting the first end face, second end face, first main surface, and second main surface of the multilayer ceramic capacitor. FIG. 3A shows a first internal electrode layer 35 and a second internal electrode layer 36 as the internal electrode layers. 3B shows a first internal electrode layer 35 and a second internal electrode layer 36 as internal electrode layers. The first internal electrode layer 35 includes a first opposing electrode portion that faces the second internal electrode layer 36, and a first extraction electrode portion that is extracted from the first opposing electrode portion to the first end face 15 of the laminate 10 and is connected to the external electrode 110. The second internal electrode layer 36 has a second opposing electrode portion that faces the first internal electrode layer 35, and a second extraction electrode portion that is extracted from the second opposing electrode portion to the second end face 16 of the laminate 10 and connected to the external electrode 120. 3B also shows the baked electrode layer 60, Ni plating layer 61, and Sn plating layer 62 as components of the external electrodes 110 and 120. As shown in FIG.

[0029] The cross-sectional area of ​​a metal particle when the cross-sectional areas are accumulated from the smallest to reach 50% of the total cross-sectional area, which is necessary to measure the aspect ratio of a metal particle, is measured as follows. First, the laminate or the multilayer ceramic capacitor is polished so that its WT cross section is exposed, thereby exposing the internal electrode layers as shown in FIG. 3A. Furthermore, FIB (focused ion beam) processing is performed at a 45° angle on the surface where the internal electrode layer is exposed on the WT cross section. Then, observation is performed with a SIM (scanning ion microscope) at a 90° angle to the FIB-processed surface. SIM observation makes it possible to visualize the single crystal regions of the metal grains. 4 is a SIM observation image of the FIB-processed surface of a multilayer ceramic capacitor. This image is also a SIM observation image of the FIB-processed surface of a multilayer ceramic capacitor produced in Example 1, which will be described later. In this image, the uniformly black (gray) portion is the dielectric layer, and the light gray to black band portion is the internal electrode layer. In the SIM observation image, the metal grains that make up the internal electrode layer appear to be different colors due to the metal grains being polycrystalline and having different crystal orientations.

[0030] The SIM observation image obtained in this way is then subjected to image processing, and lines are drawn at the boundaries of the metal particles. Figure 5 shows an image obtained by image processing of the SIM observation image. The image processing to draw lines at the boundaries of the metal particles can be performed manually by the observer. In this image, each area separated by a line represents the cross-sectional area of ​​each metal particle, so the area of ​​each area is measured. Area measurement can be performed using image processing software (for example, WinROOF manufactured by Mitani Shoji Co., Ltd.). The cross-sectional areas are then accumulated from the smallest to find the cross-sectional area of ​​the metal particle when it reaches 50% of the total area. Figure 6 is a graph that shows a schematic diagram of how to find the cross-sectional area of ​​the metal particle when it reaches 50% of the total area by accumulating the cross-sectional areas of the metal particle. The point indicated by the arrow in Figure 6 is the point where the cross-sectional areas of the metal particle reach 50% of the total area by accumulating, and the cross-sectional area of ​​the metal particle at that point is approximately 0.19 μm 2 is.

[0031] Next, the "average thickness value of the internal electrode layer" necessary for measuring the aspect ratio of the metal grains is measured as follows. First, the laminate or multilayer ceramic capacitor is embedded in a polishing resin and polished (preferably by rough grinding with abrasive grains of about #1000 and mirror finishing with fine colloidal silica grains) so that its WT cross section is exposed, exposing the internal electrode layers as shown in FIG. 3A. These internal electrode layers were observed using a SEM (scanning electron microscope). Figure 7 shows an SEM image of a multilayer ceramic capacitor. In this image, the dark gray areas are the dielectric layers, and the light gray bands are the internal electrode layers.

[0032] The SEM observation image obtained in this way is subjected to image processing, and lines are drawn at the boundaries of the internal electrode layers. Figure 8 shows an image obtained by image processing of the SEM observation image. Image processing to draw lines at the boundaries of the internal electrode layers can be performed manually by the observer. The average thickness of the area separated by the lines in this image can be determined as the “average thickness of the internal electrode layer.” Measurement of the average thickness can be performed using image processing software (for example, WinROOF manufactured by Mitani Shoji Co., Ltd.).

[0033] Then, in the above formula (2), "the average thickness (μm) of the internal electrode layer" and "the cross-sectional area (μm) of the metal grain when the cross-sectional area reaches 50% of the total cross-sectional area by accumulating the cross-sectional area from the smallest one" are added. 2 )" to obtain the aspect ratio of the metal grain. This value corresponds to the "area / thickness x thickness" of the metal particle, and can be read as "area / thickness x thickness" = (length x thickness / thickness x thickness) = length / thickness, so it represents the ratio of the length to the thickness of the metal particle. An aspect ratio of 1.8 or more for metal particles means that the metal particles are thin and long, i.e., flat. The aspect ratio of the metal particles is preferably 1.9 or more, and more preferably 2.3 or more. The aspect ratio of the metal particles is preferably 30 or less.

[0034] The aspect ratio of the metal grains is measured from the WT cross section of the multilayer ceramic electronic component, so the aspect ratio can also be said to be the ratio of the length in the W direction of the metal grain to the length in the T direction. Incidentally, when the aspect ratio of a metal particle is similarly measured on the LT cross section, it can also be said that the aspect ratio is the ratio of the metal particle's length in the L direction to its length in the T direction, and it is preferable that this aspect ratio is also 1.8 or more. If the aspect ratio measured on the LT cross section and the aspect ratio measured on the WT cross section are both 1.8 or more, the metal grains can be said to have a three-dimensionally flat (or plate-like) shape.

[0035] In the multilayer ceramic electronic component of the present invention, by setting the aspect ratio of the metal grains constituting the internal electrode layers to 1.8 or more, the occurrence of electrode discontinuities can be prevented and the internal electrode layers can be made thin, but the thickness of the internal electrode layers is preferably 0.15 μm or more and 0.80 μm or less, and more preferably 0.20 μm or more and 0.50 μm or less.

[0036] Furthermore, coverage is an index that indicates the degree of electrode discontinuity in a multilayer ceramic electronic component. Coverage is an index that indicates the ratio of the area where the internal electrode layers are actually present to the area where the internal electrode layers should be formed. A higher coverage index indicates less electrode discontinuity. Therefore, a high coverage is preferable. In the multilayer ceramic electronic component of the present invention, the coverage is preferably 80% or more, more preferably 84% or more, and even more preferably 88% or more. The coverage can be calculated from the length of the part where the internal electrode layers are connected in the direction parallel to the W direction and the length of the part where the internal electrode layers are disconnected in the SEM observation image used in the measurement of the above "average thickness value (μm) of the internal electrode layers" by the following formula (3).

number

[0037] The laminate that constitutes the multilayer ceramic electronic component can have a thin internal electrode layer while maintaining high coverage. Specifically, the thickness of the internal electrode layer can be made 0.80 μm or less with a coverage of 80% or more. Therefore, the overall thickness of the laminate can be thinned while maintaining a coverage of 80% or more. The preferred thickness of the internal electrode layer varies depending on the number of green sheets (internal electrode layers) stacked in the laminate, but is preferably 0.35 μm or less when the number of stacked sheets is 270, and is preferably 0.47 μm or less when the number of stacked sheets is 540.

[0038] The laminate also includes a side portion (W gap) of the laminate located between the first and second opposing electrode portions and the side surface, and an end portion (L gap) of the laminate located between the first and second opposing electrode portions and the end surface and including the lead-out electrode portions of the first and second internal electrodes. The average length of the L gap in the L direction is preferably 20 μm or more and 120 μm or less, and the average length of the W gap in the W direction is preferably 5 μm or more and 100 μm or less.

[0039] In the multilayer ceramic electronic component of the present invention, the thickness T (μm) of the internal electrode layer and the volume V (mm 3 ) preferably satisfies the following relational expression (1). T≦0.0552×lnV+0.5239 (1) When this relational expression is satisfied, it means that a multilayer ceramic electronic component is obtained in which the thickness of the internal electrode layers is small relative to the volume of the laminate. Furthermore, it is also preferable that the thickness T of the internal electrode layer and the volume V of the laminate satisfy the following relational expression (4), and it is more preferable that the following relational expression (5) be satisfied. 0.0552×lnV+0.3336≦T (4) 0.0552×lnV+0.3856≦T (5)

[0040] 2 is a two-terminal capacitor in which external electrodes are provided on both end surfaces of the laminate, but the multilayer ceramic capacitor is not limited to a two-terminal capacitor and may be any multilayer ceramic capacitor including a laminate having a plurality of dielectric layers and a plurality of internal electrode layers. For example, it may be a three-terminal capacitor in which external electrodes are provided on the end surfaces and side surfaces of the laminate, or a capacitor in which external electrodes are provided only on the side surfaces of the laminate.

[0041] Next, an example of a method for manufacturing a multilayer ceramic electronic component of the present invention will be described, taking as an example a case where a multilayer ceramic capacitor is manufactured as the multilayer ceramic electronic component. A ceramic slurry, which is a mixture of ceramic that will become the dielectric layer, organic matter, and a solvent, is applied to a carrier film such as a PET film in the form of a sheet by a method such as spray coating, die coating, or screen printing, to obtain a ceramic green sheet. Next, a conductive paste for forming internal electrode layers is prepared, which is composed of metal particles such as Ni powder, a solvent, a dispersant, a binder, etc. The conductive paste for forming internal electrode layers is printed on the ceramic green sheets by a method such as screen printing or gravure printing to form an internal electrode pattern. In this way, a green sheet on which an internal electrode pattern is formed is prepared. A laminated sheet is obtained by stacking multiple ceramic green sheets on which internal electrode patterns have been formed. The laminated sheet is then pressed using a rigid press or a hydrostatic press to form a laminated block (lamination process). The laminated block is then cut or diced to obtain multiple chips (cutting process).

[0042] The chips are then subjected to a degreasing process. In the degreasing process, for example, a treatment is performed at a maximum temperature of 300° C. or less. Tar is removed by the degreasing process. The degreasing process is preferably performed in a nitrogen atmosphere.

[0043] Next, the chips that have been through the degreasing process are subjected to a heat treatment process in which the chips are passed through a furnace whose temperature is set to 1200°C to 1600°C for a residence time of 30 seconds or less. Furthermore, after cooling, a firing step (main firing step) is performed. In the firing step, the chip that has undergone the heat treatment step is heated from 900°C to the maximum temperature at a temperature increase rate of 5°C / min or more, preferably 10°C / min or more, to perform main firing. The temperature increase rate is preferably 50°C / min or more. This allows the internal electrodes or dielectric layers to be fired, respectively. The residence time is preferably 30 seconds or less, but may be 30 minutes. The maximum temperature is preferably 1150°C or more and 1300°C or less. The retention time at the maximum temperature is preferably 50 seconds or more and 200 seconds or less. It is also preferable to carry out the firing in a reducing atmosphere consisting of H2-N2-H2O gas.

[0044] According to the above method, internal electrode layers containing metal grains with an aspect ratio of 1.8 or more are formed, and a laminate is obtained. Next, a conductive paste that will become the external electrodes is applied to the laminate by, for example, a dipping method. The laminate with the conductive paste applied is fired, and the conductive paste becomes a baked electrode layer that is part of the external electrode. A plating layer is formed on the baked electrode layer by a plating process. Through these steps, a multilayer ceramic capacitor can be manufactured. [Example]

[0045] EXAMPLES Hereinafter, examples will be given that more specifically disclose the multilayer ceramic electronic component of the present invention, but the present invention is not limited to these examples. [Fabrication of multilayer ceramic capacitors] Example 1 A ceramic slurry was prepared by adding a polyvinyl butyral binder, a plasticizer, and ethanol as an organic solvent to BaTiO3 as the ceramic raw material and wet-mixing them in a ball mill. This ceramic slurry was then formed into a sheet using the lip method to obtain rectangular ceramic green sheets. Next, a Ni-containing conductive paste was screen-printed onto the ceramic green sheets to form an internal electrode pattern primarily composed of Ni. The conductive paste was applied to a thickness of 0.20 μm. The thickness of the ceramic green sheets was adjusted so that the dielectric layer of the finished product would be 0.59 μm thick.

[0046] A mother block was obtained by stacking multiple ceramic green sheets with internal electrode patterns while shifting them in the width direction, and then stacking ceramic green sheets without internal electrode patterns on the top and bottom of each. The mother block was then pressed in the stacking direction using an isostatic press. The number of layers was 270.

[0047] The pressed mother block was cut into chip shapes to obtain green chips in which the individual internal electrodes were exposed on both end faces and both side faces.

[0048] A green sheet for a ceramic protective layer was attached to one cut side of the green chip to form a raw ceramic protective layer. The composition of the green sheet for a ceramic protective layer was the same as that of the ceramic green sheet.

[0049] A green ceramic protective layer was formed on the other cut side of the green chip in the same manner as above, thereby obtaining a green component body.

[0050] After the firing step, external electrodes were formed by applying and baking a conductive paste to produce the multilayer ceramic capacitor of Example 1. The obtained multilayer ceramic capacitor was 0603 size (0.6 mm x 0.3 mm).

[0051] Examples 2 to 8 As shown in Tables 1 and 2, the conditions were changed from those in Example 1, but the same procedures as in Example 1 were carried out to fabricate a multilayer ceramic capacitor.

[0052] (Comparative Example 1) The thickness of the conductive paste applied was changed to 0.30 μm, the heat treatment step was changed to a degreasing step at 800° C., and the firing step was carried out in the same manner as in Example 1 to produce a multilayer ceramic capacitor.

[0053] (Comparative Example 2) A multilayer ceramic capacitor was fabricated in the same manner as in Example 1, except that the heat treatment step was not carried out.

[0054] Using the methods described herein, the coverage of the laminate, the thickness of the internal electrode layer, and the aspect ratio of the metal particles were calculated. The dimensions and volume of the laminate were also measured. These results are summarized in Tables 1 and 2 below. [Table 1] [Table 2]

[0055] Tables 1 and 2 show that in the multilayer ceramic capacitors of each example in which the aspect ratio of the metal particles is 1.8 or more, the coverage is high at 79% or more, and the thickness of the internal electrode layer and the thickness of the laminate can be reduced. In Comparative Example 1, the aspect ratio of the metal particles is 1.7. By increasing the thickness of the conductive paste applied, the coverage was increased to 85%, but the thickness of the internal electrode layer and the thickness of the laminate were also increased. In Comparative Example 2, the aspect ratio of the metal particles is 1.6, the coverage is low at 70%, and the thickness of the internal electrode layer is also thick.

[0056] Example 9 In Example 9, a 1005 size (1.0 mm × 0.5 mm) multilayer ceramic capacitor was fabricated. The manufacturing process was almost the same as in Example 1, but some conditions were changed: the conductive paste was applied to a thickness of 0.25 μm, and the number of layers was 540.

[0057] Example 10 A multilayer ceramic capacitor was fabricated in the same manner as in Example 9.

[0058] (Comparative Example 3) The thickness of the conductive paste applied was changed to 0.32 μm, the number of layers was changed to 492, the heat treatment process was changed to a degreasing process at 850° C., and the firing process was carried out in the same manner as in Example 9. A multilayer ceramic capacitor was fabricated.

[0059] Comparative Example 4 The heat treatment step was changed to a degreasing step at 850° C., and the firing step was carried out in the same manner as in Example 9 to produce a multilayer ceramic capacitor.

[0060] Using the methods described herein, the coverage of the laminate, the thickness of the internal electrode layer, and the aspect ratio of the metal particles were calculated. The dimensions and volume of the laminate were also measured. These results are summarized in Tables 3 and 4 below. [Table 3] [Table 4]

[0061] Tables 3 and 4 show that the multilayer ceramic capacitors of Examples 9 and 10, in which the aspect ratio of the metal particles is 1.8 or more, both have a high coverage of 80% or more, and the thickness of the internal electrode layer and the thickness of the laminate can be reduced. In Comparative Example 3, the aspect ratio of the metal particles is 1.6. By increasing the thickness of the conductive paste coating, the coverage was increased to over 80%, but the thickness of the internal electrode layer was also increased. The thickness of the laminate was similar to that of Examples 9 and 10 because the number of laminated layers was reduced to create a 1005 size multilayer ceramic capacitor. It is believed that the capacitance was reduced because the number of laminated layers was small. In Comparative Example 4, the aspect ratio of the metal particles is 1.6, the coverage is low at 71%, and the thickness of the internal electrode layer is also thick.

[0062] 9 is a graph showing the relationship between the aspect ratio of the metal particles and the thickness of the internal electrode layers for the multilayer ceramic capacitors manufactured in the examples and comparative examples. Examples 4 and 5, which have large aspect ratios of the metal particles, are excluded from the plot. This figure shows that when comparing multilayer ceramic capacitors of the same size, the thickness of the internal electrode layers becomes thinner when the aspect ratio of the metal grains is 1.8 or greater.

[0063] FIG. 10 is a diagram showing the relationship between the volume of the laminate and the thickness of the internal electrode layer for the multilayer ceramic capacitors manufactured in Examples 3 to 5 and 10. From Examples 3 and 10, the volume V (mm 3 A formula for a preferred range for the thickness T (μm) of the internal electrode layer is derived. This formula is the following relational formula (1) described in the specification. T≦0.0552×lnV+0.5239 (1) This formula (1) indicates the upper limit of a preferable range of the thickness T of the internal electrode layer relative to the volume V of the laminate. On the other hand, if a line with the same slope as equation (1) is drawn through the plot of Example 5, the following relational equation (5) is obtained. 0.0552×lnV+0.3856≦T (5) This formula (5) indicates the lower limit of a preferable range of the thickness T of the internal electrode layer relative to the volume V of the laminate. The plots corresponding to the respective examples are located in the area between the lines of formula (1) and formula (5).

[0064] FIG. 11 is a SIM observation image of the FIB processed surface of the multilayer ceramic capacitor produced in Comparative Example 2. On the other hand, FIG. 4 shown above is a SIM observation image of the FIB processed surface of the multilayer ceramic capacitor produced in Example 1. Comparing these two images, it can be seen that the thickness of the internal electrode layers is thin in the multilayer ceramic capacitor fabricated in Example 1. The thin thickness of the internal electrode layers is related to the large aspect ratio of the metal grains. [Explanation of symbols]

[0065] 1. Multilayer ceramic capacitors 10 Laminate 11 first main surface 12 Second main surface 13 First Aspect 14 The Second Aspect 15 First end face 16 Second end face 20 dielectric layer 30 Internal electrode layer 35 First internal electrode layer 36 Second internal electrode layer 60 Baked electrode layer 61 Ni plating layer 62 Sn plating layer 110, 120 external electrode

Claims

1. A method for manufacturing a multilayer ceramic electronic component including a laminate having a plurality of ceramic-containing insulator layers and a plurality of internal electrode layers, comprising: a heat treatment step of passing the chips of the laminate through a furnace whose temperature is set to 1200°C to 1600°C for a residence time of 30 seconds or less; a firing step in which the chip that has undergone the heat treatment step is cooled and then heat-treated at a maximum temperature of 1150°C or higher and 1300°C or lower; A method for manufacturing a multilayer ceramic electronic component, comprising at least the steps of:

2. 2. The method for producing a multilayer ceramic electronic component according to claim 1, wherein in the main firing step, the rate of temperature rise from 900° C. to the maximum temperature is 5° C. / min or more.

3. 2. The method for producing a multilayer ceramic electronic component according to claim 1, wherein the chips are retained in the furnace for 30 minutes or less in the main firing step.

4. 2. The method for producing a multilayer ceramic electronic component according to claim 1, wherein in the main firing step, the holding time at the maximum temperature is 200 seconds or less.

5. 5. The method for producing a multilayer ceramic electronic component according to claim 1, further comprising a degreasing step performed at a maximum temperature of 300° C. or less before the heat treatment step.

6. a lamination step of laminating a plurality of ceramic green sheets for the insulator layers, on which the internal electrode patterns for forming the internal electrode layers are formed, to prepare a laminated block; a cutting step of cutting the laminated block to obtain a plurality of chips of the laminate; The method for producing a multilayer ceramic electronic component according to any one of claims 1 to 4, further comprising:

7. the aspect ratio of the metal grains constituting the internal electrode layers is 1.8 or more and 30 or less, The metal grains refer to each region of the internal electrode layer separated by a line when observing with an SIM at an angle of 90° with respect to an FIB-processed surface that has been subjected to FIB processing at an angle of 45° with respect to a surface on which the internal electrode layer is exposed in a cross section of the laminate. The method for manufacturing a multilayer ceramic electronic component according to claim 1 .

8. The thickness T (μm) of the internal electrode layer and the volume V (mm ３ 8. The method for producing a multilayer ceramic electronic component according to claim 1, wherein the following relational expression (1) is satisfied: T≦0.0552×lnV+0.5239 (1)

9. 8. The method for producing a multilayer ceramic electronic component according to claim 1, wherein the internal electrode layers contain at least one element selected from the group consisting of Ni, Cu, Ag, Pd, and Au.

10. 10. The method for producing a multilayer ceramic electronic component according to claim 9, wherein the main component of the internal electrode layers is Ni.

11. 8. The method for producing a multilayer ceramic electronic component according to claim 1, wherein the main component of the insulator layers is any one of barium titanate, calcium titanate, strontium titanate, barium calcium titanate, and calcium zirconate.

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