Method of manufacturing printed wiring board

Applying pressure via a gas to the resist layer on the seed layer during direct exposure addresses void issues, enabling precise plating resist formation in printed wiring boards, particularly for larger substrates.

JP2025136824APending Publication Date: 2025-09-19IBIDEN CO LTD
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Patent Information

Application Number
JP2024035699
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-03-08
Publication Date
2025-09-19

AI Technical Summary

Technical Problem

Existing methods for roughening seed layers in printed wiring boards can lead to excessive removal or depressions, causing resist penetration and voids between layers, which hinder direct exposure and precise plating resist formation, especially for substrates exceeding 50 mm.

Method used

Applying pressure via a gas to the resist layer on the seed layer during direct exposure to form a plating resist, eliminating voids and ensuring precise alignment without using etching, thereby enabling accurate direct exposure.

Benefits of technology

This method reduces voids between layers, allowing for precise direct exposure and formation of plating resists with dimensions close to design values, enhancing manufacturing precision.

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Abstract

To provide a method of manufacturing a printed wiring board that can employ direct exposure to expose a resist layer.SOLUTION: A method of manufacturing a printed wiring board includes: preparing an insulation layer; forming a seed layer on the insulation layer; forming a resist layer on the seed layer; applying pressure to the resist layer on the seed layer via gas; and directly exposing the resist layer applied with the pressure to form a plating resist having an aperture. As an ideal embodiment, the method includes heating the resist layer while applying the pressure to the resist layer via the gas. As an ideal embodiment, the method includes making the surface of the seed layer rough.SELECTED DRAWING: Figure 1E
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Description

[Technical Field]

[0001] The present invention relates to a method for producing a printed wiring board, which includes a step of subjecting a resist layer to direct exposure (hereinafter also referred to as DI exposure). [Background technology]

[0002] Conventionally, a plating resist having openings is formed by forming a seed layer on the surface of an insulating layer, forming a resist layer on the seed layer, and then irradiating and exposing the resist layer to UV light through a mask (for example, Patent Document 1). In the technology disclosed in Patent Document 1, the surface of the seed layer is roughened to prevent voids from being trapped between the resist layer and the seed layer, thereby reducing the voids between the resist layer and the seed layer. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2021-129048 Summary of the Invention [Problem to be solved by the invention]

[0004] The technology disclosed in Patent Document 1 discloses etching as an example of a method for roughening the surface of a seed layer. When etching is used to roughen the surface of a seed layer, excessive removal of the seed layer can occur, potentially resulting in partial loss of the seed layer or large depressions in the seed layer. When a lost or depressed portion is formed in the seed layer, the resist constituting the resist layer is likely to penetrate into the lost or depressed portion. In this case, the resist in the lost or depressed portion may not be removed by development after exposure. Furthermore, when the side of a substrate exceeds, for example, 50 mm, numerous voids may remain between the resist layer and the seed layer even if the surface of the seed layer is roughened. As a result, direct exposure cannot be used in some cases to expose the resist layer to form a plating resist with openings. [Means for solving the problem]

[0005] The method for manufacturing a printed wiring board according to the present invention includes preparing an insulating layer, forming a seed layer on the insulating layer, forming a resist layer on the seed layer, applying pressure to the resist layer on the seed layer via a gas, and performing direct exposure on the resist layer to which the pressure has been applied to form a plating resist having an opening. [Brief explanation of the drawings]

[0006] [Figure 1A] 1 is a diagram showing one step of an embodiment of a method for manufacturing a printed wiring board according to the present invention. [Figure 1B] 1 is a diagram showing one step of an embodiment of a method for manufacturing a printed wiring board according to the present invention. [Figure 1C] 1 is a diagram showing one step of an embodiment of a method for manufacturing a printed wiring board according to the present invention. [Figure 1D] 1 is a diagram showing one step of an embodiment of a method for manufacturing a printed wiring board according to the present invention. [Figure 1E]1 is a diagram showing one step of an embodiment of a method for manufacturing a printed wiring board according to the present invention. [Figure 1F] 1 is a diagram showing one step of an embodiment of a method for manufacturing a printed wiring board according to the present invention. [Figure 2] 1A to 1C are diagrams for explaining an embodiment of direct exposure used in a method for manufacturing a printed wiring board according to the present invention. [Figure 3] FIG. 10 is a diagram for explaining a problem in direct exposure. DETAILED DESCRIPTION OF THE INVENTION

[0007] <Regarding the manufacturing method of the printed wiring board according to the present invention> An embodiment of a method for manufacturing a printed wiring board according to the present invention will be described with reference to the drawings. In the example shown in Figures 1A to 1F, the dimensions of each component, particularly the height dimension, are shown as dimensions different from the actual dimensions in order to better understand the features of the embodiment of the present invention.

[0008] 1A to 1F are diagrams each showing a step in one embodiment of a method for manufacturing a printed wiring board according to the present invention. Hereinafter, one embodiment of the method for manufacturing a printed wiring board according to the present invention will be described in accordance with the steps shown in FIGS. 1A to 1F.

[0009] First, as shown in FIG. 1A, an insulating layer 1 is prepared. The insulating layer 1 can be a resin insulating layer formed on a core substrate or the like (not shown). Next, as shown in FIG. 1B, a seed layer 2 is formed on the insulating layer 1. As an example, the seed layer 2 can be formed by copper sputtering. Next, as shown in FIG. 1C, a resist layer 3 is formed on the seed layer 2. A dry film resist (DFR) or the like can be used as the resist layer 3. The resist layer 3 can be formed by laminating films or by applying a resin.

[0010] Next, as shown in FIG. 1D , pressure is applied to the resist layer 3 on the seed layer 2 via a gas 100. The pressure is applied to the resist layer 3 via a pressurized gas. The process of applying pressure via the gas 100 is performed, for example, by placing the entire insulating layer 1, seed layer 2, and resist layer 3 inside an openable pressurizing device that hermetically stores pressurized gas therein, using the pressurizing device. The pressurizing device is not depicted here. A substrate is placed inside the pressurizing device. The substrate includes the seed layer 2 and the resist layer 3 on the seed layer 2. The substrate may further have a protective film on the resist layer 3. The gas 100 is introduced into the pressurizing device. Pressure is applied to the resist layer 3 via the gas 100. If a protective film is present on the resist layer 3, pressure is applied to the resist layer 3 via the protective film and the gas 100. Note that in this embodiment, only pressurization via the gas 100 is performed, and pressurization via the gas 100 and vacuum pressurization are not used in combination.

[0011] Next, the entire insulating layer 1, seed layer 2, and resist layer 3 are removed from the pressure device, and as shown in FIG. 1E, direct exposure 4 is performed on the resist layer 3 to which pressure (in a preferred embodiment, pressure and heat) has been applied, forming a plating resist 6 having openings 5, as shown in FIG. 1E. To form the plating resist 6, an embodiment includes developing the resist layer 3 after exposure. Thereafter, a conductor circuit is formed on the insulating layer 1 using a semi-additive method.

[0012] According to the method for manufacturing a printed wiring board according to the embodiment of the present invention described above, as shown in FIG. 1D, pressure is applied via gas to the entire insulating layer 1, seed layer 2, and resist layer 3 using a pressure device, making it difficult for voids to remain between the seed layer 2 and the resist layer 3. As a result, the embodiment can manufacture a printed wiring board using direct exposure 4. By using direct exposure 4, the embodiment can form a plating resist 6 having dimensions close to the design values ​​with high precision.

[0013] In a preferred embodiment, heat can be applied to the resist layer 3 simultaneously with applying pressure to the resist layer 3 via the gas 100. Heat is applied to the resist layer 3 via pressurized gas. For example, a heater is installed in the pressurizing device, and the heater heats the gas in the pressurizing device. Furthermore, in a preferred embodiment, the surface of the seed layer 2 can be roughened. In conventional technology, roughening the surface of the seed layer 2 generates voids between the seed layer 2 and the resist layer 3. However, according to an embodiment of the present invention in which pressure is applied to the resist layer 3 via the gas 100, voids are less likely to remain between the seed layer 2 and the resist layer 3 due to the pressurizing process, making it possible to perform direct exposure.

[0014] <Direct exposure used in the method for manufacturing a printed wiring board according to the present invention> Direct exposure is a type of exposure method used to form a plating resist made of a photosensitive resin having a desired pattern. Direct exposure involves irradiating the photosensitive resin directly with light without using a mask. The direct exposure method targeted in the embodiments of the present invention is a method similar to the direct exposure methods disclosed in Japanese Patent Application Laid-Open Nos. 2006-301591 and 2010-122526.

[0015] Fig. 2 is a diagram illustrating one embodiment of direct exposure used in the method for manufacturing a printed wiring board according to the present invention. In the embodiment shown in Fig. 2, reference numeral 11 denotes a DI exposure machine, and for example, in DI exposure, the depth of focus is ±5 µm or less. Processing by DI exposure 4 can be performed by repeating the following steps (1) to (3). (1) By irradiating light from a height measurement mechanism attached to the DI exposure machine 11, the position (A) of the top surface of the resist layer 3 or the position (B) of the boundary between the seed layer 2 and the resist layer 3 is measured. (2) Based on the measured position result, the focus of the exposure light emitted from the DI exposure device 11 is corrected. (3) Based on the correction, exposure light is irradiated onto the resist layer 3 from the DI exposure device 11 for a predetermined distance (C). When a protective film is formed on the upper surface of the resist layer 3, the measurement in (1) includes the upper surface of the protective film or the boundary between the protective film and the upper surface of the resist layer 3.

[0016] For reference, the problems with direct exposure will be explained below. Fig. 3 is a diagram for explaining the problems with direct exposure. According to the method for manufacturing a printed wiring board according to an embodiment of the present invention, the problems explained in Fig. 3 can be solved.

[0017] In the example shown in FIG. 3, a void 12 (air bubble) exists between the seed layer 2 and the resist layer 3. In this case, the resist layer 3 and the void 12 are made of different materials, so light is refracted at the interface between the resist layer 3 and the void 12. Therefore, the influence of the void 12 prevents accurate measurement of the position of the boundary between the seed layer 2 and the resist layer 3. As a result, the focus shifts, and the design value and the actual value do not match. The design value refers to the width of the plating resist 6 and the width of the space between adjacent plating resists 6.

[0018] 3, the upper surface of the resist layer 3 bulges due to the void 12. Therefore, the height of the resist layer 3 located directly above the seed layer 2 differs from the height of the resist layer 3 located above the void 12 (because the resist layer 3 located directly above the seed layer 2 is in contact with the seed layer 2). This also causes the focus to shift, resulting in a discrepancy between the design value and the actual value. [Explanation of symbols]

[0019] 1. Insulation layer 2. Seed layer 3. Resist layer 4 Direct exposure (DI exposure) 5 aperture 6 Plating resist 11 DI exposure machine 12. Void 100 gases

Claims

1. providing an insulating layer; forming a seed layer on the insulating layer; forming a resist layer on the seed layer; applying pressure to the resist layer on the seed layer via a gas; performing direct exposure on the resist layer to which the pressure has been applied to form a plating resist having openings; A method for manufacturing a printed wiring board, comprising:

2. 2. The method for manufacturing a printed wiring board according to claim 1, and applying pressure to the resist layer via the gas while simultaneously applying heat to the resist layer.

3. 3. The method for manufacturing a printed wiring board according to claim 1 or 2, roughening the surface of the seed layer.

Citation Information

Patent Citations

  • Wiring board production method and wiring board

    JP2021129048A