Display device and image data processing method

Abstract

To provide a novel image data processing method.SOLUTION: An image data processing method includes: a first step of extending the resolution of first image data expressed in an RGB color space to generate second image data; a second step of converting the second image data into a YCrCb color space to generate third image data; a third step of generating a second Y image using CNN from a first Y image extracted from the third image data; and a fourth step of generating fourth image data expressed in the RGB color space using the third image data and the second Y image.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One aspect of the present invention relates to a display device or a method for processing image data.

[0002] Note that one aspect of the present invention is not limited to the above-mentioned technical fields. The technical fields of the inventions disclosed in this specification relate to products, methods, or manufacturing methods. Alternatively, one aspect of the present invention relates to processes, machines, manufactures, or compositions of matter.

[0003] Therefore, examples of technical fields related to one embodiment of the present invention include semiconductor devices, display devices, light-emitting devices, power storage devices, imaging devices, memory devices, signal processing devices, processors, electronic devices, systems, driving methods thereof, manufacturing methods thereof, testing methods thereof, and methods of using thereof. [Background technology]

[0004] In recent years, various developments have been made in electronic devices for XR such as VR (Virtual Reality) and AR (Augmented Reality), as well as display devices found in mobile phones such as smartphones, tablet information terminals, and notebook PCs (personal computers), such as increasing the resolution of the display unit and improving color reproducibility (for example, NTSC ratio).

[0005] In particular, in display devices used in electronic devices for XR, increasing the pixel density (resolution) and color reproducibility of the display unit makes the displayed image clearer, enhancing the sense of realism and immersion. For this reason, there is a demand for improved resolution in display devices. Patent Document 1 also discloses a display device with high resolution and resolution that is equipped with a light-emitting device including an organic electroluminescence (EL). [Prior art documents] [Patent documents]

[0006] [Patent Document 1] International Publication No. 2019 / 220278 Summary of the Invention [Problem to be solved by the invention]

[0007] In order to increase the definition of the display unit of a display device without changing its size, it is necessary to increase the resolution of the display unit (increase the number of pixels included in the display unit). To display an image on the display unit of a display device, image data must be written to each pixel included in the display unit. Therefore, as the resolution increases, the amount of image data input to the display device increases, which may increase power consumption. Furthermore, as the resolution increases, the amount of image data transmitted from outside to the display device increases. This may increase the load on the interface that inputs image data to the display device.

[0008] An object of one embodiment of the present invention is to provide a display device with reduced power consumption, a display device that is smaller and lighter, a display device with excellent drawing processing capability, a novel display device, or a novel method for processing image data.

[0009] Note that the description of these problems does not preclude the existence of other problems. Note that one embodiment of the present invention does not necessarily solve all of these problems. Note that problems other than these can be extracted from the description in the specification, drawings, claims, etc. [Means for solving the problem]

[0010] One aspect of the present invention is a method for processing image data, comprising: a first step of generating second image data by extending the resolution of first image data expressed in RGB color space; a second step of generating third image data by converting the second image data to YCrCb color space; a third step of generating a second Y image from a first Y image extracted from the third image data using CNN; and a fourth step of generating fourth image data expressed in RGB color space using the third image data and the second Y image.

[0011] Another aspect of the present invention is a display device having a plurality of pixels arranged in a matrix and a functional circuit having a function of generating image data to be supplied to the plurality of pixels, wherein the functional circuit has a first function of generating second image data by extending the resolution of first image data expressed in RGB color space, a second function of converting the second image data to YCrCb color space to generate third image data, a third function of generating a second Y image from a first Y image extracted from the third image data using CNN, and a fourth function of generating fourth image data expressed in RGB color space using the third image data and the second Y image.

[0012] The first step can be performed, for example, by the Bicubic method. The first function can be realized, for example, by the Bicubic method.

[0013] The functional circuit preferably includes at least one of a CPU or a GPU. [Effects of the Invention]

[0014] One embodiment of the present invention can provide a display device with reduced power consumption. Another embodiment of the present invention can provide a display device that is small and lightweight. Another embodiment of the present invention can provide a display device with excellent drawing processing capability. Another embodiment of the present invention can provide a novel display device. Another embodiment of the present invention can provide a novel method for processing image data.

[0015] Note that the description of these effects does not preclude the existence of other effects. Note that one embodiment of the present invention does not necessarily have all of these effects. Note that effects other than these can be extracted from the description in the specification, drawings, claims, etc. [Brief explanation of the drawings]

[0016] [Figure 1] 1A and 1B are diagrams illustrating an example of the configuration of a display device. [Figure 2] FIG. 2 is a diagram illustrating an example of the configuration of the display device. [Figure 3] 3A and 3B are diagrams illustrating an example of the configuration of a display device. [Figure 4] 4A to 4D are diagrams illustrating a configuration example of a display device. [Figure 5] 5A to 5C are diagrams illustrating a configuration example of a display device. [Figure 6] 6A to 6C are diagrams illustrating a configuration example of a display device. [Figure 7] 7A and 7B are diagrams illustrating an example of the operation of the display device. [Figure 8] 8A to 8C are perspective views of the display module. [Figure 9] 9(A) and 9(B) are diagrams illustrating an example of the configuration of a display device. [Figure 10] 10A to 10D are diagrams illustrating examples of the configuration of pixel circuits. [Figure 11] 11A to 11D are diagrams illustrating examples of the configuration of pixel circuits. [Figure 12] FIG. 12 is a diagram illustrating an example of the configuration of a pixel circuit. [Figure 13] FIG. 13 is a timing chart illustrating a method for driving the display device. [Figure 14] Fig. 14(A) is a block diagram illustrating an example of the configuration of a pixel, and Fig. 14(B) is a diagram illustrating an example of the configuration of a pixel circuit. [Figure 15]15(A) and 15(B) are diagrams illustrating an example of the configuration of an electronic device. [Figure 16] 16(A) and 16(B) are diagrams illustrating an example of the configuration of an electronic device. [Figure 17] 17A to 17C are diagrams illustrating configuration examples of electronic devices. [Figure 18] FIG. 18 is a diagram illustrating an example of the operation of the electronic device. [Figure 19] 19(A) and (B) are schematic diagrams illustrating configuration examples of electronic devices. [Figure 20] 20(A) and 20(B) are schematic diagrams illustrating configuration examples of electronic devices. [Figure 21] 21(A) and 21(B) are schematic diagrams illustrating configuration examples of electronic devices. [Figure 22] Fig. 22(A) is a diagram showing how a user uses a mobile information terminal, Fig. 22(B) is a front view of the mobile information terminal, and Fig. 22(C) is a diagram showing the operating state of the display unit. [Figure 23] Fig. 23(A) is a diagram showing how a user uses a mobile information terminal, Fig. 23(B) is a front view of the mobile information terminal, and Fig. 23(C) is a diagram showing the operating state of the display unit. [Figure 24] 24(A) and (C) are diagrams showing a state in which a user is touching the display unit, and FIGS. 24(B) and (D) are diagrams showing the operating state of the display unit. [Figure 25] 25(A) is a diagram illustrating a sub-display section, and (B1) to (B7) are diagrams illustrating examples of pixel configurations. [Figure 26] 26A to 26G are diagrams illustrating examples of pixel configurations. [Figure 27] FIG. 27 is a diagram illustrating the display unit. [Figure 28] 28(A) and (B) are diagrams illustrating an example of the configuration of a display device. [Figure 29] 29A to 29D are diagrams illustrating examples of the configuration of a light-emitting element. [Figure 30]30A to 30D are diagrams illustrating examples of the configuration of a light-emitting element. [Figure 31] 31A to 31D are diagrams showing examples of the configuration of a light-emitting element. [Figure 32] 32A to 32C are diagrams illustrating examples of the configuration of a light-emitting element. [Figure 33] FIG. 33 is a diagram illustrating an example of the configuration of a display device. [Figure 34] FIG. 34 is a diagram illustrating an example of the configuration of a display device. [Figure 35] 35(A) and (B) are diagrams illustrating an example of the configuration of a display device. [Figure 36] 36(A) and (B) are diagrams illustrating an example of the configuration of a display device. [Figure 37] 37(A) and (B) are diagrams illustrating an example of the configuration of a display device. [Figure 38] FIG. 38 is a diagram illustrating an example of the configuration of a display device. [Figure 39] FIG. 39 is a diagram illustrating an example of the configuration of a display device. [Figure 40] FIG. 40 is a diagram illustrating an example of the configuration of a display device. [Figure 41] FIG. 41 is a diagram illustrating an example of the configuration of a display device. [Figure 42] 42A to 42C illustrate examples of the structure of a transistor. [Figure 43] 43A to 43C illustrate examples of the structure of a transistor. [Figure 44] 44A to 44C are diagrams illustrating examples of the structure of a transistor. [Figure 45] FIG. 45 is a diagram illustrating image generation by AI processing. [Figure 46] 46(A) to 46(C) are diagrams showing an original image, a low-quality image, and a restored image. DETAILED DESCRIPTION OF THE INVENTION

[0017] Hereinafter, embodiments will be described with reference to the drawings. However, it will be readily understood by those skilled in the art that the embodiments can be implemented in many different forms and that various changes in form and details can be made without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the following description of the embodiments.

[0018] The configurations shown in each embodiment can be combined with the configurations shown in other embodiments as appropriate to form one aspect of the present invention. Furthermore, when multiple configuration examples are shown in one embodiment, the configuration examples can be combined as appropriate.

[0019] In addition, the content (or even part of the content) described in one embodiment can be applied to, combined with, or replaced with another content (or even part of the content) described in that embodiment, or with the content (or even part of the content) described in one or more other embodiments.

[0020] The contents described in the embodiments refer to the contents described in each embodiment using various figures or the contents described using text in the specification.

[0021] Furthermore, a figure (or even a part thereof) described in one embodiment can be combined with another part of that figure, with another figure (or even a part thereof) described in that embodiment, or with a figure (or even a part thereof) described in one or more other embodiments to form even more figures.

[0022] In addition, in the present specification and the like, in the block diagrams, components are classified by function and shown as independent blocks. However, in actual circuits, etc., it is difficult to separate components by function, and there may be cases where one circuit is involved in multiple functions, or where one function is involved across multiple circuits. Therefore, the blocks in the block diagrams are not limited to the components described in the specification, but may be rephrased appropriately depending on the situation.

[0023] In addition, in the drawings, the size, layer thickness, or region is shown at an arbitrary size for convenience of explanation. Therefore, it is not necessarily limited to the scale. Note that the drawings are shown schematically for clarity, and are not limited to the shapes or values ​​shown in the drawings. For example, it is possible to include variations in signal, voltage, or current due to noise, or variations in signal, voltage, or current due to timing deviations.

[0024] In this specification and the like, when describing the connection relationship of a transistor, the terms "one of the source or drain" (or first electrode or first terminal) and "the other of the source or drain" (or second electrode or second terminal) are used. This is because the source and drain of a transistor vary depending on the structure or operating conditions of the transistor. Note that the source and drain of a transistor can be appropriately referred to as source (drain) terminal, source (drain) electrode, or the like depending on the situation.

[0025] Furthermore, in this specification and the like, terms such as "electrode," "wiring," and "terminal" do not functionally limit these components. For example, "electrode" may be used as part of "wiring," and vice versa. Furthermore, terms such as "electrode" and "wiring" include cases where multiple "electrodes," "wirings," etc. are integrally formed. Furthermore, for example, "terminal" may be used as part of "wiring" or "electrode," and vice versa. Furthermore, the term "terminal" includes cases where multiple "electrodes," "wirings," "terminals," etc. are integrally formed. Therefore, for example, an "electrode" can be part of a "wiring" or "terminal," and a "terminal" can be part of a "wiring" or "electrode." Furthermore, terms such as "electrode," "wiring," and "terminal" may be replaced with terms such as "region" in some cases.

[0026] Furthermore, in this specification and the like, terms such as "wiring," "signal line," and "power line" may be interchangeable depending on the circumstances. For example, the term "wiring" may be changed to the term "signal line." For example, the term "wiring" may be changed to the term "power line." Vice versa, terms such as "signal line" and "power line" may be changed to the term "wiring." A term such as "power line" may be changed to the term "signal line." Vice versa, terms such as "signal line" may be changed to the term "power line." Furthermore, the term "potential" applied to a wiring may be changed to the term "signal" depending on the circumstances. Vice versa, terms such as "signal" may be changed to the term "potential."

[0027] Furthermore, in this specification and the like, voltage and potential can be interchanged as appropriate. Voltage refers to the potential difference from a reference potential. For example, if the reference potential is a ground voltage (earth voltage), voltage can be interchanged with potential. Ground potential does not necessarily mean 0 V. Note that potential is relative, and the potential applied to wiring, etc. may change depending on the reference potential.

[0028] In this specification and the like, terms such as "film" and "layer" can be interchangeable depending on the circumstances. For example, the term "conductive layer" can be changed to the term "conductive film." Or, for example, the term "insulating film" can be changed to the term "insulating layer."

[0029] In this specification, a switch refers to a device that has the function of controlling whether or not it is in a conductive state (a state in which current can flow, also referred to as an "on state") or a non-conductive state (a state in which current does not flow, also referred to as an "off state"). Alternatively, a switch refers to a device that has the function of selecting and switching a path through which current flows.

[0030] In this specification, the channel length refers to, for example, in a plan view of a transistor, a region where the semiconductor (or a portion in the semiconductor through which current flows when the transistor is on) and the gate overlap, or the distance between the source and the drain in a region where a channel is formed.

[0031] In this specification, the channel width refers to, for example, the length of the region where the semiconductor (or the portion in the semiconductor through which current flows when the transistor is on) overlaps with the gate electrode, or the length of the region where the channel is formed in a direction perpendicular to the channel length direction in the region where the channel is formed.

[0032] In this specification, "A and B are connected" includes a state in which A and B are directly connected, as well as a state in which they are electrically connected. Here, "A and B are electrically connected" means that when an object having some kind of electrical effect exists between A and B, it enables the exchange of electrical signals between A and B.

[0033] In this specification, a structure in which different light-emitting layers are formed or different light-emitting layers are painted for each color light-emitting device (e.g., blue (B), green (G), and red (R)) may be referred to as an SBS (Side By Side) structure. In this specification, a light-emitting device that can emit white light may be referred to as a white light-emitting device. A white light-emitting device can be combined with a colored layer (e.g., a color filter) to realize a full-color display device.

[0034] Light-emitting devices can be broadly divided into single structures and tandem structures. A single-structure device has one light-emitting unit between a pair of electrodes, and the light-emitting unit preferably includes one or more light-emitting layers. When two light-emitting layers are used to obtain white light emission, it is preferable to select light-emitting layers such that the emission colors of the two light-emitting layers are complementary to each other. For example, by making the emission color of the first light-emitting layer and the emission color of the second light-emitting layer complementary to each other, a configuration in which the light-emitting device as a whole emits white light can be obtained. When three or more light-emitting layers are used to obtain white light emission, it is preferable to make a configuration in which the emission colors of the three or more light-emitting layers are combined to produce white light emission as a whole light-emitting device.

[0035] A tandem-structure device preferably has two or more light-emitting units between a pair of electrodes, and each light-emitting unit preferably includes one or more light-emitting layers. To obtain white light emission, it is preferable to combine light from the light-emitting layers of the multiple light-emitting units to obtain white light emission. The configuration for obtaining white light emission is the same as that of the single-structure device. In a tandem-structure device, it is preferable to provide an intermediate layer such as a charge-generating layer between the multiple light-emitting units.

[0036] Furthermore, when comparing the above-mentioned white light-emitting device (single structure or tandem structure) with a light-emitting device with an SBS structure, the light-emitting device with an SBS structure can consume less power than the white light-emitting device. If you want to keep power consumption low, it is preferable to use a light-emitting device with an SBS structure. On the other hand, the manufacturing process of a white light-emitting device is simpler than that of a light-emitting device with an SBS structure, so it is preferable because it can reduce manufacturing costs or increase manufacturing yields.

[0037] In this specification, etc., a device fabricated using a metal mask or FMM (fine metal mask, high-resolution metal mask) may be referred to as a device with an MM (metal mask) structure. In this specification, etc., a device fabricated without using a metal mask or FMM may be referred to as a device with an MML (metal maskless) structure.

[0038] In this specification, ordinal numbers such as "first" and "second" are used to avoid confusion between components, and do not indicate any order or ranking, such as the order of processes, stacking, or placement. Even if a term does not have an ordinal number in this specification, ordinal numbers may be added in the claims to avoid confusion between components. Even if a term has an ordinal number in this specification, ordinal numbers may be added in the claims. Even if a term has an ordinal number in this specification, ordinal numbers may be omitted in the claims.

[0039] Generally, a "capacitance" has a configuration in which two electrodes face each other via an insulator (dielectric). In this specification, etc., the term "capacitance element" includes the above-mentioned "capacitance." That is, in this specification, etc., the term "capacitance element" includes a configuration in which two electrodes face each other via an insulator, a configuration in which two wires face each other via an insulator, or a configuration in which two wires are arranged via an insulator.

[0040] Furthermore, in this specification and the like, when a resist mask is formed by a lithography method (photolithography, X-ray lithography, electron beam lithography, multiphoton lithography, interference lithography, nanoimprinting, etc.) and then an etching step (removal step) is performed, the resist mask is removed after the etching step is completed, unless otherwise specified.

[0041] In order to make the invention easier to understand, particularly in plan views (also called "top views") and perspective views, some components may be omitted from the drawings. Also, some hidden lines may be omitted from the drawings.

[0042] In the configuration of the invention of the embodiment, the same parts or parts having similar functions are denoted by the same reference numerals in different drawings, and repeated explanations may be omitted. Furthermore, when referring to similar functions, the same hatch pattern may be used and no particular reference numeral may be assigned. Furthermore, to make the drawings easier to understand, the illustration of some components may be omitted in perspective views, plan views, etc.

[0043] Unless otherwise specified, in this specification, the off-state current refers to the drain current when a transistor is in an off state (also referred to as a non-conducting state or a cut-off state). Unless otherwise specified, the off-state refers to a state in which the gate-source voltage Vg is lower than the threshold voltage Vth for an n-channel transistor (higher than Vth for a p-channel transistor).

[0044] In this specification and the like, a metal oxide refers to an oxide of a metal in a broad sense. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as oxide semiconductors or simply as OS), and the like. For example, when a metal oxide is used in a semiconductor layer in which a channel of a transistor is formed, the metal oxide may be referred to as an oxide semiconductor. In other words, in this specification and the like, the term "OS transistor" can be rephrased as a transistor having an oxide or an oxide semiconductor. Furthermore, in this specification and the like, the term "OSFET" can be rephrased as a FET (Field Effect Transistor) having an oxide or an oxide semiconductor. Therefore, "OS transistor" and "OSFET" may be synonymous.

[0045] In addition, even when independent components are shown connected to each other in a circuit diagram, one component may have the functions of multiple components. For example, if part of a wiring also functions as an electrode, one conductive layer has both the function of a wiring and the function of an electrode.

[0046] Furthermore, in this specification and the like, a transistor has three terminals called a gate, a source, and a drain. The gate is a control terminal that controls the conduction state of the transistor. The two terminals that function as a source or a drain are the input / output terminals of the transistor. One of the two input / output terminals becomes a source and the other becomes a drain depending on the conductivity type of the transistor (n-channel type, p-channel type) and the level of the potential applied to the three terminals of the transistor. For this reason, in this specification and the like, terms such as source and drain can sometimes be interchanged.

[0047] Furthermore, in this specification and the like, when describing the connection relationship of a transistor, the terms "one of the source or drain" (or first electrode or first terminal) and "the other of the source or drain" (or second electrode or second terminal) are used. Note that, depending on the structure of a transistor, a back gate may be provided in addition to the three terminals described above. In this case, in this specification and the like, one of the gate or back gate of the transistor may be referred to as the first gate, and the other of the gate or back gate of the transistor may be referred to as the second gate. Furthermore, for the same transistor, the terms "gate" and "back gate" may be interchangeable. Furthermore, when a transistor has three or more gates, in this specification and the like, the respective gates may be referred to as the first gate, the second gate, the third gate, etc.

[0048] Furthermore, even when a single element is shown in a circuit diagram, the element may have multiple elements. For example, when a circuit diagram shows one resistor, it is considered to include two or more resistors electrically connected in series. For example, when a circuit diagram shows one capacitor, it is considered to include two or more capacitors electrically connected in parallel. For example, when a circuit diagram shows one transistor, it is considered to include two or more transistors electrically connected in series, with the gates of each transistor electrically connected to each other. For example, when a circuit diagram shows one switch, it is considered to include two or more transistors connected in series or in parallel, with the gates of each transistor electrically connected to each other.

[0049] In this specification, terms indicating position, such as "above," "below," "upward," or "belowward," may be used for convenience in describing the positional relationship between components with reference to the drawings. Furthermore, the positional relationship between components may change as appropriate depending on the orientation of each configuration. Therefore, the terms are not limited to those used in the specification and may be rephrased appropriately depending on the situation. For example, the expression "an insulating layer located above a conductive layer" can be rephrased as "an insulating layer located below the conductive layer" by rotating the orientation of the drawing 180 degrees. For example, the expression "an insulating layer located above an opening" may include "an insulating layer located on the side of the opening."

[0050] Furthermore, the terms "above" and "below" do not limit the positional relationship of components to being directly above or below, and being in direct contact with each other. For example, the expression "electrode B on insulating layer A" does not require that electrode B be formed in direct contact with insulating layer A, and does not exclude the inclusion of other components between insulating layer A and electrode B.

[0051] In this specification, terms such as "overlap" do not limit the state of the stacking order of components, etc. For example, the expression "electrode B overlapping insulating layer A" does not limit the state in which electrode B is formed on insulating layer A, but does not exclude the state in which electrode B is formed under insulating layer A or the state in which electrode B is formed on the right (or left) side of insulating layer A, etc.

[0052] In this specification, the terms "adjacent" and "close to" do not necessarily mean that components are in direct contact with each other. For example, the expression "electrode B adjacent to insulating layer A" does not require that insulating layer A and electrode B are in direct contact with each other, and does not exclude the inclusion of other components between insulating layer A and electrode B.

[0053] Furthermore, in this specification, terms such as "row" and "column" may be used to describe components arranged in a matrix and their positional relationships. Furthermore, the positional relationships between components change as appropriate depending on the direction in which each component is depicted. Therefore, the terms used in this specification are not limited to those used in this specification, and may be rephrased appropriately depending on the situation. For example, the expression "row direction" may be rephrased as "column direction" by rotating the orientation of the drawing by 90 degrees.

[0054] In addition, in drawings and the like relating to this specification, arrows indicating the X direction, Y direction, and Z direction may be used. In this specification, the "X direction" refers to the direction along the X axis, and the forward direction and the reverse direction may not be distinguished unless explicitly stated. The same applies to the "Y direction" and "Z direction." The X direction, Y direction, and Z direction are directions that intersect with each other. More specifically, the X direction, Y direction, and Z direction are directions that are perpendicular to each other. In this specification and the like, one of the X direction, Y direction, and Z direction may be referred to as the "first direction" or "first direction." The other may be referred to as the "second direction" or "second direction." The remaining one may be referred to as the "third direction" or "third direction."

[0055] In this specification and the like, when the same reference numeral is used for multiple elements, and particularly when it is necessary to distinguish between them, an identification symbol such as “A”, “b”, “_1”, "[n]”, "[m,n]”, etc. may be added to the reference numeral. For example, the EL layer 172 may be shown divided into the EL layer 172R, the EL layer 172G, the EL layer 172B, and the EL layer 172W.

[0056] (Embodiment 1) In this embodiment, a display device according to one embodiment of the present invention will be described.

[0057] <Display device 10A> 1A is a perspective view of a display device 10A according to one embodiment of the present invention. The display device 10A includes a substrate 11 and a substrate 12. The display device 10A includes a display unit 13 between the substrates 11 and 12. The display unit 13 includes a plurality of pixels 230. Each pixel 230 includes a pixel circuit 51 and a light-emitting element 61. The display unit 13 is a region of the display device 10A that displays an image.

[0058] Furthermore, by arranging the pixels 230 in a matrix of 1920 × 1080 pixels, a display unit 13 capable of displaying at a resolution of so-called full high-definition (also referred to as "2K resolution," "2K1K," or "2K") can be realized. Furthermore, by arranging the pixels 230 in a matrix of 3840 × 2160 pixels, for example, a display unit 13 capable of displaying at a resolution of so-called ultra high-definition (also referred to as "4K resolution," "4K2K," or "4K") can be realized. Furthermore, by arranging the pixels 230 in a matrix of 7680 × 4320 pixels, for example, a display unit 13 capable of displaying at a resolution of so-called super high-definition (also referred to as "8K resolution," "8K4K," or "8K") can be realized. By increasing the number of pixels 230, it is also possible to realize a display unit 13 capable of displaying at a resolution of 16K or even 32K.

[0059] The pixel density (resolution) of the display unit 13 is preferably 1000 ppi or more and 10000 ppi or less, but may be, for example, 2000 ppi or more and 6000 ppi or less, or 3000 ppi or more and 5000 ppi or less.

[0060] There is no particular limitation on the screen ratio (aspect ratio) of the display unit 13. The display unit 13 can support various screen ratios, such as 1:1 (square), 4:3, 16:9, and 16:10.

[0061] In this specification and the like, the term “element” may be replaced with “device.” For example, a display element, a light-emitting element, and a liquid crystal element may be replaced with a display device, a light-emitting device, and a liquid crystal device, for example.

[0062] The display device 10A receives various signals and power supply potentials from the outside via the terminal unit 14, and can display images using the display elements provided in the display unit 13. Various elements can be used as the display elements. Representative examples include light-emitting elements that have a function of emitting light, such as organic EL elements and LED elements, liquid crystal elements, and MEMS (Micro Electro Mechanical Systems) elements.

[0063] A plurality of layers are provided between substrate 11 and substrate 12, and each layer is provided with a transistor for performing circuit operation or a display element for emitting light. The plurality of layers are provided with pixel circuits that have the function of controlling the operation of the display elements, drive circuits that have the function of controlling the pixel circuits, function circuits that have the function of controlling the drive circuits, and the like.

[0064] FIG. 1(B) is a perspective view showing a schematic configuration of each layer provided between the substrate 11 and the substrate 12 of the display device 10A.

[0065] A layer 20 is provided on the substrate 11. The layer 20 includes a driving circuit 30, a functional circuit 40, and an input / output circuit 80. The layer 20 includes a transistor 21 (also called a "Si transistor" or "SiFET") having silicon in a channel formation region 22. The substrate 11 is, for example, a silicon substrate. A silicon substrate is preferable because it has higher thermal conductivity than a glass substrate. By providing the driving circuit 30, the functional circuit 40, and the input / output circuit 80 on the same layer, the wiring electrically connecting the driving circuit 30, the functional circuit 40, and the input / output circuit 80 can be shortened. This shortens the charging and discharging time of the control signal used by the functional circuit 40 to control the driving circuit 30, thereby reducing power consumption. Furthermore, the charging and discharging time required for the input / output circuit 80 to supply signals to the functional circuit 40 and the driving circuit 30 is shortened, thereby reducing power consumption.

[0066] The transistor 21 can be, for example, a transistor having single crystal silicon in a channel formation region (also referred to as a c-Si transistor). In particular, when a transistor having single crystal silicon in a channel formation region is used as the transistor provided in the layer 20, the on-state current of the transistor can be increased. Therefore, it is preferable because the circuit included in the layer 20 can be driven at high speed. Furthermore, a Si transistor can be formed by microfabrication so that the channel length is 3 nm to 10 nm, and therefore the display device 10A can be provided with an accelerator such as a CPU or a GPU, an application processor, or the like, integrated with the display unit.

[0067] Furthermore, a transistor having polycrystalline silicon in a channel formation region (also referred to as a "Poly-Si transistor") may be provided in the layer 20. Low temperature polysilicon (LTPS) may be used as the polycrystalline silicon. Note that a transistor having LTPS in a channel formation region is also referred to as an "LTPS transistor." Furthermore, an OS transistor may be provided in the layer 20 as necessary.

[0068] The driving circuit 30 can be various circuits such as a shift register, a level shifter, an inverter, a latch, an analog switch, and a logic circuit. The driving circuit 30 includes, for example, a gate driver circuit (also referred to as a "scanning line driving circuit"), a source driver circuit (also referred to as a "video signal line driving circuit"), and the like. The driving circuit 30 may also include an arithmetic circuit, a memory circuit, a power supply circuit, and the like. Because the gate driver circuit, the source driver circuit, and other circuits can be arranged overlapping the display unit 13, the width of the non-display area (also referred to as a frame) around the periphery of the display unit 13 of the display device 10A can be made significantly narrower than when these circuits and the display unit 13 are arranged side by side, thereby enabling the display device 10A to be made more compact.

[0069] The functional circuit 40 has, for example, the function of an application processor for controlling each circuit in the display device 10A and generating signals for controlling each circuit. The functional circuit 40 may also have a circuit for correcting image data, such as an accelerator, such as a CPU or GPU. The functional circuit 40 may also have an LVDS (Low Voltage Differential Signaling) circuit, a MIPI (Mobile Industry Processor Interface) circuit, and a D / A (Digital to Analog) conversion circuit, each of which functions as an interface for receiving image data from outside the display device 10A. The functional circuit 40 may also have a circuit for compressing and decompressing image data, a power supply circuit, and the like. The display device 10A may not include the functional circuit 40, and an external arithmetic device may be used instead. Some of the functions of the functional circuit 40 may also be provided on the layer 50.

[0070] A layer 50 is provided on the layer 20. The layer 50 has a pixel circuit group 55 including a plurality of pixel circuits 51. An OS transistor may be provided in the layer 50. The pixel circuit 51 may be configured to include an OS transistor. The layer 50 can be provided by being stacked on the layer 20.

[0071] A Si transistor may be provided in layer 50. For example, pixel circuit 51 may be configured to include a transistor having single crystal silicon or polycrystalline silicon in a channel formation region. LTPS may be used as the polycrystalline silicon. For example, layer 50 may be formed on another substrate and then bonded to layer 20. Alternatively, layer 50 may be formed on another substrate, and only layer 50 may be transferred from that substrate onto layer 20. Alternatively, layer 50 may be formed on another substrate, and then layer 50 may be peeled off from that substrate and provided on a flexible substrate.

[0072] Furthermore, for example, the pixel circuit 51 may be configured with multiple types of transistors made of different semiconductor materials. When the pixel circuit 51 is configured with multiple types of transistors made of different semiconductor materials, the transistors may be provided in different layers for each type of transistor. For example, when the pixel circuit 51 is configured with Si transistors and OS transistors, the Si transistors and the OS transistors may be provided in a stacked configuration. By providing the transistors in a stacked configuration, the area occupied by the pixel circuit 51 is reduced. This allows for an improvement in the resolution of the display device 10A. Note that a configuration in which LTPS transistors and OS transistors are combined is sometimes referred to as LTPO.

[0073] The OS transistor 52 is preferably a transistor having an oxide containing at least one of indium and zinc in the channel formation region 54. Such an OS transistor has a characteristic of having a very low off-state current. Therefore, it is preferable to use an OS transistor, particularly as a transistor provided in a pixel circuit, because analog data written to the pixel circuit can be retained for a long period of time.

[0074] Furthermore, if the functional circuit 40 is used as a CPU and an OS transistor is used for the CPU, it can be made into a normally-off CPU (also called "NoffCPU" (registered trademark)). The NoffCPU can stop the power supply to circuits in the NoffCPU that do not need to operate, and put the circuits into a standby state. When the power supply is stopped, the circuits in the standby state do not consume power. Therefore, the NoffCPU can minimize power consumption.

[0075] A layer 60 is provided on the layer 50. A substrate 12 is provided on the layer 60. The substrate 12 is preferably a light-transmitting substrate or a layer made of a light-transmitting material. A plurality of light-emitting elements 61 are provided on the layer 60. The layer 60 can be configured to be stacked on the layer 50. The light-emitting elements 61 can be, for example, organic electroluminescence elements (also referred to as organic EL elements). However, the light-emitting elements 61 are not limited thereto, and for example, inorganic EL elements made of inorganic materials can also be used. Note that "organic EL elements" and "inorganic EL elements" may be collectively referred to as "EL elements." The light-emitting elements 61 may contain inorganic compounds such as quantum dots. For example, quantum dots can be used in the light-emitting layer to function as a light-emitting material.

[0076] As shown in FIG. 1B, the display device 10A of one embodiment of the present invention can have a stacked structure including the light-emitting element 61, the pixel circuit 51, the driver circuit 30, and the functional circuit 40. This allows the pixel aperture ratio (effective display area ratio) to be extremely high. For example, the pixel aperture ratio can be 40% or more and less than 100%, preferably 50% or more and 95% or less, and more preferably 60% or more and 95% or less. Furthermore, the pixel circuits 51 can be arranged at extremely high density, thereby achieving extremely high pixel resolution. For example, in the display portion 13 of the display device 10A, the pixels 230 can be arranged with a resolution of 2000 ppi or more, preferably 3000 ppi or more, more preferably 5000 ppi or more, and further preferably 6000 ppi or more, and 20,000 ppi or less, or 30,000 ppi or less.

[0077] Such a display device 10A has extremely high resolution and is therefore suitable for head-mounted displays or glasses-type VR or AR devices, etc. For example, even in a configuration in which the display unit of the display device 10A is viewed through an optical member such as a lens, the display device 10A has an extremely high-resolution display unit, so that pixels are not visible even when the display unit is enlarged with the lens, thereby providing a highly immersive display.

[0078] When the display device 10A is used as a display device for a wearable electronic device such as a head-mounted display or glasses, the diagonal size of the display unit 13 is preferably 0.1 inches to 5.0 inches, more preferably 0.5 inches to 2.0 inches, and even more preferably 1 inch to 1.7 inches. For example, the diagonal size of the display unit 13 may be 1.5 inches or close to 1.5 inches. Setting the diagonal size of the display unit 13 to 2.0 inches or less allows it to be processed in a single exposure process using an exposure device (typically a scanner device), thereby improving the productivity of the display device.

[0079] The display device 10A according to an embodiment of the present invention can be applied to devices other than wearable electronic devices. In this case, the diagonal size of the display unit 13 may exceed 2.0 inches. The configuration of the transistors used in the pixel circuits 51 may be appropriately selected depending on the diagonal size of the display unit 13. For example, when single-crystal Si transistors are used in the pixel circuits 51, the diagonal size of the display unit 13 is preferably 0.1 inches to 3 inches. When LTPS transistors are used in the pixel circuits 51, the diagonal size of the display unit 13 is preferably 0.1 inches to 30 inches, and more preferably 1 inch to 30 inches. When LTPO is used in the pixel circuits 51, the diagonal size of the display unit 13 is preferably 0.1 inches to 50 inches, and more preferably 1 inch to 50 inches. When OS transistors are used in the pixel circuits 51, the diagonal size of the display unit 13 is preferably 0.1 inches to 200 inches, and more preferably 50 inches to 100 inches.

[0080] Display devices using single-crystal Si transistors are difficult to enlarge because it is difficult to increase the size of the single-crystal Si substrate. Furthermore, when LTPS transistors are used in display devices, a laser crystallization apparatus is used in the manufacturing process, making it difficult to accommodate larger screen sizes (typically, screen sizes exceeding 30 inches in diagonal size). On the other hand, OS transistors are not restricted by the use of a laser crystallization apparatus in the manufacturing process, and can be manufactured at relatively low process temperatures (typically 450°C or lower), making it possible to accommodate display devices with relatively large areas (typically, diagonal sizes of 50 to 100 inches). Furthermore, LTPO transistors can accommodate diagonal sizes of display areas between those using LTPS transistors and those using OS transistors (typically, 1 to 50 inches).

[0081] A specific configuration example of the drive circuit 30 and the functional circuit 40 will be described with reference to Fig. 2. Fig. 2 is a block diagram illustrating pixel circuits 51 in the display device 10A, multiple wirings connecting the drive circuit 30 and the functional circuit 40, and bus wiring and the like within the display device 10A.

[0082] In the display device 10A shown in FIG. 2, the layer 50 has a plurality of pixel circuits 51 arranged in a matrix.

[0083] 2, the layer 20 includes a driving circuit 30, a functional circuit 40, and an input / output circuit 80. The driving circuit 30 includes, for example, a source driver circuit 31, a digital-to-analog converter (DAC) 32, a gate driver circuit 33, a level shifter 34, an amplifier circuit 35, an inspection circuit 36, a video generation circuit 37, and a video distribution circuit 38. The functional circuit 40 includes, for example, a memory circuit (also referred to as a "memory device") 41, a GPU (also referred to as an "AI accelerator") 42, an EL correction circuit 43, a timing generation circuit 44, a CPU 45, a sensor controller 46, a power supply circuit 47, a temperature sensor 48, and a brightness correction circuit 49. The functional circuit 40 functions as an application processor.

[0084] The input / output circuit 80 supports a transmission method such as LVDS (Low Voltage Differential Signaling), and has a function of distributing control signals, image data, and the like input via the terminal unit 14 to the drive circuit 30 and the function circuit 40. The input / output circuit 80 also has a function of outputting information from the display device 10A to the outside via the terminal unit 14.

[0085] FIG. 2 also illustrates a configuration in which the circuits included in the drive circuit 30, the circuits included in the functional circuit 40, and the input / output circuit 80 are electrically connected to the bus wiring BSL.

[0086] For example, the source driver circuit 31 has a function of transmitting image data to the pixel circuit 51 of the pixel 230. Therefore, the source driver circuit 31 is electrically connected to the pixel circuit 51 via a wiring SL (also referred to as a "video signal line"). Note that a plurality of source driver circuits 31 may be provided.

[0087] The digital-analog conversion circuit 32 has a function of converting image data that has been digitally processed by a GPU, a correction circuit, etc., which will be described later, into analog data. The image data converted into analog data is amplified by an amplifier circuit 35, such as an operational amplifier, and transmitted to the pixel circuits 51 via the source driver circuit 31. Note that the image data may be transmitted in the order of the source driver circuit 31, the digital-analog conversion circuit 32, and the pixel circuits 51. The digital-analog conversion circuit 32 and the amplifier circuit 35 may also be included in the source driver circuit 31.

[0088] For example, the gate driver circuit 33 has a function of selecting a pixel circuit 51 to which image data is to be sent. Therefore, the gate driver circuit 33 is electrically connected to the pixel circuit 51 via a wiring GL (also referred to as a "scanning line"). Note that a plurality of gate driver circuits 33 may be provided corresponding to the source driver circuits 31.

[0089] The level shifter 34 has a function of converting signals input to the source driver circuit 31, the digital-to-analog conversion circuit 32, the gate driver circuit 33, etc., to appropriate levels, for example.

[0090] For example, the memory circuit 41 has a function of storing image data to be displayed in the pixel circuit 51. Note that the memory circuit 41 can be configured to store the image data as digital data or analog data.

[0091] Furthermore, when image data is stored in the memory circuit 41, it is preferable to use a nonvolatile memory as the memory circuit 41. In this case, for example, a NAND type memory or the like can be used as the memory circuit 41.

[0092] Furthermore, when temporary data generated by the GPU 42, the EL correction circuit 43, the CPU 45, etc. is stored in the memory circuit 41, it is preferable to use a volatile memory as the memory circuit 41. In this case, for example, an SRAM or a DRAM can be used as the memory circuit 41.

[0093] As an example, the GPU 42 has a function of performing processing to output image data read from the storage circuit 41 to the pixel circuit 51. In particular, the GPU 42 is configured to perform pipeline processing in parallel, and therefore can quickly process image data to be output to the pixel circuit 51. The GPU 42 can also function as a decoder to restore an encoded image.

[0094] The functional circuit 40 may also include a plurality of circuits capable of improving the display quality of the display device 10A. For example, the circuit may include a correction circuit (color adjustment, dimming) that detects color unevenness in the displayed image and corrects the color unevenness to produce an optimal image. For example, when a light-emitting device using an organic EL is used as the display element, the functional circuit 40 may include an EL correction circuit that corrects image data in accordance with the characteristics of the light-emitting device. The functional circuit 40 includes, as an example, an EL correction circuit 43.

[0095] Furthermore, artificial intelligence may be used for the image correction described above. For example, the current flowing through the pixel circuit (or the voltage applied to the pixel circuit) may be monitored and acquired, and the displayed image may be acquired by an image sensor or the like, and the current (or voltage) and the image may be treated as input data for an artificial intelligence calculation (e.g., an artificial neural network), and the output result may be used to determine whether or not the image should be corrected.

[0096] In addition, AI calculations can be applied not only to image correction but also to up-conversion processing, which increases the resolution of image data. As an example, the GPU 42 in Figure 2 shows blocks for performing various correction calculations (color unevenness correction 42a, up-conversion 42b, etc.).

[0097] Algorithms for upconverting image data can be selected from the Nearest Neighbor method, Bilinear method, Bicubic method, RAISR (Rapid and Accurate Image Super-Resolution) method, ANR (Anchored Neighborhood Regression) method, A+ method, SRCNN (Super-Resolution Convolutional Neural Network) method, etc.

[0098] The upconversion process may be configured to use a different algorithm for each specific area of ​​the display unit 13. For example, the user's point of gaze on the display unit 13 may be detected, and the upconversion process for the point of gaze and the area near the point of gaze may be performed using a slower but more accurate algorithm, while the upconversion process for the area other than the detected area may be performed using a faster but less accurate algorithm. This configuration can shorten the time required for the upconversion process. It can also reduce the power consumption required for the upconversion process.

[0099] Furthermore, not limited to up-conversion processing, down-conversion processing for lowering the resolution of image data may also be performed. If the resolution of image data is greater than the resolution of display unit 13, a portion of the image data may not be displayed on display unit 13. In such a case, down-conversion processing can be performed to display the entire image data on display unit 13.

[0100] For example, the timing generation circuit 44 has a function of controlling the drive frequency (sometimes called the "frame frequency," "frame rate," or "refresh rate") at which an image is displayed. For example, when a still image is displayed on the display device 10A, the power consumption of the display device 10A can be reduced by lowering the drive frequency using the timing generation circuit 44. Driving that reduces the power consumption of the display device by driving at a lower drive frequency may be referred to as idling stop (IDS) driving.

[0101] The CPU 45 has a function of performing general-purpose processing, such as running an operating system, controlling data, performing various calculations, and running programs. The CPU 45 has a role of issuing commands such as writing or reading image data to or from the memory circuit 41, correcting image data, and operating a sensor (described later). Furthermore, the CPU 45 may have a function of transmitting a control signal to at least one of the circuits included in the functional circuit 40.

[0102] The sensor controller 46 has a function of controlling the sensor, for example. In addition, in Fig. 2, a wiring SNCL is illustrated as a wiring for electrically connecting to the sensor.

[0103] The sensor may be, for example, a touch sensor that can be provided in the display unit 13. Alternatively, the sensor may be, for example, an illuminance sensor.

[0104] For example, the power supply circuit 47 has a function of generating voltages to be supplied to the pixel circuits 51, the drive circuits 30, the functional circuits 40, etc. The power supply circuit 47 may also have a function of selecting the circuits to which the voltage is supplied. For example, the power supply circuit 47 can reduce the power consumption of the entire display device 10A by stopping the voltage supply to the CPU 45, the GPU 42, etc. while a still image is being displayed.

[0105] As described above, the display device according to one embodiment of the present invention can have a stacked structure including a display element, a pixel circuit, a driver circuit, and a functional circuit 40. The driver circuit and the functional circuit, which are peripheral circuits, can be arranged to overlap with the pixel circuit, and the width of the frame can be significantly reduced, thereby enabling a miniaturized display device. Furthermore, the display device according to one embodiment of the present invention can be lightweight because the wiring connecting the circuits can be shortened by stacking the circuits. Furthermore, the display device according to one embodiment of the present invention can have a display portion with improved pixel resolution, resulting in a display device with excellent display quality.

[0106] <Display device 10B> 3A and 3B show perspective views of a display device 10B, which is a modified example of the display device 10A. FIG. 3B is a perspective view for explaining the configuration of each layer of the display device 10B. To avoid repetition of explanation, differences from the display device 10A will be mainly explained.

[0107] The display device 10B has a pixel circuit group 55 including a plurality of pixel circuits 51 (not shown in FIGS. 3A and 3B) and a drive circuit 30 stacked on top of each other. In the display device 10B, the pixel circuit group 55 is divided into a plurality of sections 59, and the drive circuit 30 is divided into a plurality of sections 39. Each of the plurality of sections 39 has a source driver circuit 31 and a gate driver circuit 33 (not shown in FIGS. 3A and 3B).

[0108] FIG. 4A shows an example of the configuration of a pixel circuit group 55 included in the display device 10B. FIG. 4B shows an example of the configuration of a drive circuit 30 included in the display device 10B. The sections 59 and 39 are arranged in a matrix of m rows and n columns (m and n are each an integer of 2 or greater). In this specification, the section 59 in the first row and first column will be referred to as section 59[1,1], and the section 59 in the mth row and nth column will be referred to as section 59[m,n]. Similarly, the section 39 in the first row and first column will be referred to as section 39[1,1], and the section 39 in the mth row and nth column will be referred to as section 39[m,n]. Similarly, the sub-display section 19 in the first row and first column will sometimes be referred to as sub-display section 19[1,1]. The sub-display section 19[1,1] includes the section 59[1,1] and the section 39[1,1]. 4A and 4B show the case where m is 4 and n is 8. That is, the pixel circuit group 55 and the drive circuit 30 are each divided into 32. Therefore, the display unit 13 is divided into 32 parts.

[0109] Each of the plurality of sections 59 has a plurality of pixel circuits 51, a plurality of wirings SL, and a plurality of wirings GL. In each of the plurality of sections 59, one of the plurality of pixel circuits 51 is electrically connected to at least one of the plurality of wirings SL and at least one of the plurality of wirings GL.

[0110] One of the sections 59 and one of the sections 39 are arranged to overlap (see FIG. 4(C)). For example, section 59[i,j] (i is an integer between 1 and m, inclusive, and j is an integer between 1 and n, inclusive) and section 39[i,j] are arranged to overlap. The source driver circuit 31[i,j] of section 39[i,j] is electrically connected to the wiring SL of section 59[i,j]. The gate driver circuit 33[i,j] of section 39[i,j] is electrically connected to the wiring GL of section 59[i,j]. The source driver circuit 31[i,j] and the gate driver circuit 33[i,j] have the function of controlling the multiple pixel circuits 51 of section 59[i,j].

[0111] By overlapping the section 59[i,j] and the section 39[i,j], the connection distance (wiring length) between the pixel circuit 51 in the section 59[i,j] and the source driver circuit 31 and gate driver circuit 33 in the section 39[i,j] can be made extremely short. As a result, the wiring resistance and parasitic capacitance are reduced, which shortens the time required for charging and discharging, enabling high-speed driving. It also reduces power consumption. It also allows for a smaller and lighter device.

[0112] Further, a timing generation circuit (timing generation circuit 441), an input / output circuit (input / output circuit 442), and a memory circuit (memory circuit 443) may be provided for each section 39 (see FIG. 4D). 2 C (Inter-Integrated Circuit) interface, etc. can be used.

[0113] The timing generation circuit 441, the input / output circuit 442, and the memory circuit 443 may be collectively referred to as a "local controller." The local controller may have circuits other than the timing generation circuit 441, the input / output circuit 442, and the memory circuit 443. The local controller may not have one or more of the timing generation circuit 441, the input / output circuit 442, and the memory circuit 443.

[0114] 4(C) and 4(D), the timing generation circuit 441 in the partition 39[i,j] is indicated as a timing generation circuit 441[i,j]. The input / output circuit 442 in the partition 39[i,j] is indicated as an input / output circuit 442[i,j]. The memory circuit 443 in the partition 39[i,j] is indicated as a memory circuit 443[i,j].

[0115] For example, the functional circuit 40 supplies the input / output circuit 442[i,j] with operation parameters such as setting signals for the scanning direction and drive frequency of the gate driver circuit 33[i,j], as well as the number of pixels to be thinned out of image data when reducing the resolution (the number of pixels not to be rewritten when rewriting image data). The timing generation circuit 441[i,j] has a function of determining the drive frequency of the section 39[i,j] in accordance with the operation parameters. In other words, the timing generation circuit 441[i,j] has a function of determining the drive frequency of the sub-display unit 19 in the i-th row and j-th column in accordance with the operation parameters. The operation of the source driver circuit 31[i,j] and the gate driver circuit 33[i,j] is controlled by the timing generation circuit 441[i,j].

[0116] The memory circuit 443[i,j] has a function of storing operating parameters such as resolution and drive frequency supplied to the section 39[i,j]. The memory circuit 443[i,j] also has a function of storing image data of the image to be displayed on the sub-display unit 19[1,1]. In other words, the memory circuit 443[i,j] functions as a frame memory.

[0117] The storage circuit 443 may be a flash memory, MRAM, PRAM, ReRAM, FeRAM, DRAM, SRAM, or the like. Alternatively, the storage circuit 443 may be a DOSRAM (registered trademark), a NOSRAM (registered trademark), or the like. By providing a storage circuit 443 that functions as a frame memory for each sub-display unit 19 (for each section 39), even if transmission of image data to the sub-display unit 19 is stopped when a still image is to be displayed, the still image can be continued to be displayed using the image data stored in the storage circuit 443.

[0118] Furthermore, by providing a memory circuit 443 for each sub-display unit 19, it is possible to rewrite image data for each sub-display unit 19. For example, if a change occurs in part of the image data, it is only necessary to rewrite the image data for the sub-display unit 19 corresponding to the area where the change occurred. In other words, since there is no need to transmit image data for the entire display unit 13, the amount of image data transmitted can be reduced. This allows for power savings during data transmission.

[0119] When the sub-display unit 19 has a light-receiving element, the input / output circuit 442 has a function of outputting information photoelectrically converted by the light-receiving element to the functional circuit 40. The functional circuit 40 may not be provided in the display device 10B, and an external device that can function as the functional circuit 40 may be connected to the display device 10B. Signals can be input / output between the external device and the display device 10B via the terminal unit 14.

[0120] Furthermore, circuits other than the timing generation circuit 441, the input / output circuit 442, and the memory circuit 443 may be provided for each section 39.

[0121] The display device 10B has a configuration in which a source driver circuit 31 and a gate driver circuit 33 are provided for each section 39. Therefore, the display unit 13 can be divided into sections 59 corresponding to the sections 39, and image data can be rewritten. For example, it is possible to rewrite image data only in sections of the display unit 13 where changes have occurred in the image, and to retain image data in sections where no changes have occurred, thereby realizing a reduction in power consumption.

[0122] In this specification and elsewhere, one of the display unit 13 divided into sections 59 may be referred to as a sub-display unit 19. Furthermore, because one section 59 is controlled by one section 39, the sub-display unit 19 can also be considered a part of the display unit 13 divided into sections 39. The display unit 13 is made up of multiple sub-display units 19. Therefore, the display unit 13 can also be considered to have multiple sub-display units 19. The display device 10B described using Figures 3(A), 3(B), and 4(A) to (C) shows a case in which the display unit 13 is divided into 32 sub-display units 19 arranged in 4 rows and 8 columns. However, the number of sub-display units 19 included in the display unit 13 is not limited to this.

[0123] Like the display unit 13, the sub-display unit 19 also has multiple pixels 230. The sub-display unit 19 is controlled for each section 59, and each section 59 is controlled by a corresponding section 39. In other words, the image display operation in one sub-display unit 19 is performed by multiple light-emitting elements 61, one section 59, and one section 39 working together. Therefore, in this specification and elsewhere, unless otherwise specified, the term "sub-display unit 19" may include multiple light-emitting elements 61, one section 59, and one section 39.

[0124] In addition, in FIG. 3(A), one sub-display unit 19 is shown as a vertically long rectangle when the display unit 13 is viewed from the Z direction, but the planar shape of the sub-display unit 19 is not limited to this. The planar shape of one sub-display unit 19 may vary depending on the shape of the display unit 13 and the number of divisions. For example, as shown in FIG. 5(A), the planar shape of the sub-display unit 19 may be a horizontally long rectangle. As shown in FIG. 5(B), the planar shape of the sub-display unit 19 may be a square. As shown in FIG. 5(C), the display unit 13 may be configured by combining a vertically long sub-display unit 19, a horizontally long sub-display unit 19, and a square sub-display unit 19.

[0125] Furthermore, the display device 10B can arbitrarily set the drive frequency for image display for each sub-display unit 19 by using the timing generation circuit 44 of the functional circuit 40. The functional circuit 40 has the function of controlling the operation of each of the multiple sections 39 and the multiple sections 59. In other words, the functional circuit 40 has the function of controlling the drive frequency and operation timing of each of the multiple sub-display units 19 arranged in a matrix. The functional circuit 40 also has the function of adjusting synchronization between the sub-display units.

[0126] For example, power consumption can be reduced by detecting the user's point of gaze on the display unit 13 and varying the drive frequency for each sub-display unit 19 in accordance with the movement of the point of gaze (in accordance with the movement of the user's line of sight).

[0127] FIG. 6A shows a display unit 13 having four rows and eight columns of sub-display units 19. FIG. 6A shows a first region S1 to a third region S3 on the display unit 13, each centered on a fixation point G. Each of the multiple sub-display units 19 is assigned to either a first region 29A that overlaps with the first region S1 or the second region S2, or a second region 29B that overlaps with the third region S3. That is, each of the multiple sections 39 is assigned to either the first region 29A or the second region 29B. The first region 29A includes the region that overlaps with the fixation point G. The second region 29B includes the sub-display units 19 located outside the first region 29A. (See FIG. 6B.)

[0128] The operation of the drive circuits (source driver circuit 31 and gate driver circuit 33) included in each of the multiple sections 39 is controlled by a functional circuit 40. For example, the second section 29B overlaps with a third region S3, which includes a stable fixation field, an induced field, and an auxiliary field, and is an area where the user's ability to distinguish is low. Therefore, even if the number of times image data is rewritten per unit time in the second section 29B (hereinafter also referred to as the "number of image rewrites") is made smaller than that in the first section 29A during image display, the degradation of the actual display quality perceived by the user (hereinafter also referred to as the "actual display quality") is small. In other words, even if the drive frequency (also referred to as the "second drive frequency") of the sub-display unit 19 included in the second section 29B is made lower than the drive frequency (also referred to as the "first drive frequency") of the sub-display unit 19 included in the first section 29A, the degradation of the actual display quality is small.

[0129] Lowering the drive frequency can reduce the power consumption of the display device. On the other hand, lowering the drive frequency also reduces the display quality. In particular, the display quality when displaying moving images is reduced. According to one aspect of the present invention, by setting the second drive frequency lower than the first drive frequency, it is possible to reduce power consumption in areas where the user's visibility is low, while suppressing a substantial decrease in display quality. According to one aspect of the present invention, it is possible to maintain display quality and reduce power consumption at the same time.

[0130] The first drive frequency is preferably 30 Hz or more and 500 Hz or less, and more preferably 60 Hz or more and 500 Hz or less. The second drive frequency is preferably equal to or less than the first drive frequency, more preferably equal to or less than half the first drive frequency, and more preferably equal to or less than one-fifth the first drive frequency. Note that the unit of drive frequency (frame rate) may be "fps" instead of "Hz."

[0131] Furthermore, among the sub-display units 19 overlapping the third region S3, the area farther from the first area 29A may be set as the third area 29C (see FIG. 6(C)), and the drive frequency (also referred to as the "third drive frequency") of the sub-display units 19 included in the third area 29C may be set lower than that of the second area 29B. The third drive frequency is preferably equal to or lower than the second drive frequency, more preferably equal to or lower than half the second drive frequency, and even more preferably equal to or lower than one-fifth the second drive frequency. By significantly reducing the number of times the image is rewritten, power consumption can be further reduced. Furthermore, rewriting of image data may be stopped as necessary. By stopping rewriting of image data, power consumption can be further reduced.

[0132] When such a driving method is used, it is preferable to use a transistor with an extremely low off-state current as the transistor that constitutes pixel circuit 51. For example, it is preferable to use an OS transistor as the transistor that constitutes pixel circuit 51. Because the off-state current of an OS transistor is extremely low, image data supplied to pixel circuit 51 can be held for a long period of time. In particular, it is preferable to use an OS transistor as transistor 52A.

[0133] Furthermore, when the video scene displayed on the display unit 13 changes, an image with significantly different brightness, contrast, or color tone from the immediately preceding image may be displayed. In such cases, a difference occurs in the timing of image switching between the first area 29A and an area with a lower drive frequency than the first area 29A, resulting in significant differences in brightness, contrast, or color tone between the two areas, potentially impairing the actual display quality. In such cases, such as when the video scene changes, it is sufficient to first rewrite image data in areas other than the first area 29A at the same drive frequency as the first area 29A, and then lower the drive frequency for the areas other than the first area 29A.

[0134] Furthermore, if it is determined that the amount of change in the gaze point G has exceeded a certain amount, the image data of areas other than the first area 29A may also be rewritten at the same drive frequency as the first area 29A, and if it is determined that the amount of change is within a certain amount, the drive frequency of the areas other than the first area 29A may be reduced. Furthermore, if it is determined that the amount of change in the gaze point G is small, the drive frequency of the areas other than the first area 29A may be further reduced.

[0135] Furthermore, if the display device 10B does not have a frame memory for storing image data, or if it has one frame memory for the entire display unit 13, the second drive frequency and the third drive frequency must both be 1 / F of the first drive frequency (F is an integer greater than or equal to 2).

[0136] By providing a frame memory corresponding to each of the multiple sub-display units 19, the second drive frequency and the third drive frequency can be set to any value, not just 1 / F of the first drive frequency. By setting the second drive frequency and the third drive frequency to any value, the degree of freedom in setting the drive frequency can be increased. Therefore, the actual degradation of display quality can be reduced.

[0137] The areas set in the display unit 13 are not limited to the three areas, the first area 29A, the second area 29B, and the third area 29C. Four or more areas may be set in the display unit 13. By setting multiple areas in the display unit 13 and gradually lowering the drive frequency, it is possible to further reduce the actual degradation of display quality.

[0138] Furthermore, the image to be displayed in the first area 29A may be subjected to the above-described upconversion process. By displaying an upconverted image in the first area 29A, it is possible to improve the display quality. Furthermore, the above-described upconversion process may be performed on an image to be displayed in an area other than the first area 29A. By displaying an upconverted image in an area other than the first area 29A, it is possible to further reduce the actual degradation in display quality when the drive frequency in areas other than the first area 29A is reduced.

[0139] It is also possible to use a high-precision algorithm to upconvert the image displayed in the first area 29A, and a low-precision algorithm to upconvert the image displayed in areas other than the first area 29A. Even in this case, it is possible to further reduce the actual degradation in display quality when the drive frequency for areas other than the first area 29A is reduced.

[0140] Furthermore, if the resolution of the image data is higher than the resolution of the display unit 13, or if high-speed rewriting and reduced power consumption are to be prioritized, down-conversion processing may be performed on the images displayed in areas other than the first area 29A depending on the purpose, etc. For example, high-speed rewriting and reduced power consumption can be achieved by rewriting the images displayed in areas other than the first area 29A every few rows, every few columns, or every few pixels.

[0141] Furthermore, by lowering the resolution (reducing the amount of information) of the image displayed in areas other than the first area 29A compared to the resolution of the image displayed in the first area 29A including the gaze point, the load during video signal generation (rendering) is reduced. This type of processing is also known as "foveated rendering." By combining foveated rendering with a reduction in the drive frequency for areas other than the first area 29A, further reductions in power consumption can be achieved while minimizing degradation in display quality.

[0142] An example of foveated rendering will be described with reference to Figures 7(A) and (B). As an example, a case will be described in which an image is displayed at normal resolution in a first area 29A, and at half the normal resolution in a second area 29B.

[0143] Fig. 7(A) shows some of the pixel circuits 51 included in the first area 29A. Fig. 7(A) illustrates 36 pixel circuits 51 arranged in a matrix of 6 rows and 6 columns. One image data is written to one pixel circuit 51. It is assumed that 36 pieces of image data represented by image data A1 to A6, image data B1 to B6, image data C1 to C6, image data D1 to D6, image data E1 to E6, and image data F1 to F6 are written to the 36 pixel circuits 51 shown in Fig. 7(A).

[0144] FIG. 7B shows some of the pixel circuits 51 included in the second area 29B. In the second area 29B, four adjacent pixel circuits 51 are used as one pixel circuit. In FIG. 7B, the four pixel circuits 51 used as one pixel circuit are shown as pixel circuits 51a. The same image data may be written to the four pixel circuits 51 included in pixel circuit 51a.

[0145] For example, image data A1 can be written to four pixel circuits 51 included in pixel circuit 51a. In this case, image data A2, image data B1, and image data B2 are not used, so the amount of image data information sent to sub-display unit 19 (section 39) can be reduced.

[0146] Similarly, when writing image data C1 to the four pixel circuits 51 included in pixel circuit 51a, image data C2, image data D1, and image data D2 are not used, thereby reducing the amount of image data information sent to sub-display unit 19 (section 39).

[0147] For example, if the resolution of the sub-display unit 19 in the first section 29A is 480 x 720 pixels, the resolution of the sub-display unit 19 in the second section 29B can be considered to be 240 x 360 pixels. Therefore, the amount of image data transmitted to the sub-display unit 19 (section 39) in the second section 29B is 1 / 4 of that in the first section 29A.

[0148] Furthermore, by using nine adjacent pixel circuits 51 as one pixel circuit, the resolution can be regarded as 160 × 240 pixels. In this case, the amount of image data transmitted to the sub-display unit 19 (section 39) included in the second section 29B is 1 / 9 of that of the first section 29A.

[0149] As described above, it is possible to reduce the amount of image data transmitted to the sub-display unit 19 by lowering the apparent resolution of the sub-display unit 19. Since the amount of image data used for image display is reduced, it is possible to reduce the load on the circuits included in the section 39, such as the input / output circuit 442, the memory circuit 443, and the drive circuit.

[0150] Furthermore, high-speed rewriting can be achieved by simultaneously rewriting image data for all sub-display units 19 instead of for each sub-display unit 19. In other words, high-speed rewriting can be achieved by simultaneously rewriting image data for all sub-display units 39 instead of for each sub-display unit 19.

[0151] Generally, in the case of line-sequential driving, the source driver circuit simultaneously writes image data to all pixels in a row while the gate driver circuit selects the pixels in that row. For example, if the display unit 13 is not divided into multiple sub-display units 19 and has a resolution of 4000 x 2000 pixels, the source driver circuit must write image data to 4000 pixels while the gate driver circuit selects one row of pixels. At a frame frequency of 120 Hz, one frame time is approximately 8.3 msec. Therefore, the gate driver circuit must select 2000 rows of pixels in approximately 8.3 msec, and the time required to select one row of pixels, i.e., the time required to write image data per pixel, is approximately 4.17 μsec. In other words, the higher the resolution of the display unit and the higher the frame frequency, the more difficult it becomes to ensure sufficient time for rewriting image data.

[0152] In the display device 10B exemplified in this embodiment, the display unit 13 is divided into four sections in the row direction. Therefore, the time required to write image data per pixel in one sub-display unit 19 can be four times longer than when the display unit 13 is not divided. According to one aspect of the present invention, even when the frame frequency is set to 240 Hz or even 360 Hz, it is easy to ensure the time required to rewrite image data, thereby realizing a display device with high display quality.

[0153] Furthermore, in the display device 10B exemplified in this embodiment, the display unit 13 is divided into four in the row direction, so the length of the wiring SL electrically connecting the source driver circuit and the pixel circuit is reduced to one-fourth, which reduces the resistance and parasitic capacitance of the wiring SL to one-fourth, thereby shortening the time required to write (rewrite) image data.

[0154] Additionally, in the display device 10B exemplified in this embodiment, the display unit 13 is divided into eight sections in the column direction, so the length of the wiring GL electrically connecting the gate driver circuit and the pixel circuit is reduced to one-eighth, which reduces the resistance and parasitic capacitance of the wiring GL to one-eighth, improving signal degradation and delay and making it easier to ensure sufficient time for rewriting image data.

[0155] According to the display device 10B of one embodiment of the present invention, it is easy to ensure sufficient time for writing image data, thereby realizing high-speed rewriting of display images. As a result, a display device with high display quality can be realized, and a display device that is particularly excellent in displaying moving images can be realized.

[0156] <Example of display module configuration> Next, a configuration example of a display module including the display device 10 (the display device 10A or the display device 10B) will be described.

[0157] 8A to 8C are perspective views of a display module 500. The display module 500 has a structure in which an FPC (Flexible Printed Circuit) 504 is provided on the terminal section 14 of the display device 10A. The FPC 504 has a structure in which wiring is provided on an insulating film. The FPC 504 is flexible. The FPC 504 functions as wiring for supplying image data (also called "video signals"), control signals, power supply potential, and the like from the outside to the display device 10A. An IC may also be mounted on the FPC 504.

[0158] 8(B) has a configuration in which a display device 10A is provided on a printed wiring board 501. The printed wiring board 501 has a structure in which wiring is provided inside or on the surface, or inside and on the surface, of a substrate made of an insulating material.

[0159] 8(B), the terminal portion 14 of the display device 10A is electrically connected to the terminal portion 502 of the printed wiring board 501 via the wire 503. The wire 503 can be formed by wire bonding. The wire bonding can be ball bonding or wedge bonding.

[0160] After forming wire 503, wire 503 may be covered with a resin material or the like. Note that display device 10A and printed wiring board 501 may be electrically connected by a method other than wire bonding. For example, display device 10A and printed wiring board 501 may be electrically connected by an anisotropic conductive adhesive, a bump, or the like.

[0161] 8(B), a terminal portion 502 of a printed wiring board 501 is electrically connected to an FPC 504. For example, when the pitch of the electrodes of the terminal portion 14 of the display device 10A differs from the pitch of the electrodes of the FPC 504, the terminal portion 14 and the FPC 504 may be electrically connected via the printed wiring board 501. Specifically, the spacing (pitch) between the multiple electrodes of the terminal portion 14 can be converted to the spacing between the multiple electrodes of the terminal portion 502 using wiring formed on the printed wiring board 501. In other words, even when the pitch of the electrodes of the terminal portion 14 differs from the pitch of the electrodes of the FPC 504, electrical connection between the electrodes of both can be achieved.

[0162] Furthermore, various elements such as resistor elements, capacitor elements, and semiconductor elements can be provided on the printed wiring board 501.

[0163] 8(C), the terminal portion 502 may be electrically connected to a connection portion 505 provided on the lower surface (the surface on which the display device 10A is not provided) of the printed wiring board 501. For example, by using a socket-type connection portion as the connection portion 505, the display module 500 can be easily attached to and detached from other devices.

[0164] <Pixel circuit configuration example> 9(A) and 9(B) show a configuration example of a pixel circuit 51 and a light-emitting element 61 connected to the pixel circuit 51. Fig. 9(A) is a diagram showing the connection of each element, and Fig. 9(B) is a diagram schematically showing the hierarchical relationship between a layer 20 including a drive circuit, a layer 50 including a plurality of transistors included in the pixel circuit, and a layer 60 including a light-emitting element.

[0165] 9A and 9B includes a transistor 52A, a transistor 52B, a transistor 52C, and a capacitor 53. The transistors 52A, 52B, and 52C can be OS transistors. Each of the OS transistors 52A, 52B, and 52C preferably includes a back gate electrode. In this case, the back gate electrode can be configured to receive the same signal as the gate electrode, or a signal different from that of the gate electrode.

[0166] The transistor 52B includes a gate electrode electrically connected to the transistor 52A, a first electrode electrically connected to the light-emitting element 61, and a second electrode electrically connected to a wiring ANO. The wiring ANO is a wiring for applying a potential for supplying a current to the light-emitting element 61.

[0167] Transistor 52A has a first terminal electrically connected to the gate electrode of transistor 52B, a second terminal electrically connected to a wiring SL that functions as a source line, and a gate electrode that has the function of controlling the conductive state or non-conductive state based on the potential of wiring GL1 that functions as a gate line.

[0168] The transistor 52C includes a first terminal electrically connected to the wiring V0, a ​​second terminal electrically connected to the light-emitting element 61, and a gate electrode having a function of controlling the conductive state or non-conductive state based on the potential of the wiring GL2 functioning as a gate line. The wiring V0 is a wiring for applying a reference potential and a wiring for outputting a current flowing through the pixel circuit 51 to the drive circuit 30 or the functional circuit 40.

[0169] The capacitor 53 includes a conductive film electrically connected to the gate electrode of the transistor 52B and a conductive film electrically connected to the second electrode of the transistor 52C.

[0170] The light-emitting element 61 includes a first electrode electrically connected to the first electrode of the transistor 52B and a second electrode electrically connected to a wiring VCOM. The wiring VCOM is a wiring for applying a potential for supplying a current to the light-emitting element 61.

[0171] This allows the intensity of light emitted by the light-emitting element 61 to be controlled in accordance with the video signal applied to the gate electrode of the transistor 52B. Also, the reference potential of the wiring V0 applied via the transistor 52C can suppress variations in the gate-source voltage of the transistor 52B.

[0172] Furthermore, a current value that can be used to set pixel parameters can be output from the wiring V0. More specifically, the wiring V0 can function as a monitor line for outputting the current flowing through the transistor 52B or the current flowing through the light-emitting element 61 to the outside. The current output to the wiring V0 is converted into a voltage by a source follower circuit or the like and output to the outside. Alternatively, it can be converted into a digital signal by an AD converter or the like and output to the functional circuit 40 or the like.

[0173] Note that the light-emitting element described in one embodiment of the present invention refers to a self-luminous display element such as an organic light-emitting diode (OLED). Note that the light-emitting element electrically connected to the pixel circuit can be a self-luminous light-emitting element such as an LED (light-emitting diode), a micro LED, a QLED (quantum-dot light-emitting diode), or a semiconductor laser.

[0174] In the configuration shown in FIG. 9B as an example, the wiring electrically connecting the pixel circuits 51 and the driver circuit 30 can be shortened, thereby reducing the wiring resistance of the wiring. This allows data to be written at high speed, enabling the display device 10A to be driven at high speed. This allows the display device 10A to have a sufficient frame period even when the number of pixel circuits 51 is increased, thereby increasing the pixel density of the display device 10A. Furthermore, increasing the pixel density of the display device 10A can increase the resolution of images displayed by the display device 10A. For example, the pixel density of the display device 10A can be 1000 ppi or more, 5000 ppi or more, or 7000 ppi or more. Therefore, the display device 10A can be used as a display device for AR or VR, for example, and is suitable for use in electronic devices such as HMDs, where the display unit is close to the user.

[0175] 9A and 9B show an example of the pixel circuit 51 including three transistors in total, but one embodiment of the present invention is not limited to this. Below, examples of the configuration and driving method of a pixel circuit that can be applied to the pixel circuit 51 will be described.

[0176] A pixel circuit 51A shown in Fig. 10A includes a transistor 52A, a transistor 52B, and a capacitor 53. Fig. 10A also illustrates a light-emitting element 61 connected to the pixel circuit 51A. A wiring SL, a wiring GL, a wiring ANO, and a wiring VCOM are electrically connected to the pixel circuit 51A. The pixel circuit 51A has a configuration in which the transistor 52C is removed from the pixel circuit 51 shown in Fig. 9A, and the wirings GL1 and GL2 are replaced with wiring GL.

[0177] The transistor 52A has a gate electrically connected to the wiring GL, one of its source and drain electrically connected to the wiring SL, and the other electrically connected to the gate of the transistor 52B and one electrode of the capacitor C1. The transistor 52B has one of its source and drain electrically connected to the wiring ANO, and the other electrically connected to the anode of the light-emitting element 61. The capacitor C1 has the other electrode electrically connected to the anode of the light-emitting element 61. The light-emitting element 61 has a cathode electrically connected to the wiring VCOM.

[0178] 10B has a configuration in which a transistor 52C is added to the pixel circuit 51A. A wiring V0 is electrically connected to the pixel circuit 51B.

[0179] A pixel circuit 51C shown in FIG. 10(C) is an example in which transistors having a pair of gates electrically connected are used as the transistors 52A and 52B of the pixel circuit 51A. A pixel circuit 51D shown in FIG. 10(D) is an example in which the same transistors are used as the pixel circuit 51B. This can increase the current that the transistors can pass. Note that, although transistors having a pair of gates electrically connected are used as all the transistors here, this is not a limitation. Alternatively, a transistor having a pair of gates electrically connected to different wirings may be used. For example, reliability can be improved by using a transistor in which one of the gates is electrically connected to a source.

[0180] 11A is a pixel circuit 51E obtained by adding a transistor 52D to the pixel circuit 51B. The pixel circuit 51E is electrically connected to wirings GL1, GL2, and GL3, which function as gate lines. In the present embodiment and other examples, the wirings GL1, GL2, and GL3 may be collectively referred to as wirings GL. Therefore, the number of wirings GL is not limited to one, and may be multiple.

[0181] The gate of the transistor 52D is electrically connected to a wiring GL3, one of the source and the drain of the transistor 52D is electrically connected to the gate of the transistor 52B, and the other is electrically connected to a wiring V0. The gate of the transistor 52A is electrically connected to a wiring GL1, and the gate of the transistor 52C is electrically connected to a wiring GL2.

[0182] By simultaneously turning on transistors 52C and 52D, the source and gate of transistor 52B have the same potential, and transistor 52B can be turned off. This forcibly cuts off the current flowing through light-emitting element 61. Such a pixel circuit is suitable for use in a display method in which display periods and off periods are alternately provided.

[0183] 11B is an example in which a capacitor 53A is added to the pixel circuit 51E. The capacitor 53A functions as a storage capacitor.

[0184] 11(C) and 11(D) are examples in which transistors each having a pair of gates are applied to the pixel circuit 51E or 51F, respectively. Transistors 52A, 52C, and 52D are transistors in which a pair of gates are electrically connected, and transistor 52B is a transistor in which one gate is electrically connected to its source.

[0185] A pixel circuit 51I shown in FIG. 12 includes a transistor 52A, a transistor 52B, a transistor 52C, a transistor 52D, a transistor 52E, a transistor 52F, a transistor 52G, a capacitor 53A, a capacitor 53B, and a capacitor 53C.

[0186] In the pixel circuit 51I, the gate of the transistor 52A is electrically connected to the wiring GL1, one of the source and the drain of the transistor 52A is electrically connected to the wiring SL, and the other of the source and the drain is electrically connected to the gate of the transistor 52B. The back gate of the transistor 52B is electrically connected to one electrode of the capacitor 53B. One of the source and the drain of the transistor 52B is electrically connected to the wiring ANO. The gate of the transistor 52D is electrically connected to the wiring GL2, and one of the source and the drain of the transistor 52D is electrically connected to the other of the source and the drain of the transistor 52A, the gate of the transistor 52B, and one electrode of the capacitor 53A.

[0187] The other of the source and the drain of the transistor 52D is electrically connected to the other electrode of the capacitor 53A, the other electrode of the capacitor 53B, one of the source and the drain of the transistor 52C, and one of the source and the drain of the transistor 52F. The gate of the transistor 52C is electrically connected to a wiring GL1, and the other of the source and the drain of the transistor 52C is electrically connected to a wiring V0.

[0188] A gate of the transistor 52E is electrically connected to the wiring GL2, and one of a source and a drain of the transistor 52E is electrically connected to the wiring V1. The other of the source and the drain of the transistor 52E is electrically connected to the backgate of the transistor 52B and one electrode of the capacitor 53B.

[0189] The gate of the transistor 52G is electrically connected to the wiring GL1, and one of the source and the drain of the transistor 52G is electrically connected to the wiring GL3. The other of the source and the drain of the transistor 52G is electrically connected to the gate of the transistor 52F and one electrode of the capacitor 53C. The other of the source and the drain of the transistor 52F is electrically connected to the other electrode of the capacitor 53C and the anode of the light-emitting element 61.

[0190] Next, a description will be given of an example of a method for driving a display device to which pixel circuit 51 E is applied. Note that the same driving method can also be applied to display devices to which pixel circuits 51 F, 51 G, and 51 H are applied.

[0191] 13 shows a timing chart relating to a method for driving a display device to which the pixel circuit 51E is applied. The timing chart shows the transition of the potentials of the wirings GL1[k], GL2[k], and GL3[k], which are gate lines in the kth row, and the wirings GL1[k+1], GL2[k+1], and GL3[k+1], which are gate lines in the k+1th row. The timing chart also shows the timing of signals applied to the wirings SL, which function as source lines.

[0192] Here, an example of a driving method is shown in which one horizontal period is divided into a light-on period and a light-off period. The horizontal period for the kth row and the horizontal period for the k+1th row are shifted by the selection period of the gate line.

[0193] During the lighting period of the kth row, a high-level potential is first applied to the wiring GL1[k] and the wiring GL2[k], and a source signal is applied to the wiring SL. This brings the transistors 52A and 52C into conduction, and a potential corresponding to the source signal is written from the wiring SL to the gate of the transistor 52B. After that, a low-level potential is applied to the wiring GL1[k] and the wiring GL2[k], bringing the transistors 52A and 52C into non-conduction, and the gate potential of the transistor 52B is maintained.

[0194] Next, the lighting period of the k+1th row begins, and data is written by the same operation as above.

[0195] Next, the off period will be described. During the off period of the kth row, a high-level potential is applied to the wiring GL2[k] and the wiring GL3[k]. As a result, the transistors 52C and 52D are turned on, and the same potential is applied to the source and gate of the transistor 52B, so that almost no current flows through the transistor 52B. This turns off the light-emitting element 61. All subpixels located in the kth row are turned off. The subpixels in the kth row remain off until the next light-on period.

[0196] Next, the process transitions to the off period of the k+1th row, and all the sub-pixels of the k+1th row are in the off state in the same manner as above.

[0197] This driving method, which does not always light up during one horizontal period but instead provides an off period during one horizontal period, can also be called duty driving. By using duty driving, it is possible to reduce the afterimage phenomenon when displaying moving images, thereby realizing a display device with high moving image display performance. In particular, in VR equipment, reducing afterimages can help alleviate so-called VR sickness.

[0198] In duty drive, the ratio of the on period to one horizontal period can be called the duty ratio. For example, a duty ratio of 50% means that the on period and the off period are the same length. The duty ratio can be freely set and can be adjusted as needed within a range of, for example, more than 0% and less than 100%.

[0199] Furthermore, a configuration different from the pixel circuit described above will be described with reference to FIGS. 14(A) and 14(B).

[0200] Fig. 14(A) shows a block diagram of a pixel 230. The pixel 230 has a pixel circuit 51J and a light-emitting element (LED) 61. The pixel circuit 51J shown in Fig. 14(A) has a switching transistor (Switching Tr), a driving transistor (Driving Tr), and a memory circuit MEM (Memory).

[0201] FIG. 14B shows a specific circuit diagram of the pixel circuit 51J.

[0202] 14B includes a transistor 52w, a transistor 52A, a transistor 52B, a transistor 52C, a capacitor 53s, and a capacitor 53w. Also, in FIG. 14B, a light-emitting element 61 is connected to the pixel circuit 51J.

[0203] Data DataW is supplied to the memory circuit MEM via a wiring SL2 and a transistor 52A. When the data DataW is supplied to the pixel in addition to the image data Data, the current flowing through the light-emitting element increases, and the display device can display high luminance.

[0204] The transistor 52w functions as a switching transistor. The transistor 52B functions as a driving transistor. One of the source or drain of the transistor 52w is electrically connected to one electrode of a capacitor 53w. The other electrode of the capacitor 53w is electrically connected to one of the source or drain of the transistor 52A. One of the source or drain of the transistor 52A is electrically connected to the gate of the transistor 52B. The gate of the transistor 52B is electrically connected to one electrode of a capacitor 53s. The other electrode of the capacitor 53s is electrically connected to one of the source or drain of the transistor 52B. One of the source or drain of the transistor 52B is electrically connected to one of the source or drain of the transistor 52C. One of the source or drain of the transistor 52C is electrically connected to one electrode of the light-emitting element 61. Although each transistor shown in FIG. 14B has a backgate electrically connected to the gate, the connection of the backgate is not limited to this. The transistor does not necessarily have to have a backgate.

[0205] Here, a node to which the other electrode of capacitor 53w, one of the source or drain of transistor 52A, the gate of transistor 52B, and one electrode of capacitor 53s are connected is referred to as node NM. Also, a node to which the other electrode of capacitor 53s, one of the source or drain of transistor 52B, one of the source or drain of transistor 52C, and one electrode of light-emitting element 61 are connected is referred to as node NA.

[0206] The gate of the transistor 52w is electrically connected to the wiring GL1. The gate of the transistor 52C is electrically connected to the wiring GL1. The gate of the transistor 52A is electrically connected to the wiring GL2. The other of the source and the drain of the transistor 52w is electrically connected to the wiring SL1. The other of the source and the drain of the transistor 52C is electrically connected to the wiring V0. The other of the source and the drain of the transistor 52A is electrically connected to the wiring SL2. Note that in this embodiment and the like, the wirings SL1 and SL2 may be collectively referred to as wirings SL. Therefore, the number of wirings SL is not limited to one, and may be multiple.

[0207] The other of the source and the drain of the transistor 52B is electrically connected to the wiring ANO. The other electrode of the light-emitting element 61 is electrically connected to the wiring VCOM.

[0208] The wirings GL1 and GL2 can function as signal lines for controlling the operation of transistors. The wiring SL1 can function as a signal line for supplying image data Data to pixels. The wiring SL2 can function as a signal line for writing data DataW to the memory circuit MEM. For example, the wiring SL2 can function as a signal line for supplying a correction signal to pixels. The wiring V0 can function as a monitor line for acquiring the electrical characteristics of the transistor 52B. Furthermore, by supplying a specific potential from the wiring V0 to the other electrode of the capacitor 53s via the transistor 52C, writing of a video signal can be stabilized.

[0209] The transistor 52A and the capacitor 53w constitute a memory circuit MEM. The node NM is a memory node, and data DataW supplied from the wiring SL2 can be written to the node NM by turning on the transistor 52A. By using an OS transistor with extremely low off-state current as the transistor 52A, the potential of the node NM can be held for a long time.

[0210] In the pixel circuit 51J, image data Data supplied from the line SL1 is supplied to a capacitor 53w via a transistor 52w. One of the source or drain of the transistor 52w is capacitively coupled to a node NM. Therefore, the potential of the node NM to which data DataW is written changes in accordance with the image data Data. In addition, the node NA and the node NM are capacitively coupled via a capacitor 53s. Therefore, the potential of the node NA changes in accordance with the data DataW and the image data Data.

[0211] The transistor 52w functions as a selection transistor that determines whether or not to receive the image data Data. The transistor 52C functions as a reset transistor that determines whether or not to make the potential of the node NA equal to that of the wiring V0.

[0212] At least a part of the configuration examples exemplified in this embodiment and the corresponding drawings can be appropriately combined with other configuration examples or drawings.

[0213] (Embodiment 2) In this embodiment, an example of an electronic device to which a display device according to one embodiment of the present invention can be applied will be described. The display device according to one embodiment of the present invention can be suitably used in, for example, a wearable electronic device for VR or AR applications.

[0214] <Example of electronic device configuration> 15(A) shows a perspective view of an eyeglass-type (goggle-type) electronic device 100 as an example of a wearable electronic device. In the electronic device 100 shown in FIG. 15(A), a pair of display devices 10 (display device 10_L and display device 10_R), a motion detection unit 101, a gaze detection unit 102, a calculation unit 103, and a communication unit 104 are provided in a housing 105. The display device 10A or the display device 10B described in the above embodiment can be used as the display device 10 provided in the electronic device 100.

[0215] FIG. 15(B) is a block diagram of the electronic device 100 of FIG. 15(A). Similar to FIG. 15(A), the electronic device 100 includes a display device 10_L, a display device 10_R, a motion detection unit 101, a gaze detection unit 102, a calculation unit 103, and a communication unit 104, and transmits and receives various signals between them via a bus wiring BW. The display device 10_L and the display device 10_R each include a plurality of pixels 230, a drive circuit 30, and a functional circuit 40. Note that one or both of the display devices 10_L and 10_R may not include the functional circuit 40, and the calculation unit 103 may be used as the functional circuit 40. Each pixel 230 includes one light-emitting element 61 and one pixel circuit 51. Therefore, the display device 10_L and the display device 10_R each include a plurality of light-emitting elements 61 and a plurality of pixel circuits 51.

[0216] The motion detection unit 101 has a function of detecting the movement of the housing 105, that is, the movement of the head of the user wearing the electronic device 100. The motion detection unit 101 may use, for example, a motion sensor using MEMS technology. The motion sensor may be a three-axis motion sensor or a six-axis motion sensor. In this specification and the like, information regarding the movement of the housing 105 detected by the motion detection unit 101 may be referred to as "first information" or "motion information."

[0217] The gaze detection unit 102 has a function of acquiring information about the user's gaze. Specifically, it has a function of detecting the user's gaze. The user's gaze can be acquired by an eye tracking method such as the Pupil Center Corneal Reflection method or the Bright / Dark Pupil Effect method. Alternatively, it can be acquired by an eye tracking method using a laser or ultrasound.

[0218] The calculation unit 103 has a function of calculating the user's gaze point using the gaze detection result of the gaze detection unit 102. That is, it is possible to know which object in the images displayed on the display devices 10_L and 10_R the user is gazing at. It is also possible to know whether the user is gazing at a part other than the screen. Note that in this specification, the information about the user's gaze obtained by the gaze detection unit 102 (the gaze detection result) may be referred to as "second information" or "gaze information."

[0219] The calculation unit 103 has a function of performing drawing processing (calculation processing of image data) in accordance with the movement of the housing 105. The drawing processing in accordance with the movement of the housing 105 in the calculation unit 103 is performed using the first information and image data input from the outside via the communication unit 104. As the image data, for example, 360-degree omnidirectional image data can be used. The 360-degree omnidirectional image data may be, for example, image data captured by an omnidirectional camera (omnidirectional camera, 360° camera), or may be image data generated by computer graphics or the like. The calculation unit 103 has a function of converting the 360-degree omnidirectional image data in accordance with the first information into image data that can be displayed on the display devices 10_L and 10_R.

[0220] The calculation unit 103 also has a function of using the second information to determine the sizes and shapes of multiple regions to be set on the display unit of each of the display devices 10_L and 10_R. Specifically, the calculation unit 103 calculates a gaze point on the display unit in accordance with the second information, and sets a first region S1 to a third region S3, etc., which will be described later, on the display unit based on the gaze point.

[0221] As the calculation unit 103, in addition to a central processing unit (CPU), other microprocessors such as a digital signal processor (DSP) and a graphics processing unit (GPU) can be used alone or in combination. Furthermore, these microprocessors may be configured to be realized by a programmable logic device (PLD) such as a field programmable gate array (FPGA) or a field programmable analog array (FPAA).

[0222] The arithmetic unit 103 performs various data processing and program control by interpreting and executing instructions from various programs using a processor. The programs executable by the processor may be stored in a memory area of ​​the processor or in a separately provided storage unit. The storage unit may be, for example, a storage device using nonvolatile storage elements such as flash memory, MRAM (Magnetoresistive Random Access Memory), PRAM (Phase change RAM), ReRAM (Resistive RAM), or FeRAM (Ferroelectric RAM), or a storage device using volatile storage elements such as DRAM (Dynamic RAM) and SRAM (Static RAM).

[0223] The communication unit 104 has a function of communicating with external devices wirelessly or via a wired connection to acquire various data such as image data. The communication unit 104 may be provided with, for example, a radio frequency (RF) circuit for transmitting and receiving RF signals. The radio frequency circuit converts between electromagnetic signals and electrical signals in a frequency band defined by the laws of each country, and uses the electromagnetic signals to communicate wirelessly with other communication devices. When performing wireless communication, communication protocols or technologies that can be used include communication standards such as LTE (Long Term Evolution), GSM (Global System for Mobile Communication: registered trademark), EDGE (Enhanced Data Rates for GSM Evolution), CDMA2000 (Code Division Multiple Access 2000), and WCDMA (Wideband Code Division Multiple Access: registered trademark), as well as IEEE communication standards such as Wi-Fi (registered trademark), Bluetooth (registered trademark), and ZigBee (registered trademark). It is also possible to use the third generation mobile communication system (3G), fourth generation mobile communication system (4G), or fifth generation mobile communication system (5G) defined by the International Telecommunication Union (ITU).

[0224] The communication unit 104 may also have external ports such as a terminal for connecting to a LAN (Local Area Network), a terminal for receiving digital broadcasts, and a terminal for connecting an AC adapter.

[0225] The display device 10_L and the display device 10_R each have a plurality of light-emitting elements 61, a plurality of pixel circuits 51, a drive circuit 30, and a functional circuit 40. The pixel circuit 51 has a function of controlling the light emission of the light-emitting elements 61. The drive circuit 30 has a function of controlling the pixel circuit 51. Note that the functional circuit 40 may not be provided in one or both of the display device 10_L and the display device 10_R, and the calculation unit 103 may be used as the functional circuit 40.

[0226] The information on the multiple regions in the display unit of the display device determined by the calculation unit 103 is used for driving to vary the resolution for each region. The function circuit 40 has a function of controlling the drive circuit 30 to perform high-resolution display in regions close to the gaze point, and to control the drive circuit 30 to perform low-resolution display in regions farther from the gaze point.

[0227] For example, a display with low resolution can be achieved by rewriting image data every other pixel or every few pixels. Reducing the number of pixels for which image data is rewritten can reduce the power consumption of the display device. Pixels that are not rewritten may emit light, but it is preferable that they do not emit light. Stopping the emission of pixels that are not rewritten can reduce the power consumption of the display device.

[0228] As in one embodiment of the present invention, a calculation unit 103 may be provided separately from the functional circuit 40. By providing the calculation unit 103, it is possible to offload high-load calculation processes, such as drawing processing in response to the movement of the housing 105 and determining multiple regions (first region S1 to third region S3) according to the gaze point, to the calculation unit 103. On the other hand, by offloading the processing for controlling the drive circuit 30 to the functional circuit 40, it is possible to reduce the circuit size and power consumption. Wearable electronic devices, in particular, need to detect the user's head movement, line of sight movement, and the like within a short period of time, so high-speed calculation processing is required, resulting in high power consumption for calculation. On the other hand, in one embodiment of the present invention, the function of outputting a control signal for the drive circuit 30 can be separated from the calculation unit 103 and performed by the functional circuit 40. Therefore, the load is not concentrated on one calculation unit, and the load on the calculation unit can be reduced. Consequently, overall power consumption can be reduced.

[0229] The electronic device 100 may also be provided with a sensor 125. The sensor 125 preferably has a function of acquiring information from one or more of the user's vision, hearing, touch, taste, and smell. More specifically, the sensor 125 preferably has a function of detecting or measuring information from one or more of force, displacement, position, speed, acceleration, angular velocity, number of rotations, distance, light, magnetism, temperature, sound, time, electric field, current, voltage, power, radiation, humidity, gradient, vibration, odor, and infrared light. The electronic device 100 may be provided with one or more sensors 125.

[0230] The sensor 125 may be used to measure ambient temperature, humidity, illuminance, odor, and the like. The sensor 125 may also be used to acquire information for personal authentication using, for example, a fingerprint, palm print, iris, retina, pulse shape (including vein shape and artery shape), or face. The sensor 125 may also be used to measure the user's blink frequency, eyelid movement, pupil size, body temperature, pulse rate, or blood oxygen saturation, and detect the user's fatigue level and health condition. The electronic device 100 may detect the user's fatigue level and health condition, and display a warning or the like on the display device 10.

[0231] Furthermore, the movement of the user's line of sight and eyelids may be detected to control the operation of electronic device 100. Since the user does not need to touch electronic device 100 to operate it, input operations can be performed without holding anything in both hands (both hands are free).

[0232] The electronic device 100 may also be provided with an imaging device 129 for capturing images of the surroundings. The imaging device 129 may capture images of the surroundings and display the images on the display device 10. Other information may be superimposed on the image captured by the imaging device 129 and displayed on the display device 10.

[0233] 16(A) is a perspective view showing electronic device 100. In Fig. 16(A), housing 105 of electronic device 100 has, in addition to a pair of display devices 10_L and 10_R and a calculation unit 103, a mounting unit 106, a buffer member 107, a pair of lenses 108, and the like, for example. The pair of display devices 10_L and 10_R are provided inside housing 105 at positions that can be viewed through lenses 108.

[0234] 16(A) is provided with an input terminal 109 and an output terminal 110. A cable can be connected to the input terminal 109 for supplying image data from a video output device or the like, or for supplying power for charging a battery (not shown) provided within the housing 105. The output terminal 110 functions as, for example, an audio output terminal, and can be connected to earphones, headphones, or the like.

[0235] Furthermore, it is preferable that the housing 105 has a mechanism for adjusting the left-right positions of the lens 108 and the display devices 10_L and 10_R so that they are optimally positioned according to the position of the user's eyes.It is also preferable that the housing 105 has a mechanism for adjusting the focus by changing the distance between the lens 108 and the display devices 10_L and 10_R.

[0236] The cushioning member 107 is a portion that comes into contact with the user's face (forehead, cheeks, etc.). The cushioning member 107 comes into close contact with the user's face, thereby preventing external light from entering (light leakage), and enhancing the sense of immersion. It is preferable to use a soft material for the cushioning member 107 so that it comes into close contact with the user's face when the user wears the electronic device 100. Using such a material is preferable because it feels good on the skin and does not make the user feel cold when worn in cold seasons, etc. It is preferable to make the members that come into contact with the user's skin, such as the cushioning member 107 or the wearing part 106, removable, as this makes cleaning or replacement easier.

[0237] The electronic device of one embodiment of the present invention may further include earphones 106A. The earphones 106A have a communication unit (not shown) and have a wireless communication function. The earphones 106A can output audio data using the wireless communication function. Note that the earphones 106A may have a vibration mechanism in order to function as bone conduction earphones.

[0238] 16(B), the earphone 106A can be configured to be directly connected to the wearing unit 106 or connected by wire. The earphone 106B and the wearing unit 106 may have a magnet. This allows the earphone 106B to be fixed to the wearing unit 106 by magnetic force, which is preferable as it makes storage easier.

[0239] Fig. 17 is a perspective view of a wearable electronic device 100A having a configuration different from that of Fig. 15(A). In the electronic device 100A, an example is shown in which the gaze detection unit 102 is provided on the rear surface of each of the display device 10_R and the display device 10_L.

[0240] 17(B) and 17(C) are schematic diagrams illustrating the display device 10 (the display device 10_R or the display device 10_L), the gaze detection unit 102, and the lens 108. Also, FIGS. 17(B) and 17(C) show the user's eye 112i.

[0241] As shown in Fig. 17(B), light 115A emitted from the display device 10 is refracted by the lens 108 and reaches the eye 112i. In Fig. 17(B), the light 115A is shown as being focused on the surface of the eye 112i, but in reality, an image is formed on the retina via the crystalline lens.

[0242] 17(C), light 115B, which is reflected light from the eyeball of the eye 112i, is refracted by the lens 108, passes through the display device 10, and reaches the gaze detection unit 102. This makes it possible to obtain the position of the pupil of the eye 112i.

[0243] The display device 10 can be a so-called see-through display that transmits a portion of external light. A see-through display can be configured to use a translucent substrate (e.g., glass) and transmit light through gaps between wiring, electrodes, etc. Furthermore, the transmittance of external light can be increased by using a translucent material such as metal oxide for part of the conductive film and semiconductor film that constitute the wiring, electrodes, transistors, etc. The transmittance of external light of a see-through display can be determined taking into account the sensitivity of the gaze detection unit 102, the brightness of the light source, the reflectance of the subject, etc., but is preferably 1% to 90%, more preferably 2% to 70%, and even more preferably 3% to 50%. The higher the transmittance, the higher the accuracy of gaze detection. On the other hand, if the transmittance is too high, it becomes difficult to increase the display brightness, so the transmittance is preferably 50% or less.

[0244] An image sensor can be used as the gaze detection unit 102. Examples include a CMOS (Complementary Metal Oxide Semiconductor) image sensor and a CCD (Charge Coupled Device) image sensor, but using a CMOS sensor is preferable because it can be made thin and lightweight.

[0245] The gaze detection unit 102 is fixed to the rear surface of the display device 10 (the surface opposite the display surface) via a bonding layer 118. The bonding layer 118 can be made of a light-transmitting adhesive. The gaze detection unit 102 and the display device 10 may be bonded directly without the bonding layer 118. Alternatively, the gaze detection unit 102 and the display device 10 may be provided independently of each other without the bonding layer 118. By configuring the gaze detection unit 102 and the display device 10 to be able to directly exchange signals, synchronization can be facilitated by sharing signals such as timing signals (clock signals). Furthermore, the power supply potential can also be shared, simplifying the configuration.

[0246] The lens 108 is optimized so that the display surface of the display device 10 can be clearly seen from the position of the eye 112i. Therefore, light reflected from the surface of the eyeball of the eye 112i does not necessarily form an image on the gaze detection unit 102. In this case, it is preferable to optimize the position of the gaze detection unit 102 in the depth direction (the optical axis direction of the lens 108). For example, the position of the gaze detection unit 102 can be optimized by adjusting the thickness of the bonding layer 118, the thickness of the substrate used in the display device 10, etc. Furthermore, using a lens with a deep depth of field as the lens 108 is preferable because it increases the degree of freedom in the position of the lens 108. For example, the gaze detection unit 102 and the display device 10 can be directly bonded together.

[0247] The image displayed on the display device 10 can be used as a light source for capturing an image of the eyeball of the eye 112i by the gaze detection unit 102. This allows gaze detection to be performed continuously while the image is being displayed. Alternatively, a light source other than the display device 10 can be provided. In this case, since using visible light as the light source may reduce the sense of immersion, it is preferable to use a light source that emits infrared light.

[0248] <Example of electronic device operation> An example of the operation of electronic device 100 will be described with reference to the drawings. Fig. 18 is a flowchart illustrating the example of the operation of electronic device 100. The example of the operation of electronic device 100 described in this embodiment can also be applied to electronic device 100A.

[0249] The motion detection unit 101 acquires first information (information relating to the motion of the housing 105) (step E11).

[0250] The gaze detection unit 102 acquires second information (information relating to the user's gaze) (step E12).

[0251] The calculation unit 103 performs a rendering process of the 360-degree omnidirectional image data based on the first information (step E13).

[0252] Step E13 will be described with a specific example. The schematic diagram shown in Fig. 19(A) illustrates a user 112 positioned at the center of 360-degree omnidirectional image data 111. The user can view an image 114A in a direction 113A displayed on display device 10 of electronic device 100.

[0253] 19(B) shows how user 112 moves his / her head from the schematic diagram of Fig. 19(A) to view image 114B in direction 113B. User 112 can recognize the space represented by 360-degree omnidirectional image data 111 as image 114A changes to image 114B in accordance with the movement of the housing of electronic device 100.

[0254] 19(A) and 19(B), the user 112 moves the housing of the electronic device 100 in accordance with the movement of his / her head. The higher the rendering processing capability used to process the images obtained from the 360-degree omnidirectional image data 111 in accordance with the movement of the electronic device 100, the more the user 112 can recognize a virtual space that is more in line with the space in the real world.

[0255] Based on the second information, the calculation unit 103 determines a plurality of regions corresponding to the gaze point G for the display unit region of the display device (step E14). For example, as shown in Fig. 20(A), a first region S1 including the gaze point G is determined, and a second region S2 adjacent to the first region S1 is determined. In addition, the outside of the second region is defined as a third region S3.

[0256] Step E14 will be explained using a specific example.

[0257] Generally, human visual fields can be broadly classified into the following five areas, although there are individual differences. The discriminative visual field is the area where visual functions such as visual acuity and color discrimination are strongest, and refers to the area within approximately 5° of the center of the visual field (the area including the point of fixation). The useful visual field is the area in which specific information can be instantly identified using eye movement alone, and refers to the area adjacent to the discriminative visual field, within approximately 30° horizontally and 20° vertically of the center of the visual field (point of fixation). The stable fixation field is the area in which specific information can be identified effortlessly with head movement, and refers to the area adjacent to the effective visual field, within approximately 90° horizontally and 70° vertically of the center of the visual field. The induced visual field is the area in which the presence of specific objects can be detected, but discrimination ability is low, and refers to the area adjacent to the stable fixation field, within approximately 100° horizontally and 85° vertically of the center of the visual field. The auxiliary visual field is an area in which the ability to distinguish specific objects is significantly reduced, but the presence of stimuli can be detected. It is an area within approximately 100° to 200° horizontally and approximately 85° to 130° vertically from the center of the visual field, adjacent to and outside the induced visual field.

[0258] From the above, it can be seen that the image quality from the discriminative field to the effective field is important in the image 114. In particular, the image quality of the discriminative field is crucial.

[0259] FIG. 20(A) is a schematic diagram showing a state in which a user 112 is observing an image 114 displayed on a display unit of a display device 10 provided in an electronic device 100 from the front (image display surface). The image 114 shown in FIG. 20(A) also corresponds to the display unit. A fixation point G at the end of the line of sight 113 of the user 112 is also shown on the image 114. In this specification, the area on the image 114 that includes the discriminative visual field is referred to as a "first area S1," and the area that includes the effective visual field is referred to as a "second area S2." Furthermore, the area that includes the stable fixation visual field, the induced visual field, or the auxiliary visual field is referred to as a "third area S3."

[0260] In FIG. 20(A), the boundary (outline) between the first region S1 and the second region S2 is shown as a curve, but is not limited thereto. As shown in FIG. 20(B), the boundary (outline) between the first region S1 and the second region S2 may be rectangular or polygonal. It may also be a shape that combines straight lines and curves. The display unit of the display device 10 may be divided into two regions, with the region that includes the discriminative visual field and the effective visual field designated as the first region S1 and the other region designated as the second region S2. In this case, the third region S3 is not formed.

[0261] 21(A) is a top view of image 114 displayed on the display unit of display device 10 of electronic device 100, and FIG. 21(B) is a side view of image 114 displayed on the display unit of display device 10 of electronic device 100. In this specification, the horizontal angle of first region S1 is indicated as "angle θx1," and the horizontal angle of second region S2 is indicated as "angle θx2" (see FIG. 21(A)). Also, in this specification, the vertical angle of first region S1 is indicated as "angle θy1," and the vertical angle of second region S2 is indicated as "angle θy2" (see FIG. 21(B)).

[0262] For example, by setting the angle θx1 to 10° and the angle θy1 to 10°, the area of ​​the first region S1 can be increased. In this case, part of the effective visual field is included in the first region S1. Furthermore, by setting the angle θx2 to 45° and the angle θy2 to 35°, the area of ​​the second region S2 can be increased. In this case, part of the stable fixation field is included in the second region S2.

[0263] The position of the gaze point G fluctuates slightly due to fluctuations in the line of sight 113. For this reason, it is preferable that the angles θx1 and θy1 are each equal to or greater than 5° and less than 20°. Setting the area of ​​the first region S1 to be larger than the discriminative field of view stabilizes the operation of the display device 10 and improves the visibility of the image.

[0264] When the line of sight 113 of the user 112 moves, the point of gaze G also moves. Therefore, the first region S1 and the second region S2 also move. For example, when the amount of change in the line of sight 113 exceeds a certain amount, it is determined that the line of sight 113 has moved. That is, when the amount of change in the point of gaze G exceeds a certain amount, it is determined that the point of gaze G has moved. Furthermore, when the amount of change in the line of sight 113 becomes equal to or less than a certain amount, it is determined that the movement of the line of sight 113 has stopped, and the first region S1 to the third region S3 are determined. That is, when the amount of change in the point of gaze G becomes equal to or less than a certain amount, it is determined that the movement of the point of gaze G has stopped, and the first region S1 to the third region S3 are determined.

[0265] In the functional circuit 40, the drive circuit 30 is controlled in accordance with the plurality of regions (first region S1 to third region S3) (step E15). For example, the drive frequency is adjusted in accordance with the plurality of regions.

[0266] At least a part of the configuration examples exemplified in this embodiment and the corresponding drawings can be appropriately combined with other configuration examples or drawings.

[0267] (Embodiment 3) One embodiment of the present invention can be suitably used in a mobile information terminal such as a smartphone. In this embodiment, a mobile information terminal according to one embodiment of the present invention will be described with reference to the drawings. Note that other embodiments can be referred to for matters not described in this embodiment.

[0268] 22(A) and 23(A) are diagrams showing how a user 112 uses a mobile information terminal 900. Fig. 22(B) and Fig. 23(B) are front views of the mobile information terminal 900. Fig. 22(C) and Fig. 23(C) are diagrams showing the operating states of the display unit 13.

[0269] The mobile information terminal 900 has a gaze detection unit 102, a distance detection unit 901, a speaker 902, a microphone 903, operation buttons 904, a housing 905, and a display device 10. The housing 905 also has a calculation unit 103, a communication unit 104, an antenna (not shown), a battery (not shown), and the like inside. The mobile information terminal 900 may also include the sensor 125 described in the above embodiment.

[0270] As the display device 10, the display device 10A or the display device 10B shown in the above-described embodiment can be used.

[0271] In the mobile information terminal 900 shown in this embodiment, the display unit 13 of the display device 10 has eight rows and four columns of sub-display units 19 (see, for example, Figures 3(A) and 6(A)). That is, the display unit 13 of the display device 10 of the mobile information terminal 900 is divided into 32 sub-display units 19. There is no limit to the number of sub-display units 19 that make up the display unit 13.

[0272] The mobile information terminal 900 has a function of detecting the line of sight 113 using the line of sight detection unit 102, and a function of detecting the distance D (also referred to as "distance information") from the mobile information terminal 900 to the user 112 using the distance detection unit 901. The line of sight detection unit 102 may be, for example, an imaging element. The distance detection unit 901 may include, for example, an optical sensor (such as a TOF sensor) or an ultrasonic sensor.

[0273] The calculation unit 103 has a function of calculating the user's gaze point G using the gaze information acquired by the gaze detection unit 102. The calculation unit 103 also has a function of allocating each of the multiple sub-display units 19 to a first area 29A, a second area 29B, or a third area 29C using the distance information and gaze information acquired by the distance detection unit 901.

[0274] When the distance D from the mobile information terminal 900 to the user 112 is within a relatively long range, for example, as shown in Figure 22 (C), six sub-display units 19 are allocated to the first area 29A, twenty sub-display units 19 are allocated to the second area 29B, and four sub-display units 19 are allocated to the third area 29C.

[0275] Also, when the distance D from the mobile information terminal 900 to the user 112 is within a relatively short range, for example, as shown in Figure 23 (C), one sub-display unit 19 is allocated to the first area 29A, eight sub-display units 19 are allocated to the second area 29B, and 23 sub-display units 19 are allocated to the third area 29C.

[0276] The closer the mobile information terminal 900 and the user 112 are to each other, the narrower the discriminative visual field on the display unit 13 becomes. Therefore, the closer the mobile information terminal 900 and the user 112 are to each other, the smaller the first region S1 including the discriminative visual field becomes. Therefore, it is possible to reduce the sub-display units 19 allocated to the first area 29A. It is also possible to reduce the sub-display units 19 allocated to the second area 29B. It is also possible to increase the sub-display units 19 allocated to the third area 29C.

[0277] As shown in the above embodiment, the drive frequency of the sub-display units 19 can be decreased in the order of first area 29A, second area 29B, and third area 29C. The lower the drive frequency, the more power consumption of the display device 10 can be reduced. Therefore, by allocating more sub-display units 19 to third area 29C, the power consumption of the display device 10 is reduced. Furthermore, as explained in the above embodiment, by combining foveated rendering with adjustment of the drive frequency for each sub-display unit 19, power savings can be achieved not only for the display device 10 but for the entire electronic device.

[0278] Alternatively, the luminance may be decreased in the order of first region 29A, second region 29B, and third region 29C. By decreasing the luminance of the sub-display portions 19 allocated to second region 29B and third region 29C below the luminance of the sub-display portion 19 allocated to first region 29A, power saving of display device 10 can be achieved while suppressing degradation in display quality. This allows power saving of electronic devices.

[0279] Furthermore, the mobile information terminal 900 may include a touch panel having a touch sensor superimposed on the display unit 13 of the display device 10. Furthermore, the display device 10 included in the mobile information terminal 900 may include a touch sensor.

[0280] The touch sensor or touch panel can detect which position on the display unit 13 the user's finger 119 or the like is touching. That is, it can detect the touch position on the display unit 13 of the user's finger 119 or the like. In other words, it can detect which position on the display unit 13 the user is selecting. That is, it can detect the user's selection position on the display unit 13.

[0281] Fig. 24(A) shows a state in which user 112 is touching a part of display unit 13 with finger 119. Fig. 24(B) is a diagram showing an operating state of display unit 13. In the present embodiment and the like, the part on display unit 13 that the user is touching is referred to as "contact point T."

[0282] It should be noted that a touch sensor or touch panel may be able to detect a selected position on the display unit 13 even if the user's finger 119 or the like does not make complete contact. Therefore, in this specification and the like, "contact" may include a state of complete lack of contact. Therefore, in this specification and the like, "contact" and "selection" may be interchangeable. For example, in this specification and the like, "contact point" may be interchangeable with "selection point."

[0283] The calculation unit 103 has a function of allocating each of the multiple sub-display units 19 to a first area 29A, a second area 29B, or a third area 29C using the contact point T. Figure 24(B) shows an example in which the sub-display unit 19 overlapping with the contact point T and some of the multiple sub-display units 19 in contact with the sub-display unit 19 are allocated to the third area 29C, and the other sub-display units 19 are allocated to the first area 29A. Because the user's field of view is blocked at and near the contact point T, it is possible to significantly reduce the drive frequency.

[0284] If the sub-display unit 19 has a light-receiving element (described later), it may detect an area where the user's view is blocked by the contact point T and the shadow of the finger 119. For example, the luminance of the sub-display unit 19 related to that area may be reduced. Alternatively, the luminance of the sub-display unit 19 related to that area may be stopped (extinguished). By reducing the luminance of the sub-display unit 19 or stopping the luminance of the sub-display unit 19, power saving of the display device 10 can be achieved. Therefore, power saving of the electronic device can be achieved.

[0285] 24(C) shows an example in which the user 112 uses the finger 119 to perform a flick or swipe motion on the display unit 13. A flick motion is a motion in which the user moves the contact point T in a quick flick motion while touching the display unit 13. A swipe motion is a motion in which the user traces the display unit 13 in a flick motion in a specific direction.

[0286] Fig. 24(D) is a diagram showing the operating state of the display unit 13. Fig. 24(C) and (D) show an example of an operation when a flick action or a swipe action is performed on the lower half of the display unit 13 to scroll the screen vertically.

[0287] In many cases, the user does not view the area on the display unit 13 where a flick or swipe operation is performed (the lower half of the display unit 13 in this embodiment). Therefore, Fig. 24(D) shows an example in which 16 sub-display units 19 located in the lower half of the display unit 13 are allocated to a third area 29C. Also shown is an example in which four sub-display units 19 adjacent to the third area 29C are allocated to a second area 29B, and the remaining 12 sub-display units 19 are allocated to a first area 29A.

[0288] The allocation of the sub-display portions 19 may also be changed depending on the scrolling speed. When the scrolling speed is fast, the upper half of the sub-display portions 19 on the display unit 13 may be allocated to the second section 29B. When the scrolling speed is extremely fast, all of the sub-display portions 19 on the display unit 13 may be allocated to the third section 29C. When the scrolling speed is extremely slow, the sub-display portions 19 may be allocated in the same manner as in FIG. 24(B).

[0289] By appropriately switching the sub-display unit 19 allocated to the first area 29A, the second area 29B, and the third area 29C depending on the usage status of an electronic device such as a mobile information terminal, it is possible to reduce power consumption while suppressing a deterioration in display quality.

[0290] At least a part of the configuration examples exemplified in this embodiment and the corresponding drawings can be appropriately combined with other configuration examples or drawings.

[0291] (Fourth embodiment) In this embodiment, a configuration example of a sub-display unit 19 having a plurality of pixels 230 arranged in a matrix of p rows and q columns (p and q are each an integer of 2 or greater) will be described. Fig. 25(A) is a block diagram illustrating the sub-display unit 19.

[0292] In Figure 25(A), pixel 230 in row p, column 1 is shown as pixel 230[p,1], pixel 230 in row 1, column q is shown as pixel 230[1,q], and pixel 230 in row p, column q is shown as pixel 230[p,q].

[0293] The circuit included in the gate driver circuit 33 functions as, for example, a scanning line driving circuit, and the circuit included in the source driver circuit 31 functions as, for example, a signal line driving circuit.

[0294] For example, an OS transistor may be used as a transistor constituting the pixel 230, and a Si transistor may be used as a transistor constituting the driver circuit. OS transistors have a low off-state current, which allows for reduced power consumption. Furthermore, Si transistors have a faster operating speed than OS transistors, so are suitable for use in the driver circuit. Depending on the display device, OS transistors may be used as both the transistor constituting the pixel 230 and the transistor constituting the driver circuit. Depending on the display device, Si transistors may be used as both the transistor constituting the pixel 230 and the transistor constituting the driver circuit. Depending on the display device, Si transistors may be used as the transistor constituting the pixel 230, and OS transistors may be used as the transistor constituting the driver circuit.

[0295] Furthermore, both Si transistors and OS transistors may be used as transistors forming the pixel 230. Furthermore, both Si transistors and OS transistors may be used as transistors forming the driver circuit.

[0296] 25(A) shows p wirings GL arranged substantially in parallel and whose potentials are controlled by the gate driver circuit 33, and q wirings SL arranged substantially in parallel and whose potentials are controlled by the source driver circuit 31. For example, a pixel 230 arranged in the rth row (r represents any number and is an integer of 1 to p in this embodiment and the like) is electrically connected to the gate driver circuit 33 via the rth row wiring GL. A pixel 230 arranged in the sth column (s represents any number and is an integer of 1 to q in this embodiment and the like) is electrically connected to the source driver circuit 31 via the sth column wiring SL. In FIG. 25(A), the pixel 230 in the rth row and sth column is indicated as pixel 230[r,s].

[0297] Note that the number of wirings GL electrically connected to the pixels 230 included in one row is not limited to one. Also, the number of wirings SL electrically connected to the pixels 230 included in one column is not limited to one. Also, the wirings GL and SL are just an example, and the wirings connected to the pixels 230 are not limited to the wirings GL and SL.

[0298] A pixel 230 that controls red light, a pixel 230 that controls green light, and a pixel 230 that controls blue light are arranged in a stripe pattern, and these are collectively made to function as one pixel 240. By controlling the light emission amount (light emission brightness) of each pixel 230, a full-color display can be realized. In other words, the three pixels 230 each function as a sub-pixel. That is, the three sub-pixels each control the light emission amount of red light, green light, or blue light (see FIG. 25(B1)). Note that the color of light controlled by each of the three sub-pixels is not limited to a combination of red (R), green (G), and blue (B), but may also be cyan (C), magenta (M), or yellow (Y) (see FIG. 25(B2)).

[0299] When the pixels 240 are arranged in a 1920 x 1080 matrix, a display unit 13 capable of full-color display at so-called 2K resolution can be realized. Furthermore, when the pixels 240 are arranged in a 3840 x 2160 matrix, for example, a display unit 13 capable of full-color display at so-called 4K resolution can be realized. Furthermore, when the pixels 240 are arranged in a 7680 x 4320 matrix, for example, a display unit 13 capable of full-color display at so-called 8K resolution can be realized. By increasing the number of pixels 240, it is also possible to realize a display unit 13 capable of full-color display at 16K or even 32K resolution.

[0300] Furthermore, the three pixels 230 constituting one pixel 240 may be arranged in a delta arrangement (see FIG. 25(B3)). Specifically, the three pixels 230 constituting one pixel 240 may be arranged so that the line connecting the center points of each of the three pixels 230 forms a triangle. Furthermore, the three pixels 230 constituting one pixel 240 may be arranged in an S-stripe arrangement (see FIG. 25(B4)). Note that the arrangement of the pixels 230 is not limited to the stripe arrangement, delta arrangement, and S-stripe arrangement. The arrangement of the pixels 230 may also be a zigzag arrangement, a Bayer arrangement, or a Pentile arrangement.

[0301] Furthermore, the areas of the three sub-pixels (pixels 230) do not have to be the same. If the luminous efficiency and reliability differ depending on the luminescent color, the area of ​​the sub-pixel may be changed for each luminescent color (see FIG. 25(B4)).

[0302] Furthermore, four sub-pixels may be combined to function as one pixel. For example, a sub-pixel that controls white light may be added to three sub-pixels that control red, green, and blue light, respectively (see FIG. 25(B5)). Adding a sub-pixel that controls white light can increase the luminance of the display area. Furthermore, a sub-pixel that controls yellow light may be added to three sub-pixels that control red, green, and blue light, respectively (see FIG. 25(B6)). Furthermore, a sub-pixel that controls white light may be added to three sub-pixels that control cyan, magenta, and yellow light, respectively (see FIG. 25(B7)).

[0303] By increasing the number of sub-pixels that function as one pixel and by appropriately combining sub-pixels that control red, green, blue, cyan, magenta, yellow, and white light, it is possible to improve the reproducibility of intermediate tones, thereby improving display quality.

[0304] The display device of one embodiment of the present invention can reproduce color gamuts of various standards, such as the PAL (Phase Alternating Line) standard and the NTSC (National Television System Committee) standard used in television broadcasting, the sRGB (standard RGB) standard and the Adobe RGB standard widely used in display devices used in electronic devices such as personal computers, digital cameras, and printers, the ITU-R BT.709 (International Telecommunication Union Radiocommunication Sector Broadcasting Service (Television) 709) standard used in HDTV (High Definition Television, also called Hi-Vision), the DCI-P3 (Digital Cinema Initiatives P3) standard used in digital cinema projection, and the ITU-R BT.2020 (REC.2020 (Recommendation 2020)) standard used in UHDTV (Ultra High Definition Television, also called Super Hi-Vision).

[0305] Furthermore, a pixel 231 including a light receiving element may be provided in one pixel 240. The pixel 240 shown in Fig. 26(A) has a pixel 230(G) that emits green light, a pixel 230(B) that emits blue light, a pixel 230(R) that emits red light, and a pixel 231(S) that has a light receiving element arranged in a stripe pattern. Note that in this specification and the like, the pixel 231 is also referred to as an "imaging pixel."

[0306] The light receiving element of the pixel 231 is preferably an element that detects visible light, and more preferably an element that detects one or more of light of colors such as purple, blue-purple, blue, green, yellow-green, yellow, orange, red, etc. The light receiving element of the pixel 231 may also be an element that detects infrared light.

[0307] 26(A) is applied to the pixel 240. When a pixel 231 having a light receiving element detects light of a specific color, it is preferable to arrange the pixel 230 that exhibits light of that color next to the pixel 231, as this can improve detection accuracy.

[0308] The pixel 240 shown in Fig. 26(B) has three pixels 230 and one pixel 231 arranged in a matrix. Fig. 26(B) shows an example in which the pixel 230 that emits red light is adjacent to the pixel 231 having a light receiving element in the row direction, and the pixel 230 that emits blue light and the pixel 230 that emits green light are adjacent to each other in the row direction, but the present invention is not limited to this.

[0309] The pixel 240 shown in Fig. 26(C) has a configuration in which a pixel 231 is added to the S-stripe arrangement. The pixel 240 in Fig. 26(C) has one vertically elongated pixel 230, two horizontally elongated pixels 230, and one horizontally elongated pixel 231. Note that the vertically elongated pixel 230 may be any of R, G, and S, and there is no limitation on the order in which the horizontally elongated sub-pixels are arranged.

[0310] FIG. 26(D) shows an example in which pixels 240a and pixels 240b are arranged alternately. Pixel 240a includes a pixel 230 that emits blue light, a pixel 230 that emits green light, and a pixel 231 that has a light-receiving element. Pixel 240b includes a pixel 230 that emits red light, a pixel 230 that emits green light, and a pixel 231 that has a light-receiving element. Pixels 240a and 240b are combined to function as a single pixel 240. In FIG. 26(D), both pixel 240a and pixel 240b include a pixel 230 that emits green light and a pixel 231, but this is not limiting. By including pixel 231 in both pixel 240a and pixel 240b, the resolution of the imaging pixel can be increased.

[0311] The pixel layout shown in Fig. 26(E) is preferable because it can increase the aperture ratio of each sub-pixel. Fig. 26(E) also shows an example in which the planar shapes of pixel 230 and pixel 231 are hexagonal.

[0312] The pixel 240 shown in FIG. 26(F) is an example in which the pixels 230 are arranged in one horizontal row, and the pixel 231 is arranged below them.

[0313] The pixel 240 shown in FIG. 26(G) is an example in which the pixel 230 and the pixel 230X are arranged in one horizontal row, and the pixel 231 is arranged below them.

[0314] The pixel 230X may be, for example, a pixel 230 that emits infrared light (IR). That is, the pixel 230X has a light-emitting element 61 that emits infrared light (IR). In this case, the pixel 231 preferably has a light-receiving element that detects infrared light. For example, while an image is displayed by the pixel 230 that emits visible light, the pixel 231 can detect reflected infrared light emitted by the sub-pixel X.

[0315] Furthermore, a single pixel 240 may have a plurality of pixels 231. In this case, the wavelength ranges of light detected by the plurality of pixels 231 may be the same or different. For example, some of the plurality of pixels 231 may detect visible light, and other may detect infrared light.

[0316] Furthermore, the pixel 231 does not have to be provided in every pixel 240. A pixel 240 including the pixel 231 may be provided for every certain number of pixels.

[0317] Using the pixel 231, or using the pixel 231 and the above-mentioned sensor 125, it is possible to detect information for personal authentication using, for example, a fingerprint, palm print, iris, retina, pulse shape (including vein shape and artery shape), face, etc. Also, using the pixel 231, or using the pixel 231 and the sensor 125, it is possible to measure the number of times the user blinks, eyelid movement, pupil size, body temperature, pulse rate, oxygen saturation in the blood, etc., and detect the user's fatigue level, health condition, etc.

[0318] The operation of an electronic device can be realized by using the user's eye movement, the number of blinks, the blink rhythm, and the like. Specifically, using the pixel 231, or using the pixel 231 and the sensor 125, information such as the user's eye movement, the number of blinks, and the blink rhythm can be detected, and one or a combination of these pieces of information can be used as an operation signal for the electronic device. For example, it is also possible to replace blinks with mouse clicks. By detecting the eye movement and blinks, the user can perform input operations on the electronic device without holding anything in their hands. This improves the operability of the electronic device.

[0319] Furthermore, by providing a plurality of imaging pixels (pixels 231) in the display device 10, the plurality of imaging pixels can be used as the gaze detection unit 102. This allows the number of components of the electronic device to be reduced, thereby realizing weight reduction, improved productivity, and cost reduction of the electronic device.

[0320] An example of the configuration of the display unit 13 when the pixel 240 includes a pixel 231 having a light receiving element is shown in Fig. 27. Fig. 27 is a block diagram illustrating the display unit 13 including the pixel 231. The display unit 13 has a plurality of pixels 240 arranged in a matrix. Fig. 27 illustrates the pixel configuration of Fig. 26(F) as the pixel 240.

[0321] 27, the display unit 13 is electrically connected to a first driving unit 141, a second driving unit 143, and a readout unit 142. Specifically, the first driving unit 141 is electrically connected to a plurality of pixels 231 via a plurality of wirings 161. One wiring 161 is electrically connected to a plurality of pixels 231 arranged in one row. In addition, the readout unit 142 is electrically connected to a plurality of pixels 231 via a plurality of wirings 162. One wiring 162 is electrically connected to a plurality of pixels 231 arranged in one column. In addition, the second driving unit 143 is electrically connected to the readout unit 142 via a plurality of wirings 163.

[0322] Note that the wirings connected to one pixel 231 are not limited to the wiring 161 and the wiring 162. Wirings other than the wiring 161 and the wiring 162 may be connected to the pixel 231.

[0323] Furthermore, the first driving unit 141, the readout unit 142, and the second driving unit 143 are electrically connected to the control unit 144. The control unit 144 has a function of controlling the operations of the first driving unit 141, the readout unit 142, and the second driving unit 143.

[0324] The first driving section 141 has a function of selecting the pixels 231 for each row. The pixels 231 in the row selected by the first driving section 141 output imaging data to the readout section 142 via the wiring 162.

[0325] The readout unit 142 holds the imaging data supplied from the pixels 231 and performs noise removal processing etc. As the noise removal processing, for example, CDS (Correlated Double Sampling) processing etc. The readout unit 142 may also have a function of amplifying the imaging data, an AD conversion function of the imaging data etc.

[0326] The second driving section 143 has a function of sequentially selecting the imaging data held in the reading section 142 and outputting the imaging data from the output terminal OUT to the outside.

[0327] As shown in Fig. 25, the plurality of pixels 230 are electrically connected to the source driver circuit 31 and the gate driver circuit 33, but this is not shown in Fig. 27. Also, Fig. 27 shows an example in which one first drive unit 141, one readout unit 142, one second drive unit 143, and a control unit 144 are provided for the display unit 13, but these may be provided for each sub-display unit 19.

[0328] By providing a first driving section 141, a readout section 142, a second driving section 143, and a control section 144 for each sub-display section 19, it is possible to slow down the operation speed of the first driving section 141, the readout section 142, the second driving section 143, and the control section 144 for an area determined not to require imaging operation, or to stop these operations, thereby reducing the power consumption of the display device.

[0329] Similarly to the source driver circuit 31 and the gate driver circuit 33, the first driver 141, the readout section 142, the second driver 143, and the control section 144 may be provided on the layer 20.

[0330] <Circuit configuration example of pixel 231> 28(A) is a circuit diagram illustrating an example of the circuit configuration of a pixel 231. The pixel 231 has a light receiving element 71 (also referred to as a "photoelectric conversion element" or an "imaging element") and a pixel circuit 72. Note that in this specification and the like, the pixel circuit 72 may also be referred to as an "imaging pixel circuit."

[0331] The pixel circuit 72 includes a transistor 132 and a read circuit 73. The read circuit 73 includes a transistor 133, a transistor 134, a transistor 135, and a capacitor 138. Note that the capacitor 138 may not be provided.

[0332] One electrode (cathode) of the light-receiving element 71 is electrically connected to one of the source or drain of the transistor 132. The other of the source or drain of the transistor 132 is electrically connected to one of the source or drain of the transistor 133. One of the source or drain of the transistor 133 is electrically connected to one electrode of the capacitor 138. One electrode of the capacitor 138 is electrically connected to the gate of the transistor 134. One of the source or drain of the transistor 134 is electrically connected to one of the source or drain of the transistor 135.

[0333] Here, a wiring that connects the other of the source and the drain of the transistor 132, one of the source and the drain of the transistor 133, one electrode of the capacitor 138, and the gate of the transistor 134 is referred to as a node FD. The node FD can function as a charge detection unit.

[0334] The other electrode (anode) of the light-receiving element 71 is electrically connected to the wiring 121. The gate of the transistor 132 is electrically connected to the wiring 127. The other of the source and the drain of the transistor 133 is electrically connected to the wiring 122. The other of the source and the drain of the transistor 134 is electrically connected to the wiring 123. The gate of the transistor 133 is electrically connected to the wiring 126. The gate of the transistor 135 is electrically connected to the wiring 128. The other electrode of the capacitor 138 is electrically connected to a reference potential line such as a GND wiring. The other of the source and the drain of the transistor 135 is electrically connected to the wiring 352.

[0335] The wiring 127, the wiring 126, and the wiring 128 function as signal lines for controlling the on / off state of each transistor. The wiring 352 functions as an output line.

[0336] 28A, the cathode side of the light-receiving element 71 is electrically connected to the transistor 132, and the node FD can be reset to a high potential. Therefore, the wiring 122 has a high potential (a higher potential than the wiring 121).

[0337] 28A shows a configuration in which the cathode of the light-receiving element 71 is electrically connected to the node FD, but the anode of the light-receiving element 71 may be electrically connected to one of the source and the drain of the transistor 132. In this case, the node FD is reset to a low potential to operate, and therefore the wiring 122 is set to a low potential (a potential lower than that of the wiring 121).

[0338] The transistor 132 has a function of controlling the potential of the node FD. The transistor 132 is also referred to as a "transfer transistor." The transistor 133 has a function of resetting the potential of the node FD. The transistor 133 is also referred to as a "reset transistor." The transistor 134 functions as a source follower circuit and can output the potential of the node FD as image data to the wiring 352. The transistor 135 has a function of selecting a pixel to output image data. The transistor 134 is also referred to as an "amplification transistor." The transistor 135 is also referred to as a "selection transistor."

[0339] 28B, a plurality of pairs of the light-receiving element 71 and the transistor 132 may be electrically connected to one node FD. That is, a plurality of pairs of the light-receiving element 71 and the transistor 132 may be electrically connected to one read circuit 73.

[0340] By sharing one readout circuit 73 with multiple pairs of light receiving elements 71 and transistors 132, it is possible to reduce the area occupied by each pixel 231. This makes it possible to increase the packaging density of the pixels 231. For example, the readout circuit 73 may be formed on layer 20, and the light receiving elements 71 and transistors 132 may be formed on layer 50. Alternatively, the light receiving elements 71 may be formed on layer 60.

[0341] In FIG. 28B, the first pair of the light-receiving element 71 and the transistor 132 are shown as a light-receiving element 71_1 and a transistor 132_1. The gate of the transistor 132_1 is electrically connected to a wiring 127_1. The second pair of the light-receiving element 71 and the transistor 132 are shown as a light-receiving element 71_2 and a transistor 132_2. The gate of the transistor 132_2 is electrically connected to a wiring 127_2. The kth pair (k is an integer greater than or equal to 1) of the light-receiving element 71 and the transistor 132 are shown as a light-receiving element 71_k and a transistor 132_k. The gate of the transistor 132_k is electrically connected to a wiring 127_k.

[0342] In the configuration shown in FIG. 28(B), one pair of a light receiving element 71 and a transistor 132 can be regarded as one pixel 231. In FIG. 28(B), a pixel 231 configured with a light receiving element 71_1 and a transistor 132_1 is shown as pixel 231_1. A pixel 231 configured with a light receiving element 71_2 and a transistor 132_2 is shown as pixel 231_2. A pixel 231 configured with a light receiving element 71_k and a transistor 132_k is shown as pixel 231_k. In the configuration shown in FIG. 28(B), the transistor 132 corresponds to the pixel circuit 72.

[0343] <Configuration example of light-emitting element> A light-emitting element 61 that can be used in a display device according to one embodiment of the present invention will be described.

[0344] As shown in FIG. 29A, the light-emitting element 61 includes an EL layer 172 between a pair of electrodes (a conductor 171 and a conductor 173). The EL layer 172 can be composed of a plurality of layers, such as a layer 4420, a light-emitting layer 4411, and a layer 4430. The layer 4420 can include, for example, a layer containing a substance with high electron-injecting properties (electron-injecting layer) and a layer containing a substance with high electron-transporting properties (electron-transporting layer). The light-emitting layer 4411 includes, for example, a light-emitting compound. The layer 4430 can include, for example, a layer containing a substance with high hole-injecting properties (hole-injecting layer) and a layer containing a substance with high hole-transporting properties (hole-transporting layer).

[0345] A structure including the layer 4420, the light-emitting layer 4411, and the layer 4430 provided between a pair of electrodes can function as a single light-emitting unit, and in this specification and the like, the structure of FIG. 29A is called a single structure.

[0346] 29(B) shows a modified example of the EL layer 172 included in the light-emitting element 61 shown in Fig. 29(A). Specifically, the light-emitting element 61 shown in Fig. 29(B) includes a layer 4430-1 on the conductor 171, a layer 4430-2 on the layer 4430-1, a light-emitting layer 4411 on the layer 4430-2, a layer 4420-1 on the light-emitting layer 4411, a layer 4420-2 on the layer 4420-1, and a conductor 173 on the layer 4420-2. For example, when the conductor 171 is an anode and the conductor 173 is a cathode, the layer 4430-1 functions as a hole injection layer, the layer 4430-2 functions as a hole transport layer, the layer 4420-1 functions as an electron transport layer, and the layer 4420-2 functions as an electron injection layer. Alternatively, when the conductor 171 is used as a cathode and the conductor 173 is used as an anode, the layer 4430-1 functions as an electron injection layer, the layer 4430-2 functions as an electron transport layer, the layer 4420-1 functions as a hole transport layer, and the layer 4420-2 functions as a hole injection layer. By using such a layer structure, it is possible to efficiently inject carriers into the light-emitting layer 4411 and increase the efficiency of carrier recombination in the light-emitting layer 4411.

[0347] Note that a structure in which a plurality of light-emitting layers (a light-emitting layer 4411, a light-emitting layer 4412, and a light-emitting layer 4413) are provided between the layer 4420 and the layer 4430 as shown in FIG. 29C is also an example of a single structure.

[0348] 29(D), a configuration in which a plurality of light-emitting units (EL layers 172a and 172b) are connected in series via an intermediate layer (charge generating layer) 4440 is referred to as a tandem structure or a stack structure in this specification and the like. Note that a tandem structure can realize a light-emitting element capable of emitting light with high brightness.

[0349] 29(D), the EL layers 172a and 172b may emit the same light. For example, the EL layers 172a and 172b may both emit green light.

[0350] Note that a full-color display can be achieved by using three sub-pixels: a light-emitting element 61 emitting red light (R), a light-emitting element 61 emitting green light (G), and a light-emitting element 61 emitting blue light (B). When a pixel includes three sub-pixels of R, G, and B, the light-emitting elements 61 may be arranged in tandem. Specifically, the EL layer 172a and the EL layer 172b of the R sub-pixel each contain a material capable of emitting red light, the EL layer 172a and the EL layer 172b of the G sub-pixel each contain a material capable of emitting green light, and the EL layer 172a and the EL layer 172b of the B sub-pixel each contain a material capable of emitting blue light. In other words, the light-emitting layer 4411 and the light-emitting layer 4412 can be made of the same material. By making the EL layer 172a and the EL layer 172b emit the same light, the current density per unit of luminance can be reduced. Therefore, the reliability of the light emitting element 61 can be improved.

[0351] The light-emitting element can emit light in red, green, blue, cyan, magenta, yellow, or white, depending on the material of the EL layer 172. Furthermore, the color purity can be further improved by providing the light-emitting element with a microcavity structure.

[0352] The light-emitting layer can contain two or more light-emitting materials that emit light such as R (red), G (green), B (blue), Y (yellow), and O (orange). A light-emitting element that emits white light preferably has a configuration in which the light-emitting layer contains two or more types of light-emitting materials. To obtain white light emission, it is preferable to select light-emitting materials such that the light emitted by each of the two or more light-emitting materials has a complementary color relationship. For example, by making the emission color of the first light-emitting layer and the emission color of the second light-emitting layer complementary colors, a light-emitting element that emits white light as a whole can be obtained. The same applies to a light-emitting element having three or more light-emitting layers.

[0353] The light-emitting layer preferably contains two or more light-emitting materials that emit light of R (red), G (green), B (blue), Y (yellow), O (orange), etc. Alternatively, it is preferable that the light-emitting layer contains two or more light-emitting materials, and the light emitted by each of the light-emitting materials contains spectral components of two or more colors of R, G, and B. Furthermore, a material that emits near-infrared light can also be used as the light-emitting material.

[0354] Examples of light-emitting substances include fluorescent materials, phosphorescent materials, and thermally activated delayed fluorescence (TADF materials). Light-emitting substances used in EL elements include not only organic compounds but also inorganic compounds (such as quantum dot materials).

[0355] <Method for forming light-emitting element> An example of a method for forming the light emitting element 61 will be described below.

[0356] FIG. 30(A) shows a schematic top view of a light-emitting element 61. The light-emitting element 61 has a plurality of light-emitting elements 61R that emit red light, a plurality of light-emitting elements 61G that emit green light, and a plurality of light-emitting elements 61B that emit blue light. In FIG. 30(A), the symbols R, G, and B are assigned within the light-emitting region of each light-emitting element to easily distinguish between the light-emitting elements. Also, while FIG. 30(A) illustrates a configuration having three emitted light colors, red (R), green (G), and blue (B), this is not limiting. For example, a configuration having four or more colors may also be used.

[0357] The light emitting elements 61R, 61G, and 61B are arranged in a matrix. Fig. 30(A) shows a so-called stripe arrangement in which light emitting elements of the same color are arranged in one direction, but the arrangement of the light emitting elements is not limited to this.

[0358] As the light-emitting elements 61R, 61G, and 61B, it is preferable to use organic EL devices such as OLEDs (organic light-emitting diodes) or QOLEDs (quantum-dot organic light-emitting diodes). Examples of light-emitting materials that the EL elements have include fluorescent materials, phosphorescent materials, and thermally activated delayed fluorescence (TADF materials). As light-emitting materials that the EL elements have, not only organic compounds but also inorganic compounds (such as quantum dot materials) can be used.

[0359] FIG. 30(B) is a schematic cross-sectional view corresponding to the dashed line A1-A2 in FIG. 30(A). FIG. 30(B) shows cross sections of the light-emitting elements 61R, 61G, and 61B. The light-emitting elements 61R, 61G, and 61B are each provided on an insulator 363 and include a conductor 171 functioning as a pixel electrode and a conductor 173 functioning as a common electrode. The insulator 363 can be an inorganic insulating film or an organic insulating film, or both. It is preferable to use an inorganic insulating film as the insulator 363. Examples of inorganic insulating films include oxide insulating films and nitride insulating films, such as a silicon oxide film, a silicon oxynitride film, a silicon nitride oxide film, a silicon nitride film, an aluminum oxide film, an aluminum oxynitride film, and a hafnium oxide film.

[0360] The light-emitting element 61R has an EL layer 172R between a conductor 171 functioning as a pixel electrode and a conductor 173 functioning as a common electrode. The EL layer 172R contains a light-emitting organic compound that emits light having a peak in at least the red wavelength range. The EL layer 172G of the light-emitting element 61G contains a light-emitting organic compound that emits light having a peak in at least the green wavelength range. The EL layer 172B of the light-emitting element 61B contains a light-emitting organic compound that emits light having a peak in at least the blue wavelength range.

[0361] The EL layer 172R, the EL layer 172G, and the EL layer 172B may each have one or more of an electron injection layer, an electron transport layer, a hole injection layer, and a hole transport layer in addition to a layer containing a light-emitting substance (light-emitting layer).

[0362] The conductor 171 functioning as a pixel electrode is provided for each light-emitting element. The conductor 173 functioning as a common electrode is provided as a continuous layer common to each light-emitting element. A conductive film that is transparent to visible light is used for either the conductor 171 functioning as a pixel electrode or the conductor 173 functioning as a common electrode, and a conductive film that is reflective is used for the other. By making the conductor 171 functioning as a pixel electrode transparent and the conductor 173 functioning as a common electrode reflective, a bottom-emission display device can be obtained. Conversely, by making the conductor 171 functioning as a pixel electrode reflective and the conductor 173 functioning as a common electrode transparent, a top-emission display device can be obtained. Note that by making both the conductor 171 functioning as a pixel electrode and the conductor 173 functioning as a common electrode transparent, a dual-emission display device can also be obtained.

[0363] For example, when the light emitting element 61R is a top emission type, the light 175R emitted from the light emitting element 61R is emitted toward the conductor 173. When the light emitting element 61R is a top emission type, the light 175G emitted from the light emitting element 61G is emitted toward the conductor 173. When the light emitting element 61B is a top emission type, the light 175B emitted from the light emitting element 61B is emitted toward the conductor 173.

[0364] An insulator 272 is provided to cover the end of the conductor 171 that functions as a pixel electrode. The end of the insulator 272 is preferably tapered. The insulator 272 can be made of the same material as the insulator 363.

[0365] The insulator 272 is provided to prevent erroneous light emission due to unintentional electrical short circuit between adjacent light-emitting elements 61. In addition, when a metal mask is used to form the EL layer 172, the insulator 272 also functions to prevent the metal mask from coming into contact with the conductor 171.

[0366] The EL layer 172R, the EL layer 172G, and the EL layer 172B each have a region in contact with the upper surface of the conductor 171 that functions as a pixel electrode, and a region in contact with the surface of the insulator 272. In addition, the ends of the EL layer 172R, the EL layer 172G, and the EL layer 172B are located on the insulator 272.

[0367] As shown in Figure 30(B), a gap is provided between the two EL layers of light-emitting elements that emit different colors of light. In this way, it is preferable that the EL layer 172R, the EL layer 172G, and the EL layer 172B are arranged so as not to contact each other. This makes it possible to effectively prevent current from flowing through two adjacent EL layers, resulting in unintended light emission (also known as crosstalk). This allows for increased contrast, resulting in a display device with high display quality.

[0368] The EL layer 172R, the EL layer 172G, and the EL layer 172B can be separately fabricated by vacuum deposition using a shadow mask such as a metal mask. Alternatively, they may be separately fabricated by photolithography. By using photolithography, it is possible to realize a high-definition display device that is difficult to achieve using a metal mask.

[0369] In this specification, etc., a device fabricated using a metal mask or FMM (fine metal mask, high-resolution metal mask) may be referred to as a device with an MM (metal mask) structure. In addition, in this specification, etc., a device fabricated without using a metal mask or FMM may be referred to as a device with an MML (metal maskless) structure. Because a display device with an MML structure is fabricated without using a metal mask, it has a higher degree of design freedom for pixel arrangement, pixel shape, etc. than a display device with an MM structure.

[0370] Moreover, a protective layer 271 is provided on the conductor 173, which functions as a common electrode, to cover the light emitting elements 61R, 61G, and 61B. The protective layer 271 has a function of preventing impurities such as water from diffusing from above into each light emitting element.

[0371] The protective layer 271 may have, for example, a single-layer structure or a multilayer structure including at least an inorganic insulating film. Examples of inorganic insulating films include oxide films or nitride films such as silicon oxide film, silicon oxynitride film, silicon nitride oxide film, silicon nitride film, aluminum oxide film, aluminum oxynitride film, and hafnium oxide film. Alternatively, the protective layer 271 may be made of a semiconductor material such as indium gallium oxide or indium gallium zinc oxide (IGZO). The protective layer 271 is preferably formed by atomic layer deposition (ALD), chemical vapor deposition (CVD), or sputtering. While the protective layer 271 includes an inorganic insulating film, the present invention is not limited to this. For example, the protective layer 271 may have a multilayer structure including an inorganic insulating film and an organic insulating film.

[0372] In this specification, "nitride oxide" refers to a compound containing more nitrogen than oxygen. "Oxynitride" refers to a compound containing more oxygen than nitrogen. The content of each element can be measured, for example, by Rutherford Backscattering Spectrometry (RBS).

[0373] When indium gallium zinc oxide is used for the protective layer 271, it can be processed using a wet etching method or a dry etching method. For example, when IGZO is used for the protective layer 271, a chemical solution such as oxalic acid, phosphoric acid, or a mixed chemical solution (for example, a mixed chemical solution of phosphoric acid, acetic acid, nitric acid, and water (also called a mixed acid aluminum etching solution)) can be used. The mixed acid aluminum etching solution can have a volume ratio of phosphoric acid:acetic acid:nitric acid:water=53.3:6.7:3.3:36.7 or a similar ratio.

[0374] The structure shown in FIG. 30(B) may be called an SBS structure, which will be described later.

[0375] 30C shows a different example. Specifically, FIG. 30C shows a light-emitting element 61W that emits white light. The light-emitting element 61W has an EL layer 172W that emits white light between a conductor 171 that functions as a pixel electrode and a conductor 173 that functions as a common electrode.

[0376] The EL layer 172W may be configured by stacking two or more light-emitting layers selected so that the emitted light colors are complementary to each other. Alternatively, a stacked EL layer may be used in which a charge generating layer is sandwiched between light-emitting layers.

[0377] FIG. 30(C) shows three light-emitting elements 61W lined up. A colored layer 264R is provided above the left light-emitting element 61W. The colored layer 264R functions as a bandpass filter that transmits red light. Similarly, a colored layer 264G that transmits green light is provided above the center light-emitting element 61W, and a colored layer 264B that transmits blue light is provided above the right light-emitting element 61W. This allows the display device to display color images.

[0378] Here, the EL layer 172W and the conductor 173 functioning as a common electrode are separated between two adjacent light-emitting elements 61W. This prevents unintended light emission due to current flowing through the EL layer 172W between the two adjacent light-emitting elements 61W. In particular, when a stacked EL layer in which a charge-generating layer is provided between two light-emitting layers is used as the EL layer 172W, the higher the resolution, i.e., the smaller the distance between adjacent pixels, the more pronounced the effect of crosstalk becomes, resulting in a decrease in contrast. Therefore, by using this configuration, a display device that combines high resolution and high contrast can be realized.

[0379] The separation of the EL layer 172W and the conductor 173 functioning as a common electrode is preferably performed by photolithography, which allows the spacing between the light-emitting elements to be narrowed, thereby achieving a display device with a higher aperture ratio than when a shadow mask such as a metal mask is used.

[0380] In the case of a bottom-emission light-emitting element, a colored layer may be provided between the conductor 171 functioning as a pixel electrode and the insulator 363 .

[0381] FIG. 30(D) shows an example different from the above. Specifically, FIG. 30(D) shows a configuration in which the insulator 272 is not provided between the light-emitting element 61R, the light-emitting element 61G, and the light-emitting element 61B. This configuration allows a display device with a high aperture ratio. Furthermore, not providing the insulator 272 reduces the unevenness of the light-emitting element 61, thereby improving the viewing angle of the display device. Specifically, the viewing angle can be set to 150 degrees or more and less than 180 degrees, preferably 160 degrees or more and less than 180 degrees.

[0382] Furthermore, the protective layer 271 covers the side surfaces of the EL layer 172R, the EL layer 172G, and the EL layer 172B. This configuration can suppress impurities (typically, water, etc.) that can enter from the side surfaces of the EL layer 172R, the EL layer 172G, and the EL layer 172B. Furthermore, since the leakage current between adjacent light-emitting elements 61 is reduced, the color saturation and contrast ratio are improved and power consumption is reduced.

[0383] 30(D), the planar shapes of the conductor 171, the EL layer 172R, and the conductor 173 are approximately the same. Such a structure can be formed all at once by using a resist mask or the like after the conductor 171, the EL layer 172R, and the conductor 173 are formed. This process can also be called self-aligned patterning, because the EL layer 172R and the conductor 173 are processed using the conductor 173 as a mask. Note that although the EL layer 172R has been described here, the EL layer 172G and the EL layer 172B can also have a similar structure.

[0384] 30(D) shows a structure in which a protective layer 273 is further provided on the protective layer 271. For example, the protective layer 271 is formed using an apparatus (typically, an ALD apparatus) capable of depositing a film with high coverage, and the protective layer 273 is formed using an apparatus (typically, a sputtering apparatus) capable of depositing a film with lower coverage than the protective layer 271, thereby making it possible to provide a region 275 between the protective layer 271 and the protective layer 273. In other words, the region 275 is located between the EL layer 172R and the EL layer 172G, and between the EL layer 172G and the EL layer 172B.

[0385] The region 275 contains, for example, one or more selected from air, nitrogen, oxygen, carbon dioxide, and Group 18 elements (typically, helium, neon, argon, xenon, krypton, etc.). The region 275 may also contain, for example, a gas used when forming the protective layer 273. For example, when the protective layer 273 is formed by sputtering, the region 275 may contain one or more of the above Group 18 elements. When the region 275 contains a gas, the gas can be identified by gas chromatography or the like. Alternatively, when the protective layer 273 is formed by sputtering, the gas used during sputtering may also be contained in the film of the protective layer 273. In this case, when the protective layer 273 is analyzed by energy dispersive X-ray analysis (EDX analysis) or the like, elements such as argon may be detected.

[0386] Furthermore, when the refractive index of region 275 is lower than the refractive index of protective layer 271, light emitted from EL layer 172R, EL layer 172G, or EL layer 172B is reflected at the interface between protective layer 271 and region 275. This may prevent light emitted from EL layer 172R, EL layer 172G, or EL layer 172B from entering adjacent pixels. This prevents light of different colors from being mixed in with neighboring pixels, thereby improving the display quality of the display device.

[0387] 30(D), the area between light-emitting element 61R and light-emitting element 61G or the area between light-emitting element 61G and light-emitting element 61B (hereinafter simply referred to as the distance between the light-emitting elements) can be narrowed. Specifically, the distance between the light-emitting elements can be set to 1 μm or less, preferably 500 nm or less, and more preferably 200 nm or less, 100 nm or less, 90 nm or less, 70 nm or less, 50 nm or less, 30 nm or less, 20 nm or less, 15 nm or less, or 10 nm or less. In other words, the distance between the side surface of EL layer 172R and the side surface of EL layer 172G or the distance between the side surface of EL layer 172G and the side surface of EL layer 172B has an area of ​​1 μm or less, preferably 0.5 μm (500 nm) or less, and more preferably 100 nm or less.

[0388] Furthermore, for example, when the region 275 contains gas, it is possible to isolate the light emitting elements while suppressing color mixing or crosstalk of the light from each light emitting element.

[0389] Furthermore, the region 275 may be empty or may be filled with a filler. Examples of the filler include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin. Furthermore, a photoresist may be used as the filler. The photoresist used as the filler may be a positive photoresist or a negative photoresist.

[0390] FIG. 31A shows an example different from the above. Specifically, the configuration shown in FIG. 31A differs from the configuration shown in FIG. 30D in the configuration of the insulator 363. The insulator 363 has a recess formed by removing a portion of its upper surface during processing of the light-emitting elements 61R, 61G, and 61B. A protective layer 271 is formed in the recess. In other words, the insulator 363 has a region where the lower surface of the protective layer 271 is located lower than the lower surface of the conductor 171 in a cross-sectional view. By providing this region, impurities (typically, water, etc.) that may enter the light-emitting elements 61R, 61G, and 61B from below can be suitably suppressed. Note that the recess can be formed when impurities (also referred to as residue) that may adhere to the side surfaces of the light-emitting elements 61R, 61G, and 61B are removed by wet etching or the like during processing of the light-emitting elements 61R, 61G, and 61B. After removing the residue, the side surfaces of the light-emitting elements are covered with the protective layer 271, thereby achieving a highly reliable display device.

[0391] FIG. 31(B) shows a different example. Specifically, the configuration shown in FIG. 31(B) includes an insulator 276 and a microlens array 277 in addition to the configuration shown in FIG. 31(A). The insulator 276 functions as an adhesive layer. If the refractive index of the insulator 276 is lower than that of the microlens array 277, the microlens array 277 can condense light emitted from the light-emitting elements 61R, 61G, and 61B. This improves the light extraction efficiency of the display device. This is particularly advantageous because it allows a bright image to be viewed when a user views the display surface of the display device from directly in front of the display surface. The insulator 276 can be any of a variety of curing adhesives, including photo-curing adhesives such as ultraviolet curing adhesives, reactive curing adhesives, thermosetting adhesives, and anaerobic adhesives. Examples of such adhesives include epoxy resin, acrylic resin, silicone resin, phenolic resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin. In particular, materials with low moisture permeability, such as epoxy resin, are preferred. Two-component resins may also be used. Adhesive sheets may also be used.

[0392] FIG. 31C shows another example. Specifically, the configuration shown in FIG. 31C has three light-emitting elements 61W instead of the light-emitting elements 61R, 61G, and 61B in the configuration shown in FIG. 31A. An insulator 276 is provided above the three light-emitting elements 61W, and colored layers 264R, 264G, and 264B are provided above the insulator 276. Specifically, a colored layer 264R that transmits red light is provided at a position overlapping the left light-emitting element 61W, a colored layer 264G that transmits green light is provided at a position overlapping the center light-emitting element 61W, and a colored layer 264B that transmits blue light is provided at a position overlapping the right light-emitting element 61W. This allows the semiconductor device to display a color image. The configuration shown in FIG. 31C is also a variation of the configuration shown in FIG. 30C.

[0393] Fig. 31(D) shows an example different from the above. Specifically, in the configuration shown in Fig. 31(D), a protective layer 271 is provided adjacent to the side surfaces of the conductor 171 and the EL layer 172. The conductor 173 is provided as a continuous layer common to each light-emitting element. In the configuration shown in Fig. 31(D), it is preferable that the region 275 is filled with a filler material.

[0394] The color purity of the emitted color can be improved by providing a micro-optical resonator (microcavity) structure to the light-emitting element 61. To provide the light-emitting element 61 with a microcavity structure, it is preferable to configure the light-emitting element 61 so that the product (optical path length) of the distance d between the conductors 171 and 173 and the refractive index n of the EL layer 172 is m times half the wavelength λ (m is an integer equal to or greater than 1). The distance d can be calculated using Equation 1.

[0395] d=m×λ / (2×n) ··· Equation 1.

[0396] According to Equation 1, the distance d of the light emitting element 61 having a microcavity structure is determined according to the wavelength (emission color) of the emitted light. The distance d corresponds to the thickness of the EL layer 172. Therefore, the EL layer 172G may be provided thicker than the EL layer 172B, and the EL layer 172R may be provided thicker than the EL layer 172G.

[0397] Strictly speaking, distance d is the distance from the reflective region of conductor 171, which functions as a reflective electrode, to the reflective region of conductor 173, which functions as an electrode (semi-transmissive / semi-reflective electrode) that is transparent and reflective to the emitted light. For example, if conductor 171 is a laminate of silver and a transparent conductive film, ITO (Indium Tin Oxide), and the ITO is on the EL layer 172 side, distance d can be set according to the emitted color by adjusting the film thickness of the ITO. In other words, even if EL layer 172R, EL layer 172G, and EL layer 172B have the same thickness, distance d appropriate for the emitted color can be obtained by changing the thickness of the ITO.

[0398] However, it may be difficult to precisely determine the positions of the reflection areas in the conductors 171 and 173. In this case, it is assumed that the microcavity effect can be fully obtained by assuming that any position on the conductors 171 and 173 is the reflection area.

[0399] The light-emitting element 61 is composed of a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, an electron injection layer, etc. Detailed configuration examples of the light-emitting element 61 will be described in other embodiments. To increase the light extraction efficiency in the microcavity structure, it is preferable to set the optical distance from the conductor 171 functioning as a reflective electrode to the light-emitting layer to an odd multiple of λ / 4. To achieve this optical distance, it is preferable to appropriately adjust the thickness of each layer constituting the light-emitting element 61.

[0400] Furthermore, when light is emitted from the conductor 173 side, it is preferable that the reflectance of the conductor 173 is greater than the transmittance. The light transmittance of the conductor 173 is preferably 2% to 50%, more preferably 2% to 30%, and even more preferably 2% to 10%. By reducing the transmittance of the conductor 173 (increasing the reflectance), the effect of the microcavity can be enhanced.

[0401] Fig. 32(A) shows an example different from the above. Specifically, in the configuration shown in Fig. 32(A), the EL layer 172 extends beyond the edge of the conductor 171 in each of the light-emitting element 61R, the light-emitting element 61G, and the light-emitting element 61B. For example, in the light-emitting element 61R, the EL layer 172R extends beyond the edge of the conductor 171. In addition, in the light-emitting element 61G, the EL layer 172G extends beyond the edge of the conductor 171. In the light-emitting element 61B, the EL layer 172B extends beyond the edge of the conductor 171.

[0402] In each of the light-emitting elements 61R, 61G, and 61B, the EL layer 172 and the protective layer 271 have an overlapping region with the insulator 270 interposed therebetween. In addition, an insulator 278 is provided on the protective layer 271 in the region between adjacent light-emitting elements 61.

[0403] Examples of the insulator 278 include epoxy resin, acrylic resin, silicone resin, phenol resin, polyimide resin, imide resin, PVC (polyvinyl chloride) resin, PVB (polyvinyl butyral) resin, and EVA (ethylene vinyl acetate) resin. Photoresist may also be used as the insulator 278. The photoresist used as the insulator 278 may be a positive photoresist or a negative photoresist.

[0404] Furthermore, a common layer 174 is provided on the light-emitting elements 61R, 61G, and 61B, and the insulator 278, and a conductor 173 is provided on the common layer 174. The common layer 174 has a region in contact with the EL layer 172R, a region in contact with the EL layer 172G, and a region in contact with the EL layer 172B. The common layer 174 is shared by the light-emitting elements 61R, 61G, and 61B.

[0405] The common layer 174 may be one or more of a hole injection layer, a hole transport layer, a hole blocking layer, an electron blocking layer, an electron transport layer, and an electron injection layer. For example, the common layer 174 may be a carrier injection layer (hole injection layer or electron injection layer). The common layer 174 may also be considered a part of the EL layer 172. The common layer 174 may be provided as needed. When the common layer 174 is provided, it is not necessary to provide a layer included in the EL layer 172 that has the same function as the common layer 174.

[0406] In addition, a protective layer 273 is provided on the conductor 173 , and an insulator 276 is provided on the protective layer 273 .

[0407] FIG. 32B shows another example. Specifically, the configuration shown in FIG. 32B has three light-emitting elements 61W instead of the light-emitting elements 61R, 61G, and 61B in the configuration shown in FIG. 32A. An insulator 276 is provided above the three light-emitting elements 61W, and colored layers 264R, 264G, and 264B are provided above the insulator 276. Specifically, a colored layer 264R that transmits red light is provided at a position overlapping the left light-emitting element 61W, a colored layer 264G that transmits green light is provided at a position overlapping the center light-emitting element 61W, and a colored layer 264B that transmits blue light is provided at a position overlapping the right light-emitting element 61W. This allows the semiconductor device to display a color image. The configuration shown in FIG. 32B is also a variation of the configuration shown in FIG. 31C.

[0408] Alternatively, as shown in FIG. 32(C), a light-emitting element 61R, a light-emitting element 61G, and a light-receiving element 71 may be provided on an insulator 363. The light-receiving element 71 shown in FIG. 32(C) can be realized by replacing the EL layer 172 of the light-emitting element 61 with an active layer 182 (also referred to as a "light-receiving layer") that functions as a photoelectric conversion layer. The active layer 182 has a characteristic that its resistance value changes depending on the wavelength and intensity of incident light. The active layer 182 can be formed of an organic compound, similar to the EL layer 172. Note that the active layer 182 may also be made of an inorganic material such as silicon.

[0409] The light receiving element 71 has a function of detecting light Lin incident from outside the display device through the protective layer 273, the conductor 173, and the common layer 174. A colored layer that transmits light in a desired wavelength range may be provided on the incident side of the light receiving element 71, overlapping the light receiving element 71.

[0410] <Materials applicable to light-emitting and light-receiving elements> Materials applicable to the light emitting element and the light receiving element will be described.

[0411] The hole injection layer is a layer that injects holes from the anode into the hole transport layer and contains a material with high hole injection properties, such as an aromatic amine compound and a composite material containing a hole transport material and an acceptor material (electron acceptor material).

[0412] The hole transport layer is a layer that transports holes injected from the anode by the hole injection layer to the light emitting layer. The hole transport layer is a layer that contains a hole transport material. The hole transport material is a material having a concentration of 1×10 -6 cm 2 A material having a hole mobility of 1 / Vs or more is preferred. Note that other materials can also be used as long as they have a higher hole transporting property than electron transporting property. As the hole transporting material, a material having a high hole transporting property, such as a π-electron-rich heteroaromatic compound (e.g., a carbazole derivative, a thiophene derivative, a furan derivative, etc.) or an aromatic amine (a compound having an aromatic amine skeleton), is preferred.

[0413] The electron transport layer is a layer that transports electrons injected from the cathode by the electron injection layer to the light emitting layer. The electron transport layer is a layer that contains an electron transporting material. The electron transporting material is a material having a molecular weight of 1×10 -6 cm 2 A substance having an electron mobility of 1 / Vs or more is preferred. Note that other substances can also be used as long as they have a higher electron transporting property than holes. Examples of electron-transporting materials that can be used include metal complexes having a quinoline skeleton, metal complexes having a benzoquinoline skeleton, metal complexes having an oxazole skeleton, and metal complexes having a thiazole skeleton, as well as oxadiazole derivatives, triazole derivatives, imidazole derivatives, oxazole derivatives, thiazole derivatives, phenanthroline derivatives, quinoline derivatives having a quinoline ligand, benzoquinoline derivatives, quinoxaline derivatives, dibenzoquinoxaline derivatives, pyridine derivatives, bipyridine derivatives, pyrimidine derivatives, and π-electron-deficient heteroaromatic compounds including nitrogen-containing heteroaromatic compounds.

[0414] The electron injection layer is a layer that injects electrons from the cathode to the electron transport layer and contains a material with high electron injection properties. Examples of the material with high electron injection properties include alkali metals, alkaline earth metals, and compounds thereof. Examples of the material with high electron injection properties include a composite material containing an electron transport material and a donor material (electron donor material).

[0415] The electron injection layer may be formed of, for example, lithium, cesium, ytterbium, lithium fluoride (LiF), cesium fluoride (C S F), calcium fluoride (CaF x , where x is an arbitrary number), 8-(quinolinolato)lithium (abbreviation: Liq), 2-(2-pyridyl)phenolatolithium (abbreviation: LiPP), 2-(2-pyridyl)-3-pyridinolatolithium (abbreviation: LiPPy), 4-phenyl-2-(2-pyridyl)phenolatolithium (abbreviation: LiPPP), lithium oxide (LiO x The electron injection layer may be formed of an alkali metal, an alkaline earth metal, such as cesium carbonate, or a compound thereof. The electron injection layer may have a stacked structure of two or more layers. For example, the stacked structure may have a structure in which lithium fluoride is used in the first layer and ytterbium is used in the second layer.

[0416] Alternatively, an electron transporting material may be used for the electron injection layer. For example, a compound having an unshared electron pair and an electron-deficient heteroaromatic ring may be used as the electron transporting material. Specifically, a compound having at least one of a pyridine ring, a diazine ring (pyrimidine ring, pyrazine ring, pyridazine ring), and a triazine ring may be used.

[0417] The lowest unoccupied molecular orbital (LUMO) of an organic compound having an unshared electron pair is preferably −3.6 eV or more and −2.3 eV or less. Generally, the highest occupied molecular orbital (HOMO) level and the LUMO level of an organic compound can be estimated by CV (cyclic voltammetry), photoelectron spectroscopy, optical absorption spectroscopy, inverse photoelectron spectroscopy, etc.

[0418] Examples of organic compounds with unshared electron pairs include 4,7-diphenyl-1,10-phenanthroline (abbreviated as BPhen), 2,9-di(naphthalen-2-yl)-4,7-diphenyl-1,10-phenanthroline (abbreviated as NBPhen), 2,2'-(1,3-phenylene)bis(9-phenyl-1,10-phenanthroline) (abbreviated as mPPhen2P), diquinoxalino[2,3-a:2',3'-c]phenazine (abbreviated as HATNA), and 2,4,6-tris[3'-(pyridin-3-yl)biphenyl-3-yl]-1,3,5-triazine (abbreviated as TmPPPyTz). NBPhen has a higher glass transition temperature (Tg) and better heat resistance than BPhen.

[0419] The light-receiving element has an active layer that functions as at least a photoelectric conversion layer between a pair of electrodes. In this specification and the like, one of the pair of electrodes may be referred to as a pixel electrode, and the other as a common electrode.

[0420] Of the pair of electrodes that a light-receiving element has, one electrode functions as an anode and the other electrode functions as a cathode. The following description will be given taking as an example a case where the pixel electrode functions as the anode and the common electrode functions as the cathode. The light-receiving element can detect light incident on the light-receiving element, generate charge, and extract it as a current by applying a reverse bias between the pixel electrode and the common electrode. Alternatively, the pixel electrode may function as a cathode and the common electrode may function as an anode.

[0421] The active layer of the light-receiving element includes a semiconductor. Examples of the semiconductor include inorganic semiconductors such as silicon and organic semiconductors containing organic compounds. In this embodiment, an example in which an organic semiconductor is used as the semiconductor of the active layer is shown. Using an organic semiconductor is preferable because the light-emitting layer and the active layer can be formed by the same method (e.g., vacuum deposition), allowing the use of a common manufacturing device.

[0422] The active layer is made of n-type semiconductor material, such as fullerene (e.g., C 60 , C 70 Examples of electron-accepting organic semiconductor materials include fullerene derivatives and other fullerenes. Fullerenes have a soccer ball-like shape, which is energetically stable. Fullerenes have deep (low) HOMO and LUMO levels. Because fullerenes have a deep LUMO level, they have extremely high electron-accepting (acceptor) properties. Normally, when the π-electron conjugation (resonance) spreads across a plane, as in benzene, the electron-donating (donor) properties increase, but because fullerenes have a spherical shape, they have high electron-accepting properties despite the wide spread π-electron conjugation. High electron-accepting properties allow charge separation to occur quickly and efficiently, making them useful as light-receiving elements. C 60 , C 70 Both have a wide absorption band in the visible light region, especially C 70 is C 60 It is preferable because it has a larger π-electron conjugated system and a wide absorption band in the long wavelength region compared to [6,6]-Phenyl-C 71 -butyric acid methyl ester (abbreviation: PC70BM), [6,6]-Phenyl-C 61 -butyric acid methyl eSter (abbreviation: PC60BM), 1',1'',4',4''-Tetrahydro-di[1,4]methanonaphthaleno[1,2:2',3',56,60:2'',3''][5,6]fulrerene-C 60 (abbreviated as ICBA) and others.

[0423] Furthermore, examples of n-type semiconductor materials include perylene tetracarboxylic acid derivatives such as N,N'-dimethyl-3,4,9,10-perylene tetracarboxylic acid diimide (abbreviation: Me-PTCDI).

[0424] Furthermore, examples of n-type semiconductor materials include 2,2'-(5,5'-(thieno[3,2-b]thiophene-2,5-diyl)bis(thiophene-5,2-diyl))bis(methane-1-yl-1-ylidene)dimalononitrile (abbreviation: FT2TDMN).

[0425] Furthermore, examples of n-type semiconductor materials include metal complexes having a quinoline skeleton, metal complexes having a benzoquinoline skeleton, metal complexes having an oxazole skeleton, metal complexes having a thiazole skeleton, oxadiazole derivatives, triazole derivatives, imidazole derivatives, oxazole derivatives, thiazole derivatives, phenanthroline derivatives, quinoline derivatives, benzoquinoline derivatives, quinoxaline derivatives, dibenzoquinoxaline derivatives, pyridine derivatives, bipyridine derivatives, pyrimidine derivatives, naphthalene derivatives, anthracene derivatives, coumarin derivatives, rhodamine derivatives, triazine derivatives, and quinone derivatives.

[0426] Examples of p-type semiconductor materials for the active layer include electron-donating organic semiconductor materials such as copper(II) phthalocyanine (CuPc), tetraphenyldibenzoperiflanthene (DBP), zinc phthalocyanine (ZnPc), tin phthalocyanine (SnPc), quinacridone, and rubrene.

[0427] Examples of p-type semiconductor materials include carbazole derivatives, thiophene derivatives, furan derivatives, and compounds having an aromatic amine skeleton. Examples of p-type semiconductor materials include naphthalene derivatives, anthracene derivatives, pyrene derivatives, triphenylene derivatives, fluorene derivatives, pyrrole derivatives, benzofuran derivatives, benzothiophene derivatives, indole derivatives, dibenzofuran derivatives, dibenzothiophene derivatives, indolocarbazole derivatives, porphyrin derivatives, phthalocyanine derivatives, naphthalocyanine derivatives, quinacridone derivatives, rubrene derivatives, tetracene derivatives, polyphenylenevinylene derivatives, polyparaphenylene derivatives, polyfluorene derivatives, polyvinylcarbazole derivatives, and polythiophene derivatives.

[0428] The HOMO level of the electron-donating organic semiconductor material is preferably shallower (higher) than the HOMO level of the electron-accepting organic semiconductor material, and the LUMO level of the electron-donating organic semiconductor material is preferably shallower (higher) than the LUMO level of the electron-accepting organic semiconductor material.

[0429] It is preferable to use a spherical fullerene as the electron-accepting organic semiconductor material and a planar organic semiconductor material as the electron-donating organic semiconductor material. Molecules with similar shapes tend to aggregate together, and when molecules of the same type aggregate, the energy levels of their molecular orbitals become close, which can improve carrier transport properties.

[0430] For example, the active layer is preferably formed by co-evaporating an n-type semiconductor and a p-type semiconductor, or may be formed by laminating an n-type semiconductor and a p-type semiconductor.

[0431] The light-receiving element may further include, as a layer other than the active layer, a layer containing a substance with high hole-transporting properties, a substance with high electron-transporting properties, a bipolar substance (a substance with high electron-transporting properties and high hole-transporting properties), etc. Furthermore, without being limited to the above, the light-receiving element may further include a layer containing a substance with high hole-injecting properties, a hole-blocking material, a material with high electron-injecting properties, an electron-blocking material, etc.

[0432] The light-receiving element can be made of either a low-molecular-weight compound or a high-molecular-weight compound, and may contain an inorganic compound. The layers constituting the light-receiving element can be formed by a method such as vapor deposition (including vacuum deposition), transfer, printing, ink-jet printing, or coating.

[0433] For example, the hole transport material or electron blocking material may be a polymer compound such as poly(3,4-ethylenedioxythiophene) / (polystyrene sulfonate) (abbreviated as PEDOT / PSS), or an inorganic compound such as molybdenum oxide or copper iodide (CuI). The electron transport material or hole blocking material may be an inorganic compound such as zinc oxide (ZnO), or an organic compound such as polyethyleneimine ethoxylate (PEIE). The light-receiving element may have, for example, a mixed film of PEIE and ZnO.

[0434] In addition, the active layer can be made of a polymer compound such as Poly[[4,8-bis[5-(2-ethylhexyl)-2-thienyl]benzo[1,2-b:4,5-b']dithiophene-2,6-diyl]-2,5-thiophenediyl[5,7-bis(2-ethylhexyl)-4,8-dioxo-4H,8H-benzo[1,2-c:4,5-c']dithiophene-1,3-diyl]]polymer (abbreviated as PBDB-T), which functions as a donor, or a PBDB-T derivative. For example, an acceptor material can be dispersed in a PBDB-T derivative.

[0435] The active layer may also contain a mixture of three or more materials. For example, to expand the wavelength range, a third material may be mixed in addition to an n-type semiconductor material and a p-type semiconductor material. In this case, the third material may be a low-molecular-weight compound or a high-molecular-weight compound.

[0436] At least a part of the configuration examples exemplified in this embodiment and the corresponding drawings can be appropriately combined with other configuration examples or drawings.

[0437] (Embodiment 5) In this embodiment, an example of a cross-sectional configuration of a display device 10 (a display device 10A or a display device 10B) according to one embodiment of the present invention will be described.

[0438] 33 is a cross-sectional view showing an example of the configuration of the display device 10. The display device 10 has a substrate 11 and a substrate 12.

[0439] The substrate 11 may be, for example, a glass substrate or a single crystal silicon substrate.

[0440] The semiconductor layer 15 is provided over a substrate 11, and the transistor 445 and the transistor 601 are provided. The transistor 445 and the transistor 601 can be the transistor 21 provided in the layer 20 described in Embodiment 1.

[0441] The transistor 445 includes a conductor 448 functioning as a gate electrode, an insulator 446 functioning as a gate insulator, and a part of the substrate 11. The transistor 445 includes a semiconductor region 447 including a channel formation region, a low-resistance region 449a functioning as one of a source region and a drain region, and a low-resistance region 449b functioning as the other of the source region and the drain region. The transistor 445 can be either a p-channel type or an n-channel type.

[0442] The transistor 445 is electrically isolated from other transistors by an element isolation layer 403. Fig. 33 shows a case where the transistor 445 and the transistor 601 are electrically isolated by the element isolation layer 403. The element isolation layer 403 can be formed by a LOCOS (LOCal Oxidation of Silicon) method, an STI (Shallow Trench Isolation) method, or the like.

[0443] 33, a semiconductor region 447 has a convex shape. A conductor 448 is provided to cover the side surface and the top surface of the semiconductor region 447 with an insulator 446 interposed therebetween. Note that the conductor 448 covering the side surface of the semiconductor region 447 is not illustrated in FIG. A material that adjusts the work function can be used for the conductor 448.

[0444] A transistor with a convex semiconductor region, such as transistor 445, can be called a fin transistor because it utilizes a convex portion of a semiconductor substrate. An insulator that functions as a mask for forming the convex portion may be provided in contact with the top of the convex portion. While FIG. 33 shows a configuration in which the convex portion is formed by processing a portion of substrate 11, a semiconductor having a convex portion may also be formed by processing an SOI substrate.

[0445] 33 is just an example, and the present invention is not limited to this configuration, and it is preferable to use an appropriate configuration depending on the circuit configuration, the operation method of the circuit, etc. For example, the transistor 445 may be a planar transistor.

[0446] The transistor 601 can have a structure similar to that of the transistor 445 .

[0447] In addition to an element isolation layer 403, a transistor 445, and a transistor 601, an insulator 405, an insulator 407, an insulator 409, and an insulator 411 are provided on the substrate 11. A conductor 451 is embedded in the insulator 405, the insulator 407, the insulator 409, and the insulator 411. Here, the height of the top surface of the conductor 451 and the height of the top surface of the insulator 411 can be made approximately the same.

[0448] An insulator 421 and an insulator 214 are provided on the conductor 451 and the insulator 411. A conductor 453 is embedded in the insulator 421 and the insulator 214. Here, the height of the top surface of the conductor 453 and the height of the top surface of the insulator 214 can be made approximately the same.

[0449] An insulator 216 is provided on the conductor 453 and the insulator 214. A conductor 455 is embedded in the insulator 216. Here, the height of the top surface of the conductor 455 and the height of the top surface of the insulator 216 can be made approximately the same.

[0450] Insulators 222, 224, 254, 280, 274, and 281 are provided on conductor 455 and insulator 216. Conductor 305 is embedded in insulators 222, 224, 254, 280, 274, and 281. Here, the height of the top surface of conductor 305 and the height of the top surface of insulator 281 can be made approximately the same.

[0451] An insulator 361 is provided on the conductor 305 and on the insulator 281. The conductor 317 and the conductor 337 are embedded in the insulator 361. Here, the height of the top surface of the conductor 337 and the height of the top surface of the insulator 361 can be made approximately the same.

[0452] An insulator 363 is provided on the conductor 337 and on the insulator 361. The conductors 347, 353, 355, and 357 are embedded in the insulator 363. Here, the height of the top surfaces of the conductors 353, 355, and 357 can be made approximately the same as the height of the top surface of the insulator 363.

[0453] Conductor 760, at least a portion of which functions as a connection electrode, is provided on conductor 353, conductor 355, conductor 357, and insulator 363. An anisotropic conductor 780 is provided so as to be electrically connected to conductor 760, and an FPC (Flexible Printed Circuit) 716 is provided so as to be electrically connected to anisotropic conductor 780. Various signals and the like are supplied to the display device 10 from outside the display device 10 via the FPC 716.

[0454] As shown in FIG. 33 , the low-resistance region 449b, which functions as the other of the source region and the drain region of the transistor 445, is electrically connected to the FPC 716 through the conductor 451, the conductor 453, the conductor 455, the conductor 305, the conductor 317, the conductor 337, the conductor 347, the conductor 353, the conductor 355, the conductor 357, the conductor 760, and the anisotropic conductor 780. Here, although FIG. 33 shows three conductors, the conductor 353, the conductor 355, and the conductor 357, as conductors that electrically connect the conductor 760 and the conductor 347, one embodiment of the present invention is not limited thereto. The number of conductors that electrically connect the conductor 760 and the conductor 347 may be one, two, or four or more. By providing a plurality of conductors that electrically connect the conductor 760 and the conductor 347, contact resistance can be reduced.

[0455] A transistor 750 is provided over the insulator 214. The transistor 750 can be the transistor 52 provided in the layer 50 described in Embodiment 1. For example, the transistor 750 can be a transistor provided in the pixel circuit 51. An OS transistor can be preferably used as the transistor 750. An OS transistor has an extremely low off-state current. Therefore, the retention time of image data and the like can be extended, thereby reducing the frequency of a refresh operation. For example, the frame frequency or refresh rate when displaying a still image can be set to 1 Hz or less, preferably 0.1 Hz or less. Therefore, the power consumption of the display device 10 can be reduced.

[0456] Conductor 301a and conductor 301b are embedded in insulator 254, insulator 280, insulator 274, and insulator 281. Conductor 301a is electrically connected to one of the source and drain of transistor 750, and conductor 301b is electrically connected to the other of the source and drain of transistor 750. Here, the height of the top surfaces of conductor 301a and conductor 301b and the height of the top surface of insulator 281 can be made approximately the same.

[0457] The conductor 311, the conductor 313, the conductor 331, the capacitor 790, the conductor 333, and the conductor 335 are embedded in the insulator 361. The conductor 311 and the conductor 313 are electrically connected to the transistor 750 and function as wirings. The conductor 333 and the conductor 335 are electrically connected to the capacitor 790. Here, the height of the top surfaces of the conductor 331, the conductor 333, and the conductor 335 can be made approximately the same as the height of the top surface of the insulator 361.

[0458] Conductor 341, conductor 343, and conductor 351 are embedded in insulator 363. Here, the height of the top surface of conductor 351 and the height of the top surface of insulator 363 can be made to be approximately the same.

[0459] The insulators 405, 407, 409, 411, 421, 214, 280, 274, 281, 361, and 363 function as interlayer films and may also function as planarizing films that cover the uneven shapes below them. For example, the top surface of the insulator 363 may be planarized by planarization treatment using chemical mechanical polishing (CMP) or the like to improve flatness.

[0460] 33, the capacitor 790 has a lower electrode 321 and an upper electrode 325. An insulator 323 is provided between the lower electrode 321 and the upper electrode 325. That is, the capacitor 790 has a layered structure in which the insulator 323, which functions as a dielectric, is sandwiched between a pair of electrodes. Note that while FIG. 33 shows an example in which the capacitor 790 is provided on the insulator 281, the capacitor 790 may also be provided on an insulator different from the insulator 281.

[0461] FIG. 33 shows an example in which conductors 301a, 301b, and 305 are formed in the same layer. It also shows an example in which conductors 311, 313, 317, and the lower electrode 321 are formed in the same layer. It also shows an example in which conductors 331, 333, 335, and 337 are formed in the same layer. It also shows an example in which conductors 341, 343, and 347 are formed in the same layer. It also shows an example in which conductors 351, 353, 355, and 357 are formed in the same layer. Forming multiple conductors in the same layer can simplify the manufacturing process of the display device 10, thereby reducing the manufacturing cost of the display device 10. These conductors may be formed in different layers and may be made of different types of materials.

[0462] 33 includes a light-emitting element 61. The light-emitting element 61 includes a conductor 772, an EL layer 786, and a conductor 788. The EL layer 786 includes an organic compound or an inorganic compound such as quantum dots.

[0463] Examples of materials that can be used for the organic compounds include fluorescent materials and phosphorescent materials, while examples of materials that can be used for the quantum dots include colloidal quantum dot materials, alloy quantum dot materials, core-shell quantum dot materials, and core quantum dot materials.

[0464] The conductor 772 is electrically connected to the other of the source and the drain of the transistor 750 through the conductor 351, the conductor 341, the conductor 331, the conductor 313, and the conductor 301b. The conductor 772 is formed over the insulator 363 and functions as a pixel electrode.

[0465] A material that is transparent to or reflective to visible light can be used for the conductor 772. For example, an oxide material containing indium, zinc, tin, or the like can be used as the light-transmitting material. For example, a material containing aluminum, silver, or the like can be used as the reflective material.

[0466] Although not shown in FIG. 33, the display device 10 can be provided with optical members (optical substrates) such as a polarizing member, a phase difference member, an anti-reflection member, and the like.

[0467] A light-shielding layer 738 and an insulator 734 in contact with the light-shielding layer 738 are provided on the substrate 12 side. The light-shielding layer 738 has a function of blocking light emitted from an adjacent region. Alternatively, the light-shielding layer 738 has a function of blocking external light from reaching the transistor 750 and the like. The substrate 12 is connected to the insulator 363 via a sealing material 712.

[0468] 33, an insulator 730 is provided over an insulator 363. Here, the insulator 730 can be configured to cover part of a conductor 772. Furthermore, the light-emitting element 61 includes a light-transmitting conductor 788 and can be a top-emission light-emitting element.

[0469] The light-shielding layer 738 is provided so as to have a region overlapping with the insulator 730. The light-shielding layer 738 is covered with the insulator 734. The space between the light-emitting element 61 and the insulator 734 is filled with the sealing layer 732.

[0470] Furthermore, structure 778 is disposed between insulator 730 and EL layer 786. Structure 778 is also disposed between insulator 730 and insulator 734.

[0471] FIG. 34 shows a modified example of the display device 10 shown in FIG. 33. The display device 10 shown in FIG. 34 differs from the display device 10 shown in FIG. 33 in that a colored layer 736 is provided. The colored layer 736 is provided so as to have an area overlapping with the light-emitting element 61. By providing the colored layer 736, the color purity of the light extracted from the light-emitting element 61 can be increased. This allows the display device 10 to display a high-quality image. Furthermore, since all of the light-emitting elements 61 of the display device 10 can be light-emitting elements that emit white light, it is not necessary to form the EL layer 786 by different colors, and the display device 10 can have high definition.

[0472] The light emitting element 61 can have a micro-optical resonator (microcavity) structure. This allows light of a predetermined color (for example, RGB) to be extracted without providing a colored layer, and the display device 10 can perform color display. By configuring the display device 10 without providing a colored layer, it is possible to suppress light absorption by the colored layer. This allows the display device 10 to display high-brightness images and reduce the power consumption of the display device 10. Note that even when the EL layer 786 is formed in an island shape for each pixel or in a striped shape for each pixel column, that is, formed by coloring, it is possible to configure the display device 10 without providing a colored layer. Note that the light emission brightness of the display device 10 is 500 cd / m 2 More than 1000 cd / m is preferable. 2 More preferably, 2000 cd / m 2 The above is more preferable. Furthermore, light emission at high luminance may damage the reliability of the display device 10. Therefore, the luminance of the display device 10 is set to 15000 cd / m 2 Preferably less than 10000 cd / m 2 The following is more preferred:

[0473] At least a part of the configuration examples exemplified in this embodiment and the corresponding drawings can be appropriately combined with other configuration examples or drawings.

[0474] (Embodiment 6) In this embodiment, an example of a cross-sectional configuration of the display device 10 different from that of the fifth embodiment will be described.

[0475] 35(A) shows an example of a cross-sectional configuration of the display device 10. The display device 10 shown in FIG.

[0476] The light-emitting element 61R has a function of emitting red light (R). The light-emitting element 61G has a function of emitting green light (G). The transistor 300 and the transistor 310 are transistors having a channel formation region in the substrate 16. The substrate 16 can be, for example, a semiconductor substrate such as a single crystal silicon substrate. The transistor 300 and the transistor 310 have a part of the substrate 16, a conductor 371, a low-resistance region 372, an insulator 373, and an insulator 374. The conductor 371 functions as a gate electrode. The insulator 373 is located between the substrate 16 and the conductor 371 and functions as a gate insulator. The low-resistance region 372 is a region in which the substrate 16 is doped with impurities and functions as a source or drain. The insulator 374 is provided to cover a side surface of the conductor 371.

[0477] The transistor 300 corresponds to, for example, the transistor 52B described in the above embodiment, and the transistor 310 corresponds to, for example, the transistor 132 described in the above embodiment.

[0478] Furthermore, an element isolation layer 403 is provided between two adjacent transistors 300 so as to be embedded in the substrate 16 .

[0479] In addition, an insulator 261 is provided to cover the transistor 310 , and a capacitor 791 is provided on the insulator 261 .

[0480] The capacitor 791 has a conductor 792, a conductor 794, and an insulator 793 positioned therebetween. The conductor 792 functions as one electrode of the capacitor 791, the conductor 794 functions as the other electrode of the capacitor 791, and the insulator 793 functions as a dielectric of the capacitor 791.

[0481] The conductor 792 is provided over the insulator 261 and is embedded in the conductor 795. The conductor 792 is electrically connected to one of the source and drain of the transistor 300 by a plug 257 embedded in the insulator 261. The insulator 793 is provided to cover the conductor 792. The conductors 792 and 794 have a region where they overlap with each other with the insulator 793 interposed therebetween.

[0482] Note that the insulator 793 is preferably a high-k material or a ferroelectric insulating layer. More specifically, a stacked structure of a high-k material with a high dielectric constant and a material with a higher dielectric strength than the high-k material can be used. For example, the insulator 793 can be an insulating film in which zirconium oxide, aluminum oxide, and zirconium oxide are stacked in this order. Alternatively, the insulator 793 can be an insulating film in which zirconium oxide, aluminum oxide, zirconium oxide, and aluminum oxide are stacked in this order. Alternatively, the insulator 793 can be an insulating film in which hafnium zirconium oxide, aluminum oxide, hafnium zirconium oxide, and aluminum oxide are stacked in this order. Using a stacked insulator with a relatively high dielectric strength, such as aluminum oxide, improves the dielectric strength and suppresses electrostatic breakdown of the capacitor 791.

[0483] An insulator 255a is provided covering the capacitor 791, an insulator 255b is provided on the insulator 255a, and an insulator 255c is provided on the insulator 255b. The light-emitting element 61R and the light-emitting element 61G are provided on the insulator 255c. Insulators are provided in the regions between adjacent light-emitting devices and in the regions between adjacent light-emitting devices and light-receiving devices. In FIG. 35(A) and other figures, a protective layer 271 and an insulator 278 on the protective layer 271 are provided in these regions.

[0484] An insulator 270 is provided on each of the EL layer 172R of the light-emitting element 61R and the EL layer 172G of the light-emitting element 61G. A common layer 174 is provided on the EL layer 172R, the EL layer 172G, and the insulator 278, and a conductor 173 is provided on the common layer 174. A protective layer 273 is provided on the conductor 173.

[0485] The conductor 171 is electrically connected to one of the source and drain of the transistor 310 by a plug 256 embedded in the insulators 793, 255a, 255b, and 255c, a conductor 792 embedded in the conductor 795, and a plug 257 embedded in the insulator 261. The height of the top surface of the insulator 255c and the height of the plug 256 are the same or approximately the same. Various conductive materials can be used for the plug.

[0486] Furthermore, an insulator 276 is provided on the light-emitting element 61R, the light-emitting element 61G, and the light-receiving element 71. The components from the conductor 171 to the insulator 276 correspond to the layer 60. The substrate 12 is provided on the insulator 276. The insulator 276 functions as an adhesive layer. The layered structure from the substrate 16 to the insulator 255c corresponds to the layer 50 of the display device 10A and the display device 10B.

[0487] In the configuration example shown in FIG. 35(A), the light emitting element is formed on the layer 60, and the light receiving element is formed on the layer 50 or the layer 20.

[0488] The light receiving element 71 has a function of detecting light Lin that is incident from the outside of the display device through the insulator 276, the insulator 255a, the insulator 261, and the like.

[0489] Figure 35(B) shows an example of a cross-sectional configuration different from the example of the cross-sectional configuration of the display device 10 shown in Figure 35(A). Figure 35(B) is a modified example of Figure 35(A). The display device 10 shown in Figure 35(B) has a light-emitting element 61W instead of light-emitting element 61R and light-emitting element 61G, and has a colored layer in a region on insulator 276 that overlaps with light-emitting element 61W. Figure 35(B) shows an example of a cross-sectional configuration of display device 10 that has colored layer 264R that overlaps one light-emitting element 61W and colored layer 264G that overlaps another light-emitting element 61W.

[0490] The light-emitting element 61W has a function of emitting white light. The colored layer 264R has a function of transmitting red light, and the colored layer 264G has a function of transmitting green light. The white light (W) emitted from the light-emitting element 61W is emitted as red light to the outside of the display device through the colored layer 264R. The white light (W) emitted from the light-emitting element 61W is emitted as green light to the outside of the display device through the colored layer 264G. Although not shown in FIG. 35(B), a colored layer that transmits light in wavelength ranges other than red light and green light, such as blue light, may also be used.

[0491] Furthermore, a colored layer 264X may be provided on the insulator 276 in a region overlapping with the light receiving element 71. A colored layer that transmits light in any wavelength range can be provided as the colored layer 264X. By providing the colored layer 264X, only light that transmits through the colored layer 264X can be detected by the light receiving element 71.

[0492] 35(B) has an insulator 258 on the colored layer 264R, the colored layer 264G, and the colored layer 264X, and has a substrate 12 on the insulator 258. The insulator 258 functions as an adhesive layer.

[0493] Fig. 36(A) shows a modified example of the display device 10 shown in Fig. 35(B). The display device 10 shown in Fig. 36(A) has a configuration in which an EL layer 172W is shared by adjacent light-emitting elements 61W. The EL layer 172W also remains in the region overlapping with the light-receiving element 71. If the film thickness of the EL layer 172W is thin enough to transmit the light Lin, the light Lin can be detected even if the EL layer 172W remains in the region overlapping with the light-receiving element 71.

[0494] Fig. 36(B) shows a modified example of the display device 10 shown in Fig. 35(A). As described in the above embodiment, the light-receiving element 71 can be realized by replacing the EL layer 172 of the light-emitting element 61 with an active layer 182 that functions as a photoelectric conversion layer.

[0495] 36(B), a light-emitting element 61 and a light-receiving element 71 are provided in a layer 60. The light-receiving element 71 provided in the layer 60 is electrically connected to one of the source and drain of the transistor 310 via a plug 256 and a plug 257.

[0496] Alternatively, as shown in FIG. 37(A), a colored layer 264R and a colored layer 264G may be provided overlapping the light-emitting element 61W, and a colored layer 264X may be provided overlapping the light-receiving element 71.

[0497] 37(B), a colored layer 264R and a colored layer 264G may be provided on top of the light-emitting element 61W, and no colored layer may be provided on the light-receiving element 71. In addition, as shown in FIG.

[0498] Fig. 38 shows a modification of the display device 10 shown in Fig. 35(A). The display device 10 shown in Fig. 38 has a structure in which a transistor 300 and a transistor 302 are stacked. The transistor 300 has a channel formed in a substrate 16. The transistor 302 has a channel formed in a substrate 17. Both the substrate 16 and the substrate 17 are semiconductor substrates.

[0499] The display device 10 shown in FIG. 38 has a configuration in which a substrate 16 on which a transistor 300, a capacitor 791, and a light-receiving element 71 are provided and a substrate 17 on which a transistor 302 is provided are bonded together.

[0500] Here, it is preferable to provide an insulator 345 on the lower surface of substrate 16. It is also preferable to provide an insulator 346 on insulator 262 provided on substrate 17. Insulators 345 and 346 are insulators that function as protective layers and can suppress the diffusion of impurities into substrates 16 and 17.

[0501] Furthermore, an insulator 796 and an insulator 797 may be provided between the insulator 261 and the conductor 792. A conductor 798 may be provided over the insulator 261. The conductor 798 is preferably embedded in the insulator 797.

[0502] A plug 342 is provided in the substrate 16, penetrating the substrate 16 and an insulator 345. Preferably, an insulator 344 is provided to cover the side surface of the plug 342. The insulator 344 functions as a protective layer and can suppress the diffusion of impurities into the substrate 16. When the substrate 16 is a silicon substrate, the plug 342 is also called a through silicon via (TSV).

[0503] Furthermore, a conductor 348 is provided on the back surface of the substrate 16 (the surface opposite to the substrate 12 side), below the insulator 345. The conductor 348 is preferably provided so as to be embedded in the insulator 332. Furthermore, the bottom surfaces of the conductor 348 and the insulator 332 are preferably flattened. Here, the conductor 348 is electrically connected to the conductor 798 via the plug 342.

[0504] On the other hand, in the substrate 17, a conductor 349 is provided on an insulator 346. The conductor 349 is preferably provided so as to be embedded in the insulator 336. Furthermore, the top surfaces of the conductor 349 and the insulator 336 are preferably flattened.

[0505] The conductor 348 and the conductor 349 are joined together to electrically connect the substrate 17 and the substrate 16. Here, by improving the flatness of the surface formed by the conductor 348 and the insulator 332 and the surface formed by the conductor 349 and the insulator 336, the joining state of the conductor 348 and the conductor 349 becomes good.

[0506] It is preferable to use the same conductive material for conductors 348 and 349. For example, a metal film containing an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, or a metal nitride film containing the above elements (titanium nitride film, molybdenum nitride film, tungsten nitride film), etc., can be used. In particular, it is preferable to use copper for conductors 348 and 349. This allows for the application of Cu-Cu (copper-copper) direct bonding technology (technology that achieves electrical conductivity by connecting Cu (copper) electrode pads together).

[0507] 38, the layered structure from conductor 348 and insulator 332 to insulator 255c corresponds to layer 50 of display device 10A and display device 10B. Also, the layered structure from substrate 17 to conductor 349 and insulator 336 corresponds to layer 20 of display device 10A and display device 10B.

[0508] As in the display device 10 shown in FIG. 39, bumps 358 may be provided between conductors 348 and 349, and the conductors 348 and 349 may be electrically connected via the bumps 358. The bumps 358 may be formed using a conductive material containing, for example, gold (Au), nickel (Ni), indium (In), tin (Sn), or the like. Alternatively, for example, solder may be used as the bumps 358. An adhesive layer 359 may be provided between the insulators 332 and 336. When the bumps 358 are provided, the insulators 332 and 336 may not be provided.

[0509] FIG. 40 shows a modification of the display device 10 shown in FIG. 37. The display device 10 shown in FIG. 40 has a transistor 380 over a substrate 16. Therefore, the display device 10 shown in FIG. 40 has a structure in which the transistor 380 and the transistor 302 are stacked. The transistor 380 is a transistor having a back gate. The substrate 16 may be a semiconductor substrate or a substrate made of another material.

[0510] 40, the light receiving element 71 shown in Fig. 36(B) is used as the light receiving element 71. Specifically, an organic semiconductor is used for the active layer that functions as a photoelectric conversion layer.

[0511] The transistor 380 includes a semiconductor 382, ​​an insulator 384, a conductor 385, a pair of conductors 383, an insulator 326, and a conductor 381. The semiconductor 382 may be an oxide semiconductor, for example.

[0512] 40 includes an insulator 324 on the substrate 16. The insulator 324 functions as a barrier layer that prevents impurities such as water or hydrogen from diffusing from the substrate 16 side to the transistor 380 and prevents oxygen from being released from the semiconductor 382 toward the insulator 324. The insulator 324 can be, for example, an aluminum oxide film, a hafnium oxide film, or a silicon nitride film, through which hydrogen or oxygen is less likely to diffuse than a silicon oxide film.

[0513] A conductor 381 is provided over an insulator 324, and an insulator 326 is provided to cover the conductor 381. An oxide insulating film such as a silicon oxide film is preferably used for at least a portion of the insulator 326 that is in contact with the semiconductor 382. The top surface of the insulator 326 is preferably planarized.

[0514] The semiconductor 382 is provided over the insulator 326. A pair of conductors 383 is provided over and in contact with the semiconductor 382 and functions as a source electrode and a drain electrode.

[0515] An insulator 327 is provided to cover the top surfaces and side surfaces of the pair of conductors 383 and the side surfaces of the semiconductor 382, ​​and the insulator 261 is provided over the insulator 327. The insulator 327 functions as a barrier layer to prevent impurities such as water or hydrogen from diffusing from the insulator 261 to the semiconductor 382 and to prevent oxygen from being released from the semiconductor 382. The insulator 327 can be an insulating film similar to that of the insulator 324.

[0516] Openings reaching the semiconductor 382 are provided in the insulator 327 and the insulator 261. Inside the openings, an insulator 384 in contact with the side surfaces of the insulator 261, the insulator 327, and the conductor 383 and the top surface of the semiconductor 382, ​​and a conductor 385 in contact with the insulator 384 are embedded.

[0517] Conductor 385 serves as a first gate electrode of transistor 380, and insulator 384 serves as a first gate insulator. Conductor 381 serves as a second gate electrode of transistor 380, and a portion of insulator 326 serves as a second gate insulator.

[0518] When one of the first gate electrode and the second gate electrode is referred to as a "gate" or a "gate electrode," the other of the first gate electrode and the second gate electrode may be referred to as a "back gate" or a "back gate electrode."

[0519] The upper surfaces of the conductor 385, the insulator 384, and the insulator 261 are flattened so that their heights are the same or approximately the same, and the insulators 329 and 263 are provided to cover them.

[0520] The insulators 261 and 263 function as interlayer insulators. The insulator 329 functions as a barrier layer that prevents impurities such as water or hydrogen from diffusing from the insulator 263 side into the transistor 380. The insulator 329 can be an insulating film similar to the insulators 327 and 324.

[0521] A plug 799 electrically connected to one of the pair of conductors 383 is provided so as to be embedded in an opening provided in insulator 796, insulator 797, insulator 263, insulator 329, insulator 261, and insulator 327.

[0522] Here, it is preferable that plug 799 uses a conductive material that is resistant to diffusion of hydrogen and oxygen at the portions that contact the side surfaces of the openings of insulators 796, 797, 263, 329, 261, and 327, and at the portions that contact a portion of conductor 383 at the bottom of the openings.

[0523] 40, the plug 342 is provided so as to penetrate the insulator 263, the insulator 329, the insulator 261, the insulator 327, the insulator 326, the insulator 324, the substrate 16, and the insulator 345. As described above, it is preferable to provide the insulator 344 so as to cover the side surface of the plug 342.

[0524] 41, a bump 358 may be provided between the conductor 348 and the conductor 349, and the conductor 348 and the conductor 349 may be electrically connected via the bump 358. An adhesive layer 359 may be provided between the insulator 332 and the insulator 336. The display device 10 shown in FIG. 41 is a modified example of the display device 10 shown in FIG. 40, but is also a modified example of the display device 10 shown in FIG. 38.

[0525] Furthermore, as shown in FIG. 36(A), a colored layer 264X may be provided so as to overlap the light receiving element 71.

[0526] At least a part of the configuration examples exemplified in this embodiment and the corresponding drawings can be appropriately combined with other configuration examples or drawings.

[0527] (Embodiment 7) In this embodiment, a structural example of an OS transistor that can be used in a display device of one embodiment of the present invention will be described.

[0528] <Transistor configuration example 1> 42A, 42B, and 42C are a plan view and a cross-sectional view of a transistor 750 that can be used in a display device of one embodiment of the present invention and the periphery of the transistor 750. The transistor 750 can also be applied to the transistor 380, etc.

[0529] FIG. 42(A) is a plan view of the transistor 750. Also, FIGS. 42(B) and 42(C) are cross-sectional views of the transistor 750. Here, FIG. 42(B) is a cross-sectional view of a portion indicated by the dashed-dotted line A1-A2 in FIG. 42(A), and is also a cross-sectional view of the transistor 750 in the channel length direction. Also, FIG. 42(C) is a cross-sectional view of a portion indicated by the dashed-dotted line A3-A4 in FIG. 42(A), and is also a cross-sectional view of the transistor 750 in the channel width direction. Note that in the plan view of FIG. 42(A), some elements are omitted for clarity.

[0530] As shown in Figures 42(A) to (C), the transistor 750 includes a metal oxide 220a disposed on a substrate (not shown), a metal oxide 220b disposed on the metal oxide 220a, a conductor 242a and a conductor 242b disposed spaced apart from each other on the metal oxide 220b, an insulator 280 disposed on the conductors 242a and 242b and having an opening formed between the conductors 242a and 242b, a conductor 260 disposed in the opening, an insulator 250 disposed among the metal oxide 220b, the conductors 242a, the conductor 242b, and the insulator 280, and the conductor 260, and a metal oxide 220c disposed among the metal oxide 220b, the conductors 242a, the conductor 242b, the insulator 280, and the insulator 250. 42(B) and 42(C), it is preferable that the top surface of the conductor 260 is substantially flush with the top surfaces of the insulator 250, the metal oxide 220c, and the insulator 280. Note that, hereinafter, the metal oxide 220a, the metal oxide 220b, and the metal oxide 220c may be collectively referred to as the metal oxide 220. Furthermore, the conductor 242a and the conductor 242b may be collectively referred to as the conductor 242.

[0531] 42(A) to 42(C), it is preferable that the insulator 254 be disposed between the insulator 224, the metal oxide 220a, the metal oxide 220b, the conductor 242a, the conductor 242b, and the metal oxide 220c and the insulator 280. Here, it is preferable that the insulator 254 be in contact with the side surface of the metal oxide 220c, the top and side surfaces of the conductor 242a, the top and side surfaces of the conductor 242b, the side surfaces of the metal oxide 220a and the metal oxide 220b, and the top surface of the insulator 224, as shown in FIGS.

[0532] Note that the transistor 750 has a three-layer structure of the metal oxide 220a, the metal oxide 220b, and the metal oxide 220c stacked in and around a region where a channel is formed (hereinafter also referred to as a channel formation region), but the present invention is not limited to this. For example, a two-layer structure of the metal oxide 220b and the metal oxide 220c or a stacked structure of four or more layers may be used. Furthermore, each of the metal oxide 220a, the metal oxide 220b, and the metal oxide 220c may have a stacked structure of two or more layers.

[0533] For example, when metal oxide 220c has a layered structure consisting of a first metal oxide and a second metal oxide on the first metal oxide, it is preferable that the first metal oxide has a composition similar to that of metal oxide 220b, and the second metal oxide has a composition similar to that of metal oxide 220a.

[0534] Here, the conductor 260 functions as the gate electrode of the transistor, and the conductors 242a and 242b function as the source and drain electrodes, respectively. As described above, the conductor 260 is formed so as to be embedded in the opening of the insulator 280 and in the region sandwiched between the conductors 242a and 242b. Here, the arrangement of the conductors 260, 242a, and 242b is selected in a self-aligned manner with respect to the opening of the insulator 280. That is, in the transistor 750, the gate electrode can be positioned between the source and drain electrodes in a self-aligned manner. Therefore, the conductor 260 can be formed without providing an alignment margin, thereby reducing the area occupied by the transistor 750. This allows for a high-resolution display device. Furthermore, the frame of the display device can be narrowed.

[0535] 42A to 42C, the conductor 260 preferably includes a conductor 260a provided inside the insulator 250 and a conductor 260b provided so as to be embedded inside the conductor 260a. Although the conductor 260 in the transistor 750 has a two-layer stacked structure, the present invention is not limited to this. For example, the conductor 260 may have a single-layer structure or a stacked structure of three or more layers.

[0536] The transistor 750 preferably includes an insulator 214 disposed on a substrate (not shown), an insulator 216 disposed on the insulator 214, a conductor 205 disposed so as to be embedded in the insulator 216, an insulator 222 disposed on the insulator 216 and the conductor 205, and an insulator 224 disposed on the insulator 222. A metal oxide 220a is preferably disposed on the insulator 224.

[0537] An insulator 274, which functions as an interlayer film, and an insulator 281 are preferably disposed over the transistor 750. Here, the insulator 274 is preferably disposed in contact with top surfaces of the conductor 260, the insulator 250, the metal oxide 220c, and the insulator 280.

[0538] It is preferable that insulators 222, 254, and 274 have the function of suppressing the diffusion of hydrogen (e.g., at least one of hydrogen atoms, hydrogen molecules, etc.). For example, it is preferable that insulators 222, 254, and 274 have lower hydrogen permeability than insulators 224, 250, and 280. It is also preferable that insulators 222 and 254 have the function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.). For example, it is preferable that insulators 222 and 254 have lower oxygen permeability than insulators 224, 250, and 280.

[0539] Here, the insulator 224, the metal oxide 220, and the insulator 250 are separated by the insulator 222 and the insulator 274. Therefore, impurities such as hydrogen and excess oxygen contained in the layer above the insulator 274 and the layer below the insulator 222 can be prevented from being mixed into the insulator 224, the metal oxide 220, and the insulator 250.

[0540] It is preferable that a conductor 245 (conductor 245a and conductor 245b) electrically connected to the transistor 750 and functioning as a plug be provided. Note that the insulator 241 (insulator 241a and insulator 241b) is provided in contact with the side surface of the conductor 245 functioning as a plug. That is, the insulator 241 is provided in contact with the inner wall of the opening of the insulators 254, 280, 274, and 281. Alternatively, a first conductor of the conductor 245 may be provided in contact with the side surface of the insulator 241, and a second conductor of the conductor 245 may be provided further inside. Here, the height of the top surface of the conductor 245 and the height of the insulator 281 can be made approximately the same. Note that, in the transistor 750, a structure in which the first conductor of the conductor 245 and the second conductor of the conductor 245 are stacked is described, but the present invention is not limited to this. For example, the conductor 245 may be provided as a single layer or a laminated structure of three or more layers. When the structure has a laminated structure, it may be distinguished by assigning an ordinal number to the order of formation.

[0541] The transistor 750 preferably uses a metal oxide that functions as an oxide semiconductor (hereinafter also referred to as an oxide semiconductor) for the metal oxide 220 (the metal oxide 220a, the metal oxide 220b, and the metal oxide 220c) including the channel formation region. For example, the metal oxide that serves as the channel formation region of the metal oxide 220 preferably has a band gap of 2 eV or more, preferably 2.5 eV or more.

[0542] The metal oxide preferably contains at least indium (In) or zinc (Zn). In particular, it is preferable that it contains indium (In) and zinc (Zn). Furthermore, it is preferable that it contains an element M in addition to these. The element M can be one or more of aluminum (Al), gallium (Ga), yttrium (Y), tin (Sn), boron (B), titanium (Ti), iron (Fe), nickel (Ni), germanium (Ge), zirconium (Zr), molybdenum (Mo), lanthanum (La), cerium (Ce), neodymium (Nd), hafnium (Hf), tantalum (Ta), tungsten (W), magnesium (Mg), or cobalt (Co). In particular, it is preferable that the element M is one or more of aluminum (Al), gallium (Ga), yttrium (Y), or tin (Sn). Furthermore, it is more preferable that the element M contains either or both of Ga and Sn.

[0543] For example, metal oxides that can be used for the semiconductor layer of an OS transistor include indium oxide (In oxide), indium zinc oxide (In-Zn oxide), indium tin oxide (In-Sn oxide), indium titanium oxide (In-Ti oxide), indium gallium oxide (In-Ga oxide), indium gallium aluminum oxide (In-Ga-Al oxide), indium gallium tin oxide (In-Ga-Sn oxide), gallium zinc oxide (Ga-Zn oxide, also referred to as "GZO"), and aluminum zinc oxide (Al-Zn oxide, also referred to as "AZO"). Indium aluminum zinc oxide (In-Al-Zn oxide, also written as "IAZO"), indium tin zinc oxide (In-Sn-Zn oxide), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also written as "IGZO"), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide, also written as "IGZTO"), indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also written as "IGAZO" or "IAGZO"), etc. Alternatively, silicon-containing indium tin oxide, gallium tin oxide (Ga-Sn oxide), aluminum tin oxide (Al-Sn oxide), etc. can be used.

[0544] By increasing the ratio of the number of indium atoms to the total number of atoms of all metal elements contained in the metal oxide, the field-effect mobility of the transistor can be increased.

[0545] Furthermore, by increasing the ratio of the number of zinc atoms to the total number of atoms of the metal elements among the main component elements contained in the metal oxide, the metal oxide can be made highly crystalline, and the diffusion of impurities in the metal oxide can be suppressed, thereby suppressing fluctuations in the electrical characteristics of the transistor and improving its reliability.

[0546] Furthermore, by increasing the ratio of the number of atoms of element M to the total number of atoms of metal elements among the main component elements contained in the metal oxide, the formation of oxygen vacancies in the metal oxide can be suppressed. Therefore, carrier generation due to oxygen vacancies is suppressed, and a transistor with a small off-state current can be obtained. Furthermore, fluctuations in the electrical characteristics of the transistor can be suppressed, thereby improving reliability.

[0547] The electrical characteristics and reliability of a transistor vary depending on the composition of the metal oxide used in the semiconductor layer. Therefore, by varying the composition of the metal oxide depending on the electrical characteristics and reliability required of the transistor, a semiconductor device that has both excellent electrical characteristics and high reliability can be realized.

[0548] When an In-Zn oxide is used for the semiconductor layer of an OS transistor, a metal oxide having an indium atomic ratio equal to or greater than that of zinc may be used, for example, a metal oxide having an indium to zinc atomic ratio of In:Zn=1:1, In:Zn=2:1, In:Zn=3:1, In:Zn=4:1, In:Zn=5:1, In:Zn=7:1, or In:Zn=10:1, or any of these values.

[0549] When an In-Sn oxide is used for a semiconductor layer of an OS transistor, a metal oxide having an indium atomic ratio equal to or greater than that of tin may be used, for example, a metal oxide having an indium to tin atomic ratio of In:Sn=1:1, In:Sn=2:1, In:Sn=3:1, In:Sn=4:1, In:Sn=5:1, In:Sn=7:1, or In:Sn=10:1, or a ratio close to these values.

[0550] When an In-Sn-Zn oxide is used for the semiconductor layer of an OS transistor, a metal oxide in which the atomic ratio of indium is higher than that of tin may be used. Furthermore, a metal oxide in which the atomic ratio of zinc is higher than that of tin is preferably used. For example, the atomic ratios of indium, tin, and zinc may be In:Sn:Zn=2:1:3, In:Sn:Zn=3:1:2, In:Sn:Zn=4:2:3, In:Sn:Zn=4:2:4.1, In:Sn:Zn=5:1:3, In:Sn:Zn=5:1:6, In:Sn:Zn=5:1:7, In:Sn:Zn=5:1:8, In:Sn:Zn=6:1. :6, In:Sn:Zn=10:1:3, In:Sn:Zn=10:1:6, In:Sn:Zn=10:1:7, In:Sn:Zn=10:1:8, In:Sn:Zn=5:2:5, In:Sn:Zn=10:1:10, In:Sn:Zn=20:1:10, In:Sn:Zn=40:1:10, or metal oxides thereof may also be used.

[0551] When an In-Al-Zn oxide is used for a semiconductor layer of an OS transistor, a metal oxide in which the atomic ratio of indium is higher than that of aluminum may be used, and more preferably, a metal oxide in which the atomic ratio of zinc is higher than that of aluminum. For example, metal oxides having an atomic ratio of indium, aluminum, and zinc of In:Al:Zn=2:1:3, In:Al:Zn=3:1:2, In:Al:Zn=4:2:3, In:Al:Zn=4:2:4.1, In:Al:Zn=5:1:3, In:Al:Zn=5:1:6, In:Al:Zn=5:1:7, In:Al:Zn=5:1:8, In:Al:Zn=6:1:6, In:Al:Zn=10:1:3, In:Al:Zn=10:1:6, In:Al:Zn=10:1:7, In:Al:Zn=10:1:8, In:Al:Zn=5:2:5, In:Al:Zn=10:1:10, In:Al:Zn=20:1:10, In:Al:Zn=40:1:10, or similar ratios thereof may be used.

[0552] When an In-Ga-Zn oxide is used for the semiconductor layer of an OS transistor, a metal oxide in which the atomic ratio of indium is higher than that of gallium may be used, and more preferably, a metal oxide in which the atomic ratio of zinc is higher than that of gallium is used. For example, the semiconductor layer may use a metal oxide having an atomic ratio of metal elements of In:Ga:Zn=2:1:3, In:Ga:Zn=3:1:2, In:Ga:Zn=4:2:3, In:Ga:Zn=4:2:4.1, In:Ga:Zn=5:1:3, In:Ga:Zn=5:1:6, In:Ga:Zn=5:1:7, In:Ga:Zn=5:1:8, In:Ga:Zn=6:1:6, In:Ga:Zn=10:1:3, In:Ga:Zn=10:1:6, In:Ga:Zn=10:1:7, In:Ga:Zn=10:1:8, In:Ga:Zn=5:2:5, In:Ga:Zn=10:1:10, In:Ga:Zn=20:1:10, In:Ga:Zn=40:1:10, or a ratio thereof.

[0553] When an In-M-Zn oxide is used for the semiconductor layer of an OS transistor, a metal oxide in which the atomic ratio of indium is higher than the atomic ratio of the element M may be used. Furthermore, it is more preferable to use a metal oxide in which the atomic ratio of zinc is higher than the atomic ratio of the element M. For example, the semiconductor layer may use a metal oxide having an atomic ratio of metal elements such as In:M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4.1, In:M:Zn=5:1:3, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5:1:8, In:M:Zn=6:1:6, In:M:Zn=10:1:3, In:M:Zn=10:1:6, In:M:Zn=10:1:7, In:M:Zn=10:1:8, In:M:Zn=5:2:5, In:M:Zn=10:1:10, In:M:Zn=20:1:10, In:M:Zn=40:1:10, or a ratio thereof.

[0554] Furthermore, when an In-M-Zn oxide is used for the semiconductor layer, the atomic ratio of indium, element M, and zinc may be In:M:Zn=1:3:2 (atomic ratio) or a composition close thereto, or a composition close thereto, or In:M:Zn=1:1:0.5 (atomic ratio) or a composition close thereto, or In:M:Zn=1:1:1 (atomic ratio) or a composition close thereto, or In:M:Zn=1:1:1.2 (atomic ratio) or a composition close thereto, or In:M:Zn=1:1:2 (atomic ratio) or a composition close thereto. Note that a composition close thereto includes a range of ±30% of the desired atomic ratio. Furthermore, gallium is preferably used as element M.

[0555] When the element M contains a plurality of metal elements, the sum of the atomic ratios of the metal elements can be taken as the atomic ratio of the element M. For example, in the case of an In-Ga-Al-Zn oxide containing gallium and aluminum as the element M, the sum of the atomic ratio of gallium and the atomic ratio of aluminum can be taken as the atomic ratio of the element M. It is also preferable that the atomic ratios of indium, the element M, and zinc are within the aforementioned ranges.

[0556] The composition of metal oxides can be analyzed using, for example, energy dispersive X-ray spectroscopy (EDX), X-ray photoelectron spectroscopy (XPS), inductively coupled plasma-mass spectrometry (ICP-MS), or inductively coupled plasma-atomic emission spectrometry (ICP-AES). Alternatively, a combination of these techniques may be used for analysis. Note that for elements with low content, the actual content may differ from the content obtained by analysis due to analytical inaccuracies. For example, if the content of element M is low, the content of element M obtained by analysis may be lower than the actual content.

[0557] The metal oxide can be formed by a sputtering method, a CVD method such as a metal organic chemical vapor deposition (MOCVD) method, or an ALD method.

[0558] When forming a metal oxide by sputtering, the atomic ratio of the target may differ from the atomic ratio of the metal oxide. In particular, the atomic ratio of zinc in the metal oxide may be smaller than the atomic ratio of the target. Specifically, the atomic ratio of zinc in the metal oxide may be about 40% to 90% of the atomic ratio of zinc contained in the target.

[0559] When a metal oxide film is formed by sputtering, the atomic ratio is not limited to the atomic ratio of the formed metal oxide film, but may be the atomic ratio of a sputtering target used to form the metal oxide film.

[0560] Furthermore, the film thickness of the metal oxide 220b in the region that does not overlap with the conductor 242 may be thinner than the film thickness of the region that overlaps with the conductor 242. This is formed by removing a portion of the upper surface of the metal oxide 220b when forming the conductors 242a and 242b. When a conductive film that will become the conductor 242 is formed on the upper surface of the metal oxide 220b, a low-resistance region may be formed near the interface with the conductive film. In this way, by removing the low-resistance region located between the conductors 242a and 242b on the upper surface of the metal oxide 220b, it is possible to prevent a channel from being formed in that region.

[0561] According to one embodiment of the present invention, a display device having high definition and a small transistor can be provided. Alternatively, a display device having high luminance and a transistor with high on-state current can be provided. Alternatively, a display device having high-speed operation and a transistor with stable electrical characteristics can be provided. Alternatively, a display device having low power consumption and a transistor with low off-state current can be provided.

[0562] The detailed structure of a transistor 750 that can be used in a display device that is one embodiment of the present invention will be described.

[0563] The conductor 205 is disposed so as to have an overlapping region with the metal oxide 220 and the conductor 260. The conductor 205 is preferably embedded in the insulator 216.

[0564] The conductor 205 includes conductor 205a, conductor 205b, and conductor 205c. The conductor 205a is provided in contact with the bottom surface and sidewall of an opening provided in the insulator 216. The conductor 205b is provided so as to be embedded in a recess formed in the conductor 205a. Here, the upper surface of the conductor 205b is lower than the upper surface of the conductor 205a and the upper surface of the insulator 216. The conductor 205c is provided in contact with the upper surface of the conductor 205b and the side surface of the conductor 205a. Here, the height of the upper surface of the conductor 205c is approximately the same as the height of the upper surface of the conductor 205a and the height of the upper surface of the insulator 216. In other words, the conductor 205b is configured to be enclosed by the conductors 205a and 205c.

[0565] Conductor 205a and conductor 205c are preferably made of a conductive material that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (NO, NO, NO, etc.), copper atoms, etc. Alternatively, it is preferable to use a conductive material that has the function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.).

[0566] By using a conductive material capable of reducing hydrogen diffusion for the conductor 205a and the conductor 205c, it is possible to prevent impurities such as hydrogen contained in the conductor 205b from diffusing into the metal oxide 220 via the insulator 224 or the like. Furthermore, by using a conductive material capable of suppressing oxygen diffusion for the conductor 205a and the conductor 205c, it is possible to prevent the conductor 205b from being oxidized and its conductivity from decreasing. Examples of conductive materials capable of suppressing oxygen diffusion include titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, and ruthenium oxide. Therefore, it is preferable to use a single layer or a multilayer of the above conductive materials for the conductor 205a. For example, titanium nitride may be used for the conductor 205a.

[0567] The conductor 205b is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component, for example, tungsten.

[0568] Here, the conductor 260 may function as a first gate (also referred to as a top gate) electrode. The conductor 205 may function as a second gate (also referred to as a bottom gate) electrode. In this case, the Vth of the transistor 750 can be controlled by changing the potential applied to the conductor 205 independently of the potential applied to the conductor 260. In particular, applying a negative potential to the conductor 205 can increase the Vth of the transistor 750 and reduce the off-state current. Therefore, applying a negative potential to the conductor 205 can reduce the drain current when the potential applied to the conductor 260 is 0 V compared to not applying a negative potential to the conductor 205.

[0569] The conductor 205 is preferably larger than the channel formation region of the metal oxide 220. In particular, as shown in Fig. 42(C), it is preferable that the conductor 205 also extends in a region outside the end portion intersecting with the channel width direction of the metal oxide 220. In other words, it is preferable that the conductor 205 and the conductor 260 overlap with each other with an insulator interposed therebetween on the outside of the side surface of the metal oxide 220 in the channel width direction.

[0570] With the above structure, the channel formation region of the metal oxide 220 can be electrically surrounded by the electric field of the conductor 260 that functions as a first gate electrode and the electric field of the conductor 205 that functions as a second gate electrode.

[0571] 42(C), the conductor 205 is extended to function as wiring. However, without being limited to this, a conductor that functions as wiring may be provided below the conductor 205.

[0572] The insulator 214 preferably functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the transistor 750 from the substrate side. Therefore, the insulator 214 is preferably made of an insulating material that has a function of preventing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (NO, NO, NO, etc.), and copper atoms (i.e., the impurities are less likely to permeate through the insulator). Alternatively, the insulator 214 is preferably made of an insulating material that has a function of preventing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.) (i.e., the oxygen is less likely to permeate through the insulator).

[0573] For example, aluminum oxide, silicon nitride, or the like is preferably used for the insulator 214. This can prevent impurities such as water or hydrogen from diffusing from the substrate side of the insulator 214 to the transistor 750 side. Alternatively, oxygen contained in the insulator 224 or the like can be prevented from diffusing from the insulator 214 to the substrate side.

[0574] The insulators 216, 280, and 281, which function as interlayer films, preferably have a lower dielectric constant than the insulator 214. Using a material with a low dielectric constant as the interlayer film can reduce parasitic capacitance between wirings. For example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine has been added, silicon oxide to which carbon has been added, silicon oxide to which carbon and nitrogen have been added, silicon oxide having vacancies, or the like can be used as the insulators 216, 280, and 281 as appropriate.

[0575] The insulators 222 and 224 function as gate insulators.

[0576] Here, the insulator 224 in contact with the metal oxide 220 preferably releases oxygen by heating. In this specification, oxygen released by heating is sometimes referred to as excess oxygen. For example, the insulator 224 may be made of silicon oxide, silicon oxynitride, or the like as appropriate. By providing an insulator containing oxygen in contact with the metal oxide 220, oxygen vacancies in the metal oxide 220 can be reduced and the reliability of the transistor 750 can be improved.

[0577] Specifically, it is preferable to use an oxide material from which a portion of oxygen is released by heating as the insulator 224. The oxide material from which oxygen is released by heating is an oxide material from which the amount of released oxygen converted into oxygen atoms is 1.0×10 in TDS (Thermal Desorption Spectroscopy) analysis. 18 atoms / cm 3 or more, preferably 1.0 × 10 19 atoms / cm 3 More preferably, 2.0 × 10 19 atoms / cm 3 or more, or 3.0 x 10 20 atoms / cm 3 The oxide film is one having the above properties. The surface temperature of the film during the TDS analysis is preferably in the range of 100°C or higher and 700°C or lower, or 100°C or higher and 400°C or lower.

[0578] 42(C), the thickness of the insulator 224 in a region that does not overlap with the insulator 254 and the metal oxide 220b may be thinner than the thickness of the other regions. It is preferable that the thickness of the insulator 224 in a region that does not overlap with the insulator 254 and the metal oxide 220b is a thickness that allows sufficient diffusion of the oxygen.

[0579] Like the insulator 214, the insulator 222 preferably functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the transistor 750 from the substrate side. For example, the insulator 222 preferably has lower hydrogen permeability than the insulator 224. By surrounding the insulator 224, the metal oxide 220, the insulator 250, etc. with the insulators 222, 254, and 274, impurities such as water or hydrogen can be prevented from entering the transistor 750 from the outside.

[0580] Furthermore, the insulator 222 preferably has a function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.) (i.e., the oxygen is less likely to permeate). For example, the insulator 222 preferably has lower oxygen permeability than the insulator 224. The insulator 222 preferably has a function of suppressing the diffusion of oxygen and impurities, which can reduce the diffusion of oxygen contained in the metal oxide 220 toward the substrate side. Furthermore, the conductor 205 can be prevented from reacting with oxygen contained in the insulator 224 or the metal oxide 220.

[0581] The insulator 222 may be an insulator containing an oxide of one or both of insulating materials, aluminum and hafnium. Examples of the insulator containing an oxide of one or both of aluminum and hafnium include aluminum oxide, hafnium oxide, and oxide containing aluminum and hafnium (hafnium aluminate). When the insulator 222 is formed using such a material, the insulator 222 functions as a layer that suppresses oxygen release from the metal oxide 220 and the intrusion of impurities such as hydrogen into the metal oxide 220 from the periphery of the transistor 750.

[0582] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to these insulators. Alternatively, these insulators may be nitrided. Silicon oxide, silicon oxynitride, or silicon nitride may be stacked on the above insulators. For example, the insulator 222 may have a three-layer structure in which silicon nitride, silicon oxide, and aluminum oxide are stacked in this order.

[0583] The insulator 222 may be a single layer or a multilayer of an insulator containing a so-called high-k material, such as aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST). As transistors become smaller and more highly integrated, thinning the gate insulator can cause problems such as leakage current. Using a high-k material for the insulator that functions as the gate insulator allows for a reduction in the gate potential during transistor operation while maintaining the physical film thickness.

[0584] The insulator 222 and the insulator 224 may have a laminated structure of two or more layers. In this case, the laminated structure is not limited to the same material, and may be a laminated structure made of different materials. For example, an insulator similar to the insulator 224 may be provided below the insulator 222.

[0585] The metal oxide 220 includes a metal oxide 220a, a metal oxide 220b on the metal oxide 220a, and a metal oxide 220c on the metal oxide 220b. By providing the metal oxide 220a below the metal oxide 220b, it is possible to suppress the diffusion of impurities from structures formed below the metal oxide 220a to the metal oxide 220b. Furthermore, by providing the metal oxide 220c on the metal oxide 220b, it is possible to suppress the diffusion of impurities from structures formed above the metal oxide 220c to the metal oxide 220b.

[0586] The metal oxide 220 preferably has a stacked structure of multiple oxide layers with different atomic ratios of each metal atom. For example, when the metal oxide 220 contains at least indium (In) and the element M, the ratio of the number of atoms of the element M contained in the metal oxide 220a to the number of atoms of all elements constituting the metal oxide 220a is preferably higher than the ratio of the number of atoms of the element M contained in the metal oxide 220b to the number of atoms of all elements constituting the metal oxide 220b. Furthermore, the atomic ratio of the element M contained in the metal oxide 220a to In is preferably higher than the atomic ratio of the element M contained in the metal oxide 220b to In. Here, the metal oxide 220c can be any metal oxide that can be used for the metal oxide 220a or the metal oxide 220b.

[0587] The energy of the conduction band minimum of metal oxide 220a and metal oxide 220c is preferably higher than the energy of the conduction band minimum of metal oxide 220b. In other words, the electron affinity of metal oxide 220a and metal oxide 220c is preferably lower than the electron affinity of metal oxide 220b. In this case, metal oxide 220c is preferably a metal oxide that can be used for metal oxide 220a. Specifically, the ratio of the number of atoms of element M contained in metal oxide 220c to the number of atoms of all elements constituting metal oxide 220c is preferably higher than the ratio of the number of atoms of element M contained in metal oxide 220b to the number of atoms of all elements constituting metal oxide 220b. Furthermore, the atomic ratio of element M contained in metal oxide 220c to In is preferably higher than the atomic ratio of element M contained in metal oxide 220b to In.

[0588] Here, the energy level of the conduction band minimum changes smoothly at the junction between the metal oxides 220a, 220b, and 220c. In other words, the energy level of the conduction band minimum at the junction between the metal oxides 220a, 220b, and 220c changes continuously or forms a continuous junction. To achieve this, it is preferable to reduce the defect level density of the mixed layers formed at the interfaces between the metal oxides 220a and 220b and between the metal oxides 220b and 220c.

[0589] Specifically, when the metal oxide 220a and the metal oxide 220b, or the metal oxide 220b and the metal oxide 220c, share a common element other than oxygen (as a main component), a mixed layer with a low density of defect states can be formed. For example, when the metal oxide 220b is an In-Ga-Zn oxide, the metal oxide 220a and the metal oxide 220c may be made of an In-Ga-Zn oxide, a Ga-Zn oxide, gallium oxide, or the like. The metal oxide 220c may also have a layered structure. For example, a layered structure of an In-Ga-Zn oxide and a Ga-Zn oxide on the In-Ga-Zn oxide, or a layered structure of an In-Ga-Zn oxide and a gallium oxide on the In-Ga-Zn oxide, may be used. In other words, a layered structure of an In-Ga-Zn oxide and an oxide not containing In may be used as the metal oxide 220c.

[0590] Specifically, metal oxide 220a may have an atomic ratio of In:Ga:Zn=1:3:4 or thereabouts, or an atomic ratio of 1:1:0.5 or thereabouts. Metal oxide 220b may have an atomic ratio of In:Ga:Zn=4:2:3 or thereabouts, or an atomic ratio of 3:1:2 or thereabouts, or an atomic ratio of 1:1:1 or thereabouts. Metal oxide 220c may have an atomic ratio of In:Ga:Zn=1:3:4 or thereabouts, or an atomic ratio of In:Ga:Zn=4:2:3 or thereabouts, or an atomic ratio of Ga:Zn=2:1 or thereabouts, or an atomic ratio of Ga:Zn=2:5 or thereabouts. Specific examples of the metal oxide 220c having a layered structure include a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] or a similar structure with Ga:Zn=2:1 [atomic ratio] or a similar structure, a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] or a similar structure with Ga:Zn=2:5 [atomic ratio] or a similar structure, and a layered structure of In:Ga:Zn=4:2:3 [atomic ratio] or a similar structure with gallium oxide.

[0591] In this case, the main carrier path is the metal oxide 220b. By configuring the metal oxide 220a and the metal oxide 220c as described above, the defect state density at the interface between the metal oxide 220a and the metal oxide 220b and at the interface between the metal oxide 220b and the metal oxide 220c can be reduced. This reduces the effect of interface scattering on carrier conduction, allowing the transistor 750 to achieve a high on-state current and high frequency characteristics. Note that when the metal oxide 220c has a stacked structure, in addition to the effect of reducing the defect state density at the interface between the metal oxide 220b and the metal oxide 220c, it is expected that the diffusion of constituent elements of the metal oxide 220c toward the insulator 250 can be suppressed. More specifically, by configuring the metal oxide 220c as a stacked structure and positioning an oxide that does not contain In above the stacked structure, it is possible to suppress In that may diffuse toward the insulator 250. Because the insulator 250 functions as a gate insulator, the diffusion of In leads to poor transistor characteristics. Therefore, by forming the metal oxide 220c into a stacked structure, it is possible to provide a highly reliable display device.

[0592] Conductors 242 (conductors 242a and 242b) functioning as a source electrode and a drain electrode are provided on the metal oxide 220b. Conductor 242 is preferably made of a metal element selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, or lanthanum, or an alloy containing any of the above metal elements or an alloy combining any of the above metal elements. For example, tantalum nitride, titanium nitride, tungsten, a nitride containing titanium and aluminum, a nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, or an oxide containing lanthanum and nickel is preferably used. In addition, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferred because they are conductive materials that are resistant to oxidation or materials that maintain their conductivity even when they absorb oxygen.

[0593] By providing the conductor 242 so as to be in contact with the metal oxide 220, the oxygen concentration may decrease in the vicinity of the conductor 242 of the metal oxide 220. Furthermore, a metal compound layer containing the metal contained in the conductor 242 and components of the metal oxide 220 may be formed in the vicinity of the conductor 242 of the metal oxide 220. In such a case, the carrier concentration increases in the region of the metal oxide 220 in the vicinity of the conductor 242, and this region becomes a low-resistance region.

[0594] Here, the region between the conductor 242a and the conductor 242b is formed to overlap the opening of the insulator 280. This allows the conductor 260 to be arranged in a self-aligned manner between the conductor 242a and the conductor 242b.

[0595] The insulator 250 functions as a gate insulator. The insulator 250 is preferably disposed in contact with the upper surface of the metal oxide 220c. The insulator 250 can be made of silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide doped with fluorine, silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen, or silicon oxide having vacancies. Silicon oxide and silicon oxynitride are particularly preferred because they are stable against heat.

[0596] The insulator 250 preferably has a reduced concentration of impurities such as water or hydrogen, similar to the insulator 224. The thickness of the insulator 250 is preferably 1 nm or more and 20 nm or less.

[0597] A metal oxide may be provided between the insulator 250 and the conductor 260. The metal oxide preferably suppresses oxygen diffusion from the insulator 250 to the conductor 260. This makes it possible to suppress oxidation of the conductor 260 due to oxygen in the insulator 250.

[0598] The metal oxide may function as part of the gate insulator. Therefore, when silicon oxide or silicon oxynitride is used for the insulator 250, it is preferable to use a metal oxide that is a high-k material with a high dielectric constant. By forming the gate insulator into a stacked structure of the insulator 250 and the metal oxide, it is possible to achieve a stacked structure that is thermally stable and has a high dielectric constant. Therefore, it is possible to reduce the gate potential applied during transistor operation while maintaining the physical thickness of the gate insulator. In addition, it is possible to reduce the equivalent oxide thickness (EOT) of the insulator that functions as the gate insulator.

[0599] Specifically, it is possible to use a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, etc. In particular, it is preferable to use an insulator containing an oxide of either or both of aluminum and hafnium, such as aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate).

[0600] Although the conductor 260 is shown as a two-layer structure in FIGS. 42(A) to 42(C), it can also be a single-layer structure or a stacked structure of three or more layers.

[0601] The conductor 260a is preferably made of a conductor having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (NO, NO, NO, etc.), copper atoms, etc. Alternatively, it is preferable to use a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.).

[0602] Conductor 260a has the function of suppressing oxygen diffusion, which can suppress a decrease in conductivity due to oxidation of conductor 260b caused by oxygen contained in insulator 250. As a conductive material having the function of suppressing oxygen diffusion, it is preferable to use, for example, tantalum, tantalum nitride, ruthenium, ruthenium oxide, or the like.

[0603] Conductor 260b is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. Furthermore, since conductor 260 also functions as wiring, it is preferable to use a conductor with high conductivity. For example, a conductive material containing tungsten, copper, or aluminum as a main component can be used. Conductor 260b may also have a layered structure, such as a layered structure of titanium or titanium nitride and the above-mentioned conductive material.

[0604] 42(A) and 42(C), in a region of the metal oxide 220b that does not overlap with the conductor 242, in other words, in the channel formation region of the metal oxide 220, the conductor 260 is arranged to cover the side surface of the metal oxide 220. This makes it easier for the electric field of the conductor 260, which functions as the first gate electrode, to act on the side surface of the metal oxide 220. This increases the on-state current of the transistor 750 and improves its frequency characteristics.

[0605] Like the insulator 214, the insulator 254 preferably functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the transistor 750 from the insulator 280 side. For example, the insulator 254 preferably has lower hydrogen permeability than the insulator 224. Furthermore, as shown in FIGS. 42(B) and 42(C), the insulator 254 preferably contacts the side surface of the metal oxide 220c, the top and side surfaces of the conductor 242a, the top and side surfaces of the conductor 242b, the side surfaces of the metal oxide 220a and the metal oxide 220b, and the top surface of the insulator 224. This structure prevents hydrogen contained in the insulator 280 from entering the metal oxide 220 from the top or side surfaces of the conductor 242a, the conductor 242b, the metal oxide 220a, the metal oxide 220b, and the insulator 224.

[0606] Furthermore, it is preferable that the insulator 254 has a function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.) (i.e., the oxygen is less likely to permeate). For example, it is preferable that the insulator 254 has lower oxygen permeability than the insulator 280 or the insulator 224.

[0607] The insulator 254 is preferably formed by sputtering. By forming the insulator 254 by sputtering in an oxygen-containing atmosphere, oxygen can be added to the insulator 224 near the region where the insulator 254 is in contact with the insulator 254. This allows oxygen to be supplied from this region into the metal oxide 220 through the insulator 224. The insulator 254 has a function of suppressing upward oxygen diffusion, thereby preventing oxygen from diffusing from the metal oxide 220 to the insulator 280. The insulator 222 has a function of suppressing downward oxygen diffusion, thereby preventing oxygen from diffusing from the metal oxide 220 toward the substrate. In this way, oxygen is supplied to the channel formation region of the metal oxide 220. This reduces oxygen vacancies in the metal oxide 220 and suppresses the transistor from becoming normally on.

[0608] For example, an insulator containing one or both of an oxide of aluminum and hafnium is preferably formed as the insulator 254. Note that, as the insulator containing one or both of an oxide of aluminum and hafnium, it is preferable to use aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), or the like.

[0609] The insulator 280 is provided on the insulator 224, the metal oxide 220, and the conductor 242 with the insulator 254 interposed therebetween. For example, the insulator 280 preferably includes silicon oxide, silicon oxynitride, silicon nitride oxide, silicon oxide doped with fluorine, silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen, or silicon oxide having vacancies. Silicon oxide and silicon oxynitride are particularly preferred because they are thermally stable. Materials such as silicon oxide, silicon oxynitride, and silicon oxide having vacancies are particularly preferred because they can easily form a region containing oxygen that is released by heating.

[0610] It is preferable that the concentration of impurities such as water or hydrogen is reduced in the insulator 280. The upper surface of the insulator 280 may be flattened.

[0611] Similar to the insulator 214, the insulator 274 preferably functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the insulator 280 from above. As the insulator 274, for example, an insulator that can be used for the insulator 214, the insulator 254, etc. may be used.

[0612] An insulator 281 functioning as an interlayer film is preferably provided over the insulator 274. Like the insulator 224, the insulator 281 preferably has a reduced concentration of impurities such as water or hydrogen.

[0613] The conductor 245a and the conductor 245b are arranged in openings formed in the insulator 281, the insulator 274, the insulator 280, and the insulator 254. The conductor 245a and the conductor 245b are arranged opposite each other with the conductor 260 interposed therebetween. The height of the upper surfaces of the conductor 245a and the conductor 245b may be flush with the upper surface of the insulator 281.

[0614] Note that insulator 241a is provided in contact with the inner walls of the openings of insulators 281, 274, 280, and 254, and a first conductor of conductor 245a is formed in contact with the side surface of insulator 241a. Conductor 242a is located on at least a portion of the bottom of the openings, and conductor 245a is in contact with conductor 242a. Similarly, insulator 241b is provided in contact with the inner walls of the openings of insulators 281, 274, 280, and 254, and a first conductor of conductor 245b is formed in contact with the side s...

Claims

1. a first step of generating second image data by extending the resolution of first image data expressed in an RGB color space; a second step of converting the second image data into a YCrCb color space to generate third image data; a third step of generating a second Y image from the first Y image extracted from the third image data using a CNN; a fourth step of generating fourth image data expressed in RGB color space using the third image data and the second Y image.

2. In claim 1, The image data processing method in which the first step is performed using the Bicubic method.

3. a plurality of pixels arranged in a matrix; and a functional circuit having a function of generating image data to be supplied to the plurality of pixels; The functional circuit comprises: a first function of generating second image data by extending the resolution of first image data expressed in an RGB color space; a second function of converting the second image data into a YCrCb color space to generate third image data; a third function of generating a second Y image using a CNN from a first Y image extracted from the third image data; and a fourth function of generating fourth image data expressed in an RGB color space using the third image data and the second Y image.

4. In claim 3, A display device that performs the first function by a Bicubic method.

5. In claim 3 or claim 4, The functional circuit includes at least one of a CPU and a GPU.

Images