Semiconductor device and manufacturing method thereof

Abstract

To provide a semiconductor device capable of improving the heat dissipation of a device.SOLUTION: A semiconductor device A10 includes a semiconductor element 10, a sealing resin 50 that covers the semiconductor element 10, and a heat sink 60 that covers a portion of the sealing resin 50. The sealing resin 50 has a first surface 51 facing one side in a first direction z and a second surface 52 facing one side in a second direction x. The heat sink 60 includes a first heat sink 61 exposed from the first surface 51 and a second heat sink 62 connected to the first heat sink 61. The second heat sink 62 faces the second surface 52.SELECTED DRAWING: Figure 8

Description

[Technical Field]

[0001] The present disclosure relates to a semiconductor device and a method for manufacturing the same. [Background technology]

[0002] Resin-packaged semiconductor devices, such as the semiconductor device disclosed in Patent Document 1, are widely known. The semiconductor device disclosed in Patent Document 1 includes a semiconductor element, first and third leads electrically connected to the semiconductor element, a second lead on which the semiconductor element is mounted, and a sealing resin covering the semiconductor element. A portion of each of the first, second, and third leads protrudes from the sealing resin.

[0003] In the semiconductor device disclosed in Patent Document 1, a portion of each of the first lead, the second lead, and the third lead is exposed from the sealing resin. Therefore, these leads function as heat sinks in the semiconductor device. However, if the heat generated by the semiconductor element included in the semiconductor device increases, there will be a limit to the amount of heat that can be dissipated to the outside using only the first lead, the second lead, and the third lead. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Publication No. 2018-60908

[0005] [overview] In view of the above-mentioned circumstances, an object of the present disclosure is to provide a semiconductor device that can improve the heat dissipation performance of the device.

[0006] A first aspect of the present disclosure provides a semiconductor device including a semiconductor element, a sealing resin covering the semiconductor element, and a heat sink covering a portion of the sealing resin. The sealing resin has a first surface facing one side in a first direction and a second surface facing one side in a second direction perpendicular to the first direction. The heat sink includes a first heat sink exposed from the first surface and a second heat sink connected to the first heat sink. The second heat sink faces the second surface.

[0007] A second aspect of the present disclosure provides a method for manufacturing a semiconductor device, comprising a first step of forming a sealing resin that covers a semiconductor element, and a second step of forming a heat sink that covers a portion of the sealing resin. The sealing resin has a first surface facing one side in a first direction and a second surface facing one side in a second direction that is perpendicular to the first direction. In the first step, the heat sink is exposed from the first surface. The second step includes a first bending step of bending the heat sink around a third direction that is perpendicular to both the first direction and the second direction. In the first bending step, the heat sink is positioned to face the second surface.

[0008] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a perspective view of a semiconductor device according to a first embodiment of the present disclosure. [Figure 2] FIG. 2 is a plan view of the semiconductor device shown in FIG. [Figure 3] FIG. 3 is a plan view corresponding to FIG. 2, showing the sealing resin and part of the heat sink. [Figure 4] FIG. 4 is a bottom view of the semiconductor device shown in FIG. [Figure 5] FIG. 5 is a front view of the semiconductor device shown in FIG. [Figure 6] FIG. 6 is a left side view of the semiconductor device shown in FIG. [Figure 7]FIG. 7 is a right side view of the semiconductor device shown in FIG. [Figure 8] FIG. 8 is a cross-sectional view taken along line VIII-VIII in FIG. [Figure 9] FIG. 9 is a cross-sectional view taken along line IX-IX in FIG. [Figure 10] FIG. 10 is a cross-sectional view taken along line XX in FIG. [Figure 11] FIG. 11 is a cross-sectional view illustrating a first step in the manufacturing process of the semiconductor device shown in FIG. [Figure 12] FIG. 12 is a cross-sectional view illustrating a first bending step in the second step of the manufacturing process for the semiconductor device shown in FIG. [Figure 13] FIG. 13 is a cross-sectional view illustrating the second bending step in the second step of the manufacturing process for the semiconductor device shown in FIG. [Figure 14] FIG. 14 is a bottom view of a semiconductor device according to a modified example of the first embodiment of the present disclosure. [Figure 15] FIG. 15 is a cross-sectional view of the semiconductor device shown in FIG. 14, and corresponds to FIG. [Figure 16] FIG. 16 is a plan view of a semiconductor device according to the second embodiment of the present disclosure. [Figure 17] FIG. 17 is a bottom view of the semiconductor device shown in FIG. [Figure 18] FIG. 18 is a right side view of the semiconductor device shown in FIG. [Figure 19] FIG. 19 is a cross-sectional view taken along line XIX-XIX in FIG. [Figure 20] FIG. 20 is a cross-sectional view taken along the line XX-XX in FIG. [Figure 21] FIG. 21 is a plan view of a semiconductor device according to a third embodiment of the present disclosure. [Figure 22] FIG. 22 is a bottom view of the semiconductor device shown in FIG. [Figure 23] FIG. 23 is a cross-sectional view taken along line XXIII-XXIII in FIG. [Figure 24] FIG. 24 is a cross-sectional view taken along line XXIV-XXIV in FIG. [Figure 25] FIG. 25 is a plan view of a semiconductor device according to a fourth embodiment of the present disclosure. [Figure 26] FIG. 26 is a left side view of the semiconductor device shown in FIG. [Figure 27] FIG. 27 is a bottom view of the semiconductor device according to the fifth embodiment of the present disclosure. [Figure 28] FIG. 28 is a left side view of the semiconductor device shown in FIG. [Figure 29] FIG. 29 is a bottom view of the semiconductor device according to the sixth embodiment of the present disclosure. [Figure 30] FIG. 30 is a cross-sectional view of the semiconductor device shown in FIG. 29, and corresponds to FIG.

[0010] [Detailed explanation] The details of the present disclosure will be described with reference to the accompanying drawings.

[0011] [First embodiment] A semiconductor device A10 according to a first embodiment of the present disclosure will be described with reference to FIGS. 1 to 10. The semiconductor device A10 includes a semiconductor element 10, a die pad 20, a plurality of first terminals 31, a plurality of second terminals 32, a plurality of wires 40, a sealing resin 50, and a heat sink 60. The semiconductor device A10 is packaged in a small outline package (SOP). However, the package format of the semiconductor device A10 is not limited to SOP. For ease of understanding, FIG. 3 shows the sealing resin 50 and a third heat sink 63 of the heat sink 60, which will be described later. In FIG. 3, the outline of the sealing resin 50 is indicated by an imaginary line (double-dashed line).

[0012] In the description of the semiconductor device A10, for convenience, the normal direction to the mounting surface 211 of the pad portion 21 (described later) will be referred to as the "first direction z." The direction perpendicular to the first direction z will be referred to as the "second direction x." The direction perpendicular to both the first direction z and the second direction x will be referred to as the "third direction y."

[0013] As shown in FIGS. 8 to 10 , the sealing resin 50 covers the semiconductor element 10, a portion of the die pad 20, a portion of each of the plurality of first terminals 31, a portion of each of the plurality of second terminals 32, and the plurality of wires 40. The sealing resin 50 is an insulator. The sealing resin 50 is made of a material containing, for example, epoxy resin. When viewed in the first direction z, the sealing resin 50 has a rectangular shape.

[0014] 5 to 7, sealing resin 50 has a first surface 51, a second surface 52, a third surface 53, a fourth surface 54, a fifth surface 55, a sixth surface 56, and a first recess 57. Each of first surface 51, second surface 52, third surface 53, fourth surface 54, fifth surface 55, and sixth surface 56 is exposed to the outside.

[0015] As shown in FIGS. 5 to 7, the first surface 51 faces one side in the first direction z. The third surface 53 faces the opposite side to the first surface 51 in the first direction z. The third surface 53 faces the same side in the first direction z as a mounting surface 211 of the pad portion 21, which will be described later. As shown in FIG. 2, the third surface 53 includes two second edges 531 that are spaced apart from each other in the third direction y. Each of the two second edges 531 extends in the second direction x.

[0016] As shown in FIG. 5, the second surface 52 faces one side in the second direction x. The fourth surface 54 faces the opposite side from the second surface 52 in the second direction x. Each of the second surface 52 and the fourth surface 54 is located between the first surface 51 and the third surface 53 in the first direction z and is connected to the first surface 51 and the third surface 53. As shown in FIG. 6, the second surface 52 includes two first edges 521 that are spaced apart from each other in the third direction y. When viewed in the second direction x, each of the two second surfaces 52 rises in the first direction z.

[0017] 6 and 7 , the fifth surface 55 faces one side in the third direction y. The sixth surface 56 faces the opposite side from the fifth surface 55 in the third direction y. The fifth surface 55 and the sixth surface 56 are each located between the first surface 51 and the third surface 53 in the first direction z and are connected to the first surface 51 and the third surface 53.

[0018] 8 and 10, the first recess 57 is recessed from the first surface 51. The first recess 57 is connected to the second surface 52.

[0019] The die pad 20, the plurality of first terminals 31, and the plurality of second terminals 32 all contain copper (Cu) in their composition. The die pad 20, the plurality of first terminals 31, and the plurality of second terminals 32 are obtained from the same lead frame.

[0020] 8 and 9, the die pad 20 is located on one side of the semiconductor element 10 in the first direction z. The die pad 20 mounts the semiconductor element 10. The die pad 20 has a pad portion 21 and a support portion 22.

[0021] As shown in Figures 3, 8, and 9, the pad portion 21 mounts the semiconductor element 10. When viewed in the first direction z, the die pad 20 has a rectangular shape. The pad portion 21 has a mounting surface 211 and a back surface 212. The mounting surface 211 faces one side in the first direction z. The mounting surface 211 faces the semiconductor element 10. The mounting surface 211 is plated with, for example, silver (Ag). The back surface 212 faces the opposite side to the mounting surface 211 in the first direction z. The back surface 212 is exposed from the first surface 51 of the sealing resin 50.

[0022] As shown in Figures 3 and 8, the support portion 22 is connected to one side of the pad portion 21 in the second direction x. The support portion 22 is located between the pad portion 21 and the fourth surface 54 of the sealing resin 50 in the second direction x. The support portion 22 is bent in the second direction x from the pad portion 21 to the fourth surface 54 toward the side toward which the mounting surface 211 of the pad portion 21 faces in the first direction z. Both sides of the support portion 22 in the first direction z are sandwiched between the sealing resin 50. The support portion 22 has an end surface 221 facing the second direction x. The end surface 221 is exposed from the fourth surface 54.

[0023] As shown in Figures 3, 8, and 9, the semiconductor element 10 is bonded to the pad portion 21 of the die pad 20. The semiconductor element 10 controls the functions of the semiconductor device A10. The type of semiconductor element 10 is not limited, and it may be an IC or an LSI. The semiconductor element 10 is bonded to the mounting surface 211 of the pad portion 21 via a bonding layer 19. The bonding layer 19 is made of a paste containing metal particles. The metal particles are, for example, silver. Therefore, the bonding layer 19 is a conductor. Alternatively, the bonding layer 19 may be solder.

[0024] 3 and 9, the semiconductor element 10 has a plurality of electrodes 11. The plurality of electrodes 11 are located on the side opposite to the side facing the mounting surface 211 of the pad portion 21 in the first direction z. Each of the plurality of electrodes 11 is electrically connected to a circuit configured in the semiconductor element 10.

[0025] 2 and 3, the multiple first terminals 31 are located on one side of the die pad 20 in the third direction y. Each of the multiple first terminals 31 is electrically connected to the semiconductor element 10. The multiple first terminals 31 are arranged along the second direction x. Each of the multiple first terminals 31 is exposed from a fifth surface 55 of the sealing resin 50. When viewed in the first direction z, each of the multiple first terminals 31 is spaced apart from the pad portion 21 of the die pad 20 and a first heat sink 61 of a heat sink 60, which will be described later.

[0026] As shown in FIGS. 2, 3, and 9, each of the multiple first terminals 31 has a first inner portion 311 and a first outer portion 312. The first inner portion 311 is covered with a sealing resin 50. The first inner portion 311 of each of the multiple first terminals 31 has a first connection surface 311A. The first connection surface 311A ​​faces the same side as the mounting surface 211 of the pad portion 21 in the first direction z. The first connection surface 311A ​​is plated with, for example, silver. The first outer portion 312 is connected to the first inner portion 311 of one of the corresponding multiple first terminals 31. The first outer portion 312 protrudes from the fifth surface 55. The surface of the first outer portion 312 is plated with, for example, tin (Sn). When viewed in the first direction z, the first outer portion 312 extends in the third direction y. As shown in FIGS. 6 and 7, the first outer portion 312 is bent in a gull-wing shape when viewed in the second direction x.

[0027] 2 and 3, the second terminals 32 are located on the opposite side of the die pad 20 from the first terminals 31 in the third direction y. Each of the second terminals 32 is electrically connected to the semiconductor element 10. The second terminals 32 are arranged along the second direction x. Each of the second terminals 32 is exposed from a sixth surface 56 of the sealing resin 50. When viewed in the first direction z, each of the second terminals 32 is spaced apart from the pad portion 21 of the die pad 20 and a first heat sink 61 of a heat sink 60, which will be described later.

[0028] As shown in FIGS. 2, 3, and 9, each of the multiple second terminals 32 has a second inner portion 321 and a second outer portion 322. The second inner portion 321 is covered with a sealing resin 50. The second inner portion 321 of any of the multiple second terminals 32 is connected to the support portion 22 of the die pad 20. The second inner portion 321 of each of the multiple second terminals 32 has a second connection surface 321A. The second connection surface 321A faces the same side as the mounting surface 211 of the pad portion 21 in the first direction z. The second connection surface 321A is plated with silver, for example. The second outer portion 322 is connected to the second inner portion 321 of any of the corresponding multiple second terminals 32. The second outer portion 322 protrudes from the sixth surface 56. The surface of the second outer portion 322 is plated with tin, for example. When viewed in the first direction z, the second outer part 322 extends in the third direction y. As shown in Figures 6 and 7, when viewed in the second direction x, the second outer part 322 is bent in a gull-wing shape.

[0029] 3 and 9, each of the plurality of wires 40 is conductively bonded to one of the plurality of electrodes 11 of the semiconductor element 10 and to one of the first connection surfaces 311A ​​of each of the plurality of first terminals 31 and one of the second connection surfaces 321A of each of the plurality of second terminals 32. This allows each of the plurality of first terminals 31 and each of the plurality of second terminals 32 to be electrically connected to the semiconductor element 10. The plurality of wires 40 contains, for example, gold (Au). Alternatively, the plurality of wires 40 may contain aluminum (Al) or copper.

[0030] As shown in FIGS. 1, 2, and 4 to 10, the heat sink 60 covers a portion of the sealing resin 50. In the semiconductor device A10, the material of the heat sink 60 is the same as the material of the die pad 20. Therefore, the heat sink 60 is a conductor that contains copper. The heat sink 60 has a first heat sink 61, a second heat sink 62, and a third heat sink 63.

[0031] As shown in FIGS. 4, 8, and 10, the first heat sink 61 is exposed from the first surface 51 of the sealing resin 50. The first heat sink 61 is located between the die pad 20 and the second surface 52 of the sealing resin 50 in the second direction x. The first heat sink 61 has a base 611. In the semiconductor device A10, the entire base 611 corresponds to the first heat sink 61. At least a portion of the base 611 is accommodated in the first recess 57 of the sealing resin 50. One side of the base 611 in the second direction x is connected to the pad portion 21 of the die pad 20. In the semiconductor device A10, the base 611 is integral with the die pad 20. The base 611 has a heat sink surface 611A facing one side in the first direction z. The heat sink surface 611A is exposed from the first surface 51. The heat dissipation surface 611A is flush with the rear surface 212 of the pad portion 21.

[0032] As shown in FIGS. 4, 6, and 8, the second heat sink 62 is located on the opposite side of the die pad 20 in the second direction x, with the first heat sink 61 sandwiched therebetween. The second heat sink 62 is connected to one side of the first heat sink 61 in the second direction x. The second heat sink 62 faces the second surface 52 of the sealing resin 50. As shown in FIGS. 2, 4, and 6, the second heat sink 62 has two first side surfaces 621. The two first side surfaces 621 face opposite each other in the third direction y. The two first side surfaces 621 are located outward from the second surface 52. The entirety of each of the two first side surfaces 621 is exposed from the sealing resin 50. As shown in FIG. 6, when viewed in the second direction x, the two first side surfaces 621 are located between the two first edges 521 of the second surface 52 and are spaced apart from the two first edges 521. The dimension of the second heat dissipation body 62 in the third direction y is smaller than the dimension of the second surface 52 in the third direction y.

[0033] As shown in FIGS. 8 and 9 , the third heat sink 63 is located on the opposite side of the first heat sink 61 in the first direction z, with the semiconductor element 10 sandwiched therebetween. The third heat sink 63 is connected to one side of the second heat sink 62 in the first direction z. The third heat sink 63 faces the third surface 53 of the sealing resin 50 and is in contact with the third surface 53. As shown in FIG. 2 , the third heat sink 63 overlaps the semiconductor element 10 when viewed in the first direction z. As shown in FIGS. 2 , 7 , 9 , and 10 , the third heat sink 63 has two second side surfaces 631. The two second side surfaces 631 face opposite each other in the third direction y. The two second side surfaces 631 are located outward from the third surface 53. The entirety of each of the two second side surfaces 631 is exposed from the sealing resin 50. 2, when viewed in the first direction z, the two second side surfaces 631 are located between the two second edges 531 of the third surface 53 and are spaced apart from the two second edges 531. The dimension of the third heat dissipation body 63 in the third direction y is smaller than the dimension of the third surface 53 in the third direction y.

[0034] Next, an example of a method for manufacturing the semiconductor device A10 will be described with reference to Figures 11 to 13. Each of Figures 11 to 13 corresponds to Figure 8 showing the semiconductor device A10.

[0035] 11, a first step P1 is performed to form sealing resin 50 that covers semiconductor element 10. In first step P1, sealing resin 50 is formed by transfer molding. Sealing resin 50 has a first surface 51 facing one side in first direction z, a second surface 52 facing one side in second direction x, and a third surface 53 facing the opposite side from first surface 51 in first direction z. In first step P1, heat sink 60 is exposed from first surface 51 while a portion of heat sink 60 is covered with sealing resin 50.

[0036] 12 and 13, a second step P2 is performed to form a heat sink 60 that covers a portion of the sealing resin 50. The second step P2 includes a first bending step P21 shown in FIG. 12 and a second bending step P22 shown in FIG. 13. In the first bending step P21, the heat sink 60 is bent around the third direction y so that the heat sink 60 faces the second surface 52 of the sealing resin 50. In the second bending step P22, after the first bending step P21, the heat sink 60 is bent around the third direction y so that the heat sink 60 faces the third surface 53 of the sealing resin 50. By performing the above steps, the semiconductor device A10 is obtained.

[0037] In manufacturing the semiconductor device A10, between the first process P1 and the second process P2, bending is performed on the first outer portion 312 of each of the plurality of first terminals 31 and the second outer portion 322 of each of the plurality of second terminals 32. Alternatively, the bending may be performed after the second process P2 is completed.

[0038] Next, a semiconductor device A11 according to a modified example of the first embodiment of the present disclosure will be described with reference to Figures 14 and 15. Here, Figure 15 corresponds to Figure 8 showing the semiconductor device A10. In the semiconductor device A11, the configurations of the die pad 20 and the heat sink 60 are different from those of the semiconductor device A10.

[0039] 14 and 15, the pad portion 21 of the die pad 20 has a bonding surface 213. The bonding surface 213 faces the first heat dissipation body 61 of the heat dissipation body 60 in the second direction x. A base portion 611 of the first heat dissipation body 61 is bonded to the bonding surface 213. Therefore, the heat dissipation body 60 is a separate body from the die pad 20. The base portion 611 is bonded to the bonding surface 213 by welding, sintered metal, or the like.

[0040] Next, the effects of the semiconductor device A10 will be described.

[0041] The semiconductor device A10 includes a semiconductor element 10, a sealing resin 50 that covers the semiconductor element 10, and a heat sink 60 that covers a portion of the sealing resin 50. The sealing resin 50 has a first surface 51 and a second surface 52. The heat sink 60 includes a first heat sink 61 exposed from the first surface 51 and a second heat sink 62 connected to the first heat sink 61. The second heat sink 62 faces the second surface 52. This configuration allows heat generated by the semiconductor element 10 to be conducted to the heat sink 60, thereby efficiently dissipating the heat to the outside. Furthermore, because the first heat sink 61 and the second heat sink 62 are arranged in different directions, heat is more easily dissipated from the heat sink 60 to the outside air. Therefore, this configuration enables the semiconductor device A10 to have improved heat dissipation.

[0042] The heat sink 60 has a third heat sink 63. The third heat sink 63 is connected to the second heat sink 62. The third heat sink 63 faces the third surface 53 of the sealing resin 50. This configuration increases the volume of the heat sink 60. Furthermore, since the orientation of the third heat sink 63 is different from the orientation of the first heat sink 61 and the second heat sink 62, heat is more likely to be diffused from the heat sink 60 into the outside air. This further improves the heat dissipation performance of the semiconductor device A10.

[0043] When viewed in the first direction z, the third heat sink 63 overlaps the semiconductor element 10. With this configuration, heat generated from the semiconductor element 10 is more easily conducted to the third heat sink 63 via the sealing resin 50. This further improves the heat dissipation performance of the semiconductor device A10.

[0044] The sealing resin 50 has a first recess 57 recessed from the first surface 51 and connected to the second surface 52. The first heat sink 61 has a base 611 at least a portion of which is housed in the first recess 57. This configuration makes it possible to prevent the heat sink 60 from interfering with the wiring board when the semiconductor device A10 is mounted on the wiring board.

[0045] The semiconductor device A10 further includes a die pad 20. The semiconductor element 10 is bonded to the die pad 20. The base 611 of the first heat sink 61 is integral with the die pad 20. With this configuration, the heat conducted from the semiconductor element 10 to the die pad 20 can be conducted to the heat sink 60 more smoothly.

[0046] Both sides of the sealing resin 50 in the first direction z are sandwiched between the first heat sink 61 and the third heat sink 63. By adopting this configuration, it is possible to effectively prevent the die pad 20 from falling off from the sealing resin 50.

[0047] The manufacturing method of the semiconductor device A10 includes a first step P1 of forming the sealing resin 50 to cover the semiconductor element 10, and a second step P2 of forming the heat sink 60 to cover the sealing resin 50. The second step P2 includes a first bending step P21 of bending the heat sink 60 around the third direction y. In the first bending step P21, the heat sink 60 is positioned to face the second surface 52 of the sealing resin 50. With this configuration, the heat sink 60 that covers the sealing resin 50 can be formed by bending the heat sink 60.

[0048] Second Embodiment A semiconductor device A20 according to a second embodiment of the present disclosure will be described with reference to Figures 16 to 20. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are given the same reference numerals, and duplicated descriptions will be omitted.

[0049] In the semiconductor device A20, the configurations of the sealing resin 50 and the heat sink 60 are different from those of the semiconductor device A10.

[0050] 17, 19, and 20, the sealing resin 50 has a second recess 58. The second recess 58 is recessed from the first surface 51. The second recess 58 is connected to the fourth surface 54. The second recess 58 is located on the opposite side to the first recess 57 in the second direction x, with the pad portion 21 of the die pad 20 sandwiched therebetween. The second recess 58 is spaced apart from the first recess 57.

[0051] As shown in FIGS. 16 to 19, the heat sink 60 has a fourth heat sink 64 and a fifth heat sink 65. The fourth heat sink 64 is located on the opposite side of the second heat sink 62 in the second direction x, with the third heat sink 63 sandwiched therebetween. The fourth heat sink 64 is connected to one side of the third heat sink 63 in the second direction x. The fourth heat sink 64 faces the fourth surface 54 of the sealing resin 50. As shown in FIG. 18, when viewed in the second direction x, the fourth heat sink 64 overlaps the end surface 221 of the support portion 22 of the die pad 20. The dimension of the fourth heat sink 64 in the third direction y is smaller than the dimension of the fourth surface 54 in the third direction y.

[0052] 17 to 19, the fifth heat sink 65 is connected to one side of the fourth heat sink 64 in the first direction z. The fifth heat sink 65 is located on the opposite side of the third heat sink 63 in the first direction z, with the support portion 22 of the die pad 20 sandwiched therebetween. At least a portion of the fifth heat sink 65 is housed in the second recess 58 of the sealing resin 50. The fifth heat sink 65 is spaced apart from the die pad 20. In the semiconductor device A20 as well, the base 611 of the first heat sink 61 is integral with the die pad 20.

[0053] Next, the effects of the semiconductor device A20 will be described.

[0054] The semiconductor device A20 includes a semiconductor element 10, a sealing resin 50 that covers the semiconductor element 10, and a heat sink 60 that covers a portion of the sealing resin 50. The sealing resin 50 has a first surface 51 and a second surface 52. The heat sink 60 includes a first heat sink 61 that is exposed from the first surface 51 and a second heat sink 62 that is connected to the first heat sink 61. The second heat sink 62 faces the second surface 52. Therefore, with this configuration, the heat dissipation performance of the semiconductor device A20 can be improved. Furthermore, by having a configuration common to the semiconductor device A10, the semiconductor device A20 achieves the same effects as the semiconductor device A10.

[0055] In the semiconductor device A20, the heat sink 60 has a fourth heat sink 64 and a fifth heat sink 65. This configuration increases the volume of the heat sink 60. This further improves the heat dissipation performance of the semiconductor device A20.

[0056] In the semiconductor device A20, both sides of the sealing resin 50 in the first direction z are sandwiched between the third heat sink 63 and the fifth heat sink 65 of the heat sink 60. In addition, the base 611 of the first heat sink 61 is integral with the die pad 20. By adopting this configuration, it is possible to more effectively prevent the die pad 20 from falling off from the sealing resin 50.

[0057] The sealing resin 50 has a second recess 58 that is recessed from the first surface 51 and connects to the fourth surface 54. At least a portion of the fifth heat sink 65 is housed in the second recess 58. With this configuration, when the semiconductor device A20 is mounted on a wiring board, interference of the heat sink 60 with the wiring board can be prevented.

[0058] Third Embodiment A semiconductor device A30 according to a third embodiment of the present disclosure will be described with reference to Figures 21 to 24. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are given the same reference numerals, and duplicated descriptions will be omitted.

[0059] In the semiconductor device A30, the configurations of the die pad 20, the sealing resin 50, and the heat sink 60 are different from those of the semiconductor device A10.

[0060] 21 to 24, the die pad 20 does not include a support portion 22. The die pad 20 includes only a pad portion 21.

[0061] 22 to 24, the sealing resin 50 has a second recess 58. The second recess 58 is recessed from the first surface 51. The second recess 58 is connected to the fourth surface 54. The second recess 58 is located on the opposite side to the first recess 57 in the second direction x, with the pad portion 21 of the die pad 20 sandwiched therebetween. The second recess 58 is spaced apart from the first recess 57.

[0062] 21 to 23, the heat sink 60 has a fourth heat sink 64, a fifth heat sink 65, and a sixth heat sink 66. The fourth heat sink 64 is located on the opposite side of the die pad 20 from the first heat sink 61 in the second direction x, with the die pad 20 sandwiched therebetween. The fourth heat sink 64 is connected to one side of the die pad 20 in the second direction x. Therefore, the fourth heat sink 64 is integrated with the die pad 20. At least a portion of the fourth heat sink 64 is accommodated in the second recess 58 of the sealing resin 50. In the semiconductor device A30, the base 611 of the first heat sink 61 is also integrated with the die pad 20.

[0063] 21 to 23, the fifth heat dissipator 65 is located on the opposite side of the second heat dissipator 62 in the second direction x, with the third heat dissipator 63 sandwiched therebetween. The fifth heat dissipator 65 is connected to one side of the fourth heat dissipator 64 in the second direction x. The fifth heat dissipator 65 faces the fourth surface 54 of the sealing resin 50. The dimension of the fifth heat dissipator 65 in the third direction y is smaller than the dimension of the fourth surface 54 in the third direction y.

[0064] 21, 23, and 24, the sixth heat sink 66 is located on the opposite side of the fourth heat sink 64 in the first direction z, with the sealing resin 50 sandwiched therebetween. The sixth heat sink 66 is connected to one side of the fifth heat sink 65 in the first direction z. The sixth heat sink 66 faces the third surface 53 of the sealing resin 50 and is in contact with the third surface 53. The dimension of the sixth heat sink 66 in the third direction y is smaller than the dimension of the third surface 53 in the third direction y. The sixth heat sink 66 is spaced apart from the third heat sink 63. When viewed in the first direction z, the third heat sink 63 and the sixth heat sink 66 each overlap the semiconductor element 10.

[0065] Next, the effects of the semiconductor device A30 will be described.

[0066] The semiconductor device A30 includes a semiconductor element 10, a sealing resin 50 that covers the semiconductor element 10, and a heat sink 60 that covers a portion of the sealing resin 50. The sealing resin 50 has a first surface 51 and a second surface 52. The heat sink 60 includes a first heat sink 61 that is exposed from the first surface 51 and a second heat sink 62 that is connected to the first heat sink 61. The second heat sink 62 faces the second surface 52. Therefore, with this configuration, the heat dissipation performance of the semiconductor device A30 can be improved. Furthermore, by having a configuration common to the semiconductor device A10, the semiconductor device A30 achieves the same effects as the semiconductor device A10.

[0067] In the semiconductor device A30, the heat sink 60 has a fourth heat sink 64, a fifth heat sink 65, and a sixth heat sink 66. This configuration further increases the volume of the heat sink 60. This further improves the heat dissipation performance of the semiconductor device A30.

[0068] The fourth heat sink 64 is located on the opposite side of the first heat sink 61 in the second direction x, with the die pad 20 sandwiched therebetween. The base 611 of the first heat sink 61 and the fourth heat sink 64 are each integral with the die pad 20. With this configuration, heat conducted from the semiconductor element 10 to the die pad 20 can be conducted to both the first heat sink 61 and the fourth heat sink 64. This makes the heat distribution in the heat sink 60 more uniform, thereby improving the efficiency of the heat dissipation of the semiconductor device A30.

[0069] In the semiconductor device A30, both sides of the sealing resin 50 in the first direction z are sandwiched between a first heat sink 61 and a third heat sink 63. Furthermore, both sides of the sealing resin 50 in the first direction z are sandwiched between a fourth heat sink 64 and a sixth heat sink 66. By adopting this configuration, it is possible to more effectively prevent the die pad 20 from falling off from the sealing resin 50.

[0070] The sealing resin 50 has a second recess 58 that is recessed from the first surface 51 and connects to the fourth surface 54. At least a portion of the fourth heat sink 64 is housed in the second recess 58. With this configuration, when the semiconductor device A30 is mounted on a wiring board, interference of the heat sink 60 with the wiring board can be prevented.

[0071] [Fourth embodiment] A semiconductor device A40 according to a fourth embodiment of the present disclosure will be described with reference to Figures 25 and 26. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are denoted by the same reference numerals, and duplicated descriptions will be omitted.

[0072] In the semiconductor device A40, the configuration of the heat sink 60 is different from that of the semiconductor device A10.

[0073] 25 and 26, the second heat dissipation body 62 of the heat dissipation body 60 includes a first portion 62A and a second portion 62B. The first portion 62A and the second portion 62B are spaced apart from each other in the third direction y. The first portion 62A and the second portion 62B are each connected to the base portion 611 of the first heat dissipation body 61 and the third heat dissipation body 63.

[0074] Next, the effects of the semiconductor device A40 will be described.

[0075] The semiconductor device A40 includes a semiconductor element 10, a sealing resin 50 that covers the semiconductor element 10, and a heat sink 60 that covers a portion of the sealing resin 50. The sealing resin 50 has a first surface 51 and a second surface 52. The heat sink 60 includes a first heat sink 61 that is exposed from the first surface 51 and a second heat sink 62 that is connected to the first heat sink 61. The second heat sink 62 faces the second surface 52. Therefore, with this configuration, the heat dissipation performance of the semiconductor device A40 can be improved. Furthermore, by having a configuration common to the semiconductor device A10, the semiconductor device A40 achieves the same effects as the semiconductor device A10.

[0076] In the semiconductor device A40, the second heat sink 62 includes a first portion 62A and a second portion 62B that are spaced apart from each other in the third direction y. The first portion 62A and the second portion 62B are each connected to the base portion 611 of the first heat sink 61 and the third heat sink 63 of the heat sink 60. This configuration increases the bending stress acting on the heat sink 60 during the first bending step P21 of the second step P2 shown in FIG. 12 during the manufacture of the semiconductor device A40, making it easier to bend the heat sink 60 around the third direction y. Furthermore, the bending stress acting on the heat sink 60 also increases during the second bending step P22 of the second step P2 shown in FIG. 13, making it easier to bend the heat sink 60 around the third direction y.

[0077] Fifth Embodiment A semiconductor device A50 according to a fifth embodiment of the present disclosure will be described with reference to Figures 27 and 28. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are denoted by the same reference numerals, and duplicated descriptions will be omitted.

[0078] In the semiconductor device A50, the configuration of the heat sink 60 is different from that of the semiconductor device A10.

[0079] 27 and 28, the first heat dissipation body 61 of the heat dissipation body 60 has two connecting portions 612. The two connecting portions 612 are located on the opposite side of the die pad 20 from the base portion 611 of the first heat dissipation body 61 in the second direction x. The two connecting portions 612 are spaced apart from each other in the third direction y. The two connecting portions 612 protrude from the base portion 611 in the second direction x. The second heat dissipation body 62 is connected to the two connecting portions 612.

[0080] Next, the effects of the semiconductor device A50 will be described.

[0081] The semiconductor device A50 includes a semiconductor element 10, a sealing resin 50 that covers the semiconductor element 10, and a heat sink 60 that covers a portion of the sealing resin 50. The sealing resin 50 has a first surface 51 and a second surface 52. The heat sink 60 includes a first heat sink 61 that is exposed from the first surface 51 and a second heat sink 62 that is connected to the first heat sink 61. The second heat sink 62 faces the second surface 52. Therefore, with this configuration, the heat dissipation performance of the semiconductor device A50 can be improved. Furthermore, by having a configuration common to the semiconductor device A10, the semiconductor device A50 achieves the same effects as the semiconductor device A10.

[0082] In the semiconductor device A50, the first heat sink 61 protrudes from one side of the base 611 in the second direction x and has two connecting portions 612 that are spaced apart from each other in the third direction y. The second heat sink 62 is connected to the two connecting portions 612. With this configuration, during the manufacturing of the semiconductor device A40, the bending stress acting on the heat sink 60 increases in the first bending step P21 of the second step P2 shown in FIG. 12, making it easier to bend the heat sink 60 around the third direction y.

[0083] Sixth Embodiment A semiconductor device A60 according to a sixth embodiment of the present disclosure will be described with reference to Figures 29 and 30. In these figures, elements that are the same as or similar to those in the semiconductor device A10 described above are denoted by the same reference numerals, and duplicated descriptions will be omitted. Here, Figure 30 corresponds to Figure 8 showing the semiconductor device A10.

[0084] In the semiconductor device A60, the configurations of the die pad 20 and the heat sink 60 are different from those of the semiconductor device A10.

[0085] As shown in FIGS. 29 and 30 , the die pad 20 has a first engagement portion 23. The first engagement portion 23 is recessed from the rear surface 212 of the pad portion 21. The first heat sink 61 of the heat sink 60 has a second engagement portion 613. The second engagement portion 613 is located on the opposite side of the base portion 611 of the first heat sink 61 from the second heat sink 62 of the heat sink 60. The second engagement portion 613 protrudes from the base portion 611 in the second direction x. The second engagement portion 613 is fitted into the first engagement portion 23. Therefore, the heat sink 60 is separate from the die pad 20. The second engagement portion 613 is joined to the first engagement portion 23 by welding, sintered metal, or the like.

[0086] Next, the effects of the semiconductor device A60 will be described.

[0087] The semiconductor device A60 includes a semiconductor element 10, a sealing resin 50 that covers the semiconductor element 10, and a heat sink 60 that covers a portion of the sealing resin 50. The sealing resin 50 has a first surface 51 and a second surface 52. The heat sink 60 includes a first heat sink 61 that is exposed from the first surface 51 and a second heat sink 62 that is connected to the first heat sink 61. The second heat sink 62 faces the second surface 52. Therefore, with this configuration, the heat dissipation performance of the semiconductor device A60 can be improved. Furthermore, by having a configuration common to the semiconductor device A10, the semiconductor device A60 achieves the same effects as the semiconductor device A10.

[0088] In the semiconductor device A60, the die pad 20 has a first engagement portion 23 recessed from the back surface 212. The first heat sink 61 has a second engagement portion 613 protruding from a base portion 611 in the second direction x. The second engagement portion 613 is fitted into the first engagement portion 23. This configuration allows the heat sink 60 to be separate from the die pad 20. Furthermore, when the heat sink 60 is bonded to the die pad 20, it is possible to suppress misalignment of the heat sink 60 with respect to the die pad 20 in a direction perpendicular to the first direction z.

[0089] The present disclosure is not limited to the above-described embodiment, and the specific configuration of each part of the present disclosure can be freely modified in various ways.

[0090] The present disclosure includes the embodiments described in the appendix below. [Appendix 1] A semiconductor element (10), a sealing resin (50) that covers the semiconductor element (10); a heat sink (60) that covers a part of the sealing resin (50), The sealing resin (50) has a first surface (51) facing one side in a first direction and a second surface (52) facing one side in a second direction perpendicular to the first direction, the heat radiator (60) has a first heat radiator (61) exposed from the first surface (51) and a second heat radiator (62) connected to the first heat radiator (61); The second heat dissipation body (62) faces the second surface (52), in the semiconductor device (A10). [Appendix 2] the sealing resin (50) has a third surface (53) facing the opposite side to the first surface (51) in the first direction, The heat radiator (60) has a third heat radiator (63) connected to the second heat radiator (62), The semiconductor device (A10) according to appendix 1, wherein the third heat dissipation body (63) faces the third surface (53). [Appendix 3] the second heat dissipation body (62) has a first side surface (621) facing one side in a third direction perpendicular to each of the first direction and the second direction and positioned outward from the second surface (52); the second surface (52) includes two first edges (521) spaced apart from each other in the third direction, The semiconductor device (A10) according to Appendix 2, wherein the first side surface (621) is located between the two first edges (521) when viewed in the second direction. [Appendix 4] 4. The semiconductor device (A10) according to claim 3, wherein the third heat dissipation body (63) overlaps the semiconductor element (10) when viewed in the first direction. [Appendix 5] The sealing resin (50) has a first recess (57) recessed from the first surface (51) and connected to the second surface (52), The semiconductor device (A10) according to appendix 3, wherein the first heat dissipation body (61) has a base (611) at least a portion of which is housed in the first recess (57). [Appendix 6] Further provided is a die pad (20) located on one side of the semiconductor element (10) in the first direction, The semiconductor element (10) is bonded to the die pad (20), the first heat sink (61) is located between the die pad (20) and the second surface (52) in the second direction, The semiconductor device (A10) according to Appendix 5, wherein the die pad (20) has a back surface (212) exposed from the first surface (51). [Appendix 7] the sealing resin (50) has a fourth surface (54) facing the opposite side to the second surface (52) in the second direction, The heat radiator (60) has a fourth heat radiator (64) connected to the third heat radiator (63), The semiconductor device (A20) according to appendix 6, wherein the fourth heat dissipation body (64) faces the fourth surface (54). [Appendix 8] the sealing resin (50) has a second recess (58) recessed from the first surface (51) and connected to the fourth surface (54); The heat radiator (60) has a fifth heat radiator (65) connected to the fourth heat radiator (64), The semiconductor device (A20) according to appendix 7, wherein at least a portion of the fifth heat dissipation body (65) is housed in the second recess (58). [Appendix 9] The semiconductor device (A10) according to appendix 6, wherein the base (611) is integral with the die pad (20). [Appendix 10] The base (611) has a heat radiation surface (611A) exposed from the first surface (51), The semiconductor device (A10) according to appendix 9, wherein the heat dissipation surface (611A) is flush with the back surface (212). [Appendix 11] The die pad (20) has a first engagement portion (23) recessed from the back surface (212), the first heat dissipating body (61) has a second engaging portion (613) located on the opposite side of the second heat dissipating body (62) with respect to the base portion (611) in the second direction, The semiconductor device (A60) according to appendix 6, wherein the second engagement portion (613) protrudes from the base portion (611) in the second direction and is fitted into the first engagement portion (23). [Appendix 12] the second heat dissipation body (62) includes a first portion (62A) and a second portion (62B) spaced apart from each other in the third direction; The semiconductor device (A40) according to appendix 9, wherein the first portion (62A) and the second portion (62B) are connected to the base portion (611) and the third heat dissipation body (63), respectively. [Appendix 13] the first heat dissipation body (61) is located on the opposite side of the die pad (20) with respect to the base (611) in the second direction, and has two connecting portions (612) spaced apart from each other in the third direction; The two connecting portions (612) protrude from the base portion (611) in the second direction, At least a portion of each of the two connecting portions (612) is accommodated in the first recess (57), The semiconductor device (A50) according to appendix 9, wherein the second heat dissipation body (62) is connected to the two connecting portions (612). [Appendix 14] the sealing resin (50) has a fourth surface (54) facing the opposite side to the second surface (52) in the second direction, the heat radiator (60) has a fourth heat radiator (64) exposed from the first surface (51) and a fifth heat radiator (65) connected to the fourth heat radiator (64), the fourth heat dissipator (64) is located on the opposite side of the first heat dissipator (61) in the second direction with the die pad (20) interposed therebetween, and is integral with the die pad (20); The semiconductor device (A30) according to appendix 9, wherein the fifth heat dissipation body (65) faces the fourth surface (54). [Appendix 15] the sealing resin (50) has a second recess (58) recessed from the first surface (51) and connected to the fourth surface (54); The semiconductor device (A30) according to Appendix 14, wherein at least a portion of the fourth heat dissipation body (64) is housed in the second recess (58). [Appendix 16] The heat radiator (60) has a sixth heat radiator (66) connected to the fifth heat radiator (65), The semiconductor device (A30) according to appendix 15, wherein the sixth heat dissipation body (66) faces the third surface (53). [Appendix 17] Further provided is a first terminal (31) that is electrically connected to the semiconductor element (10), the sealing resin (50) has a fifth surface (55) facing one side in the third direction, the first terminal (31) is exposed from the fifth surface (55); The semiconductor device (A10 to A60) according to any one of appendixes 3 to 16, wherein the first terminal (31) is spaced apart from the first heat sink (61) when viewed in the first direction. [Appendix 18] Further provided is a second terminal (32) that is electrically connected to the semiconductor element (10), the sealing resin (50) has a sixth surface (56) facing the opposite side to the fifth surface (55) in the third direction, the second terminal (32) is exposed from the sixth surface (56), The semiconductor device (A10 to A60) according to Appendix 17, wherein the second terminal (32) is spaced apart from the first heat sink (61) when viewed in the first direction. [Appendix 19] a first step (P1) of forming a sealing resin (50) that covers the semiconductor element (10); a second step (P2) of forming a heat sink (60) that covers a part of the sealing resin (50), the sealing resin (50) has a first surface (52) facing one side in a first direction and a second surface (52) facing one side in a second direction perpendicular to the first direction; In the first step (P1), the heat dissipation body (60) is exposed from the first surface (51), the second step (P2) includes a first bending step (P21) of bending the heat dissipation body (60) around a third direction perpendicular to each of the first direction and the second direction, In the first bending step (P21), the heat sink (60) is opposed to the second surface (52). [Appendix 20] the sealing resin (50) has a third surface (53) facing the opposite side to the first surface (51) in the first direction, the second step (P2) includes, after the first bending step (P21), a second bending step (P22) of bending the heat dissipation body (60) around the third direction, 20. The method for manufacturing a semiconductor device according to claim 19, wherein in the second bending step (P22), the heat sink (60) is opposed to the third surface (53). [Appendix 21] The semiconductor device (A10) according to appendix 3, wherein each of the first surface (51), the second surface (52), and the third surface (53) is exposed to the outside. [Appendix 22] The semiconductor device (A10) according to appendix 3, wherein the first side surface (621) is entirely exposed from the sealing resin (50). [Appendix 23] the die pad (20) has a bonding surface (213) facing the base (611) in the second direction, The semiconductor device (A11) according to Appendix 6, wherein the base (611) is bonded to the bonding surface (213). [Appendix 24] The die pad (20) includes the back surface (212) and has a pad portion (21) to which the semiconductor element (10) is bonded, and a support portion (22) connected to the pad portion (21); the support portion (22) is located between the pad portion (21) and the fourth surface (54) in the second direction, The support portion (22) has an end surface (221) exposed from the fourth surface (54), The semiconductor device (A20) according to appendix 7, wherein the fourth heat dissipation body (64) overlaps the end surface (221) when viewed in the second direction. [Appendix 25] The semiconductor device (A20) according to appendix 8, wherein the fifth heat sink (65) is spaced apart from the die pad (20). [Appendix 26] The semiconductor device (A30) according to appendix 16, wherein the sixth heat radiator (66) is spaced apart from the third heat radiator (63). [Appendix 27] The semiconductor device (A30) according to appendix 26, wherein, when viewed in the first direction, each of the third heat sink (63) and the sixth heat sink (66) overlaps the semiconductor element (10). [Appendix 28] The semiconductor device (A10 to A60) according to Appendix 17, wherein a portion of the first terminal (31) protrudes from the fifth surface (55). [Appendix 28] The semiconductor device (A10 to A60) according to Appendix 18, wherein a part of the second terminal (32) protrudes from the sixth surface (56). [Explanation of symbols]

[0091] A10 to A60: Semiconductor device 10: Semiconductor element 11: Electrode 19: Bonding layer 20: Die pad 21: Pad section 211: Mounting surface 212: Back side 213: Joint surface 22: Support part 221: End face 23: First engagement portion 31: 1st terminal 311: First Inner Section 311A: First connecting surface 312: First Outer Section 32: 2nd terminal 321: Second Inner Section 321A: Second connection surface 322: Second Outer Division 40: Wire 50: Sealing resin 51~56: 1st page ~ 6th page 521, 522: First edge, first edge 57, 58: First recess, second recess 60: Heat sink 61: 1st heat sink 611: Base 612: Connection part 613: Second engagement portion 62:Second heat sink 621:1st side 63:Third heat sink 631:Second side 64,65,66: 4th heat radiator, 5th heat radiator, 6th heat radiator P1, P2: 1st process, 2nd process P21, P22: First bending process, second bending process z,x,y: 1st direction, 2nd direction, 3rd direction

Claims

1. A semiconductor element; a sealing resin that covers the semiconductor element; a heat sink that covers a portion of the sealing resin, the sealing resin has a first surface facing one side in a first direction and a second surface facing one side in a second direction perpendicular to the first direction; the heat sink includes a first heat sink exposed from the first surface and a second heat sink connected to the first heat sink, The second heat sink faces the second surface.

2. the sealing resin has a third surface facing the opposite side to the first surface in the first direction, the heat sink has a third heat sink connected to the second heat sink, The semiconductor device according to claim 1 , wherein said third heat sink faces said third surface.

3. the second heat dissipation body has a first side surface facing one side in a third direction perpendicular to each of the first direction and the second direction and positioned outward from the second surface; the second surface includes two first edges spaced apart from each other in the third direction; The semiconductor device according to claim 2 , wherein the first side surface is located between the two first edges when viewed in the second direction.

4. The semiconductor device according to claim 3 , wherein the third heat sink overlaps the semiconductor element when viewed in the first direction.

5. the sealing resin has a first recess recessed from the first surface and connected to the second surface; The semiconductor device according to claim 3 , wherein the first heat sink has a base at least a portion of which is accommodated in the first recess.

6. a die pad located on one side of the semiconductor element in the first direction; the semiconductor element is bonded to the die pad, the first heat sink is located between the die pad and the second surface in the second direction, The semiconductor device according to claim 5 , wherein the die pad has a back surface exposed from the first surface.

7. the sealing resin has a fourth surface facing the opposite side to the second surface in the second direction; the heat sink includes a fourth heat sink connected to the third heat sink, The semiconductor device according to claim 6 , wherein said fourth heat sink faces said fourth surface.

8. the sealing resin has a second recess recessed from the first surface and connected to the fourth surface; the heat sink includes a fifth heat sink connected to the fourth heat sink, The semiconductor device according to claim 7 , wherein at least a portion of said fifth heat sink is accommodated in said second recess.

9. The semiconductor device according to claim 6 , wherein the base is integral with the die pad.

10. the base portion has a heat dissipation surface exposed from the first surface, The semiconductor device according to claim 9 , wherein the heat dissipation surface is flush with the back surface.

11. the die pad has a first engagement portion recessed from the back surface, the first heat dissipator has a second engagement portion located on the opposite side of the second heat dissipator with respect to the base portion in the second direction; The semiconductor device according to claim 6 , wherein the second engaging portion protrudes from the base portion in the second direction and is fitted into the first engaging portion.

12. the first heat sink is located on the opposite side of the die pad with respect to the base in the second direction and has two connecting portions spaced apart from each other in the third direction; the two connecting portions protrude from the base portion in the second direction, At least a portion of each of the two connecting portions is accommodated in the first recess, The semiconductor device according to claim 9 , wherein the second heat sink is connected to the two connecting portions.

13. the second heat sink includes a first portion and a second portion spaced apart from each other in the third direction; The semiconductor device according to claim 9 , wherein the first portion and the second portion are connected to the base portion and the third heat sink, respectively.

14. the sealing resin has a fourth surface facing the opposite side to the second surface in the second direction; the heat sink includes a fourth heat sink exposed from the first surface and a fifth heat sink connected to the fourth heat sink, the fourth heat sink is located on the opposite side of the die pad from the first heat sink in the second direction, and is integral with the die pad; The semiconductor device according to claim 9 , wherein said fifth heat sink faces said fourth surface.

15. the sealing resin has a second recess recessed from the first surface and connected to the fourth surface; The semiconductor device according to claim 14 , wherein at least a portion of the fourth heat sink is housed in the second recess.

16. the heat sink includes a sixth heat sink connected to the fifth heat sink, The semiconductor device according to claim 15 , wherein the sixth heat sink faces the third surface.

17. a first terminal electrically connected to the semiconductor element; the sealing resin has a fifth surface facing one side in the third direction, the first terminal is exposed from the fifth surface, 17. The semiconductor device according to claim 3, wherein the first terminal is spaced apart from the first heat sink when viewed in the first direction.

18. a second terminal electrically connected to the semiconductor element; the sealing resin has a sixth surface facing the opposite side to the fifth surface in the third direction, the second terminal is exposed from the sixth surface, The semiconductor device according to claim 17 , wherein the second terminal is spaced apart from the first heat sink when viewed in the first direction.

19. a first step of forming a sealing resin to cover a semiconductor element; a second step of forming a heat sink that covers a portion of the sealing resin, the sealing resin has a first surface facing one side in a first direction and a second surface facing one side in a second direction perpendicular to the first direction; In the first step, the heat sink is exposed from the first surface, the second step includes a first bending step of bending the heat sink around a third direction perpendicular to each of the first direction and the second direction; In the first bending step, the heat sink is caused to face the second surface.

20. the sealing resin has a third surface facing the opposite side to the first surface in the first direction, the second step includes a second bending step of bending the heat sink around the third direction after the first bending step, The method for manufacturing a semiconductor device according to claim 19 , wherein in the second bending step, the heat sink is made to face the third surface.

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