Oxide semiconductor film and semiconductor device

Abstract

To provide an oxide semiconductor film with high carrier mobility.SOLUTION: An oxide semiconductor film contains indium and oxygen. The oxide semiconductor film has crystal grains. The concentration of each of gallium and zinc in the oxide semiconductor film is 0.1 atomic% or less. The extension length of the grain boundary in the oxide semiconductor film is 0 nm or more and 10000 nm or less. The extension length of the grain boundary is calculated using the viewing field with a length of 90 nm on each side extracted from a TEM image of the oxide semiconductor film. In a thermal process with a heating temperature of 400°C for a processing time of 8 hours, the oxide semiconductor film has a property that oxygen permeates by 2×1020 atoms / cm3 or more and 1×1021 atoms / cm3 or less.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] One embodiment of the present invention relates to an oxide semiconductor film and a method for forming the oxide semiconductor film. Another embodiment of the present invention relates to a semiconductor device, a memory device, a display device, and an electronic device each including the oxide semiconductor film. Another embodiment of the present invention relates to a method for manufacturing the semiconductor device including the oxide semiconductor film.

[0002] One embodiment of the present invention is not limited to the above technical field, and examples of the technical field of one embodiment of the present invention include a semiconductor device, a display device, a light-emitting device, a power storage device, a memory device, an electronic device, a lighting device, an input device (for example, a touch sensor), an input / output device (for example, a touch panel), a driving method thereof, or a manufacturing method thereof.

[0003] In this specification and the like, a semiconductor device is a device that utilizes semiconductor characteristics, and refers to a circuit including a semiconductor element (transistor, diode, photodiode, etc.), a device having such a circuit, etc. Also, it refers to any device that can function by utilizing semiconductor characteristics. For example, an integrated circuit, a chip including an integrated circuit, and an electronic component in which a chip is housed in a package are examples of semiconductor devices. Furthermore, memory devices, display devices, light-emitting devices, lighting devices, and electronic devices may themselves be semiconductor devices and each may have a semiconductor device. [Background technology]

[0004] In recent years, the development of semiconductor devices has progressed, and semiconductor devices mainly use LSIs (Large Scale Integration), CPUs (Central Processing Units), memories (storage devices), etc. A CPU is an aggregate of semiconductor elements that have integrated circuits (including transistors and memories) formed into chips by processing a semiconductor wafer and on which electrodes serving as connection terminals are formed.

[0005] 2. Description of the Related Art Integrated circuits (ICs) such as LSIs, CPUs, or memories are mounted on circuit boards, such as printed wiring boards, and are used as components of various electronic devices.

[0006] Furthermore, technology for constructing transistors using semiconductor thin films formed on substrates with insulating surfaces has attracted attention. Such transistors are widely used in electronic devices such as integrated circuits (ICs) and display devices. While silicon-based semiconductor materials are widely known as semiconductor materials applicable to transistors, oxide semiconductors have also attracted attention as other materials.

[0007] Furthermore, transistors using oxide semiconductors are known to have extremely low leakage current in an off state. For example, Patent Document 1 discloses a low-power consumption CPU that utilizes the low leakage current characteristic of transistors using oxide semiconductors. Furthermore, for example, Patent Document 2 discloses a memory device that can retain stored data for a long period of time by utilizing the low leakage current characteristic of transistors using oxide semiconductors.

[0008] In addition, with the recent trend toward smaller and lighter electronic devices, there is an increasing demand for higher density integrated circuits. There is also a demand for improved productivity of semiconductor devices including integrated circuits. For example, Patent Document 3 and Non-Patent Document 1 disclose a technique for increasing the density of integrated circuits by stacking a first transistor using an oxide semiconductor film and a second transistor using an oxide semiconductor film to provide multiple memory cells in an overlapping manner. Patent Document 4 also discloses a technique for increasing the density of integrated circuits by vertically arranging the channel of a transistor using an oxide semiconductor film.

[0009] Examples of oxide semiconductors that can be used in the active layer of a transistor include indium oxide, indium gallium zinc oxide, etc. Non-Patent Document 2 discloses a thin-film transistor that uses hydrogenated polycrystalline indium oxide formed by low-temperature solid-phase crystallization as the active layer. [Prior art documents] [Patent documents]

[0010] [Patent Document 1] Japanese Patent Application Laid-Open No. 2012-257187 [Patent Document 2] Japanese Patent Application Laid-Open No. 2011-151383 [Patent Document 3] International Publication No. 2021 / 053473 [Patent Document 4] Japanese Patent Application Laid-Open No. 2013-211537 [Non-patent literature]

[0011] [Non-Patent Document 1] M. Oota et al., “3D-Stacked CAAC-In-Ga-Zn Oxide FETs with Gate Length of 72nm”, IEDM Tech. Dig., 2019, pp.50-53 [Non-patent document 2] Y. Magari et al., “High-mobility hydrogenated polycrystalline In2O3(In2O3:H) thin-film transistors”, nature COMMUNICATIONS, 13, 1078 (2022) [Non-patent document 3] Takashi Koida, "High Mobility Transparent Conductive Film", National Institute of Advanced Industrial Science and Technology, AIST Photovoltaic Power Generation Research Results Presentation 2019, Internet<URL:https: / / unit.aist.go.jp / rpd-envene / PV / ja / results / 2019 / oral / T13.pdf> Summary of the Invention [Problem to be solved by the invention]

[0012] An object of one embodiment of the present invention is to provide an oxide semiconductor film having high carrier mobility.An object of one embodiment of the present invention is to provide a novel oxide semiconductor film.An object of one embodiment of the present invention is to provide a transistor, a semiconductor device, a memory device, or a display device to which the oxide semiconductor film is applied.

[0013] An object of one embodiment of the present invention is to provide a transistor with favorable electrical characteristics.An object of one embodiment of the present invention is to provide a transistor with high on-state current.An object of one embodiment of the present invention is to provide a transistor with low parasitic capacitance.An object of one embodiment of the present invention is to provide a highly reliable transistor, semiconductor device, memory device, or display device.An object of one embodiment of the present invention is to provide a transistor, semiconductor device, or memory device that can be miniaturized or highly integrated.An object of one embodiment of the present invention is to provide a semiconductor device, memory device, or display device with low power consumption.An object of one embodiment of the present invention is to provide a transistor, semiconductor device, or memory device with high operating speed.An object of one embodiment of the present invention is to provide a display device with high definition or a high aperture ratio.An object of one embodiment of the present invention is to provide a manufacturing method of the transistor, semiconductor device, memory device, or display device.

[0014] Note that the description of these problems does not preclude the existence of other problems. One embodiment of the present invention does not necessarily have to solve all of these problems. Problems other than these can be extracted from the description in the specification, drawings, and claims. [Means for solving the problem]

[0015] One embodiment of the present invention is an oxide semiconductor film containing indium and oxygen. The oxide semiconductor film has crystal grains. The concentration of gallium and the concentration of zinc in the oxide semiconductor film are each 0.1 atomic % or less. The extension length of the grain boundary in the oxide semiconductor film is 0 nm to 10,000 nm. The extension length of the grain boundary is calculated using a 90 nm square field extracted from a transmission electron microscope (TEM) image of the oxide semiconductor film. The oxide semiconductor film is subjected to heat treatment at 400° C. for 8 hours, whereby oxygen is reduced to 2×10 20 atoms / cm 3 More than 1×10 21 atoms / cm 3 It has the property of transmitting the following:

[0016] One embodiment of the present invention is an oxide semiconductor film containing indium and oxygen. The oxide semiconductor film has crystal grains. The gallium concentration and zinc concentration in the oxide semiconductor film are each 0.1 atomic % or less. The grain boundary in the oxide semiconductor film has an extension length of 0 nm to 10,000 nm. The extension length of the grain boundary is calculated using a 90-nm square field extracted from a TEM image of the oxide semiconductor film. Within the crystal grains, 2×10 20 atoms / cm 3 More than 1×10 21 atoms / cm 3 The following oxygen diffuses by heat treatment at a heating temperature of 400°C for 8 hours:

[0017] One embodiment of the present invention is an oxide semiconductor film that is permeable to oxygen. The oxide semiconductor film contains indium and oxygen. The oxide semiconductor film has crystal grains. The gallium concentration and zinc concentration in the oxide semiconductor film are each 0.1 atomic % or less. The grain boundary in the oxide semiconductor film has an extension length of 0 nm to 10,000 nm. The extension length of the grain boundary is calculated using a 90-nm square field extracted from a TEM image of the oxide semiconductor film. When an oxide semiconductor film is disposed between a first film and a second film, oxygen contained in the first film is transferred to the second film through the oxide semiconductor film by heat treatment at 400° C. for 8 hours. 20 atoms / cm 3 The first film has an oxygen concentration of 1×10 22 atoms / cm 3 The second film before the heat treatment has a region where the oxygen concentration by SIMS is 1×10 or more. 20 atoms / cm 3 has an area that is less than

[0018] One embodiment of the present invention is an oxide semiconductor film containing indium and oxygen. The oxide semiconductor film has crystal grains. The concentration of gallium and the concentration of zinc in the oxide semiconductor film are each 0.1 atomic % or less. The extension length of the grain boundary in the oxide semiconductor film is 0 nm to 10,000 nm. The extension length of the grain boundary is calculated using a 90-nm square field extracted from a TEM image of the oxide semiconductor film. The oxide semiconductor film has a deuterium diffusion integrated value of 5×10 in a heat treatment at a heating temperature of 200° C. for 8 hours. 12 atoms / cm 2 More than 1×10 14 atoms / cm 2 It has the following properties:

[0019] In the oxide semiconductor film, the extension length of the grain boundary in the oxide semiconductor film is preferably greater than or equal to 0 nm and less than or equal to 1000 nm.

[0020] The concentration of carbon and the concentration of aluminum in the oxide semiconductor film are each preferably less than 100 ppm.

[0021] One embodiment of the present invention is a semiconductor device including an oxide semiconductor layer including the above oxide semiconductor film, a conductive layer, and an insulating layer having a portion located between the oxide semiconductor layer and the conductive layer.

[0022] The semiconductor device preferably includes an oxide layer overlapping the insulating layer with an oxide semiconductor layer sandwiched therebetween, and the oxide layer preferably has cubic crystal grains.

[0023] In the above semiconductor device, the degree of lattice mismatch between crystal grains in the oxide semiconductor film and crystal grains in the oxide layer is preferably greater than or equal to −10% and less than or equal to 10%.

[0024] In the semiconductor device, the oxide layer preferably contains yttrium, zirconium, and oxygen.

[0025] The semiconductor device preferably includes an oxide layer overlapping with the insulating layer with an oxide semiconductor layer sandwiched therebetween, and the oxide layer preferably has hexagonal or trigonal crystal grains.

[0026] In the above semiconductor device, the c-axes of the crystal grains of the oxide layer are preferably perpendicular or approximately perpendicular to the surface of the oxide layer or a surface on which the oxide layer is formed.

[0027] In the above semiconductor device, the oxide layer preferably contains indium, gallium, zinc, and oxygen.

[0028] The semiconductor device preferably includes a layer between the oxide layer and the oxide semiconductor layer, and the layer contains aluminum and oxygen.

[0029] In the above semiconductor device, it is preferable that the oxide semiconductor layer has an In—Ga—Zn oxide film over the oxide semiconductor film, and that the oxide semiconductor film has higher permeability to either or both of oxygen atoms and hydrogen atoms than the In—Ga—Zn oxide film.

[0030] One embodiment of the present invention is a method for manufacturing a semiconductor device, including: forming a first insulating layer containing silicon oxide over a first conductive layer; performing plasma treatment using a nitrogen-containing gas to add nitrogen dioxide and oxygen to the first insulating layer; forming a second conductive layer over the first insulating layer; processing the second conductive layer and the first insulating layer to form openings reaching the first conductive layer; forming an oxide layer to cover the openings; forming an oxide semiconductor layer over the oxide layer; forming the second insulating layer over the oxide semiconductor layer and the first insulating layer so that the second insulating layer has a portion in contact with the oxide semiconductor layer and a portion in contact with the first insulating layer; and performing heat treatment to supply the oxygen added to the first insulating layer through the second insulating layer.

[0031] In the above-described method for manufacturing a semiconductor device, the oxide semiconductor layer preferably has higher permeability to oxygen atoms than the oxide layer.

[0032] In the above method for manufacturing a semiconductor device, the oxide semiconductor layer preferably includes an indium oxide film, and the indium oxide film preferably includes crystal grains.

[0033] In the above method for manufacturing a semiconductor device, the oxide layer preferably contains indium, gallium, zinc, and oxygen.

[0034] In the above-described method for manufacturing a semiconductor device, it is preferable that the oxide layer has hexagonal or trigonal crystal grains, and that the c-axes of the crystal grains in the oxide layer are perpendicular or approximately perpendicular to a surface of the oxide layer or a surface on which the oxide layer is formed.

[0035] In the above-described method for manufacturing a semiconductor device, the oxide layer preferably contains yttrium, zirconium, and oxygen.

[0036] One embodiment of the present invention is a method for manufacturing a semiconductor device, including: forming a first insulating layer containing silicon oxide over a first conductive layer; performing plasma treatment using a nitrogen-containing gas to add nitrogen dioxide and oxygen to the first insulating layer; forming a second conductive layer over the first insulating layer; processing the second conductive layer and the first insulating layer to form openings reaching the first conductive layer; forming an oxide layer to cover the openings; forming an oxide semiconductor layer over the oxide layer; forming the second insulating layer over the oxide semiconductor layer and the first insulating layer so that the second insulating layer has a portion in contact with the oxide semiconductor layer and a portion in contact with the first insulating layer; and performing heat treatment to supply oxygen added to the first insulating layer through the oxide layer and the second insulating layer.

[0037] In the above method for manufacturing a semiconductor device, the oxide semiconductor layer preferably includes an indium oxide film, and the indium oxide film preferably includes crystal grains.

[0038] In the above-described method for manufacturing a semiconductor device, the nitrogen-containing gas is preferably nitrogen gas or dinitrogen monoxide gas.

[0039] In the above-mentioned method for manufacturing a semiconductor device, it is preferable that the difference between the spin density corresponding to the absorption peak with a g value of 1.94 or more and 2.05 or less obtained by electron spin resonance measurement of the first insulating layer before heat treatment and the spin density corresponding to the absorption peak with a g value of 1.94 or more and 2.05 or less obtained by electron spin resonance measurement of the first insulating layer after heat treatment is 10% or less. [Effects of the Invention]

[0040] According to one embodiment of the present invention, an oxide semiconductor film having high carrier mobility can be provided. According to one embodiment of the present invention, a novel oxide semiconductor film can be provided. According to one embodiment of the present invention, a transistor, a semiconductor device, a memory device, or a display device to which the oxide semiconductor film is applied can be provided.

[0041] According to one embodiment of the present invention, a transistor with favorable electrical characteristics can be provided. According to one embodiment of the present invention, a transistor with large on-state current can be provided. According to one embodiment of the present invention, a transistor with small parasitic capacitance can be provided. According to one embodiment of the present invention, a highly reliable transistor, semiconductor device, memory device, or display device can be provided. According to one embodiment of the present invention, a transistor, semiconductor device, or memory device that can be miniaturized or highly integrated can be provided. According to one embodiment of the present invention, a semiconductor device, memory device, or display device with low power consumption can be provided. According to one embodiment of the present invention, a transistor, semiconductor device, or memory device with high operating speed can be provided. According to one embodiment of the present invention, a display device with high definition or a high aperture ratio can be provided. According to one embodiment of the present invention, a manufacturing method of the above transistor, semiconductor device, memory device, or display device can be provided.

[0042] Note that the description of these effects does not preclude the existence of other effects. One embodiment of the present invention does not necessarily have all of these effects. Effects other than these can be extracted from the description in the specification, drawings, and claims. [Brief explanation of the drawings]

[0043] [Figure 1] 1A to 1G are cross-sectional views showing an example of a semiconductor device, and FIGS. 1H and 1I are perspective views showing an example of a semiconductor device. [Figure 2] 2A1 to 2D2 are diagrams illustrating the crystal structure of metal oxide or silicon. [Figure 3] 3(A) and 3(B) are schematic perspective views showing an example of a semiconductor device. [Figure 4] Fig. 4(A) is a plan view showing an example of a semiconductor device, and Figs. 4(B) to 4(D) are cross-sectional views showing an example of the semiconductor device. [Figure 5] 5(A) and 5(B) are cross-sectional views showing an example of a semiconductor device. [Figure 6] 6A and 6B are cross-sectional views showing an example of a semiconductor device. [Figure 7] 7A and 7B are cross-sectional views showing an example of a semiconductor device. [Figure 8] 8A to 8D are cross-sectional views showing an example of a semiconductor device. [Figure 9] 9(A) and 9(B) are cross-sectional views showing an example of a semiconductor device. [Figure 10] 10(A) and 10(B) are cross-sectional views showing an example of a semiconductor device. [Figure 11] 11(A) and 11(B) are cross-sectional views showing an example of a semiconductor device. [Figure 12] Fig. 12(A) is a plan view showing an example of a semiconductor device, and Fig. 12(B) and Fig. 12(C) are cross-sectional views showing an example of a semiconductor device. [Figure 13] 13A and 13B are cross-sectional views showing an example of a semiconductor device. [Figure 14] Fig. 14(A) is a plan view showing an example of a semiconductor device, and Fig. 14(B) to Fig. 14(D) are cross-sectional views showing an example of the semiconductor device. [Figure 15] 15(A) and 15(B) are cross-sectional views showing an example of a semiconductor device. [Figure 16] 16(A) and 16(B) are cross-sectional views showing an example of a semiconductor device. [Figure 17] FIG. 17 is a cross-sectional view showing an example of a semiconductor device. [Figure 18] 18(A) and 18(B) are cross-sectional views showing an example of a semiconductor device. [Figure 19] 19(A) and 19(B) are cross-sectional views showing an example of a semiconductor device. [Figure 20] Fig. 20(A) is a plan view showing an example of a semiconductor device, and Fig. 20(B) to Fig. 20(D) are cross-sectional views showing an example of a semiconductor device. [Figure 21] 21(A) and 21(B) are cross-sectional views showing an example of a semiconductor device. [Figure 22]Fig. 22(A) is a plan view showing an example of a semiconductor device, and Fig. 22(B) to Fig. 22(D) are cross-sectional views showing an example of a semiconductor device. [Figure 23] Fig. 23(A) is a plan view showing an example of a semiconductor device, and Fig. 23(B) and Fig. 23(C) are cross-sectional views showing an example of a semiconductor device. [Figure 24] 24(A) to 24(C) are schematic perspective views showing an example of a semiconductor device. [Figure 25] Fig. 25(A) is a plan view showing an example of a semiconductor device, and Fig. 25(B) to Fig. 25(D) are cross-sectional views showing an example of a semiconductor device. [Figure 26] Fig. 26(A) is a plan view showing an example of a semiconductor device, and Fig. 26(B) and Fig. 26(C) are cross-sectional views showing an example of a semiconductor device. [Figure 27] Fig. 27(A) is a plan view showing an example of a semiconductor device, and Fig. 27(B) and Fig. 27(C) are cross-sectional views showing an example of a semiconductor device. [Figure 28] Fig. 28(A) is a plan view showing an example of a semiconductor device, and Fig. 28(B) to Fig. 28(D) are cross-sectional views showing an example of a semiconductor device. [Figure 29] 29(A) and 29(B) are cross-sectional views showing an example of a semiconductor device. [Figure 30] 30(A) to 30(C) are cross-sectional views showing an example of a semiconductor device. [Figure 31] Fig. 31(A) is a plan view showing an example of a semiconductor device, and Fig. 31(B) to Fig. 31(D) are cross-sectional views showing an example of a semiconductor device. [Figure 32] Fig. 32(A) is a plan view showing an example of a semiconductor device, and Fig. 32(B) to Fig. 32(D) are cross-sectional views showing an example of the semiconductor device. [Figure 33] 33A to 33C are cross-sectional views showing an example of a semiconductor device. [Figure 34] Fig. 34(A) is a plan view showing an example of a semiconductor device, and Fig. 34(B) to Fig. 34(D) are cross-sectional views showing an example of a semiconductor device. [Figure 35] FIG. 35 is a cross-sectional view showing an example of a semiconductor device. [Figure 36] 36(A) and 36(B) are diagrams illustrating the carrier concentration dependence of Hall mobility, and Fig. 36(C) is a cross-sectional view illustrating an indium oxide film. [Figure 37] Fig. 37(A) is a plan view showing an example of a memory device, and Fig. 37(B) and Fig. 37(C) are cross-sectional views showing an example of a memory device. [Figure 38] Fig. 38(A) is a plan view showing an example of a memory device, and Fig. 38(B) and Fig. 38(C) are cross-sectional views showing an example of a memory device. [Figure 39] 39(A) to 39(C) are cross-sectional views showing an example of a memory device. [Figure 40] 40(A) and 40(B) are cross-sectional views showing an example of a memory device. [Figure 41] 41(A) is a plan view showing an example of a memory device, and FIG. 41(B) is a cross-sectional view showing an example of a memory device. [Figure 42] FIG. 42 is a cross-sectional view showing an example of a memory device. [Figure 43] FIG. 43 is a cross-sectional view showing an example of a memory device. [Figure 44] FIG. 44 is a block diagram illustrating a configuration example of a semiconductor device. [Figure 45] 45A to 45G are diagrams illustrating examples of circuit configurations of memory cells. [Figure 46] 46(A) and 46(B) are perspective views illustrating a configuration example of a semiconductor device. [Figure 47] FIG. 47 is a block diagram illustrating the CPU. [Figure 48] 48(A) and 48(B) are perspective views of the semiconductor device. [Figure 49] 49(A) and 49(B) are perspective views of the semiconductor device. [Figure 50] 50(A) and 50(B) are perspective views showing an example of a display device. [Figure 51] FIG. 51 is a cross-sectional view showing an example of a display device. [Figure 52] FIG. 52 is a cross-sectional view showing an example of a display device. [Figure 53] 53(A) and 53(B) are diagrams showing an example of an electronic component. [Figure 54] Figures 54(A) to 54(C) are diagrams showing an example of a mainframe computer. Figure 54(D) is a diagram showing an example of space equipment. Figure 54(E) is a diagram showing an example of a storage system applicable to a data center. [Figure 55] 55(A) to 55(F) are diagrams showing examples of electronic devices. [Figure 56] 56(A) to 56(G) are diagrams showing examples of electronic devices. [Figure 57] 57(A) to 57(F) are diagrams showing examples of electronic devices. [Figure 58] 58(A) to 58(E) show the results of SIMS analysis of the sample according to the example. [Figure 59] 59(A) to 59(E) show the results of SIMS analysis of the sample according to the example. [Figure 60] 60(A) to 60(E) show the results of SIMS analysis of the sample according to the example. [Figure 61] 61(A) to 61(E) show the results of SIMS analysis of the sample according to the example. [Figure 62] 62(A1) to 62(C2) are diagrams for explaining TEM images of samples according to the example. [Figure 63] 63(A1) to 63(B2) are diagrams for explaining TEM images of the sample according to the example. [Figure 64] 64(A) and 64(B) are diagrams illustrating the laminated structure of the laminated film. [Figure 65] 65(A) to 65(C) show the results of SIMS analysis of the fabricated samples. [Figure 66]Figures 66(A) and 66(B) show the results of SIMS analysis of the prepared sample. [Figure 67] 67(A) and 67(B) are diagrams illustrating the relationship between the extension length of the grain boundary and the oxygen concentration. [Figure 68] 68(A) to 68(C) show the results of SIMS analysis of the fabricated samples. [Figure 69] Figures 69(A) and 69(B) show the results of SIMS analysis of the prepared samples. [Figure 70] FIG. 70 is a diagram illustrating the concept of a method for calculating an integral value. [Figure 71] FIG. 71 is a diagram illustrating the relationship between the extension length of the grain boundary and the integral value of the amount of diffused deuterium. [Figure 72] FIG. 72 is a cross-sectional view showing the structure and manufacturing method of a sample according to an embodiment. [Figure 73] 73(A) to 73(F) are diagrams showing the results of TDS analysis according to the example. [Figure 74] 74(A) to 74(C) are diagrams showing the results of TDS analysis according to the example. [Figure 75] 75(A) to 75(C) are diagrams showing the results of TDS analysis according to the example. [Figure 76] FIG. 76 is a schematic diagram illustrating the desorption of oxygen. DETAILED DESCRIPTION OF THE INVENTION

[0044] The embodiments will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be readily understood by those skilled in the art that various changes can be made in form and detail without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the description of the embodiments shown below.

[0045] In the configuration of the invention described below, the same parts or parts having similar functions are denoted by the same reference numerals in different drawings, and repeated explanations thereof will be omitted. Furthermore, when referring to similar functions, the same hatching pattern may be used and no particular reference numeral may be assigned.

[0046] Furthermore, for ease of understanding, the position, size, range, etc. of each component shown in the drawings may not represent the actual position, size, range, etc. Therefore, the disclosed invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings.

[0047] In this specification, the ordinal numbers "first" and "second" are used for convenience and do not limit the number of components or the order of the components (for example, the order of processes or stacking). Furthermore, the ordinal numbers attached to components in one part of this specification may not match the ordinal numbers attached to the same components in other parts of this specification or in the claims.

[0048] A transistor is a type of semiconductor element that can perform functions such as amplifying current or voltage and performing a switching operation to control conduction or non-conduction. The term "transistor" as used herein includes an IGFET (Insulated Gate Field Effect Transistor) and a TFT (Thin Film Transistor).

[0049] In this specification and the like, a transistor using an oxide semiconductor or a metal oxide for a semiconductor layer and a transistor having an oxide semiconductor or a metal oxide for a channel formation region may be referred to as an OS (oxide semiconductor) transistor. A transistor having silicon for a channel formation region may be referred to as a Si transistor.

[0050] In this specification and the like, a transistor is an element having at least three terminals including a gate, a drain, and a source. A region (also referred to as a channel formation region) where a channel is formed between the drain (drain terminal, drain region, or drain electrode) and the source (source terminal, source region, or source electrode) is provided, and a current can flow between the source and the drain through the channel formation region. Note that in this specification and the like, the channel formation region refers to a region through which a current mainly flows.

[0051] Furthermore, the functions of "source" and "drain" may be interchanged when transistors of different polarities are used, or when the direction of current flow changes during circuit operation, etc. For this reason, the terms "source" and "drain" may be used interchangeably in this specification.

[0052] Note that impurities in a semiconductor refer to, for example, elements other than the main components constituting the semiconductor. For example, an element with a concentration of less than 0.1 atomic % can be considered an impurity. The presence of impurities may increase the density of defect states in the semiconductor or reduce the crystallinity, for example. When the semiconductor is an oxide semiconductor, impurities that change the characteristics of the semiconductor include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, and transition metals other than the main components of the oxide semiconductor. Specific examples include hydrogen, lithium, sodium, silicon, boron, phosphorus, carbon, and nitrogen. Note that water may also function as an impurity. For example, the inclusion of impurities may cause oxygen deficiency (V O (also referred to as "interstitial space") may be formed.

[0053] In this specification and the like, an oxynitride refers to a material whose composition contains more oxygen than nitrogen. A nitride oxide refers to a material whose composition contains more nitrogen than oxygen. For example, silicon oxynitride refers to a material whose composition contains more oxygen than nitrogen, and silicon nitride oxide refers to a material whose composition contains more nitrogen than oxygen.

[0054] To analyze the content of elements such as hydrogen, oxygen, carbon, or nitrogen contained in a film, for example, secondary ion mass spectrometry (SIMS) or X-ray photoelectron spectroscopy (XPS) or electron spectroscopy for chemical analysis (ESCA) can be used. XPS is suitable when the content of the target element is high (e.g., 0.5 atomic % or more, or 1 atomic % or more). On the other hand, SIMS is suitable when the content of the target element is low (e.g., 0.5 atomic % or less, or 1 atomic % or less). When comparing the content of elements, it is more preferable to perform a combined analysis using both SIMS and XPS analytical techniques.

[0055] In this specification and the like, the term "content" refers to the proportion of a component contained in a film. For example, if an oxide semiconductor layer contains metal elements X, Y, and Z, and the number of atoms of each of the metal elements X, Y, and Z contained in the oxide semiconductor layer is A, then the number of atoms of each of the metal elements X, Y, and Z contained in the oxide semiconductor layer is A. X , A Y , A Z When the content of metal element X is X / (A X +A Y +A Z ) In addition, the ratio of the number of atoms of the metal element X, the metal element Y, and the metal element Z in the oxide semiconductor layer (atomic ratio) can be expressed as follows: X :B Y :B Z When the content of the metal element X is expressed as B X / (B X+B Y +B Z ) can be shown as

[0056] It should be noted that the terms "film" and "layer" can be interchangeable depending on the circumstances. For example, the term "conductive layer" can be changed to the term "conductive film." Or, for example, the term "insulating film" can be changed to the term "insulating layer."

[0057] Furthermore, in this specification, "parallel" refers to a state in which two straight lines are arranged at an angle of -10 degrees or more and 10 degrees or less. Therefore, it also includes cases in which the angle is -5 degrees or more and 5 degrees or less. Furthermore, "substantially parallel" refers to a state in which two straight lines are arranged at an angle of -20 degrees or more and 20 degrees or less. Furthermore, "perpendicular" refers to a state in which two straight lines are arranged at an angle of 80 degrees or more and 100 degrees or less. Therefore, it also includes cases in which the angle is 85 degrees or more and 95 degrees or less. Furthermore, "substantially perpendicular" refers to a state in which two straight lines are arranged at an angle of 70 degrees or more and 110 degrees or less.

[0058] In this specification, "connection" includes, as an example, "electrical connection." Note that the term "electrical connection" is sometimes used to define the connection relationship between circuit elements as a physical entity. Furthermore, "electrical connection" includes "direct connection" and "indirect connection." "A and B are directly connected" means that A and B are connected without the intervention of a circuit element (e.g., a transistor, a switch, etc.; wiring is not considered a circuit element). On the other hand, "A and B are indirectly connected" means that A and B are connected via one or more circuit elements.

[0059] For example, assuming that a circuit including A and B is operating, if there is a time during the operation of the circuit when an electrical signal is exchanged or an electrical potential interaction occurs between A and B, then it can be defined that "A and B are indirectly connected" as objects. Note that even if there is a time during the operation of the circuit when no electrical signal is exchanged or an electrical potential interaction occurs between A and B, it can still be defined as "A and B are indirectly connected" if there is a time during the operation of the circuit when an electrical signal is exchanged or an electrical potential interaction occurs between A and B.

[0060] An example of a case where "A and B are indirectly connected" is when A and B are connected via the source and drain of one or more transistors. On the other hand, an example of a case where it cannot be said that "A and B are indirectly connected" is when an insulator is present in the path from A to B. Specifically, this includes cases where a capacitive element is connected between A and B, or where a transistor gate insulating film or the like is present between A and B. Therefore, it cannot be said that "the gate (A) of a transistor and the source or drain (B) of the transistor are indirectly connected."

[0061] Another example of a case where it cannot be said that "A and B are indirectly connected" is when multiple transistors are connected via their sources and drains to the path from A to B, and a constant potential V is supplied to a node between one transistor and another from a power supply, GND, etc.

[0062] In this specification, unless otherwise specified, the off-state current refers to the leakage current between the source and drain when the transistor is in the off state (also called the non-conducting state or the cut-off state). Unless otherwise specified, the off-state refers to the leakage current between the source and the gate when the voltage V gs is the threshold voltage V th (For p-channel transistors, V th This refers to a state of being (higher than)

[0063] In this specification and the like, a tapered shape refers to a shape in which at least a portion of the side surface of a structure is inclined with respect to the substrate surface or the surface to be formed. For example, it is preferable to have a region in which the angle (also called the taper angle) between the inclined side surface and the substrate surface or the surface to be formed is greater than 0 degrees and less than 90 degrees. Note that the side surface of the structure, the substrate surface, and the surface to be formed do not necessarily need to be completely flat, and may be approximately planar with a slight curvature or approximately planar with a slight unevenness.

[0064] In this specification, when it is stated that A is located on B, at least a portion of A is located on B. Therefore, for example, it can be rephrased as "A has a region located on B." Similarly, when it is stated that A contacts B or A overlaps B, at least a portion of A contacts B or overlaps B. Therefore, it can be rephrased as "A has a region contacting B" or "A has a region overlapping B," respectively. Similarly, in this specification, when it is stated that A covers B, at least a portion of A covers B. Therefore, for example, it can be rephrased as "A has a region covering B."

[0065] In this specification, etc., a device fabricated using a metal mask or FMM (fine metal mask, high-resolution metal mask) may be referred to as a device with an MM (metal mask) structure. Also, in this specification, etc., a device fabricated without using a metal mask or FMM may be referred to as a device with an MML (metal maskless) structure.

[0066] In this specification and the like, a structure in which light-emitting layers are separately created for light-emitting elements (also called light-emitting devices) with different emission wavelengths is sometimes referred to as an SBS (Side By Side) structure. The SBS structure allows the materials and configuration to be optimized for each light-emitting element, increasing the freedom in material and configuration selection and facilitating improvements in brightness and reliability.

[0067] In this specification and the like, holes or electrons may be referred to as "carriers." Specifically, a hole injection layer or an electron injection layer may be referred to as a "carrier injection layer," a hole transport layer or an electron transport layer may be referred to as a "carrier transport layer," and a hole block layer or an electron block layer may be referred to as a "carrier block layer." Note that the above-mentioned carrier injection layer, carrier transport layer, and carrier block layer may not be clearly distinguishable. Furthermore, one layer may have two or three functions among the carrier injection layer, carrier transport layer, and carrier block layer.

[0068] In this specification and the like, a light-emitting element has an EL layer between a pair of electrodes. The EL layer has at least a light-emitting layer. Here, examples of layers (also referred to as functional layers) included in the EL layer include a light-emitting layer, a carrier injection layer (a hole injection layer and an electron injection layer), a carrier transport layer (a hole transport layer and an electron transport layer), and a carrier block layer (a hole block layer and an electron block layer). In this specification and the like, one of the pair of electrodes may be referred to as a pixel electrode, and the other as a common electrode.

[0069] In this specification and the like, a sacrificial layer (which may also be referred to as a mask layer) is located above at least the light-emitting layer (more specifically, a layer that is processed into an island shape among the layers that make up the EL layer), and has the function of protecting the light-emitting layer during the manufacturing process.

[0070] In this specification and the like, a step disconnection refers to a phenomenon in which a layer, a film, or an electrode is separated due to the shape of the surface on which it is formed (for example, a step or the like).

[0071] In the drawings and the like relating to this specification, arrows indicating the X direction, Y direction, and Z direction may be used. In this specification and the like, the "X direction" refers to the direction along the X axis, and there may be no distinction between the forward direction and the reverse direction unless explicitly stated. The same applies to the "Y direction" and the "Z direction." The X direction, Y direction, and Z direction are directions that intersect with each other. For example, the X direction, Y direction, and Z direction are directions that are perpendicular to each other.

[0072] In this specification and the like, a cubic crystal structure may be referred to as a cubic crystal, a cubic crystal structure, etc. The same applies to other crystal systems (hexagonal, trigonal, tetragonal, orthorhombic, monoclinic, and triclinic).

[0073] (Embodiment 1) In this embodiment, a semiconductor device of one embodiment of the present invention will be described with reference to FIGS. 1A to 1I. The semiconductor device of one embodiment of the present invention can include an oxide semiconductor film of one embodiment of the present invention.

[0074] [Example of semiconductor device configuration] 1A is a schematic cross-sectional view of a semiconductor device of one embodiment of the present invention. The semiconductor device illustrated in FIG. 1A includes an oxide semiconductor layer 30 over an insulating layer 20, an insulating layer 50, and a conductive layer 60. A transistor included in the semiconductor device of one embodiment of the present invention includes the oxide semiconductor layer 30, the insulating layer 50, and the conductive layer 60. The insulating layer 50 has a portion located between the oxide semiconductor layer 30 and the conductive layer 60.

[0075] In the transistor of one embodiment of the present invention, the conductive layer 60 functions as a gate electrode, and the insulating layer 50 functions as a gate insulating layer. The oxide semiconductor layer 30 includes a channel formation region 31. The oxide semiconductor layer 30 includes a region that overlaps with the conductive layer 60 with the insulating layer 50 interposed therebetween. At least part of the region functions as the channel formation region 31. Note that the source and drain of the transistor are omitted in FIG. 1A.

[0076] A transistor according to one embodiment of the present invention includes a metal oxide (also referred to as an oxide semiconductor) that functions as a semiconductor in the oxide semiconductor layer 30 including a channel formation region. That is, the transistor can be referred to as an OS transistor.

[0077] When oxygen vacancies and impurities exist in a channel formation region of an oxide semiconductor, the electrical characteristics of an OS transistor tend to fluctuate, and the reliability may be reduced. OH) and generate electrons that serve as carriers. Therefore, if the channel formation region in the oxide semiconductor contains oxygen vacancies, the OS transistor is likely to be normally on. Therefore, it is preferable that the oxygen vacancies and impurities in the channel formation region in the oxide semiconductor be reduced as much as possible. In other words, it is preferable that the carrier concentration in the channel formation region in the oxide semiconductor be reduced and the channel formation region in the oxide semiconductor be made i-type (intrinsic) or substantially i-type.

[0078] Furthermore, when an excessive amount of oxygen is supplied to the oxide semiconductor layer 30, electron traps resulting from the oxygen are formed in the insulating layer 50. This makes the OS transistor more susceptible to positive drift degradation in a +GBT (Gate Bias-Temperature) stress test. In other words, the amount of positive drift degradation in the +GBT stress test increases.

[0079] Therefore, in the semiconductor device of one embodiment of the present invention, the hydrogen concentration in the oxide semiconductor layer 30 is preferably low. Furthermore, an appropriate amount of oxygen is preferably supplied to the oxide semiconductor layer 30. Furthermore, it is preferable to reduce the amount of excess oxygen in the oxide semiconductor layer 30.

[0080] Indium oxide is preferably used as the metal oxide used for the oxide semiconductor layer 30. For example, the oxide semiconductor layer 30 preferably includes an indium oxide film. The indium oxide film preferably includes a channel formation region 31. The higher the ratio of the number of indium atoms to the sum of the numbers of atoms of all metal elements included in the metal oxide, the higher the field-effect mobility of the transistor can be. Therefore, by using indium oxide for the oxide semiconductor layer 30, the transistor can have high on-state current and high frequency characteristics.

[0081] Furthermore, the indium oxide film preferably has crystallinity. For example, the indium oxide film preferably has crystal grains in the channel formation region 31. Specifically, the indium oxide film is preferably a single-crystal film or a polycrystalline film. Since impurities tend to diffuse at grain boundaries, the indium oxide film is more preferably a single-crystal film. Note that the indium oxide film may be an amorphous film containing crystal grains.

[0082] In a crystalline film, for example, crystal grains can be confirmed in a high-resolution transmission electron microscope (TEM) image. In addition, in a crystalline film, for example, crystal grain boundaries can sometimes be confirmed in a high-resolution TEM image. That is, crystal grains and crystal grain boundaries can sometimes be observed in a high-resolution TEM image of a crystalline film. The total magnification when acquiring a TEM image is preferably 2,000,000 times or more, and more preferably 4,000,000 times or more.

[0083] 1A illustrates a structure in which the oxide semiconductor layer 30 includes a single-crystal indium oxide film. When the indium oxide film is a single-crystal film, the indium oxide film has one crystal grain, and no crystal grain boundary is observed throughout the oxide semiconductor layer 30. That is, no crystal grain boundary is observed in the channel formation region. With such a structure, carrier scattering at the crystal grain boundary can be suppressed, and a transistor with high field-effect mobility can be realized. In addition, a highly reliable transistor can be realized.

[0084] 1B shows a configuration example in which the oxide semiconductor layer 30 includes a polycrystalline indium oxide film. In FIG. 1B, the indium oxide film has a plurality of crystal grains 32, and crystal grain boundaries 33 are observed between the crystal grains 32. Note that in FIG. 1B, the crystal grain boundaries are indicated by dashed lines.

[0085] When the indium oxide film is a polycrystalline film, it is preferable that one of the crystal grains 32 has a portion located in the channel formation region 31, and further, no crystal grain boundary is observed in the channel formation region 31. Even with this configuration, it is possible to achieve the same effects as with a configuration in which the indium oxide film is a single crystal film.

[0086] When the channel formation region 31 is contained in one crystal grain 32, the indium oxide film in the channel formation region 31 can be said to be single crystal.

[0087] 1C shows another example of a structure in which the oxide semiconductor layer 30 includes a polycrystalline indium oxide film. In FIG. 1C, the indium oxide film includes a plurality of crystal grains 32, and two crystal grains 32 (a first crystal grain and a second crystal grain) are located in the channel formation region 31.

[0088] Here, it is preferable that the crystal orientation of the first crystal grains and the crystal orientation of the second crystal grains are the same or approximately the same. If the crystal orientation of the first crystal grains and the crystal orientation of the second crystal grains are the same or approximately the same, a crystal grain boundary may not be observed at the boundary between the first crystal grains and the second crystal grains (dotted line shown in Figure 1(C)). By making the crystal orientation of the first crystal grains and the crystal orientation of the second crystal grains the same or approximately the same, the formation of a crystal grain boundary between the first crystal grains and the second crystal grains can be suppressed. Therefore, even with this configuration, the same effect as with a configuration in which the indium oxide film is a single crystal film can be achieved. Note that the fact that the crystal orientation of the first crystal grains and the crystal orientation of the second crystal grains are the same or approximately the same can sometimes be confirmed, for example, by a high-resolution TEM image. Specifically, in a high-resolution TEM image, it can be confirmed that the lattice fringes of the first crystal grains and the lattice fringes of the second crystal grains are continuously connected at the boundary between the first crystal grains and the second crystal grains.

[0089] In this specification, the term "grain boundary" refers to, for example, a boundary between adjacent crystal grains with different crystal orientations. Therefore, in this specification, the term "grain boundary" does not include a boundary between adjacent crystal grains with the same crystal orientation. For example, even if a boundary between two crystal grains is observed in a high-resolution TEM image, if the crystal orientations of the two crystal grains are the same or nearly the same, the boundary may not be called a grain boundary.

[0090] The degree of polycrystallinity of an indium oxide film can be evaluated by the grain size of the crystal grains. The grain size can be calculated, for example, by calculating the area of ​​the crystal grain and assuming a perfect circle corresponding to the calculated area as the diameter of the circle. The diameter in this case is sometimes called the area-equivalent diameter or the like.

[0091] The degree of polycrystallinity of an indium oxide film can also be evaluated by the extension length of the grain boundaries. Details will be explained in the Examples, but the extension length of the grain boundaries can be calculated, for example, by extracting a field of view of a specific area from a TEM image of the film acquired at a total magnification at which the grain boundaries can be observed, and calculating the total length of the grain boundaries observed in that field of view. An indium oxide film with a grain boundary extension length of 0 nm can be considered a single-crystal film. Furthermore, the longer the extension length of the grain boundaries, the more grain boundary components there are.

[0092] The extension length of the grain boundaries in the indium oxide film is preferably 0 nm to 15,000 nm, more preferably 0 nm to 10,000 nm, and even more preferably 0 nm to 8,000 nm. The extension length of the grain boundaries in the indium oxide film is preferably 0 nm to 1,500 nm, more preferably 0 nm to 1,000 nm, and even more preferably 0 nm to 800 nm. When the oxide semiconductor layer 30 includes an indium oxide film having an extension length of the grain boundaries within the above range, any of the structures shown in FIGS. 1A to 1C can be realized. Note that unless otherwise specified in this specification, the area of ​​the field of view used to calculate the extension length of the grain boundaries is 90 nm square.

[0093] The thickness of the oxide semiconductor layer 30 is preferably 2 nm to 50 nm, more preferably 2.5 nm to 30 nm, even more preferably 2.5 nm to 20 nm, even more preferably 5 nm to 20 nm, and even more preferably 5 nm to 10 nm. It is sufficient that at least a portion of the oxide semiconductor layer 30 has a region with the above-described thickness. For example, the channel formation region of the oxide semiconductor layer 30 may have a region with the above-described thickness.

[0094] Setting the film thickness of the oxide semiconductor layer 30 within the above range can improve the crystallinity of the oxide semiconductor layer 30. By improving the crystallinity of the oxide semiconductor layer 30, the oxide semiconductor layer 30 can have crystal grains.

[0095] When a metal oxide contains indium and zinc, the metal oxide may have high crystallinity, for example, a c-axis aligned crystalline (CAAC) structure. The CAAC structure has fewer grain boundaries in the ab plane than a polycrystalline structure. Examples of metal oxides containing indium and zinc include indium zinc oxide (In-Zn oxide, also referred to as IZO (registered trademark)) and indium gallium zinc oxide (In-Ga-Zn oxide, also referred to as IGZO).

[0096] In oxide semiconductor layers with high crystallinity, an indium oxide film is a film through which one or both of hydrogen and oxygen move more easily than, for example, an IGZO film. Therefore, it can be said that an indium oxide film is a film through which one or both of hydrogen and oxygen are more easily supplied and from which one or both of hydrogen and oxygen are more easily discharged than, for example, an IGZO film. Note that it can be said that an indium oxide film is a film that is more permeable to one or both of hydrogen and oxygen than, for example, an IGZO film. In other words, it can be said that an indium oxide film is a film that has a lower barrier property against one or both of hydrogen and oxygen than, for example, an IGZO film.

[0097] Although the details will be described in Examples, the indium oxide film of this embodiment has a temperature of 400° C. and a treatment time of 8 hours, and the oxygen concentration is 1×10 20 atoms / cm 3 Over 2×10 21 atoms / cm 3 Less than or equal to 2 x 10 20 atoms / cm 3 More than 1×10 21 atoms / cm 3 It has the property of transmitting the following:

[0098] In addition, the indium oxide film of this embodiment can be heated to a temperature of 400° C. for 8 hours to form a film of 1×10 20 atoms / cm 3 Over 2×10 21 atoms / cm 3 Less than or equal to 2 x 10 20 atoms / cm 3 More than 1×10 21 atoms / cm 3 The following oxygen has the property of diffusing within the crystal grains.

[0099] Oxygen in the indium oxide film diffuses through the grains and grain boundaries, and V present in the grains or grain boundaries O and V O H can be reduced. Therefore, it is possible to prevent the transistor from becoming normally on. This means that it is possible, in principle, to eliminate the negative shift in the threshold voltage of the transistor.

[0100] In addition, although details will be described in Examples, the indium oxide film of this embodiment is heated at a temperature of 200° C. for 8 hours, and is then heated to a temperature of 200° C. for 8 hours. 2 H) The integral value of the diffusion amount is 5 × 10 12 atoms / cm 2 More than 1×10 14 atoms / cm 2 or less, or 1 x 10 13 atoms / cm 2 Over 8 x 1013 atoms / cm 2 It has the following properties:

[0101] In addition, the indium oxide film of this embodiment has a deuterium diffusion amount integral of 5×10 12 atoms / cm 2 More than 1×10 14 atoms / cm 2 or less, or 1 x 10 13 atoms / cm 2 Over 8 x 10 13 atoms / cm 2 The following deuterium has the property of diffusing within the crystal grains.

[0102] The hydrogen in the indium oxide film diffuses through the crystal grains and the grain boundaries, and the hydrogen present in the crystal grains or the grain boundaries can be reduced by, for example, heat treatment, etc. Therefore, the transistor can be prevented from becoming normally on. This means that the negative shift of the threshold voltage of the transistor can be theoretically eliminated.

[0103] The permeability of the membrane to oxygen and hydrogen can be evaluated by calculation using a method called Nudged Elastic Band (NEB). Specifically, the permeability can be evaluated by calculating the migration barrier of oxygen and hydrogen atoms using the NEB method. The smaller the migration barrier value, the easier it is for the atoms to move (permeate).

[0104] An example of the calculation results is shown in Table 1. In2O3 shown in Table 1 is a crystal model of indium oxide, and IGZO shown in Table 1 is a crystal model of In-Ga-Zn oxide. Note that excess oxygen shown in Table 1 refers to an amount of oxygen in excess of the stoichiometric composition.

[0105] [Table 1]

[0106] From Table 1, the barriers to the movement of oxygen, hydrogen, and excess oxygen are large in the crystal model of In-Ga-Zn oxide, and small in the crystal model of indium oxide. This suggests that oxygen and hydrogen move more easily (permeate more easily) in an indium oxide film than in an In-Ga-Zn oxide film. It also suggests that an indium oxide film has higher permeability to oxygen atoms and hydrogen atoms than an In-Ga-Zn oxide film. Therefore, it is presumed that an indium oxide film is a film into which hydrogen and oxygen are easily supplied and from which hydrogen and oxygen are easily discharged. In addition, the V that occurred in the +GBT test O It is expected that this will have the effect of filling the gap with oxygen, thereby enabling the realization of highly reliable transistors.

[0107] The crystallinity of the oxide semiconductor layer 30 can be analyzed by, for example, X-ray diffractometry (XRD), transmission electron microscopy (TEM), or electron diffraction (ED). Alternatively, the analysis may be performed by combining a plurality of these techniques.

[0108] The content of the first element in the oxide semiconductor layer 30 is preferably low. The concentration of the first element in the oxide semiconductor layer 30 is also preferably low. In particular, the concentration of the first element in the channel formation region is preferably low. Here, the first element is at least one of boron, carbon, aluminum, zinc, and gallium. That is, in the oxide semiconductor layer 30, the concentration of any one of boron, carbon, aluminum, zinc, and gallium is preferably low, the concentrations of two selected from boron, carbon, aluminum, zinc, and gallium are more preferably low, and the concentrations of all of boron, carbon, aluminum, zinc, and gallium are even more preferably low. The concentration of the first element in the oxide semiconductor layer 30 is preferably 1 atomic % or less, more preferably 0.1 atomic % or less, and even more preferably 0.01 atomic % (100 ppm) or less. The preferred concentration of the first element in the oxide semiconductor layer 30 can also be said to be the preferred concentration of the first element in the channel formation region.

[0109] By reducing the concentrations of boron, carbon, and aluminum in the oxide semiconductor layer 30, the crystallinity of the oxide semiconductor layer 30 can be improved.

[0110] When the oxide semiconductor layer 30 contains gallium atoms, the gallium atoms bond with excess oxygen atoms to form a Ga-O structure. The Ga-O structure functions as an acceptor that traps electrons. Therefore, a transistor having an oxide semiconductor layer 30 containing gallium atoms and excess oxygen atoms exhibits a large variation in threshold voltage in a PBTS (Positive Bias Temperature Stress) test. Therefore, by reducing the gallium concentration in the oxide semiconductor layer 30, the variation in threshold voltage in the PBTS test can be reduced. This results in a transistor with high reliability against positive bias application. Note that when the oxide semiconductor layer 30 contains zinc atoms, the same phenomenon as when it contains gallium atoms can occur.

[0111] The concentration of the first element can be evaluated using, for example, inductively coupled plasma-mass spectrometry (ICP-MS), XPS, SIMS, time-of-flight secondary ion mass spectrometry (ToF-SIMS), Auger electron spectroscopy (AES), energy dispersive X-ray spectroscopy (EDX), inductively coupled plasma-atomic emission spectroscopy (ICP-AES), or the like.

[0112] The band gap of indium oxide is greater than or equal to 2.5 eV and less than or equal to 3.7 eV. By using indium oxide with a wide band gap for the oxide semiconductor layer 30, the off-state current of the transistor can be reduced, and the power consumption of the semiconductor device can be sufficiently reduced.

[0113] An OS transistor is an accumulation-mode transistor that uses electrons as the majority carriers. That is, the carriers in an OS transistor are electrons. Assuming that the carrier relaxation time is constant, the smaller the effective mass of the electrons (carriers), the higher the electron mobility (carrier mobility). In other words, by using a metal oxide film with a small effective mass of electrons as the semiconductor layer of a transistor, the on-state current or field-effect mobility of the transistor can be increased.

[0114] Here, the effective mass of an electron in a semiconductor material (m * e ), the effective mass of the hole (m * h The values ​​of the semiconductor materials shown in Table 2 are indium oxide (here, In2O3), In-Ga-Zn oxide (IGZO), and silicon (Si). * e and m* h is a value calculated by first-principles electronic structure calculation, and Eg shown in Table 2 is a value calculated by actual measurement. Note that Eg of silicon in Table 2 shows a representative actual measurement value.

[0115] [Table 2]

[0116] As shown in Table 2, the effective mass of electrons in indium oxide is small. Therefore, by using indium oxide, which has a small effective mass of electrons, for the oxide semiconductor layer 30, a transistor with a large on-state current, a transistor with high field-effect mobility, and a transistor with high frequency characteristics (also referred to as f characteristics) can be realized. Furthermore, the effective mass of electrons in indium oxide is smaller than the effective mass of electrons in, for example, silicon. Therefore, in terms of the effective mass of electrons, the f characteristics of a transistor using indium oxide in a channel formation region are higher than the f characteristics of a Si transistor.

[0117] As shown in Table 2, the effective mass of holes in indium oxide is large. Therefore, by using indium oxide, which has a large effective mass of holes, for the oxide semiconductor layer 30, a transistor with an extremely small off-state current can be realized. Furthermore, the effective mass of holes in indium oxide is larger than the effective mass of holes in, for example, silicon. Therefore, in terms of the effective mass of holes, the off-state current of a transistor using indium oxide for a channel formation region is sufficiently smaller than the off-state current of a Si transistor.

[0118] In a transistor using indium oxide for the oxide semiconductor layer 30, the off-state current per 1 μm of channel width at room temperature is 1×10 -17 A / μm or less, preferably 1×10 -18 A / μm or less, preferably 1×10 -19 It is possible to reduce the off-state current at 85°C per 1 μm of channel width to 1×10 -16 A / μm or less, preferably 1×10 -17A / μm or less, preferably 1×10 -18 It is possible to make it less than A / μm.

[0119] Furthermore, miniaturization of an OS transistor can improve the high-frequency characteristics of the transistor. For example, the cutoff frequency of the transistor can be improved. Specifically, the cutoff frequency of the transistor can be increased to 50 GHz or higher, preferably 100 GHz or higher, and more preferably 150 GHz or higher at room temperature.

[0120] Carriers tend to flow in a region of the oxide semiconductor layer 30 from the surface on the insulating layer 50 side to a depth of 1 nm. Therefore, the channel formation region 31 is a region of the oxide semiconductor layer 30 that overlaps with the conductive layer 60 and is at a depth of 1 nm or less from the surface on the insulating layer 50 side. The channel formation region 31 is also a region of the oxide semiconductor layer 30 that overlaps with the conductive layer 60 and is at a depth of 1 nm or less from the interface with the insulating layer 50.

[0121] The interface between the oxide semiconductor layer 30 and the insulating layer 50 can be confirmed by, for example, a cross-sectional TEM image, a cross-sectional scanning transmission electron microscope (STEM) image, etc. The interface between the oxide semiconductor layer 30 and the insulating layer 50 can sometimes be confirmed by using SIMS or by performing line analysis of the composition by EDX on the interface between the oxide semiconductor layer 30 and the insulating layer 50 and its surroundings.

[0122] For example, EDX line analysis is performed on the interface and its periphery, with the direction perpendicular to the surface on which the oxide semiconductor layer 30 is formed as the depth direction. Next, in the profile of the quantitative values ​​of each element in the depth direction obtained by this analysis, the depth at which the quantitative value of a metal (e.g., aluminum) that is the main component of the insulating layer 50 but is not the main component of the oxide semiconductor layer 30 becomes half-value can be defined as the interface. Alternatively, in the profile of the quantitative values ​​of each element in the depth direction obtained by this analysis, the depth at which the quantitative value of a metal (e.g., indium) that is the main component of the oxide semiconductor layer 30 but is not the main component of the insulating layer 50 becomes half-value can be defined as the interface.

[0123] The indium oxide film may contain one or more metal elements having a large period number in the periodic table, provided that the film has crystallinity. The greater the overlap of the orbitals of the metal elements, the greater the carrier conduction tends to be. Therefore, by including a metal element having a large period number in the periodic table, the field-effect mobility of the transistor may be improved. Examples of metal elements having a large period number in the periodic table include metal elements belonging to the fifth period and the sixth period. Specific examples of such metal elements include yttrium, zirconium, silver, cadmium, tin, antimony, barium, lead, bismuth, and light rare earth elements (lanthanum, cerium, praseodymium, neodymium, promethium, samarium, and europium).

[0124] For example, the indium oxide film preferably contains antimony. For example, the antimony concentration in the indium oxide film is 1×10 17 atoms / cm 3 Over 8 x 10 21 atoms / cm 3 Less than 1×10 is preferred 17 atoms / cm 3 3x10 or more 20 atoms / cm 3 Less than 1×10 is preferable. 17 atoms / cm 3 More than 1×10 19 atoms / cm3 The content is preferably 0.0002 atomic % or more and 10 atomic % or less, more preferably 0.0002 atomic % or more and 0.5 atomic % or less, and even more preferably 0.0002 atomic % or more and 0.013 atomic % or less. The above-mentioned preferable ranges also apply to the case where the indium oxide film contains any of the above metal elements other than antimony.

[0125] Here, one of the insulating layer 20 and the insulating layer 50 is called a first insulating layer, and the other of the insulating layer 20 and the insulating layer 50 is called a second insulating layer.

[0126] The first insulating layer preferably has a function of supplying oxygen to the oxide semiconductor layer 30. The first insulating layer preferably has a region containing oxygen that is desorbed by heating (hereinafter, may be referred to as excess oxygen), for example. When the insulating layer having the region containing excess oxygen is in contact with the oxide semiconductor layer 30, oxygen can be supplied to the oxide semiconductor layer 30. The oxygen supplied to the oxide semiconductor layer 30 repairs oxygen vacancies, thereby reducing the amount of oxygen vacancies in the oxide semiconductor layer 30. Examples of insulating materials that easily form a region containing excess oxygen include silicon oxide, silicon oxynitride, and silicon oxide having vacancies.

[0127] The second insulating layer preferably has a function of capturing or fixing (also referred to as gettering) oxygen. As described above, an indium oxide film is a film through which oxygen easily moves. Therefore, when the second insulating layer has the function of capturing or fixing oxygen, excess oxygen in the oxide semiconductor layer 30 diffuses to the second insulating layer, and the oxygen can be captured or fixed. Therefore, the OS transistor can suppress positive drift degradation in a +GBT stress test due to oxygen. Examples of insulating materials having a function of capturing or fixing oxygen include aluminum oxide, hafnium oxide, hafnium zirconium oxide, and oxides containing hafnium and silicon (hafnium silicate).

[0128] Note that the aluminum oxide film, the hafnium oxide film, the hafnium zirconium oxide film, and the hafnium silicate film have the function of capturing or fixing hydrogen. As described above, the indium oxide film is a film through which hydrogen easily moves. Therefore, when the second insulating layer has the function of capturing or fixing hydrogen, hydrogen in the oxide semiconductor layer 30 diffuses into the second insulating layer, and the hydrogen can be captured or fixed. Therefore, the hydrogen concentration in the oxide semiconductor layer 30 (particularly, the hydrogen concentration in the channel formation region 31) can be reduced. Therefore, the V in the channel formation region O By reducing H, the channel forming region can be made i-type or substantially i-type.

[0129] The conductive layer 60 is preferably made of a highly conductive material such as tungsten. Furthermore, it is preferable to use a conductive material that is resistant to oxidation or a conductive material that has the function of suppressing oxygen diffusion as the conductive layer 60. Examples of such conductive materials include conductive materials containing nitrogen (e.g., titanium nitride or tantalum nitride) and conductive materials containing oxygen (e.g., ruthenium oxide). This can prevent the conductivity of the conductive layer 60 from decreasing.

[0130] The conductive layer 60 is preferably made of a conductive material containing oxygen and a metal element contained in the metal oxide in which the channel is formed. Alternatively, a conductive material containing nitrogen (e.g., titanium nitride or tantalum nitride) may be used. Alternatively, one or more selected from indium tin oxide (In-Sn oxide, also referred to as ITO), indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, In-Zn oxide, and indium tin oxide containing silicon oxide (also referred to as ITSO) may be used. Alternatively, indium gallium zinc oxide containing nitrogen may be used. Using such a material may allow hydrogen contained in the metal oxide in which the channel is formed to be captured. Alternatively, hydrogen introduced from an outer insulating layer may be captured.

[0131] As shown in FIG. 1(D), an oxide layer 27 can be provided between the insulating layer 20 and the oxide semiconductor layer 30. The oxide layer 27 has a region overlapping with the insulating layer 50 with the oxide semiconductor layer 30 sandwiched therebetween. The oxide semiconductor layer 30 is provided on the oxide layer 27 and has a region in contact with the oxide layer 27. The oxide layer 27 is a layer that causes crystal grains contained in the oxide semiconductor layer 30 to grow from below or does not inhibit the crystal grains contained in the oxide semiconductor layer 30 from growing from above. When the oxide layer 27 has a function of causing crystal grains contained in the oxide semiconductor layer 30 to grow from below, the oxide layer 27 can be called a seed layer.

[0132] The crystal structure of indium oxide is a cubic system (bixbyite type), and the lattice constant of this crystal structure is 1.0117 nm (see ICSD (Inorganic Crystal Structure Database) coll.code.14387).

[0133] When indium oxide is used for the oxide semiconductor layer 30, it is preferable that the oxide layer 27 be made of an oxide having a cubic crystal structure. When the oxide layer 27 has the same crystal structure as the oxide semiconductor layer 30, the oxide semiconductor layer 30 can grow epitaxially using the oxide layer 27 as a nucleus, thereby improving the crystallinity of the oxide semiconductor layer 30. For example, zirconium oxide or yttria-stabilized zirconia (YSZ) can be used for the oxide layer 27. The crystal structures of zirconium oxide and YSZ are both cubic. When the oxide semiconductor layer 30 and the oxide layer 27 have the same crystal structure, the crystal orientation of the surface of the oxide layer 27 is not particularly limited. For example, it may be

[0100] ,

[0110] , or

[0111] .

[0134] In this specification, space groups are expressed using short notation in international notation (or Hermann-Mauguin notation). Crystal planes and crystal orientations are expressed using Miller indices. In crystallography, space groups, crystal planes, and crystal orientations are expressed by adding a superscript bar to the number; however, in this specification, due to formatting constraints, numbers may be expressed by adding a minus sign (-) before them instead of adding a bar above them. Individual orientations indicating directions within a crystal are expressed with [ ], collective orientations indicating all equivalent orientations are expressed with < >, individual planes indicating crystal planes are expressed with ( ), and collective planes with equivalent symmetry are expressed with {}.

[0135] Note that the yttria-stabilized zirconia (YSZ) described in this specification includes oxides containing yttrium and zirconium. Therefore, the yttria-stabilized zirconia (YSZ) described in this specification can be rephrased as zirconium oxide containing yttrium or yttrium zirconium oxide.

[0136] It is preferable that the difference (also referred to as lattice mismatch) between the lattice constant or unit lattice vector of the crystal of the oxide layer 27 and the lattice constant or unit lattice vector of the crystal of the oxide semiconductor layer 30 is small. By using an oxide that reduces the lattice mismatch for the oxide layer 27, the crystallinity of the oxide semiconductor layer 30 can be improved.

[0137] One method for evaluating the degree of lattice mismatch is to use the lattice mismatch value shown below. The lattice mismatch Δa [%] of the crystals of the formed film (here, an indium oxide film) with respect to the crystals of the seed layer is calculated using the following formula (1). Hereinafter, the lattice mismatch Δa of the crystals of the formed film with respect to the crystals of the seed layer may be simply referred to as the lattice mismatch Δa of the formed film with respect to the seed layer.

[0138]

number

[0139] In formula (1), L1 is the lattice constant or the length of the unit lattice vector of the crystal of the formed film, and L2 is the lattice constant or the length of the unit lattice vector of the crystal of the seed layer.

[0140] The lattice mismatch Δa of the crystal grains of the oxide semiconductor layer 30 with respect to the crystal grains of the oxide layer 27 is preferably −10% to 10%, more preferably −5% to 5%, and even more preferably −3% to 3%. By using a material that reduces the lattice mismatch with the oxide semiconductor layer 30 for the oxide layer 27, the crystallinity of the oxide semiconductor layer 30 can be improved.

[0141] For example, Zr 0.9 Y 0.1 O 1.95 The lattice constant of the indium oxide crystal (fluorite type) is 0.51481 nm (see ICSD coll. code. 248790). Therefore, the lattice mismatch of the indium oxide crystal with the YSZ crystal is -1.74%. Therefore, when indium oxide is used for the oxide semiconductor layer 30, YSZ can be suitably used for the oxide layer 27. Note that YSZ contains yttrium, zirconium, and oxygen. The content of yttrium in YSZ is 2 atomic % or more and 15 atomic % or less, preferably 5 atomic % or more and 10 atomic % or less.

[0142] When YSZ is used as the oxide layer 27 and indium oxide is used as the oxide semiconductor layer 30, a buffer layer containing indium and zirconium may be formed at the interface between the oxide layer 27 and the oxide semiconductor layer 30. Because the ionic radii of indium and zirconium are different, it is presumed that the lattice constant or unit cell vector of the crystal of the buffer layer will be a value between the lattice constant or unit cell vector of the YSZ crystal and the lattice constant or unit cell vector of the indium oxide crystal. Therefore, by forming the buffer layer, it is possible to reduce the lattice mismatch between the oxide layer 27 and the oxide semiconductor layer 30, thereby improving the crystallinity of the oxide semiconductor layer 30.

[0143] The crystal orientation of the oxide layer 27 and the crystal orientation of the oxide semiconductor layer 30 may not necessarily be the same. For example, the oxide layer 27 having a layered crystal structure may be provided under indium oxide having a cubic crystal structure. Specifically, when a film having hexagonal or trigonal crystal structure is used as the oxide layer 27, a certain crystal orientation relationship can be satisfied by setting the crystal orientation of the surface of the oxide layer 27 to

[0001] and the crystal orientation of the lower surface of the oxide semiconductor layer 30 to

[0111] . When the crystal orientation of the surface of the oxide layer 27 is

[0001] , the c-axis of the crystal of the oxide layer 27 is perpendicular or approximately perpendicular to the surface of the oxide layer 27 or the surface on which it is formed. Examples of hexagonal or trigonal crystal structures include wurtzite, YbFe2O4, Yb2Fe3O7, and modified versions thereof. An example of a crystal having a YbFe2O4 type or Yb2Fe3O7 type is IGZO. Note that the above can be considered as a structure in which an oxide semiconductor layer having cubic crystals is formed on an oxide layer having a layered crystal structure. In other words, it can also be considered as a layered structure fabricated using heteroepitaxial growth technology or a technology similar to heteroepitaxial growth.

[0144] Specifically, zinc oxide, indium gallium oxide (also referred to as In-Ga oxide), gallium zinc oxide (Ga-Zn oxide, also referred to as GZO), aluminum zinc oxide (Al-Zn oxide, also referred to as AZO), indium aluminum zinc oxide (In-Al-Zn oxide, also referred to as IAZO), In-Ga-Zn oxide, or indium tin zinc oxide (In-Sn-Zn oxide) can be used for oxide layer 27. When In-Ga-Zn oxide is used for oxide layer 27, oxide layer 27 contains indium, gallium, and zinc.

[0145] As described above, if the oxide semiconductor layer 30 contains gallium atoms, the reliability of the transistor may be reduced. Therefore, when an oxide containing gallium, such as In-Ga-Zn oxide, is used as the oxide layer 27, it is preferable to provide a layer 28 between the oxide layer 27 and the oxide semiconductor layer 30 (see FIG. 1(E)).

[0146] Layer 28 preferably contains a metal that has a stronger bond with oxygen than indium. For example, aluminum oxide is preferably used as layer 28. In this case, layer 28 contains aluminum and oxygen. As described above, aluminum oxide is also an insulating material that has the function of capturing or fixing oxygen. By providing layer 28 containing aluminum oxide, it is possible to prevent gallium contained in oxide layer 27 from diffusing into oxide semiconductor layer 30. Furthermore, excessive oxygen in oxide semiconductor layer 30 can diffuse into layer 28 and be captured or fixed.

[0147] It is preferable that layer 28 has a small thickness. For example, layer 28 preferably has a region whose thickness is equal to or greater than 1 and equal to or less than 5 atomic layers, and more preferably has a region whose thickness is equal to or greater than 1 and equal to or less than 3 atomic layers. By reducing the thickness of layer 28, it is possible to form oxide semiconductor layer 30 having crystal grains that reflect the crystal structure of oxide layer 27.

[0148] When the layer 28 is provided, the film thickness of the layer 28 is so thin that it may be difficult to clearly detect the boundary between the oxide layer 27 and the layer 28 and the boundary between the layer 28 and the oxide semiconductor layer 30. The presence or absence of the boundary between the layers can be confirmed by, for example, cross-sectional TEM, cross-sectional STEM, or the like.

[0149] Note that the material used for the oxide layer 27 is not limited to oxide as long as the lattice mismatch with the oxide semiconductor layer 30 is small. For example, a silicon-based semiconductor, such as single-crystal silicon, may be used for the oxide layer 27. The lattice mismatch of indium oxide crystal with single-crystal silicon is 3.3%. Therefore, when indium oxide is used for the oxide semiconductor layer 30, silicon may be used for the oxide layer 27.

[0150] Figure 2(A1) shows an In2O3 crystal (bixbyite type) viewed from a direction parallel to the (100) plane, Figure 2(A2) shows a single crystal silicon viewed from a direction parallel to the (100) plane, Figure 2(B1) shows an In2O3 crystal viewed from a direction parallel to the (111) plane, and Figure 2(B2) shows a single crystal silicon viewed from a direction parallel to the (111) plane.

[0151] Figure 2(C1) shows an In2O3 crystal (bixbyite type) viewed from a direction parallel to the (100) plane, Figure 2(C2) shows a beta-type Ga2O3 crystal (monoclinic system) viewed from a direction parallel to the (100) plane, Figure 2(D1) shows an In2O3 crystal viewed from a direction parallel to the (111) plane, and Figure 2(D2) shows a beta-type Ga2O3 crystal viewed from a direction parallel to the (100) plane. The lattice mismatch of the (100) plane of the indium oxide crystal with respect to the beta-type Ga2O3 crystal is -4.9% at a' and 4.7% at b'. The lattice mismatch of the (111) plane of the indium oxide crystal with respect to the beta-type Ga2O3 crystal is 1.9% at a' and -1.3% at b'. Therefore, when indium oxide is used for the oxide semiconductor layer 30, gallium oxide may be used for the oxide layer 27. Note that a' and b' are the lattice constants of the superlattice of the beta-type Ga2O3 crystal at the junction surface (superlattice) between the indium oxide crystal and the beta-type Ga2O3 crystal.

[0152] There is no particular limitation on the material that can be used for the oxide layer 27. The oxide layer 27 may be made of an insulating material or a semiconductor material. When an insulating material is used for the oxide layer 27, the oxide layer 27 may be considered as part of the insulating layer 20. When a semiconductor material is used for the oxide layer 27, the oxide layer 27 may be considered as part of the oxide semiconductor layer 30.

[0153] The oxide layer 27 preferably has a small thickness. For example, the oxide layer 27 is preferably thinner than the oxide semiconductor layer 30. When the oxide semiconductor layer 30 is in contact with a source electrode or a drain electrode via the oxide layer 27, an increase in contact resistance between the oxide semiconductor layer 30 and the source electrode or the drain electrode can be suppressed. Specifically, the oxide layer 27 preferably has a region with a thickness of 0.1 nm or more and less than 2 nm, and more preferably has a region with a thickness of 0.5 nm or more and less than 2 nm.

[0154] 1A shows an example in which the oxide semiconductor layer 30 has a single-layer structure. Note that the oxide semiconductor layer 30 can have a stacked structure of two or more layers. FIG. 1F shows an example in which the oxide semiconductor layer 30 has a two-layer structure including an oxide semiconductor layer 30a and an oxide semiconductor layer 30b over the oxide semiconductor layer 30a. The oxide semiconductor layer 30a is in contact with the insulating layer 20, and the oxide semiconductor layer 30b is in contact with the insulating layer 50.

[0155] 1(F), it is preferable to use a metal oxide (typically indium oxide) applicable to the oxide semiconductor layer 30 as the oxide semiconductor layer 30a, and an oxide semiconductor having a conduction band minimum located closer to the vacuum level than the conduction band minimum of the oxide semiconductor layer 30a as the oxide semiconductor layer 30b. In this case, the oxide semiconductor layer 30a can mainly function as a current path (channel). That is, the oxide semiconductor layer 30a has a channel formation region 31 on the surface on the oxide semiconductor layer 30b side and in the vicinity thereof.

[0156] The above-described configuration can reduce carriers trapped at and near the interface between the oxide semiconductor layer 30a and the oxide semiconductor layer 30b. In addition, the channel can be located away from the surface of the insulating layer 50, reducing the influence of surface scattering. This can increase the field-effect mobility of the transistor.

[0157] Furthermore, when the oxide layer 27 is formed using a semiconductor material, the oxide semiconductor layer 30a is sandwiched between the oxide layer 27 and the oxide semiconductor layer 30b, both of which have a large band gap, and the oxide semiconductor layer 30a functions mainly as a current path (channel). By sandwiching the oxide semiconductor layer 30a between the oxide layer 27 and the oxide semiconductor layer 30b, it is possible to reduce trap states at and near the interface between the oxide semiconductor layer 30a and the oxide semiconductor layer 30b, and at and near the interface between the oxide semiconductor layer 30a and the oxide layer 27. This allows for the realization of a buried channel transistor in which the channel is spaced away from the insulating layer interface, thereby increasing field-effect mobility. Furthermore, the influence of interface states that may form on the back channel side is reduced, suppressing photodegradation (e.g., photodegradation due to negative bias current) of the transistor and improving its reliability.

[0158] Furthermore, it is preferable that the oxide semiconductor layer 30b be made of a material with high oxygen permeability. This configuration allows excess oxygen in the oxide semiconductor layer 30a to be discharged to the insulating layer 50. By reducing the thickness of the oxide semiconductor layer 30b, the oxygen permeability of the oxide semiconductor layer 30b increases. Therefore, the same effect can be achieved even when the thickness of the oxide semiconductor layer 30b is reduced. The thickness of the oxide semiconductor layer 30b is, for example, 0.1 nm to 3 nm, preferably 0.1 nm to 2 nm, more preferably 0.1 nm to 1 nm, and even more preferably 0.1 nm to 0.5 nm.

[0159] Examples of metal oxides that can be used for the oxide semiconductor layer 30b include In-Ga oxide, In-Zn oxide, ITO, indium titanium oxide (In-Ti oxide), In-Al-Zn oxide, In-Ga-Zn oxide, In-Sn-Zn oxide, indium titanium zinc oxide (In-Ti-Zn oxide), and ITSO. Alternatively, zinc oxide, aluminum zinc oxide (Al-Zn oxide, also referred to as AZO), and aluminum tin oxide (Al-Sn oxide) can be used.

[0160] The In-Zn oxide used in the oxide semiconductor layer 30b can have a composition of In:Zn=1:1 (atomic ratio) or a similar composition, an In:Zn=2:1 (atomic ratio) or a similar composition, or an In:Zn=4:1 (atomic ratio) or a similar composition. The IGZO used in the oxide semiconductor layer 30b can have a composition of In:Ga:Zn=1:1:1 (atomic ratio) or a similar composition, an In:Ga:Zn=1:3:2 (atomic ratio) or a similar composition, or an In:Ga:Zn=1:3:4 (atomic ratio) or a similar composition. Note that a similar composition includes a range of ±30% of the desired atomic ratio.

[0161] The crystallinity of the metal oxide contained in the oxide semiconductor layer 30b is not particularly limited. For example, the oxide semiconductor layer 30b may contain one or more of an amorphous semiconductor (a semiconductor having an amorphous structure), a single-crystal semiconductor (a semiconductor having a single-crystal structure), or a semiconductor having crystallinity other than single crystal (a microcrystalline semiconductor, a polycrystalline semiconductor, or a semiconductor having a crystalline region in part).

[0162] 1A shows an example in which the insulating layer 20 has a single-layer structure. Note that the insulating layer 20 can have a stacked structure of two or more layers. When the insulating layer 20 has a stacked structure of two or more layers, it is preferable that one of the two or more layers included in the insulating layer 20, which is in contact with the oxide semiconductor layer 30, be made of the insulating material (typically, silicon oxide) that can be used for the insulating layer 20. With such a structure, oxygen can be supplied to the oxide semiconductor layer 30.

[0163] Furthermore, when the insulating material (typically silicon oxide) applicable to the insulating layer 20 described above is used as a layer not in contact with the oxide semiconductor layer 30 among the two or more layers included in the insulating layer 20, it is preferable that the layer in contact with the oxide semiconductor layer 30 has high oxygen permeability. In other words, it is preferable that the layer in contact with the oxide semiconductor layer 30 has low oxygen barrier properties. With such a configuration, oxygen contained in the layer not in contact with the oxide semiconductor layer 30 can be supplied to the oxide semiconductor layer 30.

[0164] Note that reducing the thickness of the layer in contact with the oxide semiconductor layer 30 increases the oxygen permeability of the layer in contact with the oxide semiconductor layer 30. Therefore, the same effect can be achieved even when the thickness of the layer in contact with the oxide semiconductor layer 30 is reduced. The thickness of the layer in contact with the oxide semiconductor layer 30 is, for example, 0.1 nm to 3 nm, preferably 0.1 nm to 2 nm, more preferably 0.1 nm to 1 nm, and even more preferably 0.1 nm to 0.5 nm. In this case, the insulating material described in the "Insulating Layer" section below can be used for the layer in contact with the oxide semiconductor layer 30. For example, gallium oxide can be used.

[0165] FIG. 1A shows an example in which the insulating layer 50 has a single-layer structure. Note that the insulating layer 50 can have a stacked structure of two or more layers. When the insulating layer 50 has a stacked structure of two or more layers, the insulating material (typically, aluminum oxide) that can be used for the insulating layer 50 is preferably used for a layer in contact with the oxide semiconductor layer 30 among the two or more layers included in the insulating layer 50. With such a structure, excess oxygen in the oxide semiconductor layer 30 can be discharged to the insulating layer 50. Furthermore, hydrogen in the oxide semiconductor layer 30 can be captured or fixed.

[0166] As described above, oxygen is pushed into the oxide semiconductor layer 30 from the insulating layer 20 side, reducing the amount of oxygen vacancies in the oxide semiconductor layer 30, and excess oxygen in the oxide semiconductor layer 30 is pulled from the insulating layer 50 side, reducing the amount of excess oxygen in the oxide semiconductor layer 30. Therefore, a semiconductor device with excellent reliability can be provided.

[0167] 1A shows a configuration in which an insulating layer 20, an oxide semiconductor layer 30, an insulating layer 50, and a conductive layer 60 are stacked in a direction perpendicular or substantially perpendicular to a substrate surface (not shown). However, the present invention is not limited to this. For example, as shown in FIG. 1G, the insulating layer 20, the oxide semiconductor layer 30, the insulating layer 50, and the conductive layer 60 can be stacked in a direction parallel or substantially parallel to the substrate surface (not shown).

[0168] 1H, for example, an opening 90 can be provided in the insulating layer 20, and the oxide semiconductor layer 30, the insulating layer 50, and the conductive layer 60 can be concentrically provided in the opening 90. Note that FIG. 1H is a perspective view in which a part of the semiconductor device of one embodiment of the present invention is cut away.

[0169] 1I, for example, a groove 91 can be provided in the insulating layer 20, and the oxide semiconductor layer 30, the insulating layer 50, and the conductive layer 60 can be provided in the groove 91. Note that FIG. 1I is a perspective view in which a part of the semiconductor device of one embodiment of the present invention is cut away.

[0170] [Example of a method for manufacturing a semiconductor device] The insulating layer 20, the oxide semiconductor layer 30, the insulating layer 50, and the conductive layer 60 can be formed by sputtering, chemical vapor deposition (CVD), vacuum deposition, molecular beam epitaxy (MBE), pulsed laser deposition (PLD), atomic layer deposition (ALD), etc. In particular, the insulating layer 20, the oxide semiconductor layer 30, and the insulating layer 50 are preferably formed by the ALD method.

[0171] Unlike film formation methods in which particles emitted from a target or the like are deposited, the ALD method is a film formation method in which a film is formed by a reaction on the surface of a workpiece. Therefore, it is a film formation method that is less affected by the shape of the workpiece and has good step coverage. In particular, the ALD method has excellent step coverage and excellent thickness uniformity, making it suitable for coating the surfaces of openings or grooves with high aspect ratios.

[0172] Some precursors used in the ALD method contain elements such as carbon or chlorine. Therefore, films formed by the ALD method may contain higher amounts of elements such as carbon or chlorine than films formed by other film formation methods. Quantitative analysis of these elements can be performed using XPS or SIMS. When using the ALD method, the amount of carbon and chlorine contained in the film may be lower by employing a high substrate temperature during film formation and / or by performing an impurity removal process, compared to when the ALD method is used without these procedures.

[0173] Examples of the ALD method include a thermal ALD method in which a reaction between a precursor and a reactant is carried out using only thermal energy, and a plasma enhanced ALD (PEALD) method in which a plasma-excited reactant is used.

[0174] ALD film formation systems alternately introduce a first source gas (sometimes called a precursor, precursor, or metal precursor) and a second source gas (sometimes called a reactant, reactant, oxidizer, or non-metal precursor) into a chamber to form a film. The introduction of the source gases can be switched, for example, by switching between the respective switching valves (sometimes called high-speed valves). Furthermore, when introducing the source gases, an inert gas such as nitrogen (N), argon (Ar), or helium (He) may be introduced into the chamber together with the source gas as a carrier gas. The use of a carrier gas prevents the source gas from adsorbing to the inside of the piping and valves, even when the source gas has low volatility or a low vapor pressure, allowing the source gas to be introduced into the chamber. This also improves the uniformity of the film formed, which is preferable.

[0175] Furthermore, the ALD method allows for the deposition of films of any desired composition by simultaneously introducing multiple different precursors, or by controlling the number of cycles for each precursor.

[0176] First, an insulating layer 20 is formed on a structure (not shown). That is, the structure includes a surface on which the insulating layer 20 is to be formed. The surface on which the insulating layer 20 is to be formed may have a flat shape, or may have a convex portion, a convex curved surface, a concave curved surface, a recess, an opening, or the like. For example, when the surface on which the insulating layer 20 is to be formed has a flat shape, the semiconductor device shown in FIG. 1(A) can be formed.

[0177] The insulating layer 20 is preferably formed using an ALD method. A first precursor and a first oxidizing agent can be used to form the insulating layer 20. The first precursor preferably contains silicon. In this case, a silicon oxide film is formed as the insulating layer 20. That is, an oxide film containing a single element other than oxygen is formed. Note that when the first precursor contains silicon, the PEALD method can be used as the ALD method.

[0178] Examples of the silicon-containing precursor that can be used include trisilylamine, bis(diethylamino)silane, tris(dimethylamino)silane, bis(tert-butylamino)silane, and bis(ethylmethylamino)silane.

[0179] The first oxidizing agent can be ozone (O3), oxygen (O2), water (H2O), etc. By using ozone, oxygen, etc. that do not contain hydrogen as the first oxidizing agent, the amount of hydrogen that gets mixed into the insulating layer 20 can be reduced.

[0180] In this specification and the like, unless otherwise specified, when ozone, oxygen, or water is used as an oxidizing agent, it is not limited to the gas or molecular state, but also includes the plasma state, radical state, or ion state.

[0181] The insulating layer 20 can be formed by sputtering in an oxygen-containing atmosphere. By using a sputtering method that does not require the use of hydrogen-containing molecules in the deposition gas, the hydrogen concentration in the insulating layer 20 can be reduced. Furthermore, by forming the insulating layer 20 by sputtering in an oxygen-containing atmosphere, oxygen can be added to the insulating layer 20. Oxygen is supplied from the insulating layer 20 to the channel formation region of the oxide semiconductor layer 30 by heat or the like applied after the formation of the oxide semiconductor layer 30, and oxygen vacancies and V O H can be reduced.

[0182] Heat treatment is preferably performed before forming the oxide semiconductor layer 30. The heat treatment is performed at a temperature of, for example, 250°C or higher and 650°C or lower, preferably 300°C or higher and 500°C or lower, and more preferably 320°C or higher and 450°C or lower.

[0183] The heat treatment is performed in a nitrogen gas or inert gas atmosphere, or an atmosphere containing an oxidizing gas at 10 ppm or more, 1% or more, or 10% or more. For example, when the heat treatment is performed in a mixed atmosphere of nitrogen gas and oxygen gas, the oxygen gas concentration is preferably about 20%. The heat treatment may be performed under reduced pressure. Alternatively, after the heat treatment in the nitrogen gas or inert gas atmosphere, the heat treatment may be performed in an atmosphere containing an oxidizing gas at 10 ppm or more, 1% or more, or 10% or more to compensate for the desorbed oxygen. By performing such heat treatment, impurities such as hydrogen or water contained in the insulating layer 20 or the like can be reduced before the formation of the oxide semiconductor layer 30.

[0184] Furthermore, the gas used in the heat treatment is preferably highly purified. For example, the amount of moisture contained in the gas used in the heat treatment is preferably 1 ppb or less, more preferably 0.1 ppb or less, and even more preferably 0.05 ppb or less. By performing the heat treatment using a highly purified gas, it is possible to prevent moisture and the like from being absorbed into the insulating layer 20 as much as possible.

[0185] Furthermore, it is preferable to perform a process of supplying oxygen before forming the oxide semiconductor layer 30. As a result, oxygen is supplied to the insulating layer 20, and oxygen can be supplied from the insulating layer 20 to the oxide semiconductor layer 30 by heat or the like applied after the formation of the oxide semiconductor layer 30.

[0186] Examples of the treatment for supplying oxygen include heat treatment in an oxygen-containing atmosphere and plasma treatment (including microwave plasma treatment) in an oxygen-containing atmosphere. Alternatively, oxygen may be supplied to the insulating layer 20 by forming an oxide film (preferably a metal oxide film) by sputtering in an oxygen-containing atmosphere. The formed oxide film may be removed immediately or may be left as is. When the formed oxide film is left as is, the oxide film can be used as part of the oxide semiconductor layer 30. Note that the oxygen-containing atmosphere includes not only oxygen gas (O2) but also atmospheres containing a gas of an oxygen-containing compound such as ozone (O3) or dinitrogen monoxide (NO). The substrate temperature during the plasma treatment is set to be equal to or higher than room temperature (25°C) and equal to or lower than 450°C.

[0187] Furthermore, an opening 90 may be formed in the insulating layer 20 before the oxide semiconductor layer 30 is formed. By forming the opening 90, the semiconductor device shown in FIG. 1(H) can be formed. Alternatively, a groove 91 may be formed in the insulating layer 20 before the oxide semiconductor layer 30 is formed. By forming the groove 91, the semiconductor device shown in FIG. 1(I) can be formed.

[0188] Next, the oxide semiconductor layer 30 is formed on the insulating layer 20. The oxide semiconductor layer 30 is preferably formed by ALD. A second precursor and a second oxidizing agent can be used to form the oxide semiconductor layer 30. The second precursor preferably contains indium. In this case, an indium oxide film is formed as the oxide semiconductor layer 30. That is, an oxide film containing a single element other than oxygen is formed. Note that when the second precursor contains indium, a thermal ALD method can be used as the ALD method.

[0189] In the method for forming the oxide semiconductor layer 30, it is preferable to use a material with a low impurity concentration. In other words, it is preferable to use a high-purity material in the method for forming the oxide semiconductor layer 30. For example, the purity of the second precursor is preferably 3N (99.9%) or higher, more preferably 4N (99.99%) or higher, more preferably 5N (99.999%) or higher, and even more preferably 6N (99.9999%) or higher. By using a high-purity material, it is possible to reduce impurities in the oxide semiconductor layer 30.

[0190] The gallium content of the second precursor is preferably 1000 ppm or less, more preferably 500 ppm or less, even more preferably 100 ppm or less, still more preferably 50 ppm or less, still more preferably 10 ppm or less, and still more preferably 1 ppm or less. By using a precursor with a low gallium content, an oxide semiconductor layer 30 with a low gallium concentration can be formed.

[0191] The aluminum content in the second precursor is preferably 1000 ppm or less, more preferably 500 ppm or less, even more preferably 100 ppm or less, still more preferably 50 ppm or less, still more preferably 10 ppm or less, and still more preferably 1 ppm or less. By using a precursor with a low aluminum content, the aluminum concentration in the oxide semiconductor layer 30 can be reduced, and the crystallinity of the oxide semiconductor layer 30 can be improved.

[0192] Examples of precursors that can be used that contain indium include trimethylindium, triethylindium, ethyldimethylindium, tris(1-methylethyl)indium, tris(2,2,6,6-tetramethyl-3,5-heptanedionate)indium, cyclopentadienylindium, indium(III) acetylacetonate, (3-(dimethylamino)propyl)dimethylindium, (diethylphosphino)dimethylindium, chlorodimethylindium, bromodimethylindium, and dimethyl(2-propanolato)indium.

[0193] Alternatively, an inorganic precursor containing no hydrocarbon may be used as the indium-containing precursor. Examples of the inorganic indium-containing precursor include halogen-based indium compounds such as trifluoroindium (indium(III) fluoride), indium trichloride (indium(III) chloride), indium tribromide (indium(III) bromide), and indium triiodide (indium(III) iodide). The decomposition temperature of indium trichloride is approximately 500°C to 700°C. Therefore, by using indium trichloride, film formation can be performed by the ALD method while heating the substrate at approximately 400°C to 600°C, for example, at 500°C.

[0194] The second oxidizing agent preferably contains ozone. Note that the above-described materials that can be used for the first oxidizing agent can be used for the second oxidizing agent. By using ozone, oxygen, or the like that does not contain hydrogen as the second oxidizing agent, the amount of hydrogen mixed into the oxide semiconductor layer 30 can be reduced.

[0195] Here, the temperature to which the substrate is heated when the second precursor is introduced into the reaction chamber is defined as a first temperature, and the temperature to which the substrate is heated when the second oxidizing agent is introduced into the reaction chamber is defined as a second temperature.

[0196] The first temperature is preferably set to a temperature corresponding to the decomposition temperature of the second precursor. In the case of a thermal ALD method using triethylindium as the indium-containing precursor, the first temperature is, for example, 100°C or higher and 350°C or lower, preferably 150°C or higher and 300°C or lower. By providing the oxide layer 27, it is possible to form the oxide semiconductor layer 30 having crystallinity even if the first temperature is lower than the above-mentioned temperature. When the oxide layer 27 is provided, the first temperature can be set to a temperature ranging from room temperature (25°C) to 300°C or lower, preferably from room temperature to 200°C or lower, and more preferably from room temperature to 150°C or lower.

[0197] The second temperature is preferably higher than the first temperature. For example, when the second oxidizing agent contains ozone, the second temperature is preferably higher than 200°C and lower than 450°C, more preferably 250°C or higher and 400°C or lower, and even more preferably 300°C or higher and 350°C or lower. This configuration can reduce the hydrogen concentration in the oxide semiconductor layer. Furthermore, by setting the first temperature lower than the second temperature, particles generated by decomposition of the second precursor can be suppressed. Note that the second temperature may be the same as the first temperature. This configuration can maintain a constant substrate heating temperature during deposition of the oxide semiconductor layer 30, thereby improving productivity.

[0198] It is preferable that the reaction chamber into which the second precursor is introduced and the reaction chamber into which the second oxidizing agent is introduced are the same. This configuration allows for film formation without the need to load and unload the substrate, thereby improving productivity. It is also possible to use different reaction chambers for the introduction of the second precursor and the introduction of the second oxidizing agent. By providing a first reaction chamber set to a first temperature and a second reaction chamber set to a second temperature, the first temperature and the second temperature can be maintained, respectively. This facilitates temperature control, improving work efficiency and safety.

[0199] When the indium oxide film included in the oxide semiconductor layer 30 is formed using the ALD method, the edges of the indium oxide film are presumably passivated because they are terminated with oxygen. It is presumed that the passivation of the edges reduces defects in the edges of the indium oxide film. Therefore, it is presumed that a highly reliable transistor can be realized.

[0200] Note that the oxide semiconductor layer 30 can be formed by a sputtering method in an atmosphere containing oxygen. In addition, by using a sputtering method that does not require the use of hydrogen-containing molecules in a deposition gas, the hydrogen concentration in the oxide semiconductor layer 30 can be reduced. For example, oxygen or a mixed gas of oxygen and a noble gas may be used as a sputtering gas.

[0201] The oxide semiconductor layer 30 can be formed by, for example, sputtering or ALD. For example, when the oxide semiconductor layer 30 has a two-layer structure of an oxide semiconductor layer 30a and an oxide semiconductor layer 30b (see FIG. 1(F)), the oxide semiconductor layer 30a can be formed by ALD, and the oxide semiconductor layer 30b can be formed by sputtering. Because the ALD method provides better coverage than the sputtering method, forming the oxide semiconductor layer 30a by ALD can improve the coverage of the oxide semiconductor layer 30. Therefore, the oxide semiconductor layer can be well coated on steps, openings, and the like with a high aspect ratio. Furthermore, because the ALD method causes less damage to the surface on which the oxide layer 27 is formed, forming the oxide semiconductor layer 30a by ALD can promote epitaxial growth of the oxide semiconductor layer 30a. Furthermore, forming the oxide semiconductor layer 30b by sputtering can improve productivity. Moreover, the oxide semiconductor layer 30 can be formed with high crystallinity or high film density.

[0202] Alternatively, the oxide semiconductor layer 30a may be formed by sputtering, and the oxide semiconductor layer 30b may be formed by ALD. An oxide semiconductor layer formed by sputtering tends to have crystallinity. Therefore, by providing a crystalline oxide semiconductor layer as the oxide semiconductor layer 30a, the crystallinity of the oxide semiconductor layer 30b can be improved. Even if pinholes or discontinuities are formed in the oxide semiconductor layer 30a formed by sputtering, the overlapping portions can be filled with the oxide semiconductor layer 30b formed by ALD, which has good coverage.

[0203] Note that sputtering is a film formation method that causes relatively large damage to the surface on which the oxide semiconductor layer 30a is formed. Therefore, when the oxide semiconductor layer 30a is formed by sputtering, a mixed layer with low crystallinity may be formed between the insulating layer 20 and the oxide semiconductor layer 30a or in the oxide semiconductor layer 30a near the insulating layer 20. However, in the present invention, it is sufficient that the channel formation region 31 located on the upper side (the insulating layer 50 side) of the oxide semiconductor layer 30a has high crystallinity. Therefore, by increasing the film thickness of the oxide semiconductor layer 30 within the above-mentioned range, it is possible to prevent the mixed layer from being formed in the channel formation region 31. Therefore, the crystallinity of the channel formation region 31 can be improved.

[0204] Note that, before forming the oxide semiconductor layer 30, an oxide layer 27 may be formed on the insulating layer 20. The oxide layer 27 can be formed using a sputtering method, a CVD method, a vacuum deposition method, an MBE method, a PLD method, an ALD method, or the like.

[0205] The oxide layer 27 is preferably formed by the ALD method. By forming the oxide layer 27 by the ALD method, the coverage of the oxide layer 27 can be improved. Furthermore, when the oxide layer 27 and the oxide semiconductor layer 30 are formed by the same film formation method, it is preferable to form the oxide layer 27 and the oxide semiconductor layer 30 successively without exposing them to the atmosphere. By forming the two types of films successively without exposing them to the atmosphere, it is possible to increase productivity. Furthermore, it is possible to reduce impurities (typically moisture, etc.) that are introduced into the interface between the two types of films and the vicinity thereof.

[0206] The oxide layer 27 can also be formed by a sputtering method. Forming the oxide layer 27 by a sputtering method can improve the crystallinity of the oxide semiconductor layer 30. Furthermore, forming the oxide layer 27 by a sputtering method in an atmosphere containing oxygen can add oxygen to the insulating layer 20.

[0207] When the oxide layer 27 is provided and the oxide semiconductor layer 30 has a two-layer structure of the oxide semiconductor layer 30a and the oxide semiconductor layer 30b, it is preferable to form the oxide layer 27 by sputtering, the oxide semiconductor layer 30a by ALD, and the oxide semiconductor layer 30b by sputtering. This configuration allows the oxide semiconductor layer 30a to be epitaxially grown from the oxide layer 27, thereby improving the crystallinity of the oxide semiconductor layer 30a. For example, the oxide layer 27 can be formed using a YSZ film deposited by sputtering, the oxide semiconductor layer 30a can be formed using an indium oxide film deposited by ALD, and the oxide semiconductor layer 30b can be formed using an IGZO film deposited by sputtering. In this case, for example, it is preferable that the oxide layer 27 has a region with a film thickness of 1 nm or more and 5 nm or less, the oxide semiconductor layer 30a has a region with a film thickness of 5 nm or more and 7 nm or less, and the oxide semiconductor layer 30b has a region with a film thickness of 3 nm or more and 5 nm or less.

[0208] After the oxide semiconductor layer 30 is formed, a process of supplying oxygen to the oxide semiconductor layer 30 may be performed. This allows oxygen to be supplied to the oxide semiconductor layer 30 by heat or the like applied after this process. Note that the details of the process of supplying oxygen can be found in the above description.

[0209] Next, heat treatment is preferably performed. Heat treatment can reduce impurities such as hydrogen and water contained in the oxide semiconductor layer 30. The temperature for the heat treatment is preferably 100° C. to 650° C., more preferably 250° C. to 600° C., and still more preferably 300° C. to 500° C. or 350° C. to 550° C. For details of the heat treatment, refer to the above description.

[0210] The gas used in the heat treatment is preferably highly purified. By performing the heat treatment using a highly purified gas, moisture and the like can be prevented from being introduced into the oxide semiconductor layer 30 as much as possible.

[0211] The heat treatment reduces impurities such as carbon, hydrogen, and water in the oxide semiconductor layer 30. Reducing the impurities in the film in this manner improves the crystallinity of the oxide semiconductor layer 30, resulting in a denser and more compact structure. This increases the number of crystalline regions in the oxide semiconductor layer 30, reducing in-plane variations in the crystalline regions in the oxide semiconductor layer 30. This reduces in-plane variations in the electrical characteristics of the transistor.

[0212] In addition, when the insulating layer 20 contains oxygen, it is preferable that oxygen be supplied from the insulating layer containing oxygen to the channel formation region of the oxide semiconductor layer 30 by the heat treatment. O H can be reduced.

[0213] Note that microwave plasma treatment may be performed after the formation of the oxide semiconductor layer 30. By performing the microwave plasma treatment, the concentration of impurities such as hydrogen or water contained in the oxide semiconductor layer 30 can be reduced. Furthermore, a crystalline region of the oxide semiconductor layer 30 may grow.

[0214] In this specification, microwaves refer to electromagnetic waves having a frequency of 300 MHz or more and 300 GHz or less. Microwave plasma processing refers to processing using a device with a power source that generates high-density plasma using microwaves. Microwave plasma processing can also be called microwave-excited high-density plasma processing.

[0215] By performing microwave plasma treatment in an atmosphere containing oxygen, the impurity concentration in the oxide semiconductor layer 30 can be reduced. Examples of impurities include hydrogen and carbon. While the above example illustrates a configuration in which microwave plasma treatment is performed on the oxide semiconductor layer 30 in an atmosphere containing oxygen, the present invention is not limited to this. For example, microwave plasma treatment may be performed on an insulating film, more specifically, a silicon oxide film, provided near the oxide semiconductor layer 30 in an atmosphere containing oxygen. Furthermore, the heat generated during the microwave plasma treatment may enhance the crystallinity of the oxide semiconductor layer 30.

[0216] The microwave plasma treatment is preferably carried out under reduced pressure, with the pressure preferably being 10 Pa to 1000 Pa, more preferably 50 Pa to 700 Pa, and even more preferably 100 Pa to 400 Pa. The treatment temperature is preferably room temperature (25°C) to 750°C, more preferably 300°C to 500°C, and can be 400°C to 450°C.

[0217] When microwave plasma treatment is performed, the substrate may be heated. The substrate is preferably heated to a temperature above room temperature (e.g., 25°C), above 100°C, above 200°C, above 300°C, or above 400°C, and below 500°C or below 450°C. For example, the substrate is preferably heated to a temperature above room temperature and below 500°C, more preferably above 100°C and below 450°C, more preferably above 200°C and below 450°C, more preferably above 300°C and below 450°C, and even more preferably above 400°C and below 450°C.

[0218] The microwave plasma treatment can be performed using, for example, oxygen gas and argon gas. In the microwave plasma treatment using oxygen gas and argon gas, the main oxygen radical is triplet oxygen (O( 3 P j )), singlet oxygen (O( 1 D2)), and oxygen ions (O2 +) can take three states. Note that oxygen ions effectively act to reduce the hydrogen concentration in oxide films by microwave plasma processing. The amount of oxygen radicals in each state varies depending on the oxygen flow rate ratio or pressure in microwave plasma processing. For example, under conditions of a low oxygen flow rate ratio and low pressure, the amount of oxygen ions tends to increase. On the other hand, if the oxygen flow rate ratio or pressure is excessively low, there is a concern that the control of the oxygen flow rate becomes unstable, making it difficult to stabilize the discharge and etching the oxide film. Therefore, for example, the oxygen flow rate ratio (O2 / (O2+Ar)) in microwave plasma processing is preferably greater than 0% and less than 45%, preferably greater than 0% and less than 30%, preferably greater than 0% and less than 10%, preferably 0.5% to 5%, more preferably 0.5% to 3%, and typically more preferably 1%.

[0219] The shorter the microwave plasma treatment time, the higher the productivity. Therefore, for example, the microwave plasma treatment time is preferably 1 minute or more and 60 minutes or less, more preferably 1 minute or more and 30 minutes or less, and even more preferably 1 minute or more and 10 minutes or less.

[0220] By performing microwave plasma treatment in an atmosphere containing oxygen, oxygen gas is converted into plasma using microwaves or high frequency waves such as RF, and oxygen radicals generated by converting the oxygen gas into plasma can act on the oxide semiconductor layer. O By splitting H into oxygen vacancies and hydrogen, the impurity hydrogen can be removed from the oxide semiconductor layer. O H can be reduced. At this time, carbon bonded to oxygen, hydrogen, or the like can also be removed in some cases. In this way, impurities such as carbon or hydrogen can be reduced by performing microwave plasma treatment. Furthermore, by supplying the oxygen radicals to oxygen vacancies formed in the oxide semiconductor layer, the oxygen vacancies in the oxide semiconductor layer can be further reduced.

[0221] Furthermore, a part of the oxygen present in the oxide semiconductor before the microwave plasma treatment reacts with hydrogen in the oxide semiconductor, in other words, the reaction "2H + O → H2O↑" occurs, and the hydrogen can be removed as H2O (also referred to as dehydration or dehydrogenation). H2O is one of the factors that hinder improvement of crystallinity, so it is preferable to remove it from the oxide semiconductor. Removing hydrogen in the oxide semiconductor as H2O and reducing the hydrogen concentration in the oxide semiconductor can also promote improvement of crystallinity. Note that the hydrogen concentration in the oxide semiconductor can be further reduced by increasing the temperature during the microwave plasma treatment.

[0222] After the microwave plasma treatment, a heat treatment may be performed without exposing the substrate to the outside air. The temperature of the heat treatment is, for example, preferably 100°C or higher and 750°C or lower, more preferably 300°C or higher and 500°C or lower, and even more preferably 400°C or higher and 450°C or lower.

[0223] It should be noted that the crystallinity can be improved by plasma treatment containing oxygen gas instead of microwave plasma treatment.

[0224] Oxygen supplied to the oxide semiconductor layer can be in various forms such as oxygen atoms, oxygen molecules, oxygen ions (charged oxygen atoms or oxygen molecules), and oxygen radicals (oxygen atoms, oxygen molecules, or oxygen ions with an unpaired electron). Note that the oxygen injected into the oxide semiconductor layer is preferably in one or more of the above forms, and is particularly preferably in the form of oxygen radicals.

[0225] In this manner, it is possible to reduce the impurities in the oxide semiconductor layer 30. In addition, it is possible to improve the crystallinity of the oxide semiconductor layer 30.

[0226] Subsequently, the insulating layer 50 is formed on the oxide semiconductor layer 30. The insulating layer 50 is preferably formed by ALD. A third precursor and a third oxidizing agent can be used to form the insulating layer 50. The third precursor preferably contains one of aluminum and hafnium. In this case, an aluminum oxide film or a hafnium oxide film is formed as the insulating layer 50. In other words, an oxide film containing a single element other than oxygen is formed. Note that when the third precursor contains one of aluminum and hafnium, a thermal ALD method can be used as the ALD method.

[0227] Examples of precursors that can be used include aluminum chloride, trimethylaluminum, etc. Examples of precursors that can be used include hafnium tetrachloride, tetrakis(ethylmethylamido)hafnium (TEMAHf), etc.

[0228] The third oxidizing agent can be any of the materials that can be used for the first oxidizing agent described above.

[0229] In the ALD process, a precursor is introduced into a chamber and adsorbed onto the substrate surface. This adsorption of the precursor onto the substrate surface triggers a self-limiting mechanism for the surface chemical reaction, preventing further adsorption of the precursor onto the substrate. The optimum substrate temperature range within which this mechanism is activated is also known as the ALD window. The ALD window is determined by the precursor's temperature characteristics, vapor pressure, decomposition temperature, and other factors. Therefore, the ALD window varies from precursor to precursor. Therefore, when depositing oxide films containing multiple elements other than oxygen, the deposition conditions must be adjusted to account for the ALD window of each precursor. On the other hand, when depositing oxide films containing only a single element other than oxygen, such as indium oxide or aluminum oxide, the deposition conditions can be adjusted by considering only the ALD window of a single precursor, simplifying the process and enabling the formation of high-quality oxide films.

[0230] The first oxidizing agent, the second oxidizing agent, and the third oxidizing agent may all be the same oxidizing agent, or at least one of them may be a different oxidizing agent.

[0231] Furthermore, when the insulating layer 20 and the oxide semiconductor layer 30 are formed using the same film formation method, it is preferable to form the insulating layer 20 and the oxide semiconductor layer 30 consecutively without exposing them to the atmosphere. Alternatively, when the oxide semiconductor layer 30 and the insulating layer 50 are formed using the same film formation method, it is preferable to form the oxide semiconductor layer 30 and the insulating layer 50 consecutively without exposing them to the atmosphere. Alternatively, when the insulating layer 20, the oxide semiconductor layer 30, and the insulating layer 50 are formed using the same film formation method, it is preferable to form the insulating layer 20, the oxide semiconductor layer 30, and the insulating layer 50 consecutively without exposing them to the atmosphere. By forming two or more types of films consecutively without exposing them to the atmosphere, it is possible to improve productivity. Furthermore, it is possible to reduce impurities (typically moisture, etc.) that are introduced into the interface between the two types of films and its vicinity.

[0232] As an example, it is preferable to form the oxide semiconductor layer 30 by a thermal ALD method, and then continuously form the insulating layer 50 by a thermal ALD method without exposing the process to the atmosphere. In this case, by using the same oxidizing agent for the second oxidizing agent and the third oxidizing agent and using a reaction chamber into which the second precursor and the third precursor can be introduced, the oxide semiconductor layer 30 and the insulating layer 50 can be formed without carrying in and out the substrate, thereby improving productivity.

[0233] Microwave plasma treatment is preferably performed after the insulating layer 50 is formed. The microwave plasma treatment can reduce the concentration of impurities such as hydrogen and water contained in the oxide semiconductor layer 30. For details of the microwave plasma treatment, refer to the above description.

[0234] Subsequently, the conductive layer 60 is formed on the insulating layer 50 .

[0235] Through the above steps, a semiconductor device of one embodiment of the present invention can be manufactured.

[0236] This embodiment mode can be combined with other embodiments or examples as appropriate. In addition, in this specification, when multiple configuration examples are shown in one embodiment mode, the configuration examples can be combined as appropriate.

[0237] (Embodiment 2) In this embodiment, a semiconductor device to which the configuration described in the first embodiment is applied will be described.

[0238] <Configuration Example 1 of Semiconductor Device> Structural examples of a semiconductor device of one embodiment of the present invention will be described with reference to FIGS.

[0239] 3A and 3B are schematic perspective views of a semiconductor device having a transistor 200A. Fig. 3B is a perspective view in which a part of Fig. 3A is cut away. In Fig. 3A and 3B, only the outlines of some components (such as interlayer insulating layers) are indicated by dashed lines.

[0240] 3(A) and 3(B), the X, Y, and Z directions are indicated by arrows. Note that although the same X, Y, and Z symbols are used in both Fig. 3(A) and Fig. 3(B), the directions do not necessarily have to match.

[0241] FIG. 4(A) is a plan view of a semiconductor device having a transistor 200A. FIG. 4(B) is a cross-sectional view taken along dashed line A1-A2 in FIG. 4(A). FIG. 4(C) is a cross-sectional view taken along dashed line A3-A4 in FIG. 4(A). FIG. 4(D) is a cross-sectional view taken along dashed line A5-A6 in FIG. 4(B). Note that some elements are omitted from the plan view of FIG. 4(A) for clarity. Some elements may also be omitted from the subsequent plan views.

[0242] Also, Fig. 5(A) is a cross-sectional view taken along dashed line A1-A2 in Fig. 4(A). Fig. 5(B) is a cross-sectional view taken along dashed line A5-A6 in Fig. 4(B). Figs. 5(A) and 5(B) correspond to examples of enlarged views of Figs. 4(B) and 4(D), respectively.

[0243] The semiconductor device illustrated in FIGS. 4A to 4D includes an insulating layer 210 over a substrate (not shown), a transistor 200A over the insulating layer 210, and an insulating layer 280 over the insulating layer 210.

[0244] [Transistor 200A] The transistor 200A includes a conductive layer 220, a conductive layer 240 on an insulating layer 280, an oxide semiconductor layer 230, an insulating layer 250 on the oxide semiconductor layer 230, and a conductive layer 260 on the insulating layer 250. The insulating layer 280 is located on the conductive layer 220.

[0245] 4(B) and 4(C) show an example in which the conductive layer 220 has a two-layer structure of a conductive layer 220_1 and a conductive layer 220_2 on the conductive layer 220_1, the conductive layer 240 has a two-layer structure of a conductive layer 240_1 and a conductive layer 240_2 on the conductive layer 240_1, and the conductive layer 260 has a two-layer structure of a conductive layer 260_1 and a conductive layer 260_2 on the conductive layer 260_1.

[0246] In the transistor 200A, the oxide semiconductor layer 230 functions as a semiconductor layer, the conductive layer 260 functions as a gate electrode, the insulating layer 250 functions as a gate insulating layer, the conductive layer 220 functions as one of a source electrode and a drain electrode, and the conductive layer 240 functions as the other of the source electrode and the drain electrode. The conductive layer 260 has a region that functions as a gate wiring.

[0247] The oxide semiconductor layer 230, the insulating layer 280, the insulating layer 250, and the conductive layer 260 included in the transistor 200A correspond to the oxide semiconductor layer 30, the insulating layer 20, the insulating layer 50, and the conductive layer 60, respectively, described in Embodiment 1. Therefore, the structures, materials, and the like of the oxide semiconductor layer 30, the insulating layer 20, the insulating layer 50, and the conductive layer 60, described in Embodiment 1, can be referred to for the structures, materials, and the like of the oxide semiconductor layer 230, the insulating layer 280, the insulating layer 250, and the conductive layer 260.

[0248] As shown in FIGS. 4B and 4C, an opening 290 reaching the conductive layer 220 is provided in the insulating layer 280 and the conductive layer 240 .

[0249] The openings 290 include an opening in the insulating layer 280 and an opening in the conductive layer 240. The shape and size of the openings 290 in a plan view may differ depending on the layer. When the top surface shape of the openings 290 is circular, the openings in each layer may or may not be concentric. The openings in the insulating layer 280 correspond to the openings 90 described in the first embodiment.

[0250] The oxide semiconductor layer 230, the insulating layer 250, and the conductive layer 260 are each arranged so that at least a portion thereof is located within the opening 290. Furthermore, the portions of the oxide semiconductor layer 230, the insulating layer 250, and the conductive layer 260 that are arranged within the opening 290 are provided so as to reflect the shape of the opening 290.

[0251] The oxide semiconductor layer 230 is provided so as to cover the bottom and sidewalls of the opening 290. The oxide semiconductor layer 230 has a recess that reflects the shape of the opening 290. The oxide semiconductor layer 230 has a portion that contacts the upper surface of the conductive layer 240 and a portion that contacts the upper surface of the conductive layer 220 within the opening 290.

[0252] The insulating layer 250 is provided to cover the oxide semiconductor layer 230. The insulating layer 250 is provided on the insulating layer 280 to cover the top surface and side surfaces of the oxide semiconductor layer 230 and the side surfaces of the conductive layer 240. The insulating layer 250 has recesses that reflect the shapes of the recesses that the oxide semiconductor layer 230 has.

[0253] The conductive layer 260 is provided so as to fill at least a part of the recessed portion of the insulating layer 250. In addition, the conductive layer 260 has a region in the opening 290 that overlaps with the oxide semiconductor layer 230 with the insulating layer 250 sandwiched therebetween.

[0254] The oxide semiconductor layer 230 has a region overlapping with the conductive layer 260 with the insulating layer 250 interposed therebetween. At least a part of this region functions as a channel formation region of the transistor 200A. One of the region of the oxide semiconductor layer 230 near the conductive layer 220 and the region of the oxide semiconductor layer 230 near the conductive layer 240 functions as a source region, and the other functions as a drain region. In other words, the channel formation region is sandwiched between the source region and the drain region.

[0255] The oxide semiconductor layer 230 is provided inside the opening 290. The transistor 200A has a structure in which one of the source electrode and the drain electrode (the conductive layer 220 here) is located below and the other of the source electrode and the drain electrode (the conductive layer 240 here) is located above, allowing current to flow vertically. That is, a channel is formed along the side surface of the opening 290. This allows the transistor 200A to occupy a smaller area than a planar transistor in which the channel formation region, the source region, and the drain region are separately provided on the XY plane. This enables the semiconductor device to be highly integrated. Furthermore, when the semiconductor device of one embodiment of the present invention is used in a memory device, the memory capacity per unit area can be increased. The transistor 200A can be referred to as a vertical field effect transistor (VFET), a vertical transistor, a vertical channel transistor, a vertical channel transistor, or the like because the channel length direction has a component in the height direction (vertical direction).

[0256] The transistor 200A includes a metal oxide functioning as a semiconductor in the oxide semiconductor layer 230 including a channel formation region. That is, the transistor 200A can be said to be an OS transistor.

[0257] As shown in FIG. 5A, the conductive layer 220 has a recessed portion overlapping with the opening 290. Specifically, the recessed portion is provided in the conductive layer 220_2 at a position overlapping with the opening 290. When the conductive layer 220_2 has a recessed portion overlapping with the opening 290, the height of the lower surface of the insulating layer 250 and the height of the lower surface of the conductive layer 260 in the opening 290 can be lower than the height of the upper surface of the conductive layer 220_2 that is in contact with the insulating layer 280, relative to the upper surface of the insulating layer 210, as compared to when the conductive layer 220_2 does not have the recessed portion. Here, the height of each surface can be determined based on the surface on which the transistor is to be formed. Here, the upper surface of the insulating layer 210 is used as the reference. The surface used as the reference is not limited to the surface on which the transistor is to be formed. For example, the upper surface of a substrate on which a transistor or a semiconductor device is provided may be used as the reference.

[0258] The oxide semiconductor layer 230 contacts the bottom and side surfaces of the recesses of the conductive layer 220_2. The recesses in the conductive layer 220_2 can increase the area where the oxide semiconductor layer 230 and the conductive layer 220_2 contact each other. Therefore, the contact resistance between the oxide semiconductor layer 230 and the conductive layer 220_2 can be reduced.

[0259] FIG. 4C shows a structure in which the side edge of the conductive layer 240 and the side edge of the oxide semiconductor layer 230 are aligned or substantially aligned outside the opening 290. The conductive layer 240 and the oxide semiconductor layer 230 can be manufactured by processing using the same mask. This is preferable because the number of masks required for manufacturing a semiconductor device can be reduced. Note that the present invention is not limited to this. For example, a structure may be adopted in which any one of the end of the oxide semiconductor layer 230, the end of the conductive layer 240_1, and the end of the conductive layer 240_2 is located inside or outside the other in the X or Y direction.

[0260] Within the opening 290, it is preferable that the side edge of the conductive layer 240 and the side edge of the insulating layer 280 coincide or substantially coincide. With this configuration, the opening 290 can be formed in the conductive layer 240 and the insulating layer 280 at the same time. Furthermore, the film thickness distribution of the oxide semiconductor layer 230 and the like provided within the opening 290 can be made uniform. Furthermore, it is possible to prevent the oxide semiconductor layer 230 and the like from being divided by a step or the like between the conductive layer 240 and the insulating layer 280.

[0261] 4A, the transistor 200A is provided at the intersection of a conductive layer 260 extending in the X direction and a conductive layer 240 extending in the Y direction. As shown in FIG. 4A, the diameter of the opening 290 can be made smaller than both the width of the short side of the conductive layer 240 and the width of the short side of the conductive layer 260. In this way, the transistor 200A can be said to have a structure that allows for high integration and miniaturization.

[0262] As shown in FIG. 5B, by forming the opening 290 to have a circular shape in a plan view, the oxide semiconductor layer 230, the insulating layer 250, and the conductive layer 260 are arranged concentrically. Therefore, the side surface of the conductive layer 260 located at the center of the opening 290 faces the side surface of the oxide semiconductor layer 230 with the insulating layer 250 interposed therebetween. That is, in a plan view, the entire periphery of the oxide semiconductor layer 230 becomes a channel formation region. In this case, for example, the channel width of the transistor 200A is determined by the periphery length of the oxide semiconductor layer 230. That is, the channel width of the transistor 200A can be determined by the width of the opening 290 (or the diameter when the opening 290 is circular in a plan view). In FIGS. 5A and 5B, the width D of the opening 290 is shown, and in FIG. 5B, the channel width W of the transistor 200A is shown.

[0263] Furthermore, by providing the oxide semiconductor layer 230, the insulating layer 250, and the conductive layer 260 concentrically, the distance between the conductive layer 260 and the oxide semiconductor layer 230 becomes approximately uniform, so that a gate electric field can be applied to the oxide semiconductor layer 230 approximately uniformly.

[0264] Increasing the width D of the opening 290 increases the channel width per unit area, thereby increasing the on-current. On the other hand, the area occupied by the transistor 200A, for example, the area of ​​the transistor 200A in a plan view, is roughly determined by the width of the opening 290. Reducing the width D of the opening 290 reduces the area occupied by the transistor 200A, allowing for higher integration of the semiconductor device.

[0265] The width D of the opening 290 may vary in the depth direction. Here, the shortest distance between the two side surfaces of the conductive layer 240 on the opening side in a cross-sectional view is used as the width D. In other words, the minimum width of the opening in the conductive layer 240 is used as the width D of the opening 290. Alternatively, the width of the opening at the highest position in the conductive layer 240, the width of the opening at the lowest position, the width of the opening at a midpoint between these, or the average value of these three widths may be used as the width D. Here, an example is shown in which the width D of the opening 290 is determined using the width of the opening in the conductive layer 240, but the method for determining the width D is not particularly limited. For example, the shortest distance between the two side surfaces of the insulating layer 280 on the opening side may be used as the width D. Alternatively, the width of the opening at the highest position in the insulating layer 280, the width of the opening at the lowest position, the width of the opening at a midpoint between these, or the average value of these three widths may be used as the width D of the opening 290.

[0266] The width D of the opening 290 is set by the film thickness of each of the oxide semiconductor layer 230, the insulating layer 250, and the conductive layer 260 provided in the opening 290. The width D of the opening 290 is, for example, 5 nm or more, 10 nm or more, or 20 nm or more, and is preferably 100 nm or less, 60 nm or less, 50 nm or less, 40 nm or less, or 30 nm or less. When the opening 290 is circular in plan view, the width D of the opening 290 corresponds to the diameter of the opening 290, and the channel width W can be calculated as "D × π".

[0267] In this embodiment, an example is shown in which the opening 290 is circular in plan view. By using a circular shape, the processing accuracy when forming the opening can be improved, and openings of a fine size can be formed. However, the present invention is not limited to this. In plan view, the opening 290 can be, for example, a circle or a substantially circular shape such as an ellipse, a polygonal shape such as a triangle, a quadrangle (including a rectangle, a diamond, and a square), a pentagon, or a star-shaped polygon, or a polygonal shape with rounded corners. Note that the circle is not limited to a perfect circle. Furthermore, the polygon may be either a concave polygon (a polygon with at least one interior angle exceeding 180 degrees) or a convex polygon (a polygon with all interior angles less than 180 degrees).

[0268] The channel length of the transistor 200A is the distance between the source region and the drain region. In other words, the channel length of the transistor 200A is determined by the thickness of the insulating layer 280 on the conductive layer 220. Therefore, the channel length of the transistor 200A does not affect the area occupied by the transistor 200A, for example, the area of ​​the transistor 200A in a planar view. In FIG. 5A, the channel length L of the transistor 200A is indicated by a dashed double-headed arrow. Note that the channel length L can be considered as the distance between the edge of the region where the oxide semiconductor layer 230 and the conductive layer 220 contact each other and the edge of the region where the oxide semiconductor layer 230 and the conductive layer 240 contact each other in a cross-sectional view. In this case, the channel length L corresponds to the length of the side surface of the insulating layer 280 on the opening 290 side in a cross-sectional view.

[0269] The channel length of the transistor 200A can be set by the film thickness of the insulating layer 280. Therefore, the channel length of the transistor 200A can be, for example, 500 nm or less, 300 nm or less, 100 nm or less, 60 nm or less, 50 nm or less, 40 nm or less, 30 nm or less, 20 nm or less, or 10 nm or less, and can be 0.1 nm or more, 1 nm or more, or 5 nm or more. Typically, the channel length can be 1 nm or more and 300 nm or less, preferably 5 nm or more and 100 nm or less. This can improve productivity and yield in forming the insulating layer 280 and forming the opening 290 in the insulating layer 280. Furthermore, the on-current of the transistor 200A can be increased, thereby improving frequency characteristics.

[0270] The channel length L of the transistor 200A is preferably at least shorter than the channel width W of the transistor 200A. The channel length L of the transistor 200A is preferably 0.1 to 0.99 times, and more preferably 0.5 to 0.8 times, the channel width W of the transistor 200A. With this structure, a transistor with good electrical characteristics and high reliability can be realized.

[0271] Since the insulating layer 210 functions as an interlayer film, it is preferable to use a material with a low relative dielectric constant. By using a material with a low relative dielectric constant for the interlayer film, the parasitic capacitance generated between wirings can be reduced.

[0272] The insulating layer 210 preferably has a barrier property against hydrogen. When the insulating layer 210 provided below the oxide semiconductor layer 230 has a barrier property against hydrogen, diffusion of hydrogen from below the transistor 200A to the oxide semiconductor layer 230 can be suppressed.

[0273] The insulating layer 210 preferably has a function of capturing or fixing hydrogen. When the insulating layer 210 has a function of capturing or fixing hydrogen, hydrogen in the oxide semiconductor layer 230 diffuses into the insulating layer 210 through the conductive layer 220, and the hydrogen can be captured or fixed. Therefore, the hydrogen concentration in the oxide semiconductor layer 230 can be reduced.

[0274] The concentration of impurities such as hydrogen or water in the insulating layer 210 is preferably reduced, which can prevent impurities such as hydrogen or water from entering the channel formation region of the oxide semiconductor layer 230.

[0275] 5A shows an example in which the insulating layer 210 has a single-layer structure. Note that the insulating layer 210 can have a stacked structure of two or more layers. For example, the insulating layer 210 can have a two-layer structure of a first insulating layer and a second insulating layer over the first insulating layer. In this case, for example, it is preferable that the first insulating layer has a barrier property against hydrogen, and the second insulating layer has a function of capturing or fixing hydrogen. Specifically, it is preferable that silicon nitride is used as the first insulating layer, and aluminum oxide, hafnium oxide, hafnium zirconium oxide, or hafnium silicate is used as the second insulating layer.

[0276] 6A, an oxide layer 227 can be provided under the oxide semiconductor layer 230. The oxide layer 227 corresponds to the oxide layer 27 described in Embodiment 1. Therefore, the structure, materials, and the like of the oxide layer 27 described in Embodiment 1 can be referred to for the structure, materials, and the like of the oxide layer 227.

[0277] Since the insulating layer 280 functions as an interlayer film, it is preferable to use a material with a low dielectric constant. By using a material with a low dielectric constant for the interlayer film, the parasitic capacitance generated between wirings can be reduced. For example, silicon oxide or silicon oxynitride can be used as the insulating layer 280.

[0278] The concentration of impurities such as hydrogen or water in the insulating layer 280 is preferably reduced. This can prevent impurities such as hydrogen or water from entering the channel formation region of the oxide semiconductor layer 230.

[0279] The insulating layer 280 preferably contains nitrogen dioxide (NO2). For example, when the insulating layer 280 contains silicon oxide or silicon oxynitride, the NO2 in the insulating layer 280 is presumed to exist in a state close to isolated molecules.

[0280] When turning on the OS transistor, a potential is applied to the conductive layer 260, which serves as the gate electrode, and electrons are injected into the oxide semiconductor layer 230. These electrons are then trapped by NO2. The charge of NO2 that trapped the electrons becomes −1, and NO2 becomes a negative fixed charge. When NO2 in the insulating layer 280 becomes a negative fixed charge, a larger potential must be applied to the conductive layer 260 to turn on the OS transistor. This means that the threshold voltage of the OS transistor can be shifted to a positive value by NO2 in the insulating layer 280 becoming a negative fixed charge.

[0281] As described in Embodiment 1, the OS transistor has a V O and V O The presence of H tends to result in a normally-on characteristic. However, as described above, by configuring the insulating layer 280 so that NO becomes a negative fixed charge, the negative shift in the electrical characteristics of the OS transistor can be suppressed, resulting in a normally-off characteristic. This makes it possible to provide a semiconductor device with excellent electrical characteristics.

[0282] The amount of NO2 in the insulating layer 280 can be evaluated by electron spin resonance (ESR) or thermal desorption spectroscopy (TDS) analysis.

[0283] For example, when silicon oxide containing NO2 is used as the insulating layer 280, it can be evaluated by ESR measurement. Neutral NO2 in silicon oxide has a lone electron, so ESR measurement is possible. The absorption peak due to NO2 obtained by ESR measurement falls within the g-value range of 1.94 to 2.05. Therefore, the spin density corresponding to the absorption peak with a g-value of 1.94 to 2.05 obtained by ESR measurement of the insulating layer 280 is 4.8×10 -3 spins / nm 3 Over 1.0 x 10 -2 spins / nm 3 is less than or equal to 7.38 x 10 -3 spins / nm 3 Over 1.0 x 10 -2 spins / nm 3 When the absorption peak of the ESR obtained from the insulating layer 280 containing NO2 has the above value, the threshold voltage of the OS transistor can be set to 0 V or near 0 V or higher. In addition, the NO2 addition process can be performed efficiently, and productivity of the semiconductor device can be improved.

[0284] Note that the insulating layer 280 having the above spin density is not limited to the vicinity of the oxide semiconductor layer 230. It is preferable that the insulating layer 280 have the above spin density in a region surrounding an OS transistor, such as a region where a marker is formed or a region where an electrode pad is formed.

[0285] The addition of NO2 to the insulating layer 280 is preferably performed by plasma treatment using a nitrogen-containing gas. The nitrogen-containing gas can be nitrogen gas or dinitrogen monoxide (N2O) gas. By treating the insulating layer 280 containing silicon oxide with plasma-converted N2 or N2O, NO2 can be added to the insulating layer 280. At this time, oxygen can also be added to the insulating layer 280.

[0286] In the above plasma treatment, a sputtering apparatus, a CVD apparatus, a dry etching apparatus, a CVD apparatus using a high density plasma source, or a dry etching apparatus using a high density plasma source can be used.

[0287] 6A can be manufactured by forming a conductive layer 220 over an insulating layer 210, forming an insulating layer 280 over the conductive layer 220, forming a conductive layer 240 over the insulating layer 280, processing the conductive layer 240 and the insulating layer 280 to form an opening 290 reaching the conductive layer 220, forming an oxide layer 227 to cover the opening 290, forming an oxide semiconductor layer 230 over the oxide layer 227, forming an insulating layer 250 over the oxide semiconductor layer 230 and the insulating layer 280 so that the insulating layer 250 has a portion in contact with the oxide semiconductor layer 230 and a portion in contact with the insulating layer 280, and forming a conductive layer 260 over the insulating layer 250. The plasma treatment can be performed after the insulating layer 280 is formed.

[0288] In addition, it is preferable to heat the substrate during the plasma treatment. Heat treatment may be performed before or after the plasma treatment. The temperature for the substrate heating or heat treatment can be, for example, 200°C or higher and 450°C or lower, preferably 350°C or higher and 400°C or lower. By performing the substrate heating or heat treatment in this manner, excess oxygen contained in the insulating layer 280 can be reduced, the OS transistor can have normally-off characteristics, and the electrical characteristics can be improved. Furthermore, the reliability of the OS transistor can be improved. Setting the substrate temperature to 450°C or lower, or even 400°C or lower, can suppress NO2 desorption due to the heat treatment.

[0289] Here, Fig. 6(B) shows a cross-sectional view of the semiconductor device shown in Fig. 6(A) as seen from the Y direction. In Fig. 6(B), arrows in the drawing indicate oxygen diffusion paths.

[0290] 6B, even when the oxide layer 227 has a function of suppressing oxygen diffusion, oxygen can be supplied from the insulating layer 280 to the oxide semiconductor layer 230 through the insulating layer 250 by heat treatment, thereby reducing oxygen vacancies in the oxide semiconductor layer 230. Furthermore, by using an indium oxide film with high oxygen permeability for the oxide semiconductor layer 230, excess oxygen in the oxide semiconductor layer 230 can be discharged to the insulating layer 250, thereby reducing the amount of excess oxygen in the oxide semiconductor layer 230. Therefore, the electrical characteristics and reliability of the transistor 200A can be improved.

[0291] When the oxide layer 227 has a function of transmitting oxygen, oxygen can be supplied from the insulating layer 280 to the oxide semiconductor layer 230 through the oxide layer 227 or the insulating layer 250 by heat treatment, thereby reducing oxygen vacancies in the oxide semiconductor layer 230. Furthermore, by using an indium oxide film with high oxygen permeability for the oxide semiconductor layer 230, excess oxygen in the oxide semiconductor layer 230 can be discharged to the insulating layer 250, thereby reducing the excess oxygen in the oxide semiconductor layer 230. Therefore, the electrical characteristics and reliability of the transistor 200A can be improved.

[0292] Note that the above heat treatment is preferably performed after the insulating layer 250 is formed because oxygen in the insulating layer 280 is supplied to the oxide semiconductor layer 230 through the insulating layer 250.

[0293] Note that the NO2 added to the insulating layer 280 remains in the insulating layer 280 even after the heat treatment. Therefore, the amount of NO2 in the insulating layer 280 hardly changes before and after the heat treatment. For example, the difference between the spin density obtained by ESR measurement of the insulating layer 280 before the heat treatment and the spin density obtained by ESR measurement of the insulating layer 280 after the heat treatment is 10% or less, preferably 7% or less, more preferably 5% or less, and even more preferably 3% or less. Note that the spin density is the spin density corresponding to an absorption peak with a g value of 1.94 or more and 2.05 or less.

[0294] FIG. 5A shows an example in which the oxide semiconductor layer 230 has a single-layer structure. Note that the oxide semiconductor layer 230 can have a stacked structure of two or more layers. As shown in FIG. 7A, the oxide semiconductor layer 230 can have a two-layer structure of an oxide semiconductor layer 230_1 and an oxide semiconductor layer 230_2 over the oxide semiconductor layer 230_1. The oxide semiconductor layer 230_1 and the oxide semiconductor layer 230_2 correspond to the oxide semiconductor layer 30a and the oxide semiconductor layer 30b described in Embodiment 1, respectively. Therefore, the structures, materials, and the like of the oxide semiconductor layer 30a and the oxide semiconductor layer 30b described in Embodiment 1 can be referred to for the structures, materials, and the like of the oxide semiconductor layer 30a and the oxide semiconductor layer 30b.

[0295] 7B, a layer 228 can be provided between the oxide layer 227 and the oxide semiconductor layer 230. The layer 228 corresponds to the layer 28 described in Embodiment 1. Therefore, the structure, materials, and the like of the layer 28 described in Embodiment 1 can be referred to for the structure, materials, and the like of the layer 228.

[0296] 5A shows an example in which the insulating layer 250 has a single-layer structure. Note that the insulating layer 250 can have a stacked structure of two or more layers. In this case, the insulating layer 250 is preferably formed using two or more types of films. When the insulating layer 250 is formed using two or more types of films, the insulating layer 250 can have multiple functions. Examples of the functions of the insulating layer 250 include a function of extracting excess oxygen from the oxide semiconductor layer 230, a function of extracting hydrogen from the oxide semiconductor layer 230, and a function of suppressing diffusion of hydrogen into the oxide semiconductor layer 230.

[0297] 8(A) to 8(D) are enlarged views of the insulating layer 250 and its vicinity. Figures 8(A) to 8(D) are also enlarged views of the region P surrounded by the dashed line in Figure 5(A).

[0298] 8A shows an example in which the insulating layer 250 has a three-layer structure including an insulating layer 250_1, an insulating layer 250_2 over the insulating layer 250_1, and an insulating layer 250_3 over the insulating layer 250_2. In this case, the insulating layer 250_1 is in contact with the oxide semiconductor layer 230.

[0299] The insulating layer 250_1 can be formed using a material that can be used for the second insulating layer described in Embodiment 1. For example, the insulating layer 250_1 preferably has a function of capturing or fixing oxygen. With such a structure, excess oxygen in the oxide semiconductor layer 230 can be reduced. Furthermore, an insulating layer that has a function of capturing or fixing oxygen might also have a function of capturing or fixing hydrogen, which might reduce the hydrogen concentration in the oxide semiconductor layer 230. Therefore, a highly reliable transistor can be realized.

[0300] Furthermore, it is preferable to use a material with a high relative dielectric constant (high-k) for the insulating layer 250_1. An example of a high-k material is an oxide containing one or both of aluminum and hafnium. Using a high-k material for the insulating layer 250_1 makes it possible to reduce the gate potential applied during transistor operation while maintaining the physical thickness of the gate insulator. Also, it makes it possible to reduce the equivalent oxide thickness (EOT) of the insulator functioning as the gate insulator.

[0301] From the above, it is preferable to use an oxide containing one or both of aluminum and hafnium as the insulating layer 250_1, and it is more preferable to use an oxide having an amorphous structure and containing one or both of aluminum and hafnium. It is more preferable to use aluminum oxide having an amorphous structure, since an amorphous film of aluminum oxide can be formed relatively easily using the ALD method. In this embodiment, aluminum oxide is used as the insulating layer 250_1. Aluminum oxide has the function of capturing or fixing oxygen and hydrogen, and is therefore suitable for the insulating layer 250_1.

[0302] For example, the insulating layer 250_2 is preferably formed using a material with a low relative dielectric constant, such as a silicon oxide film or a silicon oxynitride film.

[0303] Silicon oxide or silicon nitride is an insulating material with high dielectric strength. This can reduce the leakage current of a transistor. Furthermore, a silicon oxide film or a silicon oxynitride film is also a film with high hydrogen permeability. Therefore, as shown in FIG. 8B, the insulating layer 250 may have a three-layer structure including an insulating layer 250_2, an insulating layer 250_1 on the insulating layer 250_2, and an insulating layer 250_3 on the insulating layer 250_1. With this structure, hydrogen in the oxide semiconductor layer 230 can diffuse into the insulating layer 250_1 through the insulating layer 250_2 and be captured or fixed. Therefore, the hydrogen concentration in the oxide semiconductor layer 230 can be reduced.

[0304] The insulating layer 250_3 preferably has a barrier property against hydrogen. With such a structure, diffusion of hydrogen into the oxide semiconductor layer 230 can be suppressed. Furthermore, the insulating layer 250_3 preferably has a barrier property against oxygen. The insulating layer 250_3 is provided between the channel formation region of the oxide semiconductor layer 230 and the conductive layer 260. With such a structure, oxygen contained in the channel formation region of the oxide semiconductor layer 230 can be prevented from diffusing into the conductive layer 260 and forming oxygen vacancies in the channel formation region of the oxide semiconductor layer 230. Furthermore, oxygen contained in the oxide semiconductor layer 230 can be prevented from diffusing into the conductive layer 260 and oxidizing the conductive layer 260. The insulating layer 250_3 is preferably at least less permeable to oxygen than the insulating layer 250_2. Furthermore, the insulating layer 250_3 preferably has a function of suppressing diffusion of hydrogen. This can prevent impurities such as hydrogen contained in the conductive layer 260 from diffusing into the oxide semiconductor layer 230. For example, silicon nitride is preferably used as the insulating layer 250_3.

[0305] 8(C), a structure may be employed in which an insulating layer 250_4 is provided on the insulating layer 250_2. The insulating layer 250_4 can be formed using an insulating material that can be used for the insulating layer 250_1. For example, the insulating layer 250_4 preferably has a function of capturing or fixing hydrogen. By providing the insulating layer 250_4 between the insulating layer 250_3 and the insulating layer 250_2, hydrogen contained in the insulating layer 250_2 and the like can be more effectively captured or fixed.

[0306] Specifically, the insulating layer 250 preferably has a four-layer structure in which an aluminum oxide film, a silicon oxide film, a hafnium oxide film, and a silicon nitride film are stacked in this order from the oxide semiconductor layer 230 side. With such a structure, hydrogen in the oxide semiconductor layer 230 can be diffused into the insulating layer 250_1 or the insulating layer 250_4 and captured or fixed. Therefore, the hydrogen concentration in the oxide semiconductor layer 230 can be reduced.

[0307] The insulating layer 250 is preferably a thin film. For example, by setting the thickness of the insulating layer 250 to be 1 nm or more and 20 nm or less, preferably 3 nm or more and 10 nm or less, the subthreshold swing value (also referred to as the S value) can be reduced. The S value refers to the amount of change in gate voltage when the drain current is changed by one order of magnitude while the drain voltage is constant in the subthreshold region.

[0308] The thickness of each layer constituting the insulating layer 250 is preferably 0.1 nm to 10 nm, more preferably 0.1 nm to 5 nm, more preferably 0.5 nm to 5 nm, more preferably 1 nm to less than 5 nm, and even more preferably 1 nm to 3 nm. Note that each layer constituting the insulating layer 250 may have a region with the above-described thickness in at least a portion thereof.

[0309] Typically, the thicknesses of the insulating layers 250_1, 250_2, 250_4, and 250_3 are 1 nm, 2 nm, 2 nm, and 1 nm, respectively. With such a structure, the transistor can have good electrical characteristics even when miniaturized or highly integrated.

[0310] Note that the insulating layer 250 having a four-layer structure may not include the insulating layer 250_3 (see FIG. 8D). For example, an insulating layer having a function of capturing or fixing oxygen can be used as the insulating layer 250_1, an insulating layer including a material with a low dielectric constant can be used as the insulating layer 250_2, and an insulating layer having a function of capturing or fixing hydrogen can be used as the insulating layer 250_4. Specifically, the insulating layer 250 can have a three-layer structure in which an aluminum oxide film, a silicon oxide film, and a hafnium oxide film are stacked in this order from the oxide semiconductor layer 230 side.

[0311] In order to thin the insulating layers 250_1 to 250_4 as described above, it is preferable to form the insulating layers 250_1 to 250_4 by the ALD method. In addition, in order to form the insulating layers 250_1 to 250_4 in the opening 290 with good coverage, it is preferable to form the insulating layers 250_1 to 250_4 by the ALD method.

[0312] It is preferable to use the ALD process two or more times in forming the insulating layer 250 having a stacked structure of multiple insulating films. For example, it is preferable that two or more of the multiple insulating films in the insulating layer 250 are formed using the ALD process. By forming at least two or more types of insulating films using the ALD process, it is possible to improve the coverage and film thickness uniformity of the insulating layer 250. Furthermore, for example, it is possible to increase productivity by successively forming two or more types of insulating films using the ALD process.

[0313] Although the above description has been given of a structure in which the insulating layer 250 has a three-layer structure of insulating layers 250_1 to 250_3 or a four-layer structure of insulating layers 250_1 to 250_4, the present invention is not limited to this. The insulating layer 250 can have a structure including at least one of the insulating layers 250_1 to 250_4. By configuring the insulating layer 250 with one, two, or three of the insulating layers 250_1 to 250_4, the manufacturing process of the semiconductor device can be simplified and productivity can be improved.

[0314] FIG. 5A shows an example in which the insulating layer 280 has a single-layer structure. The insulating layer 280 can have a stacked structure of two or more layers. For example, as shown in FIG. 9A, the insulating layer 280 can have a three-layer structure including an insulating layer 280_1, an insulating layer 280_2 on the insulating layer 280_1, and an insulating layer 280_3 on the insulating layer 280_2. In this case, it is preferable to use the above-mentioned material with a low dielectric constant for the insulating layer 280_2, and to use barrier insulating layers against oxygen for the insulating layers 280_1 and 280_3. This can prevent the conductive layer 220 and the conductive layer 240 from being oxidized and thus prevent high resistance. In the structure shown in FIG. 9A, the insulating layer 280_2 corresponds to the insulating layer 20 described in the first embodiment.

[0315] For example, it is preferable to use silicon nitride or aluminum oxide for the insulating layer 280_1 and the insulating layer 280_3, and to use silicon oxide for the insulating layer 280_2. Note that each of the insulating layer 280_1 and the insulating layer 280_3 may have a stacked structure of two or more layers.

[0316] The conductive layer 220 and the conductive layer 240 are conductive layers in contact with the oxide semiconductor layer 230, and therefore, it is preferable to use a conductive material that is not easily oxidized, a conductive material that maintains low electrical resistance even when oxidized, a metal oxide having conductivity (also referred to as an oxide conductor), or a conductive material that has a function of suppressing oxygen diffusion, for each of them. Examples of the conductive material include a conductive material containing nitrogen and a conductive material containing oxygen. This can suppress a decrease in the conductivity of the conductive layer 220 and the conductive layer 240.

[0317] By using a conductive material containing oxygen for the conductive layer 220, the conductive layer 220 can maintain its conductivity even if it absorbs oxygen. Similarly, by using a conductive material containing oxygen for the conductive layer 240, the conductive layer 240 can maintain its conductivity even if it absorbs oxygen. Furthermore, even when an insulator containing oxygen such as hafnium oxide is used for the insulating layer 210, the conductive layer 220 is suitable because it can maintain its conductivity. For example, ITO, ITSO, In-Zn oxide, etc. are preferably used for each of the conductive layer 220 and the conductive layer 240.

[0318] When the conductive layer 220 and the conductive layer 240 each have a stacked structure, by using a conductive material containing oxygen for a layer in the stacked structure that has the largest contact area with the oxide semiconductor layer 230, the contact resistance between the conductive layer 220 and the oxide semiconductor layer 230 and between the conductive layer 240 and the oxide semiconductor layer 230 can be reduced.

[0319] 9A shows an example in which the conductive layer 220_1 has a two-layer structure including a conductive layer 220_11 and a conductive layer 220_12 on the conductive layer 220_11. In other words, the conductive layer 220 shown in FIG. 9A has a three-layer structure including a conductive layer 220_11, a conductive layer 220_12 on the conductive layer 220_11, and a conductive layer 220_2 on the conductive layer 220_12. In this case, it is preferable to use, for example, a conductive material that is difficult to oxidize or a conductive material that has a function of suppressing oxygen diffusion as the conductive layer 220_11, a material with high conductivity as the conductive layer 220_12, and a conductive material containing oxygen (more preferably, an oxide conductor) as the conductive layer 220_2. Specifically, it is preferable to use titanium nitride for the conductive layer 220_11, tungsten for the conductive layer 220_12, and an oxide conductor (e.g., ITO, ITSO, or In-Zn oxide) for the conductive layer 220_2. In this case, the titanium nitride film is in contact with the insulating layer 210, and the oxide conductive film is in contact with the oxide semiconductor layer 230. Furthermore, the oxide conductor is used in the layer closest to the channel formation region of the oxide semiconductor layer 230. Compared with tungsten, the oxide conductor has lower contact resistance with the oxide semiconductor layer 230, thereby shortening the current path between the source and drain and increasing the on-current of the transistor 200A. With this structure, the conductive layer 220 can maintain conductivity even when in contact with the oxide semiconductor layer 230. Furthermore, when an oxide insulating layer is used for the insulating layer 210, excessive oxidation of the conductive layer 220 by the insulating layer 210 can be suppressed. Furthermore, when a metal material (tungsten in this example) having higher conductivity than an oxide conductor and titanium nitride is used for the conductive layer 220_12, the conductivity of the conductive layer 220 can be increased.

[0320] The conductive layer 240 shown in FIG. 5A has a two-layer structure including a conductive layer 240_1 and a conductive layer 240_2 on the conductive layer 240_1. In this case, for example, it is preferable to use a conductive material containing oxygen for the conductive layer 240_2 and a material having higher conductivity than the conductive layer 240_2 for the conductive layer 240_1. Specifically, it is preferable to use an oxide conductor (e.g., ITO, ITSO, or In—Zn oxide) for the conductive layer 240_2 and tungsten for the conductive layer 240_1. Ruthenium, titanium nitride, tantalum nitride, or the like may also be used for the conductive layer 240_1. By using an oxide conductor for the conductive layer 240_2 that is mainly in contact with the oxide semiconductor layer 230, the contact resistance with the oxide semiconductor layer 230 can be reduced. Furthermore, by using a material having higher conductivity than an oxide conductor for the layers constituting the conductive layer 240, the conductivity of the conductive layer 240 can be increased.

[0321] Note that the conductive layer 240_1 may be formed using a conductive material containing oxygen, and the conductive layer 240_2 may be formed using a material having higher conductivity than that of the conductive layer 240_1. In this case, an oxide conductor is used for the layer of the conductive layer 240 that is closest to the channel formation region of the oxide semiconductor layer 230. Therefore, the current path between the source and the drain can be shortened, and the on-state current of the transistor 200A can be increased.

[0322] 5A has a two-layer structure including a conductive layer 260_1 and a conductive layer 260_2 over the conductive layer 260_1. In this case, for example, titanium nitride is preferably used for the conductive layer 260_1 and tungsten is preferably used for the conductive layer 260_2. Alternatively, tantalum nitride is preferably used for the conductive layer 260_1 and copper is preferably used for the conductive layer 260_2. With such a structure, the conductivity of the conductive layer 260 can be increased.

[0323] The conductive layer 260 may also have a stacked structure of three or more layers, such as a three-layer structure of a tantalum nitride film, a titanium nitride film on the tantalum nitride film, and a tungsten film on the titanium nitride film.

[0324] 9A, the semiconductor device of one embodiment of the present invention may include an insulating layer 283 over the transistor 200A. Specifically, the insulating layer 283 may be provided over the conductive layer 260 and the insulating layer 250.

[0325] A barrier insulating layer against hydrogen is preferably used for the insulating layer 283. With such a structure, diffusion of hydrogen from above the transistor 200A to the oxide semiconductor layer 230 can be suppressed.

[0326] 5A, both the conductive layer 260_1 and the conductive layer 260_2 are located in the opening 290. Depending on the width of the opening 290 and the thicknesses of the oxide semiconductor layer 230, the insulating layer 250, and the conductive layer 260_1, the conductive layer 260_1 may be provided in the opening 290, and the conductive layer 260_2 may be provided so as to overlap with the opening 290 (see FIG. 9B).

[0327] 9(A) shows a configuration in which the side edge of the conductive layer 240 and the side edge of the insulating layer 280 are aligned or approximately aligned within the opening 290, but the present invention is not limited to this. For example, the side surface of the conductive layer 240 and the side surface of the insulating layer 280 may be discontinuous within the opening 290. Furthermore, the inclination of the side surface of the conductive layer 240 and the inclination of the side surface of the insulating layer 280 within the opening 290 may differ from each other. In this case, part of the side wall of the opening 290 has a tapered shape.

[0328] 10(A) and 10(B) show examples in which at least a portion of the sidewall of the opening 290 is tapered. Fig. 10(A) shows an example in which the side surface of the conductive layer 240 in the opening 290 is tapered, and Fig. 10(B) shows an example in which the side surface of the conductive layer 240 and the side surface of the insulating layer 280 in the opening 290 are both tapered.

[0329] By tapering the sidewall of the opening 290, the coverage of the oxide semiconductor layer 230, the insulating layer 250, and the like can be improved, and defects such as voids can be reduced. When the sidewall of the opening 290 is tapered, for example, the taper angle (angle θ240) of the side surface of the conductive layer 240 in the opening 290 and the taper angle (angle θ280) of the side surface of the insulating layer 280 in the opening 290 are preferably 45 degrees or more and less than 90 degrees. Specifically, a taper angle of 80 degrees or more and less than 90 degrees is preferable, as described above, because this allows for miniaturization or high integration of the semiconductor device. Furthermore, a taper angle of 45 degrees or more or 50 degrees or more and less than 80 degrees, 75 degrees or less, 70 degrees or less, 65 degrees or less, or 60 degrees or less is preferable, because this improves the coverage of the film formed in the opening 290.

[0330] Also, for example, it is preferable that angle θ240 is smaller than angle θ280. With such a configuration, coverage of the oxide semiconductor layer 230 and the like on the side surface of the conductive layer 240 in the opening 290 is improved, and defects such as voids can be reduced. Furthermore, when the insulating layer 280 has a stacked structure, the inclination of the side surface of each layer in the opening 290 may be different. Similarly, when the conductive layer 240 has a stacked structure, the inclination of the side surface of each layer in the opening 290 may be different.

[0331] 11(A), the oxide semiconductor layer 230 may have a different ratio between the film thickness (hereinafter referred to as the first film thickness) of a portion where the top surface of the conductive layer 240 or the conductive layer 220 is to be formed and the film thickness (hereinafter referred to as the second film thickness) of a portion where the sidewall of the opening 290 is to be formed. For example, when a portion of the oxide semiconductor layer 230 is formed by a sputtering method, the oxide semiconductor layer 230 may have a different ratio between the first film thickness and the second film thickness. For example, as shown in FIG. 11(A), the ratio of the second film thickness to the first film thickness may be less than 1, less than 0.8, or less than 0.5. In particular, the closer the angle θ280 is to 90 degrees, the smaller the ratio of the second film thickness to the first film thickness in the oxide semiconductor layer 230 tends to be.

[0332] 11B, the recess of the conductive layer 220_2 preferably has a curved portion. When the recess has a curved portion, the portions of the oxide semiconductor layer 230, the insulating layer 250, and the like provided on the recess near the recess may also have a curved portion. In other words, the portion may have a curved or concave surface in cross-sectional view. Furthermore, the portion may not have a corner (right angle or acute angle) in cross-sectional view. This reduces electric field concentration on the insulating layer 250 near the recess, improves the breakdown voltage of the transistor 200A, and suppresses electrostatic breakdown of the transistor 200A. Therefore, the reliability of the semiconductor device can be improved.

[0333] 12A to 27C, examples of transistor configurations that are partially different from the transistor 200A will be described. Note that descriptions of parts that overlap with the above will be omitted, and only the differences will be described in detail. Furthermore, even if components differ in position or shape, if their functions are the same, they may be denoted by the same reference numerals and their descriptions may be omitted.

[0334] [Transistor 200B] 12(A) is a plan view of a semiconductor device having a transistor 200B. FIG. 12(B) is a cross-sectional view taken along dashed line A1-A2 in FIG. 12(A). FIG. 12(C) is a cross-sectional view taken along dashed line A3-A4 in FIG. 12(A). For a cross-sectional view taken along dashed line A5-A6 in FIG. 12(B), refer to FIG. 4(D). FIG. 13(A) shows an enlarged view of FIG. 12(B).

[0335] The semiconductor device shown in Figures 12(A) to 12(C) includes an insulating layer 210 over a substrate (not shown), a transistor 200B over the insulating layer 210, an insulating layer 280 over the insulating layer 210, an insulating layer 284, an insulating layer 285 over the insulating layer 284, and a conductive layer 265 over the transistor 200B, the insulating layer 284, and the insulating layer 285.

[0336] The semiconductor device shown in FIGS. 12A to 12C differs from the semiconductor device shown in FIGS. 4A to 4D in that a conductive layer 265, an insulating layer 284, and an insulating layer 285 are included.

[0337] The conductive layer 265 functions as a gate wiring. The conductive layer 265 can be formed using a material that can be used for the conductive layer 260. For example, a high-melting-point material that has both heat resistance and conductivity, such as tungsten or molybdenum, can be used for the conductive layer 265. Alternatively, a low-resistance conductive material, such as aluminum or copper, can be used. By using a low-resistance conductive material, the wiring resistance can be reduced.

[0338] The transistor 200B includes a conductive layer 220, a conductive layer 240, an oxide semiconductor layer 230, an insulating layer 250, and a conductive layer 260. In the transistor 200B, the stacked structure from the conductive layer 220 to the insulating layer 250 is similar to that of the transistor 200A described above, and therefore detailed description thereof will be omitted.

[0339] 12(B) and 12(C), the insulating layer 284 is provided so as to be located on the insulating layer 250. Furthermore, the insulating layer 284 is provided with an opening 270 that reaches the insulating layer 250 at a position that overlaps with the opening 290.

[0340] The conductive layer 260 is provided to fill the opening 290 and the opening 270. The conductive layer 260 is provided on the insulating layer 250 and is in contact with the insulating layer 250 within the opening 270. The conductive layer 260 has a portion that faces the oxide semiconductor layer 230 in the opening 290 with the insulating layer 250 interposed therebetween, and a portion that is located within the opening 270.

[0341] 12B and 12C show an example in which both the conductive layer 260_1 and the conductive layer 260_2 are provided in the opening 290. Note that when the width of the opening 290 and the width of the opening 270 are small, only the conductive layer 260_1 may be provided in the opening 290, and the conductive layer 260_1 and the conductive layer 260_2 may be provided in the opening 270. Alternatively, only the conductive layer 260_1 may be provided in the opening 270.

[0342] The portion of the conductive layer 265 that does not overlap with the opening 290 is mainly located on the insulating layer 285. Therefore, the conductive layer 265 mainly overlaps with the conductive layer 240 via the insulating layer 284 and the insulating layer 285. This increases the physical distance between the conductive layer 265 and the conductive layer 240, thereby reducing the parasitic capacitance that occurs between the conductive layer 265 and the conductive layer 240. Note that the conductive layer 240 and the conductive layer 265 may have an overlapping portion without the insulating layer 285 being therebetween.

[0343] 13(A) shows an example in which the width of the opening 270 is smaller than the width D of the opening 290. The smaller the width of the opening 270, the greater the physical distance between the conductive layer 240 and the conductive layer 260 can be, and the smaller the parasitic capacitance that occurs between the conductive layer 240 and the conductive layer 260 can be, which is preferable. For example, the width of the opening 270 is preferably the same as or smaller than the width of the opening 290.

[0344] The conductive layer 265 is provided over the conductive layer 260 and is in contact with the top surface of the conductive layer 260. It can also be said that the conductive layer 260 and the conductive layer 265 are connected to each other. The conductive layer 265 may be considered a component of the transistor 200B. The height of the top surface of the conductive layer 260 and the height of the top surface of the insulating layer 285 are the same or approximately the same.

[0345] The transistor 200B has a structure in which parasitic capacitance generated between the other of the source electrode and the drain electrode and the gate wiring is reduced, thereby improving the frequency characteristics of a circuit including the transistor.

[0346] In this embodiment, an example in which opening 270 is circular in plan view has been shown, but the present invention is not limited to this. Shapes that can be applied to opening 270 are the same as the shapes that can be applied to opening 290 described above.

[0347] Furthermore, the width of the opening 270 may vary in the depth direction. In particular, the width of the opening 270 used here is the maximum width of the opening 270 provided in the insulating layer 284 in a cross-sectional view.

[0348] The insulating layer 284 preferably has a function of capturing or fixing hydrogen. With such a structure, diffusion of hydrogen from above the insulating layer 284 to the oxide semiconductor layer 230 can be suppressed, and further, hydrogen contained in the oxide semiconductor layer 230 can be captured or fixed. Therefore, the hydrogen concentration in the oxide semiconductor layer 230 can be reduced. The insulating layer 284 can be formed using aluminum oxide, hafnium oxide, hafnium zirconium oxide, hafnium silicate, or the like.

[0349] The insulating layer 284 can also serve as a barrier insulating layer against hydrogen, which can suppress diffusion of hydrogen from above the insulating layer 284 to the oxide semiconductor layer 230. Silicon nitride and silicon nitride oxide are suitable for the insulating layer 284 because they are less permeable to oxygen and hydrogen, respectively.

[0350] When the insulating layer 284 includes a silicon nitride film, the silicon nitride film is preferably formed by a sputtering method. The sputtering method does not require the use of hydrogen-containing molecules in the film formation gas, and therefore can reduce the hydrogen concentration in the insulating layer 284. Furthermore, by forming the insulating layer 284 by a sputtering method, a silicon nitride film with high density can be formed.

[0351] Alternatively, the insulating layer 284 may have a stacked structure of an insulating layer having a function of capturing or fixing hydrogen and a barrier insulating layer against hydrogen. For example, the insulating layer 284 may have a stacked film of an aluminum oxide film and a silicon nitride film over the aluminum oxide film.

[0352] The insulating layer 285 functions as an interlayer film, and therefore is preferably made of the above-mentioned material having a low relative dielectric constant. For example, the insulating layer 285 preferably includes a silicon oxide film.

[0353] Note that a structure similar to that of the transistor 200A can also be applied to the transistor 200B. An example in which the structure shown in FIG. 9A is applied to the semiconductor device shown in FIG. 13A is shown in FIG. 13B. In FIG. 13B, the insulating layer 283 is provided over the insulating layer 285 and the conductive layer 265.

[0354] [Transistor 200C] Fig. 14(A) is a plan view of a semiconductor device having a transistor 200C. Fig. 14(B) is a cross-sectional view taken along dashed line A1-A2 in Fig. 14(A). Fig. 14(C) is a cross-sectional view taken along dashed line A3-A4 in Fig. 14(A). Fig. 14(D) is a cross-sectional view taken along dashed line A5-A6 in Fig. 14(B).

[0355] An enlarged view of Fig. 14(B) is shown in Fig. 15(A), and an enlarged view of Fig. 14(D) is shown in Fig. 15(B). Figs. 16(A) and 16(B) are cross-sectional views taken along the dashed line A1-A2 in Fig. 14(A). Figs. 16(A) and 16(B) are examples of enlarged views of Fig. 14(B), and show examples of the configuration of each layer in more detail.

[0356] The semiconductor device illustrated in FIGS. 14A to 14D includes an insulating layer 210 over a substrate (not shown), a transistor 200C over the insulating layer 210, and an insulating layer 280 over the insulating layer 210.

[0357] The transistor 200C includes a conductive layer 220, a conductive layer 240, an insulating layer 225, an oxide semiconductor layer 230, an insulating layer 250, and a conductive layer 260.

[0358] The transistor 200C shown in FIGS. 14A to 14D differs from the transistor 200A shown in FIGS. 4A to 4D in that an insulating layer 225 is included.

[0359] The oxide semiconductor layer 230, the insulating layer 225, the insulating layer 250, and the conductive layer 260 included in the transistor 200C correspond to the oxide semiconductor layer 30, the insulating layer 20, the insulating layer 50, and the conductive layer 60, respectively, described in Embodiment 1. Therefore, for the structures, materials, and the like of the oxide semiconductor layer 230, the insulating layer 225, the insulating layer 250, and the conductive layer 260, reference can be made to the structures, materials, and the like of the oxide semiconductor layer 30, the insulating layer 20, the insulating layer 50, and the conductive layer 60, described in Embodiment 1.

[0360] As shown in FIG. 14D, the transistor 200C has a structure in which the insulating layer 225 is provided between the insulating layer 280 and the oxide semiconductor layer 230 in a plan view.

[0361] Since the insulating layer 225 is a layer provided inside the opening 290, it is preferably formed by CVD or ALD, and more preferably by ALD, which allows the insulating layer 225 to be provided with good coverage.

[0362] As shown in FIG. 14B and other drawings, the conductive layer 220_2 has a first recess and a second recess located outside the first recess. The first recess is deeper than the second recess. In other words, the bottom surface of the first recess is located lower (closer to the insulating layer 210) than the bottom surface of the second recess. When forming the opening 290, the second recess is provided in the conductive layer 220_2. Thereafter, when processing the insulating layer 225, the first recess is provided in the conductive layer 220_2. Therefore, in FIG. 14B and other drawings, the side edge of the second recess and the side edge of the insulating layer 280 at the opening 290 coincide or approximately coincide, and the side edge of the first recess and the edge of the insulating layer 225 on the oxide semiconductor layer 230 side coincide or approximately coincide. Hereinafter, the first recess and the second recess may be collectively referred to as recesses.

[0363] 14B and the like, the insulating layer 225 is in contact with the bottom surface and side surfaces of the second recessed portion of the conductive layer 220, and is in contact with the side surfaces of the insulating layer 280 and the conductive layer 240 in the opening 290. The oxide semiconductor layer 230 is in contact with the bottom surface and side surfaces of the first recessed portion of the conductive layer 220, the insulating layer 225, and the top surface of the conductive layer 240_2. The insulating layer 250 is located inside the oxide semiconductor layer 230 in the opening 290, and the conductive layer 260 is located inside the insulating layer 250 in the opening 290.

[0364] 15(A), the shortest distance Tc from the upper surface of the insulating layer 210 to the upper surface of the conductive layer 220_2 that contacts the insulating layer 280 is preferably longer than the shortest distance Ta from the upper surface of the insulating layer 210 to the lower surface of the insulating layer 250. This increases the area where the side surface of the conductive layer 220_2 contacts the oxide semiconductor layer 230, thereby reducing the contact resistance between the conductive layer 220_2 and the oxide semiconductor layer 230. Therefore, a decrease in the on-current of the transistor 200C caused by the contact resistance between the conductive layer 220_2 and the oxide semiconductor layer 230 can be suppressed. Note that the shortest distance Ta can be determined based on the lower surface of the insulating layer 250 within the opening 290.

[0365] 15A, the shortest distance Tc is preferably equal to or greater than the shortest distance Tb from the upper surface of the insulating layer 210 to the lower surface of the conductive layer 260, and more preferably longer than the shortest distance Tb. This makes it easier to apply a gate electric field to the channel formation region of the oxide semiconductor layer 230, thereby improving the electrical characteristics of the transistor 200C. Furthermore, since the gate electric field is also easier to apply to the region of the oxide semiconductor layer 230 that is in contact with the conductive layer 220_2, the on-current of the transistor 200C can be increased. Furthermore, regardless of whether the conductive layer 220 or the conductive layer 240 is used as the drain electrode, the electrical characteristics of the transistor 200C can be improved. Note that the shortest distance Tb can be determined based on the lower surface of the conductive layer 260 within the opening 290.

[0366] Here, as shown in FIG. 15(A), the width (film thickness) of the insulating layer 225 is set to a width T SW Width T SW It is preferable that the width T SW By reducing the width T SW By increasing the width T SW is, for example, preferably 1 nm or more and 20 nm or less, more preferably 2 nm or more and 15 nm or less, and even more preferably 3 nm or more and 10 nm or less.

[0367] 15B also shows the channel width W of the transistor 200C. When the opening 290 is circular in plan view, the width D of the opening 290 corresponds to the diameter of the opening 290, and the channel width W is (D-2×T SW )×π”.

[0368] The channel length of the transistor 200C can be considered to be the distance between the source region and the drain region. In other words, the channel length of the transistor 200C can be said to be determined by the height of the insulating layer 225. In addition, the channel length of the transistor 200C can be said to be determined by the depth of the recess (specifically, the second recess) in the conductive layer 220, the thickness of the insulating layer 280 on the conductive layer 220, and the thickness of the conductive layer 240. When the channel length of the transistor 200C is considered to be the distance between the source region and the drain region, the channel length of the transistor 200C can be said to be the length L shown in FIG. 15(A).

[0369] 15A illustrates a configuration in which the conductive layer 220_2 has a first recess and a second recess, but the present invention is not limited to this. For example, as shown in FIG. 16A, the transistor 200C may have a configuration in which only the first recess is provided in the conductive layer 220_2.

[0370] A recess may be formed in the conductive layer 220_2 in one or both of the steps of forming the opening 290 and forming the insulating layer 225. The transistor 200C shown in Fig. 15(A) illustrates an example in which a recess is formed in the conductive layer 220_2 in both steps, whereas the transistor 200C shown in Fig. 16(A) illustrates an example in which a recess is not formed in the conductive layer 220_2 in the step of forming the opening 290, but is formed in the step of forming the insulating layer 225.

[0371] 16A, the insulating layer 225 is in contact with the side surface of the insulating layer 280, the side surface of the conductive layer 240, and the top surface of the conductive layer 220_2 in the opening 290. The oxide semiconductor layer 230 is in contact with the bottom surface and side surface of the recess of the conductive layer 220_2.

[0372] When a recess is formed in the conductive layer 220_2 in at least one of the processes of forming the opening 290 and forming the insulating layer 225, the height of the lower surface of the conductive layer 260 within the opening 290 can be lowered, making it easier for a gate electric field to be applied to the channel formation region of the oxide semiconductor layer 230, thereby improving the electrical characteristics of the transistor 200C.

[0373] When a recess is formed in the conductive layer 220_2 in the process of forming the insulating layer 225, the oxide semiconductor layer 230 can contact the bottom and side surfaces of the recess in the conductive layer 220_2, increasing the contact area between the oxide semiconductor layer 230 and the conductive layer 220_2 and reducing the contact resistance between the oxide semiconductor layer 230 and the conductive layer 220, which is preferable.

[0374] Alternatively, for example, as shown in FIG. 16B, a transistor 200C may have a structure in which the insulating layer 225 does not cover the side surfaces of the conductive layer 240_2.

[0375] 16(B) is in contact with the bottom and side surfaces of the recess of the conductive layer 220, and is in contact with the side surface of the insulating layer 280 within the opening 290. The insulating layer 225 is in contact with part of the side surface of the conductive layer 240_1, but is not in contact with the side surface of the conductive layer 240_2. The insulating layer 225 may be in contact with one or more of the side surface of the insulating layer 280, the side surface of the conductive layer 240_1, and the side surface of the conductive layer 240_2 within the opening 290, or may cover part or all of each side surface.

[0376] When at least a portion of the side surface of the conductive layer 240_2 is not covered with the insulating layer 225, that portion is in contact with the oxide semiconductor layer 230. This increases the area of ​​contact between the oxide semiconductor layer 230 and the conductive layer 240, and reduces the contact resistance between the oxide semiconductor layer 230 and the conductive layer 240. Similarly, when the insulating layer 225 does not cover the side surface of the conductive layer 240_2 and also does not cover at least a portion of the side surface of the conductive layer 240_1, that portion is in contact with the oxide semiconductor layer 230. This increases the area of ​​contact between the oxide semiconductor layer 230 and the conductive layer 240, and reduces the contact resistance between the oxide semiconductor layer 230 and the conductive layer 240.

[0377] 15A shows an example in which the insulating layer 225 has a single-layer structure. Note that the insulating layer 225 can have a stacked structure of two or more layers. For example, as shown in FIG. 17, the insulating layer 225 can have a two-layer structure of an insulating layer 225_1 and an insulating layer 225_2.

[0378] 17 shows an example in which the insulating layer 225 is configured of two layers: an insulating layer 225_1 in contact with the insulating layer 280, and an insulating layer 225_2 located between the insulating layer 225_1 and the oxide semiconductor layer 230. The insulating layer 225 shown in FIG. 17 can be said to have a two-layer structure of the insulating layer 225_1 and the insulating layer 225_2 on the insulating layer 225_1.

[0379] The insulating layer 225_1 provided in contact with the side surface of the insulating layer 280 in the opening 290 can be a barrier insulating layer against hydrogen, and the insulating layer 225_2 provided in contact with the oxide semiconductor layer 230 can be an insulating layer having a region containing excess oxygen. With such a structure, one or both of oxygen vacancies and hydrogen in the oxide semiconductor layer 230 can be reduced. Therefore, the electrical characteristics of the transistor can be improved, and the reliability of the transistor can be enhanced. For example, it is preferable to use silicon nitride for the insulating layer 225_1 and silicon oxide or silicon oxynitride for the insulating layer 225_2. The thicknesses of the insulating layers 225_1 and 225_2 are 2 nm and 2 nm, respectively.

[0380] As described above, by surrounding the oxide semiconductor layer 230 with a barrier insulating layer against hydrogen in a ring shape and providing an insulating layer having a region containing excess oxygen near the oxide semiconductor layer 230, it is possible to reduce one or both of oxygen vacancies and impurities in the oxide semiconductor layer 230. Therefore, the electrical characteristics of the transistor can be improved, and the reliability of the transistor can be improved.

[0381] The insulating layer 225_1 may be made of an insulating material described in the later-described [Insulating Layer] section, and the insulating layer 225_2 may be made of a material applicable to the insulating layer 20 described in the first embodiment.

[0382] Here, another structural example of the insulating layer 225 shown in FIG. 17 is shown in FIG. 18(A) and FIG. 18(B).

[0383] In the transistor 200C shown in Figure 18(A), an example is shown in which the insulating layer 225_1 is provided in contact with a portion of the bottom surface and the side surface of the recess formed by the conductive layer 220_2, and the insulating layer 225_2 is located inside the insulating layer 225_1 in the opening 290 and is provided in contact with another portion of the bottom surface of the recess formed by the conductive layer 220_2.

[0384] 18B, the conductive layer 220_2 has a first recess, a second recess located outside the first recess, and a third recess located outside the second recess. The first recess is deeper than the second recess, and the second recess is deeper than the third recess. The third recess is provided in the conductive layer 220_2 when the opening 290 is formed, and then the second recess is provided in the conductive layer 220_2 when the insulating layer 225_1 is processed, and then the first recess is provided in the conductive layer 220_2 when the insulating layer 225_2 is processed. Therefore, in FIG. 18(B), the side edge of the third recess and the side edge of the insulating layer 280 at the opening 290 coincide or approximately coincide, the side edge of the second recess and the end of the insulating layer 225_1 on the insulating layer 225_2 side coincide or approximately coincide, and the side edge of the first recess and the end of the insulating layer 225_2 on the oxide semiconductor layer 230 side coincide or approximately coincide.

[0385] In the transistor 200C shown in Figure 18(B), the insulating layer 225_1 is provided in contact with the bottom and side surfaces of the third recess of the conductive layer 220_2, and the insulating layer 225_2 is provided in contact with the bottom and side surfaces of the second recess of the conductive layer 220_2.

[0386] 18A or 18B can be formed by providing the insulating layer 225_1 on the sidewall of the opening 290 and then forming and processing an insulating film to be the insulating layer 225_2. Compared to the transistor 200C shown in FIG. 17, the region where the insulating layer 225_1 is in contact with the oxide semiconductor layer 230 is reduced, and a configuration in which the insulating layer 225_2 is in contact with the oxide semiconductor layer 230 can be realized.

[0387] Note that the same structure as at least one of the transistors 200A and 200B can also be applied to the transistor 200C. Fig. 19A shows an example in which the structure shown in Fig. 9A is applied to the semiconductor device shown in Fig. 15A. Fig. 19B shows an example in which the structure shown in Fig. 9A is applied to the semiconductor device shown in Fig. 17.

[0388] [Transistor 200D] Fig. 20(A) is a plan view of a semiconductor device having a transistor 200D. Fig. 20(B) is a cross-sectional view taken along dashed line A1-A2 in Fig. 20(A). Fig. 20(C) is a cross-sectional view taken along dashed line A3-A4 in Fig. 20(A). Fig. 20(D) is a cross-sectional view taken along dashed line A5-A6 in Fig. 20(B). Fig. 21(A) shows an enlarged view of Fig. 20(B).

[0389] The semiconductor device shown in Figures 20(A) to 20(D) includes an insulating layer 210 over a substrate (not shown), a transistor 200D over the insulating layer 210, an insulating layer 280 over the insulating layer 210, and an insulating layer 281 over the insulating layer 280.

[0390] The transistor 200D includes a conductive layer 220, a conductive layer 255, a conductive layer 240, an insulating layer 225, an oxide semiconductor layer 230, an insulating layer 250, and a conductive layer 260.

[0391] 20A to 20D differ from the semiconductor device illustrated in FIGS. 4A to 4D mainly in that the semiconductor device includes an insulating layer 225, a conductive layer 255, and an insulating layer 281. The transistor 200D illustrated in FIGS. 20A to 20D mainly differs from the transistor 200C illustrated in FIGS. 14A to 14D mainly in that the transistor 200D includes the conductive layer 255 and the insulating layer 281.

[0392] The conductive layer 255 is located on the insulating layer 280, and the insulating layer 281 is located on the conductive layer 255 and the insulating layer 280. In addition, the conductive layer 240_1 is located on the insulating layer 281.

[0393] As shown in FIG. 21A, an opening 290 reaching the conductive layer 220 is provided in the insulating layer 280, the conductive layer 255, the insulating layer 281, and the conductive layer 240.

[0394] In the transistor 200D, the oxide semiconductor layer 230 functions as a semiconductor layer, the conductive layer 260 functions as a first gate electrode, the insulating layer 250 functions as a first gate insulating layer, the conductive layer 220 functions as one of the source electrode and the drain electrode, the conductive layer 240 functions as the other of the source electrode and the drain electrode, the conductive layer 255 functions as a second gate electrode, and the insulating layer 225 functions as a second gate insulating layer.

[0395] The oxide semiconductor layer 230, the insulating layer 225, the insulating layer 250, and the conductive layer 260 included in the transistor 200D correspond to the oxide semiconductor layer 30, the insulating layer 20, the insulating layer 50, and the conductive layer 60, respectively, described in Embodiment 1. Therefore, for the structures, materials, and the like of the oxide semiconductor layer 230, the insulating layer 225, the insulating layer 250, and the conductive layer 260, reference can be made to the structures, materials, and the like of the oxide semiconductor layer 30, the insulating layer 20, the insulating layer 50, and the conductive layer 60, described in Embodiment 1.

[0396] Alternatively, the oxide semiconductor layer 230, the insulating layer 250, the insulating layer 225, and the conductive layer 255 included in the transistor 200D may correspond to the oxide semiconductor layer 30, the insulating layer 20, the insulating layer 50, and the conductive layer 60, respectively, described in Embodiment 1. In this case, the structures, materials, and the like of the oxide semiconductor layer 30, the insulating layer 20, the insulating layer 50, and the conductive layer 60, described in Embodiment 1, can be referred to for the structures, materials, and the like of the oxide semiconductor layer 230, the insulating layer 250, the insulating layer 225, and the conductive layer 255.

[0397] The oxide semiconductor layer 230 has a region that overlaps with the conductive layer 255 with the insulating layer 225 interposed therebetween and with the conductive layer 260 with the insulating layer 250 interposed therebetween. At least part of this region functions as a channel formation region of the transistor 200D.

[0398] Since the transistor 200D includes a conductive layer functioning as a backgate electrode, the threshold voltage of the transistor 200D can be controlled by the potential applied to the conductive layer. Therefore, by controlling the threshold voltage, a normally-off transistor can be easily realized.

[0399] In the transistor 200D, one of the conductive layer 255 and the conductive layer 260 can be used as a gate electrode and the other can be used as a back gate electrode. The transistor 200D may have a particularly preferable structure in which the conductive layer 260 is used as a gate electrode and the conductive layer 255 is used as a back gate electrode. By using the conductive layer 260, which has a wider region facing the oxide semiconductor layer 230 than the conductive layer 255, as the gate electrode, a gate electric field can be applied to the oxide semiconductor layer 230 more efficiently, which may improve the electrical characteristics of the transistor. When the conductive layer 260 functions as a gate electrode and the conductive layer 255 functions as a back gate electrode, the insulating layer 250 functions as a gate insulating layer and the insulating layer 225 functions as a back gate insulating layer.

[0400] The conductive layer 255 can be made of a conductive material that can be applied to the conductive layer 260 .

[0401] The insulating layer 281 functions as an interlayer film. The insulating layer 281 can be formed using an insulating material that can be used for the insulating layer 280.

[0402] Note that the same structure as at least one of the transistors 200A to 200C can also be applied to the transistor 200D. Figure 21B shows an example in which the structure shown in Figure 9A is applied to the semiconductor device shown in Figure 21A.

[0403] FIG. 21A shows an example in which the insulating layer 281 has a single-layer structure. Note that the insulating layer 281 can have a stacked structure of two or more layers. For example, as shown in FIG. 21B, the insulating layer 281 can have a three-layer structure including an insulating layer 281_1, an insulating layer 281_2 on the insulating layer 281_1, and an insulating layer 281_3 on the insulating layer 281_2. In this case, it is preferable to use the above-described material with a low relative dielectric constant for the insulating layer 281_2, and to use barrier insulating layers against oxygen for the insulating layers 281_1 and 281_3. This can prevent the conductive layer 255 and the conductive layer 240 from being oxidized and prevent high resistance.

[0404] In the transistors 200A to 200D, at least some of the components of the transistors are provided in the opening 290 that is circular in plan view, but the present invention is not limited to this. At least some of the components of the transistors can be provided in a groove that is formed to extend.

[0405] In this specification and the like, a groove can be rephrased as a slit or a trench. Also, a groove portion can be rephrased as a slit portion or a trench portion. Note that a groove portion may also be rephrased as a slit or a trench.

[0406] [Transistor 200E] Fig. 22(A) is a plan view of a semiconductor device having a transistor 200E. Fig. 22(B) is a cross-sectional view taken along dashed line A1-A2 in Fig. 22(A). Fig. 22(C) is a cross-sectional view taken along dashed line A3-A4 in Fig. 22(A). Fig. 22(D) is a cross-sectional view taken along dashed line A5-A6 in Fig. 22(B).

[0407] 22A to 22D includes an insulating layer 210 over a substrate (not shown), a transistor 200E over the insulating layer 210, and an insulating layer 280 over the insulating layer 210. The semiconductor device also includes a conductive layer 243a, a conductive layer 243b, and a conductive layer 246. Similarly to the semiconductor device shown in FIG. 9A, the semiconductor device also includes an insulating layer 283 over the transistor 200E. Similarly to the semiconductor device shown in FIGS. 12A to 12C, the semiconductor device also includes an insulating layer 285. The insulating layer 285 is provided over the insulating layer 283.

[0408] The transistor 200E includes a conductive layer 220, a conductive layer 240a and a conductive layer 240b over an insulating layer 280, an oxide semiconductor layer 230, an insulating layer 250, and a conductive layer 260.

[0409] In the transistor 200E, the oxide semiconductor layer 230 functions as a semiconductor layer, the conductive layer 260 functions as a gate electrode, the insulating layer 250 functions as a gate insulating layer, the conductive layer 220 functions as one of a source electrode and a drain electrode, and the conductive layer 240a and the conductive layer 240b function as the other of the source electrode and the drain electrode.

[0410] 22(A) to 22(D), the insulating layer 280 has a groove 291 that reaches the conductive layer 220. The groove 291 extends in the X direction. The groove 291 of the insulating layer 280 corresponds to the groove 91 described in the first embodiment.

[0411] 22A to 22D differs from the transistor 200A shown in FIGS. 4A to 4D in that some components of the transistor are provided in a groove 291 instead of an opening 290. The transistor 200E also differs from the transistor 200A shown in FIGS. 4A to 4D in that the conductive layer 240 is separated into a conductive layer 240a and a conductive layer 240b by the groove 291.

[0412] The oxide semiconductor layer 230 , the insulating layer 250 , and the conductive layer 260 are each disposed so that at least a portion thereof is located within the groove 291 .

[0413] The oxide semiconductor layer 230 is provided in an island shape. The oxide semiconductor layer 230 is provided so as to follow part of the bottom and part of the sidewall of the groove 291. The oxide semiconductor layer 230 has a portion in contact with the top surface of the conductive layer 240, a portion in contact with the side surface of the conductive layer 240 on the groove 291 side, and a portion in contact with the bottom surface and side surface of the recess of the conductive layer 220 in the groove 291.

[0414] The insulating layer 250 is provided to cover the oxide semiconductor layer 230. The insulating layer 250 is provided on the insulating layer 280 to cover the top surface and side surfaces of the oxide semiconductor layer 230 and the side surfaces of the conductive layer 240.

[0415] The conductive layer 260 is provided so as to fill at least a part of the groove 291. Therefore, the conductive layer 260 is provided so as to extend in the direction in which the groove 291 extends.

[0416] In the transistor 200E, a channel is also formed along the sidewall of the groove 291.

[0417] Openings reaching the conductive layer 240a are provided in the insulating layers 285, 283, 250, and the oxide semiconductor layer 230, and a conductive layer 243a is provided in the openings. Openings reaching the conductive layer 240b are provided in the insulating layers 285, 283, 250, and the oxide semiconductor layer 230, and a conductive layer 243b is provided in the openings. The conductive layer 243a is in contact with the conductive layer 240a, and the conductive layer 243b is in contact with the conductive layer 240b.

[0418] The conductive layer 246 is provided on the insulating layer 285. The conductive layer 246 is connected to the conductive layer 240a via the conductive layer 243a, and is connected to the conductive layer 240b via the conductive layer 243b. The conductive layer 246 functions as wiring. The conductive layer 246 extends in the Y direction. In other words, the direction in which the conductive layer 246 extends intersects with the direction in which the groove portion 291 extends.

[0419] In the transistors 200A to 200D, the conductive layer 240 needs to have an extended width in the X direction (short side) larger than the width D of the opening 290. On the other hand, in the transistor 200E, the conductive layer 240a and the conductive layer 240b, which function as the other of the source electrode and the drain electrode, are connected to each other through the conductive layer 246. This allows the conductive layer 240a and the conductive layer 240b to have a smaller width in the X direction, for example, smaller than the width D1 of the groove 291 (see FIG. 22D). This allows miniaturization of the semiconductor device.

[0420] In a plan view, a side surface of the conductive layer 260 provided in the groove 291 faces a side surface of the oxide semiconductor layer 230 with the insulating layer 250 interposed therebetween. Therefore, the channel width of the transistor 200E is determined by the width D2 of the oxide semiconductor layer 230 (see FIG. 22D). The channel width of the transistor 200E can be calculated as "2×D2."

[0421] Note that in the transistors 200A to 200D, the oxide semiconductor layer 230 in the opening 290 does not need to be processed, which facilitates processing of the oxide semiconductor layer 230 and improves productivity of the semiconductor device.

[0422] In a plan view of the transistor 200E, a portion of the oxide semiconductor layer 230 located in the groove 291 does not have a curved surface. Therefore, distortion is unlikely to occur in a region of the oxide semiconductor layer 230 near the insulating layer 250, and deterioration in the crystallinity of the region can be suppressed. Note that the region includes a channel formation region.

[0423] Note that in a plan view of the transistors 200A to 200D, a portion of the oxide semiconductor layer 230 located in the opening 290 has a curved surface. However, the curvature of the curved surface can be reduced (the radius of curvature of the curved surface can be increased) by increasing the width of the opening 290 or by reducing the thickness of the oxide semiconductor layer 230. As a result, distortion occurring in a region of the oxide semiconductor layer 230 near the insulating layer 250 can be reduced, and deterioration in the crystallinity of the region can be suppressed.

[0424] 22A to 22D, the transistor 200E has a structure in which the height of the top surface of the conductive layer 260 is higher than the height of the top surface of the insulating layer 250. Note that the present invention is not limited to this. The height of the top surface of the conductive layer 260 may be the same as or approximately the same as the height of the top surface of the insulating layer 250, or may be lower than the height of the top surface of the insulating layer 250.

[0425] 23(A) to 23(C) will be used to describe modifications of the transistor 200E described with reference to FIGS. 22(A) to 22(D). FIG. 23(A) is a plan view of a semiconductor device including the transistor 200E. FIG. 23(B) is a cross-sectional view taken along dashed line A1-A2 in FIG. 23(A). FIG. 23(C) is a cross-sectional view taken along dashed line A3-A4 in FIG. 23(A). Note that FIG. 22(D) can be referred to for a cross-sectional view taken along dashed line A5-A6 in FIG. 23(B).

[0426] The transistor 200E shown in Figures 23(A) to 23(C) differs from the transistor 200E shown in Figures 22(A) to 22(D) in that the height of the top surface of the conductive layer 260 is lower than the height of the top surface of the insulating layer 250.

[0427] By configuring the top surface of the conductive layer 260 to be lower than the top surface of the insulating layer 250, the area where the conductive layer 260 faces the conductive layer 240a or the conductive layer 240b can be reduced, and the parasitic capacitance generated between the conductive layer 260 and the conductive layer 240a or the conductive layer 240b can be reduced. Furthermore, by configuring the above, the physical distance between the conductive layer 260 and the conductive layer 246 can be increased, and the parasitic capacitance generated between the conductive layer 260 and the conductive layer 246 can be reduced. Therefore, the frequency characteristics of a circuit using the transistor can be improved.

[0428] 22A to 22D, the cross-sectional area of ​​the conductive layer 260 functioning as a gate wiring can be increased, leading to reduced wiring resistance, and thus power consumption of the semiconductor device can be reduced.

[0429] 24(A) and 24(B) are schematic perspective views of a semiconductor device including the transistor 200E shown in FIGS. 23(A) to 23(C). FIG. 24(B) is a perspective view of a portion cut away from FIG. 24(A). In FIGS. 24(A) and 24(B), only the outlines of some components (such as interlayer insulating layers) are indicated by dashed lines.

[0430] Fig. 24(C) is a perspective view taken along the plane indicated by the dashed dotted line in Fig. 24(A). In Fig. 24(C), an oxide layer 227 is provided between the oxide semiconductor layer 230 and the insulating layer 280. In Fig. 24(C), arrows indicate oxygen diffusion paths.

[0431] 24C , even when the oxide layer 227 has a function of suppressing oxygen diffusion, oxygen can be supplied from the insulating layer 280 to the oxide semiconductor layer 230 through the insulating layer 250 by heat treatment, thereby reducing oxygen vacancies in the oxide semiconductor layer 230. Furthermore, by using an indium oxide film with high oxygen permeability for the oxide semiconductor layer 230, excess oxygen in the oxide semiconductor layer 230 can be discharged to the insulating layer 250, thereby reducing the amount of excess oxygen in the oxide semiconductor layer 230. Therefore, the electrical characteristics and reliability of the transistor 200E can be improved.

[0432] When the oxide layer 227 has a function of transmitting oxygen, oxygen can be supplied from the insulating layer 280 to the oxide semiconductor layer 230 through the oxide layer 227 or the insulating layer 250 by heat treatment, thereby reducing oxygen vacancies in the oxide semiconductor layer 230. Furthermore, by using an indium oxide film with high oxygen permeability for the oxide semiconductor layer 230, excess oxygen in the oxide semiconductor layer 230 can be discharged to the insulating layer 250, thereby reducing the amount of excess oxygen in the oxide semiconductor layer 230. Therefore, the electrical characteristics and reliability of the transistor 200E can be improved.

[0433] 22(A) to 22(D) illustrate a configuration in which the extension direction of the groove 291 coincides with the extension direction of the conductive layer 260 functioning as a gate wiring, but the present invention is not limited to this. For example, the extension direction of the groove 291 may intersect with the extension direction of the gate wiring.

[0434] [Transistor 200F] Fig. 25(A) is a plan view of a semiconductor device having a transistor 200F. Fig. 25(B) is a cross-sectional view taken along dashed line A1-A2 in Fig. 25(A). Fig. 25(C) is a cross-sectional view taken along dashed line A3-A4 in Fig. 25(A). Fig. 25(D) is a cross-sectional view taken along dashed line A5-A6 in Fig. 25(B).

[0435] 25A to 25D includes an insulating layer 210 over a substrate (not shown), a transistor 200F over the insulating layer 210, and an insulating layer 280 over the insulating layer 210. Similarly to the transistor 200B shown in FIGS. 12A to 12C, the semiconductor device also includes an insulating layer 285 and a conductive layer 265 over the insulating layer 285. The insulating layer 285 is provided over the insulating layer 250.

[0436] The transistor 200F includes a conductive layer 220, a conductive layer 240a, a conductive layer 240b, an oxide semiconductor layer 230, an insulating layer 250, and a conductive layer 260.

[0437] In the transistor 200F, the oxide semiconductor layer 230 functions as a semiconductor layer, the conductive layer 260 functions as a gate electrode, the insulating layer 250 functions as a gate insulating layer, the conductive layer 220 functions as one of a source electrode and a drain electrode, and the conductive layer 240a and the conductive layer 240b function as the other of the source electrode and the drain electrode.

[0438] 25(A) to 25(D) differ from the semiconductor device shown in Figures 22(A) to 22(D) mainly in that the semiconductor device includes a conductive layer 265 and does not include the insulating layer 283, the conductive layer 243a, the conductive layer 243b, and the conductive layer 246. The semiconductor device also differs from the semiconductor device shown in Figures 22(A) to 22(D) mainly in that the conductive layer 260 is provided in an island shape and that the conductive layer 240a and the conductive layer 240b are provided to extend.

[0439] The conductive layer 265 is provided to extend in the Y direction, and the conductive layer 240a and the conductive layer 240b are provided to extend in the X direction.

[0440] The conductive layer 260 is provided in an island shape. In a plan view, the outer periphery of the conductive layer 260 is located inside the outer periphery of the oxide semiconductor layer 230. Note that in a plan view, the outer periphery of the conductive layer 260 may overlap with a part of the outer periphery of the oxide semiconductor layer 230, or may be located outside the part of the outer periphery of the oxide semiconductor layer 230.

[0441] The conductive layer 265 contacts the conductive layer 260 .

[0442] In the YZ plane including the oxide semiconductor layer 230, the end of the oxide semiconductor layer 230 outside the groove 291 is located more inward than the end of the conductive layer 240 outside the groove 291 (see FIG. 25(B)). Note that in the YZ plane including the oxide semiconductor layer 230, the end of the oxide semiconductor layer 230 outside the groove 291 may coincide or approximately coincide with the end of the conductive layer 240 outside the groove 291, or may be located more outward than the end of the conductive layer 240 outside the groove 291.

[0443] The insulating layer 285 is provided on the insulating layer 250. The insulating layer 285 is also provided so as to fill in the portion of the groove 291 where the conductive layer 260 is not located.

[0444] 25(A) to 25(D), the physical distance between the conductive layer 260 and the conductive layer 240a or 240b can be increased, and the parasitic capacitance generated between the conductive layer 260 and the conductive layer 240a or 240b can be reduced. Furthermore, the physical distance between the conductive layer 265 and the conductive layer 240a or 240b can be increased, and the parasitic capacitance generated between the conductive layer 265 and the conductive layer 240a or 240b can be reduced. Therefore, the frequency characteristics of a circuit using the transistor can be improved.

[0445] 25A to 25D illustrate a structure in which the conductive layer 260 has a region facing the side surface of the conductive layer 240a with the oxide semiconductor layer 230 interposed therebetween and a region facing the side surface of the conductive layer 240b with the oxide semiconductor layer 230 interposed therebetween, but the present invention is not limited to this. For example, a first conductive layer facing the side surface of the conductive layer 240a with the oxide semiconductor layer 230 interposed therebetween and a second conductive layer facing the side surface of the conductive layer 240b with the oxide semiconductor layer 230 interposed therebetween may be provided.

[0446] [Transistor 200Ga and Transistor 200Gb] Fig. 26(A) is a plan view of a semiconductor device having two transistors. Fig. 26(B) is a cross-sectional view taken along dashed line A1-A2 in Fig. 26(A). Fig. 26(C) is a cross-sectional view taken along dashed line A5-A6 in Fig. 26(B).

[0447] The semiconductor device illustrated in FIGS. 26A to 26C includes an insulating layer 210 over a substrate (not shown), a transistor 200Ga and a transistor 200Gb over the insulating layer 210, and an insulating layer 280 over the insulating layer 210.

[0448] The transistor 200Ga has a conductive layer 220a, a conductive layer 240a on the insulating layer 280, an oxide semiconductor layer 230a, an insulating layer 250a on the oxide semiconductor layer 230a, and a conductive layer 260a on the insulating layer 250a. The transistor 200Gb has a conductive layer 220b, a conductive layer 240b on the insulating layer 280, an oxide semiconductor layer 230b, an insulating layer 250b on the oxide semiconductor layer 230b, and a conductive layer 260b on the insulating layer 250b.

[0449] In the transistor 200Ga, the oxide semiconductor layer 230a functions as a semiconductor layer, the conductive layer 260a functions as a gate electrode, the insulating layer 250a functions as a gate insulating layer, the conductive layer 220a functions as one of a source electrode and a drain electrode, and the conductive layer 240a functions as the other of the source electrode and drain electrode. In the transistor 200Gb, the oxide semiconductor layer 230b functions as a semiconductor layer, the conductive layer 260b functions as a gate electrode, the insulating layer 250b functions as a gate insulating layer, the conductive layer 220b functions as one of a source electrode and a drain electrode, and the conductive layer 240b functions as the other of the source electrode and drain electrode.

[0450] The semiconductor device shown in Figures 26(A) to 26(C) differs from the semiconductor device shown in Figures 25(A) to 25(C) in that the conductive layer 220, the oxide semiconductor layer 230, the insulating layer 250, and the conductive layer 260 are separated from each other in the groove 291 and its vicinity.

[0451] In the YZ plane including the oxide semiconductor layer 230a and the oxide semiconductor layer 230b, two transistors (the transistor 200Ga and the transistor 200Gb) are provided in the groove 291, thereby promoting miniaturization and high integration of semiconductor devices.

[0452] Although FIGS. 26(A) to 26(C) illustrate a configuration in which the insulating layer 250 is separated into insulating layers 250a and 250b, the present invention is not limited to this.

[0453] 27(A) to 27(C) will be used to describe modifications of the two transistors described using FIGS. 26(A) to 26(C). FIG. 27(A) is a plan view of a semiconductor device having two transistors. FIG. 27(B) is a cross-sectional view taken along dashed line A1-A2 in FIG. 27(A). FIG. 27(C) is a cross-sectional view taken along dashed line A5-A6 in FIG. 27(A).

[0454] 27A to 27C differ from the semiconductor device illustrated in FIGS. 26A to 26C in that the insulating layer 250 covers the oxide semiconductor layer 230a and the oxide semiconductor layer 230b. Covering the oxide semiconductor layer 230a and the oxide semiconductor layer 230b with the insulating layer 250 can cover the side surface of the oxide semiconductor layer 230a facing the groove 291 and the side surface of the oxide semiconductor layer 230b facing the groove 291. This can suppress diffusion of hydrogen into the oxide semiconductor layer 230a and the oxide semiconductor layer 230b. This can provide a highly reliable transistor.

[0455] Note that a structure similar to that of at least one of the transistors 200A to 200D can also be applied to the transistors 200E, 200F, 200Ga, and 200Gb. In each of the transistors 200E, 200F, 200Ga, and 200Gb, an oxide layer 227 can be provided below the oxide semiconductor layer 230. A layer 228 can be provided between the oxide layer 227 and the oxide semiconductor layer 230.

[0456] <Configuration Example 2 of Semiconductor Device> Another structural example of a semiconductor device according to one embodiment of the present invention will be described with reference to FIGS. 28A to 30C. FIG. 28A is a plan view of a semiconductor device including a transistor 200H. FIG. 28B is a cross-sectional view of a portion indicated by a dashed-dotted line A1-A2 in FIG. 28A, which is also a cross-sectional view of the transistor 200H in the channel length direction. FIG. 28C is a cross-sectional view of a portion indicated by a dashed-dotted line A3-A4 in FIG. 28A, which is also a cross-sectional view of the transistor 200H in the channel width direction. FIG. 28D is a cross-sectional view of a portion indicated by a dashed-dotted line A5-A6 in FIG. 28A. FIGS. 29A to 30C each show an enlarged cross-sectional view of the transistor 200H in the channel length direction.

[0457] The transistor 200H includes a conductive layer 205, an insulating layer 221 on the conductive layer 205, an insulating layer 222 on the insulating layer 221, an insulating layer 224 on the insulating layer 222, an oxide semiconductor layer 230 on the insulating layer 224, a conductive layer 242a and a conductive layer 242b on the oxide semiconductor layer 230, an insulating layer 271a on the conductive layer 242a, an insulating layer 271b on the conductive layer 242b, an insulating layer 250 on the oxide semiconductor layer 230, and a conductive layer 260 on the insulating layer 250.

[0458] In the transistor 200H, the oxide semiconductor layer 230 functions as a channel formation region, the conductive layer 260 functions as a first gate electrode (which can also be referred to as an upper gate electrode or a top gate electrode), and the insulating layer 250 functions as a first gate insulating layer. The conductive layer 205 functions as a second gate electrode (which can also be referred to as a lower gate electrode or a bottom gate electrode), and the insulating layers 224, 222, and 221 each function as a second gate insulating layer. The conductive layer 242a functions as one of a source electrode and a drain electrode, and the conductive layer 242b functions as the other of the source electrode and the drain electrode.

[0459] The oxide semiconductor layer 230, the insulating layer 224, the insulating layer 250, and the conductive layer 260 included in the transistor 200H correspond to the oxide semiconductor layer 30, the insulating layer 20, the insulating layer 50, and the conductive layer 60, respectively, described in Embodiment 1. Therefore, the structures, materials, and the like of the oxide semiconductor layer 30, the insulating layer 20, the insulating layer 50, and the conductive layer 60, described in Embodiment 1, can be referred to for the structures, materials, and the like of the oxide semiconductor layer 230, the insulating layer 224, the insulating layer 250, and the conductive layer 260.

[0460] Alternatively, the oxide semiconductor layer 230, the insulating layer 250, the insulating layer 224, and the conductive layer 205 included in the transistor 200H may correspond to the oxide semiconductor layer 30, the insulating layer 20, the insulating layer 50, and the conductive layer 60, respectively, described in Embodiment 1. In this case, the structures, materials, and the like of the oxide semiconductor layer 30, the insulating layer 20, the insulating layer 50, and the conductive layer 60, described in Embodiment 1, can be referred to for the structures, materials, and the like of the oxide semiconductor layer 230, the insulating layer 250, the insulating layer 224, and the conductive layer 205.

[0461] An insulating layer 275 is provided on the insulating layer 271a and the insulating layer 271b, and an insulating layer 280 is provided on the insulating layer 275. An opening 289 is formed in the insulating layer 280 and the insulating layer 275, reaching the insulating layer 222 and the oxide semiconductor layer 230, and the opening 289 overlaps the region between the conductive layer 242a and the conductive layer 242b. In a plan view, the side edges of the insulating layer 280 in the opening 289 coincide or substantially coincide with the side edges of the conductive layer 242a and the conductive layer 242b. The insulating layer 250 and the conductive layer 260 are disposed inside the opening 289. An insulating layer 282 is provided in contact with the upper surface of the insulating layer 280, the upper edge of the insulating layer 250, and the upper surface of the conductive layer 260. An insulating layer 283 is provided on the insulating layer 282. Further, an insulating layer 216 is provided under the insulating layer 221, an insulating layer 214 is provided under the insulating layer 216 and the conductive layer 205, and an insulating layer 212 is provided under the insulating layer 214. The insulating layer 212, the insulating layer 214, the insulating layer 280, the insulating layer 282, the insulating layer 283, and the insulating layer 285 function as interlayer films.

[0462] An opening reaching conductive layer 242a is formed in insulating layer 285, insulating layer 283, insulating layer 282, insulating layer 280, insulating layer 275, and insulating layer 271a, and conductive layer 243a and insulating layer 241a are provided in the opening. Insulating layer 241a is provided in contact with the sidewall of the opening, and conductive layer 243a is provided inside insulating layer 241a. Furthermore, an opening reaching conductive layer 242b is formed in insulating layer 285, insulating layer 283, insulating layer 282, insulating layer 280, insulating layer 275, and insulating layer 271b, and conductive layer 243b and insulating layer 241b are provided in the opening. Insulating layer 241b is provided in contact with the sidewall of the opening, and conductive layer 243b is provided inside insulating layer 241b. The conductive layers 243a and 243b function as vias that connect a wiring or the like provided over the transistor 200H to the source or drain of the transistor 200H.

[0463] 29B, the oxide semiconductor layer 230 includes a channel formation region 231. The oxide semiconductor layer 230 further includes a source region and a drain region. The source region and the drain region are n-type regions (low-resistance regions) having a higher carrier concentration than the channel formation region 231. The oxide semiconductor layer 230 may have a single-layer structure or a stacked structure of two or more layers.

[0464] In the oxide semiconductor layer 230, a channel formation region 231 and a source region and a drain region sandwiching the channel formation region 231 in the transistor 200H are formed. At least a part of the channel formation region 231 overlaps with the conductive layer 260. The source region overlaps with the conductive layer 242a, and the drain region overlaps with the conductive layer 242b. Note that the source region and the drain region can be interchanged.

[0465] An insulating layer containing excess oxygen is provided near the oxide semiconductor layer, and heat treatment is performed to supply oxygen from the insulating layer to the oxide semiconductor layer, thereby eliminating oxygen vacancies and V O H can be reduced. However, if an excessive amount of oxygen is supplied to the source region or drain region, the on-state current or field-effect mobility of the transistor 200H may decrease. Furthermore, variations in the amount of oxygen supplied to the source region or drain region within the substrate surface may cause variations in the characteristics of a semiconductor device including the transistor. Furthermore, if the amount of oxygen supplied from the insulating layer to the oxide semiconductor layer becomes excessively large, this may adversely affect the electrical characteristics and reliability of the transistor. Furthermore, oxygen may diffuse into conductive layers such as the gate electrode, source electrode, and drain electrode, oxidizing the conductive layers and impairing their conductivity.

[0466] First, at least one of an insulating layer having a barrier property against hydrogen and an insulating layer having a function of capturing or fixing hydrogen is formed near the oxide semiconductor layer 230, and V in the channel formation region of the oxide semiconductor layer 230 and its vicinity is formed. O It is preferable to reduce H.

[0467] At least one of the insulating layer 212, the insulating layer 214, the insulating layer 221, the insulating layer 222, the insulating layer 275, the insulating layer 282, and the insulating layer 283 preferably functions as a barrier insulating layer against hydrogen. At least one of the insulating layer 212, the insulating layer 214, the insulating layer 221, the insulating layer 222, the insulating layer 275, the insulating layer 282, and the insulating layer 283 preferably functions as a barrier insulating layer against impurities. At least one of the insulating layer 212, the insulating layer 214, the insulating layer 221, the insulating layer 222, the insulating layer 275, the insulating layer 282, and the insulating layer 283 preferably functions as a barrier insulating layer against oxygen. Note that all of the insulating layer 212, the insulating layer 214, the insulating layer 221, the insulating layer 222, the insulating layer 275, the insulating layer 282, and the insulating layer 283 do not necessarily have to be provided. As long as the insulating layer has sufficient barrier properties against hydrogen, impurities, oxygen, and the like, the insulating layer can be formed by appropriately selecting from the insulating layer 212, the insulating layer 214, the insulating layer 221, the insulating layer 222, the insulating layer 275, the insulating layer 282, and the insulating layer 283. For example, the insulating layer 214 may not be provided, and the insulating layer 216 and the conductive layer 205 may be formed in contact with the upper surface of the insulating layer 212.

[0468] The insulating layer 212, the insulating layer 221, the insulating layer 275, and the insulating layer 283 preferably have a function of suppressing diffusion of hydrogen. For example, the insulating layer 212, the insulating layer 221, the insulating layer 275, and the insulating layer 283 may be formed using silicon nitride, which has a high hydrogen barrier property.

[0469] The insulating layer 214, the insulating layer 222, and the insulating layer 282 preferably have a function of capturing or fixing hydrogen. For example, aluminum oxide may be used for the insulating layer 214 and the insulating layer 282. For example, hafnium oxide, which is a high-k material, is preferably used for the insulating layer 222, which functions as the second gate insulating layer.

[0470] 29A, by providing the insulating layer 212 having a function of suppressing diffusion of hydrogen under the transistor 200H, diffusion of hydrogen from a layer below the transistor 200H can be suppressed. Furthermore, by providing the insulating layer 214 having a function of capturing or fixing hydrogen, hydrogen contained in the insulating layer 216 or the like can be captured or fixed to the insulating layer 214. As a result, the hydrogen concentration in the oxide semiconductor layer 230 and its vicinity can be reduced.

[0471] Furthermore, by providing the insulating layer 221 having a function of suppressing diffusion of hydrogen under the oxide semiconductor layer 230, it is possible to suppress diffusion of hydrogen from below the oxide semiconductor layer 230. Furthermore, by providing the insulating layer 222 having a function of capturing or fixing hydrogen, hydrogen contained in the insulating layer 224 or the like can be captured or fixed in the insulating layer 222. As a result, the hydrogen concentration in the oxide semiconductor layer 230 and its vicinity can be reduced.

[0472] Furthermore, by providing the insulating layer 275 having a function of suppressing diffusion of hydrogen so as to cover the oxide semiconductor layer 230, the conductive layer 242a, the conductive layer 242b, and the like, it is possible to suppress diffusion of hydrogen from the insulating layer 280 to the oxide semiconductor layer 230, the conductive layer 242a, the conductive layer 242b, and the like.

[0473] Furthermore, by providing the insulating layer 283 having a function of suppressing hydrogen diffusion over the transistor 200H, diffusion of hydrogen from above the transistor 200H can be suppressed. Furthermore, by providing the insulating layer 282 having a function of capturing or fixing hydrogen, hydrogen contained in the insulating layer 280 or the like can be captured or fixed to the insulating layer 282. This allows the hydrogen concentration in the oxide semiconductor layer 230 and its vicinity to be reduced.

[0474] In this way, by surrounding the top and bottom of the transistor 200H with barrier insulating layers against hydrogen, the diffusion of hydrogen into the oxide semiconductor is reduced, and the V OH can be reduced, which can improve the electrical characteristics and reliability of the transistor 200H.

[0475] Furthermore, excess oxygen is preferably contained in the insulating layer 280. By supplying the oxygen to the oxide semiconductor layer 230 through the insulating layer 250 by heat treatment, oxygen vacancies in the channel formation region can be reduced.

[0476] The insulating layer 282 is preferably formed by a sputtering method in an atmosphere containing oxygen gas, which allows oxygen to be added to the insulating layer 280. The insulating layer 282 may have a single-layer structure or a stacked structure of two or more layers.

[0477] As described above, by performing heat treatment on the insulating layer 280 containing excess oxygen, a suitable amount of oxygen can be supplied to the oxide semiconductor layer 230 through the insulating layer 250. In the heat treatment, the insulating layers 282 and 283 having a barrier property against oxygen are formed over the insulating layer 280, which prevents the oxygen contained in the insulating layer 280 from excessively diffusing from the insulating layer 280. Furthermore, the insulating layer 275 having a barrier property against oxygen is formed between the insulating layer 280 and the oxide semiconductor layer 230 and the conductive layer 242a and 242b, which prevents the oxygen contained in the insulating layer 280 from excessively diffusing from the insulating layer 280. Furthermore, by performing the heat treatment with openings formed in parts of the insulating layer 280, the insulating layer 282, and the insulating layer 283, part of the oxygen contained in the insulating layer 280 can be outward diffused, and the amount of oxygen supplied from the insulating layer 280 to the oxide semiconductor layer 230 can be adjusted.

[0478] 29B, an oxide layer 227 can be provided between the insulating layer 224 and the oxide semiconductor layer 230. The oxide layer 227 corresponds to the oxide layer 27 described in Embodiment 1. Therefore, the structure, materials, and the like of the oxide layer 27 described in Embodiment 1 can be referred to for the structure, materials, and the like of the oxide layer 227.

[0479] The oxide layer 227 is preferably formed by ALD, which can improve the coverage of the oxide layer 227.

[0480] The oxide layer 227 can also be formed by a sputtering method. When the oxide layer 227 is formed by a sputtering method, a layer in which components contained in the oxide layer 227 and components contained in the conductive layer 220 are mixed is formed due to damage caused by sputtering. The insulating property of this layer is lower than that of the oxide layer 227, and therefore, an increase in contact resistance between the conductive layer 220 and the oxide semiconductor layer 230 can be suppressed. The same applies to the contact resistance between the conductive layer 240 and the oxide semiconductor layer 230.

[0481] FIG. 29A shows an example in which the oxide semiconductor layer 230 has a single-layer structure. Note that the oxide semiconductor layer 230 can have a stacked structure of two or more layers. As shown in FIG. 30A, the oxide semiconductor layer 230 can have a two-layer structure of an oxide semiconductor layer 230_1 and an oxide semiconductor layer 230_2 over the oxide semiconductor layer 230_1. The oxide semiconductor layer 230_1 and the oxide semiconductor layer 230_2 correspond to the oxide semiconductor layer 30a and the oxide semiconductor layer 30b described in Embodiment 1, respectively. Therefore, the structures, materials, and the like of the oxide semiconductor layer 30a and the oxide semiconductor layer 30b described in Embodiment 1 can be referred to for the structures, materials, and the like of the oxide semiconductor layer 30a and the oxide semiconductor layer 30b.

[0482] 30A illustrates a structure in which the insulating layer 250 is in contact with the top surface of the oxide semiconductor layer 230_2, but the present invention is not limited to this. For example, as illustrated in FIG. 30B, a region of the oxide semiconductor layer 230_2 overlapping with the opening 289 may be removed, and the insulating layer 250 may be in contact with the side surface of the oxide semiconductor layer 230_2 and the top surface of the oxide semiconductor layer 230_1. With such a structure, the distance between the conductive layer 260 and the oxide semiconductor layer 230_1 can be shortened. Therefore, an electric field from the gate electrode can be suitably applied to the oxide semiconductor layer 230_1.

[0483] The insulating layer 250 preferably has a structure that allows oxygen to diffuse from the insulating layer 280 to the oxide semiconductor layer 230 and prevents the conductive layers 242a, 242b, and 260 from being oxidized.

[0484] The insulating layer 250 is formed within the opening 289 in contact with the top surface of the insulating layer 222, the side surface of the insulating layer 224, the side surface and top surface of the oxide semiconductor layer 230, the side surface of the conductive layer 242a, the side surface of the conductive layer 242b, the side surface of the insulating layer 271a, the side surface of the insulating layer 271b, the side surface of the insulating layer 275, and the side surface of the insulating layer 280.

[0485] Here, as shown in FIG. 29A, the insulating layer 250 preferably has a stacked structure of an insulating layer 250_1 in contact with the oxide semiconductor layer 230, an insulating layer 250_2 over the insulating layer 250_1, and an insulating layer 250_3 over the insulating layer 250_2.

[0486] Further, as shown in FIG. 30(C), a structure in which an insulating layer 250_4 is provided on the insulating layer 250_2 may be used.

[0487] The structures, materials, and the like of the insulating layers 250_1 to 250_4 can be referred to the structures, materials, and the like of the insulating layers 250_1 to 250_4 described above in <Structural Example 1 of Semiconductor Device>, respectively.

[0488] For example, the insulating layer 250_1, which has a region in contact with the side surface of the conductive layer 242a and the side surface of the conductive layer 242b, has a function of capturing or fixing oxygen, which can prevent the side surfaces of the conductive layer 242a and the conductive layer 242b from being oxidized and oxide films from being formed on the side surfaces. This can prevent a decrease in the on-state current or the field-effect mobility of the transistor 200H. Furthermore, this structure can reduce the amount of oxygen in the insulating layer 250_2 absorbed by the conductive layer 242a and the conductive layer 242b. Therefore, an appropriate amount of oxygen can be supplied from the insulating layer 250_2 to the oxide semiconductor layer 230, and oxygen vacancies in the channel formation region of the oxide semiconductor layer 230 can be reduced.

[0489] Furthermore, by providing the insulating layer 250_1 between the insulating layer 280 and the insulating layer 250_2 and between the insulating layer 250_2 and the oxide semiconductor layer 230, excessive supply of oxygen from the insulating layer 280 to the oxide semiconductor layer 230 can be suppressed, and an appropriate amount of oxygen can be supplied to the oxide semiconductor layer 230. Therefore, the amount of oxygen in the channel formation region of the oxide semiconductor layer 230 and its vicinity can be controlled to an appropriate amount, thereby preventing the transistor 200H from becoming excessively normally off and improving reliability. In addition, excessive oxidation of the source and drain regions can be suppressed, which can cause a decrease in the on-state current or the field-effect mobility of the transistor 200H.

[0490] By adopting the above-described structure, the channel formation region can be made i-type or substantially i-type, and the source region and drain region can be made n-type, thereby providing a semiconductor device with excellent electrical characteristics. Furthermore, by adopting the above-described structure, the semiconductor device can have excellent electrical characteristics even when miniaturized or highly integrated. Furthermore, miniaturizing the transistor 200H can improve high-frequency characteristics. Specifically, the cutoff frequency can be improved.

[0491] To miniaturize the transistor 200H, the insulating layers 250_1 to 250_4 are preferably thin. The thicknesses of the insulating layers 250_1 to 250_4 are preferably 0.1 nm to 20 nm, more preferably 0.1 nm to 10 nm, more preferably 0.5 nm to 5.0 nm, more preferably 1.0 nm to less than 5.0 nm, and even more preferably 1.0 nm to 3.0 nm. Note that each of the insulating layers 250_1 to 250_4 may have a region with the above thickness at least in part.

[0492] The conductive layer 205 is disposed so as to overlap with the oxide semiconductor layer 230 and the conductive layer 260. The conductive layer 205 can be formed using a conductive material described in [Conductive Layer] below. Here, the conductive layer 205 is provided so as to be embedded in an opening formed in the insulating layer 216. The conductive layer 205 is preferably provided to extend in the channel width direction as shown in FIGS. 28(A) and 28(C). With such a structure, the conductive layer 205 functions as a wiring when a plurality of transistors are provided.

[0493] 29(A), the conductive layer 205 preferably includes a conductive layer 205_1 and a conductive layer 205_2. The conductive layer 205_1 is provided in contact with the bottom surface and sidewall of the opening. The conductive layer 205_2 is provided so as to fill a recess in the conductive layer 205_1 formed along the opening. Here, the height of the upper surface of the conductive layer 205 is the same as or approximately the same as the height of the upper surface of the insulating layer 216.

[0494] Here, the conductive layer 205_1 preferably includes a conductive material having a function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (NO, NO, NO, etc.), copper atoms, etc. Alternatively, it preferably includes a conductive material having a function of suppressing the diffusion of oxygen (for example, at least one of oxygen atoms and oxygen molecules, etc.).

[0495] By using a conductive material having a function of reducing hydrogen diffusion for the conductive layer 205_1, impurities such as hydrogen contained in the conductive layer 205_2 can be prevented from diffusing into the oxide semiconductor layer 230 through the insulating layer 216 or the like. Furthermore, by using a conductive material having a function of suppressing oxygen diffusion for the conductive layer 205_1, it is possible to suppress oxidation of the conductive layer 205_2 and a decrease in conductivity. Examples of conductive materials having a function of suppressing oxygen diffusion include titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, and ruthenium oxide. The conductive layer 205_1 can have a single-layer structure or a stacked-layer structure of the above conductive materials. For example, the conductive layer 205_1 preferably contains titanium nitride.

[0496] The conductive layer 205_2 is preferably made of a conductor with high conductivity. For example, the conductive layer 205_2 is preferably made of a conductive material containing tungsten, copper, or aluminum as a main component. For example, the conductive layer 205_2 preferably contains tungsten.

[0497] The conductive layer 205 can function as a second gate electrode. In this case, the threshold voltage (Vth) of the transistor 200H can be controlled by changing the potential applied to the conductive layer 205 independently of the potential applied to the conductive layer 260. In particular, applying a negative potential to the conductive layer 205 can increase the Vth of the transistor 200H and reduce its off-state current. Therefore, applying a negative potential to the conductive layer 205 can reduce the drain current when the potential applied to the conductive layer 260 is 0 V, compared to when no negative potential is applied.

[0498] 29A shows a stacked structure of the conductive layer 205_1 and the conductive layer 205_2, the present invention is not limited thereto, and the conductive layer 205 may have a single-layer structure or a stacked structure of three or more layers. For example, the conductive layer 205_1 may have a two-layer structure of a tantalum nitride film and a titanium nitride film on the tantalum nitride film, and the conductive layer 205_2 having a tungsten film may be provided on the conductive layer 205_1. With such a structure, impurities such as hydrogen and metal impurities such as copper contained in the lower layer of the transistor 200H can be prevented from diffusing into the conductive layer 205.

[0499] The insulating layer 224, together with the insulating layer 221 and the insulating layer 222, functions as a second gate insulating layer.

[0500] The insulating layer 224 in contact with the oxide semiconductor layer 230 can be formed using the insulating material applicable to the insulating layer 20 described in Embodiment 1. The insulating layer 224 preferably includes, for example, a silicon oxide film or a silicon oxynitride film. This allows oxygen to be supplied from the insulating layer 224 to the oxide semiconductor layer 230, thereby reducing oxygen vacancies. Note that the insulating layer 224 may have a stacked structure of two or more layers. In this case, the insulating layer 224 is not limited to a stacked structure made of the same material, and may have a stacked structure made of different materials.

[0501] Note that the above-described plasma treatment using a nitrogen-containing gas is preferably performed on the insulating layer 224. This allows NO to be added to the insulating layer 224. As described above, by configuring the insulating layer 224 so that NO becomes a negative fixed charge, a negative shift in the electrical characteristics of the OS transistor can be suppressed, resulting in a normally-off characteristic. This makes it possible to provide a semiconductor device with excellent electrical characteristics.

[0502] Furthermore, the insulating layer 224 is preferably processed into an island shape, similar to the oxide semiconductor layer 230. As a result, when a plurality of transistors 200H are provided, each transistor 200H has an insulating layer 224 of approximately the same size. As a result, the amount of oxygen supplied from the insulating layer 224 to the oxide semiconductor layer 230 in each transistor 200H becomes approximately the same. Therefore, variation in the electrical characteristics of the transistors 200H within the substrate surface can be suppressed.

[0503] Furthermore, by providing the insulating layer 224 in an island shape, at least a part of the bottom surface of the conductive layer 260 can be provided below the bottom surface of the oxide semiconductor layer 230 (see FIG. 28C). This allows the conductive layer 260 to be provided facing the top surface and side surface of the oxide semiconductor layer 230, and therefore the electric field of the conductive layer 260 can be applied to the top surface and side surface of the oxide semiconductor layer 230.

[0504] However, the insulating layer 224 does not necessarily have to be processed into an island shape. For example, as shown in Figures 31(A) to 31(D), the insulating layer 224 may not be formed into an island shape, but may have a shape in which an opening is formed in a part of it. Here, Figures 31(A) to 31(D) correspond to Figures 28(A) to 28(D), respectively, and are similar to Figures 28(A) to 28(D) except that the shape of the insulating layer 224 is different.

[0505] 31(A) to 31(D), a region of the insulating layer 224 that does not overlap with the oxide semiconductor layer 230 has a smaller thickness than a region that overlaps with the oxide semiconductor layer 230. An opening is formed in a region that does not overlap with the oxide semiconductor layer 230 and overlaps with the insulating layer 250. When a plurality of transistors are provided over the same substrate, the insulating layer 224 is formed in this manner, so that the oxide semiconductor layer 230 of each transistor is formed over the same insulating layer 224. This can reduce variation in the amount of oxygen supplied from the insulating layer 224 to the oxide semiconductor layer 230 of each transistor. Therefore, variation in the electrical characteristics of each transistor can be reduced.

[0506] Note that in the insulating layer 224 shown in Figures 31(A) to 31(D), an opening is formed in a region that does not overlap with the oxide semiconductor layer 230 and overlaps with the insulating layer 250; however, a structure without the opening may be used.

[0507] The conductive layers 242a, 242b, and 260 can be made of the conductive materials described in the section "Conductive Layer" below. In particular, it is preferable to use a conductive material that is resistant to oxidation or a conductive material that has a function of suppressing oxygen diffusion for the conductive layers 242a, 242b, and 260. Examples of such conductive materials include a conductive material containing nitrogen and a conductive material containing oxygen. This can suppress a decrease in the conductivity of the conductive layers 242a, 242b, and 260.

[0508] For the conductive layers 242a and 242b, it is preferable to use a metal nitride, such as a nitride containing tantalum, a nitride containing titanium, a nitride containing molybdenum, a nitride containing tungsten, a nitride containing tantalum and aluminum, or a nitride containing titanium and aluminum. For example, tantalum nitride can be used for the conductive layers 242a and 242b. Alternatively, for example, ruthenium, ruthenium oxide, ruthenium nitride, an oxide containing strontium and ruthenium, or an oxide containing lanthanum and nickel may be used. These materials are preferable because they are conductive materials that are resistant to oxidation or that maintain conductivity even when they absorb oxygen.

[0509] Alternatively, the conductive layer 242a and the conductive layer 242b may each have a stacked-layer structure. In this case, the above-mentioned conductive material may be used for the lower layer of the conductive layer 242a and the conductive layer 242b, and a conductive material with higher conductivity may be used for the upper layer of the conductive layer 242a and the conductive layer 242b. For example, tantalum nitride may be used for the lower layer, and tungsten may be used for the upper layer.

[0510] The insulating layers 271a and 271b are inorganic insulating layers that function as etching stoppers and protect the conductive layers 242a and 242b when processing the conductive layers 242a and 242b. Furthermore, since the insulating layers 271a and 271b are in contact with the conductive layers 242a and 242b, they are preferably made of an inorganic insulator that is less likely to oxidize the conductive layers 242a and 242b. Therefore, each of the insulating layers 271a and 271b preferably has a two-layer structure. Here, the lower layers of the insulating layers 271a and 271b are preferably made of a nitride insulator that can be used for the insulating layer 250_3, and preferably made of silicon nitride, in order to prevent the conductive layers 242a and 242b from being oxidized. Furthermore, the upper layer of each of the insulating layer 271a and the insulating layer 271b is preferably made of an oxide insulator that can be used for the insulating layer 250_2 so as to function as an etching stopper, and is preferably made of silicon oxide.

[0511] Because the insulating layers that are the basis for the insulating layers 271a and 271b function as masks for the conductive layers that are the basis for the conductive layers 242a and 242b, the conductive layers 242a and 242b do not have curved surfaces between their side surfaces and top surfaces, as shown in FIG. 28(D). As a result, the conductive layers 242a and 242b have angular ends where their side surfaces and top surfaces intersect. Because the angular ends where their side surfaces and top surfaces intersect are angular, the cross-sectional areas of the conductive layers 242a and 242b are larger than when the ends have curved surfaces. As a result, the resistance of the conductive layers 242a and 242b is reduced, thereby increasing the on-state current of the transistors.

[0512] The conductive layer 260 is provided in the opening 289 so as to cover the upper surface of the insulating layer 222, the side surface of the insulating layer 224, and the side surface and upper surface of the oxide semiconductor layer 230, via the insulating layer 250. The height of the upper surface of the conductive layer 260 is the same as or approximately the same as the height of the upper end of the insulating layer 250 and the height of the upper surface of the insulating layer 280.

[0513] The sidewall of the opening 289 may be perpendicular or approximately perpendicular to the upper surface of the insulating layer 222, or may be tapered. By tapering the sidewall, the coverage of the insulating layer 250 provided in the opening 289 is improved, and defects such as voids can be reduced.

[0514] 28(A) and 28(C), the conductive layer 260 is preferably provided to extend in the channel width direction. With this structure, when a plurality of transistors are provided, the conductive layer 260 functions as a wiring.

[0515] 28C, in a cross-sectional view of the transistor 200H in the channel width direction, a curved surface may be formed between the side surface of the oxide semiconductor layer 230 and the top surface of the oxide semiconductor layer 230. In other words, the end of the side surface and the end of the top surface may be curved.

[0516] As shown in Fig. 29(A), the conductive layer 260 preferably has a two-layer structure. Here, the conductive layer 260 preferably has a conductive layer 260_1 and a conductive layer 260_2 disposed on the conductive layer 260_1. For example, the conductive layer 260_1 is preferably disposed so as to surround the bottom and side surfaces of the conductive layer 260_2. In this case, it is preferable to use a conductive material that is resistant to oxidation or a conductive material that has a function of suppressing oxygen diffusion as the conductive layer 260_1.

[0517] The conductive layer 260_1 can be formed using a conductive material applicable to the conductive layer 205_1. For example, the conductive layer 260_1 has a function of suppressing oxygen diffusion, which can suppress a decrease in conductivity due to oxidation of the conductive layer 260_2 caused by oxygen contained in the insulating layer 280 or the like.

[0518] The conductive layer 260_2 can be formed using a conductive material applicable to the conductive layer 205_2. The conductive layer 260_2 may have a stacked structure, for example, a stacked structure of a titanium film or a titanium nitride film and a conductive material applicable to the conductive layer 205_2.

[0519] The insulating layer 216, the insulating layer 280, and the insulating layer 285 preferably have a lower relative dielectric constant than the insulating layer 222. By using a material with a low relative dielectric constant as an interlayer film, parasitic capacitance occurring between wirings can be reduced.

[0520] For example, the insulating layer 216, the insulating layer 280, and the insulating layer 285 can each be made of a material with a low dielectric constant, as described in the "Insulating Layer" section below. Silicon oxide and silicon oxynitride are particularly preferred because they are thermally stable. Materials such as silicon oxide, silicon oxynitride, and silicon oxide with vacancies are also preferred because they allow for the easy formation of regions containing excess oxygen.

[0521] Furthermore, the upper surfaces of the insulating layer 216 and the insulating layer 280 may each be planarized.

[0522] It is preferable that the concentration of impurities such as water and hydrogen is reduced in the insulating layer 280. For example, it is preferable that the insulating layer 280 has an oxide containing silicon, such as silicon oxide or silicon oxynitride.

[0523] The conductive layers 243a and 243b can be formed using a conductive material described in the "Conductive Layer" section below. The conductive layers 243a and 243b are preferably formed using a conductive material containing tungsten, copper, or aluminum as a main component. The conductive layers 243a and 243b may have a stacked structure.

[0524] 29A, the conductive layer 243a and the conductive layer 243b may have a two-layer structure. The conductive layer 243a includes a conductive layer 243a1 formed along the opening and a conductive layer 243a2 formed inside the conductive layer 243a1. The conductive layer 243b includes a conductive layer 243b1 formed along the opening and a conductive layer 243b2 formed inside the conductive layer 243b1.

[0525] The conductive layer 243a1 and the conductive layer 243b1 can be formed as a single layer or a stacked layer using a conductive material that can be used for the conductive layer 205_1. Providing the conductive layer 243a1 and the conductive layer 243b1 can prevent impurities such as water and hydrogen from entering the oxide semiconductor layer 230 through the conductive layer 243a2 and the conductive layer 243b2. Note that the conductive layer 243a2 and the conductive layer 243b2 may be formed using a conductive material that can be used for the conductive layer 243a and the conductive layer 243b.

[0526] 28(B), the height of the upper surfaces of the conductive layers 243a and 243b is the same or approximately the same as the height of the upper surface of the insulating layer 285. Also, as shown in FIG. 29(A), the lower part of the conductive layer 243a may be formed so as to be embedded in the conductive layer 242a. Similarly, the lower part of the conductive layer 243b may be formed so as to be embedded in the conductive layer 242b.

[0527] The insulating layers 241a and 241b may be barrier insulating layers applicable to the insulating layer 275 or the like. For example, silicon nitride may be used for the insulating layers 241a and 241b. The insulating layers 241a and 241b are provided in contact with the insulating layers 285, 283, 282, 275, 271a, and 271b. This can prevent impurities such as water and hydrogen contained in the insulating layer 280 or the like from being mixed into the oxide semiconductor layer 230 through the conductive layers 243a and 243b. Silicon nitride is particularly suitable because it has a high barrier property against hydrogen. Furthermore, oxygen contained in the insulating layer 280 can be prevented from being absorbed by the conductive layers 243a and 243b.

[0528] The insulating layer 241a and the insulating layer 241b may have a stacked structure. In this case, the first insulating layer in contact with the sidewall of the opening such as the insulating layer 280 and the second insulating layer on the inner side thereof preferably use a combination of a barrier insulating layer against oxygen and a barrier insulating layer against hydrogen.

[0529] [Variation 1] 28(B) and the like, the insulating layer 250 is in contact with the side surface of the insulating layer 280 in the opening 289, but the present invention is not limited to this configuration. For example, an insulating layer may be provided between the insulating layer 250 and the insulating layer 280 in the opening 289.

[0530] 32A to 33C will be used to describe modifications of the semiconductor device described with reference to FIGS. 28A to 28D. FIGS. 32A to 32D are plan views and cross-sectional views of a semiconductor device including a transistor 200H, and correspond to the plan views and cross-sectional views shown in FIGS. 28A to 28D, respectively. FIGS. 33A to 33C are enlarged cross-sectional views of the transistor 200H in the channel length direction, and correspond to the enlarged cross-sectional view shown in FIG. 29B, respectively.

[0531] 28(A) to 28(D) mainly in that the transistor 200H shown in Figures 32(A) to 32(D) includes an insulating layer 254. Hereinafter, differences from the above description will be mainly described, and overlapping portions will be referred to and may not be described again.

[0532] 32(A) to 32(D), the conductive layer 242a and the conductive layer 242b are each shown as a two-layer structure. The conductive layer 242a has a stacked structure of a conductive layer 242a1 and a conductive layer 242a2 on the conductive layer 242a1. The conductive layer 242b has a stacked structure of a conductive layer 242b1 and a conductive layer 242b2 on the conductive layer 242b1. The conductive layers 242a1 and 242b1 correspond to the lower layers of the above-mentioned conductive layer 242a and conductive layer 242b, respectively, and the conductive layers 242a2 and 242b2 correspond to the upper layers of the above-mentioned conductive layer 242a and conductive layer 242b, respectively.

[0533] 32(B) and 32(C), insulating layer 254 is disposed inside opening 289 and contacts the side surface of insulating layer 280, the side surface of conductive layer 242a2, the side surface of conductive layer 242b2, the top surface of conductive layer 242a1, the top surface of conductive layer 242b1, and the top surface of insulating layer 222 in opening 289. In other words, insulating layer 254 can be said to be formed in the shape of a sidewall in contact with the side wall of opening 289. Here, the side wall of opening 289 corresponds to, for example, the side surface of insulating layer 280, etc. in opening 289.

[0534] The insulating layer 254 preferably has a barrier property against oxygen. When the insulating layer 254 has a barrier property against oxygen, the side surfaces of the conductive layers 242a and 242b can be prevented from being oxidized and oxide films can be prevented from being formed on the side surfaces. This can prevent a decrease in the on-state current or the field-effect mobility of the transistor 200H. An oxygen barrier insulating layer can be used as the insulating layer 254. For example, silicon nitride can be used as the insulating layer 254.

[0535] The opening 289 overlaps the region between the conductive layer 242a2 and the conductive layer 242b2. In a plan view, the side edges of the insulating layer 280 in the opening 289 coincide or substantially coincide with the side edges of the conductive layer 242a2 and the conductive layer 242b2. Furthermore, portions of the conductive layers 242a1 and 242b1 are formed to protrude into the opening 289. In other words, the portion of the conductive layer 242a1 on which the insulating layer 254 is formed (hereinafter, sometimes referred to as the protruding portion of the conductive layer 242a1) protrudes toward the conductive layer 260 more than the conductive layer 242a2. Similarly, the portion of the conductive layer 242b1 on which the insulating layer 254 is formed (hereinafter, sometimes referred to as the protruding portion of the conductive layer 242b1) protrudes toward the conductive layer 260 more than the conductive layer 242b2.

[0536] Here, a portion of the upper surface of the conductive layer 242a1 contacts the conductive layer 242a2, and a portion of the upper surface of the conductive layer 242b1 contacts the conductive layer 242b2. Therefore, inside the opening 289, the insulating layer 254 contacts another portion of the upper surface of the conductive layer 242a1, another portion of the upper surface of the conductive layer 242b1, a side surface of the conductive layer 242a2, and a side surface of the conductive layer 242b2. Furthermore, the insulating layer 250 contacts the upper surface of the oxide semiconductor layer 230, the side surface of the conductive layer 242a1, the side surface of the conductive layer 242b1, and the side surface of the insulating layer 254.

[0537] The insulating layer 254 is formed by anisotropic etching to have a sidewall shape in contact with the side wall of the opening 289. The insulating layer 254 is formed in contact with the side surface of the conductive layer 242a2 and the side surface of the conductive layer 242b2, and has a function of protecting the conductive layer 242a2 and the conductive layer 242b2.

[0538] 33A, in a cross-sectional view of the transistor 200H, the side edges of the insulating layer 254 coincide or substantially coincide with the side edges of the conductive layer 242a1 and the conductive layer 242b1.

[0539] Note that after the conductive layer 242a1 and the conductive layer 242b1 are separated, heat treatment is preferably performed in an atmosphere containing oxygen before the insulating layer 250 is formed. At this time, by forming the insulating layer 254 in contact with the side surfaces of the conductive layer 242a2 and the conductive layer 242b2, excessive oxidation of the conductive layer 242a2 and the conductive layer 242b2 can be prevented. Furthermore, even when microwave plasma treatment is performed after the conductive layer 242a1 and the conductive layer 242b1 are separated, formation of an oxide film on the side surfaces of the conductive layer 242a and the conductive layer 242b can be suppressed.

[0540] The insulating layer 254, the insulating layer 250, and the conductive layer 260 are provided to reflect the shape of the opening 289. Therefore, the insulating layer 254 is provided so as to cover the sidewall of the opening 289, the insulating layer 250 is provided so as to cover the bottom of the opening 289 and the insulating layer 254, and the conductive layer 260 is provided so as to fill the recess of the insulating layer 250.

[0541] As described above, the insulating layer 250 may have a stacked structure. For example, as shown in Fig. 33A, the insulating layer 250 may have a three-layer structure of insulating layers 250_1 to 250_3. Alternatively, as shown in Fig. 33B, the insulating layer 250 may have a four-layer structure of insulating layers 250_1 to 250_4.

[0542] The thickness of the insulating layer 254 is preferably 0.5 nm to 20 nm, more preferably 0.5 nm to 10 nm, and even more preferably 0.5 nm to 3 nm. By setting the insulating layer 254 to the above thickness, excessive oxidation of the conductive layer 242a2 and the conductive layer 242b2 can be suppressed. It is sufficient that at least a portion of the insulating layer 254 has a region with the above thickness. Furthermore, since the insulating layer 254 is provided in contact with the sidewall of the opening 289, it is preferable to form the insulating layer 254 using an ALD method or the like, which has good coverage. If the insulating layer 254 is too thick, the time required to form the insulating layer 254 by the ALD method increases, reducing productivity. Therefore, it is preferable to set the thickness of the insulating layer 254 to within the above range. The insulating layer 254 preferably has a thickness that does not excessively hinder the diffusion of excess oxygen from the insulating layer 280 to the insulating layer 250_2 and from the insulating layer 250_2 to the oxide semiconductor layer 230.

[0543] As shown in FIG. 33A, in a cross-sectional view of the transistor 200H in the channel length direction, the distance L1 between the conductive layer 242a1 and the conductive layer 242b1 is smaller than the distance L2 between the conductive layer 242a2 and the conductive layer 242b2. Here, the distance L1 refers to the shortest distance between the conductive layer 242a1 and the conductive layer 242b1, and the distance L2 refers to the shortest distance between the conductive layer 242a2 and the conductive layer 242b2. This configuration shortens the distance between the source and the drain, thereby shortening the channel length accordingly. This improves the frequency characteristics of the transistor 200H. By miniaturizing the semiconductor device in this way, a semiconductor device with improved operating speed can be provided.

[0544] 33(A), the difference between distance L2 and distance L1 is equal to twice the film thickness of insulating layer 254. In other words, distance L2 is equal to or approximately equal to distance L1 obtained by adding twice the film thickness of insulating layer 254. Here, the film thickness of insulating layer 254 refers to the width of at least a portion of insulating layer 254 in the A1-A2 direction.

[0545] The insulating layer 254 may also have a stacked structure of two or more layers. In this case, at least one layer can be the inorganic insulating layer that is resistant to oxidation. For example, the first insulating layer of the insulating layer 254 may be the inorganic insulating layer that is resistant to oxidation, and the second insulating layer on the first insulating layer of the insulating layer 254 may be made of an insulating material (e.g., silicon oxide) that is applicable to the insulating layer 250_2. The second insulating layer of the insulating layer 254 preferably has a lower dielectric constant than the first insulating layer of the insulating layer 254. In this way, by forming the insulating layer 254 into a two-layer structure and increasing its film thickness, the distance between the conductive layer 260 and the conductive layer 242a or 242b can be increased, thereby reducing parasitic capacitance.

[0546] Although the above describes an example in which the insulating layer 254 is formed into a sidewall shape by anisotropic etching, the present invention is not limited to this. As shown in FIG. 33(C), the insulating layer 254 may have an opening inside the opening 289. In this case, the opening in the insulating layer 254 can be formed by removing a part of the insulating film that will become the insulating layer 254 by lithography. It is preferable that the opening in the insulating layer 254 overlaps with the region between the conductive layer 242a1 and the conductive layer 242b1.

[0547] 33(C), in a cross-sectional view, a protruding portion is formed at the lower part of the insulating layer 254. The protruding portion of the insulating layer 254 overlaps with the protruding portion of the conductive layer 242a1 and the protruding portion of the conductive layer 242b1.

[0548] [Variation 2] In the first modification, the insulating layer 254 is provided in contact with the sidewall of the opening 289. However, the present invention is not limited to this configuration. For example, the insulating layer 254 may not be provided in the opening 289.

[0549] Modifications of the semiconductor device described in Modification 1 will be described with reference to Figures 34(A) to 35. Figures 34(A) to 34(D) are plan views and cross-sectional views of a semiconductor device including a transistor 200H, and correspond to the plan views and cross-sectional views shown in Figures 32(A) to 32(D), respectively. Figure 35 is an enlarged cross-sectional view of the transistor 200H in the channel length direction, and corresponds to the enlarged cross-sectional view shown in Figure 33(C).

[0550] 32(D) in that the transistor 200H illustrated in Figures 34(A) to 34(D) does not have an insulating layer 254. Hereinafter, differences from the above description will be mainly described, and overlapping portions will be referred to and may not be described again.

[0551] 35, in a configuration in which insulating layer 254 is not provided, a portion of insulating layer 250 is arranged to overlap the protruding portions of conductive layer 242a1 and conductive layer 242b1. Also, a portion of conductive layer 260 may be arranged to overlap the protruding portions of conductive layer 242a1 and conductive layer 242b1. Here, the protruding portions of conductive layer 242a1 and conductive layer 242b1 contact insulating layer 250. Also, the side surface of insulating layer 250 contacts the side surface of insulating layer 280, the side surface of insulating layer 275, the side surface of insulating layer 271a, the side surface of insulating layer 271b, the side surface of conductive layer 242a2, and the side surface of conductive layer 242b2.

[0552] The insulating layer 250 is formed to reflect the shape of the opening 289. Therefore, the insulating layer 250 is formed to reflect the shapes of the conductive layer 242a1 and the conductive layer 242b1 that protrude into the opening 289.

[0553] As shown in FIG. 35, in a cross-sectional view of the transistor 200H in the channel length direction, the distance L1 between the conductive layer 242a1 and the conductive layer 242b1 is smaller than the distance L2 between the conductive layer 242a2 and the conductive layer 242b2. This configuration allows the distance between the source and the drain to be shortened, thereby shortening the channel length accordingly. This improves the frequency characteristics of the transistor 200H. By miniaturizing the semiconductor device in this way, it is possible to provide a semiconductor device with improved operating speed.

[0554] 35, the width of the upper part of the conductive layer 260 can be made larger than the distance L1, thereby reducing the wiring resistance of the conductive layer 260. As a result, the power consumption of the semiconductor device can be reduced.

[0555] <Materials for semiconductor devices> Materials that can be used in the semiconductor device of this embodiment will be described below. Note that each layer constituting the semiconductor device of this embodiment may have a single-layer structure or a stacked-layer structure.

[0556] [Oxide semiconductor layer] As described above, the oxide semiconductor layer 230 has a channel formation region. The oxide semiconductor layer 230 further has a source region and a drain region. The source region and the drain region are n-type regions (low-resistance regions) with a higher carrier concentration than the channel formation region. The oxide semiconductor layer 230 may have a stacked structure of two or more layers.

[0557] The carrier concentration in the channel formation region is 1×10 19 cm -3 Less than 1×10 18 cm -3 Less than 5 x 10 17 cm -3 Less than 1×10 17 cm -3 Less than 1×10 16 cm -3 Less than 1×10 15 cm -3 Less than 1×10 14 cm -3 Less than 1×10 13 cm -3 Less than 1×10 12 cm -3 Less than 1×10 11 cm -3 Less than or equal to 1 x 10 10 cm -3 The lower limit of the carrier concentration in the channel formation region is not particularly limited, but is preferably less than 1×10 -7 cm -3 It can be said that:

[0558] As described in the above embodiment, in an OS transistor, a V O The presence of impurities can cause fluctuations in electrical characteristics and reduce reliability. Therefore, reducing the impurity concentration in the oxide semiconductor is effective for stabilizing the electrical characteristics of an OS transistor. To reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in adjacent films. Examples of impurities include hydrogen, carbon, and nitrogen.

[0559] When an oxide semiconductor contains silicon or carbon, which is one of the Group 14 elements, defect levels are formed in the oxide semiconductor. Therefore, the carbon concentration in the channel formation region of the oxide semiconductor measured by SIMS is 1×10 20 atoms / cm 3 Less than or equal to 5 x 10 19 atoms / cm 3 Less than or equal to 3×10 19 atoms / cm 3 Less than 1×10, more preferably 19 atoms / cm 3 Less than or equal to 3×10 18 atoms / cm 3 or less, more preferably 1 × 10 18 atoms / cm 3 The silicon concentration in the channel formation region of the oxide semiconductor measured by SIMS is 1×10 20 atoms / cm 3 Less than or equal to 5 x 10 19 atoms / cm 3 Less than or equal to 3×10 19 atoms / cm 3 Less than 1×10, more preferably 19 atoms / cm 3 Less than or equal to 3×10 18 atoms / cm 3 or less, more preferably 1 × 10 18 atoms / cm 3 The following applies.

[0560] Furthermore, when nitrogen is contained in an oxide semiconductor, electrons serving as carriers are generated, the carrier concentration increases, and the semiconductor is likely to become n-type. As a result, a transistor using an oxide semiconductor containing nitrogen as a semiconductor is likely to be normally on. Alternatively, when nitrogen is contained in an oxide semiconductor, trap states may be formed. As a result, the electrical characteristics of the transistor may become unstable. For this reason, the nitrogen concentration in the channel formation region of an oxide semiconductor obtained by SIMS is 1×10 20 atoms / cm3 Less than or equal to 5 x 10 19 atoms / cm 3 Less than or equal to 1×10 19 atoms / cm 3 Less than or equal to 5 × 10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 Less than 5 × 10, more preferably 17 atoms / cm 3 The following applies.

[0561] Furthermore, hydrogen contained in an oxide semiconductor reacts with oxygen bonded to a metal atom to form water, which may form an oxygen vacancy. When hydrogen enters the oxygen vacancy, electrons serving as carriers may be generated. Furthermore, some of the hydrogen may bond with oxygen bonded to a metal atom to generate electrons serving as carriers. Therefore, a transistor using an oxide semiconductor containing hydrogen is likely to be normally on. For this reason, it is preferable to reduce hydrogen as much as possible in the channel formation region of the oxide semiconductor. Specifically, the hydrogen concentration in the channel formation region of the oxide semiconductor obtained by SIMS is 1×10 20 atoms / cm 3 Less than 5 x 10 19 atoms / cm 3 less than 1×10 19 atoms / cm 3 less than 5 × 10 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 less than 1×10 17 atoms / cm 3 Note that the lower limit of the hydrogen concentration in the channel formation region of the oxide semiconductor is not particularly limited. 16 atoms / cm 3 It can be more than that.

[0562] Furthermore, when an oxide semiconductor contains an alkali metal or alkaline earth metal, defect levels may be formed and carriers may be generated. Therefore, a transistor using an oxide semiconductor containing an alkali metal or alkaline earth metal is likely to be normally on. Therefore, when the concentration of the alkali metal or alkaline earth metal in the channel formation region of the oxide semiconductor obtained by SIMS is set to 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm 3 Do the following:

[0563] When an oxide semiconductor with sufficiently reduced impurities is used for a channel formation region of a transistor, stable electrical characteristics can be obtained.

[0564] For an oxide semiconductor layer that can be used as a semiconductor layer of a transistor according to one embodiment of the present invention, the description in Embodiment 1 can be referred to.

[0565] [Insulating layer] It is preferable to use an inorganic insulating film for each of the insulating layers (insulating layer 210, insulating layer 212, insulating layer 214, insulating layer 221, insulating layer 222, insulating layer 224, insulating layer 225, insulating layer 241a, insulating layer 241b, insulating layer 250, insulating layer 254, insulating layer 275, insulating layer 280, insulating layer 281, insulating layer 282, insulating layer 283, insulating layer 284, insulating layer 285, etc.) included in the semiconductor device. Examples of the inorganic insulating film include an insulating oxide film, an insulating nitride film, an insulating oxynitride film, and an insulating nitride oxide film. Examples of the insulating oxide film include a silicon oxide film, an aluminum oxide film, a magnesium oxide film, a gallium oxide film, a germanium oxide film, an yttrium oxide film, a zirconium oxide film, a lanthanum oxide film, a neodymium oxide film, a hafnium oxide film, a tantalum oxide film, a cerium oxide film, a gallium zinc oxide film, and a hafnium aluminate film. Examples of nitride insulating films include silicon nitride films and aluminum nitride films. Examples of oxynitride insulating films include silicon oxynitride films, aluminum oxynitride films, gallium oxynitride films, yttrium oxynitride films, and hafnium oxynitride films. Examples of nitride oxide insulating films include silicon nitride oxide films and aluminum nitride oxide films. An organic insulating film may also be used for an insulating layer included in a semiconductor device.

[0566] For example, as transistors become more miniaturized and highly integrated, problems such as leakage current can occur due to thinner gate insulatin...

Claims

1. An oxide semiconductor film containing indium and oxygen, the oxide semiconductor film has crystal grains, a concentration of gallium and a concentration of zinc in the oxide semiconductor film are each 0.1 atomic % or less; an extension length of the grain boundary in the oxide semiconductor film is 0 nm or more and 10,000 nm or less; the extension length of the grain boundary is calculated using a 90 nm square field of view extracted from a transmission electron microscope image of the oxide semiconductor film, The oxide semiconductor film was heated at 400° C. for 8 hours, and the oxygen concentration was 2×10 ２０ atoms / cm ３ 1x10 or more ２１ atoms / cm ３ The oxide semiconductor film has a transparent property.

2. An oxide semiconductor film having an oxygen-permeable property, the oxide semiconductor film contains indium and oxygen, the oxide semiconductor film has crystal grains, a concentration of gallium and a concentration of zinc in the oxide semiconductor film are each 0.1 atomic % or less; an extension length of the grain boundary in the oxide semiconductor film is 0 nm or more and 10,000 nm or less; the extension length of the grain boundary is calculated using a 90 nm square field of view extracted from a transmission electron microscope image of the oxide semiconductor film, When the oxide semiconductor film is disposed between a first film and a second film, oxygen contained in the first film is transferred to the second film through the oxide semiconductor film by heat treatment at a heating temperature of 400° C. for 8 hours. ２０ atoms / cm ３ More than spread, The first film has an oxygen concentration of 1×10 by secondary ion mass spectrometry. ２２ atoms / cm ３ and The second film before the heat treatment has an oxygen concentration of 1×10 by secondary ion mass spectrometry. ２０ atoms / cm ３ an oxide semiconductor film having a region where

3. An oxide semiconductor film containing indium and oxygen, the oxide semiconductor film has crystal grains, a concentration of gallium and a concentration of zinc in the oxide semiconductor film are each 0.1 atomic % or less; an extension length of the grain boundary in the oxide semiconductor film is 0 nm or more and 10,000 nm or less; the extension length of the grain boundary is calculated using a 90 nm square field of view extracted from a transmission electron microscope image of the oxide semiconductor film, The oxide semiconductor film has a deuterium diffusion integrated value of 5×10 １２ atoms / cm ２ 1x10 or more １４ atoms / cm ２ An oxide semiconductor film having the following properties.

4. In any one of claims 1 to 3, The oxide semiconductor film, wherein an extension length of a grain boundary in the oxide semiconductor film is 0 nm to 1000 nm.

5. In any one of claims 1 to 3, The oxide semiconductor film has a carbon concentration and an aluminum concentration each of which is less than 100 ppm.

6. 4. A semiconductor device comprising: an oxide semiconductor layer including the oxide semiconductor film according to claim 1; a conductive layer; and an insulating layer having a portion located between the oxide semiconductor layer and the conductive layer.

7. In claim 6, an oxide layer overlapping the insulating layer with the oxide semiconductor layer sandwiched therebetween; The semiconductor device, wherein the oxide layer has cubic crystal grains.

8. In claim 7, a lattice mismatch between the crystal grains of the oxide semiconductor film and the crystal grains of the oxide layer is greater than or equal to −10% and less than or equal to 10%.

9. In claim 7, The semiconductor device, wherein the oxide layer contains yttrium, zirconium, and oxygen.

10. In claim 6, an oxide layer overlapping the insulating layer with the oxide semiconductor layer sandwiched therebetween; The semiconductor device, wherein the oxide layer has hexagonal or trigonal crystal grains.

11. In claim 10, The semiconductor device, wherein the c-axes of the crystal grains of the oxide layer are perpendicular or approximately perpendicular to the surface of the oxide layer or a surface on which the oxide layer is formed.

12. In claim 10, The semiconductor device, wherein the oxide layer contains indium, gallium, zinc, and oxygen.

13. In claim 12, a layer between the oxide layer and the oxide semiconductor layer, The layer comprises aluminum and oxygen.

14. In claim 6, the oxide semiconductor layer has an In—Ga—Zn oxide film on the oxide semiconductor film, The oxide semiconductor film has higher permeability to either or both of oxygen atoms and hydrogen atoms than the In—Ga—Zn oxide film.

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