Active matrix substrate and liquid crystal display device

Abstract

To provide an active matrix substrate and a liquid crystal display device for which a full in-cell type touch panel is usable, and with which a reduction in numerical aperture can be suppressed.SOLUTION: The active matrix substrate includes a plurality of source lines SL, and a plurality of common lines TL arranged in parallel to the plurality of source lines. The plurality of source lines and the plurality of common lines are arranged in the same layer. The active matrix substrate includes a plurality of first pixels PX1 and a plurality of second pixels PX2 that are respectively arranged in the column direction. The common lines are arranged in the first pixel, the width of the first pixel in the row direction is larger than the width of the second pixel in the row direction. The first pixel and the second pixel respectively have a pixel electrode including a slit. The number of slits of a pixel electrode PE1 of the first pixel is greater than the number of slits of a pixel electrode PE2 of the second pixel. In the first pixel, the pixel electrode extends to both sides in the row direction of the common line.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] The present disclosure relates to an active matrix substrate and a liquid crystal display device. [Background technology]

[0002] Compared to liquid crystal displays with external touch panels, liquid crystal displays with built-in touch panels have advantages such as higher light transmittance, thinner liquid crystal displays, and narrower frame sizes, and are therefore used as display devices for mobile devices such as smartphones, laptops, and tablets.

[0003] In a display device with a built-in touch panel, the manufacturing process can be shortened if the wiring for the touch panel is formed in the same layer as the wiring for the liquid crystal display device. For example, Patent Document 1 discloses a full-in-cell touch panel in which the source lines of the liquid crystal display device and the touch panel lines of the touch panel are formed in the same wiring layer. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] US Patent Application Publication No. 2022 / 0373848 Summary of the Invention [Problem to be solved by the invention]

[0005] When touch panel lines and source lines are formed in the same wiring layer, the aperture ratio may be reduced due to the touch panel lines being located within pixels. The present disclosure aims to provide an active matrix substrate and a liquid crystal display that can suppress the reduction in aperture ratio. [Means for solving the problem]

[0006] an active matrix substrate according to an embodiment of the present disclosure, the active matrix substrate comprising: a first substrate having a display area; a plurality of gate lines arranged in the display area, each extending in a first direction and arranged in a second direction intersecting the first direction; a plurality of source lines arranged in the display area, each extending in the second direction and arranged in the first direction; a plurality of common lines arranged in the display area, each extending in the second direction, arranged in the first direction, and located in the same layer as the plurality of source lines; a first insulating layer arranged above the plurality of source lines and the plurality of common lines in the display area; a common electrode layer arranged above the first insulating layer in the display area and connected to at least one of the plurality of common lines; a second insulating layer arranged above the common electrode layer in the display area; and a plurality of pixels arranged two-dimensionally in the first direction and the second direction in the display area, the plurality of pixels including a plurality of first pixels each having a first pixel electrode and a plurality of second pixel electrodes. and a plurality of second pixels, wherein the plurality of first pixels constitute a plurality of first pixel columns arranged along the second direction, the plurality of second pixels constitute a plurality of second pixel columns arranged along the second direction, each of the plurality of common lines is located in one of the plurality of first pixel columns, the second pixel electrode includes at least one slit extending in substantially the same direction as the second direction, the first pixel electrode includes a plurality of slits extending in substantially the same direction as the second direction, and the number of slits in the first pixel electrode is The number of slits in the second pixel electrode is greater than the number of slits in the second pixel electrode, and the width of each first pixel in the first direction is greater than the width of each of the second pixels in the first direction, and in each of the first pixels, a portion of the first pixel electrode is located between one of a pair of source lines among the plurality of source lines that are adjacent to each other and sandwich each of the first pixels and one of the plurality of common lines, and another portion of the first pixel electrode is located between the other source line among the plurality of source lines that are adjacent to each of the first pixels and sandwich each of the first pixels and one of the plurality of common lines. [Effects of the Invention]

[0007] According to an embodiment of the present disclosure, an active matrix substrate and a liquid crystal display are provided that are capable of suppressing a decrease in aperture ratio even when touch panel lines and source lines are formed in the same wiring layer. [Brief explanation of the drawings]

[0008] [Figure 1] FIG. 1 is a schematic cross-sectional view showing an example of the configuration of a liquid crystal display device according to this embodiment. [Figure 2] FIG. 2 is a schematic plan view showing the configuration of the active matrix substrate of this embodiment. [Figure 3] FIG. 3 is a circuit diagram showing a pixel of the active matrix substrate. [Figure 4] FIG. 4 is an enlarged plan view of a portion of the liquid crystal panel. [Figure 5A] 5A is a cross-sectional view of the liquid crystal panel taken along line 5A-5A in FIG. [Figure 5B] 5B is a cross-sectional view of the liquid crystal panel taken along line 5B-5B in FIG. [Figure 6] FIG. 6 is a plan view showing some components of the active matrix substrate. [Figure 7A] FIG. 7A is a plan view showing some components of an active matrix substrate. [Figure 7B] FIG. 7B is a plan view showing some components of the active matrix substrate. [Figure 8] FIG. 8 is a plan view showing the structure between the divided common electrodes. [Figure 9] FIG. 9 is a plan view showing the arrangement of some components of the active matrix substrate and the light-shielding layer of the counter substrate. [Figure 10] FIG. 10 is a schematic plan view showing the configuration of an active matrix substrate according to another embodiment. [Figure 11] FIG. 11 is an enlarged plan view showing a part of an active matrix substrate according to another embodiment. [Figure 12]FIG. 10 is a cross-sectional view of a liquid crystal panel according to another embodiment. [Figure 13] FIG. 13 is a plan view showing some components of an active matrix substrate according to another embodiment. [Figure 14] FIG. 14 is a plan view showing some components of an active matrix substrate according to another embodiment. [Figure 15] FIG. 15 is a plan view showing the arrangement of some components and light-shielding layers of an active matrix substrate according to another embodiment. [Figure 16] FIG. 16 is a schematic plan view showing the configuration of an active matrix substrate according to another embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0009] Embodiments of the present disclosure will be described below with reference to the drawings. The present disclosure is not limited to the following embodiments, and appropriate design modifications may be made within the scope of the configuration of the present disclosure. In the following description, the same reference numerals are used in different drawings for identical parts or parts having similar functions, and repeated description of such parts may be omitted. The configurations described in the embodiments and other aspects may be combined or modified as appropriate without departing from the spirit of the present disclosure. To facilitate understanding of the description, the drawings referenced below may show simplified or schematic configurations, or may omit some components. Furthermore, the dimensional ratios between components shown in each drawing do not necessarily represent actual dimensional ratios.

[0010] 1 is a schematic cross-sectional view showing an example of the configuration of a liquid crystal display device 101 according to this embodiment. The liquid crystal display device 101 has a full-in-cell touch panel function and is also simply called a full-in-cell touch panel. In this embodiment, the touch panel is a self-capacitance electrostatic capacitance touch panel.

[0011] The liquid crystal display device 101 includes a liquid crystal panel 10 and a control device 50. The liquid crystal panel 10 includes an active matrix substrate 20, a counter substrate 30, and a liquid crystal layer 40. The liquid crystal layer 40 is located between the active matrix substrate 20 and the counter substrate 30, and is sealed between the active matrix substrate 20 and the counter substrate 30 by a seal 41.

[0012] As will be described in detail below, a color filter and a light-shielding layer are provided on the counter substrate 30. In this embodiment, a common electrode layer is not provided on the counter substrate 30, but is provided on the active matrix substrate 20.

[0013] The liquid crystal display device 101 may further include a pair of polarizing plates 42 and a backlight 80. The pair of polarizing plates 42 are disposed on the front surface 10a and the back surface 10b of the liquid crystal panel 10, respectively, and are arranged in a crossed Nicol state with the liquid crystal panel 10 sandwiched therebetween.

[0014] The backlight 80 is disposed on the rear surface 10b of the liquid crystal panel 10. The backlight 80 may be an edge-type backlight or a direct-type backlight. The backlight 80 may also be capable of being partially driven.

[0015] 2 is a schematic plan view showing the configuration of the active matrix substrate 20. The active matrix substrate 20 includes a first substrate 21, a plurality of source lines SL, a plurality of gate lines GL, a plurality of common lines CL functioning as a plurality of touch panel lines TL, a common electrode layer CE, and a plurality of pixels PX.

[0016] The first substrate 21 has a main surface 21a including a display area 21h and a non-display area 21g other than the display area 21h. A plurality of gate lines GL, a plurality of source lines SL, and a plurality of pixels PX are arranged in the display area 21h. Specifically, the plurality of gate lines GL extend in the x-axis direction (first direction) and are arranged at predetermined intervals in the y-axis direction (second direction) intersecting the x-axis direction. The plurality of source lines SL extend in the y-axis direction and are arranged at predetermined intervals in the x-axis direction. The plurality of touch panel lines (common lines) TL extend in the y-axis direction and are arranged at intervals in the x-axis direction. As described in detail below, the source lines SL and the touch panel lines TL are formed of the same conductive material at the same time, i.e., in the same manufacturing process, and constitute the same wiring layer. Therefore, the source lines SL and the touch panel lines TL are located in the same layer in the laminated structure of the active matrix substrate 20.

[0017] A pixel PX is arranged in an area surrounded by a pair of adjacent gate lines GL and a pair of adjacent source lines SL. The pixels PX are arranged two-dimensionally in the x-axis direction and the y-axis direction. The gate lines GL, source lines SL, and touch panel lines TL are extended into a non-display area 21g.

[0018] The common electrode layer CE is disposed over the entire display region 21h. The common electrode layer CE is a common electrode for the liquid crystal panel 10 and also functions as a detection electrode for the touch panel. The common electrode layer CE includes a plurality of split common electrodes DCE divided into a two-dimensional matrix in the x-axis direction and the y-axis direction. The common electrode layer CE is connected to at least one of the plurality of touch panel lines TL. More specifically, each split common electrode DCE is connected to one of the plurality of touch panel lines TL.

[0019] 3 is a circuit diagram showing pixels PX of the active matrix substrate 20. Each pixel PX includes a pixel electrode PE and a switching element SW. The switching element SW is, for example, a three-terminal element, with a gate line GL, a source line SL, and a pixel electrode PE connected to its three terminals. For example, the switching element is a TFT having a gate electrode GE, a source electrode SE, and a drain electrode DE, with the gate electrode GE connected to the gate line GL, the source electrode SE connected to the source line SL, and the drain electrode DE connected to the pixel electrode PE. Each gate line GL is connected to the gate electrode GE of the TFT of pixels PX arranged in the row direction among the multiple pixels PX. Furthermore, each source line SL is connected to the source electrode SE of the TFT of pixels PX arranged in the column direction among the multiple pixels PX.

[0020] An alignment film is formed on the pixel electrodes PE, and a liquid crystal layer 40 is disposed adjacent to this alignment film. As will be described later, a common electrode layer CE is located between the pixel electrodes and the first substrate 21, and an insulating layer is disposed between the common electrode layer CE and the pixel electrodes PE. By applying a voltage between the pixel electrodes PE and the common electrode layer CE, an electric field is generated in the liquid crystal layer 40, and the liquid crystal panel 10 is driven in a fringe field switching (FFS) transverse electric field mode.

[0021] The control device 50 includes a gate driver 51, a source driver 52, and a controller 53. The controller 53 includes a timing controller that controls display and a touch panel controller that controls the divided common electrodes DCE used to detect a touch position, and controls the display of an image during a display period and detects a touch position during a touch position detection period during one frame period.

[0022] The timing controller receives a video signal from an external device. The video signal includes a video data signal and a video synchronization signal. Based on the received video signal, the timing controller generates an image signal and a start signal. The touch panel controller generates and outputs a timing signal for detection during a touch position detection period. It also receives a detection signal resulting from touch position detection and outputs it to the outside.

[0023] 2, the gate driver 51 and the source driver 52 are arranged in the non-display area 21g of the first substrate 21. The gate driver 51 is connected to one end of the gate line GL, and the source driver 52 is connected to one end of the source line SL. The gate driver 51 and the source driver 52 are connected to terminals 22 arranged at the end of the first substrate 21, and the terminals 22 and the controller 53 are connected by a flexible printed circuit (FPC) 90.

[0024] The gate driver 51 receives a start signal, generates a scanning signal, and outputs it to the gate lines GL. The source driver 52 receives an image signal, generates a data signal including a voltage value corresponding to the gradation display of each pixel, and outputs it to the source lines SL. In this embodiment, the source driver 52 also receives a timing signal from the controller 53, and applies a driving voltage to the touch panel line TL. The source driver 52 also detects a voltage change on the touch panel line TL and outputs the detected voltage to the controller 53.

[0025] In FIG. 2, two gate drivers 51 are arranged on either side of the display area 21h, but the gate driver 51 may be arranged on only one side. Also, in FIG. 2, only one end of the gate line GL is connected to the gate driver 51, but both ends of the gate line GL may be connected to the gate driver 51. Furthermore, the gate driver arranged on one side is shown as a single IC, but the gate driver 51 may be composed of multiple ICs. Also, the source driver 52 is shown as a multiple ICs, but it may be composed of a single IC.

[0026] The gate driver 51 and the source driver 52 may be bare chips or packaged components covered with resin or the like, and may be mounted in the non-display area 21g of the first substrate 21. Alternatively, the gate driver 51 and the source driver 52 may be monolithic drivers configured with a plurality of TFTs or the like fabricated in the non-display area 21g of the first substrate 21.

[0027] Next, the structure of the liquid crystal panel 10 will be described in more detail. FIG. 4 is a plan view showing an enlarged portion of the liquid crystal panel 10, and FIGS. 5A and 5B are cross-sectional views of the liquid crystal panel 10 taken along lines 5A-5A and 5B-5B in FIG. 4. First, with reference to these figures, the cross-sectional structure of the liquid crystal panel 10 will be mainly described. Note that in FIG. 4 and subsequent figures, for ease of understanding, components in the plan view may be indicated by hatching or other patterns. Also, for easier identification of components, some components may be indicated by dashed lines in the plan view.

[0028] In addition to the above-mentioned components, the active matrix substrate 20 further includes a gate electrode GE, a gate insulating layer 23, a first insulating layer 24, a second insulating layer 25, a semiconductor layer SC, and a drain electrode DE.

[0029] The first substrate 21 supports the components formed on the active matrix substrate 20, and is made of a transparent material such as glass or resin.

[0030] In each pixel PX, the gate electrode GE is connected to the gate line GL, and the gate line GL and the gate electrode GE are arranged on the first substrate 21. In this embodiment, the gate line GL and the gate electrode GE are formed on the first substrate 21. However, the active matrix substrate 20 may further include an insulating layer such as an underlying layer arranged on the first substrate 21, and the gate line GL and the gate electrode GE may be arranged on the underlying layer. The gate line GL and the gate electrode GE are made of a metal material such as aluminum, copper, titanium, molybdenum, tungsten, or an alloy thereof.

[0031] A gate insulating layer 23 is disposed on the first substrate 21, covering the gate lines GL and the gate electrodes GE. The gate insulating layer 23 is made of an inorganic material such as silicon oxide, silicon nitride, or silicon oxynitride.

[0032] A semiconductor layer SC is disposed on the gate insulating layer 23 in a region overlapping with the gate electrode GE in a plan view. The semiconductor layer SC may be an oxide semiconductor or a silicon semiconductor. The oxide semiconductor may contain at least one metal element selected from the group consisting of In, Ga, and Zn.

[0033] The source lines SL are arranged on the semiconductor layer SC and the gate insulating layer 23 so as to overlap with the semiconductor layer SC. The regions of the source lines SL that are in contact with the semiconductor layer SC function as source electrodes. The touch panel lines TL are arranged on the gate insulating layer 23.

[0034] The drain electrode DE is disposed on the semiconductor layer SC and the gate insulating layer 23 so as to partially overlap with and connect to the semiconductor layer SC. The gate electrode GE, the semiconductor layer SC, the part of the source line SL overlapping with the semiconductor layer SC, and the drain electrode DE constitute a TFT, which is a switching element SW, and is disposed in each pixel PX.

[0035] The source lines SL, touch panel lines TL, and drain electrodes DE are made of metal materials such as aluminum, copper, titanium, molybdenum, tungsten, and alloys thereof. The source lines SL, touch panel lines TL, and drain electrodes DE are preferably formed simultaneously from the same metal material and preferably constitute the same wiring layer. In FIG. 5B, the top surface of the gate insulating layer 23 is shown as flat so that the source lines SL, touch panel lines TL, and drain electrodes DE are positioned at the same height. However, for example, the thickness of the gate insulating layer 23 may be generally uniform on the first substrate 21 and may not cover the side surfaces of the semiconductor layer SC. In this case, the touch lines TL are positioned lower than the source lines SL, and the top surface of the drain electrodes DE located on the gate electrodes GE and the first substrate 21 is lower than the portion located on the semiconductor layer SC.

[0036] Even in such cases, whether the source line SL, touch panel line TL and drain electrode DE can be said to be the same wiring layer can be determined by determining whether they are made of the same material and by analyzing the layered structure on the first substrate 21 based on the insulating layer that continuously covers the entire first substrate 21 below or above these layers.

[0037] The first insulating layer 24 is disposed above the source lines SL, the touch panel lines TL, and the drain electrodes DE. Specifically, the first insulating layer 24 is disposed on the gate insulating layer 23, covering the source lines SL, the touch panel lines TL, and the drain electrodes DE.

[0038] The split common electrodes DCE are arranged above the first insulating layer 24. In this embodiment, the split common electrodes DCE are arranged on the first insulating layer 24. Each of the split common electrodes DCE is connected to one of the touch panel lines TL via a contact hole h1 provided in the first insulating layer 24. The split common electrodes DCE are made of a transparent electrode material such as ITO (indium tin oxide) or IZO (indium zinc oxide).

[0039] The second insulating layer 25 is disposed above the split common electrode DCE. More specifically, the second insulating layer 25 is disposed on the first insulating layer 24, covering the split common electrode DCE.

[0040] The first insulating layer 24 is made of, for example, an organic acrylic resin material, and the second insulating layer 25 is made of, for example, an inorganic material such as silicon oxide, silicon nitride, or silicon oxynitride.

[0041] The pixel electrode PE is disposed on the second insulating layer 25. The pixel electrode PE is connected to the drain electrode DE via a contact hole h2 provided in the first insulating layer 24 and the second insulating layer 25. As will be described later, the pixel electrode PE includes a first electrode portion PE1a and a second electrode portion PE1b. The pixel electrode PE is made of a transparent electrode material such as ITO (indium tin oxide) or IZO (indium zinc oxide).

[0042] The counter substrate 30 includes a second substrate 32, a color filter CF, and a light-shielding layer BM. The second substrate 32 supports the components formed on the counter substrate 30 and is made of a transparent material such as glass or resin.

[0043] A light-shielding layer BM is disposed on the counter substrate 30. The light-shielding layer BM is made of a resin material that is difficult for light to transmit, such as black resin, or a single-layer metal film such as tungsten, or a laminated structure of a metal layer and a layer made of a metal oxide. As will be described later, the light-shielding layer BM includes a first light-shielding portion BM1, a second light-shielding portion BM2, and a third light-shielding portion BM3.

[0044] The color filters CF are disposed on the light-shielding layer BM and in the areas of the second substrate 32 that are not covered by the light-shielding layer BM. The color filters CF include red filters CFR, blue filters CFB, and green filters CFG. The surfaces of the red filters CFR, blue filters CFB, and green filters CFG are covered with a colorless overcoat layer OC, which can reduce unevenness on the surface of the counter substrate 30 caused by the light-shielding layer BM. Although not shown in the drawings, an alignment film for aligning the liquid crystal molecules contained in the liquid crystal layer 40 is formed on the innermost surface (top layer) of the active matrix substrate 20 and the counter substrate 30 that contacts the liquid crystal layer 40.

[0045] Next, we will explain the planar structure of the liquid crystal panel 10. Fig. 6 is a plan view showing the arrangement of source lines SL, touch panel lines TL, gate lines GL, gate electrodes GE, semiconductor layers SC, drain electrodes DE, and pixel electrodes PE on the active matrix substrate 20, and Fig. 7A is a plan view showing the arrangement of the source lines SL, touch panel lines TL, gate lines GL, gate electrodes GE, semiconductor layers SC, drain electrodes DE, and split common electrodes DCE.

[0046] As shown in FIG. 6, in the active matrix substrate 20, each pixel PX is located in an area surrounded by a pair of adjacent source lines SL among a plurality of source lines SL and a pair of adjacent gate lines GL among a plurality of gate lines GL. In each pixel, the source line SL extends roughly parallel to the y-axis direction near the area where the gate line GL and TFT are located, but in the area adjacent to the pixel electrode PE, it extends in a direction tilted from the y-axis by α° to the positive side of the x-axis or α° to the negative side of the x-axis. α° is, for example, an angle of 15° or less. An angle tilted by ±α° with respect to the y-axis is referred to as a roughly y-axis direction. In adjacent pixels in the y-axis direction, the source lines SL are alternately tilted to the positive and negative sides of the axis, so that, overall, multiple pixels PX are arranged parallel to the y-axis direction.

[0047] The plurality of pixels PX includes a plurality of first pixels PX1 and a plurality of second pixels PX2. The first pixels PX1 are arranged in a plurality of first pixel columns in the y-axis direction, with one touch panel line TL located in each first pixel column. Similarly, the second pixels PX2 are arranged in a plurality of second pixel columns in the y-axis direction, with no touch panel line TL located in each second pixel column. The direction in which the touch panel lines TL extend generally coincides with the direction in which the source lines SL extend.

[0048] 6, the width Wx1 of the first pixel PX1 in the x-axis direction is larger than the width Wx2 of the second pixel PX2 in the x-axis direction, while the widths Wy of the first pixel PX1 and the second pixel PX2 in the y-axis direction are equal to each other.

[0049] A first pixel electrode PE1 is disposed in the first pixel PX1, and a second pixel electrode PE2 is disposed in the second pixel PX2.

[0050] The first pixel electrode PE1 has multiple slits ST extending substantially in the y-axis direction. In this embodiment, the first pixel electrode PE1 has three slits ST, each extending parallel to the inclined portion of the source line SL. The first pixel electrode PE1 also extends in the same direction as the slits ST and has one first electrode portion PE1a located between the multiple slits ST and at least one second electrode portion PE1b. In this embodiment, the first pixel electrode PE1 has one first electrode portion PE1a and one second electrode portion PE1b. The width wa in the x-direction of the first electrode portion PE1a is greater than that of the second electrode portion wb.

[0051] 6, the first electrode portion PE1a overlaps with the touch panel line TL in a plan view. A part of the first pixel electrode PE1 is located between one of a pair of source lines SL adjacent to each other so as to sandwich the first pixel PX1 and one of the touch panel lines TL, and another part of the first pixel electrode PE1 is located between the other of the pair of source lines SL and one of the touch panel lines TL.

[0052] On the other hand, the second pixel electrode PE2 has at least one slit ST extending substantially in the y-axis direction. In this embodiment, the second pixel electrode PE2 has two slits ST, each extending parallel to the inclined portion of the source line SL. The second pixel electrode PE2 also has one second electrode portion PE2b extending in the same direction as the slits ST and located between the two slits ST. The first pixel electrode PE1 and the second pixel electrode PE2 are connected to the drain electrode DE via a contact hole h2. In other words, the first pixel electrode PE1 and the second pixel electrode PE2 are connected to a TFT, which is a switching element, via the contact hole h2.

[0053] At least one of distances SP1R and SP1L between the first pixel electrode PE1 and a pair of source lines SL adjacent to the first pixel electrode PE1 is smaller than distances SP2R and SP2L between the second pixel electrode PE2 and a pair of source lines SL adjacent to the second pixel electrode PE2. Furthermore, a part of the first pixel electrode PE1 may overlap with at least one of the pair of adjacent source lines SL in a plan view.

[0054] As shown in FIG. 7A, the split common electrode DCE has a plurality of first openings O1 and a plurality of second openings O2. Each first opening O1 is located at a first pixel PX1. More specifically, each first opening O1 overlaps a portion of one of the plurality of touch panel lines TL in a plan view. The width WO of each first opening O1 in the x-axis direction is larger than the width WT of each touch panel line TL in the x-axis direction. In addition, each first opening O1 is located between a pair of adjacent slits ST of the first pixel electrode PE1 in a plan view, but does not overlap with the slits ST. In addition, each first opening O1 overlaps with a first electrode portion PE1a of the first pixel electrode PE1 in a plan view, but does not overlap with a second electrode portion PE1b.

[0055] On the other hand, the second opening O2 is located in each of the first pixel PX1 and the second pixel PX2. More specifically, the second opening O2 is located in the region where the TFTs of the first pixel PX1 and the second pixel PX2 are located in a plan view. As described above, the TFTs are connected to the first pixel electrode PE1 or the second pixel electrode PE2 via the contact hole h2, so the second opening O2 overlaps with the contact hole h2 in a plan view. This allows the split common electrode DCE, which is the detection electrode of the touch panel, to be located below the first pixel electrode PE1 and the second pixel electrode PE2.

[0056] 7A shows two touch panel lines TL, and the left touch panel line TL is connected to the split common electrode DCE through a contact hole h1, while the right touch panel line TL is not connected to the split common electrode DCE shown in FIG. 7A, but is connected to one of the other split common electrodes DCE located in the y-axis direction relative to the split common electrode DCE shown in FIG.

[0057] In the embodiment shown in FIG. 7A, the first opening O1 and the second opening O2 are independent openings, but as shown in FIG. 7B, the first opening O1 may be connected to one of the second openings O2.

[0058] 8 is a plan view showing the structure between the split common electrodes DCE. As shown in FIG. 8, a boundary region BRy where no split common electrode DCE is provided is located between a pair of split common electrodes DCE adjacent to each other in the x-axis direction in a plan view. Furthermore, the touch panel line TL is located between the pair of split common electrodes DCE adjacent to each other in the x-axis direction in a plan view. The first opening O1 overlaps with the boundary region BRy.

[0059] Furthermore, a boundary region BRx where no split common electrode DCE is provided is located between a pair of split common electrodes DCE adjacent in the y-axis direction. Furthermore, the gate line GL is located between the pair of split common electrodes DCE adjacent in the y-axis direction in plan view. The second opening O2 overlaps with the boundary region BRx.

[0060] FIG. 9 is a plan view showing the arrangement of the source lines SL, touch panel lines TL, gate lines GL, gate electrodes GE, semiconductor layers SC, and drain electrodes DE on the active matrix substrate 20, and the light-shielding layer BM on the counter substrate 30. As shown in FIG.

[0061] In a plan view, the light-shielding layer BM includes a plurality of first light-shielding portions BM1 overlapping the plurality of touch panel lines TL and extending substantially in the y-axis direction, a plurality of second light-shielding portions BM2 overlapping the plurality of source lines SL and extending substantially in the y-axis direction, and a plurality of third light-shielding portions BM3 overlapping the plurality of gate lines GL and TFTs and extending substantially in the x-axis direction. The width WB1 of the first light-shielding portions BM1 of the light-shielding layer BM in the x-axis direction is greater than the width WT of the touch panel lines TL in the x-axis direction. This allows the light-shielding layer BM to reliably cover the touch panel lines, preventing a decrease in the contrast of a displayed image due to external light being reflected by the touch panel lines TL.

[0062] 6 and 9, one pixel capable of color display is configured by one first pixel PX1 and two second pixels PX2 adjacent in the x-axis direction. For example, a blue filter CFB is arranged in the first pixel PX1, and a red filter CFR and a green filter CFG are arranged in the two second pixels PX2 adjacent in the x-axis direction. The arrangement of the color filters is not limited to this example, and a red filter CFR or a green filter CFG may be arranged in the first pixel PX1.

[0063] The liquid crystal display device 101 of this embodiment can be manufactured using the same semiconductor manufacturing technology as that used for conventional liquid crystal display devices. As described above, the touch panel lines TL and the source lines SL can be formed simultaneously in the same process. The drain electrodes DE may also be formed simultaneously with the touch panel lines TL and the source lines SL.

[0064] In the liquid crystal display device 101 configured in this manner, the touch panel line TL, formed in the same layer as the source lines SL, is located at the first pixel PX1 in a plan view, and a portion of the first pixel electrode is located in each of two regions between the touch panel line and a pair of source lines SL in the x-axis direction. In other words, the touch panel line TL is not adjacent to the source lines SL. This prevents the data signal applied to the source lines SL from affecting the detection signal of the touch panel and reducing detection accuracy. Furthermore, the data signal applied to the source lines SL is prevented from being corrupted by the detection signal of the touch panel. Furthermore, the possibility of a short circuit between the touch panel line TL and the source lines SL can be reduced.

[0065] Furthermore, the width Wx1 of the first pixel PX1 in the x-axis direction is larger than the width Wx2 of the second pixel PX2 in the x-axis direction, and the number of slits in the first pixel electrode PE1 is larger than the number of slits in the second pixel electrode PE2. Therefore, by positioning the touch panel line TL at the first pixel PX1, it is possible to prevent a decrease in the aperture ratio of the first pixel PX1.

[0066] Furthermore, the touch panel line TL overlaps with the first opening O1 provided in the split common electrode DCE, thereby suppressing an increase in the parasitic capacitance of the touch panel line TL. Furthermore, the first opening O1 overlaps with the first portion of the first pixel electrode PE1. Therefore, the fringe electric field generated between the split common electrode DCE and the first pixel electrode PE1 is prevented from being disturbed at the first opening O1.

[0067] Furthermore, by separating the touch panel line TL from the source line SL, the area of ​​the light-shielding layer covering the touch panel line TL and the source line SL is prevented from becoming large, and the area between the touch panel line TL and the source line SL can also function as an opening.

[0068] (Other forms) The liquid crystal display device of the present disclosure can be modified in various ways. As shown in FIG. 10 , the active matrix substrate 120 includes a plurality of dummy touch panel lines DTL. Each dummy touch panel line DTL is arranged in the first pixel PX1 instead of the touch panel line TL. In a split common electrode row consisting of a plurality of split common electrodes DCE arranged in the y-axis direction, the dummy touch panel line DTL is connected to one split common electrode at a plurality of positions and does not extend to other split common electrodes. Either the touch panel line TL or the dummy touch panel line DTL is arranged in the plurality of first pixels PX1. The relationship between the dummy touch panel lines DTL and other components, their arrangement on the active matrix substrate 120, etc. are similar to those of the touch panel lines TL.

[0069] Since each split common electrode DCE is connected to one touch panel line TL, the number Nt of touch panel lines TL to be arranged in each split common electrode row is equal to the number Nd of split common electrodes included in the split common electrode row. Therefore, if the number Np of first pixels PX1 arranged in the x-axis direction in each split common electrode row is greater than the number Nd of split common electrodes DCE, dummy touch panel lines DTL can be arranged in the surplus first pixels PX1.

[0070] This makes it possible to avoid changing the shape and arrangement of the first pixels PX1 and to make the image display uniform even when the number Np of first pixels PX1 arranged in the x-axis direction of the split common electrode does not match the number Nd of split common electrodes DCE included in the split common electrode row. Also, by connecting the dummy touch panel lines DTL, it is possible to suppress bias in the resistance distribution in the split common electrodes DCE.

[0071] 11 and 12, color filters of two different colors may be arranged in a first pixel PX1 of a liquid crystal display device. For example, the counter substrate 30 includes a first region R1 and a second region R2, each surrounded by a first light-shielding portion BM1 of a light-shielding layer BM, a pair of second light-shielding portions BM2 adjacent to each first light-shielding portion BM1, and a pair of third light-shielding portions BM3 adjacent to the first light-shielding portion BM1. The width of the second region R2 in the x-axis direction is greater than the width of the first region R1 in the x-axis direction.

[0072] A filter of a color other than red, green, or blue is disposed in region R1. Similarly to the above embodiment, a blue filter is disposed in region R2. For example, a filter is disposed in region R1 such that light emitted from the backlight 80 passes through region R1 to emit white light. For example, a white filter CFW can be disposed in region R1. If the light emitted from the backlight 80 is white, the white filter CFW may be omitted. In this case, a colorless overcoat layer OC may cover the surface of the counter substrate 30 between the color filter and the alignment film, and it can be said that a colorless filter is disposed in region R1. If only the overcoat layer OC can be disposed in region R1, the number of steps in the color filter formation process can be kept to the same level as in the conventional method, thereby reducing manufacturing costs.

[0073] With this configuration, even if the touch panel line TL is covered with a light-shielding layer, a decrease in brightness at the boundary between the first pixel PX1 and the adjacent second pixel PX2 is suppressed. Because regions R1 and R2 are the same pixel, the chromaticity of blue decreases, but the decrease in chromaticity is suppressed by increasing the transmission chromaticity of the blue filter disposed in region R2.

[0074] Furthermore, the first pixel electrode PE1 may not have a first portion having a large width in the x-axis direction. As shown in FIG. 13, the first pixel electrode PE1' has only a second electrode portion PE1b between the slits ST. The touch panel line TL overlaps one of the slits ST in the first pixel PX1 in a planar view. In this case, as shown in FIG. 14, the split common electrode DCE' may not have a first opening, and the touch panel line TL may overlap the split common electrode DCE' in a planar view. Furthermore, in order to reduce the parasitic capacitance of the touch panel line TL, the second opening O2' may be enlarged near the gate line GL to reduce the overlapping area between the split common electrode DCE' and the touch panel line TL.

[0075] Furthermore, as shown in FIG. 15, the light-shielding layer BM' does not have the first light-shielding portion, and the touch panel lines TL do not necessarily overlap the light-shielding layer BM' in plan view.

[0076] Although the liquid crystal display device in this embodiment has a full-in-cell touch panel function, the present invention may also be applied to a liquid crystal display device without a touch panel function. For example, an active matrix substrate 220 shown in FIG. 16 includes an undivided common electrode layer CE' located in the display area 21h and an outside-display-area common line CL' arranged outside the display area 21h. The active matrix substrate 220 also includes a plurality of common lines TL' instead of the plurality of touch panel lines TL in the above-described embodiment. Each of the plurality of common lines TL' is connected to the common electrode layer CE' at multiple locations. Each of the plurality of common lines TL' also extends to a non-display area 21g outside the display area 21h and is connected to the outside-display-area common line CL'. As a result, the plurality of common lines TL' are connected to each other in the area outside the display area 21h.

[0077] In a liquid crystal display device including the active matrix substrate 12, the common electrode layer CE' has a low resistance, which suppresses fluctuations in the reference potential and improves the display quality of the liquid crystal display device.

[0078] The active matrix substrate and liquid crystal display device of the present disclosure can also be explained as follows.

[0079] The active matrix substrate according to the first configuration comprises: a first substrate having a display area; a plurality of gate lines arranged in the display area, each extending in a first direction and arranged in a second direction intersecting the first direction; a plurality of source lines arranged in the display area, each extending in the second direction and arranged in the first direction; a plurality of common lines arranged in the display area, each extending in the second direction, arranged in the first direction, and located in the same layer as the plurality of source lines; a first insulating layer disposed above the source lines and the common lines in the display area; a common electrode layer disposed above the first insulating layer in the display area and connected to at least one of the plurality of common lines; a second insulating layer disposed above the common electrode layer in the display area; a plurality of pixels arranged two-dimensionally in the first direction and the second direction in the display area; Equipped with the plurality of pixels include a plurality of first pixels each having a first pixel electrode and a plurality of second pixels each having a second pixel electrode; the plurality of first pixels form a plurality of first pixel columns each arranged along the second direction, the plurality of second pixels form a plurality of second pixel columns each arranged along the second direction, Each of the plurality of common lines is located in one of the plurality of first pixel columns; the second pixel electrode includes at least one slit extending in substantially the same direction as the second direction; the first pixel electrode includes a plurality of slits extending in substantially the same direction as the second direction; the number of slits in the first pixel electrode is greater than the number of slits in the second pixel electrode; a width of each of the first pixels in the first direction is greater than a width of each of the second pixels in the first direction; In each of the first pixels, a portion of the first pixel electrode is located between one of a pair of source lines of the plurality of source lines positioned adjacent to each other so as to sandwich the first pixel and one of the plurality of common lines, and another portion of the first pixel electrode is located between one of the other of the plurality of source lines positioned adjacent to each other so as to sandwich the first pixel and one of the plurality of common lines. With this configuration, even when the common line and the source line are arranged in the same layer in the first pixel, a decrease in the aperture ratio of the first pixel is suppressed.

[0080] An active matrix substrate according to a second configuration may be configured such that, in the first configuration, the common electrode layer includes a plurality of split common electrodes split into a matrix shape in the first direction and the second direction.

[0081] An active matrix substrate according to a third configuration may be the same as that of the first configuration, wherein each of the split common electrodes has a first opening in each of the first pixels, and the first opening may overlap a portion of one of the plurality of common lines in a plan view.

[0082] An active matrix substrate according to a fourth configuration may be the third configuration, wherein the width of the first opening in the first direction is greater than the width of the plurality of common lines in the first direction.

[0083] An active matrix substrate according to a fifth configuration is the third configuration, wherein the first opening is located between a pair of adjacent slits of the first pixel electrode in plan view.

[0084] An active matrix substrate according to a sixth configuration is the active matrix substrate of the fifth configuration, wherein the first opening does not overlap the pair of adjacent slits of the first pixel electrode in plan view.

[0085] An active matrix substrate according to a seventh configuration may be the sixth configuration, wherein the first pixel electrode is located between the plurality of slits and includes a first electrode portion and at least one second electrode portion extending in approximately the same direction, and in a planar view, the first electrode portion overlaps the first opening, the at least one second electrode portion does not overlap the first opening, and the width of the first electrode portion in the first direction is greater than the width of the at least one second electrode portion in the first direction.

[0086] An active matrix substrate according to an eighth configuration may be configured such that, in the third configuration, each of the first pixels and each of the second pixels includes a first switching element and a second switching element, respectively, and in each of the first pixels and each of the second pixels, the first insulating layer and the second insulating layer each have a contact hole, and the first pixel electrode and the first switching element are connected via the contact hole, and the second pixel electrode and the second switching element are connected via the contact hole, and the split common electrode has a plurality of second openings at positions overlapping the contact holes in a planar view, and in each of the first pixels, the first openings and the second openings of the split common electrode may be continuous.

[0087] In the active matrix substrate of the ninth configuration, in the second configuration, one of the plurality of common lines may be located between a pair of split common electrodes adjacent to each other in the first direction in a plan view.

[0088] In the active matrix substrate of the tenth configuration, in the second configuration, the plurality of common lines include a plurality of touch panel lines, and the plurality of split common electrodes form a plurality of split common electrode rows each arranged along the second direction, and each touch panel line may be connected to one split common electrode in one of the plurality of split common electrode rows and not connected to the other split common electrodes, and may extend across the other split common electrodes so as to overlap in a planar view.

[0089] An active matrix substrate according to an eleventh configuration is the tenth configuration, wherein the plurality of common lines further includes a plurality of dummy touch panel lines, and each dummy touch panel line is connected to one split common electrode in one of the split common electrode rows, and may not extend to other split common electrodes.

[0090] In the active matrix substrate of the twelfth configuration, in the first configuration, at least one of the distances between a pair of source lines adjacent to each of the first pixel electrodes and the first pixel electrode may be smaller than the distance between a pair of source lines adjacent to each of the second pixel electrodes and the second pixel electrode among the plurality of source lines.

[0091] An active matrix substrate according to a thirteenth configuration is the twelfth configuration, wherein a portion of each of the first pixel electrodes overlaps with at least one of the pair of adjacent source lines in a plan view.

[0092] In a fourteenth aspect of the active matrix substrate, in addition to the first aspect, the first insulating layer may contain an organic insulating material.

[0093] An active matrix substrate according to a fifteenth configuration is the first configuration, wherein the common lines are connected to one another in an area outside the display area.

[0094] A liquid crystal display device according to a sixteenth configuration includes an active matrix substrate according to any one of the first to fifteenth configurations, a counter substrate, and a liquid crystal layer located between the active matrix substrate and the counter substrate, wherein the counter substrate includes a light-shielding layer that, in a planar view, includes a plurality of first light-shielding portions that overlap each of the plurality of common lines and extend in approximately the same direction as the second direction, and a plurality of second light-shielding portions that overlap each of the plurality of source lines and extend in approximately the same direction as the second direction.

[0095] A liquid crystal display device according to a seventeenth configuration is based on the sixteenth configuration, and may be configured such that the width of each of the first light-shielding portions of the light-shielding layer in the first direction is greater than the width of each of the common lines in the first direction.

[0096] An 18th configuration of a liquid crystal display device is the 16th configuration, wherein the light-shielding layer further includes a plurality of third light-shielding portions extending in approximately the same direction as the first direction, the opposing substrate includes first and second regions respectively surrounded by each first light-shielding portion of the light-shielding layer, a pair of second light-shielding portions adjacent to each of the first light-shielding portions, and a pair of third light-shielding portions adjacent to each of the first light-shielding portions, the width of the second region in the first direction being greater than the width of the first region in the first direction, and the opposing substrate may further include a filter of a color other than red, green, or blue arranged in the first region.

[0097] A liquid crystal display device according to a nineteenth aspect is the eighteenth aspect, wherein the filters are colorless. [Explanation of symbols]

[0098] 10... liquid crystal panel, 10b... rear surface, 20... active matrix substrate, 21... first substrate 21a...main surface, 21g...non-display area, 21h...display area, 22...terminal, 23...gate insulating layer, 24...first insulating layer, 25...second insulating layer, 30...opposite substrate, 32...second substrate, 40...liquid crystal layer, 41...seal, 42...polarizer, 50...control device, 51...gate driver, 52...source driver, 53...controller, 80...backlight, 101...liquid crystal display device

Claims

1. a first substrate having a display area; a plurality of gate lines disposed in the display area, each extending in a first direction and arranged in a second direction intersecting the first direction; a plurality of source lines arranged in the display area, each extending in the second direction and arranged in the first direction; a plurality of common lines arranged in the display area, each extending in the second direction, arranged in the first direction, and located in the same layer as the plurality of source lines; a first insulating layer disposed above the source lines and the common lines in the display area; a common electrode layer disposed above the first insulating layer in the display area and connected to at least one of the plurality of common lines; a second insulating layer disposed above the common electrode layer in the display area; a plurality of pixels arranged two-dimensionally in the first direction and the second direction in the display area; Equipped with the plurality of pixels include a plurality of first pixels each having a first pixel electrode and a plurality of second pixels each having a second pixel electrode; the plurality of first pixels form a plurality of first pixel columns each arranged along the second direction, the plurality of second pixels form a plurality of second pixel columns each arranged along the second direction, Each of the plurality of common lines is located in one of the plurality of first pixel columns; the second pixel electrode includes at least one slit extending in substantially the same direction as the second direction; the first pixel electrode includes a plurality of slits extending in substantially the same direction as the second direction; the number of slits in the first pixel electrode is greater than the number of slits in the second pixel electrode; a width of each of the first pixels in the first direction is greater than a width of each of the second pixels in the first direction; an active matrix substrate, wherein in each of the first pixels, a portion of the first pixel electrode is located between one of a pair of source lines among the plurality of source lines positioned adjacent to each other so as to sandwich each of the first pixels and one of the plurality of common lines, and another portion of the first pixel electrode is located between one of the other source lines among the plurality of source lines positioned adjacent to each of the first pixels and one of the plurality of common lines.

2. The active matrix substrate according to claim 1 , wherein the common electrode layer includes a plurality of divided common electrodes divided into a matrix shape in the first direction and the second direction.

3. Each of the split common electrodes has a first opening in each of the first pixels, The active matrix substrate according to claim 2 , wherein the first opening overlaps a part of one of the plurality of common lines in a plan view.

4. The active matrix substrate according to claim 3 , wherein the width of the first opening in the first direction is greater than the width of the plurality of common lines in the first direction.

5. The active matrix substrate according to claim 3 , wherein the first opening is located between a pair of adjacent slits of the first pixel electrode in a plan view.

6. The active matrix substrate according to claim 5 , wherein the first opening does not overlap the pair of adjacent slits of the first pixel electrode in a plan view.

7. the first pixel electrode is located between the plurality of slits and includes a first electrode portion and at least one second electrode portion extending in substantially the same direction; In a plan view, the first electrode portion overlaps the first opening, and the at least one second electrode portion does not overlap the first opening; The active matrix substrate according to claim 6 , wherein the width of the first electrode portion in the first direction is larger than the width of the at least one second electrode portion in the first direction.

8. each of the first pixels and each of the second pixels includes a first switching element and a second switching element, In each of the first pixels and each of the second pixels, the first insulating layer and the second insulating layer each have a contact hole, and the first pixel electrode and the first switching element are connected via the contact hole, and the second pixel electrode and the second switching element are connected via the contact hole; the split common electrode has a plurality of second openings at positions overlapping the contact holes in a plan view; 4. The active matrix substrate according to claim 3, wherein in each of the first pixels, the first opening and the second opening of the split common electrode are continuous.

9. 3. The active matrix substrate according to claim 2, wherein, in a plan view, one of the plurality of common lines is located between a pair of split common electrodes adjacent to each other in the first direction, among the plurality of split common electrodes.

10. the plurality of common lines includes a plurality of touch panel lines; The plurality of split common electrodes form a plurality of split common electrode rows arranged along the second direction.

3. The active matrix substrate according to claim 2, wherein each touch panel line is connected to one split common electrode of one of the plurality of split common electrode rows, is not connected to the other split common electrodes, and extends across the other split common electrodes so as to overlap in a planar view.

11. the plurality of common lines further includes a plurality of dummy touch panel lines; 11. The active matrix substrate according to claim 10, wherein each dummy touch panel line is connected to one split common electrode in one of the split common electrode rows, and does not extend to other split common electrodes.

12. 2. The active matrix substrate according to claim 1, wherein at least one of the distances between a pair of source lines adjacent to each of the first pixel electrodes and the first pixel electrode is smaller than the distance between a pair of source lines adjacent to each of the second pixel electrodes and the second pixel electrode.

13. The active matrix substrate according to claim 12 , wherein a portion of each of the first pixel electrodes overlaps with at least one of the pair of adjacent source lines in a plan view.

14. The active matrix substrate according to claim 1 , wherein the first insulating layer comprises an organic insulating material.

15. The active matrix substrate according to claim 1 , wherein the plurality of common lines are connected to each other in an area outside the display area.

16. An active matrix substrate according to any one of claims 1 to 15; A counter substrate; a liquid crystal layer located between the active matrix substrate and the counter substrate; Equipped with the opposing substrate includes a light-shielding layer, the light-shielding layer includes, in a planar view, a plurality of first light-shielding portions that overlap each of the plurality of common lines and extend in approximately the same direction as the second direction, and a plurality of second light-shielding portions that overlap each of the plurality of source lines and extend in approximately the same direction as the second direction.

17. The liquid crystal display device according to claim 16 , wherein a width of each of the first light-shielding portions of the light-shielding layer in the first direction is greater than a width of each of the common lines in the first direction.

18. the light-shielding layer further includes a plurality of third light-shielding portions extending in substantially the same direction as the first direction, the opposing substrate includes first regions and second regions, each surrounded by a first light-shielding portion of the light-shielding layer, a pair of second light-shielding portions adjacent to each of the first light-shielding portions, and a pair of third light-shielding portions adjacent to each of the first light-shielding portions; a width of the second region in the first direction is greater than a width of the first region in the first direction; 17. The liquid crystal display device according to claim 16, wherein the counter substrate further comprises a filter of a color other than red, green, and blue, disposed in the first region.

19. 19. The liquid crystal display device according to claim 18, wherein the filter is colorless.

Images