LED array and method for forming the same

Abstract

To provide an LED array and a method for forming the same.SOLUTION: A light emitting diode (LED) device can include a metal contact between a first separation area and a second separation area on a first surface of each epitaxial layer. The LED device can include a first side wall and a second side wall on a second surface of the epitaxial layer distal to the first and second separation areas. The LED device can include a wavelength conversion layer on the epitaxial layer between the first side wall and the second side wall.SELECTED DRAWING: Figure 1I

Description

[Technical Field]

[0001] This application claims the benefit of U.S. Provisional Application No. 62 / 608,316, filed December 20, 2017, European Patent Application No. 18159747.7, filed March 2, 2018, and U.S. Patent Application No. 16 / 226,288, filed December 19, 2018, the contents of which are incorporated herein by reference. [Background technology]

[0002] Among the most efficient light sources currently available are semiconductor light emitting devices, including light emitting diodes (LEDs), resonant cavity light emitting diodes (RCLEDs), vertical cavity laser diodes (VCSELs), and edge-emitting lasers. Materials systems of current interest in the fabrication of high-brightness light emitting devices operable in the visible spectrum include III-V semiconductors, particularly binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen, also referred to as III-nitride materials.

[0003] III-nitride light-emitting devices are typically fabricated by epitaxially growing a stack of semiconductor layers of different compositions and dopant concentrations on a sapphire, silicon carbide, III-nitride, or composite substrate, or other suitable substrate, by metalorganic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or other epitaxial techniques. The stack often includes one or more n-type layers, doped with, for example, silicon, formed on the substrate, one or more light-emitting layers in an active region formed on the one or more n-type layers, and one or more p-type layers, doped with, for example, magnesium, formed on the active region. Electrical contacts are formed on the n-type and p-type regions. Summary of the Invention

[0004] The device may include a metal contact between a first isolation region and a second isolation region on a first surface of an epitaxial layer, a first sidewall and a second sidewall on a second surface of the epitaxial layer distal to the first isolation region and the second isolation region, and a wavelength conversion layer on the epitaxial layer between the first sidewall and the second sidewall. [Brief explanation of the drawings]

[0005] A more detailed understanding will be had from the following description, given by way of example in conjunction with the accompanying drawings, in which: [Figure 1A] FIG. 2 is a top view of an LED array with a portion enlarged. [Figure 1B] FIG. 1 is a cross-sectional view of an LED array having a trench. [Figure 1C] FIG. 10 is a perspective view of another LED array having trenches. [Figure 1D] 1A and 1B are cross-sectional views illustrating the formation of trenches in a sapphire substrate. [Figure 1E] 10 is a cross-sectional view illustrating the formation of a first semiconductor layer in the trench. [Figure 1F] 3A and 3B are cross-sectional views illustrating the formation of an active region and a second semiconductor layer on a first semiconductor layer. [Figure 1G] 10 is a cross-sectional view illustrating the formation of an isolation region and a metal contact on a second semiconductor layer. [Figure 1H] FIG. 10 is a cross-sectional view showing the removal of the sapphire substrate. [Figure 1I] 10A and 10B are cross-sectional views illustrating the formation of a wavelength-converting layer in a well. [Figure 1J] 1 is a cross-sectional view illustrating the formation of a first semiconductor layer on a patterned sapphire substrate (PSS) substrate. [Figure 1K] 4 is a cross-sectional view illustrating the formation of an isolation region on the top surface of the first semiconductor layer. FIG. [Figure 1L] 10A-10C are cross-sectional views illustrating the formation of a mesa on the first semiconductor layer and the isolation region. [Figure 1M]FIG. 10 is a cross-sectional view showing the formation of a second semiconductor layer on the mesa. [Figure 1N] Illustrated is the formation of a dielectric layer on the second semiconductor layer. [Figure 1O] A portion of the dielectric layer is shown removed to expose the top surface of the second semiconductor layer. [Figure 1P] 10 is a cross-sectional view showing the formation of a metal contact layer on the mesa. [Figure 1Q] FIG. 10 is a cross-sectional view illustrating the formation of a second contact through an isolation region. [Figure 1R] FIG. 10 is a cross-sectional view showing the removal of the PSS substrate. [Figure 1S] FIG. 10 is a cross-sectional view showing the removal of the PSS substrate to form a common contact layer. [Figure 1T] FIG. 4 is a cross-sectional view showing the formation of a metal contact layer on a second semiconductor layer. [Figure 1U] FIG. 10 is a cross-sectional view showing the removal of the PSS substrate. [Figure 1V] 1 is a flow chart illustrating a method of forming a device. [Figure 2A] FIG. 1 illustrates a top view of an electronics substrate with an LED array mounted on the substrate in an LED device mounting area, in one embodiment. [Figure 2B] FIG. 1 illustrates an embodiment of a two-channel integrated LED lighting system with electronic components mounted on two surfaces of a circuit board. [Figure 2C] 1 is an example of a vehicle headlamp system. [Figure 3] 1 shows an example of a lighting system. DETAILED DESCRIPTION OF THE INVENTION

[0006] Examples of several different optical illumination system and / or light emitting diode ("LED") implementations are described more fully below with reference to the accompanying drawings. These examples are not mutually exclusive, and features found in one example may be combined with features found in one or more other examples to achieve further implementations. Accordingly, it should be understood that the examples shown in the accompanying drawings are provided for illustrative purposes only and that they are not intended to limit the present disclosure in any way. Like elements are referred to with like numerals throughout.

[0007] It is understood that, although terms such as first, second, and third may be used herein to describe various elements, these elements should not be limited by these terms. These terms may be used to distinguish one element from another. For example, a first element may be referred to as a second element, and a second element may be referred to as the first element, without departing from the scope of the present invention. As used herein, the term "and / or" may include any and all combinations of one or more of the associated listed items.

[0008] It is understood that when an element, e.g., a layer, region, or substrate, is referred to as being "on" or extending "upon" another element, it may be directly on or extending directly onto the other element, or intervening elements may be present. In contrast, when an element is referred to as being "directly on" or extending "directly onto" another element, there may be no intervening elements present. It is also understood that when an element is referred to as being "connected" or "coupled" to another element, it may be directly connected or coupled to the other element and / or may be connected or coupled to the other element via one or more intervening elements. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no intervening elements between the element and the other element. It is understood that these terms are intended to encompass elements in different orientations in addition to the orientation depicted in the figures.

[0009] Relative terms such as "lower," "above," "upper," "bottom," "horizontal," or "vertical" may be used herein to describe the relationship of one element, layer, or region to another element, layer, or region as depicted in the figures. It is understood that these terms are intended to encompass devices in different orientations in addition to the orientation depicted in the figures.

[0010] Among the most efficient light sources currently available are semiconductor light-emitting devices (LEDs), or light output emitting devices, such as devices that emit ultraviolet (UV) or infrared (IR) light output. These devices (hereinafter, "LEDs") can include light-emitting diodes, cavity-type light-emitting diodes, vertical-cavity laser diodes, edge-emitting lasers, or the like. LEDs can be attractive candidates for many different applications, for example, due to their small size and lower power requirements. For example, they can be used as light sources (e.g., flashlights and camera flashes) for handheld battery-powered devices such as cameras and mobile phones. They can also be used for, for example, automotive lighting, head-up display (HUD) lighting, horticultural lighting, street lighting, video torches, general lighting (e.g., home, store, office, and studio lighting, theater / stage lighting, and architectural lighting), augmented reality (AR) lighting, virtual reality (VR) lighting, as backlights for displays, and for IR spectroscopy. A single LED will provide light that is less bright than an incandescent light source, therefore, in applications where more brightness is desired or required, a multi-junction device or an array of LEDs (e.g., monolithic LED array, micro LED array, etc.) may be used.

[0011] According to embodiments of the disclosed subject matter, an LED array (e.g., a micro LED array) may include an array of pixels as shown in FIGS. 1A, 1B, and / or 1C. LED arrays may be used in applications requiring precise control of LED array segments, for example. The pixels in an LED array may be individually addressable, addressable in groups / subsets, or non-addressable. FIG. 1A shows a top view of an LED array 110 having pixels 111. A 3×3 section of the LED array 110 is also shown in FIG. 1A. As shown in the 3×3 section, the LED array 110 may include pixels 111, which may have a width w1 of approximately 100 μm or less (e.g., 40 μm). Lanes 113 between the pixels may be separated by a width w2 of approximately 20 μm or less (e.g., 5 μm). The lanes 113 may provide air gaps between the pixels or may include other materials, as shown in FIGS. 1B and 1C and as further disclosed herein. The distance d1 from the center of one pixel 111 to the center of an adjacent pixel 111 may be about 120 μm or less (e.g., 45 μm). It is understood that the widths and distances provided herein are merely examples, and the actual widths and / or dimensions may vary.

[0012] It is understood that although Figures 1A, 1B, and 1C depict square pixels arranged in a symmetric matrix, any shape and arrangement of pixels may be applied to the embodiments disclosed herein. For example, the LED array 110 of Figure 1A may include over 10,000 pixels in any applicable arrangement, such as a 100x100 matrix, a 200x50 matrix, a symmetric matrix, an asymmetric matrix, or the like. It is also understood that multiple sets of pixels, matrices, and / or substrates may be arranged in any applicable configuration to implement the embodiments disclosed herein.

[0013] FIG. 1B shows a cross-sectional view of an example LED array 1000. As shown, pixels 1010, 1020, and 1030 correspond to three different pixels in the LED array, with isolation 1041 and / or n-contact 1040 isolating these pixels from one another. According to one embodiment, the space between the pixels may be occupied by an air gap. As shown, pixel 1010 includes epitaxial layer 1011, which may be grown on an applicable substrate, such as a sapphire substrate, from which the epitaxial layer 1011 may be removed. The surface of the grown layer distal to contact 1015 may be substantially planar or patterned. A p-type region 1012 may be disposed adjacent to p-contact 1017. An active region 1021 may be disposed adjacent to the n-type and p-type regions 1012. Alternatively, the active region 1021 may be a semiconductor layer or between the n-type and p-type regions 1012 and receive a current, causing the active region 1021 to emit a light beam. A p-contact 1017 may contact the SiO2 layers 1013 and 1014 and the plated metal (e.g., plated copper) layer 1016. The n-contact 1040 may include an applicable metal, such as Cu. The metal layer 1016 may contact a reflective layer 1015, which may function as a contact.

[0014] In particular, as shown in FIG. 1B , the n-contact 1040 may be deposited in a trench 1130 formed between the pixels 1010, 1020, and 1030 and extend beyond the epitaxial layer 1011. The separation 1041 may separate all (as shown) or part of the wavelength-converting layer 1050. It will be understood that the LED array may be implemented without such a separation 1041, or the separation 1041 may correspond to an air gap. The separation 1041 may be an extension of the n-contact 1040, such that the separation 1041 is formed from the same material (e.g., copper) as the n-contact 1040. Alternatively, the separation 1041 may be formed from a different material than the n-contact 1040. According to one embodiment, the separation 1041 may include a reflective material. The materials of the isolation 1041 and / or the n-contact 1040 may be deposited by any applicable method, such as, for example, applying a mesh structure that includes or allows for the deposition of the n-contact 1040 and / or the isolation 1041. The wavelength converting material 1050 may have similar characteristics / properties as the wavelength converting layer 205 of FIG. 2A . As mentioned herein, one or more additional layers may cover the isolation 1041. Such layers may be reflective layers, scattering layers, absorbing layers, or any other applicable layers. One or more passivation layers 1019 may completely or partially separate the n-contact 1040 from the epitaxial layer 1011.

[0015] The epitaxial layer 1011 can be formed from any applicable material that emits photons when excited, including sapphire, SiC, GaN, and silicon, and more specifically, from III-V semiconductors, including but not limited to AlN, AlP, AlAs, AlSb, GaN, GaP, GaSb, InN, InP, InAs, and InSb; II-VI semiconductors, including but not limited to ZnS, ZnSe, CdSe, and CdTe; and IV semiconductors, including but not limited to Ge, Si, and SiC, or mixtures or alloys thereof. These example semiconductors can have refractive indices ranging from about 2.4 to about 4.1 at the typical emission wavelengths of the LEDs in which they reside. For example, a III-nitride semiconductor, such as GaN, can have a refractive index of about 2.4 at 500 nm, and a III-phosphide semiconductor, such as InGaP, can have a refractive index of about 3.7 at 600 nm. The contacts coupled to the LED device 200 may be formed from a solder, such as, for example, AuSn, AuGa, AuSi, or SAC solder.

[0016] The n-type region can be grown on a growth substrate and can include one or more layers of semiconductor material. The one or more layers can have different compositions and dopant concentrations, including, for example, preparation layers and / or layers designed to facilitate removal of the growth substrate. These layers can be n-type, intentionally undoped, or even p-type device layers. These layers can be designed for specific optical, material, or electrical properties desired for the light-emitting region to efficiently emit light. Similarly, the p-type region 1012 can include multiple layers of different compositions, thicknesses, and dopant concentrations, including intentionally undoped or n-type layers. Current can be passed through the p-n junction (e.g., via contacts), and the pixel can generate light at a first wavelength determined at least in part by the bandgap energy of the materials. The pixels may emit light directly (e.g., normal or direct-emitting LEDs), or may emit light into a wavelength-converting layer 1050 which acts to further change the wavelength of the emitted light to output light at a second wavelength (e.g., phosphor-converted LEDs, "PCLEDs," etc.).

[0017] While FIG. 1B shows an example of an LED array 1000 having example pixels 1010, 1020, and 1030, it is understood that the pixels in an LED array may be provided in any one of several configurations. For example, the pixels may be flip-chip structures, vertical injection thin film (VTF) structures, multi-junction structures, thin film flip-chips (TFFCs), lateral devices, etc. For example, lateral LED pixels may be similar to flip-chip LED pixels, but may not be flipped upside down for direct connection of electrodes to a substrate or package. TFFCs may also be similar to flip-chip LED pixels, but the growth substrate may be removed (leaving the thin-film semiconductor layers unsupported). In contrast, a flip-chip LED may include a growth substrate or other substrate as part of the device.

[0018] The wavelength-converting layer 1050 can be in the path of light emitted by the active region 1021 such that the light can traverse one or more intermediate layers (e.g., photonic layers). According to embodiments, the wavelength-converting layer 1050 may not be present in the LED array 1000. The wavelength-converting layer 1050 may include any luminescent material that absorbs light of one wavelength and emits light of a different wavelength, such as, for example, phosphor particles in a transparent or translucent binder or matrix, or ceramic phosphor elements. The thickness of the wavelength-converting layer 1050 may be determined based on the material used or the application / wavelength for which the LED array 1000 or individual pixels 1010, 1020, and 1030 are configured. For example, the wavelength-converting layer 1050 may be approximately 20 μm, 50 μm, or 200 μm. Wavelength-converting layer 1050 may be provided over each individual pixel, as shown, or may be disposed over the entire LED array 1000.

[0019] Primary optics 1022 may be on or above one or more pixels 1010, 1020, and / or 1030 and may allow light from the active region 1021 and / or wavelength converting layer 1050 to pass through the primary optics. Light through the primary optics may be emitted according to a generally Lambertian distribution pattern, such that the luminous intensity of light emitted through the primary optics 1022 is directly proportional to the cosine of the angle between the direction of the incident light and the surface normal when viewed from an ideal diffuse emitter. It is understood that one or more characteristics of the primary optics 1022 may be modified to produce a light distribution pattern that differs from a Lambertian distribution pattern.

[0020] Secondary optics, including one or both of lens 1065 and waveguide 1062, may be provided for pixels 1010, 1020, and / or 1030. It is understood that while secondary optics are described for multiple pixels according to the example shown in FIG. 1B , secondary optics may also be provided for a single pixel. The secondary optics may be used to spread incident light (diverging optics) or to focus incident light into a collimated beam (collimating optics). The waveguide 1062 may be coated with a dielectric material, a metallization layer, or the like, and may be provided to reflect or redirect incident light. In alternative embodiments, the illumination system may not include one or more of wavelength conversion layer 1050, primary optics 1022, waveguide 1062, and lens 1065.

[0021] Lens 1065 may be formed from any applicable transparent material, such as, but not limited to, SiC, aluminum oxide, diamond, or the like, or combinations thereof. Lens 1065 may be used to modify a light beam input to lens 1065 such that the output beam from lens 1065 effectively meets desired photometric specifications. Additionally, lens 1065 may serve one or more aesthetic purposes, such as by determining the lit and / or unlit appearance of multiple LED devices 200B.

[0022] 1C shows a cross-sectional view of the LED array 1100 viewed in three dimensions. As shown, pixels in the LED array 1100 may be separated by trenches that are filled to form n-contacts 1140. The pixels may be grown on a substrate 1114 and may include a p-contact 1113, a p-GaN semiconductor layer 1112, an active region 1111, and an n-GaN semiconductor layer 1110. It is understood that this structure is provided by way of example only, and that one or more semiconductor layers or other applicable layers may be added, removed, partially added, or partially removed to implement the disclosure provided herein. A converter material 1117 may be deposited on the semiconductor layer 1110 (or other applicable layer).

[0023] As shown, a passivation layer 1115 may be formed in the trench 1130, and an n-contact 1140 (e.g., a copper contact) may be deposited in the trench 1130. The passivation layer 1115 may isolate at least a portion of the n-contact 1140 from one or more layers of semiconductor. According to one implementation, the n-contact 1140 or other applicable material in the trench may extend into the converter material 1117, such that the n-contact 1140 or other applicable material provides full or partial optical isolation between pixels.

[0024] Fabricating small addressable LED pixel systems can be costly and difficult. Traditional pick-and-place techniques available for use with millimeter-scale part sizes can be unsuitable for sub-100 micron components that need to be positioned with micron accuracy. Forming a continuous GaN layer for an LED pixel system can create stresses that cause wafer bow. To reduce wafer bow and allow for easier high-temperature annealing, it may be desirable to form devices without a thick, continuous GaN layer. Providing wafer-scale electrical connections to selectively grown GaN mesas is described in further detail below.

[0025] The following description may include sub-100 μm to 300 μm pixels that may include multiple selectively grown (SAG) and / or etched GaN mesas. These mesas may be partially or completely electrically isolated from one another. By reducing the thickness and / or overall number of consecutive GaN layers, integrated film stress and wafer bow can be reduced when forming multi-section LEDs with a matrix layout. Furthermore, higher temperature anneals can be used, especially in highly strained epitaxial layer sections, to produce specific electrical and optical properties for multi-wavelength emission. SAG GaN material can be formed on a sapphire substrate, which can later be removed to reduce optical loss due to the lateral waveguide effect. The SAG GaN material exposed after removal of the sapphire substrate can be used for phosphor encapsulation.

[0026] Referring now to FIG. 1D, a cross-sectional view illustrating the formation of trenches 122 in a sapphire substrate 120 is shown. The sapphire substrate 120 can be made of a crystalline material, such as aluminum oxide, and can be a commercially available sapphire wafer. The sapphire substrate 120 can be etched, patterned, or grooved using conventional patterning and etching techniques to form the trenches 122. In one example, the trenches 122 can be formed using wet etching. In another example, the trenches 122 can be formed by dry etching techniques, such as reactive ion etching (RIE) and inductively coupled plasma reactive ion etching (ICP-RIE). Note that while the trenches are shown as triangular in shape in FIG. 1D, they can have any desired shape formed by the etching process. The sapphire substrate 120 can be similar to the substrate 1114 described above with reference to FIG. 1C and can be formed using similar techniques.

[0027] Referring now to FIG. 1E, a cross-sectional view illustrating the formation of a first semiconductor layer 126 within the trench 122 is shown. The first semiconductor layer 126 may be composed of one or more materials optimized for lattice matching and thermal expansion coefficient matching between the sapphire substrate 120 and subsequent semiconductor layers. The first semiconductor layer 126 may be composed of a semiconductor material, a metal oxide, a metal nitride, or a combination of a metal and a semiconductor material. Examples of materials that may be used for the first semiconductor layer 126 include, but are not limited to, SiC, Al2O1, GaN, AlN, and AlGaN. The first semiconductor layer 126 may be doped with an n-type dopant, such as Si, or a p-type dopant, such as Mg. The concentration of the dopant in the first semiconductor layer 126 may not significantly affect the refractive index of the first semiconductor layer 126, but excessive dopant concentrations may distort the crystal structure of the first semiconductor layer 126. This can adversely affect the quality of subsequent semiconductor layers grown on the first semiconductor layer 126. In one example, the first semiconductor layer 126 is 3e18 cm -3 From 5e19cm -3 The first semiconductor layer 126 may be doped with Si to a nominally constant concentration of 1000 .mu.m or 1000 .mu.m. The first semiconductor layer 126 may also have a graded dopant concentration.

[0028] The first semiconductor layer 126 can be formed using conventional deposition techniques, such as metalorganic chemical vapor deposition (MOCVD), molecular beam epitaxy (MBE), or other epitaxial techniques. In an epitaxial deposition process, chemical reactants supplied by one or more source gases are controlled and system parameters are set so that the depositing atoms arrive at the deposition surface with sufficient energy to move around the surface and orient themselves into the crystalline arrangement of atoms at the deposition surface. The temperature at which the first semiconductor layer 126 is grown can affect the surface morphology of the semiconductor layer grown on the nucleation layer. The first semiconductor layer 126 can be grown and / or annealed at high temperatures, for example, between 900°C and 1200°C. In another example, the first semiconductor layer 126 can be grown between 1080°C and 1165°C.

[0029] The thickness, composition, dopant concentration, and deposition temperature of the first semiconductor layer 126 can each be selected so that the first semiconductor layer 126 has a refractive index close to that of the subsequent semiconductor layers, thereby enhancing light extraction of the device, and so as to produce favorable surface properties for the subsequent semiconductor layers.

[0030] The first semiconductor layer 126 can be composed of any III-V semiconductor, including binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen, also referred to as III-nitride materials. For example, the first semiconductor layer 126 can be composed of III-V semiconductors, including but not limited to AlN, AlP, AlAs, AlSb, GaN, GaP, GaAs, GaSb, InN, InP, InAs, and InSb; II-VI semiconductors, including but not limited to ZnS, ZnSe, CdSe, and CdTe; and IV semiconductors, including but not limited to Ge, Si, and SiC, or mixtures or alloys thereof. These semiconductors can have refractive indices ranging from about 2.4 to about 4.1 at the typical emission wavelengths of the LEDs in which they reside. For example, III-nitride semiconductors, such as GaN, can have a refractive index of about 2.4 at 500 nm, and III-phosphide semiconductors, such as InGaP, can have a refractive index of about 3.7 at 600 nm. In one example, the first semiconductor layer 126 can be made of GaN.

[0031] The first semiconductor layer 126 may be formed using conventional deposition techniques such as MOCVD, MBE, or other epitaxial techniques. The first semiconductor layer 126 may be doped with an n-type dopant.

[0032] 1F, a cross-sectional view illustrating the formation of an active region 128 and a second semiconductor layer 130 on a first semiconductor layer 126 is shown. The second semiconductor layer 130 and the active region 128 can be composed of any III-V semiconductor, including binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen, also referred to as III-nitride materials. For example, the second semiconductor layer 130 and the active region 128 can be composed of III-V semiconductors, including but not limited to AlN, AlP, AlAs, AlSb, GaN, GaP, GaAs, GaSb, InN, InP, InAs, and InSb; II-VI semiconductors, including but not limited to ZnS, ZnSe, CdSe, and CdTe; and IV semiconductors, including but not limited to Ge, Si, and SiC, or mixtures or alloys thereof. These semiconductors can have refractive indices ranging from about 2.4 to about 4.1 at the typical emission wavelengths of the LEDs in which they reside. For example, a III-nitride semiconductor such as GaN may have a refractive index of about 2.4 at 500 nm, and a III-phosphide semiconductor such as InGaP may have a refractive index of about 3.7 at 600 nm. In one example, second semiconductor layer 130 and active region 128 may be made of GaN.

[0033] The second semiconductor layer 130 and the active region 128 may be formed using conventional deposition techniques, such as MOCVD, MBE, or other epitaxial techniques. The active region 128 and the second semiconductor layer 130 may be formed together with the first semiconductor layer 126, or may be formed separately. The active region 128 and the second semiconductor layer 130 may be composed of the same semiconductor material as the first semiconductor layer 126, or they may have different compositions.

[0034] The second semiconductor layer 130 may be doped with a p-type dopant. Thus, the active region 128 may be a p-n diode junction associated with the interface between the first semiconductor layer 126 and the second semiconductor layer 130. Alternatively, the active region 128 may include one or more semiconductor layers that are n-type doped, p-type doped, or undoped. The active region 128 may emit light upon application of an appropriate voltage across the first semiconductor layer 126 and the second semiconductor layer 130. In an alternative implementation, the conductivity types of the first semiconductor layer 126 and the second semiconductor layer 130 may be reversed. That is, the first semiconductor layer 126 may be a p-type layer and the second semiconductor layer 130 may be an n-type layer. The first semiconductor layer 126, the active region 128, and the second semiconductor layer 130 may collectively be referred to as an epitaxial layer 180. Epitaxial layer 180 may be similar to, and may be formed using similar techniques as, epitaxial layer 1011 described above with reference to FIG. 1B.

[0035] 1G, a cross-sectional view is shown illustrating the formation of isolation regions 132 and metal contacts 134 on the second semiconductor layer 130. The isolation regions 132 may be comprised of a dielectric material, such as an oxide, nitride, or oxynitride. The isolation regions 132 may be formed using conventional deposition techniques, such as CVD, plasma-enhanced chemical vapor deposition (PECVD), MOCVD, atomic layer deposition (ALD), evaporation, reactive sputtering, chemical solution deposition, plating, spin-on deposition, or other similar processes. The isolation regions 132 may be patterned and etched using conventional techniques. The metal contacts 134 may be comprised of one or more layers of a conductive metal or metal alloy, such as gold, silver, copper, or other similar metals. The metal contacts 134 may be formed using conventional deposition techniques, such as CVD, PECVD, MOCVD, ALD, evaporation, reactive sputtering, chemical solution deposition, plating, spin-on deposition, or other similar processes. The metal contacts 134 may be patterned and etched using conventional techniques. Isolation regions 132 may be formed to overlie first semiconductor layer 126 formed in trench 122. Isolation regions 132 may define pixels 111 described above with reference to Figure 1A.

[0036] 1H, a cross-sectional view illustrating the removal of the sapphire substrate 120 is shown. The sapphire substrate 120 can be removed by a conventional process, such as grinding, chemical mechanical polishing (CMP), or laser lift-off. In one example, the sapphire substrate 120 can be removed selectively with respect to the first semiconductor layer 126 and the first semiconductor layer 126. Removal of the sapphire substrate 120 can expose a bottom surface 136 of the first semiconductor layer 126 and one or more sidewalls 140 of the first semiconductor layer 126. The one or more sidewalls 140 may also be referred to as one or more protrusions. The one or more sidewalls 140 of the first semiconductor layer 126 can extend below the bottom surface 136 of the first semiconductor layer 126. Removing the sapphire substrate 120 can form a well 138 bounded by the bottom surface 136 and one or more sidewalls 140 of the first semiconductor layer 126. In one example, the bottom surface 136 may be roughened after it is exposed.

[0037] 1I, a cross-sectional view is shown illustrating the formation of a wavelength-converting layer 142 in well 138. Wavelength-converting layer 142 may be formed on bottom surface 136 of first semiconductor layer 126 between sidewalls 140.

[0038] The wavelength-converting layer 142 may be composed of an elemental phosphor or a compound thereof. The wavelength-converting layer 142 may be formed using conventional deposition techniques, such as CVD, plasma-enhanced chemical vapor deposition (PECVD), MOCVD, atomic layer deposition (ALD), evaporation, reactive sputtering, chemical solution deposition, spin-on deposition, or other similar processes. The wavelength-converting layer 142 may include one or more phosphors. A phosphor is a luminescent material that can absorb excitation energy (usually radiation energy) and emit the absorbed energy as radiation of a different energy than the original excitation energy. Phosphors can have quantum efficiencies approaching 100%, meaning that nearly all photons provided as excitation energy can be re-emitted by the phosphor. Phosphors can also be highly absorbing. Because the light-emitting active region 128 can emit light directly into the highly absorbing wavelength-converting layer 142, phosphors can efficiently extract light from the device. Phosphors used in wavelength-converting layer 142 may include, but are not limited to, any conventional green-, yellow-, and red-emitting phosphors.

[0039] The wavelength-converting layer 142 may be formed by depositing phosphor particles on the bottom surface 136 of the first semiconductor layer 126. The phosphor particles may be in direct contact with the first semiconductor layer 126 so that light emitted from the active region 128 can be directly coupled into the phosphor particles. Although not shown in FIG. 1I, an optical coupling medium may be provided to hold the phosphor particles in place. The optical coupling medium may be selected to have an index of refraction that is as close as possible to that of the first semiconductor layer 126 without significantly exceeding it. For most efficient operation, there may be no lossy medium between the first semiconductor layer 126, the phosphor particles of the wavelength-converting layer 142, and the optical coupling medium.

[0040] The phosphor particles may have a particle size between 0.1 μm and 20 μm. To form the wavelength-converting layer 142, the phosphor particles may be applied by, for example, electrophoretic deposition, spin coating, spray coating, screen printing, or other printing techniques. In techniques such as spin coating or spray coating, the phosphor is disposed in a slurry with an organic binder, and after deposition of the slurry, the organic binder may be evaporated, for example, by heating. Optionally, an optical coupling medium may then be applied. The phosphor particles may be nanoparticles themselves (i.e., particles with sizes ranging from 100 nm to 1000 nm). Spherical phosphor particles, typically manufactured by spray pyrolysis or other methods, can be applied to create densely packed layers that provide advantageous scattering properties. The phosphor particles may also be coated with a material having a band gap larger than the light emitted by the phosphor, such as SiO 2 , Al 2 O 3 , MePO 4 , or polyphosphate, or other suitable metal oxides.

[0041] The wavelength-converting layer 142 may be a ceramic phosphor rather than a phosphor powder. Ceramic phosphors can be formed by heating powder phosphor at high pressure until the surfaces of the phosphor particles soften and begin to melt. The partially melted particles may adhere to each other to form a rigid agglomerate of particles. Uniaxial or isostatic pressing and vacuum sintering of a preformed “green body” may be required to form a polycrystalline ceramic layer. By adjusting the heating or pressure conditions, manufacturing method, phosphor particle precursors used, and the appropriate crystal lattice of the phosphor material, the optical transparency of the ceramic phosphor (i.e., the amount of scattering it produces) can be controlled from highly opaque to highly transparent. For example, other ceramic-forming materials, such as alumina, may be included in addition to the phosphor to facilitate ceramic formation or to adjust the refractive index of the ceramic.

[0042] The wavelength-converting layer 142 may be composed of a mixture of silicone and phosphor particles. In this example, the wavelength-converting layer 142 may be diced from the plate and disposed on the bottom surface 136 of the first semiconductor layer 126.

[0043] In another example, a PSS substrate with a pre-formed pattern of raised and recessed regions can be used to form the SAG and etched GaN mesas. In yet another example, after forming the first semiconductor layer 126 in the trench 122, the first semiconductor layer 126 can be planarized to expose the top surface of the sapphire substrate 120 before forming the first semiconductor layer 126. Thus, the first semiconductor layer 126 can be formed directly on the first semiconductor layer 126 and the top surface of the sapphire substrate 120. Once the sapphire substrate 120 is removed, the wavelength conversion layer 142 can be formed directly on the bottom surface of the first semiconductor layer 126 and bounded by the sidewalls 140 of the first semiconductor layer 126.

[0044] 1B, one or more n-contacts 1040 may be formed on sidewalls 137 of epitaxial layer 180 and extend to one or more sidewalls 140. One or more passivation layers 1019 may completely or partially separate one or more n-contacts 1040 from epitaxial layer 180 and one or more sidewalls 140.

[0045] 1J, a cross-sectional view is shown illustrating the formation of a first semiconductor layer 148 on a PSS substrate 144. The PSS substrate 144 can be made of a crystalline material such as aluminum oxide, and can be a commercially available sapphire wafer. The PSS substrate 144 can be etched, patterned, or grooved using conventional patterning and etching techniques. The recessed regions in the PSS substrate 144 can be formed by dry etching techniques, such as RIE and ICP-RIE. The PSS substrate 144 can be similar to the substrate 1114 described above with reference to FIG. 1C and can be formed using similar techniques.

[0046] A first semiconductor layer 148 may be formed within the recess of the PSS substrate 144. The first semiconductor layer 148 may be composed of one or more materials optimized for lattice matching and thermal expansion coefficient matching between the PSS substrate 144 and subsequent semiconductor layers. The first semiconductor layer 148 may be composed of a semiconductor material, a metal oxide, a metal nitride, or a combination of a metal and a semiconductor material. Examples of materials that may be used for the first semiconductor layer 148 include, but are not limited to, SiC, Al2O1, GaN, AlN, and AlGaN. The first semiconductor layer 148 may be doped with an n-type dopant, such as Si, or a p-type dopant, such as Mg. While the dopant concentration in the first semiconductor layer 148 may not significantly affect the refractive index of the first semiconductor layer 148, excessive dopant concentrations may distort the crystalline structure of the first semiconductor layer 148. This may adversely affect the quality of subsequent semiconductor layers grown on the first semiconductor layer 148. In one example, the first semiconductor layer 148 has a thickness of 3e18 cm -3 From 5e19cm -3 The first semiconductor layer 148 may be doped with Si to a nominally constant concentration of 1000 .mu.m or 1000 .mu.m. The first semiconductor layer 148 may also have a graded dopant concentration.

[0047] The first semiconductor layer 148 can be formed using conventional deposition techniques, such as MOCVD, MBE, or other epitaxial techniques. In an epitaxial deposition process, chemical reactants supplied by one or more source gases are controlled and system parameters are set so that the depositing atoms arrive at the deposition surface with sufficient energy to move around the surface and orient themselves into the crystalline arrangement of atoms at the deposition surface. The temperature at which the first semiconductor layer 148 is grown can affect the surface morphology of the semiconductor layer grown on the nucleation layer. The first semiconductor layer 148 can be grown and / or annealed at high temperatures, for example, between 900°C and 1200°C. In another example, the first semiconductor layer 148 can be grown between 1080°C and 1165°C.

[0048] The thickness, composition, dopant concentration, and deposition temperature of first semiconductor layer 148 can each be selected so that first semiconductor layer 148 has a refractive index close to that of subsequent semiconductor layers, thereby enhancing light extraction of the device, and so as to produce favorable surface properties for the subsequent semiconductor layers.

[0049] The first semiconductor layer 148 can be composed of any III-V semiconductor, including binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen, also referred to as III-nitride materials. For example, the first semiconductor layer 148 can be composed of III-V semiconductors, including but not limited to AlN, AlP, AlAs, AlSb, GaN, GaP, GaAs, GaSb, InN, InP, InAs, and InSb; II-VI semiconductors, including but not limited to ZnS, ZnSe, CdSe, and CdTe; and IV semiconductors, including but not limited to Ge, Si, and SiC, or mixtures or alloys thereof. These semiconductors can have refractive indices ranging from about 2.4 to about 4.1 at the typical emission wavelengths of the LEDs in which they reside. For example, a III-nitride semiconductor, such as GaN, can have a refractive index of about 2.4 at 500 nm, and a III-phosphide semiconductor, such as InGaP, can have a refractive index of about 3.7 at 600 nm. In one example, the first semiconductor layer 148 can be made of GaN.

[0050] The first semiconductor layer 148 may be formed using conventional deposition techniques such as MOCVD, MBE, or other epitaxial techniques. The first semiconductor layer 148 may be doped with an n-type dopant.

[0051] 1K, a cross-sectional view is shown illustrating the formation of an isolation region 150 on a top surface 152 of the first semiconductor layer 148. The isolation region 150 may be composed of a dielectric material, such as an oxide, nitride, or oxynitride. The isolation region 150 may be formed using conventional deposition techniques, such as CVD, plasma-enhanced chemical vapor deposition (PECVD), MOCVD, atomic layer deposition (ALD), evaporation, reactive sputtering, chemical solution deposition, spin-on deposition, or other similar processes. The isolation region 150 may be patterned and etched using conventional techniques. The isolation region 150 may be formed to expose a portion of the top surface 152 of the first semiconductor layer 148 in an opening 154. Prior to the deposition of the isolation region 150, a first contact 172 may be formed in the first semiconductor layer 148. The first contact 172 may be formed by etching a trench in the first semiconductor layer 148 and filling it with one or more layers of a conductive metal or metal alloy, such as, for example, gold, silver, copper, etc. The first contact 172 may be formed using conventional deposition techniques, such as, for example, CVD, PECVD, MOCVD, ALD, evaporation, reactive sputtering, chemical solution deposition, plating, spin-on deposition, or other similar processes.

[0052] 1L, a cross-sectional view is shown illustrating the formation of a mesa 156 on the first semiconductor layer 148 and on the isolation region 150. The mesa 156 can be formed such that a first portion 158 of the mesa 156 contacts the top surface 152 of the first semiconductor layer 148, a second portion 160 of the mesa 156 contacts the sidewall of the isolation region 150, and a third portion 162 of the mesa 156 contacts the top surface of the isolation region 150.

[0053] Mesa 156 can be made of any III-V semiconductor, including binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen, also known as III-nitride materials. For example, mesa 156 can be made of III-V semiconductors, including but not limited to AlN, AlP, AlAs, AlSb, GaN, GaP, GaAs, GaSb, InN, InP, InAs, and InSb; II-VI semiconductors, including but not limited to ZnS, ZnSe, CdSe, and CdTe; and IV semiconductors, including but not limited to Ge, Si, and SiC, or mixtures or alloys thereof. These semiconductors can have refractive indices ranging from about 2.4 to about 4.1 at the typical emission wavelengths of the LEDs in which they reside. For example, III-nitride semiconductors, such as GaN, can have a refractive index of about 2.4 at 500 nm, and III-phosphide semiconductors, such as InGaP, can have a refractive index of about 3.7 at 600 nm. In one example, mesa 156 can be made of GaN.

[0054] Mesa 156 may be formed using conventional deposition techniques, such as MOCVD, MBE, or other epitaxial techniques. Mesa 156 may be formed together with first semiconductor layer 148 and the active region to form epitaxial layer 1011, as described above with reference to FIG. 1B, or may be formed separately. Mesa 156 may be composed of the same semiconductor material as first semiconductor layer 148, or they may have a different composition.

[0055] 1M, a cross-sectional view is shown illustrating the formation of a second semiconductor layer 164 on mesa 156. Second semiconductor layer 164 may be selectively grown on mesa 156 using a conventional deposition process such as, for example, MOCVD, MBE, or other epitaxial techniques.

[0056] The second semiconductor layer 164 can be composed of any III-V semiconductor, including binary, ternary, and quaternary alloys of gallium, aluminum, indium, and nitrogen, also referred to as III-nitride materials. For example, the second semiconductor layer 164 can be composed of III-V semiconductors, including but not limited to AlN, AlP, AlAs, AlSb, GaN, GaP, GaAs, GaSb, InN, InP, InAs, and InSb; II-VI semiconductors, including but not limited to ZnS, ZnSe, CdSe, and CdTe; and IV semiconductors, including but not limited to Ge, Si, and SiC, or mixtures or alloys thereof. These semiconductors can have refractive indices ranging from about 2.4 to about 4.1 at the typical emission wavelengths of the LEDs in which they reside. For example, a III-nitride semiconductor, such as GaN, can have a refractive index of about 2.4 at 500 nm, and a III-phosphide semiconductor, such as InGaP, can have a refractive index of about 3.7 at 600 nm. In one example, the second semiconductor layer 164 may be made of AlGaN.

[0057] The second semiconductor layer 164 may be formed together with the mesa 156 or may be formed separately. The mesa 156 and the second semiconductor layer 164 may be composed of the same semiconductor material as the first semiconductor material 148, or they may have different compositions.

[0058] The mesa 156 and the second semiconductor layer 164 may be doped with a p-type dopant, and the first semiconductor layer 148 may be doped with an n-type dopant. Thus, a portion of the mesa 156 may act as an active region. This active region may be a p-n diode junction associated with the interface between the first semiconductor layer 148 and the mesa 156. Alternatively, the first semiconductor layer 148 and the mesa 156 may be doped with an n-type dopant, and the second semiconductor layer 164 may be doped with a p-type dopant. Thus, a portion of the mesa 156 may act as an active region. This active region may be a p-n diode junction associated with the interface between the mesa 156 and the second semiconductor layer 164. The active region within the mesa 156 may include one or more semiconductor layers that are n-type doped, p-type doped, or undoped.

[0059] The active region may emit light upon application of an appropriate voltage across the first semiconductor layer 148 and / or the second semiconductor layer 164. In an alternative implementation, the conductivity types of the first semiconductor layer 148, the mesa 156, and the second semiconductor layer 164 may be reversed.

[0060] After the second semiconductor layer 164 is formed, the device can be processed in several ways to form the top side electrical connections.

[0061] 1N-1O, cross-sectional views illustrating an example of forming a top-side electrical connection on the structure of FIG. 1M are shown. FIG. 1N illustrates forming a dielectric layer 166 on the second semiconductor layer 164. The dielectric layer 166 can be composed of a dielectric material such as an oxide, nitride, or oxynitride. The dielectric layer 166 can be formed on the second semiconductor layer 164 using conventional deposition techniques, such as CVD, PECVD, MOCVD, ALD, evaporation, reactive sputtering, chemical solution deposition, spin-on deposition, or other similar processes. The isolation region 150 can be patterned and etched using conventional techniques. In one example, the dielectric layer 166 is also formed on the isolation region 150 and can be removed using conventional patterning and etching techniques. FIG. 1O illustrates removing a portion of the dielectric layer 166 to expose a top surface 168 of the second semiconductor layer 164. The exposed top surface 168 of the second semiconductor layer 164 can serve as a contact. In one example, the second semiconductor layer 164 can be made of a p-type material, and the top surface 168 can act as a p-type contact.

[0062] 1P, a cross-sectional view is shown illustrating the formation of a metal contact layer 170 on the mesa 156 to form one or more pixels 111. The metal contact layer 170 may be formed on the dielectric layer 166 and the second semiconductor layer 164. The metal contact layer 170 may be composed of one or more layers of a conductive metal or metal alloy, such as gold, silver, or copper. The metal contact layer 170 may be formed using conventional deposition techniques, such as CVD, PECVD, MOCVD, ALD, evaporation, reactive sputtering, chemical solution deposition, plating, spin-on deposition, or other similar processes. The metal contact layer 170 may be patterned and etched using conventional techniques. The metal contact layer 170 may act as an anode contact and a reflective layer. In one example, an air bridge may be used to form a contact within the first semiconductor layer.

[0063] Referring now to FIG. 1Q, a cross-sectional view illustrating the formation of a second contact 175 through the isolation region 150 is shown. The second contact 175 may be formed by etching a trench through the isolation region 150 and a portion of the first semiconductor layer 148 and filling it with one or more layers of a conductive metal or metal alloy, such as gold, silver, or copper. The second contact 175 may be formed using conventional deposition techniques, such as CVD, PECVD, MOCVD, ALD, evaporation, reactive sputtering, chemical solution deposition, plating, spin-on deposition, or other similar processes. The second contact 175 may be similar to the n-contact 1040 described above with reference to FIG. 1B. A passivation layer 177 may be formed between the second contact 175 and the metal contact layer 170. Note that although one second contact 175 is shown, two or more second contacts 175 may be formed in one or more isolation regions 150. It should be noted that the second contact 175 may be formed in any of the embodiments described herein using the processes described above.

[0064] 1R, a cross-sectional view is shown illustrating the removal of PSS substrate 144. PSS substrate 144 may be removed by conventional processes such as, for example, grinding, chemical mechanical polishing (CMP), or laser lift-off.

[0065] In another example, the PSS substrate is removed to expose the backside of the device, and a common contact can be formed. Referring now to FIG. 1S, a cross-sectional view is shown illustrating the removal of PSS substrate 144 to form common contact layer 174. PSS substrate 144 can be removed by a conventional process, such as grinding, chemical mechanical polishing (CMP), or laser lift-off. Removal of PSS substrate 144 can expose bottom surface 176 of first semiconductor layer 148. In one example, bottom surface 176 can be roughened after it is exposed.

[0066] A common contact layer 174 may be formed on the bottom surface 176 of the first semiconductor layer 148. The common contact layer 174 may be composed of a blanket transparent conductor. In one example, the common contact layer 174 may be composed of a transparent conductive oxide (TCO), such as indium tin oxide (ITO). The common contact layer 174 may be a p-contact or an n-contact. The common contact layer 174 may be formed using conventional deposition techniques, such as CVD, PECVD, MOCVD, ALD, evaporation, reactive sputtering, chemical solution deposition, spin-on deposition, or other similar processes. With the PSS substrate 144 removed, a phosphor (not shown) may be applied directly onto the common contact layer 174 to form the LED emitter 102.

[0067] Referring now to FIG. 1T, a cross-sectional view illustrating another example of forming a top-side electrical connection to the structure of FIG. 1M is shown. FIG. 1T illustrates forming a metal contact layer 178 on the second semiconductor layer 164. The metal contact layer 170 may be formed on the dielectric layer 166 and on the second semiconductor layer 164. The metal contact layer 178 may be composed of one or more layers of a conductive metal or metal alloy, such as gold, silver, copper, or the like. The metal contact layer 178 may be formed using conventional deposition techniques, such as CVD, PECVD, MOCVD, ALD, evaporation, reactive sputtering, chemical solution deposition, plating, spin-on deposition, or other similar processes. The metal contact layer 178 may be patterned and etched using conventional techniques.

[0068] 1U, a cross-sectional view is shown illustrating the removal of PSS substrate 144. PSS substrate 144 may be removed by conventional processes such as, for example, grinding, chemical mechanical polishing (CMP), or laser lift-off.

[0069] The epitaxial layer may be formed on a sapphire substrate, which may have one or more trenches in which the epitaxial layer is grown.

[0070] Referring now to FIG. 1V, a flowchart illustrating a method for forming a device is shown. In step 192, a metal contact may be formed between a first isolation region and a second isolation region on a first surface of the epitaxial layer. In step 194, a wavelength conversion layer may be formed on the second surface of the epitaxial layer between the first sidewall and the second sidewall. The first surface may be distal to the second surface. The first sidewall and the second sidewall may be portions of the epitaxial layer formed in trenches etched in a sapphire substrate. Note that the term "distal" as used herein may be used as a directional term to refer to spatially opposite sides of an element, device, layer, or other structure. A first element and a second element on distal sides of a third element may be separated from each other by at least a portion of the third element. For example, a top surface of a layer may be distal to a bottom surface of the layer.

[0071] 2A is a top view of an electronics board with an LED array 410 mounted on the board in LED device mounting area 318, according to one embodiment. The electronics board, together with the LED array 410, represents an LED system 400A. The power module 312 also receives a voltage input at Vin 497, receives a control signal from the connection and control module 316 on trace 418B, and provides a drive signal to the LED array 410 on trace 418A. The LED array 410 is turned on and off by the drive signal from the power module 312. In the embodiment shown in FIG. 2A, the connection and control module 316 receives a sensor signal from the sensor module 314 on trace 418C.

[0072] FIG. 2B illustrates one embodiment of a two-channel integrated LED lighting system with electronic components mounted on two surfaces of a circuit board 499. As shown in FIG. 2B, LED lighting system 400B includes a first surface 445A having inputs for receiving a dimmer signal and an AC power signal, on which an AC / DC converter circuit 412 is mounted. LED system 400B includes a second surface 445B on which a dimmer interface circuit 415, DC-DC converter circuits 440A and 440B, a connection and control module 416 (in this example, a wireless module) having a microcontroller 472, and an LED array 410 are mounted. LED array 410 is driven by two independent channels 411A and 411B. In alternative embodiments, a single channel may be used to provide drive signals to the LED array, or any number of multiple channels may be used to provide drive signals to the LED array.

[0073] The LED array 410 may include two groups of LED devices. In one example embodiment, the LED devices in group A are electrically coupled to a first channel 411A, and the LED devices in group B are electrically coupled to a second channel 411B. Two DC-DC converters 440A and 440B may each provide a respective drive current via a single channel 411A and 411B to drive the LEDs in group A and group B, respectively, in the LED array 410. The LEDs in one of these LED groups may be configured to emit light having a different color point than the LEDs in the second group. By controlling the current and / or duty cycle provided by the individual DC-DC converter circuits 440A and 440B via their respective single channels 411A and 411B, the composite color point of the light emitted by the LED array 410 may be adjusted within a certain range. While the embodiment shown in FIG. 2B does not include a sensor module (as described in FIG. 2A), an alternative embodiment may include a sensor module.

[0074] The illustrated LED lighting system 400B is an integrated system in which the LED array 410 and circuitry for operating the LED array 410 are provided on a single electronics board. Connections between modules on the same surface of the circuit board 499 may be electrically coupled by on- or sub-surface interconnects or metallization (not shown), such as traces 431, 432, 433, 434, and 435, for example, to exchange voltage, current, and control signals between the modules. Connections between modules on opposite surfaces of the circuit board 499 may be electrically coupled by through-substrate interconnects, such as vias and metallization (not shown).

[0075] According to embodiments, an LED system may be provided in which the LED array is on a separate electronics board from the driver circuit and the control circuit. According to other embodiments, an LED system may have an LED array with part of the electronic circuitry on a separate electronics board from the driver circuit. For example, an LED system may include an LED module and a power conversion module located on a separate electronics board from the LED array.

[0076] According to embodiments, an LED system may include a multi-channel LED driver circuit. For example, an LED module may include embedded LED calibration and configuration data and, for example, three groups of LEDs. Those skilled in the art will recognize that any number of groups of LEDs may be used consistent with one or more applications. Individual LEDs within each group may be configured in series or parallel to provide light with different color points. For example, a first group of LEDs may provide warm white light, a second group of LEDs may provide cool white light, and a third group may provide a neutral white light.

[0077] 2C shows an example of a vehicle headlamp system 300 that includes a vehicle power supply 302 and includes a data bus 304. A sensor module 307 may be connected to the data bus 304 to provide data regarding environmental conditions (e.g., ambient light conditions, temperature, time, rain, fog, etc.), vehicle conditions (parked, in motion, speed, direction), the presence / location of other vehicles, pedestrians, objects, or the like. The sensor module 307 may be similar to or the same as the sensor module 314 of FIG. 2A. An AC / DC converter 305 may be connected to the vehicle power supply 302.

[0078] The AC-DC converter 312 of FIG. 2C can be the same as or similar to the AC-DC converter 412 of FIG. 2B and can receive AC power from the vehicle power supply 302. It can convert the AC power to DC power as described in FIG. 2B with respect to the AC-DC converter 412. The vehicle headlamp system 300 can include an active headlamp 330, which receives one or more inputs provided by or based on the AC-DC converter 305, the connectivity and control module 306, and / or the sensor module 307. As an example, the sensor module 307 can detect the presence of a pedestrian. If the pedestrian is not sufficiently illuminated, the driver is less likely to see the pedestrian. Based on such sensor input, the connectivity and control module 306 can use power provided by the AC-DC converter 305 to output data to the active headlamp 330, such that the output data activates a subset of LEDs in an LED array contained within the active headlamp 330. When activated, a subset of the LEDs in the LED array may emit light in a direction in which the sensor module 307 senses the presence of a pedestrian. After the sensor module 307 provides updated data confirming that the pedestrian is no longer in the path of the vehicle including the vehicle headlamp system, these subsets of LEDs may be deactivated or their light beam direction may otherwise be changed.

[0079] FIG. 3 illustrates an example of a system 550 that includes an application platform 560, LED systems 552 and 556, and optical systems 554 and 558. LED system 552 generates light beam 561, shown between arrows 561a and 561b. LED system 556 may generate light beam 562, shown between arrows 562a and 562b. In the embodiment illustrated in FIG. 3, light emitted from LED system 552 passes through secondary optics 554, and light emitted from LED system 556 passes through secondary optics 554. In alternative embodiments, light beams 561 and 562 do not pass through any secondary optics. The secondary optics can be or include one or more light guides. The one or more light guides can be edge-lit or have internal openings that define the interior edges of the light guides. The LED systems 552 and / or 556 can be inserted into an internal opening of one or more light guides to inject light into the internal edge of the one or more light guides (an internally apertured light guide) or can inject light into the external edge (an edge-lit light guide). The LEDs in the LED systems 552 and / or 556 can be arranged around a base that is part of the light guide. In one implementation, the base can be thermally conductive. In one implementation, the base can be coupled to a heat dissipation element disposed on the light guide. The heat dissipation element can be configured to receive heat generated by the LEDs through the thermally conductive base and dissipate the received heat. The one or more light guides can enable the light emitted by the LED systems 552 and 556 to be shaped as desired, such as with a gradient, a beveled distribution, a narrow distribution, a wide distribution, an angular distribution, or the like.

[0080] In example embodiments, system 550 may be a camera flash system in a cell phone, indoor residential or commercial lighting, outdoor lighting such as a street light, an automobile, a medical device, an AR / VR device, and a robotic device. LED system 400A shown in Figure 2A and vehicle headlamp system 300 shown in Figure 2C are illustrative of LED systems 552 and 556 in example embodiments.

[0081] Application platform 560 may provide power to LED systems 552 and / or 556 via a power bus via lines 565 or other applicable inputs, as described herein. Additionally, application platform 560 may provide input signals via lines 565 for operation of LED systems 552 and 556, which may be based on user inputs / preferences, sensed readings, pre-programmed or autonomously determined outputs, or the like. One or more sensors may be internal or external to the housing of application platform 560. Alternatively, or in addition, as shown in LED system 400 of FIG. 2A , each LED system 552 and 556 may include its own sensor module, connectivity and control module, power module, and / or LED device.

[0082] In an embodiment, sensors of application platform 560 and / or sensors of LED systems 552 and / or 556 may collect data, such as visual data (e.g., LIDAR data, IR data, data collected via a camera, etc.), audio data, distance-based data, movement data, environmental data, etc., or the like, or combinations thereof. The data may relate to physical items or entities, such as objects, individuals, vehicles, etc. For example, a sensing device may collect object proximity data for ADAS / AV-based applications, which may prioritize detection and subsequent action based on the detection of a physical item or entity. Data may be collected based on emitting an optical signal, such as an IR signal, by, for example, LED systems 552 and / or 556, and collecting data based on the emitted optical signal. The data may be collected by a component different from the component emitting the optical signal for data collection. Continuing with this example, a sensing device may be located on an automobile, which may emit a beam using a vertical-cavity surface-emitting laser (VCSEL). One or more sensors may sense a response to the emitted beam or other applicable input.

[0083] In an example embodiment, application platform 560 may represent an automobile, and LED system 552 and LED system 556 may represent automobile headlights. In various embodiments, system 550 may represent an automobile with a steerable light beam in which multiple LEDs are selectively activated to provide steerable light. For example, an array of LEDs may be used to define or project a shape or pattern, or to illuminate only selected portions of a road. In an example embodiment, the infrared camera or detector pixels in LED systems 552 and / or 556 may be sensors (e.g., similar to sensor module 314 of FIG. 2A and sensor module 307 of FIG. 2C) that identify portions of a scene requiring illumination (e.g., road, crosswalk, etc.).

[0084] Although the embodiments have been described in detail, those skilled in the art will appreciate that, given this specification, modifications may be made to the embodiments described herein without departing from the spirit of the inventive concept, and therefore, it is not intended that the scope of the invention be limited to the specific embodiments shown and described.

Claims

[Claim 1] a metal contact between a first isolation region and a second isolation region on a first surface of an epitaxial layer, the epitaxial layer having a first semiconductor layer, an active region on the first semiconductor layer, and a second semiconductor layer on the active region; a second surface of the epitaxial layer distal to the first surface, the second surface having a first protrusion and a second protrusion, the first protrusion and the second protrusion each having a first sidewall and a second sidewall with portions of the epitaxial layer of the first protrusion and the second protrusion, respectively; a wavelength conversion layer on the second surface of the epitaxial layer between the first protrusion and the second protrusion; a second contact disposed in a trench formed in the epitaxial layer, the second contact extending from the first surface of the epitaxial layer to the first sidewall or the second sidewall; a passivation layer electrically insulating the second semiconductor layer and the active region from the second contact; A light emitting diode device having:

Images