Semiconductor device

The semiconductor device addresses the imbalance in heat dissipation and parasitic inductance by using a specific configuration with insulating and conductive layers, conductive members, and opposite polarity electrodes, enhancing both heat dissipation and reducing parasitic inductance.

JP2025159731AInactive Publication Date: 2025-10-22ROHM CO LTD
View PDF 1 Cites 0 Cited by

Patent Information

Application Number
JP2022117163
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2022-07-22
Publication Date
2025-10-22
Estimated Expiration
Not applicable · inactive patent

AI Technical Summary

Technical Problem

Conventional semiconductor devices with semiconductor elements having a switching function face challenges in reducing parasitic inductance while achieving balanced heat dissipation, as the source electrode dissipates less heat compared to the drain electrode.

Method used

A semiconductor device configuration featuring a first insulating layer, conductive layers, heat dissipation layers, and semiconductor elements with opposite polarity electrodes, connected via a conductive member, and sealed with a resin to enhance heat dissipation and reduce parasitic inductance.

Benefits of technology

The configuration effectively reduces parasitic inductance and improves heat dissipation performance by balancing heat dissipation across the semiconductor elements.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2025159731000001_ABST
    Figure 2025159731000001_ABST
Patent Text Reader

Abstract

To provide a semiconductor device with which improvement in heat dissipation property of the device can be attained while reducing parasitic inductance of the device.SOLUTION: A semiconductor device A10 comprises: a first insulating layer 11; a first conductive layer 12, a second conductive layer 13 and a first heat dissipation layer 16 which are joined to the first insulating layer 11; a first semiconductor element 21 and a second semiconductor element 22; a conducting member 17; and a sealing resin 60. The first heat dissipation layer 16 is positioned on an opposite side of the first conductive layer 12 and the second conductive layer 13 when the first insulating layer 11 is defined as a reference. The first semiconductor element 21 includes a first electrode to which the first conductive layer 12 is conductively joined and a second electrode to which the conducting member 17 is conductively joined. The second semiconductor element 22 includes a third electrode to which the conducting member 17 is conductively joined and a fourth electrode which is conductively joined to the second conductive layer 13. A polarity of the second electrode and a polarity of the third electrode are different from each other. The first heat dissipation layer 16 and the conducting member 17 are exposed from the sealing resin 60.SELECTED DRAWING: Figure 5
Need to check novelty before this filing date? Find Prior Art

Description

[Technical Field]

[0001] The present disclosure relates to semiconductor devices. [Background technology]

[0002] Conventionally, semiconductor devices equipped with semiconductor elements having a switching function have been widely known. Such semiconductor devices are mainly used for power conversion. Patent Document 1 discloses an example of such a semiconductor device.

[0003] In the semiconductor device disclosed in Patent Document 1, the semiconductor element mounted on the semiconductor device has a source electrode and a drain electrode positioned on opposite sides. An upper plate electrode is conductively connected to the source electrode. A drain electrode pattern is conductively connected to the drain electrode. The semiconductor element is sandwiched between the upper plate electrode and the drain electrode pattern. This configuration makes it possible to reduce the parasitic inductance of the semiconductor device while miniaturizing the semiconductor device. However, the area of ​​the source electrode is generally smaller than the area of ​​the drain electrode. As a result, the semiconductor device has a problem in that the amount of heat dissipated from the source electrode to the upper plate electrode is smaller than the amount of heat dissipated from the drain electrode to the drain electrode pattern, and the heat dissipation of the semiconductor element is not fully realized. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2013-258387 Summary of the Invention [Problem to be solved by the invention]

[0005] In view of the above-mentioned circumstances, an object of the present disclosure is to provide a semiconductor device that can reduce the parasitic inductance of the device while improving the heat dissipation performance of the device. [Means for solving the problem]

[0006] a first insulating layer; a first conductive layer bonded to one side of the first insulating layer in a first direction; a second conductive layer located on the same side as the first conductive layer in the first direction and bonded to the first insulating layer; a first heat dissipation layer located on the opposite side of the first insulating layer from the first conductive layer and the second conductive layer and bonded to the first insulating layer; a first semiconductor element having a first electrode and a second electrode located opposite each other in the first direction, with the first electrode conductively bonded to the first conductive layer; a second semiconductor element having a third electrode and a fourth electrode located opposite each other in the first direction, with the fourth electrode conductively bonded to the second conductive layer; a conductive member conductively bonded to the second electrode and the third electrode; and a sealing resin covering the first semiconductor element and the second semiconductor element, wherein the polarity of the second electrode and the polarity of the third electrode are different from each other, and the first heat dissipation layer and the conductive member are exposed from the sealing resin. [Effects of the Invention]

[0007] The configuration of the semiconductor device according to the present disclosure makes it possible to reduce the parasitic inductance of the device and improve the heat dissipation performance of the device.

[0008] Other features and advantages of the present disclosure will become more apparent from the following detailed description taken in conjunction with the accompanying drawings. [Brief explanation of the drawings]

[0009] [Figure 1] FIG. 1 is a plan view of a semiconductor device according to a first embodiment of the present disclosure. [Figure 2] FIG. 2 is a plan view corresponding to FIG. 1, and shows the sealing resin, the second insulating layer of the conductive member, and the second heat dissipation layer in a see-through manner. [Figure 3] FIG. 3 is a plan view corresponding to FIG. 2, and further shows the third conductive layer of the conductive member in a transparent manner. [Figure 4]FIG. 4 is a bottom view of the semiconductor device shown in FIG. [Figure 5] FIG. 5 is a cross-sectional view taken along line VV in FIG. [Figure 6] FIG. 6 is a cross-sectional view taken along line VI-VI in FIG. [Figure 7] FIG. 7 is a cross-sectional view taken along line VII-VII in FIG. [Figure 8] FIG. 8 is a cross-sectional view taken along line VIII-VIII in FIG. [Figure 9] FIG. 9 is a partially enlarged view of FIG. 3, showing the first semiconductor element and its vicinity, and showing the first semiconductor element in a see-through manner. [Figure 10] FIG. 10 is a cross-sectional view taken along line XX in FIG. [Figure 11] FIG. 11 is a cross-sectional view taken along line XI-XI in FIG. [Figure 12] FIG. 12 is a partially enlarged view of FIG. 3, showing the second semiconductor element and its vicinity. [Figure 13] FIG. 13 is a cross-sectional view taken along line XIII-XIII in FIG. [Figure 14] FIG. 14 is a plan view of a semiconductor device according to a second embodiment of the present disclosure, showing the sealing resin, the second insulating layer of the conductive member, and the second heat dissipation layer in a see-through manner. [Figure 15] FIG. 15 is a plan view corresponding to FIG. 14, and further shows the third conductive layer of the conductive member in a transparent manner. [Figure 16] FIG. 16 is a cross-sectional view taken along line XVI-XVI in FIG. [Figure 17] FIG. 17 is a cross-sectional view taken along line XVII-XVII in FIG. [Figure 18] FIG. 18 is a cross-sectional view taken along line XVIII-XVIII in FIG. [Figure 19] FIG. 19 is a cross-sectional view taken along line XIX-XIX in FIG. [Figure 20] FIG. 20 is a plan view of a first semiconductor element included in the semiconductor device shown in FIG. [Figure 21]FIG. 21 is a bottom view of the first semiconductor element shown in FIG. [Figure 22] FIG. 22 is a cross-sectional view taken along line XXII-XXII in FIG. [Figure 23] FIG. 23 is a cross-sectional view taken along line XXIII-XXIII in FIG. [Figure 24] FIG. 24 is a cross-sectional view taken along line XXIV-XXIV in FIG. [Figure 25] FIG. 25 is a cross-sectional view taken along line XXV-XXV in FIG. [Figure 26] FIG. 26 is a partially enlarged view of FIG. 15, showing the first semiconductor element and its vicinity. [Figure 27] FIG. 27 is a cross-sectional view taken along line XXVII-XXVII in FIG. [Figure 28] FIG. 28 is a plan view of a second semiconductor element included in the semiconductor device shown in FIG. [Figure 29] FIG. 29 is a bottom view of the second semiconductor element shown in FIG. [Figure 30] FIG. 30 is a cross-sectional view taken along the line XXX-XXX in FIG. [Figure 31] FIG. 31 is a cross-sectional view taken along line XXXI-XXXI in FIG. [Figure 32] 32 is a cross-sectional view taken along line XXXII-XXXII in FIG. [Figure 33] FIG. 33 is a partially enlarged view of FIG. 15, showing the second semiconductor element and its vicinity. [Figure 34] FIG. 34 is a cross-sectional view taken along line XXXIV-XXXIV in FIG. [Figure 35] FIG. 35 is a plan view of the semiconductor device according to the third embodiment of the present disclosure, showing the sealing resin and the covering layer in a see-through manner. [Figure 36] 36 is a cross-sectional view taken along line XXXVI-XXXVI in FIG. [Figure 37] FIG. 37 is a cross-sectional view taken along line XXXVII-XXXVII in FIG. DETAILED DESCRIPTION OF THE INVENTION

[0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present disclosure will be described with reference to the accompanying drawings.

[0011] [First embodiment] 1 to 13, a semiconductor device A10 according to a first embodiment of the present disclosure will be described. The semiconductor device A10 includes a first insulating layer 11, a first conductive layer 12, a second conductive layer 13, a first heat dissipation layer 16, a conductive member 17, a plurality of first semiconductor elements 21, a plurality of second semiconductor elements 22, a plurality of first spacers 31, a plurality of second spacers 32, a plurality of power terminals 40, and a sealing resin 60. The semiconductor device A10 further includes a first gate conductive layer 141, a second gate conductive layer 142, a first detection conductive layer 151, a second detection conductive layer 152, a first gate terminal 441, a second gate terminal 442, a first detection terminal 451, and a second detection terminal 452.

[0012] For ease of understanding, FIG. 2 shows the sealing resin 60 and the second insulating layer 171 and second heat dissipation layer 173 of the conductive member 17, which will be described later, in a see-through manner. For ease of understanding, FIG. 3 shows a third conductive layer 172 of the conductive member 17, which will be described later, in a see-through manner compared to FIG. 2. For ease of understanding, FIG. 9 shows the first semiconductor element 21 in a see-through manner compared to FIG. 3. In FIGS. 2 and 3, the outline of the sealing resin 60 is shown in imaginary lines (two-dot chain lines). In FIGS. 2 and 3, the outlines of the elements of the conductive member 17 are shown in imaginary lines. In FIG. 2, the lines VV, VI-VI, and VII-VII are each shown in dashed dot lines.

[0013] In the description of the semiconductor device A10, for convenience, the normal direction to a first main surface 12A of a first conductive layer 12 (described later) will be referred to as the "first direction z." A direction perpendicular to the first direction z will be referred to as the "second direction x." A direction perpendicular to both the first direction z and the second direction x will be referred to as the "third direction y."

[0014] The semiconductor device A10 converts a DC power supply voltage applied to a first input terminal 41 and a second input terminal 42 (described later) among a plurality of power terminals 40 into AC power using a plurality of first semiconductor elements 21 and a plurality of second semiconductor elements 22. The converted AC power is input to a power supply target such as a motor from an output terminal 43 (described later) among the plurality of power terminals 40. The semiconductor device A10 constitutes part of a power conversion circuit such as an inverter.

[0015] As shown in FIGS. 5 and 6 , the first insulating layer 11 supports the first conductive layer 12, the second conductive layer 13, the first gate conductive layer 141, the second gate conductive layer 142, the first detection conductive layer 151, the second detection conductive layer 152, and the first heat dissipation layer 16. The first insulating layer 11 is made of a material with relatively high thermal conductivity. The first insulating layer 11 is made of, for example, ceramics containing aluminum nitride (AlN). The periphery of the first insulating layer 11 is sandwiched between sealing resin 60 in the first direction z. The thickness of the first insulating layer 11 is smaller than the thicknesses of the first conductive layer 12, the second conductive layer 13, and the first heat dissipation layer 16. Therefore, in the semiconductor device A10, the thicknesses of the first conductive layer 12, the second conductive layer 13, and the first heat dissipation layer 16 are greater than the thickness of the first insulating layer 11.

[0016] As shown in FIGS. 2, 3, 5, 6, and 8, the first conductive layer 12 is bonded to one side of the first insulating layer 11 in the first direction z. The first conductive layer 12 carries a plurality of first semiconductor elements 21 and a plurality of first spacers 31. The first conductive layer 12 has a rectangular shape with its longer sides extending in the third direction y. As viewed in the first direction z, the first conductive layer 12 is surrounded by the periphery of the first insulating layer 11. The first conductive layer 12 contains copper (Cu). The first conductive layer 12 has a first main surface 12A facing the first direction z. The plurality of first semiconductor elements 21 and the plurality of first spacers 31 face the first main surface 12A.

[0017] As shown in FIGS. 2, 3, and 5 to 7, the second conductive layer 13 is located on the same side as the first conductive layer 12 in the first direction z and is bonded to the first insulating layer 11. The second conductive layer 13 carries a plurality of second semiconductor elements 22. The second conductive layer 13 is separated from the first conductive layer 12 in the second direction x. The second conductive layer 13 has a rectangular shape with its longer side extending in the third direction y. As viewed in the first direction z, the second conductive layer 13 is surrounded by the periphery of the first insulating layer 11. The second conductive layer 13 contains copper. The second conductive layer 13 has a second main surface 13A facing the same side as the first main surface 12A of the first conductive layer 12 in the first direction z. The plurality of second semiconductor elements 22 face the second main surface 13A.

[0018] As shown in FIGS. 5 to 8 , the first heat dissipation layer 16 is located on the opposite side of the first insulating layer 11 from the first conductive layer 12 and the second conductive layer 13, and is bonded to the first insulating layer 11. The first heat dissipation layer 16 is exposed from the sealing resin 60. The volume of the first heat dissipation layer 16 is greater than the sum of the volumes of the first conductive layer 12 and the second conductive layer 13. As shown in FIG. 4 , the first heat dissipation layer 16 is surrounded by the periphery of the first insulating layer 11 when viewed in the first direction z. The composition of the first heat dissipation layer 16 includes copper. When the semiconductor device A10 is in use, a heat sink (not shown) is bonded to the first heat dissipation layer 16.

[0019] As shown in FIGS. 5 and 8, the multiple first semiconductor elements 21 are bonded to multiple first spacers 31. All of the multiple first semiconductor elements 21 are the same element. The multiple first semiconductor elements 21 are, for example, MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors). Alternatively, the multiple first semiconductor elements 21 may be field-effect transistors including MISFETs (Metal-Insulator-Semiconductor Field-Effect Transistors) or bipolar transistors such as IGBTs (Insulated Gate Bipolar Transistors). In the description of the semiconductor device A10, the multiple first semiconductor elements 21 are n-channel MOSFETs with a vertical structure. The multiple first semiconductor elements 21 include a compound semiconductor substrate. The compound semiconductor substrate contains silicon carbide (SiC). The multiple first semiconductor elements 21 are arranged along the third direction y.

[0020] As shown in FIGS. 10 and 11, the plurality of first semiconductor elements 21 have a first electrode 211, a second electrode 212 and a first gate electrode 213.

[0021] 10 and 11, the first electrode 211 faces the first main surface 12A of the first conductive layer 12. A current corresponding to the power converted by the first semiconductor element 21 flows through the first electrode 211. In other words, the first electrode 211 corresponds to the source electrode of the first semiconductor element 21.

[0022] 10 and 11 , the second electrode 212 is located on the side opposite to the side facing the first main surface 12A of the first conductive layer 12 in the first direction z. A current corresponding to the power before being converted by the first semiconductor element 21 flows through the second electrode 212. In other words, the second electrode 212 corresponds to the drain electrode of the first semiconductor element 21.

[0023] 10 and 11, the first gate electrode 213 faces the first main surface 12A of the first conductive layer 12. Therefore, the first gate electrode 213 is located on the same side as the first electrode 211 in the first direction z. A gate voltage for driving the first semiconductor element 21 is applied to the first gate electrode 213. As shown in FIG. 9, the area of ​​the first gate electrode 213 is smaller than the area of ​​the first electrode 211 when viewed in the first direction z.

[0024] As shown in FIGS. 5 to 7, the multiple second semiconductor elements 22 are bonded to the second main surface 13A of the second conductive layer 13. The multiple second semiconductor elements 22 are the same elements as the multiple first semiconductor elements 21. Therefore, the multiple second semiconductor elements 22 are n-channel type MOSFETs with a vertical structure. The multiple second semiconductor elements 22 are arranged along the third direction y.

[0025] As shown in FIG. 13, the plurality of second semiconductor elements 22 have a third electrode 221, a fourth electrode 222 and a second gate electrode 223.

[0026] 13 , the third electrode 221 is located on the side opposite to the side facing the second main surface 13A of the second conductive layer 13 in the first direction z. A current corresponding to the power converted by the second semiconductor element 22 flows through the third electrode 221. In other words, the third electrode 221 corresponds to the source electrode of the second semiconductor element 22.

[0027] As shown in FIG. 13 , the fourth electrode 222 faces the second main surface 13A of the second conductive layer 13. A current corresponding to the power before being converted by the second semiconductor elements 22 flows through the fourth electrode 222. That is, the fourth electrode 222 corresponds to the drain electrode of the second semiconductor elements 22. The fourth electrode 222 is conductively bonded to the second main surface 13A via a conductive bonding layer 29. As a result, the fourth electrodes 222 of the multiple second semiconductor elements 22 are electrically connected to the second conductive layer 13. The conductive bonding layer 29 is, for example, solder. Alternatively, the conductive bonding layer 29 may be a sintered metal containing silver (Ag) or the like.

[0028] 13, the second gate electrode 223 is located on the opposite side to the side facing the second main surface 13A of the second conductive layer 13 in the first direction z. Therefore, the second gate electrode 223 is located on the same side as the third electrode 221 in the first direction z. A gate voltage for driving the second semiconductor element 22 is applied to the second gate electrode 223. As shown in FIG. 12, the area of ​​the second gate electrode 223 is smaller than the area of ​​the third electrode 221 when viewed in the first direction z.

[0029] In the semiconductor device A10, a plurality of first semiconductor elements 21 form part of an upper arm circuit, and a plurality of second semiconductor elements 22 form part of a lower arm circuit. Furthermore, in the semiconductor device A10, the configuration of the plurality of first semiconductor elements 21 is equivalent to the configuration obtained when the plurality of second semiconductor elements 22 are inverted around a direction perpendicular to the first direction z. Therefore, the polarity of the first electrode 211 of each of the plurality of first semiconductor elements 21 and the polarity of the fourth electrode 222 of each of the plurality of second semiconductor elements 22 are different from each other. In addition, the second electrode 212 of each of the plurality of first semiconductor elements 21 and the third electrode 221 of each of the plurality of second semiconductor elements 22 are different from each other.

[0030] As shown in FIG. 8 , the multiple first spacers 31 are conductively bonded to the first main surface 12A of the first conductive layer 12. As shown in FIGS. 8 , 10 , and 11 , the first electrodes 211 of the multiple first semiconductor elements 21 are individually conductively bonded to the multiple first spacers 31. Therefore, each of the multiple first spacers 31 conductively bonds the first conductive layer 12 to one of the first electrodes 211 of the multiple first semiconductor elements 21. The first electrodes 211 of the multiple first semiconductor elements 21 are individually electrically connected to the multiple first spacers 31 and are conductively bonded to the first conductive layer 12 via one of the multiple first spacers 31. The multiple first spacers 31 are arranged along the third direction y. The multiple first spacers 31 are located between the first main surface 12A and the multiple first semiconductor elements 21. As shown in FIGS. 10 and 11 , the multiple first spacers 31 include a first portion 311 and a second portion 312. 9, the multiple first spacers 31 have a rectangular shape when viewed in the first direction z. Alternatively, the multiple first spacers 31 may have a circular shape when viewed in the first direction z. The composition of the multiple first spacers 31 includes copper.

[0031] As shown in FIGS. 9 to 11, the first portion 311 has a second surface 311A, a third surface 311B, and a fourth surface 311C. The second surface 311A ​​faces the first main surface 12A of the first conductive layer 12. The second surface 311A ​​is conductively bonded to the first main surface 12A via a conductive bonding layer 29. Alternatively, the second surface 311A ​​may be conductively bonded to the first main surface 12A by solid-state diffusion. The third surface 311B faces the opposite side to the second surface 311A ​​in the first direction z. As viewed in the first direction z, the first semiconductor element 21 is surrounded by the periphery of the third surface 311B. The fourth surface 311C faces a direction perpendicular to the first direction z. In the semiconductor device A10, the fourth surface 311C includes multiple regions.

[0032] 9 to 11, first portion 311 has first recess 311D recessed from third surface 311B and fourth surface 311C. When viewed in first direction z, first gate electrode 213 of first semiconductor element 21 overlaps first recess 311D.

[0033] 10 and 11, the second portion 312 is located between the first portion 311 and the first electrode 211 of the first semiconductor element 21. The second portion 312 is connected to the first portion 311 at the third surface 311B. As shown in FIG. 9, the second portion 312 is surrounded by the periphery of the first semiconductor element 21 as viewed in the first direction z. The second portion 312 is spaced apart from the first gate electrode 213 of the first semiconductor element 21 as viewed in the first direction z.

[0034] The dimension t1 of the first portion 311 in the first direction z is larger than the dimension t2 in the thickness direction of the second portion 312. The dimension t1 is 3 times or more and 30 times or less the dimension t2.

[0035] As shown in FIGS. 9 to 11 , the second portion 312 has a first surface 312A. The first surface 312A faces the first semiconductor element 21. As viewed in the first direction z, the first surface 312A is spaced apart from the first gate electrode 213 of the first semiconductor element 21. As viewed in the first direction z, the first surface 312A is surrounded by the periphery of the second surface 311A ​​of the first portion 311. In the semiconductor device A10, the area of ​​the first surface 312A is smaller than the area of ​​the first electrode 211 of the first semiconductor element 21. The first electrode 211 of each of the multiple first semiconductor elements 21 is individually conductively bonded to the first surface 312A of each of the multiple first spacers 31 by solid-state diffusion. Alternatively, the first electrode 211 of each of the multiple first semiconductor elements 21 may be individually conductively bonded to the first surface 312A of each of the multiple first spacers 31 via a conductive bonding layer 29.

[0036] 9 to 11, the second portion 312 is provided with a second recess 312B that is recessed in a direction perpendicular to the first direction z. The second recess 312B penetrates the second portion 312 in the first direction z and is connected to the first recess 311D of the first portion 311. As viewed in the first direction z, the second recess 312B overlaps the first recess 311D and the first gate electrode 213 of the first semiconductor element 21.

[0037] As shown in FIGS. 7 and 13 , the second spacers 32 are individually conductively bonded to the third electrodes 221 of the second semiconductor elements 22. The second spacers 32 are arranged along the third direction y. The second spacers 32 are positioned between the second semiconductor elements 22 and the conductive members 17. As shown in FIG. 12 , each of the second spacers 32 is rectangular when viewed in the first direction z. Alternatively, each of the second spacers 32 may be circular when viewed in the first direction z. The area of ​​each of the second spacers 32 is smaller than the area of ​​the third electrode 221 when viewed in the first direction z. The second spacers 32 contain copper. The second spacers 32 are individually conductively bonded to the third electrodes 221 of the second semiconductor elements 22 by solid-state diffusion. Alternatively, each of the plurality of second spacers 32 may be individually conductively bonded to the third electrodes 221 of the plurality of second semiconductor elements 22 via the conductive bonding layer 29.

[0038] 2, 3, 5, and 6, the first gate conductive layer 141 is located on the same side as the first conductive layer 12 in the first direction z, and is joined to the first insulating layer 11. The first gate conductive layer 141 is located on the opposite side of the second conductive layer 13 from the first conductive layer 12 in the second direction x. The first gate conductive layer 141 extends along the third direction y. The composition of the first gate conductive layer 141 includes copper.

[0039] As shown in FIGS. 2 and 3 , the first gate terminal 441 is located on the opposite side of the first conductive layer 12 from the first gate conductive layer 141 in the second direction x. The first gate terminal 441 is electrically connected to the first gate conductive layer 141. The first gate terminal 441 is a metal lead made of a material containing copper or a copper alloy. As shown in FIGS. 1 and 5 , a portion of the first gate terminal 441 is covered with the sealing resin 60. When viewed in the third direction y, the first gate terminal 441 is L-shaped. As shown in FIG. 5 , the first gate terminal 441 includes a portion that stands up in the first direction z. This portion is exposed from the sealing resin 60. A gate voltage for driving the multiple first semiconductor elements 21 is applied to the first gate terminal 441.

[0040] 9, each of the multiple first gate wirings 51 is conductively joined to the first gate electrode 213 of any one of the multiple first semiconductor elements 21 and the first gate conductive layer 141. As a result, the first gate electrodes 213 of the multiple first semiconductor elements 21 are electrically connected to the first gate conductive layer 141. The multiple first gate wirings 51 are metal leads. The composition of the first gate wirings 51 includes copper.

[0041] 2, 3, 5, and 6, the second gate conductive layer 142 is located on the same side as the second conductive layer 13 in the first direction z, and is joined to the first insulating layer 11. The second gate conductive layer 142 is located on the opposite side to the first gate conductive layer 141 with respect to the first conductive layer 12 and the second conductive layer 13 in the second direction x. The second gate conductive layer 142 extends along the third direction y. The composition of the second gate conductive layer 142 includes copper.

[0042] As shown in FIGS. 2 and 3 , the second gate terminal 442 is located on the opposite side of the second gate conductive layer 142 from the second conductive layer 13 in the second direction x. The second gate terminal 442 is electrically connected to the second gate conductive layer 142. The second gate terminal 442 is a metal lead made of a material containing copper or a copper alloy. As shown in FIGS. 1 and 5 , a portion of the second gate terminal 442 is covered with the sealing resin 60. When viewed in the third direction y, the second gate terminal 442 is L-shaped. As shown in FIG. 5 , the second gate terminal 442 includes a portion that stands up in the first direction z. This portion is exposed from the sealing resin 60. A gate voltage for driving the multiple second semiconductor elements 22 is applied to the second gate terminal 442.

[0043] 12, each of the plurality of second gate wirings 53 is conductively joined to the second gate electrode 223 of any one of the plurality of second semiconductor elements 22 and the second gate conductive layer 142. As a result, the second gate electrodes 223 of the plurality of second semiconductor elements 22 are electrically connected to the second gate conductive layer 142. The plurality of second gate wirings 53 are wires. The composition of the plurality of second gate wirings 53 includes gold (Au). Alternatively, the composition of the plurality of second gate wirings 53 may include copper or aluminum.

[0044] As shown in FIG. 2, the semiconductor device A10 further includes two first wires 55. As shown in FIGS. 2 and 5, the two first wires 55 are individually bonded to the first gate terminal 441 and the second gate terminal 442, and the first gate conductive layer 141 and the second gate conductive layer 142. As a result, the first gate terminal 441 is electrically connected to the first gate conductive layer 141, and the second gate terminal 442 is electrically connected to the second gate conductive layer 142. Each of the two first wires 55 contains gold. Alternatively, the two first wires 55 may contain copper or aluminum.

[0045] 2, 3, 5, and 6, the first detecting conductive layer 151 is located on the same side as the second conductive layer 13 in the first direction z, and is bonded to the first insulating layer 11. The first detecting conductive layer 151 is located next to the first gate conductive layer 141 in the second direction x. The first detecting conductive layer 151 extends along the third direction y. The composition of the first detecting conductive layer 151 includes copper.

[0046] As shown in FIGS. 2 and 3 , the first detection terminal 451 is located on the opposite side of the first conductive layer 12 from the first detection conductive layer 151 in the second direction x. The first detection terminal 451 is located adjacent to the first gate terminal 441 in the third direction y. The first detection terminal 451 is electrically connected to the first detection conductive layer 151. The first detection terminal 451 is a metal lead made of a material containing copper or a copper alloy. As shown in FIGS. 1 and 6 , a portion of the first detection terminal 451 is covered with the sealing resin 60. When viewed in the third direction y, the first detection terminal 451 is L-shaped. As shown in FIG. 6 , the first detection terminal 451 includes a portion that stands up in the first direction z. This portion is exposed from the sealing resin 60. A voltage having the same potential as the voltage applied to the first electrodes 211 of the plurality of first semiconductor elements 21 is applied to the first detection terminal 451.

[0047] As shown in FIG. 9 , each of the multiple first detection wirings 52 is conductively bonded to the third surface 311B of any one of the multiple first spacers 31 and the first detection conductive layer 151. As a result, the first electrodes 211 of the multiple first semiconductor elements 21 are electrically connected to the first detection conductive layer 151. The multiple second gate wirings 53 are wires. The composition of the multiple second gate wirings 53 includes gold. Alternatively, the composition of the multiple second gate wirings 53 may include copper or aluminum.

[0048] 2, 3, 5, and 6, the second detecting conductive layer 152 is located on the same side as the second conductive layer 13 in the first direction z and is bonded to the first insulating layer 11. The second detecting conductive layer 152 is located next to the second gate conductive layer 142 in the second direction x. The second detecting conductive layer 152 extends along the third direction y. The composition of the second detecting conductive layer 152 includes copper.

[0049] As shown in FIGS. 2 and 3 , the second detection terminal 452 is located on the opposite side of the second conductive layer 13 from the second detection conductive layer 152 in the second direction x. The second detection terminal 452 is located adjacent to the second gate terminal 442 in the third direction y. The second detection terminal 452 is electrically connected to the second detection conductive layer 152. The second detection terminal 452 is a metal lead made of a material containing copper or a copper alloy. As shown in FIGS. 1 and 6 , a portion of the second detection terminal 452 is covered with the sealing resin 60. The second detection terminal 452 is L-shaped when viewed in the third direction y. As shown in FIG. 6 , the second detection terminal 452 includes a portion that stands up in the first direction z. This portion is exposed from the sealing resin 60. A voltage equivalent to the voltage applied to the third electrodes 221 of the plurality of second semiconductor elements 22 is applied to the second detection terminal 452.

[0050] 12, each of the multiple second detection wirings 54 is conductively bonded to the third electrode 221 of any one of the multiple second semiconductor elements 22 and the second detection conductive layer 152. As a result, the third electrodes 221 of the multiple second semiconductor elements 22 are electrically connected to the second detection conductive layer 152. The multiple second detection wirings 54 are wires. The composition of the multiple second detection wirings 54 includes gold. Alternatively, the composition of the multiple second detection wirings 54 may include copper or aluminum.

[0051] As shown in FIG. 2, the semiconductor device A10 further includes two second wires 56. As shown in FIGS. 2 and 6, the two second wires 56 are individually bonded to the first detection terminal 451 and the second detection terminal 452, and the first detection conductive layer 151 and the second detection conductive layer 152. As a result, the first detection terminal 451 is electrically connected to the first detection conductive layer 151, and the second detection terminal 452 is electrically connected to the second detection conductive layer 152. The composition of the two second wires 56 includes gold. Alternatively, the composition of each of the two second wires 56 may include copper or aluminum.

[0052] 5 to 8 , the conductive member 17 is spaced apart from the first insulating layer 11 in the first direction z on the side toward which the first main surface 12A of the first conductive layer 12 faces. The conductive member 17 is conductively bonded to the second electrode 212 of each of the multiple first semiconductor elements 21 and the third electrode 221 of each of the multiple second semiconductor elements 22. The conductive member 17 is exposed from the sealing resin 60.

[0053] As shown in FIGS. 5 to 8 , the conductive member 17 has a bonding surface 17A and a heat dissipation surface 17B. The bonding surface 17A is conductively bonded to the second electrodes 212 of the plurality of first semiconductor elements 21 via a conductive bonding layer 29. The bonding surface 17A is further conductively bonded to the third electrodes 221 of the plurality of second semiconductor elements 22 via the conductive bonding layer 29 and a plurality of second spacers 32. The heat dissipation surface 17B faces the opposite side to the bonding surface 17A in the first direction z. The heat dissipation surface 17B is exposed from the sealing resin 60. When viewed in the first direction z, the bonding surface 17A is surrounded by the periphery of the heat dissipation surface 17B. The area of ​​the heat dissipation surface 17B is larger than the area of ​​the bonding surface 17A.

[0054] As shown in FIGS. 5 to 8 , the conductive member 17 includes a second insulating layer 171, a third conductive layer 172, and a second heat dissipation layer 173. The material of the second insulating layer 171 includes the material of the first insulating layer 11. The third conductive layer 172 includes a bonding surface 17A and is bonded to the second insulating layer 171. The material of the third conductive layer 172 includes the material of each of the first conductive layer 12 and the second conductive layer 13. The second heat dissipation layer 173 includes a heat dissipation surface 17B and is bonded to the first insulating layer 11. The material of the second heat dissipation layer 173 includes the material of the first heat dissipation layer 16. As shown in FIG. 1 , the second heat dissipation layer 173 is surrounded by the periphery of the second insulating layer 171 when viewed in the first direction z. The thickness of each of the third conductive layer 172 and the second heat dissipation layer 173 is greater than the thickness of the second insulating layer 171.

[0055] As shown in Figures 2, 5 and 6, when viewed in the first direction z, the multiple first gate wirings 51, the multiple first detection wirings 52, the multiple second gate wirings 53, and the multiple second detection wirings 54 overlap each of the second insulating layer 171 and the second heat dissipation layer 173.

[0056] 7 and 8, the plurality of power terminals 40 are individually conductively bonded to the first conductive layer 12, the second conductive layer 13, and the third conductive layer 172 of the conductive member 17. The plurality of power terminals 40 include a first input terminal 41, a second input terminal 42, and an output terminal 43.

[0057] As shown in FIGS. 1 to 3 , the first input terminal 41 is located on one side in the third direction y with respect to the first insulating layer 11. As shown in FIG. 8 , the first input terminal 41 is conductively bonded to the first conductive layer 12. As a result, the first input terminal 41 is electrically connected to the first electrodes 211 of the multiple first semiconductor elements 21 via the first conductive layer 12 and the multiple first spacers 31. The first input terminal 41 is a metal plate made of a material containing copper or a copper alloy. A portion of the first input terminal 41 is covered with a sealing resin 60. The first input terminal 41 has a first mounting hole 411 penetrating in the first direction z. The first mounting hole 411 is spaced from the sealing resin 60. The first input terminal 41 is an N-terminal (negative electrode) to which a DC power supply voltage to be converted is applied.

[0058] As shown in FIGS. 1 to 3 , the second input terminal 42 is located on the same side as the first input terminal 41 in the third direction y with respect to the first insulating layer 11. The second input terminal 42 is spaced apart from the first input terminal 41 in the second direction x. As shown in FIG. 7 , the second input terminal 42 is conductively joined to the second conductive layer 13. As a result, the second input terminal 42 is electrically connected to the fourth electrodes 222 of the plurality of second semiconductor elements 22 via the second conductive layer 13. The second input terminal 42 is a metal plate made of a material containing copper or a copper alloy. A portion of the second input terminal 42 is covered with a sealing resin 60. The second input terminal 42 has a second mounting hole 421 penetrating in the first direction z. The second mounting hole 421 is spaced apart from the sealing resin 60. The second input terminal 42 is a P terminal (positive electrode) to which a DC power supply voltage to be converted is applied.

[0059] As shown in FIGS. 1 and 2 , the output terminal 43 is located on the opposite side of the first insulating layer 11 from the first input terminal 41 and the second input terminal 42 in the third direction y. As shown in FIG. 7 , the output terminal 43 is spaced apart from the first insulating layer 11 in the first direction z toward the side toward which the first main surface 12A of the first conductive layer 12 faces. The output terminal 43 is conductively bonded to the third conductive layer 172 of the conductive member 17. As a result, the output terminal 43 is electrically connected to the second electrodes 212 of the multiple first semiconductor elements 21 and the third electrodes 221 of the multiple second semiconductor elements 22 via the conductive member 17. The output terminal 43 is a metal plate made of a material containing copper or a copper alloy. A portion of the output terminal 43 is covered with a sealing resin 60. The output terminal 43 has a third mounting hole 431 penetrating in the first direction z. The third mounting hole 431 is spaced apart from the sealing resin 60. From the output terminal 43, AC power converted by the plurality of first semiconductor elements 21 and the plurality of second semiconductor elements 22 is output.

[0060] As shown in FIGS. 5 to 8, the sealing resin 60 covers the plurality of first semiconductor elements 21 and the plurality of second semiconductor elements 22. The sealing resin 60 is an insulator. The sealing resin 60 is made of a material containing, for example, black epoxy resin. A portion of the sealing resin 60 is sandwiched between the first insulating layer 11 and the third conductive layer 172 of the conductive member 17 in the first direction z.

[0061] As shown in FIGS. 1, 4, and 5 to 8, the sealing resin 60 has a top surface 61, a bottom surface 62, two first side surfaces 63, and two second side surfaces 64. The top surface 61 faces the same side as the first main surface 12A of the first conductive layer 12 in the first direction z. The heat dissipation surface 17B of the conductive member 17 is exposed from the top surface 61. The bottom surface 62 faces the opposite side to the top surface 61 in the first direction z. The first heat dissipation layer 16 is exposed from the bottom surface 62.

[0062] 1 and 4 to 6, the two first side surfaces 63 are spaced apart from each other in the second direction x and are connected to the top surface 61 and the bottom surface 62. A first gate terminal 441 and a first detection terminal 451 are exposed from one of the two first side surfaces 63. A second gate terminal 442 and a second detection terminal 452 are exposed from the other of the two first side surfaces 63.

[0063] 1, 4, 7, and 8, the two second side surfaces 64 are spaced apart from each other in the third direction y and are connected to the top surface 61 and the bottom surface 62. The first input terminal 41 and the second input terminal 42 are exposed from one of the two second side surfaces 64. The output terminal 43 is exposed from the other of the two second side surfaces 64.

[0064] Next, the effects of the semiconductor device A10 will be described.

[0065] The semiconductor device A10 includes a first insulating layer 11, a first conductive layer 12, a second conductive layer 13, a first heat dissipation layer 16, a first semiconductor element 21, a second semiconductor element 22, a conductive member 17, and a sealing resin 60. The first semiconductor element 21 has a first electrode 211 conductively bonded to the first conductive layer 12 and a second electrode 212 to which the conductive member 17 is conductively bonded. The second semiconductor element 22 has a third electrode 221 conductively bonded to the conductive member 17 and a fourth electrode 222 conductively bonded to the second conductive layer 13. The polarity of the second electrode 212 and the polarity of the third electrode 221 are opposite to each other. The first heat dissipation layer 16 and the conductive member 17 are exposed from the sealing resin 60. This configuration further shortens the length of the conductive path from the second electrode 212 to the third electrode 221. This reduces the parasitic inductance of the semiconductor device A10. Furthermore, with this configuration, heat generated from the first semiconductor element 21 and the second semiconductor element 22 is dissipated to the outside through the first heat dissipation layer 16 and the conductive member 17 located on both sides of the semiconductor device A10 in the first direction z. Therefore, with this configuration, it is possible to improve the heat dissipation performance of the semiconductor device A10 while reducing the parasitic inductance of the semiconductor device A10.

[0066] The conductive member 17 has a bonding surface 17A and a heat dissipation surface 17B. The bonding surface 17A is conductively bonded to the second electrode 212 of the first semiconductor element 21 and the third electrode 221 of the second semiconductor element 22. The heat dissipation surface 17B is exposed from the sealing resin 60. The area of ​​the heat dissipation surface 17B is larger than the area of ​​the bonding surface 17A. When viewed in the first direction z, the bonding surface 17A is surrounded by the periphery of the heat dissipation surface 17B. With this configuration, heat conducted from the first semiconductor element 21 and the second semiconductor element 22 to the bonding surface 17A is easily diffused in a direction perpendicular to the first direction z. This reduces the thermal resistance of the conductive member 17 in the first direction z.

[0067] The conductive member 17 includes a second insulating layer 171, a third conductive layer 172 including a bonding surface 17A and bonded to the second insulating layer 171, and a second heat dissipation layer 173 including a heat dissipation surface 17B and bonded to the second insulating layer 171. With this configuration, even when the conductive member 17 is exposed from the sealing resin 60, the conductive member 17 is electrically insulated from the outside of the semiconductor device A10. As viewed in the first direction z, the second heat dissipation layer 173 is surrounded by the periphery of the second insulating layer 171. With this configuration, when the conductive member 17 tries to fall off from the sealing resin 60, the periphery of the second insulating layer 171 comes into contact with the sealing resin 60 in the first direction z, preventing the conductive member 17 from falling off.

[0068] The thickness of each of the third conductive layer 172 and the second heat dissipation layer 173 is greater than the thickness of the second insulating layer 171. This configuration improves the heat diffusion efficiency in the direction perpendicular to the first direction z in each of the third conductive layer 172 and the second heat dissipation layer 173. This further improves the heat dissipation performance of the semiconductor device A10.

[0069] In the semiconductor device A10, the first gate electrode 213 of the first semiconductor element 21 is located on the same side as the first electrode 211 of the first semiconductor element 21 in the first direction z. The semiconductor device A10 further includes a first spacer 31 that conductively bonds the first conductive layer 12 and the first electrode 211. The first spacer 31 has a first surface 312A that faces the first electrode 211. As viewed in the first direction z, the first surface 312A is spaced apart from the first gate electrode 213. This configuration can prevent short-circuiting between the first gate electrode 213 and the first gate wiring 51 shown in FIG. 10 and the first spacer 31.

[0070] The first spacer 31 has a second surface 311A ​​facing the first conductive layer 12. The area of ​​the second surface 311A ​​is larger than the area of ​​the first surface 312A. As viewed in the first direction z, the first surface 312A is surrounded by the periphery of the second surface 311A. If a virtual plane extending from the periphery of the first surface 312A toward the second surface 311A ​​and inclined at a 45° angle with respect to the first direction z is defined as the first spacer 31, heat conducted to the first spacer 31 is uniformly diffused in the area surrounded by the virtual plane. Therefore, by adopting this configuration, heat conducted from the first surface 312A to the first spacer 31 is more likely to be uniformly diffused in the first direction z and in a direction perpendicular to the first direction z. This allows heat conducted from the first electrode 211 of the first semiconductor element 21 to the first spacer 31 to be conducted to the first conductive layer 12 more quickly.

[0071] The thickness of each of the first conductive layer 12, the second conductive layer 13, and the first heat dissipation layer 16 is greater than the thickness of the first insulating layer 11. This configuration improves the heat diffusion efficiency in the direction perpendicular to the first direction z in each of the first conductive layer 12, the second conductive layer 13, and the first heat dissipation layer 16. This further improves the heat dissipation performance of the semiconductor device A10.

[0072] Second Embodiment A semiconductor device A20 according to a second embodiment of the present disclosure will be described with reference to FIGS. 14 to 34. In these figures, elements identical or similar to those of the semiconductor device A10 described above are denoted by the same reference numerals, and redundant description will be omitted. For ease of understanding, FIG. 14 shows the sealing resin 60 and the second insulating layer 171 and second heat dissipation layer 173 of the conductive member 17 in a see-through manner. For ease of understanding, FIG. 15 shows the third conductive layer 172 of the conductive member 17 in a see-through manner, in addition to FIG. 14. In FIGS. 14 and 15, the outline of the sealing resin 60 is shown in phantom lines. In FIGS. 14 and 15, the outlines of the elements of the conductive member 17 are shown in phantom lines. In FIG. 14, lines XVI-XVI, XVII-XVII, and XVIII-XVIII are respectively shown in dashed dotted lines.

[0073] The semiconductor device A20 differs from the semiconductor device A10 in the configuration of the multiple first semiconductor elements 21 and the multiple second semiconductor elements 22, and in the absence of the multiple first spacers 31 and the multiple second spacers 32.

[0074] 20 to 25, each of the plurality of first semiconductor elements 21 has a first detection electrode 214, a first element body 215, a first rewiring 216, a second rewiring 217, a first resin 218, and a covering layer 219. The plurality of first semiconductor elements 21 are packaged in resin.

[0075] The first element body 215 is an element corresponding to one of the multiple first semiconductor elements 21 of the semiconductor device A10. The first element body 215 includes a first pad 215A and a first gate pad 215B. As shown in FIG. 27 , the first pad 215A and the first gate pad 215B are located on the side facing the first conductive layer 12 in the first direction z. The first pad 215A corresponds to the first electrode 211 of the first semiconductor element 21 of the semiconductor device A10. The first gate pad 215B corresponds to the first gate electrode 213 of the first semiconductor element 21 of the semiconductor device A10. The first element body 215 includes a second electrode 212.

[0076] 22 to 25, the first resin 218 covers a part of the first element body 215 and at least a part of each of the first rewiring 216 and the second rewiring 217. The first electrode 211, the second electrode 212, the first gate electrode 213, and the first detection electrode 214 are exposed from the first resin 218.

[0077] 22 to 24, the first electrode 211 is electrically connected to and in contact with the first pad 215A of the first element body 215. As shown in Fig. 21, the first electrode 211 includes a portion that protrudes outward from the second electrode 212 when viewed in the first direction z. When viewed in the first direction z, the area of ​​the first electrode 211 is larger than the area of ​​the first pad 215A.

[0078] 20, 22, and 23, the first gate electrode 213 and the first detection electrode 214 are located on the same side as the second electrode 212 in the first direction z. The first detection electrode 214 is spaced apart from the first gate electrode 213 in the third direction y.

[0079] 20 to 22, the first rewiring 216 electrically connects the first gate pad 215B of the first element body 215 and the first gate electrode 213. A part of the first rewiring 216 is covered with a first resin 218.

[0080] 20, 21, and 23, the second rewiring 217 electrically connects the first pad 215A of the first element body 215 and the first detection electrode 214. A portion of the second rewiring 217 is covered with a first resin 218. The second rewiring 217 is connected to the first electrode 211.

[0081] The first rewiring 216, the second rewiring 217, and the first resin 218 can be formed by, for example, the LDS (Laser Direct Structuring) method disclosed in U.S. Patent Application Publication No. 2010 / 0019370. In this case, the material of the first resin 218 includes an additive containing a metal element. Each of the first rewiring 216 and the second rewiring 217 includes the metal element.

[0082] 21 to 23, the covering layer 219 covers the portions of the first rewiring 216 and the second rewiring 217 that are exposed from the first resin 218. The covering layer 219 is an insulator. The covering layer 219 is in contact with the first rewiring 216, the second rewiring 217, and the first resin 218. The covering layer 219 is, for example, a solder resist.

[0083] As shown in FIG. 27, the bonding surface 17A of the third conductive layer 172 of the conductive member 17 is conductively bonded to the second electrodes 212 of the plurality of first semiconductor elements 21 via a conductive bonding layer 29.

[0084] 15 and 26, each of the multiple first detection wirings 52 is conductively joined to the first detection electrode 214 of any one of the multiple first semiconductor elements 21 and the first detection conductive layer 151. The multiple first detection wirings 52 are metal leads. The composition of the multiple first detection wirings 52 includes copper.

[0085] 28 to 32, each of the plurality of second semiconductor elements 22 has a second detection electrode 224, a second element body 225, a third rewiring 226, a fourth rewiring 227, and a second resin 228. The plurality of second semiconductor elements 22 are packaged in resin.

[0086] The second element body 225 is an element corresponding to one of the multiple second semiconductor elements 22 of the semiconductor device A10. The second element body 225 includes a second pad 225A and a second gate pad 225B. As shown in FIG. 34 , the second pad 225A and the second gate pad 225B are located on the opposite side of the semiconductor device 215 from the side facing the second conductive layer 13 in the first direction z. The second pad 225A corresponds to the third electrode 221 of the second semiconductor element 22 of the semiconductor device A10. The second gate pad 225B corresponds to the second gate electrode 223 of the second semiconductor element 22 of the semiconductor device A10. The first element body 215 includes a fourth electrode 222.

[0087] 30 to 32, the second resin 228 covers a part of the second element body 225 and at least a part of each of the third rewiring 226 and the fourth rewiring 227. The third electrode 221, the fourth electrode 222, the second gate electrode 223, and the second detection electrode 224 are exposed from the second resin 228.

[0088] 30 to 32, the third electrode 221 is electrically connected to and in contact with the second pad 225A of the second element body 225. As shown in Fig. 28, when viewed in the first direction z, the third electrode 221 includes a portion that protrudes outward from the fourth electrode 222. When viewed in the first direction z, the area of ​​the third electrode 221 is larger than the area of ​​the second pad 225A.

[0089] 28, 30, and 31, the second gate electrode 223 and the second detection electrode 224 are located on the same side as the third electrode 221 in the first direction z. The second detection electrode 224 is spaced apart from the second gate electrode 223 in the third direction y.

[0090] 28 to 30, the third rewiring 226 electrically connects the second gate pad 225B of the second element body 225 to the second gate electrode 223. A part of the third rewiring 226 is covered with a second resin 228.

[0091] 28, 29, and 31, the fourth rewiring 227 electrically connects the second pad 225A of the second element body 225 and the second detection electrode 224. A portion of the fourth rewiring 227 is covered with the second resin 228. The fourth rewiring 227 is connected to the third electrode 221.

[0092] The third rewiring 226, the fourth rewiring 227, and the second resin 228 can be formed by the LDS method described above. In this case, the material of the second resin 228 contains an additive containing a metal element. Each of the third rewiring 226 and the fourth rewiring 227 contains the metal element.

[0093] As shown in FIG. 34, the bonding surface 17A of the third conductive layer 172 of the conductive member 17 is conductively bonded to the third electrodes 221 of each of the plurality of second semiconductor elements 22 via a conductive bonding layer 29.

[0094] 15 and 33, each of the multiple second detection wirings 54 is conductively joined to the second detection electrode 224 of any one of the multiple second semiconductor elements 22 and the second detection conductive layer 152. Each of the multiple second gate wirings 53 and the multiple second detection wirings 54 is a metal lead. The composition of each of the multiple second gate wirings 53 and the multiple second detection wirings 54 includes copper.

[0095] Next, the effects of the semiconductor device A20 will be described.

[0096] The semiconductor device A20 includes a first insulating layer 11, a first conductive layer 12, a second conductive layer 13, a first heat dissipation layer 16, a first semiconductor element 21, a second semiconductor element 22, a conductive member 17, and a sealing resin 60. The first semiconductor element 21 has a first electrode 211 conductively bonded to the first conductive layer 12 and a second electrode 212 to which the conductive member 17 is conductively bonded. The second semiconductor element 22 has a third electrode 221 conductively bonded to the conductive member 17 and a fourth electrode 222 conductively bonded to the second conductive layer 13. The polarity of the second electrode 212 and the polarity of the third electrode 221 are opposite to each other. The first heat dissipation layer 16 and the conductive member 17 are exposed from the sealing resin 60. Therefore, with this configuration, the semiconductor device A20 can also reduce the parasitic inductance of the semiconductor device A20 and improve the heat dissipation performance of the semiconductor device A20. Furthermore, the semiconductor device A20 has the same configuration as the semiconductor device A10, and thus provides the same effects as the semiconductor device A10.

[0097] In the semiconductor device A20, the first semiconductor element 21 includes a first element body 215 including a second electrode 212, a first pad 215A, and a first gate pad 215B, and a first rewiring 216 electrically connecting the first gate pad 215B and the first gate electrode 213. The first gate electrode 213 is located on the same side as the second electrode 212 in the first direction z. The first electrode 211 is electrically connected to the first pad 215A. This configuration prevents a short circuit between the first gate electrode 213 and the first conductive layer 12, even when the first electrode 211 is electrically connected to the first conductive layer 12 without the first spacer 31. This eliminates the need for the first spacer 31 and the second spacer 32, thereby reducing the dimension of the semiconductor device A20 in the first direction z and further reducing the parasitic inductance of the semiconductor device A20.

[0098] In accordance with the above case, the second semiconductor element 22 has a first element body 215 including a fourth electrode 222, a second pad 225A, and a second gate pad 225B, and a third rewiring 226 that electrically connects the second gate pad 225B and the second gate electrode 223. The second gate electrode 223 is located on the same side as the third electrode 221 in the first direction z. The third electrode 221 is in contact with the second pad 225A. This configuration allows the dimension of the second semiconductor element 22 in the first direction z to match the dimension of the first semiconductor element 21 in the first direction z.

[0099] Third Embodiment A semiconductor device A30 according to a third embodiment of the present disclosure will be described with reference to FIGS. 35 to 37. In these figures, elements that are the same as or similar to those in the semiconductor device A10 and the semiconductor device A20 described above are given the same reference numerals, and redundant description will be omitted. For ease of understanding, FIG. 35 shows the sealing resin 60 and the covering layer 18 (described later) in a see-through manner. In FIG. 35, the outline of the see-through sealing resin 60 is shown by imaginary lines. In FIG. 35, the lines XXXVI-XXXVI and XXXVII-XXXVII are respectively shown by dashed dotted lines.

[0100] The semiconductor device A30 differs from the semiconductor device A20 in the configuration of the conductive member 17 and in that a covering layer 18 is further provided.

[0101] 36 and 37, unlike the conductive member 17 of the semiconductor device A20, which is a composite member including an insulator and a conductor, the conductive member 17 is a single member made of metal. The metal contains, for example, copper. A step is provided at the end of the conductive member 17 in the direction perpendicular to the first direction z.

[0102] 36 and 37, the covering layer 18 covers the heat dissipation surface 17B of the conductive member 17 and is exposed to the outside. The covering layer 18 is an insulator. The sealing resin 60 is in contact with the covering layer 18.

[0103] The conductive member 17 and the covering layer 18 included in the semiconductor device A30 can be applied not only to the semiconductor device A20 but also to the semiconductor device A10.

[0104] Next, the effects of the semiconductor device A30 will be described.

[0105] The semiconductor device A30 includes a first insulating layer 11, a first conductive layer 12, a second conductive layer 13, a first heat dissipation layer 16, a first semiconductor element 21, a second semiconductor element 22, a conductive member 17, and a sealing resin 60. The first semiconductor element 21 has a first electrode 211 conductively bonded to the first conductive layer 12 and a second electrode 212 to which the conductive member 17 is conductively bonded. The second semiconductor element 22 has a third electrode 221 conductively bonded to the conductive member 17 and a fourth electrode 222 conductively bonded to the second conductive layer 13. The polarity of the second electrode 212 and the polarity of the third electrode 221 are opposite to each other. The first heat dissipation layer 16 and the conductive member 17 are exposed from the sealing resin 60. Therefore, with this configuration, the semiconductor device A30 can also reduce the parasitic inductance of the semiconductor device A30 and improve the heat dissipation performance of the semiconductor device A30. Furthermore, the semiconductor device A30 has the same configuration as the semiconductor device A10, and thus provides the same effects as the semiconductor device A10.

[0106] In the semiconductor device A30, the conductive member 17 is a single member made of metal. This configuration allows heat to be conducted more easily from the bonding surface 17A to the heat dissipation surface 17B of the conductive member 17 than in the conductive member 17 of the semiconductor device A20. This further improves the heat dissipation performance of the semiconductor device A30. In this case, the semiconductor device A30 is provided with a covering layer 18, which allows electrical insulation of the conductive member 17 from the outside.

[0107] The present disclosure is not limited to the above-described embodiment, and the specific configuration of each part of the present disclosure can be freely modified in various ways.

[0108] The present disclosure includes the embodiments described in the appendix below. [Appendix 1] a first insulating layer; a first conductive layer bonded to one side of the first insulating layer in a first direction; a second conductive layer located on the same side as the first conductive layer in the first direction and bonded to the first insulating layer; a first heat dissipation layer located on the opposite side of the first insulating layer from the first conductive layer and the second conductive layer and bonded to the first insulating layer; a first semiconductor element having a first electrode and a second electrode positioned opposite to each other in the first direction, the first electrode being conductively joined to the first conductive layer; a second semiconductor element having a third electrode and a fourth electrode positioned opposite to each other in the first direction, the fourth electrode being conductively joined to the second conductive layer; a conductive member conductively joined to the second electrode and the third electrode; a sealing resin that covers the first semiconductor element and the second semiconductor element, the polarity of the second electrode and the polarity of the third electrode are different from each other; the first heat dissipation layer and the conductive member are exposed from the sealing resin. [Appendix 2] the conductive member has a bonding surface that is conductively bonded to the second electrode and the third electrode, and a heat dissipation surface that faces the opposite side to the bonding surface in the first direction and is exposed from the sealing resin, 2. The semiconductor device according to claim 1, wherein the area of ​​the heat dissipation surface is larger than the area of ​​the bonding surface. [Appendix 3] 3. The semiconductor device according to claim 2, wherein the bonding surface is surrounded by a periphery of the heat dissipation surface when viewed in the first direction. [Appendix 4] the conductive member has a second insulating layer, a third conductive layer that includes the bonding surface and is bonded to the second insulating layer, and a second heat dissipation layer that includes the heat dissipation surface and is bonded to the second insulating layer, 4. The semiconductor device according to claim 2, wherein the second heat dissipation layer is surrounded by a periphery of the second insulating layer when viewed in the first direction. [Appendix 5] 5. The semiconductor device according to claim 4, wherein the third conductive layer and the second heat dissipation layer each have a thickness greater than a thickness of the second insulating layer. [Appendix 6] Further provided with a coating layer that is an insulator, the covering layer covers the heat dissipation surface and is exposed to the outside, 4. The semiconductor device according to claim 2, wherein the sealing resin is in contact with the covering layer. [Appendix 7] the first semiconductor element has a first gate electrode; a first gate wiring conductively connected to the first gate electrode; 6. The semiconductor device according to claim 4, wherein the first gate wiring overlaps the second insulating layer when viewed in the first direction. [Appendix 8] 8. The semiconductor device according to claim 7, wherein the first gate wiring overlaps the second heat dissipation layer when viewed in the first direction. [Appendix 9] the first gate electrode is located on the same side as the first electrode in the first direction, a first spacer that electrically connects the first conductive layer and the first electrode; the first spacer has a first surface facing the first electrode; 9. The semiconductor device according to claim 7, wherein the first surface is spaced apart from the first gate electrode when viewed in the first direction. [Appendix 10] the first spacer has a second surface facing the first conductive layer; The area of ​​the second surface is larger than the area of ​​the first surface, 10. The semiconductor device according to claim 9, wherein the first surface is surrounded by a periphery of the second surface when viewed in the first direction. [Appendix 11] the first semiconductor element has a first element body including a first pad and a first gate pad located on a side facing the first conductive layer in the first direction, and a first rewiring that electrically connects the first gate pad and the first gate electrode; the first element body includes the second electrode, the first gate electrode is located on the same side as the second electrode in the first direction, 9. The semiconductor device according to claim 7, wherein the first electrode is electrically connected to the first pad. [Appendix 12] 12. The semiconductor device according to claim 11, wherein the first electrode is in contact with the first pad. [Appendix 13] the first semiconductor element has a first resin that covers a portion of the first element body and at least a portion of the first rewiring; 13. The semiconductor device according to claim 12, wherein the first electrode, the second electrode, and the first gate electrode are exposed from the first resin. [Appendix 14] the first semiconductor element has a first detection electrode located on the same side as the first gate electrode in the first direction, and a second rewiring that electrically connects the first pad and the first detection electrode; At least a portion of the second rewiring is covered with the first resin, 14. The semiconductor device according to claim 13, wherein the first detection electrode is exposed from the first resin. [Appendix 15] the second semiconductor element has a second element body including a second pad and a second gate pad located on the side opposite to the side facing the second conductive layer in the first direction, and a second gate electrode conducting to the second gate pad; the second element body includes the fourth electrode, the second gate electrode is located on the same side as the third electrode in the first direction, 15. The semiconductor device according to claim 13, wherein the third electrode is in contact with the second pad. [Appendix 16] 16. The semiconductor device according to any one of claims 1 to 15, wherein the thickness of each of the first conductive layer, the second conductive layer, and the first heat dissipation layer is greater than the thickness of the first insulating layer. [Appendix 17] further comprising a plurality of power terminals; 17. The semiconductor device according to claim 1, wherein the plurality of power terminals are individually electrically connected to the first conductive layer, the second conductive layer, and the conductive member. [Explanation of symbols]

[0109] A10, A20, A30: Semiconductor device 11: First insulating layer 12: First conductive layer 12A: First main surface 13: Second conductive layer 13A: Second main surface 141: First gate conductive layer 142: Second gate conductive layer 151: First detection conductive layer 152: Second detection conductive layer 16: 1st heat dissipation layer 17: Conductive material 17A: Joint surface 17B: Heat dissipation surface 171: Second insulating layer 172: Third conductive layer 173:Second heat dissipation layer 18: Covering layer 21: First semiconductor element 211: 1st electrode 212:Second electrode 213: First gate electrode 214: First detection electrode 215: First element body 215A: First pad 215B: First gate pad 216: 1st rewiring 2 217:Second rewiring 218: First Resin 219: Covering layer 22: Second semiconductor element 221:Third electrode 222: 4th electrode 223: Second gate electrode 224: Second detection electrode 225: Second element body 225A: Second pad 225B: Second gate pad 226: Third rewiring 227: 4th rewiring 228: Second Resin 29: Conductive bonding layer 31: First spacer 311: Part 1 311A: 2nd side 312A: 3rd side 313A:Side 4 314A: First recess 312: Part 2 312A: 1st page 312B: Second recess 32: Second spacer 40: Power terminal 41: First input terminal 411: First mounting hole 42: Second input terminal 421: Second mounting hole 43: Output terminal 431: Third mounting hole 441: First gate terminal 442: Second gate terminal 451: First detection terminal 452: Second detection terminal 51: First gate wiring 52: First detection wiring 53: Second gate wiring 54: Second detection wiring 55: First wire 56: Second wire 60: Sealing resin 61:Top surface 62: Bottom 63:1st side 64:Second side z: 1st direction x: 2nd direction y: third direction

Claims

1. a first insulating layer; a first conductive layer bonded to one side of the first insulating layer in a first direction; a second conductive layer located on the same side as the first conductive layer in the first direction and bonded to the first insulating layer; a first heat dissipation layer located on the opposite side of the first insulating layer from the first conductive layer and the second conductive layer and bonded to the first insulating layer; a first semiconductor element having a first electrode and a second electrode positioned opposite to each other in the first direction, the first electrode being conductively joined to the first conductive layer; a second semiconductor element having a third electrode and a fourth electrode positioned opposite to each other in the first direction, the fourth electrode being conductively joined to the second conductive layer; a conductive member conductively joined to the second electrode and the third electrode; a sealing resin that covers the first semiconductor element and the second semiconductor element, the polarity of the second electrode and the polarity of the third electrode are different from each other, the first heat dissipation layer and the conductive member are exposed from the sealing resin.

2. the conductive member has a bonding surface that is conductively bonded to the second electrode and the third electrode, and a heat dissipation surface that faces the opposite side to the bonding surface in the first direction and is exposed from the sealing resin, The semiconductor device according to claim 1 , wherein an area of ​​said heat dissipation surface is larger than an area of ​​said bonding surface.

3. The semiconductor device according to claim 2 , wherein the bonding surface is surrounded by a periphery of the heat dissipation surface when viewed in the first direction.

4. the conductive member has a second insulating layer, a third conductive layer including the bonding surface and bonded to the second insulating layer, and a second heat dissipation layer including the heat dissipation surface and bonded to the second insulating layer, The semiconductor device according to claim 2 , wherein the second heat dissipation layer is surrounded by a periphery of the second insulating layer when viewed in the first direction.

5. The semiconductor device according to claim 4 , wherein the thickness of each of said third conductive layer and said second heat dissipation layer is greater than the thickness of said second insulating layer.

6. Further provided with a coating layer that is an insulator, the covering layer covers the heat dissipation surface and is exposed to the outside, The semiconductor device according to claim 2 , wherein the sealing resin is in contact with the covering layer.

7. the first semiconductor element has a first gate electrode; a first gate wiring conductively connected to the first gate electrode; The semiconductor device according to claim 4 , wherein the first gate wiring overlaps the second insulating layer when viewed in the first direction.

8. The semiconductor device according to claim 7 , wherein the first gate wiring overlaps the second heat dissipation layer when viewed in the first direction.

9. the first gate electrode is located on the same side as the first electrode in the first direction, a first spacer that electrically connects the first conductive layer and the first electrode; the first spacer has a first surface facing the first electrode; The semiconductor device according to claim 7 , wherein the first surface is spaced apart from the first gate electrode when viewed in the first direction.

10. the first spacer has a second surface facing the first conductive layer; The area of ​​the second surface is larger than the area of ​​the first surface, The semiconductor device according to claim 9 , wherein the first surface is surrounded by a periphery of the second surface when viewed in the first direction.

11. the first semiconductor element has a first element body including a first pad and a first gate pad located on a side facing the first conductive layer in the first direction, and a first rewiring that electrically connects the first gate pad and the first gate electrode; the first element body includes the second electrode, the first gate electrode is located on the same side as the second electrode in the first direction, The semiconductor device according to claim 7 , wherein said first electrode is electrically connected to said first pad.

12. The semiconductor device according to claim 11 , wherein the first electrode is in contact with the first pad.

13. the first semiconductor element has a first resin covering a portion of the first element body and at least a portion of the first rewiring; The semiconductor device according to claim 12 , wherein the first electrode, the second electrode, and the first gate electrode are exposed from the first resin.

14. the first semiconductor element has a first detection electrode located on the same side as the first gate electrode in the first direction, and a second rewiring that electrically connects the first pad and the first detection electrode; At least a portion of the second rewiring is covered with the first resin, The semiconductor device according to claim 13 , wherein the first detection electrode is exposed from the first resin.

15. the second semiconductor element has a second element body including a second pad and a second gate pad located on the side opposite to the side facing the second conductive layer in the first direction, and a second gate electrode electrically connected to the second gate pad; the second element body includes the fourth electrode, the second gate electrode is located on the same side as the third electrode in the first direction, The semiconductor device according to claim 13 , wherein the third electrode is in contact with the second pad.

16. 8. The semiconductor device according to claim 7, wherein the thickness of each of said first conductive layer, said second conductive layer and said first heat dissipation layer is greater than the thickness of said first insulating layer.

17. further comprising a plurality of power terminals; 17. The semiconductor device according to claim 16, wherein the plurality of power terminals are electrically connected to the first conductive layer, the second conductive layer, and the third conductive layer, respectively.

Citation Information

Patent Citations

  • Power-module semiconductor device

    JP2013258387A