Semiconductor device, method for manufacturing semiconductor device, and electronic device

Abstract

To realize a high-performance and small-sized semiconductor device.SOLUTION: A semiconductor device 1A comprises a pre-matching circuit 80A and a pre-matching circuit 90A which perform impedance matching on an output side and an input side thereof, for example. The pre-matching circuit 80A on the output side includes: a via 81A which is provided in a substrate 10, and is connected to a drain electrode 60 provided for a surface 10a side of the substrate 10; and a dielectric 82A which is provided in the substrate 10, and is provided for the opposite side of the drain electrode 60 side of the via 81A. The pre-matching circuit 90A on the input side includes: a via 91A which is provided in the substrate 10, and is connected to a gate electrode 40 provided for the surface 10a side of the substrate 10; and a dielectric 92A which is provided in the substrate 10, and is provided for the opposite side of the gate electrode 40 side of the via 91A. The semiconductor device 1A may be equipped with either the pre-matching circuit 80A or the pre-matching circuit 90A.SELECTED DRAWING: Figure 3

Description

[Technical Field]

[0001] The present invention relates to a semiconductor device, a method for manufacturing a semiconductor device, and an electronic device. [Background technology]

[0002] For example, in order to match the impedance of an MMIC (Microwave Monolithic Integrated Circuit), a technique is known in which a capacitor provided on a substrate is used, as well as a technique in which a capacitor having a high resistance semiconductor layer of a heterojunction transistor as a dielectric layer (Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 62-30360 Summary of the Invention [Problem to be solved by the invention]

[0004] In semiconductor devices, impedance matching may be performed by connecting input or output electrodes provided on a substrate to capacitors provided on the substrate at their outer sides via wiring. In this case, while impedance matching can improve the performance of the semiconductor device, the connection between the electrodes and the capacitors on the substrate can result in an increase in the size of the semiconductor device.

[0005] In one aspect, an object of the present invention is to realize a high-performance and small-sized semiconductor device. [Means for solving the problem]

[0006] In one aspect, a semiconductor device is provided that includes a substrate, a first electrode provided on a first surface side of the substrate, a conductor portion provided within the substrate and connected to the first electrode, and a dielectric provided within the substrate and on the side opposite the first electrode side of the conductor portion.

[0007] In another aspect, there are provided a method for manufacturing the semiconductor device as described above, and an electronic device including the semiconductor device as described above. [Effects of the Invention]

[0008] In one aspect, it becomes possible to realize a high-performance and small-sized semiconductor device. [Brief explanation of the drawings]

[0009] [Figure 1] 1A and 1B are diagrams illustrating a configuration example of a semiconductor device. [Figure 2] 1A and 1B are diagrams illustrating an example of a semiconductor device including a pre-matching circuit. [Figure 3] 1A and 1B are diagrams illustrating an example of a semiconductor device according to a first embodiment. [Figure 4] 3A and 3B are diagrams illustrating impedance matching of the semiconductor device according to the first embodiment. [Figure 5] 10A to 10C are diagrams illustrating a modified example of the semiconductor device according to the first embodiment. [Figure 6] 1A to 1C are diagrams (part 1) illustrating an example of a method for manufacturing a semiconductor device according to the first embodiment. [Figure 7] 1A to 1C are diagrams (part 2) illustrating an example of a method for manufacturing a semiconductor device according to the first embodiment. [Figure 8] 10A and 10B are diagrams illustrating an example of a semiconductor device according to a second embodiment. [Figure 9] 10A to 10C are diagrams (part 1) illustrating an example of a method for manufacturing a semiconductor device according to a second embodiment. [Figure 10] 10A and 10B are diagrams (part 2) illustrating an example of a method for manufacturing a semiconductor device according to the second embodiment. [Figure 11] 10A to 10C are views (part 3) illustrating an example of a method for manufacturing a semiconductor device according to the second embodiment. [Figure 12] 10A to 10C are diagrams illustrating an example of a semiconductor package according to a third embodiment. [Figure 13] FIG. 10 is a diagram illustrating an example of a power factor correction circuit according to a fourth embodiment. [Figure 14] FIG. 10 is a diagram illustrating an example of a power supply device according to a fifth embodiment. [Figure 15] FIG. 13 is a diagram illustrating an example of an amplifier according to a sixth embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0010] First, impedance matching of a semiconductor device will be described. In a semiconductor device, for example, an input or output electrode may be connected to a capacitor via wiring to perform impedance matching. In this case, a circuit including the capacitor and wiring connected to the input or output electrode is also called a pre-matching circuit. In a semiconductor device, such a pre-matching circuit can be used to perform impedance matching for an input or output signal.

[0011] 1A and 1B are diagrams illustrating configuration examples of a semiconductor device. Fig. 1A shows a schematic configuration example of a semiconductor device that does not use a pre-matching circuit. Fig. 1B shows a schematic configuration example of a semiconductor device that uses a pre-matching circuit.

[0012] 1A, for example, a semiconductor device 100A includes a substrate 110 made of a semiconductor or the like, and a transistor section 120 including one or more various transistor elements (not shown) formed on the substrate 110. The transistor section 120 is connected to a signal input section 121 and an output section 122. For example, the input section 121 is connected to the gate of the transistor section 120, and the output section 122 is connected to the drain of the transistor section 120.

[0013] In the semiconductor device 100A, when a predetermined frequency signal such as a high-frequency signal is input or output, if impedance mismatch occurs on the input section 121 side, the output section 122 side, or both, the switching characteristics and output characteristics may be degraded. Therefore, for example, as in the semiconductor device 100B shown in FIG. 1(B), a pre-matching circuit 130 is connected to the input section 121 side and the output section 122 side of the transistor section 120.

[0014] 1(B), the pre-matching circuit 130 includes, for example, a capacitor 131 provided on the substrate 110. The capacitor 131 is connected to the input section 121 (gate side) and the output section 122 (drain side) of the transistor section 120 by wiring 132. The wiring 132 may be a wiring layer that extends on the substrate 110 and connects the transistor section 120 and the capacitor 131, or may be a wire that connects the transistor section 120 and the capacitor 131 by wire bonding. In the pre-matching circuit 130, the capacitor 131 becomes a capacitance component. In the pre-matching circuit 130, the wiring 132 becomes an inductance component and a resistance component.

[0015] In the semiconductor device 100B, when a predetermined frequency signal such as a high-frequency signal is input or output, the pre-matching circuit 130 performs impedance matching on the input section 121 side and the output section 122 side. For example, impedance matching is performed so that the impedance on the input section 121 side and the impedance on the output section 122 side are each 50 Ω or close to that value. This prevents deterioration of the switching characteristics and output characteristics of the semiconductor device 100B.

[0016] FIG. 2 shows an example of a semiconductor device to which the above-described pre-matching circuit is applied. 2A and 2B are diagrams illustrating an example of a semiconductor device including a pre-matching circuit. Fig. 2A is a schematic plan view of a main part of an example of a semiconductor device including a pre-matching circuit. For convenience, Fig. 2A shows a circuit diagram of part of the pre-matching circuit. Fig. 2B is a schematic cross-sectional view taken along line II-II of Fig. 2A.

[0017] The semiconductor device 1C shown in FIGS. 2A and 2B is an example of a semiconductor device that includes a high electron mobility transistor (HEMT) as a transistor element.

[0018] The semiconductor device 1C has a gate electrode 40, a source electrode 50, and a drain electrode 60 provided on one surface 10a of a substrate 10. The gate electrode 40 is made of a metal such as nickel (Ni) or gold (Au). The source electrode 50 and the drain electrode 60 are made of a metal such as titanium (Ti), tantalum (Ta), or aluminum (Al). The gate electrode 40 has, for example, a plurality of (here, two, as an example) gate finger portions 41 and a gate pad portion 42 to which they are connected. The source electrode 50 is, for example, island-shaped. The drain electrode 60 has, for example, a plurality of (here, two, as an example) drain finger portions 61 and a drain pad portion 62 to which they are connected.

[0019] In the semiconductor device 1C, as shown in FIGS. 2A and 2B, for example, the source electrode 50 is disposed so as to be sandwiched between a pair of gate finger portions 41, and each drain finger portion 61 is disposed so as to face the source electrode 50 with the gate finger portion 41 sandwiched therebetween. A transistor element (in this example, a HEMT) is formed in each location where one gate finger portion 41 and a pair of source electrode 50 and drain finger portions 61 sandwiching it are disposed. The region (also referred to as the "active region" or "element region") where the gate finger portions 41 of the gate electrode 40, the source electrode 50, and the drain finger portions 61 of the drain electrode 60 are disposed functions as the transistor portion 20 of the semiconductor device 1C. The gate pad portion 42 of the gate electrode 40 functions as the input portion of the semiconductor device 1C. The drain pad portion 62 of the drain electrode 60 functions as the output portion of the semiconductor device 1C.

[0020] The substrate 10 on which the gate electrode 40, the source electrode 50, and the drain electrode 60 are provided includes, for example, an underlayer 11, an electron transit layer 12, and an electron supply layer 13, as shown in FIG. 2(B).

[0021] The underlayer 11 is made of a material such as silicon carbide (SiC). The underlayer 11 may be made of various materials such as gallium nitride (GaN), aluminum nitride (AlN), silicon (Si), sapphire, diamond, etc. The underlayer 11 may have a single layer structure of one material or a laminate structure of one or more materials. The underlayer 11 may be conductive or semi-insulating.

[0022] The electron transit layer 12 is made of a nitride semiconductor such as GaN. The electron transit layer 12 may also be made of a nitride semiconductor such as aluminum gallium nitride (AlGaN), indium gallium nitride (InGaN), or indium aluminum gallium nitride (InAlGaN). The electron transit layer 12 may have a single-layer structure made of one type of nitride semiconductor, or a stacked structure made of one or more types of nitride semiconductors. The electron transit layer 12 is also referred to as a channel layer, etc.

[0023] The electron supply layer 13 includes a nitride semiconductor such as AlGaN. The electron supply layer 13 may include a nitride semiconductor such as InAlGaN, AlN, or indium aluminum nitride (InAlN). The electron supply layer 13 may have a single-layer structure of one type of nitride semiconductor, or a stacked structure of one or more types of nitride semiconductors. The electron supply layer 13 is also called a barrier layer or the like.

[0024] An electron transit layer 12 and an electron supply layer 13 are formed on the underlayer 11 by metal organic chemical vapor deposition (MOCVD) or metal organic vapor phase epitaxy (MOVPE) or molecular beam epitaxy (MBE), etc., to form a substrate 10.

[0025] The electron transit layer 12 and the electron supply layer 13 of the substrate 10 are made of nitride semiconductors with different bandgaps. A two-dimensional electron gas (2DEG) region 14 is generated in the electron transit layer 12 due to spontaneous polarization of the nitride semiconductor of the electron supply layer 13 and piezoelectric polarization generated in the electron supply layer 13 due to strain caused by the difference in lattice constant between the nitride semiconductor of the electron transit layer 12 and the electron supply layer 13. The electron transit layer 12 and the electron supply layer 13 are made of nitride semiconductors in such a combination that the 2DEG region 14 is generated in the electron transit layer 12.

[0026] Although not shown, a layer such as AlN may be provided between the underlayer 11 and the electron transit layer 12 as an initial layer, a layer such as AlGaN may be provided as a buffer layer, or a layer such as GaN doped with iron (Fe). In addition, a layer such as AlN or AlGaN may be provided between the underlayer 11 and the electron transit layer 12 as a barrier layer (back barrier layer) to achieve a quantum well (quantum confinement) structure. A layer such as AlN may be provided between the electron transit layer 12 and the electron supply layer 13 as a spacer layer. A layer such as GaN may be provided on the electron supply layer 13 as a cap layer. In addition to the underlayer 11, the electron transit layer 12, and the electron supply layer 13, the substrate 10 may include one or more of the above-described initial layer, buffer layer, back barrier layer, spacer layer, cap layer, etc.

[0027] In the semiconductor device 1C, for example, a gate electrode 40, a source electrode 50, and a drain electrode 60 are provided on one surface 10a of a substrate 10 having the above-described configuration. Furthermore, an electrode (referred to as a "rear surface electrode") 70 is provided on the other surface 10b of the substrate 10, as shown in FIG. 2(B). The rear surface electrode 70 is made of a metal such as Au, copper (Cu), or Al. The rear surface electrode 70 is at ground potential. The source electrode 50 may be connected to the rear surface electrode 70 using, for example, a through electrode that penetrates the substrate 10.

[0028] When the semiconductor device 1C is in operation, a predetermined voltage is applied between the source electrode 50 and the drain electrode 60, and a predetermined voltage is also applied to the gate electrode 40. The electric field effect caused by the voltage applied to the gate electrode 40 controls the amount of charge passing through the 2DEG region 14 immediately below the gate electrode 40 between the source electrode 50 and the drain electrode 60, thereby controlling the output drain current. In this way, the transistor function of the semiconductor device 1C is realized.

[0029] In the semiconductor device 1C, for example, as shown in FIG. 2A, a capacitor 31C is provided on the substrate 10 outside a gate electrode 40 that serves as an input to the transistor section 20. A gate pad section 42 of the gate electrode 40 and the capacitor 31C provided thereon are connected by a wiring 32C. In addition, in the semiconductor device 1C, for example, as shown in FIG. 2A, a capacitor 31C is provided on the substrate 10 outside a drain electrode 60 that serves as an output to the transistor section 20. A drain pad section 62 of the drain electrode 60 and the capacitor 31C provided thereon are connected by a wiring 32C.

[0030] The wiring 32C and capacitor 31C connected to the gate electrode 40, and the wiring 32C and capacitor 31C connected to the drain electrode 60 each function as a pre-matching circuit 30C for impedance matching. The wiring 32C may be a wiring layer extending on the substrate 10, or may be a wire connected by wire bonding. In the pre-matching circuit 30C, the capacitor 31C serves as a capacitance component. In the pre-matching circuit 30C, the wiring 32C serves as an inductance component and a resistance component.

[0031] In the semiconductor device 1C, when a predetermined frequency signal such as a high-frequency signal is input or output, the pre-matching circuit 30C performs impedance matching on the gate electrode 40 side, which serves as input, and on the drain electrode 60 side, which serves as output. For example, impedance matching is performed so that the impedance on the gate electrode 40 side and the impedance on the drain electrode 60 side are each 50 Ω or close to that value. This suppresses deterioration of the switching characteristics and output characteristics of the semiconductor device 1C, thereby improving its performance.

[0032] However, in the semiconductor device 1C having the above configuration, the pre-matching circuits 30C are provided on the substrate 10 outside the gate electrode 40 (which serves as input) and on the substrate 10 outside the drain electrode 60 (which serves as output). Therefore, a portion of the substrate 10 is occupied by the area where the pre-matching circuits 30C are provided. Therefore, providing the pre-matching circuits 30C may result in an increase in the size of the semiconductor device 1C. Although techniques have been proposed for reducing the area occupied by the transistor section 20, even if such techniques are adopted, providing the pre-matching circuits 30C may offset the effect of reducing the size of the transistor section 20, resulting in an increase in the size of the semiconductor device 1C.

[0033] In this way, in the semiconductor device 1C to which the above-described pre-matching circuit 30C is applied, high performance can be achieved by the impedance matching using the pre-matching circuit 30C, but providing the pre-matching circuit 30C may result in an increase in size.

[0034] Here, an example has been shown in which the pre-matching circuit 30C is provided on both the gate electrode 40 side, which serves as input, and the drain electrode 60 side, which serves as output. However, the same problem as described above can occur even if the pre-matching circuit 30C is provided on either the input or output side.

[0035] Furthermore, although the semiconductor device 1C including a HEMT as a transistor element has been used as an example here, the same thing can happen in any semiconductor device including various transistor elements to which the pre-match circuit 30C having the above-described configuration is applied.

[0036] In view of the above, the following configuration is adopted as an embodiment to realize a high-performance, small-sized semiconductor device capable of impedance matching. [First embodiment] 3A and 3B are diagrams illustrating an example of a semiconductor device according to the first embodiment. FIG. 3A is a schematic plan view of a main part of the example of the semiconductor device. FIG. 3B and FIG. 3C are schematic cross-sectional views of a main part of the example of the semiconductor device. FIG. 3B is a schematic cross-sectional view taken along line IIIb-IIIb of FIG. 3A. FIG. 3C is a schematic cross-sectional view taken along line IIIc-IIIc of FIG. 3A.

[0037] A semiconductor device 1A shown in FIGS. 3(A) to 3(C) is an example of a semiconductor device that includes a HEMT as a transistor element. Similar to the semiconductor device 1C described with reference to FIGS. 2A and 2B, the semiconductor device 1A has a gate electrode 40, a source electrode 50, and a drain electrode 60 provided on one surface 10a of the substrate 10. A transistor element (HEMT in this example) is formed in each of the gate finger portions 41 of the gate electrode 40 and the pair of source electrode 50 and drain finger portions 61 of the drain electrode 60 sandwiching the gate finger portion 41. The region (active region or element region) in which the gate finger portions 41 of the gate electrode 40, the source electrode 50, and the drain finger portions 61 of the drain electrode 60 are arranged functions as the transistor portion 20 of the semiconductor device 1A. The gate pad portion 42 of the gate electrode 40 functions as the input portion of the semiconductor device 1A. The drain pad portion 62 of the drain electrode 60 functions as the output portion of the semiconductor device 1A.

[0038] The transistor section 20 of the semiconductor device 1A can have the same configuration as the transistor section 20 of the semiconductor device 1C described above with reference to Figures 2(A) and 2(B). Note that in Figures 3(B) and 3(C), the distinction between the above-mentioned layers included in the substrate 10, i.e., the base layer 11, the electron transit layer 12, the electron supply layer 13, and the like, is omitted.

[0039] The semiconductor device 1A has a configuration as shown in FIGS. 3(A) and 3(B) on the side of the drain electrode 60 (drain pad portion 62 thereof) which serves as an output. In the semiconductor device 1A, as shown in FIGS. 3A and 3B, a via 81A is provided in the substrate 10 as a conductor connected to the drain pad portion 62 of the drain electrode 60 provided on the surface 10a of the substrate 10. Furthermore, as shown in FIGS. 3A and 3B, a dielectric 82A is provided in the substrate 10 on the side opposite the drain pad portion 62 of the via 81A. That is, in the semiconductor device 1A, the via 81A connected to the drain pad portion 62 is provided in a through-hole 10c that penetrates between the surface 10a and the opposite surface 10b of the substrate 10 and leads to the drain pad portion 62, and a dielectric 82A is also provided. The via 81A is connected to the drain pad portion 62 and extends from the drain pad portion 62 into the substrate 10. The dielectric 82A is provided in the substrate 10 on the side opposite the drain pad portion 62 of the via 81A.

[0040] A back surface electrode 70, which is at ground potential, is provided on the surface 10b side of the substrate 10 having the via 81A and the dielectric 82A provided therein. The dielectric 82A is covered with the back surface electrode 70, as shown in FIG. 3(B). That is, the dielectric 82A in the substrate 10 is interposed between the via 81A in the substrate 10 and the back surface electrode 70 on the surface 10b side of the substrate 10. The back surface electrode 70 and the via 81A are provided in a state separated from each other.

[0041] In the semiconductor device 1A, a via 81A and a dielectric 82A provided directly below the drain electrode 60 (its drain pad portion 62) are used to form a pre-matching circuit 80A on the drain electrode 60 side, i.e., the output side. The via 81A, the dielectric 82A, and the back surface electrode 70 form a capacitor 83A of the pre-matching circuit 80A. In the pre-matching circuit 80A, the capacitor 83A serves as a capacitance component. In the pre-matching circuit 80A, the via 81A serves as an inductance component and a resistance component.

[0042] The semiconductor device 1A also has a configuration as shown in FIGS. 3(A) and 3(C) on the side of the gate electrode 40 (its gate pad portion 42) that serves as input. 3(A) and 3(C), the semiconductor device 1A has a via 91A, which is a conductor connected to the gate pad portion 42 of the gate electrode 40 provided on the surface 10a side of the substrate 10, provided in the substrate 10. Furthermore, as shown in FIGS. 3(A) and 3(C), the semiconductor device 1A has a dielectric 92A provided in the substrate 10 on the side opposite the gate pad portion 42 side of the via 91A. That is, in the semiconductor device 1A, the via 91A connected to the gate pad portion 42 is provided in a through hole 10d that penetrates between the surfaces 10a and 10b of the substrate 10 and leads to the gate pad portion 42 of the gate electrode 40, and further has a dielectric 92A provided therein.

[0043] 3(C), the dielectric 92A is covered by the back surface electrode 70 provided on the surface 10b side of the substrate 10. That is, the dielectric 92A in the substrate 10 is interposed between the via 91A in the substrate 10 and the back surface electrode 70 on the surface 10b side of the substrate 10. The back surface electrode 70 and the via 91A are provided in a state separated from each other.

[0044] In the semiconductor device 1A, a via 91A and a dielectric 92A in the substrate 10 provided directly below the gate electrode 40 (its gate pad portion 42) are used to form a pre-matching circuit 90A on the gate electrode 40 side, i.e., the input side. The via 91A, the dielectric 92A, and the back surface electrode 70 form a capacitor 93A of the pre-matching circuit 90A. In the pre-matching circuit 90A, the capacitor 93A serves as a capacitance component. In the pre-matching circuit 90A, the via 91A serves as an inductance component and a resistance component.

[0045] In the semiconductor device 1A, when a signal of a predetermined frequency such as a radio frequency signal is output, the pre-matching circuit 80A performs impedance matching on the drain electrode 60 side. In addition, in the semiconductor device 1A, when a signal of a predetermined frequency such as a radio frequency signal is input, the pre-matching circuit 90A performs impedance matching on the gate electrode 40 side.

[0046] 4A and 4B are diagrams illustrating impedance matching of the semiconductor device according to the first embodiment. Fig. 4A is a Smith chart showing an example of impedance matching on the drain electrode side, which is the output. Fig. 4B is a Smith chart showing an example of impedance matching on the gate electrode side, which is the input.

[0047] On the drain electrode 60 side, which is the output, the impedance P1 when the pre-matching circuit 80A is provided is closer to 50 Ω at the center point P0, as shown by the dotted arrow in Figure 4(A), compared to the impedance P2 when the pre-matching circuit 80A is not provided. For example, in this way, impedance matching on the drain electrode 60 side is performed by the pre-matching circuit 80A. Note that, depending on the configuration of the pre-matching circuit 80A, the impedance P1 can also be matched to 50 Ω at the center point P0.

[0048] Similarly, on the side of the gate electrode 40, which serves as the input, as shown by the dotted arrow in Figure 4(B), the impedance Q1 when the pre-matching circuit 90A is provided is made closer to 50 Ω at the center point Q0, compared to the impedance Q2 when the pre-matching circuit 90A is not provided. For example, in this manner, impedance matching on the side of the gate electrode 40 is performed by the pre-matching circuit 90A. Note that, depending on the configuration of the pre-matching circuit 90A, the impedance Q1 can also be matched to 50 Ω at the center point Q0.

[0049] 3A to 3C, the provision of the pre-matching circuit 80A and the pre-matching circuit 90A enables impedance matching on the drain electrode 60 side and the gate electrode 40 side. That is, the pre-matching circuit 80A and the pre-matching circuit 90A adjust the impedance on the drain electrode 60 side and the gate electrode 40 side to approach or reach 50 Ω. This makes it possible to suppress deterioration of the switching characteristics and output characteristics of the semiconductor device 1A and to achieve high performance.

[0050] In the semiconductor device 1A, the pre-matching circuit 80A and the pre-matching circuit 90A are provided directly below the drain electrode 60 and directly below the gate electrode 40, respectively. Therefore, the semiconductor device 1A is made smaller than when pre-matching circuits are formed by providing capacitors connected to the drain electrode 60 and the gate electrode 40 by wiring on the substrate 10 outside the drain electrode 60 and the gate electrode 40, respectively.

[0051] By providing the pre-matching circuit 80A and the pre-matching circuit 90A as described above, a high-performance, small-sized semiconductor device 1A capable of impedance matching is realized. In the semiconductor device 1A, the capacitance, inductance, and resistance components of the pre-matching circuit 80A are adjusted by the material and dimensions of the via 81A and the dielectric 82A, respectively. The capacitance, inductance, and resistance components of the pre-matching circuit 90A are adjusted by the material and dimensions of the via 91A and the dielectric 92A, respectively.

[0052] The vias 81A and 91A are made of various conductive materials, such as metals such as Au, Cu, and Al. The dielectrics 82A and 92A are made of various dielectric materials, such as SiN, SiO, SiON, SiOC, and SiC. The materials used for the pre-matching circuits 80A and 90A are selected to adjust their capacitance, inductance, and resistance components.

[0053] As an example, for the pre-matching circuit 80A, as shown in FIG. 3B, the dimensions of various components, such as the width (or diameter or area) W1 and length L1 of the via 81A, and the width (or diameter or area) S1 and thickness T1 of the dielectric 82A, are adjusted. The width W1 of the via 81A affects the capacitance component of the pre-matching circuit 80A. The length L1 of the via 81A affects the inductance component and resistance component of the pre-matching circuit 80A. The width S1 and thickness T1 of the dielectric 82A affect the capacitance component of the pre-matching circuit 80A. While the pre-matching circuit 80A shown in FIG. 3B has been described here, the same applies to the pre-matching circuit 90A shown in FIG. 3C.

[0054] In the pre-matching circuits 80A and 90A, the capacitance, inductance, and resistance components are adjusted by selecting the materials of the vias 81A and the dielectrics 82A and the vias 91A and the dielectrics 92A and adjusting their dimensions. By adjusting the capacitance, inductance, and resistance components in this manner, good impedance matching is achieved by the pre-matching circuits 80A and 90A.

[0055] Although the example shown here is one in which the semiconductor device 1A is provided with both the pre-matching circuit 80A and the pre-matching circuit 90A, the semiconductor device 1A may be configured to be provided with either the pre-matching circuit 80A or the pre-matching circuit 90A. Even in such a configuration, impedance matching is performed on the drain electrode 60 side, which serves as the output, or the gate electrode 40 side, which serves as the input, thereby achieving a high-performance, compact semiconductor device 1A.

[0056] Furthermore, the configurations of the pre-matching circuit 80A and the pre-matching circuit 90A are not limited to those shown in FIGS. 3(A) to 3(C), respectively. 5A and 5B are diagrams illustrating modified examples of the semiconductor device according to the first embodiment. FIG. 5A is a schematic cross-sectional view of a main part of a first modified example of the semiconductor device. FIG. 5B is a schematic cross-sectional view of a main part of a second modified example of the semiconductor device. For convenience, FIGS. 5A and 5B each show a schematic cross-sectional view of a modified example of the IIIb-IIIb cross section of FIG. 3A (a modified example of FIG. 3B).

[0057] 5(A) has a configuration including a pre-matching circuit 80Aa on the side of the drain electrode 60 serving as an output, the pre-matching circuit 80Aa including a plurality of vias 81A (three in this example) and a plurality of dielectrics 82A (three in this example) interposed between each via 81A and the back surface electrode 70. The semiconductor device 1Aa differs from the semiconductor device 1A (FIG. 3(B)) in having such a configuration.

[0058] In the semiconductor device 1Aa, a pre-matching circuit 80Aa is formed by providing multiple pairs of vias 81A and dielectrics 82A in the substrate 10 between the drain electrode 60 provided on the surface 10a side of the substrate 10 and the back electrode 70 provided on the surface 10b side of the substrate 10. For example, if the number of transistor elements (HEMTs) included in the transistor section of the semiconductor device 1Aa increases, a pre-matching circuit including a single pair of vias 81A and dielectrics 82A may not be able to adequately match the impedance on the drain electrode 60 side. Even in such a case, the semiconductor device 1Aa uses a pre-matching circuit 80Aa including multiple pairs of vias 81A and dielectrics 82A, thereby enabling good impedance matching on the drain electrode 60 side.

[0059] 5(B) has a configuration including a pre-matching circuit 80Ab on the side of the drain electrode 60 serving as the output, the pre-matching circuit 80Ab including one relatively wide via 81A and one relatively wide dielectric 82A interposed between the via 81A and the back electrode 70. The semiconductor device 1Ab differs from the semiconductor device 1A (FIG. 3(B)) in that it has such a configuration.

[0060] In the semiconductor device 1Ab, a pre-matching circuit 80Ab is formed by providing a relatively wide pair of vias 81A and a dielectric 82A in the substrate 10 between the drain electrode 60 provided on the surface 10a side of the substrate 10 and the back electrode 70 provided on the surface 10b side of the substrate 10. For example, if the number of transistor elements (HEMTs) included in the transistor section of the semiconductor device 1Ab increases, a pre-matching circuit including a relatively narrow pair of vias 81A and a dielectric 82A may not be able to adequately match impedance on the drain electrode 60 side. Even in such a case, the semiconductor device 1Ab uses a pre-matching circuit 80Ab including a relatively wide pair of vias 81A and a dielectric 82A, thereby enabling good impedance matching on the drain electrode 60 side.

[0061] Here, the pre-matching circuit 80Aa (FIG. 5(A)) and the pre-matching circuit 80Ab (FIG. 5(B)) on the drain electrode 60 side, which is the output, are shown as examples, but a pre-matching circuit having a similar configuration can also be used on the gate electrode 40 side, which is the input.

[0062] Next, a method for manufacturing the semiconductor device 1A having the above-described configuration will be described. 6 and 7 are diagrams illustrating an example of a method for manufacturing a semiconductor device according to the first embodiment. Figures 6(A) to 6(D) and 7(A) to 7(D) each show a schematic cross-sectional view of a main part of an example of a manufacturing process of a semiconductor device. For convenience, the example of the manufacturing method of the semiconductor device will be described, focusing mainly on the region on the drain electrode side where the pre-matching circuit is provided.

[0063] First, a substrate 10 including a HEMT is prepared as a transistor element. That is, an electron transit layer 12, an electron supply layer 13, and the like are formed on an underlayer 11 using a method such as MOCVD, thereby obtaining the substrate 10. A gate electrode 40, a source electrode 50, a drain electrode 60, and the like are formed on a surface 10a of the obtained substrate 10 facing the electron supply layer 13, thereby preparing the substrate 10 including a HEMT.

[0064] 6(A), after the substrate 10 is prepared, a resist 150 having an opening 150a in a region corresponding to the drain electrode 60 (the drain pad portion 62) on the opposite surface 10a is formed on the surface 10b of the prepared substrate 10. The opening 150a in the resist 150 is formed in a region where the via 81A and the dielectric 82A are to be provided, as will be described later.

[0065] After the resist 150 is formed, as shown in FIG. 6B, the substrate 10 is etched from the surface 10b side using the resist 150 as a mask. The etching of the substrate 10 is performed, for example, by dry etching. Note that fluorine-based gases can be used for dry etching of Si-containing semiconductors such as SiC in the substrate 10, and chlorine-based gases can be used for dry etching of nitride semiconductors such as GaN. By etching the substrate 10 using the resist 150 as a mask, a through-hole 10c is formed, penetrating the substrate 10 from the surface 10b to the surface 10a and communicating with the drain pad portion 62 of the drain electrode 60. Note that an etching stopper made of Ni or the like may be provided on the surface of the drain pad portion 62 facing the surface 10a of the substrate 10 to prevent the drain pad portion 62 from being exposed to etching during the formation of the through-hole 10c. After the through-hole 10c is formed, the resist 150 is removed.

[0066] After the through hole 10c is formed and the resist 150 is removed, a seed layer 81A1 containing a metal such as Au is formed on the surface 10b of the substrate 10 and the inner surface (inner wall surface and bottom surface) of the through hole 10c using a sputtering method or the like, as shown in Fig. 6(C). Furthermore, after the seed layer 81A1 is formed, a resist 151 is formed so as to cover a portion of the seed layer 81A1 inside the through hole 10c (a portion of the inner wall surface and the bottom surface), as shown in Fig. 6(C). The resist 151 is formed in a region where the via 81A will be provided, as described below.

[0067] After the seed layer 81A1 and the resist 151 are formed, the seed layer 81A1 exposed from the resist 151 is removed by etching using the resist 151 as a mask. That is, the seed layer 81A1 formed on the surface 10b of the substrate 10 and part of the inner surface of the through hole 10c is removed. The etching of the seed layer 81A1 is performed by wet etching or dry etching. After the seed layer 81A1 is partially removed, the resist 151 is removed. This results in a state as shown in FIG. 6(D), in which the seed layer 81A1 remains on part of the inner wall surface and bottom surface of the through hole 10c.

[0068] After the seed layer 81A1 is partially removed and the resist 151 is removed, a buried layer 81A2 containing a metal such as Au is formed as shown in FIG. 7A. For example, the buried layer 81A2 is formed on the seed layer 81A1 remaining in the through hole 10c of the substrate 10 using a plating method or the like. The seed layer 81A1 and the buried layer 81A2 thus formed form a via 81A. The via 81A is provided in the through hole 10c of the substrate 10 and is formed to extend from the drain electrode 60 (its drain pad portion 62) into the substrate 10.

[0069] 7B, after the via 81A is formed, a dielectric material 82A1 such as SiN is formed on the surface 10b of the substrate 10 by using, for example, a CVD (Chemical Vapor Deposition) method, so as to fill the depression above the via 81A in the through hole 10c.

[0070] After the dielectric material 82A1 is formed, as shown in FIG. 7C, the dielectric material 82A1 formed in other regions is removed, leaving only the dielectric material 82A1 filling the recess above the via 81A in the through hole 10c. For example, the dielectric material 82A1 is partially removed using a CMP (Chemical Mechanical Polishing) method or using photolithography and etching techniques, so that the dielectric material 82A1 remains above the via 81A in the through hole 10c. The dielectric material 82A1 remaining above the via 81A in the through hole 10c forms the dielectric 82A of the capacitor.

[0071] 7(D), after the dielectric 82A is formed, a back electrode 70 containing a metal such as Au is formed on the surface 10b side of the substrate 10. For example, the back electrode 70 is formed using a sputtering method, a plating method, or the like.

[0072] As a result, a pre-matching circuit 80A is formed in the substrate 10 between the drain electrode 60 and the back surface electrode 70, in which the via 81A and the dielectric 82A are provided. For example, the semiconductor device 1A including the pre-matching circuit 80A is manufactured by the above steps. Note that the manufacturing method of the semiconductor device 1A is not limited to the above example.

[0073] 6(A) to 6(D) and 7(A) to 7(D) show an example of forming the pre-matching circuit 80A provided on the drain electrode 60 side, but this example can also be used to form the pre-matching circuit 90A provided on the gate electrode 40 side. In this case, the formation of the pre-matching circuit 80A on the drain electrode 60 side and the formation of the pre-matching circuit 90A on the gate electrode 40 side may be performed simultaneously in parallel.

[0074] Furthermore, following this example of manufacturing the semiconductor device 1A, the semiconductor device 1Aa (Figure 5(A)) and the semiconductor device 1Ab (Figure 5(B)) can also be manufactured in the same manner by appropriately changing the number and shape of the through holes 10c formed in the substrate 10.

[0075] In the first embodiment, the surface 10a of the substrate 10 is also referred to as the "first surface," and the surface 10b is also referred to as the "second surface." The drain electrode 60 or the gate electrode 40, or the drain pad portion 62 of the drain electrode 60 or the gate pad portion 42 of the gate electrode 40, is also referred to as the "first electrode." The via 81A or the via 91A is also referred to as the "conductor portion." The back electrode 70 is also referred to as the "second electrode."

[0076] Here, the semiconductor device 1A includes a HEMT as a transistor element, but the semiconductor device 1A is not limited to a HEMT and may include various types of transistor elements. [Second embodiment] 8A and 8B are diagrams illustrating an example of a semiconductor device according to a second embodiment. Fig. 8A is a schematic plan view of a main part of the example of the semiconductor device. Fig. 8B and Fig. 8C are schematic cross-sectional views of a main part of the example of the semiconductor device. Fig. 8B is a schematic cross-sectional view taken along line VIIIb-VIIIb of Fig. 8A. Fig. 8C is a schematic cross-sectional view taken along line VIIIc-VIIIc of Fig. 8A.

[0077] As shown in FIGS. 8A and 8B, the semiconductor device 1B according to the second embodiment has a configuration in which a pre-matching circuit 80B including a via 81B, a wiring 84B (conductor portion 85B) extending therefrom, and a dielectric 82B is provided on the drain electrode 60 side, which serves as an output. Also, as shown in FIGS. 8A and 8C, the semiconductor device 1B according to the second embodiment has a configuration in which a pre-matching circuit 90B including a via 91B, a wiring 94B (conductor portion 95B) extending therefrom, and a dielectric 92B is provided on the gate electrode 40 side, which serves as an input. The semiconductor device 1B differs from the semiconductor device 1A (FIGS. 3A to 3C) described in the first embodiment in that it has such a configuration.

[0078] 8(A) and 8(B), in the semiconductor device 1B, a via 81B is provided in the substrate 10 and is connected to a drain pad portion 62 of the drain electrode 60 provided on the surface 10a side of the substrate 10. The via 81B is provided so as to extend from the drain pad portion 62 into the substrate 10. As shown in FIGS. 8(A) and 8(B), a wiring 84B is connected to the via 81B and is provided so as to extend within the substrate 10 in a direction parallel to the surface 10a. The via 81B and the wiring 84B form a conductor portion 85B that is L-shaped in cross section.

[0079] As shown in FIG. 8B, the dielectric 82B is provided inside the substrate 10. The dielectric 82B is provided on the side of the conductor portion 85B formed by the via 81B and the wiring 84B opposite to the drain pad portion 62. The dielectric 82B is provided on a part of the conductor portion 85B (the wiring 84B). A part of the conductor portion 85B is covered with the dielectric 82B, and the remaining part is exposed from the dielectric 82B.

[0080] A back surface electrode 70, which is at ground potential, is provided on the surface 10b side of the substrate 10 on which the conductor portion 85B and the dielectric portion 82B are provided. The dielectric portion 82B is covered with the back surface electrode 70, as shown in FIG. 8B. That is, the dielectric portion 82B in the substrate 10 is interposed between the conductor portion 85B in the substrate 10 and the back surface electrode 70 on the surface 10b side of the substrate 10. The portion of the conductor portion 85B exposed from the dielectric portion 82B is not provided with the back surface electrode 70 and is an ungrounded portion. The back surface electrode 70 and the conductor portion 85B are provided in a state where they are separated from each other.

[0081] In the semiconductor device 1B, a conductor 85B (via 81B and wiring 84B thereof) and a dielectric 82B in the substrate 10 provided directly below the drain electrode 60 (drain pad portion 62 thereof) are used to form a pre-matching circuit 80B on the drain electrode 60 side, i.e., the output side. The conductor 85B, the dielectric 82B, and the back surface electrode 70 form a capacitor 83B of the pre-matching circuit 80B. In the pre-matching circuit 80B, the capacitor 83B serves as a capacitance component. In the pre-matching circuit 80B, the conductor 85B serves as an inductance component and a resistance component.

[0082] 8(A) and 8(C), in the semiconductor device 1B, a via 91B is provided in the substrate 10 and is connected to a gate pad portion 42 of a gate electrode 40 provided on the surface 10a side of the substrate 10. The via 91B is provided to extend from the gate pad portion 42 into the substrate 10. As shown in FIGS. 8(A) and 8(C), a wiring 94B is connected to the via 91B and is provided to extend within the substrate 10 in a direction parallel to the surface 10a. The via 91B and the wiring 94B form a conductor portion 95B that is L-shaped in cross section.

[0083] As shown in FIG. 8(C), the dielectric 92B is provided inside the substrate 10. The dielectric 92B is provided on the side of the conductor portion 95B formed by the via 91B and the wiring 94B opposite the gate pad portion 42. The dielectric 92B is provided on a part of the conductor portion 95B (the wiring 94B). A part of the conductor portion 95B is covered with the dielectric 92B, and the remaining part is exposed from the dielectric 92B.

[0084] A back surface electrode 70, which is at ground potential, is provided on the surface 10b of the substrate 10 on which the conductor portion 95B and the dielectric portion 92B are provided. The dielectric portion 92B is covered with the back surface electrode 70, as shown in FIG. 8(C). That is, the dielectric portion 92B in the substrate 10 is interposed between the conductor portion 95B in the substrate 10 and the back surface electrode 70 on the surface 10b side of the substrate 10. The portion of the conductor portion 95B exposed from the dielectric portion 92B is not provided with the back surface electrode 70 and is an ungrounded portion. The back surface electrode 70 and the conductor portion 95B are provided in a state where they are separated from each other.

[0085] In the semiconductor device 1B, a conductor 95B (via 91B and wiring 94B thereof) and a dielectric 92B in the substrate 10 provided directly below the gate electrode 40 (gate pad portion 42 thereof) are used to form a pre-matching circuit 90B on the gate electrode 40 side, i.e., the input side. The conductor 95B, dielectric 92B, and back surface electrode 70 form a capacitor 93B of the pre-matching circuit 90B. In the pre-matching circuit 90B, the capacitor 93B serves as a capacitance component. In the pre-matching circuit 90B, the conductor 95B serves as an inductance component and a resistance component.

[0086] In the semiconductor device 1B, when a signal of a predetermined frequency such as a high-frequency signal is output, the pre-matching circuit 80B performs impedance matching so that the impedance on the drain electrode 60 side approaches or becomes 50Ω. In addition, in the semiconductor device 1B, when a signal of a predetermined frequency such as a high-frequency signal is input, the pre-matching circuit 90B performs impedance matching so that the impedance on the gate electrode 40 side approaches or becomes 50Ω. This makes it possible to suppress deterioration of the switching characteristics and output characteristics of the semiconductor device 1B and to achieve high performance.

[0087] In the semiconductor device 1B, the pre-matching circuit 80B and the pre-matching circuit 90B are provided directly below the drain electrode 60 and directly below the gate electrode 40, respectively. Therefore, the semiconductor device 1B can be made smaller than when pre-matching circuits are formed by providing capacitors connected to the drain electrode 60 and the gate electrode 40 by wiring on the substrate 10 outside the drain electrode 60 and the gate electrode 40, respectively.

[0088] By providing the pre-matching circuit 80B and the pre-matching circuit 90B as described above, a high-performance, small-sized semiconductor device 1B capable of impedance matching is realized. In the semiconductor device 1B, the capacitance, inductance, and resistance components of the pre-matching circuit 80B are adjusted by the materials and dimensions of the conductor portion 85B and the dielectric portion 82B, respectively. The capacitance, inductance, and resistance components of the pre-matching circuit 90B are adjusted by the materials and dimensions of the conductor portion 95B and the dielectric portion 92B, respectively.

[0089] The conductor portion 85B and the conductor portion 95B are made of various conductor materials, such as metals such as Au, Cu, and Al. The dielectric portion 82B and the dielectric portion 92B are made of various dielectric materials, such as SiN, SiO, SiON, SiOC, and SiC. The materials used for the pre-matching circuit 80B and the pre-matching circuit 90B are selected to adjust their capacitance, inductance, and resistance components.

[0090] As an example, for a pre-matching circuit 80B, as shown in FIG. 8B, the dimensions of each component, such as the width W2 and length L2 of the conductor portion 85B or the width S2 and thickness T2 of the dielectric 82B, are adjusted. The width W2 and length L2 of the conductor portion 85B affect the inductance and resistance components of the pre-matching circuit 80B. The width S2 and thickness T2 of the dielectric 82B affect the capacitance component of the pre-matching circuit 80B. While the pre-matching circuit 80B shown in FIG. 8B has been described here, the same applies to the pre-matching circuit 90B shown in FIG. 8C.

[0091] In the semiconductor device 1B, the conductor portion 85B of the pre-matching circuit 80B is formed by a via 81B and a wiring 84B, and the conductor portion 95B of the pre-matching circuit 90B is formed by a via 91B and a wiring 94B. Therefore, the length L2 of the conductor portion 85B and the conductor portion 95B, which affect the inductance and resistance components of the pre-matching circuit 80B and the pre-matching circuit 90B, can be set to the thickness of the substrate 10 (the distance between the surface 10a and the surface 10b) or longer. Therefore, in the semiconductor device 1B, it is possible to widen the adjustment range of the inductance and resistance components.

[0092] In the pre-matching circuits 80B and 90B, the capacitance, inductance, and resistance components are adjusted by selecting the materials for the conductor portion 85B and the dielectric portion 82B and the conductor portion 95B and the dielectric portion 92B and adjusting their dimensions. By adjusting the capacitance, inductance, and resistance components in this manner, good impedance matching is achieved by the pre-matching circuits 80B and 90B.

[0093] Although the example shown here is one in which both the pre-matching circuit 80B and the pre-matching circuit 90B are provided in the semiconductor device 1B, the semiconductor device 1B may be configured to be provided with either the pre-matching circuit 80B or the pre-matching circuit 90B. Even in such a configuration, impedance matching is performed on the drain electrode 60 side, which serves as the output, or the gate electrode 40 side, which serves as the input, thereby achieving a high-performance, compact semiconductor device 1B.

[0094] In addition, the semiconductor device 1B may be provided with a pre-match circuit including multiple pairs of a conductor portion 85B and a dielectric 82B, or a pre-match circuit including multiple pairs of a conductor portion 95B and a dielectric 92B.

[0095] Next, a method for manufacturing the semiconductor device 1B having the above-described configuration will be described. 9 to 11 are diagrams illustrating an example of a method for manufacturing a semiconductor device according to the second embodiment. Figures 9(A) to 9(D), 10(A) to 10(D), and 11(A) to 11(D) each show a schematic cross-sectional view of a main part of an example of a manufacturing process of a semiconductor device. For convenience, the example of the manufacturing method of the semiconductor device will be described, focusing mainly on the region on the drain electrode side where the pre-matching circuit is provided.

[0096] First, a substrate 10 including a HEMT is prepared as a transistor element. That is, an electron transit layer 12, an electron supply layer 13, and the like are formed on an underlayer 11 using a method such as MOCVD, thereby obtaining the substrate 10. A gate electrode 40, a source electrode 50, a drain electrode 60, and the like are formed on a surface 10a of the obtained substrate 10 facing the electron supply layer 13, thereby preparing the substrate 10 including a HEMT.

[0097] 9(A), after the substrate 10 is prepared, a resist 160 having an opening 160a in a region corresponding to the drain electrode 60 (the drain pad portion 62) on the opposite surface 10a is formed on the surface 10b of the prepared substrate 10. The opening 160a in the resist 160 is formed in a region where the conductor portion 85B and the dielectric portion 82B are to be provided, as will be described later.

[0098] After the resist 160 is formed, as shown in FIG. 9(B), the substrate 10 is etched from the surface 10b side using the resist 160 as a mask. The etching of the substrate 10 is performed by dry etching using, for example, a fluorine-based gas or a chlorine-based gas depending on the configuration of the substrate 10. By etching the substrate 10 using the resist 160 as a mask, a recess 10e of a certain depth is formed from the surface 10b. The depth of the recess 10e is set based on the dimensions of the wiring 84B of the conductor portion 85B, which will be provided as described below. After the recess 10e is formed, the resist 160 is removed.

[0099] After the recess 10e is formed and the resist 160 is removed, a resist 161 having an opening 161a is formed in a region corresponding to a part of the recess 10e, as shown in Fig. 9(C) . The opening 161a of the resist 161 is formed in a region where the via 81B of the conductor portion 85B is to be provided, as will be described later.

[0100] After the resist 161 is formed, as shown in FIG. 9(D), the substrate 10 is etched using the resist 161 as a mask. The etching of the substrate 10 is performed by dry etching using, for example, a fluorine-based gas or a chlorine-based gas, depending on the configuration of the substrate 10. By etching the substrate 10 using the resist 161 as a mask, a recess 10f is formed, which communicates with the recess 10e and leads to the drain pad portion 62 of the drain electrode 60. The recess 10e and the recess 10f form a through-hole 10g that penetrates the substrate 10 from the surface 10b to the surface 10a and leads to the drain pad portion 62. An etching stopper made of Ni or the like may be provided on the surface of the drain pad portion 62 facing the surface 10a of the substrate 10 to prevent the drain pad portion 62 from being exposed to etching during the formation of the through-hole 10g. After the through-hole 10g is formed, the resist 161 is removed.

[0101] After the through hole 10g is formed and the resist 161 is removed, a seed layer 85B1 containing a metal such as Au is formed on the surface 10b of the substrate 10 and the inner surface (inner wall surface and bottom surface) of the through hole 10g using a method such as sputtering, as shown in Fig. 10(A). Furthermore, after the seed layer 85B1 is formed, a resist 162 is formed so as to cover a portion of the seed layer 85B1 inside the through hole 10g (a portion of the inner wall surface and the bottom surface), as shown in Fig. 10(A). The resist 162 is formed in a region where the conductor portion 85B is to be provided, as described below.

[0102] After the seed layer 85B1 and the resist 162 are formed, the seed layer 85B1 exposed from the resist 162 is removed by etching using the resist 162 as a mask. That is, the seed layer 85B1 formed on the surface 10b of the substrate 10 and part of the inner surface of the through hole 10g is removed. The etching of the seed layer 85B1 is performed by wet etching or dry etching. After the seed layer 85B1 is partially removed, the resist 162 is removed. This results in the state shown in FIG. 10(B), i.e., the seed layer 85B1 remaining on part of the inner wall surface and bottom surface of the through hole 10g.

[0103] After the seed layer 85B1 is partially removed and the resist 162 is removed, a buried layer 85B2 containing a metal such as Au is formed as shown in FIG. 10(C). For example, the buried layer 85B2 is formed on the seed layer 85B1 remaining in the through hole 10g of the substrate 10 using a plating method or the like. The seed layer 85B1 and the buried layer 85B2 thus formed form the conductor portion 85B. Of the conductor portion 85B, the portion formed in the recess 10f of the substrate 10 corresponds to the via 81B, and the portion formed in the recess 10e of the substrate 10 corresponds to the wiring 84B. The via 81B is formed to extend from the drain electrode 60 (its drain pad portion 62) into the substrate 10. The wiring 84B is formed to extend from the via 81B in a direction parallel to the surface 10a of the substrate 10.

[0104] After the conductor portion 85B is formed, a dielectric material 82B1 such as SiN is formed as shown in Fig. 10(D) For example, by using a CVD method or the like, the dielectric material 82B1 is formed on the surface 10b side of the substrate 10 so as to fill the depression above the conductor portion 85B in the through-hole 10g.

[0105] After the dielectric material 82B1 is formed, as shown in FIG. 11A, the dielectric material 82B1 formed in other regions is removed, leaving only the dielectric material 82B1 filling the recess on the conductor portion 85B in the through hole 10g. For example, the dielectric material 82B1 is partially removed using a CMP method or a photolithography technique and an etching technique so that the dielectric material 82B1 remains on the conductor portion 85B in the through hole 10g. The dielectric material 82B1 remaining on the conductor portion 85B in the through hole 10g forms the dielectric 82B of the capacitor.

[0106] 11(B), after the dielectric 82B is formed, a back electrode 70 containing a metal such as Au is formed on the surface 10b side of the substrate 10. For example, the back electrode 70 is formed using a sputtering method, a plating method, or the like.

[0107] 11(C), a resist 163 having an opening 163a in a region corresponding to a part of the conductor portion 85B is formed. The opening 163a of the resist 163 is formed in a part (ungrounded part) of the conductor portion 85B that is to be exposed from the dielectric 82B as described below.

[0108] After the resist 163 is formed, the back surface electrode 70 and the dielectric 82B are etched using the resist 163 as a mask, and a portion of the back surface electrode 70 and a portion of the dielectric 82B are removed. The back surface electrode 70 and the dielectric 82B are etched by wet etching or dry etching. After the back surface electrode 70 and the dielectric 82B are partially removed, the resist 163 is removed. This forms the pre-matching circuit 80B as shown in FIG. 11(D), i.e., the pre-matching circuit 80B having a structure in which a portion of the conductor portion 85B is covered with the dielectric 82B, and the dielectric 82B is covered with the back surface electrode 70.

[0109] For example, the semiconductor device 1B including the pre-matching circuit 80B is manufactured by the above steps. Note that the manufacturing method of the semiconductor device 1B is not limited to the above example. 9(A) to 9(D), 10(A) to 10(D), and 11(A) to 11(D) show an example of the formation of the pre-matching circuit 80B provided on the drain electrode 60 side, but this example can also be used to form the pre-matching circuit 90B provided on the gate electrode 40 side. In this case, the formation of the pre-matching circuit 80B on the drain electrode 60 side and the formation of the pre-matching circuit 90B on the gate electrode 40 side may be performed simultaneously in parallel.

[0110] Furthermore, following the example of manufacturing the semiconductor device 1B, it is also possible to form a semiconductor device including a pre-matching circuit including multiple pairs of a conductor portion 85B and a dielectric portion 82B, or a pre-matching circuit including multiple pairs of a conductor portion 95B and a dielectric portion 92B. Such a semiconductor device can be similarly manufactured by following the above example and appropriately changing the number of through holes 10g formed in the substrate 10, etc.

[0111] In the second embodiment, the surface 10a of the substrate 10 is also referred to as the "first surface," and the surface 10b is also referred to as the "second surface." The drain electrode 60 or the gate electrode 40, or the drain pad portion 62 of the drain electrode 60 or the gate pad portion 42 of the gate electrode 40 is also referred to as the "first electrode." The back electrode 70 is also referred to as the "second electrode."

[0112] Here, the semiconductor device 1B including a HEMT as a transistor element is taken as an example, but the semiconductor device 1B is not limited to a HEMT and may include various types of transistor elements. The first and second embodiments have been described above.

[0113] The semiconductor devices 1A, 1B, etc. described above can be applied to various electronic devices. As examples, the following describes cases in which a semiconductor device having the above configuration is applied to a semiconductor package, a power factor correction circuit, a power supply device, and an amplifier.

[0114] [Third embodiment] Here, an example of application of a semiconductor device having the above-described configuration to a semiconductor package will be described as a third embodiment.

[0115] Fig. 12 is a diagram illustrating an example of a semiconductor package according to the third embodiment, which diagrammatically shows a plan view of a main part of the example of the semiconductor package. 12 is an example of a discrete package. The semiconductor package 200 includes, as an example, the semiconductor device 1A (FIG. 3) described in the first embodiment, a lead frame 210 on which the semiconductor device 1A is mounted, and a resin 220 that seals them.

[0116] The semiconductor device 1A is mounted on a die pad 210a of a lead frame 210 using, for example, a die attach material or the like (not shown). The semiconductor device 1A is provided with a pad 40a connected to the gate electrode 40, a pad 50a connected to the source electrode 50, and a pad 60a connected to the drain electrode 60. The pads 40a, 50a, and 60a are connected to a gate lead 211, a source lead 212, and a drain lead 213 of the lead frame 210, respectively, using wires 230 made of Au, Al, or the like. The lead frame 210, the semiconductor device 1A mounted thereon, and the wires 230 connecting them are sealed with resin 220 so that portions of the gate lead 211, the source lead 212, and the drain lead 213 are exposed.

[0117] An external connection electrode connected to the source electrode 50 may be provided on the surface of the semiconductor device 1A opposite to the surface on which the pad 40a connected to the gate electrode 40 and the pad 60a connected to the drain electrode 60 are provided. The external connection electrode may be connected to the die pad 210a connected to the source lead 212 using a conductive bonding material such as solder.

[0118] For example, a semiconductor package 200 is obtained using the semiconductor device 1A described in the first embodiment. As described above, the semiconductor device 1A employs a configuration in which a pre-matching circuit is formed using a conductor and a dielectric provided in the substrate directly below the input or output electrode. This realizes a high-performance, compact semiconductor device 1A capable of impedance matching. The semiconductor package 200 is realized using such a semiconductor device 1A.

[0119] Although the semiconductor device 1A is used as an example here, it is possible to obtain a semiconductor package in the same manner using other semiconductor devices such as the semiconductor device 1B. [Fourth embodiment] Here, an example of application of a semiconductor device having the above-described configuration to a power factor correction circuit will be described as a fourth embodiment.

[0120] Fig. 13 is a diagram illustrating an example of a power factor correction circuit according to the fourth embodiment, showing an equivalent circuit diagram of the example of the power factor correction circuit. The power factor correction (PFC) circuit 300 shown in FIG. 13 includes a switch element 310, a diode 320, a choke coil 330, a capacitor 340, a capacitor 350, a diode bridge 360, and an AC power supply 370 (AC).

[0121] In the PFC circuit 300, a drain electrode of a switch element 310 is connected to an anode terminal of a diode 320 and one terminal of a choke coil 330. A source electrode of the switch element 310 is connected to one terminal of a capacitor 340 and one terminal of a capacitor 350. The other terminal of the capacitor 340 is connected to the other terminal of the choke coil 330. The other terminal of the capacitor 350 is connected to the cathode terminal of the diode 320. A gate driver is connected to the gate electrode of the switch element 310. An AC power supply 370 is connected between both terminals of the capacitor 340 via a diode bridge 360, and a DC power supply (DC) is taken out between both terminals of the capacitor 350.

[0122] For example, the semiconductor device 1A, 1B, etc. described above is used as the switch element 310 of a PFC circuit 300 having such a configuration. As described above, the semiconductor device 1A, 1B, etc. employs a configuration in which a pre-matching circuit is formed using a conductor portion and a dielectric provided in a substrate directly below an electrode serving as an input or output. This realizes a high-performance, compact semiconductor device 1A, 1B, etc. capable of impedance matching. The PFC circuit 300 is realized using such a semiconductor device 1A, 1B, etc.

[0123] [Fifth embodiment] Here, an example in which a semiconductor device having the above-described configuration is applied to a power supply device will be described as a fifth embodiment.

[0124] Fig. 14 is a diagram illustrating an example of a power supply device according to the fifth embodiment, showing an equivalent circuit diagram of the example of the power supply device. The power supply device 400 shown in FIG. 14 includes a primary side circuit 410, a secondary side circuit 420, and a transformer 430 provided between the primary side circuit 410 and the secondary side circuit 420.

[0125] The primary side circuit 410 includes the PFC circuit 300 as described in the fourth embodiment, and an inverter circuit, for example, a full-bridge inverter circuit 440, connected between both terminals of the capacitor 350 of the PFC circuit 300. The full-bridge inverter circuit 440 includes a plurality of (for example, four in this case): a switch element 441, a switch element 442, a switch element 443, and a switch element 444.

[0126] The secondary side circuit 420 includes a plurality of switch elements, three of which are a switch element 421, a switch element 422, and a switch element 423, as an example. For example, the semiconductor devices 1A, 1B, etc. are used for the switch element 310 of the PFC circuit 300 and the switch elements 441-444 of the full-bridge inverter circuit 440 included in the primary-side circuit 410 of a power supply device 400 having such a configuration. For example, ordinary MIS (Metal Insulator Semiconductor) field-effect transistors using Si are used for the switch elements 421-423 of the secondary-side circuit 420 of the power supply device 400. As described above, the semiconductor devices 1A, 1B, etc. employ a configuration in which a pre-matching circuit is formed using a conductor and a dielectric provided in a substrate directly below an input or output electrode. This realizes high-performance, compact semiconductor devices 1A, 1B, etc. capable of impedance matching. The power supply device 400 is realized using such semiconductor devices 1A, 1B, etc.

[0127] [Sixth embodiment] Here, an example of application of the semiconductor device having the above-described configuration to an amplifier will be described as a sixth embodiment.

[0128] Fig. 15 is a diagram illustrating an example of an amplifier according to the sixth embodiment, showing an equivalent circuit diagram of the example amplifier. The amplifier 500 shown in FIG. 15 includes a digital predistortion circuit 510, a mixer 520, a mixer 530, and a power amplifier 540.

[0129] The digital predistortion circuit 510 compensates for nonlinear distortion in the input signal. The mixer 520 mixes the input signal SI, for which nonlinear distortion has been compensated, with an AC signal. The power amplifier 540 amplifies the signal resulting from mixing the input signal SI with the AC signal. In the amplifier 500, for example, by switching a switch, the output signal SO can be mixed with the AC signal in the mixer 530 and sent to the digital predistortion circuit 510. The amplifier 500 can be used as a high-frequency amplifier or a high-power amplifier.

[0130] The semiconductor device 1A, 1B, etc. described above is used in the power amplifier 540 of the amplifier 500 having such a configuration. As described above, the semiconductor device 1A, 1B, etc. employs a configuration in which a pre-matching circuit is formed using a conductor portion and a dielectric provided in a substrate directly below an electrode serving as an input or output. This realizes a high-performance, compact semiconductor device 1A, 1B, etc. capable of impedance matching. The amplifier 500 is realized using such a semiconductor device 1A, 1B, etc.

[0131] Various electronic devices to which the semiconductor devices 1A, 1B, etc. are applied (such as the semiconductor package 200, PFC circuit 300, power supply device 400, and amplifier 500 described in the third to sixth embodiments) can be mounted in various electronic devices or electronic devices, such as computers (personal computers, supercomputers, servers, etc.), smartphones, mobile phones, tablet terminals, sensors, cameras, audio equipment, measuring devices, inspection devices, manufacturing equipment, transmitters, receivers, and radar devices.

[0132] The following additional notes are provided regarding the above-described embodiment. (Appendix 1) A substrate, a first electrode provided on a first surface side of the substrate; a conductor portion provided in the substrate and connected to the first electrode; a dielectric provided in the substrate and on the opposite side of the conductor portion from the first electrode; 10. A semiconductor device comprising:

[0133] (Note 2) A second electrode is provided on a second surface of the substrate opposite to the first surface, the second electrode is separated from the conductor portion, 2. The semiconductor device according to claim 1, wherein the dielectric is provided between the second electrode and the conductor portion.

[0134] (Supplementary Note 3) The semiconductor device according to Supplementary Note 1, wherein the dielectric is provided on a part of the conductor portion on an opposite side to the first electrode side. (Supplementary Note 4) The semiconductor device according to Supplementary Note 1, wherein the conductor portion is a via extending from the first electrode into the substrate.

[0135] (Supplementary Note 5) The conductor portion is a via extending from the first electrode into the substrate; a wiring connected to the via and extending within the substrate in a direction parallel to the first surface; 2. The semiconductor device of claim 1, comprising:

[0136] (Supplementary Note 6) The semiconductor device according to Supplementary Note 1, wherein the first electrode is a drain electrode of a transistor element provided on the substrate. (Supplementary Note 7) The semiconductor device according to Supplementary Note 1, wherein the first electrode is a gate electrode of a transistor element provided on the substrate.

[0137] (Supplementary Note 8) A step of forming a first electrode on a first surface side of the substrate; forming a conductor portion in the substrate, the conductor portion being connected to the first electrode; forming a dielectric material in the substrate, the dielectric material being provided on a side of the conductor portion opposite to the first electrode; A method for manufacturing a semiconductor device, comprising:

[0138] (Supplementary Note 9) A step of forming a second electrode on a second surface side of the substrate opposite to the first surface side, 9. The method for manufacturing a semiconductor device according to claim 8, wherein the step of forming the second electrode includes a step of forming the second electrode so that the second electrode is separated from the conductor portion and the dielectric is provided between the second electrode and the conductor portion.

[0139] (Supplementary Note 10) The method for manufacturing a semiconductor device according to Supplementary Note 8, wherein the step of forming the dielectric includes the step of forming the dielectric on a part of the conductor portion on an opposite side to the first electrode side.

[0140] (Supplementary Note 11) The method for manufacturing a semiconductor device according to Supplementary Note 8, wherein the step of forming the conductor portion includes the step of forming a via extending from the first electrode into the substrate. (Supplementary Note 12) The step of forming the conductor portion includes: forming a via extending from the first electrode into the substrate; forming a wiring connected to the via and extending within the substrate in a direction parallel to the first surface; 9. A method for manufacturing a semiconductor device according to claim 8, comprising:

[0141] (Supplementary Note 13) The method for manufacturing a semiconductor device according to Supplementary Note 8, wherein the step of forming the first electrode includes the step of forming a drain electrode of a transistor element provided on the substrate. (Supplementary Note 14) The method for manufacturing a semiconductor device according to Supplementary Note 8, wherein the step of forming the first electrode includes the step of forming a gate electrode of a transistor element provided on the substrate.

[0142] (Appendix 15) A substrate; a first electrode provided on a first surface side of the substrate; a conductor portion provided in the substrate and connected to the first electrode; a dielectric provided in the substrate and on the opposite side of the conductor portion from the first electrode; An electronic device comprising a semiconductor device including: [Explanation of symbols]

[0143] 1A, 1Aa, 1Ab, 1B, 1C, 100A, 100B Semiconductor device 10, 110 board 10a, 10b side 10c, 10d, 10g through hole 10e, 10f recess 11 Base layer 12 Electron transit layer 13 Electron supply layer 14 2DEG area 20, 120 Transistor section 30C, 80A, 80Aa, 80Ab, 80B, 90A, 90B, 130 Pre-match circuit 31C, 83A, 83B, 93A, 93B, 131 capacitors 32C, 84B, 94B, 132 wiring 40 gate electrode 41 Gate finger part 42 Gate pad section 50 Source electrode 60 drain electrode 61 Drain finger part 62 Drain pad section 70 Back electrode 81A, 81B, 91A, 91B vias 81A1, 85B1 seed layer 81A2, 85B2 Buried layer 82A, 82B, 92A, 92B Dielectric 82A1, 82B1 Dielectric materials 85B, 95B conductor part 121 Input section 122 Output section 150, 151, 160, 161, 162, 163 Resist 150a, 160a, 161a, 163a opening 200 Semiconductor Packages 210 Lead Frame 210a die pad 211 Gate Lead 212 Source Read 213 Drain Lead 220 Resin 230 Wire 40a, 50a, 60a pads 300 PFC circuit 310, 421, 422, 423, 441, 442, 443, 444 Switch elements 320 Diode 330 Choke Coil 340, 350 capacitors 360 Diode Bridge 370 AC power supply 400 power supply 410 Primary circuit 420 Secondary circuit 430 transformer 440 Full-bridge inverter circuit 500 Amplifier 510 Digital Pre-Distortion Circuit 520, 530 Mixer 540 Power Amplifier L1, L2 length S1, S2, W1, W2 width T1, T2 thickness P0, Q0 center point P1, P2, Q1, Q2 impedance

Claims

1. A substrate; a first electrode provided on a first surface side of the substrate; a conductor portion provided in the substrate and connected to the first electrode; a dielectric provided in the substrate and on the opposite side of the conductor portion from the first electrode; 10. A semiconductor device comprising:

2. a second electrode provided on a second surface side of the substrate opposite to the first surface side, the second electrode is separated from the conductor portion, The semiconductor device according to claim 1 , wherein the dielectric is provided between the second electrode and the conductor portion.

3. The semiconductor device according to claim 1 , wherein the dielectric is provided on a part of the conductor portion on the side opposite to the first electrode side.

4. The semiconductor device according to claim 1 , wherein the conductor portion is a via extending from the first electrode into the substrate.

5. The conductor portion is a via extending from the first electrode into the substrate; a wiring connected to the via and extending within the substrate in a direction parallel to the first surface; The semiconductor device according to claim 1 , comprising:

6. 2. The semiconductor device according to claim 1, wherein said first electrode is a drain electrode of a transistor element provided on said substrate.

7. 2. The semiconductor device according to claim 1, wherein said first electrode is a gate electrode of a transistor element provided on said substrate.

8. forming a first electrode on a first surface of the substrate; forming a conductor portion in the substrate, the conductor portion being connected to the first electrode; forming a dielectric material in the substrate, the dielectric material being provided on a side of the conductor portion opposite to the first electrode; A method for manufacturing a semiconductor device, comprising:

9. A substrate; a first electrode provided on a first surface side of the substrate; a conductor portion provided in the substrate and connected to the first electrode; a dielectric provided in the substrate and on the opposite side of the conductor portion from the first electrode; An electronic device comprising a semiconductor device including:

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