High voltage driving using top plane switching with zero voltage frames between driving frames

Abstract

To provide favorable high voltage driving using top plane switching with zero voltage frames between driving frames.SOLUTION: There are provided improved methods for driving an active matrix of pixel electrodes controlled with thin film transistors (TFT) when the voltage on a top electrode is being altered between driving frames. The methods described increase performance by providing smaller swings in the overall voltage between the top electrode and pixel electrode while reducing stress on the TFT. The performance shortcomings and risks of damaging the TFT or pixel electrode can be alleviated by inserting "rest" or "zero" frames between top plane switches. As the top plane voltage changes, it is possible to prevent large voltage spikes on a yet un-scanned pixels.SELECTED DRAWING: Figure 7

Description

[Background technology]

[0001] (Related Applications) This application claims priority to U.S. Provisional Patent Application No. 63 / 292,440, filed December 22, 2021, and U.S. Provisional Patent Application No. 63 / 422,884, filed November 4, 2022. All patents and publications disclosed herein are incorporated by reference in their entirety.

[0002] Electrophoretic displays (EPDs) change color by modifying the position of electrically charged colored particles relative to a light-transmitting viewing surface. Such electrophoretic displays are typically referred to as "electronic paper" or "e-paper" because the resulting display has high contrast and is sunlight-readable, much like ink on paper. Electrophoretic displays have enjoyed widespread adoption in e-readers, such as the AMAZON KINDLE®, because they offer a book-like reading experience, use low power, and allow users to carry libraries of hundreds of books in a lightweight, portable device.

[0003] For many years, electrophoretic displays have included only two types of charged color particles: black and white (for clarity, "color," as used herein, includes black and white). White particles are often light-scattering and include, for example, titanium dioxide, while black particles are absorbing across the visible spectrum and may include carbon black or absorbing metal oxides such as copper chromite. In the simplest sense, a black and white electrophoretic display requires only a light-transmitting electrode at the viewing surface, a back electrode, and an electrophoretic medium containing oppositely charged white and black particles. When a voltage of one polarity is applied, the white particles migrate to the viewing surface, and when a voltage of the opposite polarity is applied, the black particles migrate to the viewing surface. If the back electrode contains controllable regions (pixels), either segmented electrodes or an active matrix of pixel electrodes controlled by transistors, a pattern can be made to appear electronically at the viewing surface. This pattern could be, for example, the text of a book.

[0004] More recently, a variety of color options have become commercially available for electrophoretic displays, including three-color displays (black, white, red, and black, white, yellow) and four-color displays (black, white, red, yellow). Similar to the operation of black and white electrophoretic displays, electrophoretic displays with three or four reflective pigments operate similarly to simple black and white displays, since the desired color particles are driven relative to the viewing surface. While this driving scheme is much more complex than just black and white, ultimately, the optical function of the particles is the same.

[0005] Advanced Color Electronic Paper (ACeP®) also contains four particles, but the cyan, yellow, and magenta particles are subtractive rather than reflective, thereby allowing thousands of colors to be produced at each pixel. This color process is functionally equivalent to the printing method long used in offset and inkjet printers. A given color is produced by using the correct ratios of cyan, yellow, and magenta particles on a bright white paper background. In the case of ACeP, the relative positions of the cyan, yellow, magenta, and white particles with respect to the viewing surface will determine the color at each pixel. This type of electrophoretic display allows for thousands of colors at each pixel, but careful control of the position of each pigment (50 to 500 nanometers in size) within a working space approximately 10 to 20 microns thick is crucial. Obviously, variations in pigment position will result in the wrong color being displayed at a given pixel. Therefore, precise voltage control is required for such systems. Further details of this system are available in the following U.S. patents: U.S. Patent Nos. 9,361,836, 9,921,451, 10,276,109, 10,353,266, 10,467,984, and 10,593,272, all of which are incorporated by reference in their entirety.

[0006] The present invention relates to color electrophoretic displays, particularly, but not exclusively, to electrophoretic displays capable of rendering more than two colors using a single layer of electrophoretic material comprising a plurality of colored particles, e.g., white, cyan, yellow, and magenta particles. In some cases, two of the particles will be positively charged and two will be negatively charged. In some cases, one positively charged particle will have a thick polymer shell and one negatively charged particle will have a thick polymer shell.

[0007] As explained in U.S. Patent No. 9,921,451, particularly with respect to Table 3 of the '451 patent, improved color discrimination can be achieved with a "standard" active matrix backplane (i.e., comprising an array of thin film transistors (TFTs) using amorphous silicon) by using so-called "top-plane switching," in which the bias on the top electrode is altered during drive to achieve a larger voltage drop between the top electrode and the backplane. For example, to achieve a good magenta color state, it may be necessary to apply a voltage of +15 V to the top electrode and -15 V to the pixel electrode of the desired active matrix pixel, such that the electrophoretic medium experiences an overall voltage drop of +30 V (see Figure 6A of the '451 patent). Later, when it is desired to produce, for example, a good yellow state, it may be necessary to apply a voltage of −15 V to the top electrode and +15 V to the pixel electrode of the desired active matrix pixel, so that the electrophoretic medium experiences an overall voltage drop of −30 V (see Figure 6C of the '451 patent). As explained in further detail in the '451 patent, top-plane switching can be used to address the electrophoretic medium and to erase the previous optical state and DC-balance the waveform.

[0008] TFT-based thin-film electronics can be used to control the addressing of pixel electrodes for high-resolution displays such as LCDs and EPDs. Driver circuits can be integrated directly into the AM-TFT substrate, making TFT-based electronics highly suitable for controlling pixel electrode voltages for EPD applications. TFTs can be fabricated using a wide variety of semiconductor materials. A common material is silicon. The properties of silicon-based TFTs depend on the crystalline state of the silicon; that is, the semiconductor layer can be amorphous silicon (a-Si), microcrystalline silicon, or annealed into low-temperature polysilicon (LTPS). a-Si-based TFTs are inexpensive to produce, and therefore relatively large substrate areas can be fabricated at relatively low cost. One negative aspect of a-Si-based TFTs is that the bias across the TFT is typically limited to less than 45 V. Above 45 V, the transistor can fail or have a "breakthrough," during which excessive current travels through the transistor, for example, charging the pixel electrode beyond a desired level. More exotic materials such as metal oxides can also be used to fabricate thin film transistor arrays to achieve higher voltages, but the fabrication costs of such devices are typically high due to the specialized equipment required to manipulate / deposit the metal oxides.

[0009] For active matrix devices, drive signals are often output from a controller to gate and scan drivers, which in turn provide the current-voltage inputs required to activate the various TFTs in the active matrix. However, controller drivers are commercially available that are capable of receiving, for example, image data and outputting the current-voltage inputs needed to activate the TFTs. Most active matrices of thin film transistors are driven using line-by-line (also known as line-by-line) addressing, which is used in the vast majority of LCD and EPD displays. In such systems, one or more controllers are used to deliver voltages to a series of scan lines and a series of gate lines, which are often arranged vertically in a grid across the backplane. Another controller, or the same controller, also controls the voltages to the top electrodes and a common voltage (V), which is typically provided to a reservoir capacitor associated with a given pixel electrode. com ) will be provided.

[0010] The term "gray state" is used herein in its conventional sense in the imaging arts to refer to a state intermediate between two extreme pixel optical states and does not necessarily imply a black-to-white transition between these two extreme states. For example, some of the E Ink patents and published applications referenced below describe electrophoretic displays in which the extreme states are white and dark blue, such that an intermediate gray state would actually be light blue. In fact, as already mentioned, a change in optical state may not be a change in color at all. The terms "black and white" may hereinafter be used herein to refer to the two extreme optical states of a display and should be understood to include extreme optical states that are not typically strictly black and white, such as the white and dark blue states discussed above.

[0011] The terms "bistable" and "bistable" are used herein in their conventional sense in the art to refer to a display having display elements with first and second display states that differ in at least one optical property, where any given element is driven with a finite-duration addressing pulse to assume either its first or second display state, and where that state will persist after the addressing pulse has terminated for at least several times, e.g., at least four times, the minimum duration of the addressing pulse required to change the state of the display element. U.S. Pat. No. 7,170,670 shows that some particle-based electrophoretic displays capable of grayscale are stable not only in their extreme black and white states but also in their intermediate gray states, and the same is true for several other types of electro-optic displays. Displays of this type are properly referred to as "multistable" rather than "bistable," although for convenience the term "bistable" may be used herein to encompass both bistable and multistable displays.

[0012] The term "impulse", when used to refer to driving an electrophoretic display, is used herein to refer to the integral of the applied voltage with respect to time during the period that the display is driven.

[0013] A "gate driver" is a power amplifier that receives a low-power input from a controller, e.g., a microcontroller integrated circuit (IC), and produces a high-current drive input for the gate of a high-power transistor, such as a TFT, that is coupled to a pixel electrode. A "source driver" is a power amplifier that produces a high-current drive input for the source of a high-power transistor. A "top-plane common electrode driver" or "top-plane driver" or "upper electrode driver" is a power amplifier that produces a high-current drive input for the top-plane electrode of a display.

[0014] A "waveform" refers to the entire voltage versus time curve used to actuate pixels in a microfluidic device. Typically, such waveforms comprise multiple waveform elements, which are generally rectangular (i.e., a given element comprises the application of a constant voltage over a period of time). An element may be referred to as a "voltage pulse" or "drive pulse." The term "drive scheme" refers to a set of waveforms sufficient to affect the operation of one or more droplets over the course of a particular droplet operation. The term "frame" refers to a single update of all pixel rows in a microfluidic device.

[0015] Particles that absorb, scatter, or reflect light, either broadly or at selected wavelengths, are referred to herein as colored or pigment particles. A variety of materials other than pigments (in the strict sense of that term, as meant to mean insoluble colored materials), that absorb or reflect light, such as dyes or photonic crystals, may also be used in the electrophoretic media and displays of the present invention.

[0016] Particle-based electrophoretic displays have been the subject of intense research and development for many years. In such displays, a plurality of charged particles (sometimes referred to as pigment particles) move through a fluid under the influence of an electric field. Electrophoretic displays can have attributes of good brightness and contrast, wide viewing angles, state bistability, and low power consumption when compared to liquid crystal displays. Nevertheless, problems with the long-term image quality of these displays have prevented their widespread use. For example, the particles that make up electrophoretic displays tend to settle, resulting in a poor service life for these displays.

[0017] As mentioned above, electrophoretic media require the presence of a fluid. In most prior art electrophoretic media, this fluid is liquid, but electrophoretic media can also be produced using gaseous fluids. See, for example, Kitamura, T., et al., Electrical toner movement for electronic paper-like display, IDW Japan, 2001, Paper HCS1-1, and Yamaguchi, Y., et al., Toner display using insulative particles charged triboelectrically, IDW Japan, 2001, Paper AMD4-4. See also U.S. Patent Nos. 7,321,459 and 7,236,291. Such gas-based electrophoretic media are believed to be susceptible to the same types of problems as liquid-based electrophoretic media, due to particle settling, when the media is used in an orientation that allows such settling, such as in a sign placed on a vertical surface. In fact, particle settling is believed to be a more serious problem in gas-based electrophoretic media than in liquid-based ones, as the lower viscosity of gaseous suspending fluids allows for faster settling of electrophoretic particles compared to liquid ones.

[0018] Numerous patents and applications assigned to or in the name of the Massachusetts Institute of Technology (MIT) and E Ink Corporation describe various techniques used in encapsulated electrophoretic and other electro-optic media. Such encapsulated media comprise a multitude of small capsules, each of which comprises an internal phase containing electrophoretically mobile particles in a fluid medium and a capsule wall surrounding the internal phase. Typically, the capsules are themselves held within a polymer binder, forming a coherent layer positioned between two electrodes. Techniques described in these patents and applications include: (a) Electrophoretic particles, fluids, and fluid additives (see, e.g., U.S. Pat. Nos. 7,002,728 and 7,679,814) (b) Capsules, binders, and encapsulation processes (see, e.g., U.S. Patent Nos. 6,922,276 and 7,411,719) (c) Microcell structures, wall materials, and methods of forming the microcells (see, e.g., U.S. Patent Nos. 7,072,095 and 9,279,906) (d) Methods for filling and sealing microcells (see, e.g., U.S. Patent Nos. 7,144,942 and 7,715,088) (e) Films and subassemblies containing electro-optical materials (see, e.g., U.S. Patent Nos. 6,982,178 and 7,839,564) (f) Backplanes, adhesive layers, and other auxiliary layers and methods used in displays (see, e.g., U.S. Pat. Nos. 7,116,318 and 7,535,624) (g) Color formation and color regulation [ka] (h) A method for driving a display [ka] (These patents and applications may hereinafter be referred to as the MEDEOD (Method for Driving an Electro-Optic Display) Applications) (i) Display applications (see, e.g., U.S. Patent Nos. 7,312,784 and 8,009,348) (j) Non-electrophoretic displays (see, e.g., U.S. Pat. No. 6,241,921, and U.S. Patent Application Publication Nos. 2015 / 0277160, and U.S. Patent Application Publication Nos. 2015 / 0005720 and 2016 / 0012710)

[0019] Many of the aforementioned patents and applications recognize that the walls surrounding discrete microcapsules in an encapsulated electrophoretic medium may be replaced with a continuous phase, thus producing so-called "polymer-dispersed electrophoretic displays" in which the electrophoretic medium comprises a plurality of discrete droplets of electrophoretic fluid and a continuous phase of polymer material; the discrete droplets of electrophoretic fluid in such polymer-dispersed electrophoretic displays may be considered capsules or microcapsules, even though no discrete capsule membrane is associated with each individual droplet. See, e.g., U.S. Pat. No. 6,866,760. Therefore, for purposes of this application, such polymer-dispersed electrophoretic media are considered a subspecies of encapsulated electrophoretic media.

[0020] A related type of electrophoretic display is the so-called "microcell electrophoretic display." In a microcell electrophoretic display, the charged particles and fluid are not encapsulated in microcapsules, but instead are held within a plurality of cavities formed in a propagation medium, typically a polymer film. See, e.g., U.S. Patent Nos. 6,672,921 and 6,788,449.

[0021] Although electrophoretic media are often opaque (e.g., because in many electrophoretic media the particles substantially block the transmission of visible light through the display) and operate in a reflective mode, many electrophoretic displays can be made to operate in a so-called "shutter mode," in which one display state is substantially opaque and one is light transmissive. See, e.g., U.S. Patent Nos. 5,872,552, 6,130,774, 6,144,361, 6,172,798, 6,271,823, 6,225,971, and 6,184,856. Dielectrophoretic displays are similar to electrophoretic displays but rely on variations in electric field strength and can operate in a similar mode. See U.S. Patent No. 4,418,346. Other types of electro-optic displays may also be capable of operating in a shutter mode. Electro-optic media operating in shutter mode can be used in multilayer structures for full color displays, where at least one layer adjacent to the viewing surface of the display operates in shutter mode to reveal or obscure a second layer further from the viewing surface.

[0022] Encapsulated electrophoretic displays typically do not suffer from the clustering and settling failure modes of conventional electrophoretic devices and offer additional advantages, such as the ability to print or coat the display on a wide variety of flexible and rigid substrates. (The use of the term "printing" is intended to include all forms of printing and coating, including, but not limited to, pre-metered coating, e.g., patch die coating, slot or extrusion coating, slide or cascade coating, curtain coating, etc., roll coating, e.g., knife-over-roll coating, forward-reverse roll coating, gravure coating, dip coating, spray coating, meniscus coating, spin coating, brush coating, air knife coating, silk screen printing processes, electrostatic printing processes, thermal printing processes, inkjet printing processes, electrophoretic deposition (see U.S. Pat. No. 7,339,715), and other similar techniques.) Thus, the resulting display can be flexible. Furthermore, because the display medium can be printed (using a variety of methods), the display itself can be inexpensively produced.

[0023] As noted above, the simplest prior art electrophoretic media essentially display only two colors. Such electrophoretic media use either a single type of electrophoretic particles having a first color in a colored fluid having a second, different color (where the first color is displayed when the particles are adjacent to the viewing surface of the display and the second color is displayed when the particles are spaced from the viewing surface), or first and second types of electrophoretic particles having different first and second colors in a non-colored fluid (where the first color is displayed when the first type of particles are adjacent to the viewing surface of the display and the second color is displayed when the second type of particles are adjacent to the viewing surface). Typically, the two colors are black and white. If a full-color display is desired, a color filter array may be deposited across the viewing surface of a monochrome (black and white) display. Displays with color filter arrays rely on area sharing and color blending to generate color stimuli. The available display area is shared among three or four primary colors, such as red / green / blue (RGB) or red / green / blue / white (RGBW), and the filters can be arranged in a one-dimensional (striped) or two-dimensional (2x2) repeating pattern. Other alternative primary colors or more than three primary colors are also known in the art. The three (for RGB displays) or four (for RGBW displays) subpixels are chosen to be small enough that, at the intended viewing distance, they visually blend together into a single pixel with a uniform color stimulus ("color blending"). An inherent disadvantage of area sharing is that the colorants are always present, and the color can only be modulated by switching corresponding pixels of the underlying monochrome display to white or black (switching the corresponding primary colors on or off). For example, in an ideal RGBW display, the red, green, blue, and white primaries each occupy one-quarter of the display area (one subpixel out of four), and the white subpixel is as bright as the white of the underlying monochrome display, but each colored subpixel is no brighter than one-third of the white of the monochrome display.The brightness of white shown by the display as a whole cannot exceed half the brightness of the white subpixel (the white area of ​​the display is produced by displaying one white subpixel out of every four plus each colored subpixel in its colored form equal to one-third of the white subpixel; thus, three colored subpixels combined contribute no more than one white subpixel). Color brightness and saturation are reduced by area sharing with color pixels switched to black. Area sharing is particularly problematic when mixing yellow, because it is brighter than any other color of equal brightness, and saturated yellow is nearly as bright as white. Switching a blue pixel (one-quarter of the display area) to black causes the yellow to darken significantly. [Prior art documents] [Patent documents]

[0024] [Patent Document 1] U.S. Patent No. 9,361,836 [Patent Document 2] U.S. Patent No. 9,921,451 Summary of the Invention [Means for solving the problem]

[0025] Disclosed herein are improved methods for driving full-color electrophoretic displays and full-color electrophoretic displays using these driving methods. In one aspect, a method is disclosed for driving an electro-optic display comprising a layer of electro-optic material disposed between a top electrode and a backplane. In the display, the backplane includes an array of pixel electrodes, each coupled to a thin film transistor (TFT) and a storage capacitor. The TFT includes a source, a gate, and a drain, the gate coupled to a gate line, the source coupled to a scan line, and the drain coupled to the pixel electrode, and a controller provides time-dependent voltages to the gate line, the scan line, the top electrode, and the storage capacitor. A first side of the storage capacitor is coupled to the pixel electrode, and a second side of the storage capacitor is coupled to the controller. The driving method includes the steps of: a) providing a first high voltage to the scan line and a first low voltage to the top electrode and the second side of the storage capacitor; b) providing a first gate pulse sufficient to open the TFT; c) after the first gate pulse, providing zero voltage to the scan line, the top electrode, and the second side of the storage capacitor; d) providing a second gate pulse sufficient to open the TFT; e) after the second gate pulse, providing a second low voltage to the scan line and a second high voltage to the top electrode and the storage capacitor; and f) providing a third gate pulse sufficient to open the TFT.

[0026] In one embodiment, steps a)-f) are completed within three subsequent frames. In one embodiment, the top electrode is light-transmitting. In one embodiment, the top electrode and the second side of the storage capacitor are electrically coupled to a common node. In one embodiment, the TFT is fabricated from amorphous silicon. In one embodiment, the first and second high voltages are +15V. In one embodiment, the first and second low voltages are -15V. In one embodiment, the layer of electro-optic material includes an encapsulated electrophoretic medium comprising multiple types of charged particles that migrate between the top electrode and the backplane in response to an applied electric field. In one embodiment, the electrophoretic medium is encapsulated within multiple microcapsules or multiple sealed microcells. In one embodiment, the encapsulated electrophoretic medium comprises four different types of charged particles.

[0027] In another aspect, a method is disclosed for driving an electro-optic display comprising a layer of electro-optic material disposed between a top electrode and a backplane. In the display, the backplane includes an array of pixel electrodes, each coupled to a thin film transistor (TFT) and a storage capacitor. The TFT includes a source, a gate, and a drain, the gate coupled to a gate line, the source coupled to a scan line, and the drain coupled to the pixel electrode, and a controller provides time-dependent voltages to the gate line, the scan line, the top electrode, and the storage capacitor. A first side of the storage capacitor is coupled to the pixel electrode, and a second side of the storage capacitor is coupled to the controller. The driving method includes the steps of: a) providing a first high voltage to the scan line and a first low voltage to the top electrode and the second side of the storage capacitor; b) providing a first gate pulse sufficient to open the TFT; c) after the first gate pulse, providing a second low voltage to the scan line; d) providing a second gate pulse sufficient to open the TFT; e) after the second gate pulse, providing a second high voltage to the top electrode and the second side of the storage capacitor; and f) providing a third gate pulse sufficient to open the TFT.

[0028] In one embodiment, steps a)-f) are completed within three subsequent frames. In one embodiment, the top electrode is light-transmitting. In one embodiment, the top electrode and the second side of the storage capacitor are electrically coupled to a common node. In one embodiment, the TFT is fabricated from amorphous silicon. In one embodiment, the first and second high voltages are +15V. In one embodiment, the first and second low voltages are -15V. In one embodiment, the layer of electro-optic material includes an encapsulated electrophoretic medium comprising multiple types of charged particles that migrate between the top electrode and the backplane in response to an applied electric field. In one embodiment, the electrophoretic medium is encapsulated within multiple microcapsules or multiple sealed microcells. In one embodiment, the encapsulated electrophoretic medium comprises four different types of charged particles.

[0029] In another aspect, a method is disclosed for driving an electro-optic display comprising a layer of electro-optic material disposed between a top electrode and a backplane. In the display, the backplane includes an array of pixel electrodes, each coupled to a thin film transistor (TFT) and a storage capacitor. The TFT includes a source, a gate, and a drain, the gate coupled to a gate line, the source coupled to a scan line, and the drain coupled to the pixel electrode, and a controller provides time-dependent voltages to the gate line, the scan line, the top electrode, and the storage capacitor. A first side of the storage capacitor is coupled to the pixel electrode, and a second side of the storage capacitor is coupled to the controller. The driving method includes the steps of: a) providing a first high voltage to the scan line and a first low voltage to the top electrode and the second side of the storage capacitor; b) providing a first gate pulse sufficient to open the TFT; c) after the first gate pulse, providing a second high voltage to the top electrode and the second side of the storage capacitor; d) providing a second gate pulse sufficient to open the TFT; e) after the second gate pulse, providing a second low voltage to the scan line; and f) providing a third gate pulse sufficient to open the TFT.

[0030] In one embodiment, steps a)-f) are completed within three subsequent frames. In one embodiment, the top electrode is light-transmitting. In one embodiment, the top electrode and the second side of the storage capacitor are electrically coupled to a common node. In one embodiment, the TFT is fabricated from amorphous silicon. In one embodiment, the first and second high voltages are +15V. In one embodiment, the first and second low voltages are -15V. In one embodiment, the layer of electro-optic material includes an encapsulated electrophoretic medium comprising multiple types of charged particles that migrate between the top electrode and the backplane in response to an applied electric field. In one embodiment, the electrophoretic medium is encapsulated within multiple microcapsules or multiple sealed microcells. In one embodiment, the encapsulated electrophoretic medium comprises four different types of charged particles.

[0031] In another aspect, a method for driving an electro-optic display is disclosed, the display including a layer of electro-optic material disposed between a top electrode and a backplane, the backplane including an array of pixel electrodes, each pixel electrode coupled to a thin film transistor (TFT) and a storage capacitor, the TFT including a source, a gate, and a drain, the gate coupled to a gate line, the source coupled to a scan line, and the drain coupled to the pixel electrode, and a controller providing time-dependent voltages to the gate lines, the scan lines, and the top electrode. The electro-optic display is configured to perform the following steps (in order): a) providing a first voltage to the top electrode; b) providing a specific voltage to each electrode of an array of pixel electrodes in a first sequential order, where at least 10 pixels of the array have a specific voltage that is different from a majority of the pixel electrodes; c) providing a specific voltage to each electrode of the array of pixel electrodes in a second sequential order, where the order in which the specific voltages are provided to the pixel electrodes in the second sequential order is reverse to the first sequential order, and where each pixel receives the same specific voltage in both the first sequential order and the second sequential order; and d) providing a second voltage to the top electrode, different from the first voltage. The pixel electrodes do not receive another voltage from the controller between steps (b) and (c). In one embodiment, the TFT is fabricated from amorphous silicon. In one embodiment, the top electrode is light-transmitting. In one embodiment, the first voltage is +15V and the second voltage is −15V. In one embodiment, the first voltage is −15V and the second voltage is +15V. In one embodiment, at least 100 pixels of the array have a particular voltage that is different from the majority of the pixel electrodes. In one embodiment, the layer of electro-optic material includes an encapsulated electrophoretic medium comprising multiple types of charged particles that migrate between the top electrode and the backplane in response to an applied electric field. In one embodiment, the electrophoretic medium is encapsulated within multiple microcapsules or encapsulated within multiple sealed microcells. In one embodiment, the encapsulated electrophoretic medium comprises four different types of charged particles. The present specification also provides, for example, the following: (Item 1) 1. A method for driving an electro-optic display comprising a layer of electro-optic material disposed between a top electrode and a backplane, the backplane comprising an array of pixel electrodes, each pixel electrode coupled to a thin film transistor (TFT) and a storage capacitor, the TFT comprising a source, a gate and a drain, the gate coupled to a gate line, the source coupled to a scan line and the drain coupled to the pixel electrode, a controller providing time-dependent voltages to the gate line, the scan line, the top electrode and the storage capacitor, a first side of the storage capacitor coupled to the pixel electrode and a second side of the storage capacitor coupled to the controller, the driving method comprising (in order): a) providing a first high voltage to the scan line and a first low voltage to the top electrode and a second side of the storage capacitor; b) providing a first gate pulse sufficient to open the TFT; c) after the first gate pulse, providing zero voltage to the scan line, the top electrode, and the second side of the storage capacitor; d) providing a second gate pulse sufficient to open the TFT; e) after the second gate pulse, providing a second low voltage to the scan line and a second high voltage to the top electrode and the second side of the storage capacitor; f) providing a third gate pulse sufficient to open the TFT; A method comprising: (Item 2) 1. A method for driving an electro-optic display comprising a layer of electro-optic material disposed between a top electrode and a backplane, the backplane comprising an array of pixel electrodes, each pixel electrode coupled to a thin film transistor (TFT) and a storage capacitor, the TFT comprising a source, a gate and a drain, the gate coupled to a gate line, the source coupled to a scan line and the drain coupled to the pixel electrode, a controller providing time-dependent voltages to the gate line, the scan line, the top electrode and the storage capacitor, a first side of the storage capacitor coupled to the pixel electrode and a second side of the storage capacitor coupled to the controller, the driving method comprising (in order): a) providing a first high voltage to the scan line and a first low voltage to the top electrode and a second side of the storage capacitor; b) providing a first gate pulse sufficient to open the TFT; c) providing a second low voltage to the scan line after the first gate pulse; d) providing a second gate pulse sufficient to open the TFT; e) after the second gate pulse, providing a second high voltage to the top electrode and a second side of the reservoir capacitor; f) providing a third gate pulse sufficient to open the TFT; A method comprising: (Item 3) 1. A method for driving an electro-optic display comprising a layer of electro-optic material disposed between a top electrode and a backplane, the backplane comprising an array of pixel electrodes, each pixel electrode coupled to a thin film transistor (TFT) and a storage capacitor, the TFT comprising a source, a gate and a drain, the gate coupled to a gate line, the source coupled to a scan line and the drain coupled to the pixel electrode, a controller providing time-dependent voltages to the gate line, the scan line, the top electrode and the storage capacitor, a first side of the storage capacitor coupled to the pixel electrode and a second side of the storage capacitor coupled to the controller, the driving method comprising (in order): a) providing a first high voltage to the scan line and a first low voltage to the top electrode and a second side of the storage capacitor; b) providing a first gate pulse sufficient to open the TFT; c) providing a second high voltage to the top electrode and a second side of the reservoir capacitor after the first gate pulse; d) providing a second gate pulse sufficient to open the TFT; e) providing a second low voltage to the scan line after the second gate pulse; f) providing a third gate pulse sufficient to open the TFT; A method comprising: (Item 4) 4. The method of claim 1, 2, or 3, wherein steps a)-f) are completed within three subsequent frames. (Item 5) 1. A method for driving an electro-optic display comprising a layer of electro-optic material disposed between a top electrode and a backplane, the backplane including an array of pixel electrodes, each pixel electrode coupled to a thin film transistor (TFT) and a storage capacitor, the TFT including a source, a gate, and a drain, the gate coupled to a gate line, the source coupled to a scan line, and the drain coupled to the pixel electrode; The controller performs the following steps: a) providing a first voltage to the upper electrode; b) applying a specific voltage to each electrode of the array of pixel electrodes in a first sequential order, wherein at least 10 pixels of the array have a specific voltage that is different from a majority of the pixel electrodes; c) providing specific voltages to each electrode of the array of pixel electrodes in a second sequential order, wherein the order in which the specific voltages are provided to the pixel electrodes in the second sequential order is reverse to the first sequential order, and each pixel receives the same specific voltage in both the first sequential order and the second sequential order; d) providing a second voltage to the upper electrode, the second voltage being different from the first voltage; the pixel electrode does not receive another voltage from the controller between steps (b) and (c); providing time-dependent voltages to the gate lines, the scan lines, and the upper electrodes to perform (in sequence): (Item 6) Item 6. The method of item 5, wherein at least 100 pixels of the array have a particular voltage that is different from the majority of the pixel electrodes. (Item 7) 7. The method according to any one of items 1-6, wherein the top electrode is optically transparent. (Item 8) 8. The method of any of items 1-7, wherein the top electrode and the second side of the reservoir capacitor are electrically coupled to a common node. (Item 9) 9. The method of any of items 1-8, wherein the TFT is fabricated from amorphous silicon. (Item 10) 10. The method of claim 9, wherein the first and second high voltages are +15V. (Item 11) Item 11. The method of item 10, wherein the first and second low voltages are −15V. (Item 12) 9. The method of any of items 1-8, wherein the layer of electro-optic material includes an encapsulated electrophoretic medium comprising multiple types of charged particles that migrate between the top electrode and the backplane in response to an applied electric field. (Item 13) Item 13. The method of item 12, wherein the electrophoretic medium is encapsulated in a plurality of microcapsules or in a plurality of sealed microcells. (Item 14) Item 14. The method of item 13, wherein the encapsulated electrophoretic medium comprises four different types of charged particles. [Brief explanation of the drawings]

[0032] [Figure 1] FIG. 1 is a schematic cross-sectional view illustrating an embodiment of an encapsulated electrophoretic display suitable for use with the method of the present invention.

[0033] [Figure 2] FIG. 2 is a schematic cross-sectional view illustrating an embodiment of an encapsulated electrophoretic display suitable for use with the method of the present invention.

[0034] [Figure 3] FIG. 3 illustrates an exemplary equivalent circuit of a single pixel of an electrophoretic display.

[0035] [Figure 4]4 is a schematic diagram of an exemplary drive system for controlling the voltages on pixel electrodes in an active matrix device. The resulting voltages can be used to set the optical state of an electro-optic medium.

[0036] [Figure 5] FIG. 5 is a schematic diagram showing the positions of white, cyan, yellow, and magenta particles in an electrophoretic medium when displaying black, white, the subtractive primary colors (yellow, magenta, and cyan), and the additive primary colors (red, blue, and green).

[0037] [Figure 6] FIG. 6 shows an exemplary push-pull drive scheme for addressing an electrophoretic medium containing three subtractive particles and a scattering (white) particle.

[0038] [Figure 7] FIG. 7 illustrates an exemplary equivalent circuit of a single pixel when the reservoir capacitor (Vcom) and the top electrode (Vtop) are tied together (both Vcom).

[0039] [Figure 8A] Figure 8A illustrates the voltage "seen" by the pixel electrode when top-plane switching is used without an intervening zero frame. Note that the time axis for Figure 8A is much shorter than for Figures 10A or 11A.

[0040] [Figure 8B] 8B illustrates the voltages at various points in an exemplary equivalent circuit of three different pixels driven as shown in FIG. 8A. The gate of the top pixel has already been opened and closed while Vcom is at -15V. The gate of the middle pixel is now open while Vcom is at -15V. The gate of the bottom pixel is not yet open while Vcom is at -15V.

[0041] [Figure 8C] FIG. 8C illustrates the voltages at various points in an exemplary equivalent circuit of three different pixels driven as shown in FIG. 8A. The gate of the top pixel has already been opened and closed while Vcom is at +15V. The gate of the middle pixel is now open while Vcom is at +15V. The gate of the bottom pixel has not yet been opened while Vcom is at +15V. Due to the short amount of time since the bottom pixel's gate was opened, the voltage "seen" by the pixel electrode in the bottom pixel is actually quite high, approximately 45V.

[0042] [Figure 8D] FIG. 8D illustrates the voltages at various points in an example equivalent circuit of three different pixels after driving them as in FIG. 8A and attempting to return to the initial state of Vcom=−15V. The top pixel's gate has already been opened and closed while Vcom is at −15V. The middle pixel's gate is now open while Vcom is at −15V. The bottom pixel's gate has not yet been opened while Vcom is at −15V. Due to the short amount of time since the bottom pixel's gate was opened, the voltage "seen" by the pixel electrode in the bottom pixel is actually quite low, approximately −45V.

[0043] [Figure 9A] Figure 9A illustrates a typical "left-to-right, top-to-bottom" scan path used in conjunction with an active matrix backplane. When this path is used in conjunction with top-plane switching (alone), the impulse (voltage x time) experienced by a given pixel is position-dependent when the pixel is driven in a row-by-row manner. As a result, material adjacent to the pixel electrode (e.g., electrophoretic medium or electrowetting droplets) will experience a position-dependent environment.

[0044] [Figure 9B]FIG. 9B illustrates that using a complementary "right-to-left, bottom-to-top" scan path in combination with a two-step, i.e., "left-to-right, top-to-bottom" scan path results in an array of pixels having an electric field environment with less positional variation.

[0045] [Figure 10A] FIG. 10A illustrates the voltage “seen” by the pixel electrode when top plane switching is used, but Vcom and VS are returned to zero volts for the frame between switching the top plane from a low voltage to a high voltage.

[0046] [Figure 10B] 10B illustrates the voltages at various points in an exemplary equivalent circuit of three different pixels driven as shown in FIG. 10A. The gate of the top pixel has already been opened and closed while Vcom is at -15V. The gate of the middle pixel is now open while Vcom is at -15V. The gate of the bottom pixel is not yet open while Vcom is at -15V.

[0047] [Figure 10C] FIG. 10C illustrates the voltages at various points in an exemplary equivalent circuit of three different pixels driven as shown in FIG. 10A. The gate of the top pixel has already been opened and closed while Vs and Vcom are at 0V. The gate of the middle pixel is now open while Vs and Vcom are at 0V. The gate of the bottom pixel has not yet been opened while Vs and Vcom are at 0V. Due to the short amount of time since the bottom pixel's gate was opened, the voltage "seen" by the pixel electrode in the bottom pixel is higher than 0V, but within the operable range for the a-Si transistor.

[0048] [Figure 10D]Figure 10D illustrates the voltages at various points in an exemplary equivalent circuit of three different pixels driven as shown in Figure 10A. The gate of the top pixel has already been opened and closed while Vcom is at +15V. The gate of the middle pixel is now open while Vcom is at -+15V. The gate of the bottom pixel is not yet open while Vcom is at +15V.

[0049] [Figure 10E] FIG. 10E illustrates the voltages at various points in an example equivalent circuit of three different pixels driven as shown in FIG. 10A. The gate of the top pixel has already been opened and closed while Vs and Vcom are at 0V. The gate of the middle pixel is now open while Vs and Vcom are at 0V. The gate of the bottom pixel has not yet been opened while Vs and Vcom are at 0V. Due to the short amount of time since the bottom pixel's gate was opened, the voltage "seen" by the pixel electrode in the bottom pixel is less than 0V, but within the operable range for the a-Si transistor.

[0050] [Figure 10F] FIG. 10F illustrates the voltages at various points in an exemplary equivalent circuit of three different pixels being returned to the state of FIG. 10B.

[0051] [Figure 11A] FIG. 11A illustrates the voltages "seen" by pixel electrodes when top-plane switching is used, but Vcom and VS are "shorted" to each other while switching the top plane from a low voltage to a high voltage (typically, Vcom and VS are not actually shorted, but are provided the same voltage by the controller).

[0052] [Figure 11B]11B illustrates the voltages at various points in an exemplary equivalent circuit of three different pixels driven as shown in FIG. 11A. The gate of the top pixel has already been opened and closed while Vcom is at -15V. The gate of the middle pixel is now open while Vcom is at -15V. The gate of the bottom pixel is not yet open while Vcom is at -15V.

[0053] [Figure 11C] FIG. 11C illustrates the voltages at various points in an exemplary equivalent circuit of three different pixels driven as shown in FIG. 11A. The gate of the top pixel has already been opened and closed while VS = Vcom = -15V. The gate of the middle pixel is now open while VS = Vcom = -15V. The gate of the bottom pixel has not yet been opened while VS = Vcom = -15V. Due to the short amount of time since the bottom pixel's gate was opened, the voltage "seen" by the pixel electrode in the bottom pixel is higher than 0V, but because VS = Vcom = -15V, the pixel electrode is "seen" only +15V, which is not only within the operable range for a-Si transistors, but the lack of an impulse on the pixel electrode in the last row reduces non-uniformity in the display color or droplet movement.

[0054] [Figure 11D] 11D illustrates the voltages at various points in an exemplary equivalent circuit of three different pixels driven as shown in FIG. 11A. The top pixel's gate has already been opened and closed while Vcom is at +15V. The middle pixel's gate is now open while Vcom is at -+15V. The bottom pixel's gate is not yet open while Vcom is at +15V.

[0055] [Figure 11E]Figure 11E illustrates the voltages at various points in an exemplary equivalent circuit of three different pixels driven as shown in Figure 11A. The gate of the top pixel has already been opened and closed while VS = Vcom = 15V. The gate of the middle pixel is now open while VS = Vcom = 15V. The gate of the bottom pixel has not yet been opened while VS = Vcom = 15V. Again, the voltage "seen" by the bottom pixel is only -15V.

[0056] [Figure 11F] FIG. 11F illustrates the voltages at various points in an exemplary equivalent circuit of three different pixels being returned to the state of FIG. 11B. DETAILED DESCRIPTION OF THE INVENTION

[0057] Detailed Description The present invention provides an improved method for driving electro-optic media devices using so-called top-plane switching (i.e., the voltage on the top electrode is varied during the process of updating the device). In some embodiments, the present invention is used in conjunction with an electrophoretic medium comprising four particles, two of which are colored and subtractive, and at least one of which is scattering. Typically, such a system comprises white particles and cyan, yellow, and magenta subtractive primary color particles. Such a system is shown diagrammatically in FIG. 5 and can provide white, yellow, red, magenta, blue, cyan, green, and black at every pixel.

[0058] Display devices may be constructed using the electrophoretic fluid of the present invention in several ways known in the prior art. The electrophoretic fluid may be encapsulated in microcapsules or incorporated into a microcell structure, which is then sealed with a polymer layer. The microcapsule or microcell layer may be coated or embossed onto a plastic substrate or film carrying a transparent coating of conductive material. The assembly may be laminated to a backplane carrying pixel electrodes using a conductive adhesive. Alternatively, the electrophoretic fluid may be dispensed directly onto a thin, continuous cell grid arranged on a backplane, containing the active matrix of pixel electrodes. The filled grid may then be top-sealed with an integrated protective sheet / light-transmitting electrode.

[0059] 1 and 2, an electrophoretic display (101, 102) typically includes a top transparent electrode 110, an electrophoretic medium 120, and a bottom electrode 130, which are often pixel electrodes of an active matrix of pixels controlled using thin-film transistors (TFTs), as discussed in more detail below. The electrophoretic medium 120 contains at least one electrophoretic particle 121; however, a second electrophoretic particle 122, a third electrophoretic particle 123, a fourth electrophoretic particle 124, or more particles are feasible. The electrophoretic medium 120 typically includes a solvent, such as isoparaffin, and may also include a dispersed polymer and a charge control agent to promote state stability, e.g., bistability, i.e., the ability to maintain an electro-optical state without any additional energy input.

[0060] The electrophoretic medium 120 is typically compartmentalized, such as by walls of microcapsules 126 or microcells 127. The entire display stack is typically disposed on a substrate 150, which can be rigid or flexible. The displays (101, 102) also typically include a protective layer 160, which may simply protect the top electrode 110 from damage, or which may surround the entire display (101, 102) to prevent water ingress, etc. The electrophoretic displays (101, 102) may also include one or more adhesive layers 140, 170 and / or a sealing layer 180, as needed. In some embodiments, the adhesive layer may include a primer component to improve adhesion to the electrode layer 110, or a separate primer layer (not shown in FIGS. 1 or 2) may be used. (The structure of electrophoretic displays, and their component parts, pigments, adhesives, electrode materials, etc., are described in many patents and patent applications published by E Ink Corporation, such as U.S. Pat. Nos. 6,922,276, 7,002,728, 7,072,095, 7,116,318, 7,715,088, and 7,839,564, all of which are incorporated herein by reference in their entireties.)

[0061] Amorphous silicon TFT backplanes typically have only one transistor per pixel electrode or drive electrode. As illustrated in Figure 3, each transistor (TFT) is connected to a gate line, a data line, and a pixel electrode (drive electrode). When a sufficiently large positive voltage (or negative voltage, depending on the transistor type) is present on the TFT gate, low impedance exists between the scan line and the pixel electrode coupled to the TFT drain (i.e., Vg is in the "on" or "open" state), and therefore the voltage on the scan line is transmitted to the pixel's electrode. However, when a negative voltage is present on the TFT gate, high impedance exists, and the voltage is stored on the pixel storage capacitor; other pixels are not affected by the voltage on the scan line when addressed (i.e., Vg is "off" or "closed"). Ideally, therefore, the TFT should act as a digital switch. In practice, when the TFT is in the "on" setting, there is still a certain amount of resistance, and therefore the pixel takes some time to charge. In addition, when the TFT is in the "off" setting, the voltage is V S From V pix Increasing the capacitance of the reservoir capacitor Cs reduces crosstalk, but at the cost of making it more difficult to charge the pixel, increasing the charging time. As shown in Figure 3, a separate voltage (V TOP ) is provided to the top electrode, and therefore an electric field (V FPL ) which ultimately determines the optical state of the associated electro-optic medium, V FPL The first side of the reservoir capacitor is coupled to the pixel electrode, while the second side of the reservoir capacitor is connected to a separate line (V COM) are coupled to the gate electrode. See, e.g., U.S. Pat. No. 7,176,880 (incorporated by reference in its entirety). In some embodiments, an N-type semiconductor (e.g., amorphous silicon) may be used to form a transistor, with "select" and "unselect" voltages applied to the gate electrode, which may be positive and negative, respectively. In some embodiments, V COM can be grounded, however, many different designs exist for draining charge from the charge capacitor, as described, for example, in U.S. Pat. No. 10,037,735 (incorporated by reference in its entirety).

[0062] Most commercial electrophoretic displays use amorphous silicon-based thin film transistors (TFTs) in the construction of active matrix backplanes (see Figure 4) due to the wider availability of processing equipment and the cost of various starting materials. Unfortunately, amorphous silicon thin film transistors become unstable when supplied with gate voltages that would allow switching voltages higher than approximately ±15 V. Nevertheless, as explained below, ACeP performance is improved when high positive and negative voltage magnitudes are allowed to exceed ±15 V. Therefore, as explained in the previous disclosure, improved performance is achieved by additionally varying the bias of the top light-transmitting electrode relative to the bias on the backplane pixel electrodes, also known as top-plane switching. Thus, if a voltage of +30 V (relative to the backplane) is required, the top plane can be switched to −15 V, while the appropriate backplane pixels are switched to +15 V. The use of top-plane switching to drive a four-particle electrophoresis system is described in further detail, for example, in US Pat. No. 9,921,451.

[0063] To obtain a high-resolution display, each individual pixel of the display must be addressable without interference from neighboring pixels. One way to achieve this goal is to provide an array of nonlinear elements, such as transistors or diodes, with at least one nonlinear element associated with each pixel, to produce an active matrix display 400 as shown in FIG. 4. An addressing or pixel electrode, which addresses one pixel, is fabricated on a substrate 402 and connected to an appropriate voltage source 406 through an associated nonlinear element. While FIG. 4 is an illustration of the layout of an active matrix backplane 400, it should be understood that in reality, the active matrix will have depth, and some elements, e.g., TFTs, may actually be directly below the pixel electrodes, with vias providing electrical connection from the drain to the pixel electrodes from above.

[0064] Conventionally, in high-resolution arrays, pixels are arranged in a two-dimensional array of rows and columns, such that any particular pixel is uniquely defined by the intersection of one defined row and one defined column. The sources of all transistors in each column are connected to a single column (scan) line 406, while the gates of all transistors in each row are connected to a single row (gate) line 408; again, the assignment of sources to rows and gates to columns, while common, is essentially arbitrary and can be reversed as desired. The gate lines 408 are connected to a gate line driver 412, which essentially ensures that at any given moment, only one row is selected, i.e., a select voltage is applied to the selected row electrode that ensures all transistors in the selected row are conductive, while a non-select voltage is applied to all other rows that ensures all transistors in those unselected rows remain non-conductive. The column scan lines 406 are connected to a scan line driver 410, which places selected voltages on the various scan lines 406 to drive the pixels in a selected row to their desired optical states (these voltages are relative to a common top electrode, not shown in FIG. 4). After a preselected interval known as the "line address time," the selected row is deselected, the next row is selected, and the voltages on the column driver are changed so that the next line of the display is written. This process is repeated so that the entire display is written in a row-by-row manner. Further details of this row-by-row driving are discussed below.

[0065] Thus, as explained above, it is possible to use top-plane switching to increase the active field above the pixel electrode. In the case of ACeP®, each of the eight primary colors (red, green, blue, cyan, magenta, yellow, black, and white) corresponds to a different arrangement of four pigments, so that the viewer sees only those colored pigments (i.e., only the light-scattering pigments) on the viewing side of the white pigment. This is shown in Figure 5. To create these colors, it has been found that the waveforms required to separate the four pigments into the appropriate configuration require at least five voltage levels (high positive, low positive, zero, low negative, high negative). See Figure 6. To achieve a wider range of colors, additional voltage levels must be used for finer control of the pigments. Thus, the present invention provides several improved methods for driving such electrophoretic media, which result in faster pixel color refresh, less flash, and a more pleasing color spectrum for the viewer.

[0066] For example, in U.S. Patent No. 9,921,451, seven different voltages are applied to each pixel electrode to promote the full color gamut at each individual pixel electrode: three positive, three negative, and zero. Typically, the maximum voltages used in these waveforms are higher than those that can be handled by amorphous silicon thin-film transistors, but without top-plane switching. Figure 6 shows (in simplified form) a typical waveform used to drive the four-particle color electrophoretic display system described above. Such waveforms have a "push-pull" structure; that is, they consist of a dipole with two pulses of opposite polarity. The magnitude and length of these pulses determine the color obtained. At a minimum, five such voltage levels should be present. Figure 6 shows high or low positive and negative voltages and zero volts. Typically, "low" (L) refers to a range of approximately 5 to 15 volts, while "high" (H) refers to a range of approximately 15 to 30 volts. Generally, the higher the magnitude of the "high" voltage, the better the color gamut achieved by the display. The "medium" (M) level is typically about 15 V; however, the value of M will depend somewhat on the composition of the particles and the environment of the electrophoretic medium.

[0067] An obvious problem with top plane switching is that when the top plane is switched from a first state, e.g., −15 V, to a second state, +15 V, the electro-optic medium or droplet (i.e., V FPL ) experiences large fluctuations in the electric field, which can result in pixels not achieving the correct impulse during that frame. TOP But changed, V COM If not corrected, the pixel may not achieve the correct color, or the droplet may not move as quickly as expected. To overcome this dramatic shift, V COM and V TOP The lines are typically tied together through a common node, for example as shown in FIG. 7, so that when the gate is opened, VFPL The relative changes in r are maintained as expected.

[0068] Nevertheless, as illustrated in Figures 8A-8D and 9, V TOP and V COM Tying them together does not completely solve the problem. First, for certain voltage combinations, and for certain pixels in the array, the pixel electrode and TFT material may experience electric fields that are outside of their normal operable boundaries. This can cause current leakage through the transistor, resulting in undesired optical states / droplet activation, and / or drive electrochemical reactions between the pixel electrode material and its surroundings, which are typically actually grounded (or close to it). Additionally, when the device includes a layer of adhesive with a conductive material, momentary high voltages can (rarely) create a short circuit through the conductive material with a path to ground.

[0069] As shown in FIG. 8A, when the voltage on the media is −30V but is intended to be switched to 30V, the scan line delivers a voltage of +15V, while V TOP But V COM The line receives a voltage of -15V. When the gate of the TFT is opened with a high positive pulse, the pixel electrode "sees" +15V from the scan line and the medium "sees" +30V. However, before the gate is opened a second time, the top plane (i.e., V COM ) is switched again. This typically occurs when the pixel is in the bottom right corner of the array, as illustrated below in Figures 8B-8D. However, V COM When going from -15V to +15V, the pixel electrode spikes from 30V to +45V in absolute value relative to its surroundings, even though the voltage relative to the top plane remains the same. Functionally, this spike in voltage on the pixel electrode is due to the TFT and V COMSuch spikes can damage the TFT and / or pixel electrodes. Although not shown in Figure 8A, when the pixel and top plane are addressed in reverse order, a V of -45V PIX It is also possible to achieve

[0070] The position-dependent effects of top-plane switching are further detailed in Figures 8B-8D. In particular, because the top electrode is not pixelated (i.e., it is a single electrode), it is not possible to independently switch the top electrode voltage over each pixel in a coordinated manner. When row-by-row, top-to-bottom switching is used, as is generally standard in AM-TFT driving, the top row will typically be switched (i.e., the gate is opened) immediately after the top electrode voltage is changed. This is shown in Figure 8B. Sometime after the top row is addressed, subsequent rows are addressed, as indicated by the arrows in Figure 8B. However, particularly for large arrays, V COM The voltage is capacitively coupled through the reservoir capacitor, V PIX V COM However, when the last row of pixels is updated, when the gate is released (ΔV=30V), the pixel electrode jumps from -15V to +15V (V COM ) and then once the next frame begins, V COM adds an additional +15V for a total boost of 45V relative to ground. See FIG. 8C. The medium voltage across all pixels is roughly correct for all of the pixels in the array, but a good portion of the pixels will see large swings in absolute voltage. Of course, this process can be worked in reverse to pull the absolute voltage of a pixel extremely negative, as shown in FIG. 8D.

[0071] A second problem observed with top-plane switching for larger-area active-matrix switching is that even though the voltage between the pixel electrode and the top electrode is "correct" for most of the frame, the total impulse (voltage x time) that ultimately determines the response of, for example, the electro-optic medium or droplet is not identical between pixels in the first row of the array and pixels in the last row of the array. This phenomenon is illustrated in FIG. 9A , where the correct "state" is represented by black and the incorrect state is white. This is an emphasis to show that within a single frame, the upper left corner switches to the correct state while the lower right corner does not switch at all. However, this is not an emphasis to convey that cumulative impulse deviations during a long update process with a traditional "left-to-right, top-to-bottom" scan path can have undesirable consequences. This problem is particularly acute for applications such as electrophoretic displays, where the reservoir capacitor in the upper right of FIG. 9A benefits from the extra time to charge (or discharge) to the correct voltage. For example, when a 22-inch diagonal ACeP® device is produced, the display is switched to a single color using a long drive waveform incorporating top-plane switching, and an acclimatized eye can detect a difference in the final color between the top row of electrodes and the bottom row of electrodes.

[0072] In a typical system, as shown in FIG. 9A, the first gate line n of a total of m lines addressed performs best among any line, and then all lines gradually perform poorly. The last group of gate lines addressed, i.e., row m, performs poorly because the top plate voltage is switched to a new, different voltage after the last gate line is addressed. When the top plate is switched to the new voltage, the storage capacitor of the last pixel addressed has only one line scan, the minimum number of times for the last pixel to have its charge applied to the pixel unimpeded. The first pixel, in contrast, has a full m line scans to transfer charge unimpeded. As the number of gate lines m becomes larger, the non-uniformity worsens.

[0073] One simple solution to this deficiency is to change the pattern that addresses the gate lines to help mitigate this non-uniformity, thereby creating a "superframe" of drive with more than one scan of each gate line for each voltage and more than one pattern that addresses the lines to aid uniformity. Of course, adding additional update passes between updates of the top plane increases the length of each frame. Nevertheless, in many applications, the extra times are acceptable to avoid switching some of the pixels, as explained above.

[0074] In one embodiment of the present invention, a "superframe" involves a first frame in which gate lines start with the first line n and progress through n+1, n+2, etc., one at a time in the normal operating mode, until the last line n=m, where m is the number of gate lines. In the second frame of the superframe, the mth gate line is the first line addressed, and the gate driver starts with m and cycles through m-1, m-2 in reverse order, ending with n, the first line. In other words, the update involves two steps. The first step is to scan in the traditional "left-to-right, top-to-bottom" scan path. The second step is to scan in the reverse order, i.e., "right-to-left, bottom-to-top." By having this arrangement, in which this repetition proceeds forward and then backward through the gate lines before the top plane voltage is changed, the uniformity of the panel's top plane switching is dramatically increased. An exemplary two-step path is illustrated in Figure 9B; however, other paths, such as "left to right, bottom to top," also work and may be easier for the controller to process. In either case, the last row gets a first charge injection into the reservoir capacitor at the end of the first frame, but a second charge injection at the beginning of the second frame. This brings all of the pixels much closer to a balanced state in terms of the amount of charge on each pixel over time, as depicted in Figure 9B.

[0075] The present invention illustrated in FIG. 9B is compatible with currently available commercial gate drivers and "all-in-one" scan / gate drivers. For example, the TFT gate driver EK72601 chip (E Ink Corporation) has a choice of scan direction 1-825 or 825-1. For purposes of this example, gate line 1 will be referred to as the top, and line 825 or the highest number will be referred to as the bottom. The gate drive superframe proceeds as follows: the top plane is set to +15V or -15V, depending on whether a + or - high voltage potential is required; a gate scan pulse initiates the scanning of the gate lines one at a time; then, the initial gate scan proceeds, scanning through the gate lines in order 1-825 or less, depending on the size of the array. The selection for the direction of gate scan is then changed and a second gate start pulse signal begins a second scan of the gate lines, this time in the reverse direction for the 5.61 inch panel, from line 825-1 or from 504-1. Only after scanning the gates from top to bottom and bottom to top will the top plane voltage then be changed to continue through additional pulses in the drive sequence.

[0076] In advanced embodiments, the risk of performance defects and damage can be mitigated by inserting a "rest" or "zero" frame between the top plane switches. A zero frame is, in effect, a V COM and V S can be brought to 0V or to some nominal voltage value, or V COM is the V for one frame S can be matched to, or V S is the V for one frame COMThe idea is that as the top plane voltage changes, it is possible to prevent large voltage spikes on pixels that have not yet been scanned, which could cause the pixels to leak and / or lose their charge and / or fail. In some embodiments, best results are found when a single frame is inserted, with all of the scan lines driven to the same voltage as the last top electrode voltage, and all of the TFTs gated at once. In some embodiments, all of the gates may be opened simultaneously or nearly simultaneously. Of course, adding additional frames to the optical waveform or electrowetting drive protocol increases the number of times to complete the task.

[0077] Figure 10A shows the voltage on the medium (V FPL ), i.e., three frames of switching in which the electro-optic medium is switched from +30V to -30V. The frames leading to +30V and trailing to -30V are not really important for purposes of explanation. The three frames may be part of a reset pulse for the electrophoretic medium or part of a color addressing pulse for the electrophoretic medium. In the example of FIG. 10A, V COM and V S Both of these pulses result in a voltage on the media that is brought to 0V for a single frame and also experiences a frame of 0V. As in FIG. 8A, the pixels that experience these pulses are not in the first row of electrodes, and therefore V COM and V S is switched shortly before the gate pulse arrives. Only after the gate is opened, V PIX is V S However, before the gate opens, V PIX is V COM is capacitively coupled to V COMTherefore, when the gate opens, there is still a fairly large jump in absolute voltage on the pixel electrode, namely going all the way up to +30V. While this is large, +30V is not outside the operable range of the system and is unlikely to cause damage to the TFT or pixel electrode. When the top plane is finally switched on after zero frames, V PIX undergoes another spike, however, this time it is only to +15V. To some extent, the +45V spike shown in FIG. 8A is spread over two frames, which reduces the risk of damage to the device. As with FIGS. 8B-8D, the voltages on various locations in the circuit can be identified depending on the row of pixels and the stage of update. FIGS. 10B-10D show the first three-frame sequence of FIG. 10A, FIG. 10E shows another zero-frame insertion, and FIG. 10F is a return to the original state of FIG. 10B.

[0078] Although the corresponding -30V to +30V pulse sequence is not shown in the figure, it should be understood that the drive polarity is arbitrary. Thus, the polarity of the pulse sequence can be reversed to achieve the same electrical performance, but with the opposite polarity. Of course, reversed polarity has a real effect on the display medium or electrophoretic propulsion, i.e., switching from white to black instead of black to white, or causing droplets to remain on a pixel electrode rather than moving to an adjacent pixel electrode. Nevertheless, the drive waveforms and driving methods are the same except for the voltage polarity. Additionally, the described pulse sequences can be spaced apart with intervening frames of no voltage, for example, to stretch the waveform. The sequences can also be repeated any number of times for repetitive driving or to improve the final optical state. The sequences described herein can be combined as desired.

[0079] An alternative method to reduce distortion on the TFT circuitry and improve drive consistency is to add a V S V COMThis method is illustrated in Figures 11A-11E. Prior to the top-plane switch, Vs is reduced to V COM By "following" V, the sum of the absolute voltages on the pixel electrodes is reduced even further, reaching peaks of +15V and -15V. S The voltage level is simply V COM However, because it is one frame earlier, V S This may also be referred to as the pre-pulse method. Again, as in FIG. 10A, the total voltage on the media progresses to zero between frames. A further advantage is that for subsequent pixel rows, the V PIX Since there are fewer excess charges on Vs and V COM The advantage is that the equilibration of V is faster. FPL The details of the steps to switch V from +30V to -30V and back again are detailed in Figures 11B-11E. Theoretically, during the zero frame, V COM V S However, due to the speed of transistor gate opening, it is necessary to match the new V COM Before it is set, COM V to match S It is typically better to have a switch.

[0080] Thus, the present invention provides improved top-plane switching for driving electro-optic displays. While several aspects and embodiments of the present technology have been described above, it should be understood that various alterations, modifications, and improvements will readily occur to those skilled in the art. Such alterations, modifications, and improvements are intended to be within the spirit and scope of the technology described herein. For example, those skilled in the art will readily envision various other means and / or structures for performing the functions and / or obtaining one or more of the results and / or advantages described herein, and each such variation and / or modification is deemed to be within the scope of the embodiments described herein. Those skilled in the art will recognize, or be able to ascertain using no more than routine experimentation, many equivalents to the specific embodiments described herein. Accordingly, the foregoing embodiments are presented by way of example only, and it should be understood that, within the scope of the appended claims and their equivalents, embodiments of the present invention may be practiced otherwise than as specifically described. Additionally, any combination of two or more features, systems, articles, materials, kits, and / or methods described herein is also included within the scope of the present disclosure, if such features, systems, articles, materials, kits, and / or methods are not mutually inconsistent.

Claims

[Claim 1] The invention described in this specification.

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