Arithmetic encoder for arithmetically encoding and arithmetic decoder for arithmetically decoding sequence of information values, methods for arithmetically encoding and decoding sequence of information values, and computer program for implementing these methods

Abstract

To provide an encoding method and a decoding method for arithmetically encoding a sequence of information values into an arithmetic coded bitstream using providing the bitstream with entry point information making it possible to resume arithmetic decoding of the bitstream after a predetermined entry point.SOLUTION: An encoding method comprises: symbolizing 101 information values into symbol strings so as to acquire a sequence of symbols; and arithmetically encoding 102 the sequence of symbols. The arithmetic encoding comprises: subdividing 103 a current interval, which defines a current version of a coding state of an arithmetic encoder, for each symbol, according to a probability estimate for the respective symbols; selecting 104 a subinterval out of a plurality of subintervals according to a symbol value of the respective symbols; and renormalizing 105 encoder-internal parameters which define the coding state under continuing a bitstream.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] In particular, this application relates to arithmetically coding a sequence of information values ​​into an arithmetically coded bitstream by providing entry point information in the bitstream that allows arithmetic decoding of the bitstream to be restarted after a predetermined entry point.

[0002] An embodiment in accordance with the present invention relates to an arithmetic encoder for arithmetically encoding a sequence of information values.

[0003] A further embodiment according to the invention relates to an arithmetic decoder for arithmetically decoding a sequence of information values.

[0004] A further embodiment according to the invention relates to a method for arithmetically coding a sequence of information values.

[0005] A further embodiment according to the invention relates to a method for arithmetically decoding a sequence of information values.

[0006] A further embodiment according to the invention relates to a computer program implementing a method for arithmetic encoding and decoding of a sequence of information values.

[0007] A further embodiment in accordance with the invention relates to a bitstream generated using an arithmetic encoder that arithmetically encodes a sequence of information values.

[0008] A further embodiment according to the invention relates to an arithmetic encoder for arithmetically encoding neural network parameters.

[0009] A further embodiment according to the invention relates to an arithmetic decoder for arithmetically decoding neural network parameters.

[0010] The present invention can be applied to any data compression application involving integer signaling, such as, for example, compressing parameters of a neural network. [Background technology]

[0011] Numerous devices and methods are currently known for arithmetic coding and decoding of sequences of values. In particular, context-based adaptive binary arithmetic coding (CABAC) is widely used for encoding and decoding sequences of symbols. In CABAC's binarization stage, each symbol in such a sequence is converted into a sequence of one or more binary symbols (bins), and the concatenation of these bin sequences is arithmetically coded into a bitstream. Then, in the context modeling stage, a probability estimate is associated with each bin for arithmetic coding based on previously coded bins and context information. A corresponding decoder has the same information available and can reproduce the same probability estimates to perform arithmetic decoding.

[0012] However, known arithmetic decoding is a highly sequential process and is hardly parallelizable, so the decoding speed of CABAC decoders is limited by their serial coding procedure. Summary of the Invention [Problem to be solved by the invention]

[0013] In view of the above, it would be desirable to create a coding and decoding concept that allows multiple decoders to operate in parallel to decode different parts of a single bitstream, leading to increased decoding speed.

[0014] It is therefore an object of the present invention to provide a coding concept that is more efficient in terms of decoding speed. This object is achieved by the subject matter of the pending independent claims.

[0015] Further advantageous aspects are the subject matter of the dependent claims. [Means for solving the problem]

[0016] An embodiment according to the invention provides an arithmetic encoder for arithmetically encoding a sequence of information values ​​into an arithmetic coding bitstream, the arithmetic encoder being configured to: symbolize the information values ​​into a symbol string to obtain a sequence of symbols; select, for each symbol, a subinterval from among a plurality of subintervals according to a symbol value of the respective symbol, wherein a current interval defining a current version of a coding state of the arithmetic encoder is subdivided according to a probability estimate of the respective symbol, to obtain an updated version of a coding state of the arithmetic encoder defined by the selected subinterval for encoding a next symbol of the sequence of symbols; arithmetically encode the sequence of symbols by renormalizing encoder internal parameters defining the coding state during the duration of the bitstream, e.g., parameters R and L; and provide entry point information to the bitstream that enables resuming arithmetic decoding of the bitstream after a predetermined entry point.

[0017] This embodiment is based on the finding that providing entry point information in the bitstream allows for parallelization of arithmetic decoding, such as CABAC decoding, for example when multiple decoders operate in parallel decoding different parts of a single bitstream, which leads to more efficient encoding and decoding concepts, and in particular to improved decoding speed.

[0018] According to one embodiment, the entry point information comprises information about arithmetic decoder coding states that occur in the arithmetic decoder when the arithmetic decoder decodes the bitstream up to a predetermined entry point, which allows for parallel decoding starting from multiple predetermined entry points using multiple decoders.

[0019] According to one embodiment, the arithmetic encoder is configured to perform arithmetic decoding of the bitstream to determine information about the coding state of the arithmetic decoder. As an example, the arithmetic decoding may be performed after the arithmetic coding has been finalized. Alternatively, the arithmetic decoding may start in parallel with the arithmetic coding at a small inter-bitstream bit distance between the bit position where the arithmetic coding continues to add bits and the beginning of the bitstream where the arithmetic decoding starts.

[0020] According to one embodiment, the coding state of the arithmetic decoder is defined by decoder internal parameters including an interval width parameter indicating the width of the interval and a pointer to the interval, and the information about the coding state of the arithmetic decoder includes the value of the pointer, e.g., what value the pointer takes at a given entry point.

[0021] According to one embodiment, the arithmetic encoder is configured to perform arithmetic decoding of the bitstream and to set the value of a pointer contained in the information about the coding state of the arithmetic decoder to be equal to the current value of the pointer that appears when arithmetically decoding the bitstream up to a predetermined entry point.

[0022] According to one embodiment, the coding state of the arithmetic decoder is defined by decoder internal parameters including an interval width parameter indicating the width of an interval and a pointer to the interval, and the information about the coding state of the arithmetic decoder includes the value of the interval width parameter, e.g., what value the interval width parameter takes at a given entry point.

[0023] According to one embodiment, the arithmetic encoder is configured to perform arithmetic decoding of the bitstream and to set the value of an interval width parameter contained in the information about the coding state of the arithmetic decoder to be equal to the current value of the interval width parameter that occurs when arithmetically decoding the bitstream up to a predetermined entry point. Alternatively, the arithmetic encoder is configured to set the value of the interval width parameter contained in the information about the coding state of the arithmetic decoder to be equal to the current value of the interval width parameter that occurs when arithmetically encoding the sequence of symbols up to the predetermined entry point.

[0024] According to one embodiment, the coding state of the arithmetic decoder is defined by decoder internal parameters including an interval width parameter indicating the width of an interval and a pointer to the interval, and the information about the coding state of the arithmetic decoder includes the value of the pointer, e.g., which value the pointer takes at a predetermined entry point, but not the value of the interval width parameter. In this embodiment, the arithmetic encoder is configured to set the value of the interval width parameter included in the information about the coding state of the arithmetic decoder equal to a predetermined value, and to use the predetermined value for the interval width parameter when resuming the arithmetic coding of the sequence of symbols from the predetermined entry point onwards. Alternatively, in this embodiment, before resuming the arithmetic coding of the sequence of symbols from the predetermined entry point onwards, the arithmetic encoder is configured to previously interrupt the arithmetic coding of the sequence of symbols by arithmetically encoding symbols of a predetermined symbol value immediately before the predetermined entry point, and to set the value of the interval width parameter included in the information about the coding state of the arithmetic decoder equal to the current value of the interval width parameter that appears when arithmetically encoding the sequence of symbols up to the predetermined entry point including the symbol of the predetermined symbol value.

[0025] According to one embodiment, the entry point information comprises a bitstream pointer to a predetermined bit in the bitstream that will be next read after resuming arithmetic decoding of the bitstream from the predetermined entry point onwards.

[0026] According to one embodiment, a bitstream pointer to a given bit within the bitstream is signaled within the bitstream in the form of an offset relative to the beginning of the bitstream, e.g., the beginning from which the bitstream will be decoded.

[0027] According to one embodiment, a bitstream pointer to a given bit in the bitstream is signaled in the form of an offset relative to the end of a run of the first bit of the bitstream, and based on this offset a pointer to a coding state, e.g., an interval, of an arithmetic decoder for performing arithmetic decoding of the bitstream is initialized.

[0028] According to one embodiment, the entry point information allows for restarting arithmetic decoding of the bitstream after two or more entry points, and a bitstream pointer to a predetermined bit in the bitstream is signaled within the bitstream in the form of an offset relative to a previous entry point. The entry point information, for example, includes two or more information instantiations, one information instantiation for each entry point. Alternatively, the bitstream pointer to a predetermined bit in the bitstream is signaled within the bitstream in the form of an offset relative to a predefined bitstream position associated with the predetermined entry point. For example, the nth predefined bitstream position is associated with the nth entropy point, and the predefined bitstream positions can be positioned equidistant from each other.

[0029] According to one embodiment, the arithmetic encoder is configured to identify predefined bitstream positions either syntactically as points between consecutive values ​​of a sequence of values, in other words, or by counting bits of the bitstream, in other words, at the bit level.

[0030] According to one embodiment, bitstream pointers to given bits within the bitstream are stored in units of bits and / or in integer multiples of bits (eg, n>1 and n=8).

[0031] According to one embodiment, the bit position in the bitstream of the previous entry point is signaled in the bitstream.

[0032] According to one embodiment, a bitstream pointer is signaled in the bitstream differentially relative to a further bitstream pointer included in the entry point information for pointing to a further predetermined bit in the bitstream, which further predetermined bit will be read next after resuming arithmetic decoding of the bitstream from the previous entry point onwards.

[0033] According to one embodiment, bitstream pointers are signaled within the bitstream using variable length codes.

[0034] According to one embodiment, bitstream pointers are signaled within the bitstream using exponential-Golomb codes, preferably unsigned exponential-Golomb codes.

[0035] According to one embodiment, the predetermined entry point is either the third entry point relative to the beginning of the bitstream or the entry point following the third entry point, and a bitstream pointer to the predetermined bit in the bitstream is signaled in the form of a difference between the offset relative to the previous entry point and the offset of the previous entry point relative to a further entry point preceding the previous entry point.

[0036] According to one embodiment, bitstream pointers are signaled within the bitstream using signed exponential-Golomb codes.

[0037] According to one embodiment, the bit position in the bitstream of the previous entry point is signaled in the bitstream using an unsigned exponential-Golomb code.

[0038] According to one embodiment, the exponential-Golomb code parameter has a value of 11.

[0039] According to one embodiment, bitstream pointers are signaled within the bitstream using signed exponential-Golomb codes.

[0040] According to one embodiment, the exponential-Golomb code parameter of the exponential-Golomb code has a value of seven.

[0041] According to one embodiment, an arithmetic encoder is configured to use context-adaptive arithmetic coding for arithmetically encoding a sequence of symbols, the using including selecting, for a context-adaptively encoded symbol of the sequence of symbols, a context model from a plurality of context models, each having a probability estimate associated therewith, and adapting the probability estimates of the plurality of context models to actual symbol statistics using previously encoded symbols of the sequence of symbols. The entry point information indicates, for each of a set of one or more predetermined context models, a predetermined probability estimate for each predetermined context model. The arithmetic encoder is configured to use the predetermined probability estimate when resuming adaptation of the probability estimates of the plurality of context models for each predetermined context model.

[0042] According to one embodiment, an arithmetic encoder is configured to use context-adaptive arithmetic coding for arithmetically encoding a sequence of symbols, the using including selecting, for a context-adaptively encoded symbol of the sequence of symbols, a context model from a plurality of context models, each having an associated probability estimate, and adapting the probability estimates of the plurality of context models to actual symbol statistics using previously encoded symbols of the sequence of symbols. The arithmetic encoder is configured to, for each of a set of one or more predetermined context models, set the probability estimates for each predetermined context model at a predetermined entry point to a default state, and the arithmetic encoder is configured to use the default state when resuming adaptation of the probability estimates of the plurality of context models for each predetermined context model. Alternatively, in this embodiment, the arithmetic encoder is configured to, for each of a set of one or more predetermined context models, set the probability estimates for each predetermined context model at a predetermined entry point to a saved state that occurs in a predetermined condition during arithmetic coding of the sequence of symbols before the predetermined entry point, and the arithmetic encoder is configured to use the saved state when resuming adaptation of the probability estimates of the plurality of context models for each predetermined context model.

[0043] According to one embodiment, the arithmetic encoder is configured to use dependent quantization to derive a sequence of information values ​​from a sequence of unquantized values ​​using a state machine, and the entry point information includes quantization states appearing in the state machine up to a predetermined entry point.

[0044] According to one embodiment, the symbols are bins and the symbolization is a binarization.

[0045] According to one embodiment, the information value is a sequence of syntax elements that represent the video.

[0046] According to one embodiment, the information values ​​are neural network parameters.

[0047] One embodiment according to the invention produces an arithmetic decoder for arithmetically decoding a sequence of information values ​​from a bitstream, wherein the arithmetic decoder is configured to: derive entry point information from the bitstream; for each symbol of the bitstream, determine, based on a current version of a coding state of the arithmetic decoder, a subinterval out of a plurality of subintervals into which the current interval is subdivided according to a probability estimate for each symbol, and infer a symbol value for each symbol based on the selected subinterval; renormalize and update decoder-internal parameters defining the coding state, e.g., R and V, by using the bitstream and the selected subinterval to obtain an updated version of the coding state of the arithmetic decoder for decoding the next symbol of the sequence of symbols; resume arithmetic decoding of the bitstream from the predetermined entry point onwards by arithmetically decoding the sequence of symbols from the bitstream using the entry point information; and derive the information value from the sequence of symbols by desymbolization.

[0048] The arithmetic decoder according to the present embodiment is based on the same considerations as the arithmetic encoder described above.

[0049] According to one embodiment, the arithmetic decoder is configured to use the entry point information to determine a starting version of the coding state of the arithmetic decoder and to use the starting state to begin arithmetic decoding of the bitstream from the given entry point onwards.

[0050] According to one embodiment, the coding state of the arithmetic decoder is defined by decoder internal parameters including an interval width parameter indicating the width of the interval and a pointer pointing to the interval, and the arithmetic decoder is configured to derive from the entry point information the starting value of the pointer used to start arithmetic decoding of the bitstream from a given entry point onwards, e.g. what value the pointer will take at a given entry point.

[0051] According to one embodiment, the coding state of the arithmetic decoder is defined by decoder internal parameters including an interval width parameter indicating the width of the interval and a pointer to the interval, and the arithmetic decoder is configured to derive from the entry point information the starting value of the interval width parameter used to start arithmetic decoding of the bitstream from a given entry point onwards, e.g. what value the interval width parameter takes at a given entry point.

[0052] According to one embodiment, the coding state of the arithmetic decoder is defined by decoder internal parameters including an interval width parameter indicating the width of an interval and a pointer to the interval, and the arithmetic decoder is configured to derive from the entry point information a starting value of the pointer used to start arithmetic decoding of the bitstream from a given entry point onwards, e.g. what value the pointer will take at a given entry point, and to set the value of the interval width parameter included in the information about the coding state of the arithmetic decoder to be equal to a given value and use the given value for the interval width parameter in order to resume arithmetic decoding of the sequence of symbols from the given entry point onwards.

[0053] According to one embodiment, the entry point information enables resuming arithmetic decoding of the bitstream after two or more entry points, and the arithmetic decoder is configured to pre-interrupt arithmetic decoding of the sequence of symbols at a subsequent predetermined entry point by arithmetically decoding symbols of a predetermined symbol value immediately preceding the subsequent predetermined entry point before resuming arithmetic decoding of the sequence of symbols after the subsequent predetermined entry point.

[0054] According to one embodiment, the arithmetic decoder is configured to derive a bitstream pointer to a predetermined bit in the bitstream from the entry point information and to use the predetermined bit as the next bit to be read after resuming arithmetic decoding of the bitstream from the predetermined entry point onwards.

[0055] According to one embodiment, a bitstream pointer to a given bit within the bitstream is signaled within the bitstream in the form of an offset relative to the beginning of the bitstream, e.g., the beginning from which the bitstream will be decoded.

[0056] According to one embodiment, a bitstream pointer to a given bit in the bitstream is signaled in the form of an offset relative to the end of a run of the first bits of the bitstream, and based on said offset the arithmetic decoder is configured to initialize a coding state of the arithmetic decoder, e.g. a pointer to an interval, when performing arithmetic decoding of the bitstream beyond the start of the bitstream.

[0057] According to one embodiment, the entry point information allows restarting the arithmetic decoding of the bitstream after two or more entry points, and a bitstream pointer to a given bit in the bitstream is signaled in the form of an offset relative to a previous entry point or relative to a predefined bitstream position associated with the given entry point. For example, the nth predefined bitstream position is associated with the nth entropy point, and the predefined bitstream positions may be located equidistant from each other.

[0058] According to one embodiment, the arithmetic decoder is configured to identify predefined bitstream positions either syntactically as points between consecutive values ​​of a sequence of values, in other words, or by counting bits of the bitstream, in other words, at the bit level.

[0059] According to one embodiment, bitstream pointers to given bits within the bitstream are stored in units of bits and / or in integer multiples of bits (eg, n>1 and n=8).

[0060] According to one embodiment, the bit position in the bitstream of the previous entry point is signaled in the bitstream.

[0061] According to one embodiment, a bitstream pointer is signaled in the bitstream differentially relative to a further bitstream pointer included in the entry point information for pointing to a further predetermined bit in the bitstream, which further predetermined bit will be read next after resuming arithmetic decoding of the bitstream from the previous entry point onwards.

[0062] According to one embodiment, bitstream pointers are signaled within the bitstream using variable length codes.

[0063] According to one embodiment, bitstream pointers are signaled within the bitstream using exponential-Golomb codes, preferably unsigned exponential-Golomb codes.

[0064] According to one embodiment, the predetermined entry point is either the third entry point relative to the beginning of the bitstream or the entry point following the third entry point, and a bitstream pointer to the predetermined bit in the bitstream is signaled in the form of a difference between the offset relative to the previous entry point and the offset of the previous entry point relative to a further entry point preceding the previous entry point.

[0065] According to one embodiment, bitstream pointers are signaled within the bitstream using signed exponential-Golomb codes.

[0066] According to one embodiment, the bit position in the bitstream of the previous entry point is signaled in the bitstream using an unsigned exponential-Golomb code.

[0067] According to one embodiment, the exponential-Golomb code parameter has a value of 11.

[0068] According to one embodiment, bitstream pointers are signaled within the bitstream using signed exponential-Golomb codes.

[0069] According to one embodiment, the exponential-Golomb code parameter of the exponential-Golomb code has a value of seven.

[0070] According to one embodiment, an arithmetic decoder is configured to use context-adaptive arithmetic decoding for arithmetically decoding a sequence of symbols, the using including selecting, for a context-adaptively decoded symbol of the sequence of symbols, a context model from a plurality of context models, each having a probability estimate associated therewith, and adapting the probability estimates of the plurality of context models to actual symbol statistics using previously decoded symbols of the sequence of symbols, the entry point information indicating, for each of a set of one or more predetermined context models, a predetermined probability estimate for each predetermined context model, and the arithmetic decoder is configured to use the predetermined probability estimate when resuming adaptation of the probability estimates of the plurality of context models to each predetermined context model.

[0071] According to one embodiment, an arithmetic decoder is configured to use context-adaptive arithmetic decoding for arithmetically decoding a sequence of symbols, the using including selecting, for a context-adaptively decoded symbol of the sequence of symbols, a context model from a plurality of context models, each having a probability estimate associated therewith, and adapting the probability estimates of the plurality of context models to actual symbol statistics using previously decoded symbols of the sequence of symbols, the arithmetic decoder is configured, for each of a set of one or more predetermined context models, to set the probability estimates for each predetermined context model at a predetermined entry point to a default state, and the arithmetic decoder is configured to use the default state when resuming adaptation of the probability estimates of the plurality of context models for each predetermined context model.

[0072] According to one embodiment, the entry point information enables resuming arithmetic decoding of the bitstream after two or more entry points, and the arithmetic decoder is configured, for each of a set of one or more predetermined context models, to set probability estimates for each predetermined context model at a subsequent predetermined entry point to a saved state that appears in a predetermined condition during arithmetic decoding of the sequence of symbols before the subsequent predetermined entry point, and the arithmetic decoder is configured to use the saved state when resuming adaptation of the probability estimates of the multiple context models for each predetermined context model after the subsequent predetermined entry point, e.g., where the decoder can arithmetically decode the bitstream in parallel from the entry point onwards as soon as a predetermined condition is met, such as a certain number of information values ​​decoded once from the beginning using a signaled context state or a default context state.

[0073] According to one embodiment, the arithmetic decoder is configured to use dependent inverse quantization to derive a sequence of quantized values ​​from a sequence of information values ​​using a state machine, and to derive from entry point information a quantization state at which dependent quantization is resumed from a given entry point onwards.

[0074] According to one embodiment, the symbols are bins and the desymbolization is debinarization.

[0075] According to one embodiment, the information value is a sequence of syntax elements that represent the video.

[0076] According to one embodiment, the information values ​​are neural network parameters.

[0077] One embodiment according to the present invention creates a method for arithmetically coding a sequence of information values ​​into an arithmetic coding bitstream, the method comprising: symbolizing the information values ​​into a symbol string to obtain a sequence of symbols; subdividing, for each symbol, a current interval defining a current version of a coding state of the arithmetic encoder according to a probability estimate for the respective symbol; selecting a subinterval from among a plurality of subintervals according to a symbol value of the respective symbol to obtain an updated version of a coding state of the arithmetic encoder for encoding a next symbol of the sequence of symbols defined by the selected subinterval; and arithmetically coding the sequence of symbols by renormalizing encoder internal parameters defining the coding state during the duration of the bitstream; and providing entry point information in the bitstream that allows resuming arithmetic decoding of the bitstream after a predetermined entry point.

[0078] The method according to this embodiment is based on the same considerations as the encoding device described above. Furthermore, this disclosed embodiment may optionally be supplemented by any other features, functions and details disclosed herein in relation to the encoding device, both individually and in combination.

[0079] One embodiment according to the invention creates a method for arithmetically decoding a sequence of information values ​​from a bitstream, the method comprising: deriving entry point information from the bitstream; for each symbol of the bitstream, determining a subinterval out of a plurality of subintervals into which the current interval is subdivided according to a current version of a coding state of an arithmetic decoder, a probability estimate for each symbol, estimating a symbol value for each symbol based on the selected subinterval; renormalizing and updating decoder-internal parameters defining the coding state by using the bitstream and the selected subinterval to obtain an updated version of the coding state of the arithmetic decoder for decoding a next symbol of the sequence of symbols; restarting the arithmetic decoding of the bitstream from the predetermined entry point onwards by arithmetically decoding the sequence of symbols from the bitstream using the entry point information; and deriving the information values ​​from the sequence of symbols by de-symbolization.

[0080] The method according to this embodiment is based on the same considerations as the decoding device described above. Furthermore, this disclosed embodiment may optionally be supplemented by any other features, functions and details disclosed herein in relation to the decoding device, individually or in combination.

[0081] An embodiment according to the invention provides for creating a computer program having a program code which, when executed on a computer, performs a method according to any of the above described embodiments.

[0082] One embodiment in accordance with the present invention creates a bitstream that is generated using an arithmetic encoder according to any of the embodiments described herein.

[0083] One embodiment according to the invention produces an arithmetic decoder for arithmetically decoding neural network parameters from a bitstream, the arithmetic decoder being configured to: arithmetically decode a sequence of symbols from the bitstream by using context-adaptive arithmetic decoding, including: selecting, for context-adaptively decoded symbols of the sequence of symbols, a context model from a plurality of context models, each context model having a probability estimate associated therewith; arithmetically decoding the context-adaptively decoded symbols using the selected context model; and adapting the probability estimates of the plurality of context models to actual symbol statistics using previously decoded symbols of the sequence of symbols; deriving the neural network parameters from the sequence of symbols by de-symbolization; and initializing, at the beginning of the bitstream and / or at one or more entry points within the bitstream, for each of a set of one or more context models, possibly all, but possibly only some of the plurality, a probability estimate associated with the respective context model based on context model information in the bitstream.

[0084] According to one embodiment, the arithmetic decoder is configured to adapt the probability estimates of the multiple context models to actual symbol statistics using previously decoded symbols of the sequence of symbols by generating, for each context model, a probability estimate associated with the respective context model based on previously context-adaptively decoded symbols of the sequence of symbols for which the respective context model was selected.

[0085] According to one embodiment, the arithmetic decoder is configured to adapt probability estimates of a plurality of context models to actual symbol statistics using previously decoded symbols of the sequence of symbols by deriving a first hypothesis for the probability estimates to adapt to the actual symbol statistics with a first adaptive agility controllable by a first agility parameter, and to set, for each of a set of one or more context models at the beginning of the bitstream and / or at one or more entry points within the bitstream, a first hypothesis and a first agility parameter associated with the respective context model based on context model information in the bitstream.

[0086] According to one embodiment, the arithmetic decoder is configured to adapt probability estimates of a plurality of context models to actual symbol statistics using previously decoded symbols of the sequence of symbols by deriving a second hypothesis for the probability estimate to adapt to the actual symbol statistics with a second adaptive agility controllable by a second agility parameter, wherein the probability estimate is determined by an average of the first and second hypotheses; and to set, at the beginning of the bitstream and / or at one or more entry points within the bitstream, for each of a set of one or more context models, a second hypothesis and a second agility parameter associated with the respective context model based on context model information in the bitstream.

[0087] According to one embodiment, the context model information in the bitstream includes a table entry index into a table of value quadruplets for defining the first and second hypotheses and the first and second agility parameters, and the arithmetic decoder is configured to use the table entry index to select one quadruplet from the table and use the one quadruplet to set the first and second hypotheses and the first and second agility parameters.

[0088] According to one embodiment, the number of value quadruplets for defining the first and second hypotheses and the first and second agility parameters is between 8 and 10. See the table below, where there are 9 lines / quadlets:

[0089] According to one embodiment, the quadruplets of values ​​for defining the first and second hypotheses and the first and second agility parameters correspond to one of three, four, or five mutually distinct settings of the first and second agility parameters, see the table below where there are (1,4), (2,6), (0,5), or (3,5).

[0090] According to one embodiment, the symbols are bins, the de-symbolization is de-binarization, and the quadruplets of values ​​for defining the first and second hypotheses and the first and second agility parameters are a first set of three quadruplets (e.g., cp. 1,4,0,0; 1,4,95,1519; and 1,4,-41,-654), all of which set the first agility parameter to a first value and the second agility parameter to a second value corresponding to a lower adaptive agility than the first value; According to the first quadruplet, the first and second hypotheses correspond to equal probability, according to the second quadruplet, the first and second hypotheses correspond to the first bin value being more likely than the second bin value, and according to the third quadruplet, the first and second hypotheses correspond to the second bin value being more likely than the first bin value. The first three quadruplets and the second three quadruplets (e.g., cp. 2,6,95,1519; 2,6,30,482; and 2,6,-21,-337), all of which indicate that the first agility parameter is a lower adaptive agility parameter than the first value. and the second agility parameter is set to a third value corresponding to a higher adaptive agility than the second value, and the second agility parameter is set to a fourth value corresponding to a lower adaptive agility than the second value, and according to the first and second quadruplets, the first hypothesis and the second hypothesis correspond to the first bin value being more likely than the second bin value, and according to the third quadruplet, the first hypothesis and the second hypothesis correspond to the second bin value being more likely than the first bin value; and two quadruplets (e.g., cp. 3,5,0,0 and 3,5,30,482), all of which According to the first quadruplet, the first agility parameter is set to a fourth value corresponding to adaptive agility lower than the third value and higher than the second value, and the second agility parameter is set to a sixth value corresponding to adaptive agility lower than the second value and higher than the fourth value; according to the first quadruplet, the first hypothesis and the second hypothesis correspond to equal probability; according to the second quadruplet, the first hypothesis and the second hypothesis correspond to the first bin value being more likely than the second bin value; two quadruplets and one quadruplet (e.g., cp.0,5,0,0), according to the quadruplet, the first agility parameter is set to a seventh value corresponding to adaptive agility greater than the first value, according to the quadruplet, the first hypothesis and the second hypothesis include one quadruplet corresponding to equal probability.

[0091] According to one embodiment, the symbols are bins, the de-symbolization is de-binarization, and the arithmetic decoder represents each hypothesis by a signed integer for each of the first and second hypotheses, where the signed integer is zero indicating equal probability, greater than zero indicating that the first bin value is more likely than the second bin value, and less than zero indicating that the second bin value is more likely than the first bin value; and for each context model, a first agility parameter is controlled for the first hypothesis and a second agility parameter is controlled for the second hypothesis. and adapting the probability estimates of the plurality of context models to the actual symbol statistics using previously decoded symbols of the sequence of symbols by increasing the signed integer if the currently decoded bin has a first bin value and decreasing the signed integer if the currently decoded bin has a second bin value by an amount controlled by a variance parameter, the amount being greater for smaller first and second agility parameters, respectively, wherein the probability estimate is determined by an average of the first and second signed integers.

[0092] According to one embodiment, the arithmetic decoder is configured to use a transition table to determine the amount of increment and decrement.

[0093] According to one embodiment, the arithmetic decoder is configured to use the same transition table for the first hypothesis and the second hypothesis.

[0094] According to one embodiment, the arithmetic decoder is configured to determine the amount of increase and decrease using the transition table by looking up the transition table at an entry indexed by a table index determined by a signed integer to obtain the transition step, and dividing the transition step size by a power of two that depends on the first and second adaptation parameters, respectively, where the transition step determines the amount.

[0095] According to one embodiment, the signed integer is represented by a two's complement representation with n bits, n being larger for the second hypothesis than for the first hypothesis (8 and 12 in the example of the detailed description below), i.e. the "scale" of the second hypothesis is larger / finer compared to the first hypothesis, and therefore the agility is reduced if the transition step is the same, and the arithmetic decoder obtains the transition step by dividing the transition step size by a power of 2 that depends affinely linearly (4+shift0 and shift1 respectively) on the first and second adaptation parameters (thus the adaptation step that determines the adaptation agility is determined by the agility parameters), while 2 n-m A signed integer divided by 2 on the other hand m-1 The transition step is configured to determine the amount of increase and decrease using a transition table by looking up the transition table at entries indexed by the sum of n and a signed integer (m=5 in the example of the detailed description below) divided by m. The dependency may be such that if the first agility parameter and the second agility parameter were the same, then the agility would be the same between the first and second hypotheses; in the above, this is done by "4+", i.e., by adding the difference in n between the first and second hypotheses to the agility parameter of the first hypothesis.

[0096] According to one embodiment, the transition steps are stored in transition table entries and are monotonically increasing or decreasing.

[0097] One embodiment of the present invention produces an arithmetic encoder for arithmetically coding neural network parameters into a bitstream, the arithmetic encoder being configured to: derive a sequence of symbols from the neural network parameters by symbolization; arithmetically code the sequence of symbols into the bitstream by using context-adaptive arithmetic coding, including: selecting, for context-adaptively coded symbols of the sequence of symbols, a context model from a plurality of context models, each having a probability estimate associated therewith; arithmetically coding the context-adaptively coded symbols using the selected context model; and adapting the probability estimates of the plurality of context models to actual symbol statistics using previously coded symbols of the sequence of symbols; and initializing, at the beginning of the bitstream and / or at one or more entry points within the bitstream, for each of a set of one or more context models, a probability estimate associated with the respective context model according to context model information signaled in the bitstream.

[0098] According to one embodiment, the arithmetic encoder is configured to adapt the probability estimates of the multiple context models to actual symbol statistics using previously coded symbols of the sequence of symbols by generating, for each context model, a probability estimate associated with the respective context model based on previously context-adaptively coded symbols of the sequence of symbols for which the respective context model was selected.

[0099] According to one embodiment, the arithmetic encoder is configured to adapt probability estimates of a plurality of context models to actual symbol statistics using previously encoded symbols of the sequence of symbols by deriving a first hypothesis for the probability estimates to adapt to the actual symbol statistics with a first adaptive agility controllable by a first agility parameter, and to set, at the beginning of the bitstream and / or at one or more entry points within the bitstream, for each of a set of one or more context models, the first hypothesis and the first agility parameter associated with the respective context model according to context model information signaled in the bitstream.

[0100] According to one embodiment, the arithmetic encoder is configured to adapt the probability estimates of a plurality of context models to the actual symbol statistics using previously coded symbols of the sequence of symbols by deriving a second hypothesis for the probability estimates to adapt to the actual symbol statistics with a second adaptive agility controllable by a second agility parameter and forming an average of the first and second hypotheses, and to set, at the beginning of the bitstream and / or at one or more entry points within the bitstream, for each of a set of one or more context models, the second hypothesis and the second agility parameter associated with the respective context model in accordance with context model information signaled in the bitstream.

[0101] According to one embodiment, the context model information in the bitstream includes a table entry index into a table of value quadruplets for defining the first and second hypotheses and the first and second agility parameters, and the arithmetic encoder is configured to use the table entry index to select one quadruplet from the table and use the one quadruplet to set the first and second hypotheses and the first and second agility parameters.

[0102] According to one embodiment, the number of value quadruplets for defining the first and second hypotheses and the first and second agility parameters is between 8 and 10. See the table below, where there are 9 lines / quadlets:

[0103] According to one embodiment, the quadruplets of values ​​for defining the first and second hypotheses and the first and second agility parameters correspond to one of three, four, or five mutually distinct settings of the first and second agility parameters, see the table below where there are (1,4), (2,6), (0,5), or (3,5).

[0104] According to one embodiment, the quadruplets of values ​​for defining the first and second hypotheses and the first and second agility parameters are three first quadruplets (e.g., cp. 1,4,0,0; 1,4,95,1519; and 1,4,-41,-654), all of which set the first agility parameter to a first value and the second agility parameter to a second value corresponding to an adaptive agility lower than the first value, and according to the first quadruplet, the first and second hypotheses are chosen with equal probability. According to the second quadruplet, the first hypothesis and the second hypothesis correspond to the first bin value being more likely than the second bin value, and according to the third quadruplet, the first hypothesis and the second hypothesis correspond to the second bin value being more likely than the first bin value. The first three quadruplets and the second three quadruplets (e.g., cp. 2,6,95,1519; 2,6,30,482; and 2,6,-21,-337), all of which indicate that the first agility parameter is associated with adaptive agility lower than the first value and adaptive agility higher than the second value, the second agility parameter is set to a third value corresponding to a lower adaptive agility than the second value; the first and second quadruplets indicate that the first hypothesis and the second hypothesis correspond to the first bin value being more likely than the second bin value; and the third quadruplet indicates that the first and second hypotheses correspond to the second bin value being more likely than the first bin value. A second triplet of quadruplets and two quadruplets (e.g., cp. 3,5,0,0 and 3,5,30,482), all of which indicate that the first hypothesis and the second hypothesis correspond to the second bin value being more likely than the first bin value. The agility parameter is set to a fourth value corresponding to adaptive agility lower than the third value and higher than the second value, and the second agility parameter is set to a sixth value corresponding to adaptive agility lower than the second value and higher than the fourth value, and according to the first quadruple, the first hypothesis and the second hypothesis correspond to equal probability, and according to the second quadruple, the first hypothesis and the second hypothesis correspond to the first bin value being more likely than the second bin value. Two quadruples and one quadruple (e.g., cp.0,5,0,0), according to the quadruplet, the first agility parameter is set to a seventh value corresponding to adaptive agility greater than the first value, according to the quadruplet, the first hypothesis and the second hypothesis include one quadruplet corresponding to equal probability.

[0105] According to one embodiment, the symbols are bins, the symbolization is binarization, and the arithmetic encoder represents each hypothesis by a signed integer for each of the first and second hypotheses, where the signed integer is zero indicating equal probability, greater than zero indicating that the first bin value is more likely than the second bin value, and less than zero indicating that the second bin value is more likely than the first bin value; and for each context model, a first agility parameter is controlled for the first hypothesis and a second agility parameter is controlled for the second hypothesis. and adapting the probability estimates of the plurality of context models to the actual symbol statistics using previously coded symbols of the sequence of symbols by increasing the signed integer if the currently coded bin has a first bin value and decreasing the signed integer if the currently coded bin has a second bin value by an amount controlled by the agility parameter, the amount being larger the smaller the first agility parameter and the second agility parameter, respectively, wherein the probability estimate is determined by an average of the first and second signed integers.

[0106] According to one embodiment, the arithmetic encoder is configured to use a transition table to determine the amount of increment and decrement.

[0107] According to one embodiment, the arithmetic encoder is configured to use the same transition table for the first hypothesis and the second hypothesis.

[0108] According to one embodiment, the arithmetic encoder is configured to determine the amount of increase and decrease using the transition table by looking up the transition table at an entry indexed by a table index determined by a signed integer to obtain the transition step, and dividing the transition step size by a power of two that depends on the first and second adaptation parameters, respectively, where the transition step determines the amount.

[0109] According to one embodiment, the signed integer is represented by a two's complement representation with n bits, n being larger for the second hypothesis than for the first hypothesis (8 and 12 in the example of the detailed description below, i.e. the "scale" of the second hypothesis is larger / finer compared to the first hypothesis, and therefore the agility is reduced if the transition step is the same), and the arithmetic encoder obtains the transition step by dividing the transition step size by a power of 2 that depends affinely linearly (4+shift0 and shift1 respectively) on the first and second adaptation parameters to obtain the transition step (thus the adaptation step that determines the adaptation agility is determined by the agility parameters), while 2 n-m A signed integer divided by 2 on the other hand m-1 The transition step is configured to determine the amount of increase and decrease using a transition table by looking up the transition table at entries indexed by the sum of n and a signed integer (m=5 in the example of the detailed description below) divided by m. The dependency may be such that if the first agility parameter and the second agility parameter were the same, then the agility would be the same between the first and second hypotheses; in the above, this is done by "4+", i.e., by adding the difference in n between the first and second hypotheses to the agility parameter of the first hypothesis.

[0110] According to one embodiment, the transition steps are stored in transition table entries and are monotonically increasing or decreasing.

[0111] The arithmetic encoder, the arithmetic decoder, the method for arithmetic coding, the method for arithmetic decoding, the computer programs implementing these methods, the arithmetic encoder for arithmetically coding neural network parameters, and the bitstream may optionally be supplemented individually and in combination with any of the features, functions and details disclosed in this specification (in the entire document).

[0112] Preferred embodiments of the present application are described below on the basis of the drawings. [Brief explanation of the drawings]

[0113] [Figure 1] 1 is a flowchart of a method 100 for encoding according to one embodiment. [Figure 2] 2 is a flowchart of a method 200 for decoding according to one embodiment. [Figure 3] 1 shows a schematic diagram of encoding and decoding parameters that occur during encoding and decoding of an arithmetic bitstream according to an embodiment, illustrating different possibilities for what can be signaled as entry point information in the bitstream. DETAILED DESCRIPTION OF THE INVENTION

[0114] FIG. 1 illustrates a method 100 for arithmetically coding a sequence of integer values ​​into an arithmetic coding bitstream, according to one embodiment.

[0115] The method includes, in step 101, symbolizing information values ​​into a symbol string to obtain a sequence of symbols, and, in step 102, arithmetically encoding the sequence of symbols.

[0116] The arithmetic coding includes, for each symbol, subdividing a current interval defining a current version of a coding state of the arithmetic encoder according to a probability estimate for the respective symbol in step 103. The arithmetic coding further includes selecting a subinterval from the plurality of subintervals according to a symbol value of the respective symbol in step 104. In this way, an updated version of the coding state of the arithmetic encoder defined by the selected subinterval is obtained, which is further used to encode the next symbol in the sequence of symbols. The arithmetic coding further includes, in step 105, renormalizing encoder-internal parameters defining the coding state during the continuation of the bitstream.

[0117] After performing the arithmetic coding, the method 100 further provides the bitstream with entry point information at step 106 that allows for restarting arithmetic decoding of the bitstream from a predetermined entry point onwards.

[0118] However, it should be noted that the method 100 may optionally be supplemented by any of the features, functions, and details disclosed herein, individually or in combination.

[0119] FIG. 2 illustrates a method 200 for arithmetically decoding a sequence of information values ​​from a bitstream, according to one embodiment.

[0120] The method includes, in step 201, deriving entry point information from the bitstream, and, in step 202, for each symbol of the bitstream, resuming arithmetic decoding of the bitstream from a predetermined entry point by arithmetically decoding a sequence of symbols from the bitstream using the entry point information. Arithmetically decoding the sequence of symbols from the bitstream includes, in step 203, determining a current version of a coding state of the arithmetic decoder and a subinterval of a plurality of subintervals into which the current interval is subdivided according to a probability estimate for each symbol. Arithmetic decoding further includes, in step 204, estimating a symbol value for each symbol based on the selected subinterval. Arithmetic decoding further includes, in step 205, renormalizing and updating decoder-internal parameters defining the coding state by using the bitstream and the selected subinterval to obtain an updated version of the coding state of the arithmetic decoder for decoding a next symbol of the sequence of symbols.

[0121] After performing arithmetic decoding, method 200 further comprises, in step 206, deriving information values ​​from the sequence of symbols by desymbolization.

[0122] However, it should be noted that the method 200 may optionally be supplemented by any of the features, functions, and details disclosed herein, individually or in combination.

[0123] FIG. 3 is a schematic diagram of the encoding and decoding parameters evolved during encoding and decoding, showing what can be signaled as entry point information in the bitstream for use in the decoding process.

[0124] At the beginning of encoding and decoding, at the beginning of the bitstream, or at the tip where the bitstream will be fully decoded from then on, the following variables may be initialized in a default manner: interval width R in both the encoder and decoder, interval offset L in the encoder, context model state (optionally if context adaptivity is applied) in both the encoder and decoder, and optionally quantization state (if dependent quantization is used). Pointer V may be derived by the decoder from the first few bits in the bitstream. From the beginning inward, the parameters evolve, and the decoder must run the entire decoding process to know which state occurs at any entry point. According to an embodiment, the encoder is responsible for generating this information and communicating it to the decoder along with the bitstream, thereby enabling the decoder to start decoding directly at one of the entry points.

[0125] Each bitstream entry point can be seen as a snapshot of the state of the arithmetic encoder, or more precisely, as a snapshot of the arithmetic decoding process executed at the encoder to simulate that state at the encoder site. In particular, a bitstream entry point simulates a snapshot of the state of the context model, or the quantization state of the decoding process occurring during decoding of that bitstream. Therefore, the indicated variables are signaled within the bitstream for a given entry point. They can be signaled in a header inserted before the bitstream, following the bitstream, or during the entry point itself, etc. Some of the parameters required for decoding may be set in the encoder and decoder synchronously at the entry point, so that information about them does not need to be included in the entry point information.

[0126] In the following, one embodiment is described for arithmetically coding a sequence of information values ​​into an arithmetic coding bitstream, e.g., into a bitstream containing encoded neural network data, e.g., into an NNR bitstream. Entry point information that allows for resuming arithmetic decoding of the bitstream after a given entry point is shown in Table 1 in the form of pseudocode. Naturally, the details described herein also clarify the corresponding arithmetic decoding of the bitstream thus generated.

[0127] [Table 1]

[0128] According to FIG. 1, information values ​​are symbolized into a symbol string to obtain a sequence of symbols, the sequence of symbols is arithmetically coded by selecting, for each symbol, a subinterval from a plurality of subintervals, wherein a current interval defining a current version of a coding state of the arithmetic encoder is subdivided according to a probability estimate for each symbol, the selection being made according to the symbol value of the respective symbol to obtain an updated version of a coding state of the arithmetic encoder for encoding the next symbol of the sequence of symbols, defined by the selected subinterval, and renormalizing the encoder internal parameters defining the coding state during the continuation of the bitstream.

[0129] The bitstream is provided with entry point information that allows restarting the arithmetic decoding of the bitstream after a given entry point.

[0130] As can be seen from Table 1, the entry point information that allows restarting the arithmetic decoding of the bitstream after a given entry point includes:

[0131] cabac_offset_list specifies a list of values ​​used to initialize the variable IvlOffset at the beginning of the entry point. This is illustratively shown coded as an 8-bit unsigned integer, but could be coded differently; in this example, the variables IvlCurrRange and IvlOffset are used to define the status, or coding state, of the arithmetic decoding engine. That is, the coding state of the arithmetic decoder is defined by decoder internal parameters including an interval width parameter indicating the width of the interval and a pointer to the interval, where IvlCurrRange indicates the width of the interval and IvlOffset indicates the pointer to the interval.

[0132] dq_state_list specifies a list of values ​​used to initialize the variable stateId at the beginning of the entry point, which is illustratively shown as coded as a 3-bit unsigned integer, but could be coded differently, where stateId is used as a variable indicating the state of the state machine used to perform dependent quantization.

[0133] bit_offset_delta1 specifies the first element of the list BitOffsetList, which is illustratively shown as being coded using an unsigned 11th order exponential-Golomb code, but could also be coded differently.

[0134] bit_offset_delta2 specifies an element other than the first element of the list BitOffsetList as a delta from the previous element of the list BitOffsetList, which is illustratively shown as being coded using a signed 7th order exponential-Golomb code.

[0135] The variable BitOffsetList is a list of bit offsets that are used to set the bitstream pointer position to the beginning of the entry point.

[0136] More precisely, Table 1 relates to one embodiment in which dependent quantization is used to derive a sequence of information values from a sequence of unquantized values, i.e., using a state machine, and the entry point information includes the quantization state that appears in the state machine up to a given entry point, i.e., stateId.

[0137] Table 2 illustratively shows in the form of pseudocode a method of arithmetically decoding a bitstream after a given entry point using the entry point information in Table 1.

[0138]

Table 2

[0139] In Table 2, the variable entryPointOffset indicates whether an entry point exists for decoding. If an entry point exists, it is used to indicate the entry point offset. GetEntryPointIdx(tensorDimensions[], i, scan) returns -1 if index i does not point to the first position of the entry point. If index i points to the first position of the entry point, it returns the entry point index within the tensor.

[0140] GetEntryPointIdx(tensorDimensions[], i, scan) returns -1 if index i does not point to the first position of the entry point. If index i points to the first position of the entry point, it returns the entry point index within the tensor. To determine the position and index of the entry point, the following applies. Set the variable w to Prod(tensorDimensions) / tensorDimensions[0]. Set the variable epIdx to i / (w*(4<<scan)) - 1. If i>0 and i%(w*(4<<scan)) is equal to 0, then index i points to the first position of the entry point, and the entry point index is equal to epIdx. Otherwise, the index i does not point to the first position of the entry point.

[0141] dq_flag specifies whether the quantization method is dependent scalar quantization or uniform quantization. dq_flag equal to 0 indicates that the uniform quantization method is used. dq_flag equal to 1 indicates that the dependent scalar quantization method is used. If dq_flag is not present, it is inferred to be 0.

[0142] set_bit_pointer sets the bitstream pointer position. init_prob_est_param() invokes the initialization process for the probability estimation parameters.

[0143] scan_order specifies the block scan order for parameters with two or more dimensions according to the table below. 0: No block scan 1:8 x 8 blocks 2:16×16 blocks 3:32 x 32 blocks 4: 64x64 blocks

[0144] That is, in the examples provided by Tables 1 and 2, the entry point information includes a bitstream pointer, i.e., set_bit_pointer, to a predetermined bit in the bitstream that will be read next after resuming arithmetic decoding of the bitstream after the predetermined entry point. Here, the entry point information enables resuming arithmetic decoding of the bitstream after two or more entry points, i.e., NumBlockRowsMinus1 entry points. The entry points may be defined to be located between row changes when scanning a tensor row-wise, or when scanning regularly, such as by completely scanning one dimension and then scanning the next row along that dimension. The bitstream pointer to a predetermined bit in the bitstream is signaled in the bitstream in the form of an offset relative to the previous entry point, as derivable from the addition in Table 1, BitOffsetList[j] = BitOffsetList[j-1] + bit_offset_delta2.

[0145] At each entry point j, the coding states are initialized using cabac_offset_list[j] and dq_state_list[j] for the interval pointer and dependent quantization states, respectively. Here, according to this embodiment, the interval width is set to a constant or predefined fixed value at each entry point, i.e., the default value, here illustratively 256, and IvlCurrRange and IvlOffset are both 16-bit register precision in this example. However, the explicit bit precision of the latter is merely an example and can be changed.

[0146] 4. Further Embodiments and Aspects Further aspects and embodiments according to the present invention are described below, which can be used individually or in combination with any other embodiment disclosed herein.

[0147] Furthermore, the embodiments disclosed in this section may be optionally supplemented by any other features, functions, and details disclosed herein, both individually and in combination.

[0148] The entry point structure for arithmetic coding according to one embodiment of the present invention will now be further described.

[0149] background Context-based adaptive binary arithmetic coding (CABAC) is a method for encoding and decoding a sequence of symbols. In the binarization stage, each symbol in such a sequence is converted into a sequence of one or more binary symbols (bins), and the concatenation of these bin sequences is arithmetically coded into a bitstream. In the context modeling stage, probability estimates are associated with each bin for arithmetic coding based on previously coded bins and context information. A decoder has the same information available and can reproduce the same probability estimates to perform arithmetic decoding.

[0150] A review of the binarization and context modeling stages of CABAC Binarization and context modeling are highly application-dependent. For example, the video compression standards H.265 / HEVC and H.266 / VVC both employ CABAC as their arithmetic coding engines, but have very different binarization and context modeling stages, tailored to the types of syntax elements encountered. However, most applications employing CABAC maintain a set of so-called context models, and binarization and context modeling correspond to unambiguously associating each bin with a specific context model from this set. Context models are typically implemented as backward-adaptive probability estimators that take into account only bins previously associated with a context model.

[0151] Below we consider three examples of different concepts for implementing a context model according to one embodiment of the present invention.

[0152] [Table 3]

[0153] Further details about the implementation can be found in the respective resources in the row "Notes".

[0154] Note: The committee draft of the ISO / IEC 15938 Part 17 standard contains some incorrect formulas in the description of the probability estimator, which need to be corrected as follows to result in a correct "NNR" context model implementation: In section 11.3.4.3.2.1, the formula "valMps=pStateIdx0+pStateIdx0>=0" shall be replaced with "valMps=16*pStateIdx0+pStateIdx1>=0". In section 11.3.4.3.2.1, the formula "ivlLpsRange=rps_table[(abs((pStateIdx0+pStateIdx1)>>7))+qRangeIdx]" shall be replaced with "ivlLpsRange=rps_table[(abs((16*pStateIdx0+pStateIdx1)>>7))+qRangeIdx]". In section 11.3.4.3.2.2, the formula "pStateIdx0+=sign*(transition_table[16+(sign*pStateIdx0>>3)]>>shift0)" shall be replaced with "pStateIdx0+=sign*(transition_table[16+(sign*pStateIdx0>>3)]>>(4+shift0))". In section 11.3.4.3.2.2, the formula "pStateIdx1+=sign*(transition_table[16+(sign*pStateIdx0>>7)]>>shift1)" shall be replaced with "pStateIdx1+=sign*(transition_table[16+(sign*pStateIdx1>>7)]>>shift1)".

[0155] According to one embodiment of the present invention, the probability estimation process is not modified, so only the variables representing the state of the context model are of interest. It should be noted that this embodiment of the present invention can also be applied to other types of probability estimators not described herein.

[0156] Additionally, in embodiments of the present invention, there may be bins that are not associated with a context model, such as known bypass bins or termination bins.

[0157] A detailed review of a probability estimator according to one embodiment of the present invention from the committee draft of the ISO / IEC 15938 Part 17 standard. Each context model maintains, for example, four variables: shift0, shift1, pStateIdx0, and pStateIdx1. The variables pStateIdx0 and pStateIdx1 are signed 8-bit and 12-bit integers, respectively, in two's complement representation.

[0158] The probability estimates for arithmetic encoding or decoding can be derived, for example, from pStateIdx0 and pStateIdx1 and the width of the current coding interval ivlCurrRange of the arithmetic encoder or decoder, which is a value in the interval [256,510], as follows:

[0159] valMps = 16 * pStateIdx0 + pStateIdx1 >= 0 qRangeIdx = ivlCurrRange & 0xe0 rlps_table = [128, 112, 97, 84, 74, 65, 57, 50, 45, 39, 34, 30, 27, 23, 20, 18, 15, 14, 12, 11, 10, 9, 7, 7, 5, 5, 4, 4, 3, 3, 2, 2, 142, 125, 108, 93, 82, 72, 63, 56, 50, 43, 38, 33, 30, 26, 22, 20, 17, 16, 13, 12, 11, 10, 8, 8, 6, 6, 5, 5, 3, 3, 2, 2, 156, 137, 119, 103, 90, 79, 70, 61, 55, 48, 42, 37, 33, 28, 24, 22, 19, 17, 15, 13, 12, 11, 9, 9, 6, 6, 5, 5, 4, 4, 2, 2, 171, 150, 130, 112, 99, 87, 76, 67, 60, 52, 46, 40, 36, 31, 27, 24, 21, 19, 16, 15, 13, 12, 10, 10, 7, 7, 6, 6, 4, 4, 3, 3, 185, 162, 141, 121, 107, 94, 82, 73, 65, 56, 50, 43, 39, 34, 29, 26, 22, 21, 17, 16, 14, 13, 11, 11, 8, 8, 6, 6, 4, 4, 3, 3, 199, 175, 152, 131, 115, 101, 89, 78, 70, 61, 54, 47, 42, 36, 31, 28, 24, 22, 19, 17, 15, 14, 12, 12, 8, 8, 7, 7, 5, 5, 3, 3, 213, 187, 163, 140, 123, 108, 95, 84, 75, 65, 58, 50, 45, 39, 33, 30, 26, 24, 20, 18, 16, 15, 13, 13, 9, 9, 7, 7, 5, 5, 3, 3, 228, 200, 174, 150, 132, 116, 102, 90, 80, 70, 62, 54, 48, 42, 36, 32, 28, 26, 22, 20, 18, 16, 14, 14, 10, 10, 8, 8, 6, 6, 4, 4] ivlLpsRange = rps_table[(abs((16 * pStateIdx0 + pStateIdx1) >> 7)) + qRangeIdx]

[0160] The variable valMps is the value of the more probable symbol (MPS), and the probability estimate of the less probable symbol (LPS) is p LPS =ivlLpsRange / ivlCurrRange. Therefore, the probability estimate of the dominant symbol is simply p MPS =1-p LPS is.

[0161] The probability of the next bin being equal to 1, Pr(bin==1), can be derived, for example, as follows:

[0162] If valMps==1:Pr(bin==1)=p MPS

[0163] Otherwise (if valMps==0): Pr(bin==1)=p LPS

[0164] Note that these probability estimates do not occur directly in the encoder or decoder, since only the subinterval widths associated with the MPS and LPS are needed for arithmetic encoding or decoding.

[0165] At the start of encoding, both pStateIdx0 and pStateIdx1 are LPS = 0, which corresponds approximately to 0.5.

[0166] After encoding or decoding a bin with value binVal, pStateIdx0 and pStateIdx1 are updated, for example, using variables shift0 and shift1 according to the following formula:

[0167] transition_table=[2512,2288,2064,1840,1616,1392,1168,944,720,560,46 4,368,272,208,144,80,64,64,64,64,64,64,64,64,64,64,64,64,64,64,64,0]

[0168] sign=2*binVal-1

[0169] pStateIdx0+=sign*(transition_table[16+(sign*pStateIdx0>>3)]>>(4+shift0))

[0170] pStateIdx1+=sign*(transition_table[16+(sign*pStateIdx1>>7)]>>shift1)

[0171] As can be seen from the equations, larger values ​​of shift0 or shift1 result in smaller modifications to the values ​​of pStateIdx0 or pStateIdx1, respectively, which corresponds to smaller changes in the resulting probability estimates, and smaller values ​​correspond to larger changes. Therefore, shift0 and shift1 can be considered as agility parameters that control the update agility of pStateIdx0 and pStateIdx1. Typical values ​​of (shift0, shift1) are, for example, (1,4), (0,0), (0,5), (1,1), (1,2), (2,4), (2,6), (3,4), or (3,5), and which values ​​for shift0 and shift1 are most appropriate depends on the statistical properties of the sequence of bins to be coded.

[0172] The underlying principle is known as the exponentially weighted moving average (EWMA).

[0173] A review of the arithmetic coding engine of CABAC (M-coder) according to an embodiment of the present invention will be further described.

[0174] The M-coder according to one embodiment maintains two unsigned B-bit integer variables V and R in the decoder. Usually, B is set to 9, but other choices are possible. At the beginning of decoding, V is initialized with the first B bits of the arithmetic-coded bit stream (advancing the bit stream pointer by B bits), and R is set to an initial value such as 2 B -2. Note that the bit stream may include additional bits such as high-level syntax before arithmetic coding begins. R represents the width of the current coding interval and can only contain values within the interval [2 B-1 , 2 B -1]. The coding interval is given as [0, R], and V represents a pointer to the coding interval. That is, V < R must always hold. For decoding bin b, the probabilities for the two possible values of b are estimated using known techniques such as context modeling and probability estimation such as exponentially weighted moving average (EWMA). Based on the estimated probability associated with bin b, two subintervals I L = [0, R L and I R = [R L , R] are derived, where I<匡 L is associated with one possible value of bin b and I R is associated with the other possible value of bin b. For example, I R is usually associated with the less probable symbol (LPS) based on the estimated probability, and I L is associated with the more probable symbol (MPS).

[0175] The decoding of a bin is performed, for example, as follows (the enumerated list corresponds to the ordered steps):

[0176] V <R L in the case of: 1.I L The symbol value associated with is the decoded value of b. 2. R is R L is set to otherwise (V>=R L ): 1.I R The symbol value associated with is the decoded value of b. 2.R is RR L is set to 3. V is for VR L is set to

[0177] Then, R<2 B-1 In this case, the renormalization is performed, for example, as follows: 1. R is set to 2*R. 2. V is set to 2*V+ReadOneBit(). 3. R<2 B-1 If so, continue with step 1 (otherwise, renormalization is performed).

[0178] The function ReadOneBit() returns the next bit in the bitstream and advances the bitstream pointer by one bit.

[0179] The above bin decoding procedure is also known as the normal coding mode. Additionally, there are known bypass and exit bin coding modes.

[0180] The concept according to one embodiment of the present invention will now be further explained.

[0181] Arithmetic decoding is a sequential process that can be difficult to parallelize. A concept according to one embodiment of the present invention introduces a method that allows a decoder to start decoding at a predefined position in the bitstream by defining so-called entry points. In this way, multiple decoders can operate in parallel to decode different parts of a single bitstream (starting from different entry points).

[0182] Entry Point The entry point can be seen as a snapshot of the state of the arithmetic decoder before decoding a particular bin, i.e. it consists of the following variables: aR bV c. A pointer to the next bit in the bitstream d. CABAC decoder state (e.g., the state of the context model and potentially further related variables such as the state of the dependent quantization scheme)

[0183] Such an entry point is a B-1 bit (integer [2 B-1 ,2 B −1]), requires B bits for V, and additional bits to store c and d. To store c, in one embodiment, it may be appropriate to employ a variable length code such as an Exponential-Golomb code, since small pointer values ​​result in short binary code words. However, since there may be many context models, and each context model may require multiple bits to represent its internal state, storing d may require a huge number of bits.

[0184] Notably, in one embodiment, entry points can also be created for existing CABAC bitstreams without the need to re-encode the bitstream.

[0185] In a preferred embodiment, one or more entry points are generated for the CABAC bitstream: for the first entry point, a pointer to the next bit in the bitstream c is stored as the difference between the bit position where arithmetic decoding begins and the bit position of the first entry point.

[0186] In another preferred embodiment, this difference is further reduced by B (since the first B bits are loaded into V during initialization of the arithmetic decoder).

[0187] In another preferred embodiment, all entry points after the first entry point (if any) store a pointer to the next bit in bitstream c. relative to the previous entry point's pointer to the next bit in bitstream c. For example, the difference between the pointers to the next bit in bitstream c. of the current entry point and the previous entry point is stored.

[0188] In another preferred embodiment, the integer value to be stored indicating a pointer to the next bit in the bitstream c (e.g., given as a difference as described in the previous preferred embodiment) is encoded in the bitstream using an unsigned exponential-Golomb code of degree k (e.g., corresponding to the data type ue(k) as defined in the committee draft of ISO / IEC 15938 Part 17).

[0189] In another preferred embodiment, the pointer to the next bit in bitstream c. that is involved in the calculation of the integer representing the next bit in bitstream c. (as described in the previous preferred embodiment) is truncated to a multiple of 8 before performing the calculation. The resulting difference is therefore also a multiple of 8 and can be divided by 8 to get the byte offset (instead of the bit offset). Additionally, three additional bits are encoded in the entry point that indicate the bit position in the current byte of the current entry point.

[0190] In a preferred embodiment, the encoding and decoding includes a known dependent quantization scheme in which the state variables are maintained (such as that used in the Committee Draft of ISO / IEC 15938 Part 17). To indicate the value of the dependent quantization state, a fixed number of bits are stored with each entry point. For example, in the case of the Committee Draft of ISO / IEC 15938 Part 17, a 3-bit variable indicating one of eight possible values of the dependent quantization state is stored.

[0191] A further description is given of the double-difference signaling of the pointer to the next bit in the bitstream c according to one embodiment.

[0192] In applications where the entry points are arranged approximately equidistantly within the bitstream, the difference between the pointers to the next bit within the bitstream c between adjacent entry points has approximately the same value. In such a situation, for all but the first two entry points, it may be more efficient to signal the "differences of differences" of these bit positions. More precisely, consider three adjacent entry points ep1, ep2, and ep3 having associated pointers to the next bit within the bitstream c given as bitPos1, bitPos2, and bitPos3 respectively. Also assume that bitPos1 < bitPos2 < bitPos3 holds. Then, for the approximately equally spaced entry points ep1, ep2, and ep3, the differences d1 = bitPos2 - bitPos1 and d2 = bitPos3 - bitPos2 have approximately the same value. That is, the difference of differences d2 - d1 has a small magnitude. Therefore, in a preferred embodiment, the position of the next bit within the bitstream c for the entry point ep3 is signaled as the "double difference" dd3 = d2 - d1. Note that dd3 can be negative. Since the magnitude of dd3 tends to be smaller than the magnitude of d3, it may be possible to signal it with fewer bits within the bitstream, for example, when using a Golomb code with an exponent.

[0193] In another preferred embodiment, the difference d1, which indicates the location of the next bit in the bitstream c. of the entry point ep2, is signaled as an unsigned exponential-Golomb code with parameter k=11.

[0194] In another preferred embodiment, the difference dd3 (expressed as a "double difference" as described above), which indicates the position of the next bit in the bitstream c. of entry point ep3, is signaled as a signed exponential-Golomb code with parameter k=7.

[0195] In another preferred embodiment, the difference and / or double difference values ​​(as described above) indicating the position of the next bit in the bitstream c are not coded in the bitstream, but instead are calculated based on entry points derived by the encoder and decoder at predetermined positions. For example, the first entry point ep1 is not signaled in the bitstream (instead, it is derived in the encoder and decoder), but is used to calculate the difference or double difference for signaling ep2.

[0196] An entry point with encoder modification according to one embodiment of the present invention will now be further described.

[0197] As explained in the previous section, storing d in the entry point can require a significant number of bits. This section describes several concepts that reduce the size of the entry point by allowing encoder modifications.

[0198] Modifications to the state of the CABAC encoder and decoder (d.) according to an embodiment are further described.

[0199] According to one embodiment, the state of the CABAC encoder and decoder d is set to a predefined value at the beginning of the entry point, so there is no need to store d at the entry point, however this may result in a larger arithmetically coded bitstream due to reduced probability model accuracy.

[0200] For example, the state of the CABAC encoder and decoder at the beginning of the entry point may be set according to one of the following rules (each according to one embodiment): 1. The CABAC encoder and decoder states are reset to their default values. 2. The CABAC encoder and decoder states are initialized using information signaled in the bitstream. 3. The state of the CABAC encoder and decoder is set to the previously saved state of the CABAC encoder and decoder.

[0201] Recall that the state of the CABAC encoder and decoder can consist of a set of context models and additional variables. It is usually reasonable to apply different rules to different parts of the state of the CABAC encoder and decoder. For example, according to one embodiment, Rule 1 can be applied to the context models, while for other variables, such as the state of the dependent quantization scheme, it may be more appropriate to apply no rule at all. That is, the other variables are stored with the entry point. Or, in another example, according to one embodiment, Rule 1 or Rule 2 is applied to a first subset of the context models, and Rule 2 or Rule 3 is applied to a second (disjoint) subset of the context models.

[0202] An example based on Rule 1 according to one embodiment is as follows:

[0203] Rule 1 is perhaps the simplest way to avoid the need to store d along with the entry point. However, it can also result in a substantially increased arithmetically coded bitstream, since the probability model precision is significantly reduced.

[0204] An example based on Rule 2 according to one embodiment is as follows:

[0205] Rule 2, for example, can apply only to the context models, while other rules (or no rules) can apply to all other variables (if any) associated with the CABAC encoder and decoder state (e.g., the state of dependent quantization schemes, etc.). For example, initialization for some or all context models can be signaled in the bitstream somewhere before the first entry point. At the beginning of each entry point, this initialization information is used to derive the initial state of each context model.

[0206] An example based on Rule 3 according to one embodiment is as follows:

[0207] Storing and loading context model states is known, for example, from the context of wavefront parallelism in the video compression standard H.265 / HEVC. Encoders and decoders store context model states at predefined locations and make them available for loading these states at other predefined locations. This concept can be combined with the entry point concept, where saved context model states are loaded at the beginning of an entry point.

[0208] The modification of the variable R in the CABAC encoder and decoder according to the embodiment will now be further described.

[0209] The variable R is [2 B-1 ,2 B -1]. Therefore, to store R at the entry point, B-1-2 B-1 +1 = 2 B Since there is -1 value, (B - 1) bits are required. Signaling of R at the entry point can be avoided, in one embodiment, by encoding and decoding so-called dummy bins before creating the entry point. This is done by using the normal bin encoding procedure where R L is set to 2 B-1 and selecting the symbol value associated with I L as the encoding or decoding symbol. Note that such dummy bins are only required when R > 2 B-1 . After such dummy bins, the variable R is always 2 B-1 and thus need not be stored at the entry point which stores (B - 1) bits. Since the dummy bin is always the Most Probable Symbol (MPS), it generates an average fraction of the bits in a bit stream that is less than 1 bit which is less than the stored (B - 1) bits. This technique also affects the possible values of the variable V since V < R must always hold. As a result, V < 2 B-1 also holds and V is signaled in a bit stream having (B - 1) bits instead of B bits and one more bit can be stored at the entry point.

[0210] In a preferred embodiment, R is set to 2 B-1 at the start of the entry point (in the encoder and decoder) and V is stored as a fixed length variable having (B - 1) bits.

[0211] The application of the entry point to the compression of a 2D array of values according to one embodiment of the present invention is further described.

[0212] Many applications encode 2D arrays of values ​​into bitstreams. For example, image or video compression schemes encode pictures represented as 2D arrays of samples, or compression schemes for neural network parameters reshape parameter tensors into 2D structures in order to encode the parameter values ​​they contain. Such schemes typically apply block partitioning techniques to the 2D arrays, and they also define the order of the resulting blocks for encoding or decoding. Furthermore, such schemes may also include lossy operations, such as quantization, so that the decoded and reconstructed 2D array is not identical to the original 2D array, but is usually similar (e.g., in a visual sense, in the case of video compression).

[0213] For example, consider a video or neural network parameter compression scheme that subdivides a 2D array (such as an image plane or a reshaped parameter tensor) into blocks of size N×N and defines a scan order in which the blocks are ordered to encode them into a bitstream. Such a scheme forms rows and columns of N×N blocks. For example, the ordering within a row can start with the leftmost block and proceed to the right. The ordering across rows can simply start with the top row and proceed downward. This scan order, also known as raster scanning, is desirable because it allows the decoder to decode all rows in parallel. In this case, a single entry point is required at the beginning of each row. However, it should be noted that in one embodiment, the decoder may require information about neighboring blocks to be able to decode the current block. For example, video compression algorithms typically have access to information about neighboring blocks (e.g., to the left or above) so that they can decode the current block. In this case, the decoder must also ensure that these blocks are decoded before decoding of the current block can take place.

[0214] Furthermore, parallel decoding may be useful for some 2D arrays but not necessary for others. For example, it may be useful for large 2D arrays but not necessary for small 2D arrays. In a preferred embodiment, the presence or absence of an entry point for a 2D array is signaled in the bitstream.

[0215] In a preferred embodiment, the state of the context model (per Rule 3) is stored after the first block of each row. At the beginning of each block row, one entry point is created, and the state of the context model is set to the stored value that exists after encoding or decoding the first block of the adjacent row above.

[0216] In another preferred embodiment, the state of the context model (according to rule 3) is stored after the first block of the first row: one entry point is created at the beginning of each block row, and the state of the context model is set to the same value that exists after encoding or decoding the first block of the top row.

[0217] The signaling of shared context model initialization information for entry points, according to one embodiment, will now be further described.

[0218] Before CABAC decoding begins, the states of all context models must be set to predefined values. This can be, for example, default values ​​or can be achieved by using a more advanced context model initialization procedure. For example, the committee draft of the ISO / IEC 15938 Part 17 compression standard for neural networks (including the amended formulas described above) employs two state variables (pStateIdx0 and pStateIdx1) per context model and associates shift parameters (shift0 and shift1) with each of them. The shift parameters control the adaptive agility of the state variable updates based on the EWMA estimator. At the start of arithmetic encoding or decoding, the two state variables of each context model are set to 0, corresponding to an initial probability estimate of 0.5. Furthermore, there are nine predefined value pairs for the initialization of the two shift parameters (see the array ShiftParameterSet), and which of the nine value pairs is used for the shift parameters is signaled in the bitstream for each context model.

[0219] The effect of distinguishing between different initial values ​​for the state variables of the context model is usually quite limited because the underlying EWMA estimator quickly adapts to the statistics of the bin sequence associated with the context model. However, if there are entry points and the context model is initialized at each entry point, this effect becomes more significant. Therefore, it can be beneficial to allow for a set of different values ​​for the initialization of the state variables of the context model.

[0220] In a preferred embodiment, a list of 4-tuples is defined, with each 4-tuple representing the initial values ​​of two state variables and two shift parameters of a context model. For NNR, the value of the 4-tuple is associated with a 4-tuple of variables (shift0, shift1, pStateIdx0, pStateIdx1). Before arithmetic coding begins, an integer index is signaled in the bitstream for each context model, indicating which of the 4-tuples is used to initialize the respective context model.

[0221] In another preferred embodiment, the index indicating the 4-tuple used to initialize the context model is signaled using a variable length code that assigns shorter code words to more frequently used 4-tuples.

[0222] For example, the following list of 4-tuples (shift0, shift1, pStateIdx0, pStateIdx1) can be used:

[0223] [Table 4]

[0224] Note that the same concepts can also be used with the context model of VVC, where the two state variables and two agility parameters use the same variable names as NNR (shift0, shift1, pStateIdx0, pStateIdx1). Note that these variables serve the same purpose in VVC as NNR, although their exact behavior differs. Therefore, the concepts presented here can also be applied to VVC when the 4-tuple is appropriately adapted.

[0225] In conclusion, embodiments in accordance with the present invention provide an improved trade-off between compression performance and visual quality, and low coding latency resulting in improved coding efficiency. Some embodiments also provide further coding efficiency.

[0226] Different inventive embodiments and aspects are described, for example, in the sections "Introduction", "Sample Adaptive Offset", "Classification of PSAO", "Decoder", "Encoder", and "Some Comments", and features, functions, and details from the "Sample Adaptive Offset" section may optionally be incorporated into any of the other embodiments.

[0227] However, features, functions and details described in any other section may also be optionally introduced into an embodiment according to the present invention.

[0228] Also, the embodiments described in the above sections can be used individually or can be supplemented by any of the features, functions and details of the other sections.

[0229] It should also be noted that the individual aspects described herein can be used individually or in combination, and thus details can be added to each individual aspect without adding details to another one of the aspects.

[0230] In particular, the embodiments are also set forth in the claims, which may optionally be supplemented by any of the features, functions and details described herein, both individually and in combination.

[0231] It should also be noted that this disclosure explicitly or implicitly describes features that can be used in video encoders (devices for providing an encoded representation of an input video signal) and video decoders (devices for providing a decoded representation of a video signal based on the encoded representation of the video signal). Thus, any of the features described herein can be used in the context of a video encoder and in the context of a video decoder.

[0232] Furthermore, features and functions disclosed herein with respect to a method may also be used in an apparatus (configured to perform such function). Furthermore, any feature and function disclosed herein with respect to an apparatus may also be used in the corresponding method. In other words, the method disclosed herein may be supplemented by any of the features and functions described with respect to the apparatus.

[0233] Additionally, any of the features and functionality described herein may be implemented in hardware or software, or using a combination of hardware and software, as described in the "Alternative Implementations" section.

[0234] Alternative Embodiments Although some aspects are described in the context of an apparatus, it will be apparent that these aspects also represent a description of a corresponding method, with blocks or devices corresponding to method steps or features of method steps. Similarly, aspects described in the context of a method step also represent a description of a corresponding block or item or feature of a corresponding apparatus. Some or all of the method steps may be performed by (or using) a hardware apparatus, such as, for example, a microprocessor, a programmable computer, or an electronic circuit. In some embodiments, one or more of the most important method steps may be performed by such an apparatus.

[0235] Depending on the requirements of a particular implementation, embodiments of the present invention can be implemented in hardware or software. Implementation can be performed using a digital storage medium, such as a floppy disk, DVD, Blu-ray, CD, ROM, PROM, EPROM, EEPROM, or flash memory, that stores electronically readable control signals that cooperate (or can cooperate) with a programmable computer system to perform the respective methods. Thus, the digital storage medium can be computer-readable.

[0236] Some embodiments according to the present invention include a data carrier having electronically readable control signals that can cooperate with a programmable computer system to perform one of the methods described herein.

[0237] Generally, embodiments of the present invention can be implemented as a computer program product having program code operable to perform one of the methods when the computer program product is run on a computer. The program code may, for example, be stored on a machine-readable carrier.

[0238] Other embodiments comprise the computer program for performing one of the methods described herein, stored on a machine readable carrier.

[0239] In other words, an embodiment of the inventive methods is, therefore, a computer program having a program code for performing one of the methods described herein, when the computer program runs on a computer.

[0240] A further embodiment of the inventive method is therefore a data carrier (or digital storage medium, or computer readable medium) comprising recorded thereon a computer program for performing one of the methods described herein. The data carrier, digital storage medium, or recording medium is typically tangible and / or non-transitory.

[0241] A further embodiment of the inventive method is therefore a data stream or a sequence of signals representing the computer program for performing one of the methods described herein, The data stream or the sequence of signals may for example be arranged to be transferred via a data communication connection, for example via the Internet.

[0242] A further embodiment comprises a processing means, for example a computer, or a programmable logic device, configured to or adapted to perform one of the methods described herein.

[0243] A further embodiment comprises a computer having installed thereon the computer program for performing one of the methods described herein.

[0244] Further embodiments according to the invention include an apparatus or system configured to transfer (e.g., electronically or optically) a computer program implementing one of the methods described herein to a receiver. The receiver may be, for example, a computer, a mobile device, a memory device, etc. The apparatus or system may, for example, comprise a file server for transferring the computer program to the receiver.

[0245] In some embodiments, a programmable logic device (e.g., a field programmable gate array) may be used to perform some or all of the functions of the methods described herein. In some embodiments, a field programmable gate array may cooperate with a microprocessor to perform one of the methods described herein. In general, the methods are preferably performed by any hardware apparatus.

[0246] The devices described herein may be implemented using a hardware device, or using a computer, or using a combination of a hardware device and a computer.

[0247] The devices described herein, or any components of the devices described herein, may be implemented at least in part in hardware and / or software.

[0248] The methods described herein may be implemented using a hardware apparatus, or using a computer, or using a combination of a hardware apparatus and a computer.

[0249] Any of the methods described herein or components of the apparatus described herein may be implemented at least in part by hardware and / or by software.

[0250] The embodiments described herein are merely illustrative of the principles of the present invention. It is understood that modifications and variations of the arrangements and details described herein will be apparent to those skilled in the art. It is therefore intended to be limited only by the scope of the appended claims, and not by the specific details presented by the description and illustration of the embodiments herein.

[0251] Subsequently, embodiments are presented in which the above-described embodiments, or, put another way, the above-described embodiments represent particular examples having specific details, and these specific details represent extensions of the embodiments that can be used individually or in combination to further specify the subsequently presented embodiments.

[0252] Text in brackets represents optional features, examples, and explanations. Optional features, examples explained with respect to features of a particular embodiment may also apply to equivalent or similar features of other embodiments.

[0253] 1. An arithmetic encoder for arithmetically encoding a sequence of information values ​​into an arithmetic coding bitstream, comprising: symbolizing the information values ​​into a symbol string to obtain a sequence of symbols; For each symbol, selecting a subinterval from among a plurality of subintervals, wherein a current interval defining a current version of a coding state of the arithmetic encoder is subdivided according to the probability estimates of the respective symbols, according to the symbol values ​​of the respective symbols, to obtain an updated version of the coding state of the arithmetic encoder for encoding a next symbol of the sequence of symbols, defined by the selected subinterval; renormalizing encoder internal parameters defining the coding state during the duration of the bitstream; arithmetically encoding the sequence of symbols by providing entry point information to the bitstream that allows restarting arithmetic decoding of the bitstream after a predetermined entry point; an arithmetic encoder configured to:

[0254] 2. An arithmetic encoder as described in embodiment 1, wherein the entry point information includes information about the coding state of the arithmetic decoder that occurs in the arithmetic decoder when the arithmetic decoder decodes the bitstream up to the specified entry point.

[0255] 3. An arithmetic encoder as described in embodiment 2, wherein the arithmetic encoder is configured to perform the arithmetic decoding of the bitstream to determine the information regarding the coding state of the arithmetic decoder.

[0256] 4. An arithmetic encoder as described in embodiment 2 or 3, wherein the coding state of the arithmetic decoder is defined by decoder internal parameters including an interval width parameter indicating the width of the interval and a pointer to the interval, and the information regarding the coding state of the arithmetic decoder includes the value of the pointer.

[0257] 5. An arithmetic encoder as described in embodiment 4, wherein the arithmetic encoder is configured to perform the arithmetic decoding of the bitstream and set the value of the pointer included in the information regarding the coding state of the arithmetic decoder to be equal to the current value of the pointer that appears when arithmetically decoding the bitstream up to the predetermined entry point.

[0258] 6. An arithmetic encoder as described in embodiment 2 or 3, wherein the coding state of the arithmetic decoder is defined by decoder internal parameters including an interval width parameter indicating the width of the interval and a pointer to the interval, and the information regarding the coding state of the arithmetic decoder includes the value of the interval width parameter.

[0259] 7. The arithmetic encoder performing the arithmetic decoding of the bitstream and setting the value of the interval width parameter included in the information regarding the coding state of the arithmetic decoder to be equal to the current value of the interval width parameter that appears when arithmetically decoding the bitstream up to the predetermined entry point; or setting the value of the interval width parameter included in the information regarding the coding state of the arithmetic decoder equal to the current value of the interval width parameter that occurs when arithmetically coding the sequence of symbols up to the predetermined entry point. 7. An arithmetic encoder as recited in embodiment 6, configured to:

[0260] 8. The coding state of the arithmetic decoder is defined by decoder internal parameters including an interval width parameter indicating the width of the interval and a pointer to the interval, and the information about the coding state of the arithmetic decoder includes the value of the pointer (e.g., what value the pointer takes at the given entry point), but does not include the value of the interval width parameter, and the arithmetic encoder: setting the value of the interval width parameter included in the information about the coding state of the arithmetic decoder equal to a predetermined value, and using the predetermined value for the interval width parameter when resuming the arithmetic coding of the sequence of symbols from the predetermined entry point onwards; or before resuming the arithmetic coding of the sequence of symbols from the predetermined entry point onwards, pre-interrupting the arithmetic coding of the sequence of symbols by arithmetically coding a symbol of a predetermined symbol value immediately preceding the predetermined entry point, and setting the value of the interval width parameter included in the information on the coding state of the arithmetic decoder to be equal to the current value of the interval width parameter that appears when arithmetically coding the sequence of symbols up to the predetermined entry point including the symbol of the predetermined symbol value. 4. An arithmetic encoder according to embodiment 2 or 3, configured to:

[0261] 9. An arithmetic encoder as described in any of embodiments 1 to 8, wherein the entry point information includes a bitstream pointer to a predetermined bit in the bitstream, the predetermined bit being the next bit to be read after resuming the arithmetic decoding of the bitstream from the predetermined entry point onwards.

[0262] 10. An arithmetic encoder as described in embodiment 9, wherein the bitstream pointer to the given bit within the bitstream is signaled within the bitstream in the form of an offset relative to the beginning of the bitstream.

[0263] 11. An arithmetic encoder as described in embodiment 9, wherein the bitstream pointer to the specified bit within the bitstream is signaled within the bitstream in the form of an offset relative to the end of a run of the first bit of the bitstream, and the coding state of the arithmetic decoder for performing the arithmetic decoding of the bitstream is initialized based on the offset.

[0264] 12. An arithmetic encoder as described in embodiment 9, wherein the entry point information enables restarting arithmetic decoding of the bitstream after two or more entry points, and the bitstream pointer to the specified bit within the bitstream is signaled within the bitstream in the form of an offset relative to a previous entry point or relative to a predefined bitstream position associated with the specified entry point.

[0265] 13. An arithmetic encoder as described in embodiment 12, configured to identify the predefined bitstream position as a point between successive values ​​in the sequence of values ​​or by counting bits in the bitstream.

[0266] 14. The bitstream pointer to the predetermined bit in the bitstream is Bitwise and / or Integer n multiples of bits (e.g., n>1 and n=8), 13. The arithmetic encoder of embodiment 12, wherein the arithmetic encoder is stored in

[0267] 15. An arithmetic encoder as described in embodiment 12, wherein the bit position within the bitstream of the previous entry point is signaled within the bitstream.

[0268] 16. An arithmetic encoder described in any of embodiments 12 to 15, wherein the bitstream pointer is signaled within the bitstream differentially with respect to a further bitstream pointer included in the entry point information for pointing to a further predetermined bit within the bitstream, the further predetermined bit being the next to be read after resuming the arithmetic decoding of the bitstream from the preceding entry point onwards.

[0269] 17. An arithmetic encoder as described in any one of embodiments 9 to 15, wherein the bitstream pointers are signaled within the bitstream using variable length codes.

[0270] 18. An arithmetic encoder according to any one of embodiments 9 to 17, wherein the bitstream pointers are signaled within the bitstream using exponential-Golomb codes, preferably unsigned exponential-Golomb codes.

[0271] 19. An arithmetic encoder as described in any of embodiments 9 to 18, wherein the predetermined entry point is either a third entry point relative to the beginning of the bitstream or an entry point following the third entry point, and the bitstream pointer to the predetermined bit in the bitstream is signaled within the bitstream in the form of a difference between the offset relative to the previous entry point and the offset of the previous entry point relative to a further entry point preceding the previous entry point.

[0272] 20. An arithmetic encoder as described in embodiment 19, wherein the bitstream pointers are signaled within the bitstream using signed exponential-Golomb codes.

[0273] 21. An arithmetic encoder as described in embodiment 19 or 20, wherein the bit position within the bitstream of the previous entry point is signaled within the bitstream using an unsigned exponential-Golomb code.

[0274] 22. The arithmetic encoder of embodiment 21, wherein the exponential-Golomb code parameter of the exponential-Golomb code has a value of 11.

[0275] 23. An arithmetic encoder as described in any one of embodiments 19 to 21, wherein the bitstream pointers are signaled within the bitstream using signed exponential-Golomb codes.

[0276] 24. The arithmetic encoder of embodiment 23, wherein the exponential-Golomb code parameter of the exponential-Golomb code has a value of 7.

[0277] 25. The arithmetic encoder configured to use context-adaptive arithmetic coding for arithmetically encoding the sequence of symbols, said using comprising: selecting a context model from a plurality of context models, each having a probability estimate associated therewith, for a context-adaptively coded symbol of the sequence of symbols; and adapting the probability estimates of the plurality of context models to actual symbol statistics using previously coded symbols of the sequence of symbols; An arithmetic encoder as described in any of embodiments 1 to 24, wherein the entry point information indicates, for each of a set of one or more predetermined context models, a predetermined probability estimate for the respective predetermined context model, and the arithmetic encoder is configured to use the predetermined probability estimate when resuming the adaptation of the probability estimates of the plurality of context models to the respective predetermined context model.

[0278] 26. The arithmetic encoder configured to use context-adaptive arithmetic coding for arithmetically encoding the sequence of symbols, said using comprising: selecting a context model from a plurality of context models, each having a probability estimate associated therewith, for a context-adaptively coded symbol of the sequence of symbols; and adapting the probability estimates of the plurality of context models to actual symbol statistics using previously coded symbols of the sequence of symbols; the arithmetic encoder is configured, for each of a set of one or more predetermined context models, to set the probability estimates for the respective predetermined context model at the predetermined entry point to a default state, and the arithmetic encoder is configured to use the default state when resuming the adaptation of the probability estimates of the plurality of context models to the respective predetermined context model; or 26. An arithmetic encoder as described in any one of embodiments 1 to 25, wherein the arithmetic encoder is configured to, for each of a set of one or more predetermined context models, set the probability estimates for the respective predetermined context model at the predetermined entry point to a saved state that appears in a predetermined condition during arithmetic encoding of the sequence of symbols before the predetermined entry point, and the arithmetic encoder is configured to use the saved state when resuming the adaptation of the probability estimates of the plurality of context models to the respective predetermined context model.

[0279] 27. The arithmetic encoder configured to use dependent quantization to derive said sequence of information values ​​from a sequence of unquantized values ​​using a state machine; 27. An arithmetic encoder according to any one of embodiments 1 to 26, wherein the entry point information includes quantization states appearing in the state machine up to the predetermined entry point.

[0280] 28. An arithmetic encoder according to any one of embodiments 1 to 27, wherein the symbols are bins and the symbolization is binarization.

[0281] 29. An arithmetic encoder as described in any one of embodiments 1 to 28, wherein the information value is a sequence of syntax elements representing video.

[0282] 30. An arithmetic encoder according to any one of embodiments 1 to 29, wherein the information values ​​are neural network parameters.

[0283] 31. An arithmetic decoder for arithmetically decoding a sequence of information values ​​from a bitstream, comprising: deriving entry point information from the bitstream; For each symbol of the bitstream: determining a subinterval of a plurality of subintervals into which a current interval is subdivided according to probability estimates for the respective symbols based on a current version of a coding state of the arithmetic decoder, and inferring symbol values ​​for the respective symbols based on the selected subinterval; renormalizing and updating decoder-internal parameters defining the coding state by using the bitstream and the selected subinterval to obtain an updated version of the coding state of the arithmetic decoder for decoding a next symbol of the sequence of symbols; restarting arithmetic decoding of the bitstream from a predetermined entry point onwards by arithmetically decoding a sequence of symbols from the bitstream using the entry point information by deriving said information value from said sequence of symbols by desymbolization; an arithmetic decoder configured to:

[0284] 32. An arithmetic decoder as described in embodiment 31, configured to use the entry point information to determine a starting version of the coding state of the arithmetic decoder and use the starting state to start arithmetic decoding of the bitstream from the predetermined entry point onwards.

[0285] 33. An arithmetic decoder as described in embodiment 31 or 32, wherein the coding state of the arithmetic decoder is defined by decoder internal parameters including an interval width parameter indicating the width of the interval and a pointer to the interval, and the arithmetic decoder is configured to derive from the entry point information a start value of the pointer used to start the arithmetic decoding of the bitstream from the specified entry point onwards.

[0286] 34. An arithmetic decoder as described in any of embodiments 31 to 33, wherein the coding state of the arithmetic decoder is defined by decoder internal parameters including an interval width parameter indicating the width of the interval and a pointer to the interval, and the arithmetic decoder is configured to derive from the entry point information a start value of the interval width parameter used to start the arithmetic decoding of the bitstream from the specified entry point onwards.

[0287] 35. The coding state of the arithmetic decoder is defined by the decoder internal parameters including an interval width parameter indicating the width of the interval and a pointer to the interval, and the arithmetic decoder: deriving from the entry point information a starting value of the pointer used to start the arithmetic decoding of the bitstream from the predetermined entry point onwards; setting the value of the interval width parameter included in the information about the coding state of the arithmetic decoder equal to a predetermined value, and using the predetermined value for the interval width parameter to resume the arithmetic decoding of the sequence of symbols from the predetermined entry point onwards; 34. An arithmetic decoder according to any one of embodiments 31 to 33, configured to perform the following.

[0288] 36. The entry point information allows restarting arithmetic decoding of the bitstream after two or more entry points, and the arithmetic decoder: An arithmetic decoder as described in embodiment 35, configured to pre-interrupt the arithmetic decoding of the sequence of symbols at a subsequent predetermined entry point by arithmetically decoding a symbol of a predetermined symbol value immediately before the subsequent predetermined entry point before resuming the arithmetic decoding of the sequence of symbols from the subsequent predetermined entry point onwards.

[0289] 37. An arithmetic decoder as described in any of embodiments 31 to 36, configured to derive a bitstream pointer to a predetermined bit in the bitstream from the entry point information, and to use the predetermined bit as the next bit to be read after resuming the arithmetic decoding of the bitstream from the predetermined entry point onwards.

[0290] 38. An arithmetic decoder as described in embodiment 37, wherein the bitstream pointer to the given bit within the bitstream is signaled within the bitstream in the form of an offset relative to the beginning of the bitstream.

[0291] 39. The bitstream pointer to the predetermined bit in the bitstream is An arithmetic decoder as described in embodiment 37, wherein the coding state of the arithmetic decoder is signaled within the bitstream in the form of an offset relative to the rear end of a run of first bits of the bitstream, and based on the offset, the arithmetic decoder is configured to initialize the coding state of the arithmetic decoder when performing the arithmetic decoding of the bitstream beyond the start of the bitstream.

[0292] 40. An arithmetic decoder as described in embodiment 37, wherein the entry point information enables restarting arithmetic decoding of the bitstream after two or more entry points, and the bitstream pointer to the specified bit within the bitstream is signaled within the bitstream in the form of an offset relative to a previous entry point or relative to a predefined bitstream position associated with the specified entry point.

[0293] 41. An arithmetic decoder as described in embodiment 40, configured to identify the predefined bitstream position as a point between successive values ​​in the sequence of values ​​or by counting bits in the bitstream.

[0294] 42. The bitstream pointer to the predetermined bit in the bitstream is Bitwise and / or Integer n multiples of bits (e.g., n>1 and n=8), 41. The arithmetic decoder of embodiment 40, wherein the arithmetic decoder is stored in

[0295] 43. An arithmetic decoder as described in embodiment 42, wherein the bit position within the bitstream of the previous entry point is signaled within the bitstream.

[0296] 44. An arithmetic decoder described in any of embodiments 40 to 43, wherein the bitstream pointer is signaled within the bitstream differentially with respect to a further bitstream pointer included in the entry point information for pointing to a further predetermined bit within the bitstream, the further predetermined bit being the next to be read after resuming the arithmetic decoding of the bitstream from the preceding entry point onwards.

[0297] 45. An arithmetic decoder as described in any of embodiments 37 to 43, wherein the bitstream pointers are signaled within the bitstream using variable length codes.

[0298] 46. ​​An arithmetic decoder as described in any of embodiments 37 to 44, wherein the bitstream pointers are signaled within the bitstream using exponential-Golomb codes, preferably unsigned exponential-Golomb codes.

[0299] 47. An arithmetic decoder as described in any of embodiments 37 to 46, wherein the predetermined entry point is either a third entry point relative to the beginning of the bitstream or an entry point following the third entry point, and the bitstream pointer to the predetermined bit in the bitstream is signaled within the bitstream in the form of a difference between the offset relative to the previous entry point and the offset of the previous entry point relative to a further entry point preceding the previous entry point.

[0300] 48. An arithmetic decoder as described in embodiment 47, wherein the bitstream pointers are signaled within the bitstream using signed exponential-Golomb codes.

[0301] 49. An arithmetic decoder as described in embodiment 47 or 48, wherein the bit position within the bitstream of the previous entry point is signaled within the bitstream using an unsigned exponential-Golomb code.

[0302] 50. The arithmetic decoder of embodiment 49, wherein the exponential-Golomb code parameter of the exponential-Golomb code is a value of 11.

[0303] 51. An arithmetic decoder as described in any of embodiments 47 to 50, wherein the bitstream pointers are signaled within the bitstream using signed exponential-Golomb codes.

[0304] 52. The arithmetic decoder of embodiment 51, wherein the exponential-Golomb code parameter of the exponential-Golomb code is a value of 7.

[0305] 53. The arithmetic decoder comprises: configured to use context-adaptive arithmetic decoding for arithmetically decoding the sequence of symbols, said using comprising: selecting a context model from a plurality of context models, each having a probability estimate associated therewith, for a context-adaptively decoded symbol of the sequence of symbols; and adapting the probability estimates of the plurality of context models to actual symbol statistics using previously decoded symbols of the sequence of symbols; An arithmetic decoder as described in any of embodiments 31 to 52, wherein the entry point information indicates, for each of a set of one or more predetermined context models, a predetermined probability estimate for the respective predetermined context model, and the arithmetic decoder is configured to use the predetermined probability estimate when resuming the adaptation of the probability estimates of the plurality of context models to the respective predetermined context model.

[0306] 54. The arithmetic decoder comprises: configured to use context-adaptive arithmetic decoding for arithmetically decoding the sequence of symbols, said using comprising: selecting a context model from a plurality of context models, each having a probability estimate associated therewith, for a context-adaptively decoded symbol of the sequence of symbols; and adapting the probability estimates of the plurality of context models to actual symbol statistics using previously decoded symbols of the sequence of symbols; An arithmetic decoder as described in any of embodiments 31 to 53, wherein the arithmetic decoder is configured, for each of a set of one or more predetermined context models, to set the probability estimates for the respective predetermined context models at the predetermined entry point to a default state, and the arithmetic decoder is configured to use the default state when resuming the adaptation of the probability estimates of the plurality of context models for the respective predetermined context models.

[0307] 55. The entry point information allows restarting arithmetic decoding of the bitstream after two or more entry points, and the arithmetic decoder: 55. An arithmetic decoder as described in embodiment 54, configured to, for each of the set of one or more predetermined context models, set the probability estimates for the respective predetermined context model at a subsequent predetermined entry point to a saved state that appears under a predetermined condition during arithmetic decoding of the sequence of symbols before the subsequent predetermined entry point, and configured to use the saved state when resuming the adaptation of the probability estimates of the plurality of context models for the respective predetermined context model from the subsequent predetermined entry point onwards.

[0308] 56. The arithmetic decoder comprises: using dependent inverse quantization to derive a sequence of quantized values ​​from said sequence of information values ​​using a state machine; deriving from the entry point information a quantization state at which the dependent quantization is resumed after the predetermined entry point; An arithmetic decoder as described in any one of embodiments 31 to 55, configured to perform the following.

[0309] 57. An arithmetic decoder as described in any one of embodiments 31 to 56, wherein the symbols are bins and the de-symbolization is de-binarization.

[0310] 58. An arithmetic decoder as described in any one of embodiments 31 to 57, wherein the information value is a sequence of syntax elements representing video.

[0311] 59. An arithmetic decoder according to any one of embodiments 31 to 57, wherein the information values ​​are neural network parameters.

[0312] 60. An arithmetic decoder for arithmetically decoding neural network parameters from a bitstream, comprising: arithmetically decoding a sequence of symbols from the bitstream by using context adaptive arithmetic decoding, comprising: selecting a context model from a plurality of context models, each having a probability estimate associated therewith, for context adaptively decoded symbols of the sequence of symbols; arithmetically decoding the context adaptively decoded symbols using the selected context model; and adapting the probability estimates of the plurality of context models to actual symbol statistics using previously decoded symbols of the sequence of symbols; deriving the neural network parameters from the sequence of symbols by desymbolization; at the beginning of the bitstream and / or one or more entry points within the bitstream, for each of a set of one or more context models, initializing the probability estimates associated with the respective context model based on context model information in the bitstream; an arithmetic decoder configured to:

[0313] 61. For each context model, generating the probability estimate associated with the respective context model based on previously context-adaptively decoded symbols of the sequence of symbols for which the respective context model was selected; 61. An arithmetic decoder as described in embodiment 60, configured to adapt the probability estimates of the multiple context models to actual symbol statistics using previously decoded symbols of the sequence of symbols by:

[0314] 62. Adapting the probability estimates of the plurality of context models to the actual symbol statistics using previously decoded symbols of the sequence of symbols by deriving first hypotheses for the probability estimates to adapt to the actual symbol statistics with a first adaptive agility controllable by a first agility parameter; at the beginning of the bitstream and / or one or more entry points within the bitstream, for each of the set of one or more context models, setting the first hypothesis and the first agility parameter associated with the respective context model based on the context model information in the bitstream; 62. An arithmetic decoder as described in embodiment 60 or 61, configured to perform the following.

[0315] 63. Adapting the probability estimates of the plurality of context models to the actual symbol statistics using previously decoded symbols of the sequence of symbols by deriving a second hypothesis for the probability estimates to adapt to the actual symbol statistics with a second adaptive agility controllable by a second agility parameter, wherein the probability estimates are determined by an average of the first hypothesis and the second hypothesis; at the beginning of the bitstream and / or one or more entry points within the bitstream, for each of the set of one or more context models, setting the second hypothesis and the second agility parameter associated with the respective context model based on the context model information in the bitstream; 63. An arithmetic decoder as described in embodiment 62, configured to perform the following:

[0316] 64. An arithmetic decoder as described in embodiment 63, wherein the context model information in the bitstream includes a table entry index into a table of value quadruplets for defining the first hypothesis and the second hypothesis and the first agility parameter and the second agility parameter, and the arithmetic decoder is configured to use the table entry index to select one quadruplet in the table and use the one quadruplet to set the first hypothesis and the second hypothesis and the first agility parameter and the second agility parameter.

[0317] 65. An arithmetic decoder as described in embodiment 64, wherein the number of value quadruples for defining the first hypothesis and the second hypothesis and the first agility parameter and the second agility parameter is greater than or equal to 8 and less than or equal to 10.

[0318] 66. An arithmetic decoder as described in embodiment 64 or 65, wherein the quadruplets of values ​​for defining the first hypothesis and the second hypothesis and the first agility parameter and the second agility parameter correspond to one of three, four, or five mutually distinguishable settings of the first agility parameter and the second agility parameter.

[0319] 67. The symbols are bins, the de-symbolization is de-binarization, and the quadruples of values ​​for defining the first hypothesis and the second hypothesis and the first agility parameter and the second agility parameter are: a first three quadruplets, all of which indicate that the first agility parameter is set to a first value and the second agility parameter is set to a second value corresponding to adaptive agility lower than the first value; according to one quadruplet, the first hypothesis and the second hypothesis correspond to equal probability; according to a second quadruplet, the first hypothesis and the second hypothesis correspond to the first bin value being more likely than the second bin value; and according to a third quadruplet, the first hypothesis and the second hypothesis correspond to the second bin value being more likely than the first bin value; a second triplet of quadruplets, all of which indicate that the first agility parameter is set to a third value corresponding to adaptive agility lower than the first value and higher than the second value, and the second agility parameter is set to a fourth value corresponding to adaptive agility lower than the second value; and, according to the first and second quadruplets, the first and second hypotheses correspond to the first bin value being more likely than the second bin value; and, according to the third quadruplet, the first and second hypotheses correspond to the second bin value being more likely than the first bin value. two quadruplets, all of which set the first agility parameter to a fourth value corresponding to adaptive agility lower than the third value and higher than the second value, and set the second agility parameter to a sixth value corresponding to adaptive agility lower than the second value and higher than the fourth value, wherein, according to one quadruplet, the first hypothesis and the second hypothesis correspond to equal probability, and according to the second quadruplet, the first hypothesis and the second hypothesis correspond to the first bin value being more likely than the second bin value; one quadruplet, according to which the first agility parameter is set to a seventh value corresponding to an adaptive agility greater than the first value, and according to which the first hypothesis and the second hypothesis correspond to equal probability; 67. An arithmetic decoder according to any one of embodiments 64 to 66, comprising:

[0320] 68. The symbols are bins, the desymbolization is debinarization, and the arithmetic decoder For each of the first hypothesis and the second hypothesis, Representing each of the hypotheses by a signed integer, where zero indicates equal probability, greater than zero indicates a first bin value is more likely than a second bin value, and less than zero indicates the second bin value is more likely than the first bin value; for each context model, increasing the signed integer if the currently decoded bin has the first bin value and decreasing the signed integer if the currently decoded bin has the second bin value by an amount controlled by the first agility parameter for the first hypothesis and by the second agility parameter for the second hypothesis, the amount being larger the smaller the first agility parameter and the second agility parameter, respectively; adapted to adapt the probability estimates of the plurality of context models to actual symbol statistics using previously decoded symbols of the sequence of symbols by 68. An arithmetic decoder as in any of embodiments 63 to 67, wherein the probability estimate is determined by an average of the first signed integer and the second signed integer.

[0321] 69. The arithmetic decoder of embodiment 68, configured to determine the amount of increase and decrease using a transition table.

[0322] 70. The arithmetic decoder of embodiment 69, configured to use the same transition table for the first hypothesis and the second hypothesis.

[0323] 71. An arithmetic decoder as described in embodiment 69 or 70, configured to determine the amount of increase and decrease using the transition table by looking up the transition table at an entry indexed by a table index determined by the signed integer to obtain a transition step, and dividing the transition step size by a power of two that depends on the first adaptation parameter and the second adaptation parameter, respectively, and the transition step determines the amount.

[0324] 72. The signed integer is represented by a two's complement representation having n bits, n being greater for the second hypothesis than for the first hypothesis, and the arithmetic decoder divides the transition step size by a power of 2 that is affinely linearly dependent on the first adaptation parameter and the second adaptation parameter, respectively, to obtain a transition step, while 2 n-m The signed integer divided by 2 on the other hand m-1 71. An arithmetic decoder as described in embodiment 69 or 70, configured to determine the amount of the increase and decrease using the transition table by looking up the transition table at an entry indexed by the sum of the signed integer divided by , and the transition step determines the amount.

[0325] 73. The arithmetic decoder of embodiment 72, wherein the transition steps stored in the entries of the transition table are monotonically increasing or decreasing.

[0326] 74. A method (100) for arithmetically coding a sequence of information values ​​into an arithmetically coded bitstream, comprising: symbolizing the information values ​​into a symbol string to obtain a sequence of symbols (101); subdividing (103) a current interval defining a current version of a coding state of the arithmetic encoder according to a probability estimate for each symbol; selecting a subinterval from among a plurality of subintervals according to a symbol value of the respective symbol to obtain an updated version of the coding state of the arithmetic encoder for encoding a next symbol of the sequence of symbols defined by the selected subinterval (104); and renormalizing (105) encoder internal parameters defining said coding state during the duration of said bitstream; arithmetically encoding (102) the sequence of symbols by providing (106) entry point information to the bitstream that allows restarting arithmetic decoding of the bitstream after a predetermined entry point; A method comprising:

[0327] 75. The method of embodiment 74, wherein the entry point information includes information about the arithmetic decoder coding state that occurs in the arithmetic decoder when the arithmetic decoder decodes the bitstream up to the predetermined entry point.

[0328] 76. The method of embodiment 75, further comprising performing the arithmetic decoding of the bitstream to determine the information regarding the coding state of the arithmetic decoder.

[0329] 77. A method according to embodiment 75 or 76, wherein the coding state of the arithmetic decoder is defined by decoder internal parameters including an interval width parameter indicating the width of the interval and a pointer to the interval, and the information regarding the coding state of the arithmetic decoder includes the value of the pointer.

[0330] 78. The method of embodiment 77, further comprising: performing the arithmetic decoding of the bitstream; and setting the value of the pointer included in the information regarding the coding state of the arithmetic decoder to be equal to the current value of the pointer that appears when arithmetically decoding the bitstream up to the predetermined entry point.

[0331] 79. A method according to embodiment 75 or 76, wherein the coding state of the arithmetic decoder is defined by decoder internal parameters including an interval width parameter indicating the width of the interval and a pointer to the interval, and the information regarding the coding state of the arithmetic decoder includes the value of the interval width parameter.

[0332] 80. Performing the arithmetic decoding of the bitstream and setting the value of the interval width parameter included in the information about the coding state of the arithmetic decoder to be equal to the current value of the interval width parameter that appears when arithmetically decoding the bitstream up to the predetermined entry point; or setting the value of the interval width parameter included in the information regarding the coding state of the arithmetic decoder equal to the current value of the interval width parameter occurring when arithmetically coding the sequence of symbols up to the predetermined entry point; 80. The method of embodiment 79, further comprising:

[0333] 81. The coding state of the arithmetic decoder is defined by decoder internal parameters including an interval width parameter indicating a width of the interval and a pointer to the interval, and the information about the coding state of the arithmetic decoder includes a value of the pointer but does not include a value of the interval width parameter, and the method further comprises: setting the value of the interval width parameter included in the information about the coding state of the arithmetic decoder to be equal to a predetermined value, and using the predetermined value for the interval width parameter when resuming the arithmetic coding of the sequence of symbols from the predetermined entry point onwards; or before resuming the arithmetic coding of the sequence of symbols from the predetermined entry point onwards, pre-interrupting the arithmetic coding of the sequence of symbols by arithmetically coding a symbol of a predetermined symbol value immediately preceding the predetermined entry point, and setting the value of the interval width parameter included in the information on the coding state of the arithmetic decoder to be equal to the current value of the interval width parameter that appears when arithmetically coding the sequence of symbols up to the predetermined entry point including the symbol of the predetermined symbol value; 77. The method of embodiment 75 or 76, further comprising:

[0334] 82. A method according to any one of embodiments 74 to 81, wherein the entry point information includes a bitstream pointer to a predetermined bit in the bitstream, the predetermined bit being the next bit to be read after resuming the arithmetic decoding of the bitstream from the predetermined entry point onwards.

[0335] 83. The method of embodiment 82, wherein the bitstream pointer to the given bit within the bitstream is signaled within the bitstream in the form of an offset relative to the beginning of the bitstream.

[0336] 84. The method of embodiment 82, wherein the bitstream pointer to the predetermined bit in the bitstream is signaled in the form of an offset relative to the rear end of a run of the first bit of the bitstream, and the coding state of an arithmetic decoder for performing the arithmetic decoding of the bitstream is initialized based on the offset.

[0337] 85. The method of embodiment 82, wherein the entry point information enables restarting arithmetic decoding of the bitstream after two or more entry points, and the bitstream pointer to the given bit in the bitstream is signaled in the form of an offset relative to a previous entry point or relative to a predefined bitstream position associated with the given entry point.

[0338] 86. The method of embodiment 85, comprising identifying the predefined bitstream position as a point between successive values ​​in the sequence of values ​​or by counting bits in the bitstream.

[0339] 87. The bitstream pointer to the predetermined bit in the bitstream is: Bitwise and / or Integer n multiples of bits (e.g., n>1 and n=8), 86. The method of embodiment 85, wherein the data is stored in

[0340] 88. The method of embodiment 85, wherein the bit position within the bitstream of the previous entry point is signaled within the bitstream.

[0341] 89. A method according to any of embodiments 85 to 88, wherein the bitstream pointer is signaled within the bitstream differentially with respect to a further bitstream pointer included in the entry point information for pointing to a further predetermined bit within the bitstream, the further predetermined bit being the next to be read after resuming the arithmetic decoding of the bitstream from the preceding entry point onwards.

[0342] 90. A method according to any one of embodiments 82-89, wherein the bitstream pointers are signaled within the bitstream using variable length codes.

[0343] 91. A method according to any one of embodiments 82 to 90, wherein the bitstream pointers are signaled within the bitstream using exponential-Golomb codes, preferably unsigned exponential-Golomb codes.

[0344] 92. A method according to any of embodiments 82 to 91, wherein the predetermined entry point is either a third entry point relative to the beginning of the bitstream or an entry point following the third entry point, and the bitstream pointer to the predetermined bit in the bitstream is signaled within the bitstream in the form of a difference between the offset relative to the previous entry point and the offset of the previous entry point relative to a further entry point preceding the previous entry point.

[0345] 93. The method of embodiment 92, wherein the bitstream pointers are signaled within the bitstream using signed exponential-Golomb codes.

[0346] 94. The method of embodiment 92 or 93, wherein the bit position within the bitstream of the previous entry point is signaled within the bitstream using an unsigned exponential-Golomb code.

[0347] 95. The method of embodiment 94, wherein the exponential-Golomb code parameter of the exponential-Golomb code is a value of 11.

[0348] 96. A method according to any one of embodiments 92-95, wherein the bitstream pointers are signaled within the bitstream using signed exponential-Golomb codes.

[0349] 97. The method of embodiment 96, wherein the exponential-Golomb code parameter of the exponential-Golomb code is a value of 7.

[0350] 98. A method (200) for arithmetically decoding a sequence of information values ​​from a bitstream, comprising: deriving entry point information from the bitstream (201); For each symbol of the bitstream: determining (203) a subinterval of a plurality of subintervals into which the current interval is subdivided according to a current version of a coding state of an arithmetic decoder, a probability estimate for the respective symbol, and estimating (204) a symbol value for the respective symbol based on the selected subinterval; and renormalizing and updating decoder-internal parameters defining the coding state by using the bitstream and the selected subinterval to obtain an updated version of the coding state of the arithmetic decoder for decoding a next symbol in the sequence of symbols (205); restarting (202) the arithmetic decoding of the bitstream from a predetermined entry point onward by arithmetically decoding a sequence of symbols from the bitstream using the entry point information by deriving (206) the information value from the sequence of symbols by desymbolization; A method comprising:

[0351] 99. The method of embodiment 98, further comprising using the entry point information to determine a starting version of the coding state of the arithmetic decoder and using the starting state to begin arithmetic decoding of the bitstream from the predetermined entry point onwards.

[0352] 100. A method as described in embodiment 98 or 99, wherein the coding state of the arithmetic decoder is defined by decoder internal parameters including an interval width parameter indicating the width of the interval and a pointer to the interval, and the method further includes deriving from the entry point information a start value of the pointer used to start the arithmetic decoding of the bitstream from the specified entry point onwards.

[0353] 101. A method according to any of embodiments 98 to 100, wherein the coding state of the arithmetic decoder is defined by decoder internal parameters including an interval width parameter indicating the width of the interval and a pointer to the interval, and the method further comprises deriving from the entry point information a start value of the interval width parameter used to start the arithmetic decoding of the bitstream from the specified entry point onwards.

[0354] 102. The coding state of the arithmetic decoder is defined by decoder internal parameters including an interval width parameter indicating a width of the interval and a pointer to the interval, and the method further comprises: deriving from the entry point information a starting value of the pointer used to start the arithmetic decoding of the bitstream from the predetermined entry point onwards; setting the value of the interval width parameter included in the information about the coding state of the arithmetic decoder equal to a predetermined value, and using the predetermined value for the interval width parameter to resume the arithmetic decoding of the sequence of symbols from the predetermined entry point onwards; 101. The method of any of embodiments 98-100, further comprising:

[0355] 103. The entry point information allows restarting arithmetic decoding of the bitstream after two or more entry points, and the method further comprises: 103. The method of embodiment 102, further comprising: pre-interrupting the arithmetic decoding of the sequence of symbols at a subsequent predetermined entry point by arithmetically decoding a symbol of a predetermined symbol value immediately prior to the subsequent predetermined entry point before resuming the arithmetic encoding of the sequence of symbols from the subsequent predetermined entry point onwards.

[0356] 104. A method according to any one of embodiments 98 to 103, further comprising deriving a bitstream pointer to a predetermined bit in the bitstream from the entry point information, and using the predetermined bit as the next bit to be read after resuming the arithmetic decoding of the bitstream from the predetermined entry point onwards.

[0357] 105. The method of embodiment 104, wherein the bitstream pointer to the given bit within the bitstream is signaled within the bitstream in the form of an offset relative to the beginning of the bitstream.

[0358] 106. The bitstream pointer to the predetermined bit in the bitstream is: 105. The method of embodiment 104, wherein the coding state of the arithmetic decoder is further initialized based on the offset signaled within the bitstream relative to the rear end of a run of first bits of the bitstream when the method performs arithmetic decoding of the bitstream beyond the beginning of the bitstream.

[0359] 107. The method of embodiment 104, wherein the entry point information enables restarting arithmetic decoding of the bitstream after two or more entry points, and the bitstream pointer to the specified bit in the bitstream is signaled within the bitstream in the form of an offset relative to a previous entry point or relative to a predefined bitstream position associated with the specified entry point.

[0360] 108. The method of embodiment 107, comprising identifying the predefined bitstream position as a point between successive values ​​in the sequence of values ​​or by counting bits in the bitstream.

[0361] 109. The bitstream pointer to the predetermined bit in the bitstream is: Bitwise and / or Integer n multiples of bits (e.g., n>1 and n=8), 108. The method of embodiment 107, wherein the data is stored in

[0362] 110. The method of embodiment 107, wherein the bit position within the bitstream of the previous entry point is signaled within the bitstream.

[0363] 111. A method according to any one of embodiments 104 to 110, wherein the bitstream pointer is signaled within the bitstream differentially with respect to a further bitstream pointer included in the entry point information for pointing to a further predetermined bit within the bitstream, the further predetermined bit being the next to be read after resuming the arithmetic decoding of the bitstream from the preceding entry point onwards.

[0364] 112. A method according to any one of embodiments 104-111, wherein the bitstream pointers are signaled within the bitstream using variable length codes.

[0365] 113. A method according to any one of embodiments 104 to 112, wherein the bitstream pointers are signaled within the bitstream using exponential-Golomb codes, preferably unsigned exponential-Golomb codes.

[0366] 114. A method according to any of embodiments 104 to 113, wherein the predetermined entry point is either the third entry point relative to the beginning of the bitstream or an entry point following the third entry point, and the bitstream pointer to the predetermined bit in the bitstream is signaled within the bitstream in the form of a difference between the offset relative to the previous entry point and the offset of the previous entry point relative to a further entry point preceding the previous entry point.

[0367] 115. The method of embodiment 114, wherein the bitstream pointers are signaled within the bitstream using signed exponential-Golomb codes.

[0368] 116. The method of embodiment 114 or 115, wherein the bit position within the bitstream of the previous entry point is signaled within the bitstream using an unsigned exponential-Golomb code.

[0369] 117. The method of embodiment 116, wherein the exponential-Golomb code parameter of the exponential-Golomb code is a value of 11.

[0370] 118. A method according to any one of embodiments 114-117, wherein the bitstream pointers are signaled within the bitstream using signed exponential-Golomb codes.

[0371] 119. The method of embodiment 118, wherein the exponential-Golomb code parameter of the exponential-Golomb code is a value of 7.

[0372] 120. Further comprising: using context-adaptive arithmetic decoding for arithmetically decoding the sequence of symbols, said using comprising: selecting a context model from a plurality of context models, each having a probability estimate associated therewith, for a context-adaptively decoded symbol of the sequence of symbols; and adapting the probability estimates of the plurality of context models to actual symbol statistics using previously decoded symbols of the sequence of symbols; A method according to any of embodiments 98 to 119, wherein the entry point information indicates, for each of a set of one or more predetermined context models, a predetermined probability estimate for the respective predetermined context model, and the method further includes using the predetermined probability estimate when resuming the adaptation of the probability estimates of the plurality of context models to the respective predetermined context model.

[0373] 121. Further comprising: using context-adaptive arithmetic decoding for arithmetically decoding the sequence of symbols, said using comprising: selecting a context model from a plurality of context models, each having a probability estimate associated therewith, for a context-adaptively decoded symbol of the sequence of symbols; and adapting the probability estimates of the plurality of context models to actual symbol statistics using previously decoded symbols of the sequence of symbols; A method according to any of embodiments 98 to 120, wherein the method further includes, for each of a set of one or more predetermined context models, setting the probability estimates for the respective predetermined context models at the predetermined entry point to a default state, and the method further includes using the default state when resuming the adaptation of the probability estimates of the plurality of context models for the respective predetermined context models.

[0374] 122. The entry point information allows restarting arithmetic decoding of the bitstream after two or more entry points, and the method further comprises: 122. The method of embodiment 121, further comprising, for each of the set of one or more predetermined context models, setting the probability estimates for the respective predetermined context model at a subsequent predetermined entry point to a saved state that appears under a predetermined condition during arithmetic decoding of the sequence of symbols prior to the subsequent predetermined entry point, and further comprising using the saved state when resuming the adaptation of the probability estimates of the plurality of context models for the respective predetermined context models from the subsequent predetermined entry point onwards.

[0375] 123. Using a state machine, using dependent inverse quantization to derive a sequence of quantized values ​​from said sequence of information values; deriving from the entry point information a quantization state at which the dependent quantization is resumed after the predetermined entry point; 123. The method of any one of embodiments 98-122, further comprising:

[0376] 124. A method according to any one of embodiments 98 to 123, wherein the symbols are bins and the de-symbolization is de-binarization.

[0377] 125. A method according to any one of embodiments 98 to 124, wherein the information value is a sequence of syntax elements representing a video.

[0378] 126. A method according to any one of embodiments 98 to 124, wherein the information values ​​are neural network parameters.

[0379] 127. An arithmetic encoder for arithmetically encoding neural network parameters into a bitstream, comprising: deriving a sequence of symbols from the neural network parameters by symbolization; arithmetically coding the sequence of symbols into the bitstream by using context adaptive arithmetic coding, comprising: selecting a context model from a plurality of context models, each having a probability estimate associated therewith, for context adaptively coded symbols of the sequence of symbols; arithmetically coding the context adaptively coded symbols using the selected context model; and adapting the probability estimates of the plurality of context models to actual symbol statistics using previously coded symbols of the sequence of symbols; at the beginning of the bitstream and / or at one or more entry points within the bitstream, for each of a set of one or more context models, initializing the probability estimates associated with the respective context model according to context model information signaled within the bitstream; an arithmetic encoder configured to:

[0380] 128. For each context model, generating the probability estimate associated with the respective context model based on previously context-adaptively coded symbols of the sequence of symbols for which the respective context model was selected; An arithmetic encoder as described in embodiment 127, configured to adapt the probability estimates of the multiple context models to actual symbol statistics using previously encoded symbols of the sequence of symbols.

[0381] 129. Adapting the probability estimates of the plurality of context models to the actual symbol statistics using previously encoded symbols of the sequence of symbols by deriving first hypotheses for the probability estimates to adapt to the actual symbol statistics with a first adaptive agility controllable by a first agility parameter; at the beginning of the bitstream and / or at one or more entry points within the bitstream, for each of the set of one or more context models, setting the first hypothesis and the first agility parameter associated with the respective context model according to the context model information signaled within the bitstream; An arithmetic encoder as described in embodiment 127 or 128, configured to perform the following.

[0382] 130. Adapting the probability estimates of the plurality of context models to the actual symbol statistics using previously coded symbols of the sequence of symbols by deriving a second hypothesis about the probability estimates to adapt to the actual symbol statistics with a second adaptive agility controllable by a second agility parameter, and forming an average of the first hypothesis and the second hypothesis; at the beginning of the bitstream and / or at one or more entry points within the bitstream, for each of the set of one or more context models, setting the second hypothesis and the second agility parameter associated with the respective context model according to the context model information signaled within the bitstream; An arithmetic encoder as described in embodiment 127, configured to perform the following.

[0383] 131. An arithmetic encoder as described in embodiment 130, wherein the context model information in the bitstream includes a table entry index into a table of value quadruplets for defining the first and second hypotheses and the first and second agility parameters, and the arithmetic encoder is configured to use the table entry index to select one quadruplet in the table and use the one quadruplet to set the first and second hypotheses and the first and second agility parameters.

[0384] 132. An arithmetic encoder as described in embodiment 130, wherein the number of value quadruples for defining the first hypothesis and the second hypothesis and the first agility parameter and the second agility parameter is greater than or equal to 8 and less than or equal to 10.

[0385] 133. An arithmetic encoder as described in embodiment 131 or 132, wherein the quadruplets of values ​​for defining the first hypothesis and the second hypothesis and the first agility parameter and the second agility parameter correspond to one of three, four, or five mutually distinguishable settings of the first agility parameter and the second agility parameter.

[0386] 134. The quadruplets of values ​​for defining the first hypothesis, the second hypothesis, and the first agility parameter, and the second agility parameter are: a first three quadruplets, all of which indicate that the first agility parameter is set to a first value and the second agility parameter is set to a second value corresponding to adaptive agility lower than the first value; according to one quadruplet, the first hypothesis and the second hypothesis correspond to equal probability; according to a second quadruplet, the first hypothesis and the second hypothesis correspond to the first bin value being more likely than the second bin value; and according to a third quadruplet, the first hypothesis and the second hypothesis correspond to the second bin value being more likely than the first bin value; a second triplet of quadruplets, all of which indicate that the first agility parameter is set to a third value corresponding to adaptive agility lower than the first value and higher than the second value, and the second agility parameter is set to a fourth value corresponding to adaptive agility lower than the second value; and, according to the first and second quadruplets, the first and second hypotheses correspond to the first bin value being more likely than the second bin value; and, according to the third quadruplet, the first and second hypotheses correspond to the second bin value being more likely than the first bin value. two quadruplets, all of which set the first agility parameter to a fourth value corresponding to adaptive agility lower than the third value and higher than the second value, and set the second agility parameter to a sixth value corresponding to adaptive agility lower than the second value and higher than the fourth value, wherein, according to one quadruplet, the first hypothesis and the second hypothesis correspond to equal probability, and according to the second quadruplet, the first hypothesis and the second hypothesis correspond to the first bin value being more likely than the second bin value; one quadruplet, according to which the first agility parameter is set to a seventh value corresponding to an adaptive agility greater than the first value, and according to which the first hypothesis and the second hypothesis correspond to equal probability; An arithmetic encoder according to any one of embodiments 131 to 133, comprising:

[0387] 135. The symbols are bins, the symbolization is binarization, and the arithmetic encoder For each of the first hypothesis and the second hypothesis, Representing each of the hypotheses by a signed integer, where zero indicates equal probability, greater than zero indicates a first bin value is more likely than a second bin value, and less than zero indicates the second bin value is more likely than the first bin value; for each context model, increasing the signed integer if the currently encoded bin has the first bin value and decreasing the signed integer if the currently encoded bin has the second bin value by an amount controlled by the first agility parameter for the first hypothesis and by the second agility parameter for the second hypothesis, the amount being larger as the first agility parameter and the second agility parameter are smaller, respectively; adapted to adapt the probability estimates of the plurality of context models to actual symbol statistics using previously encoded symbols of the sequence of symbols by 135. An arithmetic encoder according to any one of embodiments 130 to 134, wherein the probability estimate is determined by averaging the first signed integer and the second signed integer.

[0388] 136. The arithmetic encoder of embodiment 135, configured to determine the amount of increase and decrease using a transition table.

[0389] 137. The arithmetic encoder of embodiment 136, configured to use the same transition table for the first hypothesis and the second hypothesis.

[0390] 138. An arithmetic encoder as described in embodiment 136 or 137, configured to determine the amount of increase and decrease using the transition table by looking up the transition table at an entry indexed by a table index determined by the signed integer to obtain a transition step, and dividing the transition step size by a power of two that depends on the first adaptation parameter and the second adaptation parameter, respectively, and the transition step determines the amount.

[0391] 139. The signed integer is represented by a two's complement representation having n bits, n being greater for the second hypothesis than for the first hypothesis, and the arithmetic encoder divides the transition step size by a power of 2 that is affinely linearly dependent on the first adaptation parameter and the second adaptation parameter, respectively, to obtain a transition step, while 2 n-m The signed integer divided by 2 on the other hand m-1 138. An arithmetic encoder as described in embodiment 136 or 137, configured to determine the amount of increase and decrease using the transition table by looking up the transition table at an entry indexed by the sum of the signed integer divided by , and the transition step determines the amount.

[0392] 140. The arithmetic encoder of embodiment 139, wherein the transition steps stored in the entries of the transition table are monotonically increasing or decreasing.

[0393] 141. A computer program having a program code for performing the method according to any of embodiments 74 to 126, when the computer program runs on a computer.

[0394] 142. A bitstream generated using an arithmetic encoder according to any one of embodiments 1 to 30 and 127 to 140.

Claims

1. 1. An arithmetic encoder for arithmetically encoding a sequence of information values ​​into an arithmetically coded bitstream, comprising: symbolizing the information values ​​into a symbol string to obtain a sequence of symbols; For each symbol, selecting a subinterval from among a plurality of subintervals, wherein a current interval defining a current version of a coding state of the arithmetic encoder is subdivided according to the probability estimates of the respective symbols, according to the symbol values ​​of the respective symbols, to obtain an updated version of the coding state of the arithmetic encoder for encoding a next symbol of the sequence of symbols, defined by the selected subinterval; renormalizing encoder internal parameters defining the coding state during the duration of the bitstream; arithmetically encoding the sequence of symbols by providing entry point information to the bitstream that allows restarting arithmetic decoding of the bitstream after a predetermined entry point; configured to: the information values ​​are neural network parameters; the entry point information comprises a bitstream pointer to a predetermined bit in the bitstream, the predetermined bit to be next read after resuming the arithmetic decoding of the bitstream from the predetermined entry point onwards; An arithmetic encoder, wherein the entry point information enables restarting arithmetic decoding of the bitstream after two or more entry points, and the bitstream pointer to the given bit within the bitstream is signaled within the bitstream in the form of an offset relative to a previous entry point or relative to a predefined bitstream position associated with the given entry point.

2. 2. The arithmetic encoder of claim 1, configured to identify the predefined bitstream positions as points between successive values ​​in the sequence of values ​​or by counting bits in the bitstream.

3. The bitstream pointer to the predetermined bit in the bitstream is bitwise, and / or Integer n multiples of bits (e.g., n>1 and n=8), 3. The arithmetic encoder of claim 2, wherein the arithmetic encoder is stored as:

4. The arithmetic encoder of claim 1 , wherein the bit position within the bitstream of the previous entry point is signaled within the bitstream.

5. 4. An arithmetic encoder as claimed in claim 1, wherein the bitstream pointer is signalled in the bitstream differentially with respect to a further bitstream pointer included in the entry point information for pointing to a further predetermined bit in the bitstream, the further predetermined bit being to be read next after resuming the arithmetic decoding of the bitstream from a previous entry point onwards.

6. 1. An arithmetic decoder for arithmetically decoding a sequence of information values ​​from a bitstream, comprising: deriving entry point information from the bitstream; For each symbol of the bitstream: determining a subinterval of a plurality of subintervals into which the current interval is subdivided according to the probability estimates for the respective symbols based on a current version of the coding state of the arithmetic decoder, and inferring a symbol value for the respective symbol based on the selected subinterval; renormalizing and updating decoder-internal parameters defining the coding state by using the bitstream and the selected subinterval to obtain an updated version of the coding state of the arithmetic decoder for decoding a next symbol of the sequence of symbols; restarting arithmetic decoding of the bitstream from a predetermined entry point onwards by arithmetically decoding a sequence of symbols from the bitstream using the entry point information by deriving said information value from said sequence of symbols by desymbolization; configured to: the information values ​​are neural network parameters; configured to derive from the entry point information a bitstream pointer to a predetermined bit in the bitstream, and to use the predetermined bit as the next bit to be read after resuming the arithmetic decoding of the bitstream from the predetermined entry point onwards; An arithmetic decoder, wherein the entry point information enables restarting arithmetic decoding of the bitstream after two or more entry points, and the bitstream pointer to the given bit within the bitstream is signaled within the bitstream in the form of an offset relative to a previous entry point or relative to a predefined bitstream position associated with the given entry point.

7. 7. The arithmetic decoder of claim 6, configured to identify the predefined bitstream positions as points between successive values ​​in the sequence of values ​​or by counting bits in the bitstream.

8. The bitstream pointer to the predetermined bit in the bitstream is bitwise, and / or Integer n multiples of bits (e.g., n>1 and n=8), 7. The arithmetic decoder of claim 6, wherein the arithmetic decoder is stored in the form:

9. 9. The arithmetic decoder of claim 8, wherein the bit position within the bitstream of the previous entry point is signaled within the bitstream.

10. 10. An arithmetic decoder as claimed in any one of claims 6 to 9, wherein the bitstream pointer is signalled in the bitstream differentially with respect to a further bitstream pointer included in the entry point information for pointing to a further predetermined bit in the bitstream, the further predetermined bit being to be read next after resuming the arithmetic decoding of the bitstream from a previous entry point onwards.

11. A method (100) for arithmetically coding a sequence of information values ​​into an arithmetically coded bitstream, comprising: symbolizing (101) said information values ​​into a symbol string to obtain a sequence of symbols; subdividing (103) for each symbol a current interval defining a current version of a coding state of the arithmetic encoder according to a probability estimate for said respective symbol; selecting a subinterval from among a plurality of subintervals according to a symbol value of the respective symbol to obtain an updated version of the coding state of the arithmetic encoder for encoding a next symbol of the sequence of symbols defined by the selected subinterval (104); and renormalizing (105) encoder internal parameters defining said coding state during the duration of said bitstream; arithmetically encoding (102) the sequence of symbols by providing (106) entry point information to the bitstream that allows restarting arithmetic decoding of the bitstream after a predetermined entry point; Including, the information values ​​are neural network parameters; the entry point information comprises a bitstream pointer to a predetermined bit in the bitstream, the predetermined bit to be next read after resuming the arithmetic decoding of the bitstream from the predetermined entry point onwards; The method, wherein the entry point information enables restarting arithmetic decoding of the bitstream after two or more entry points, and the bitstream pointer to the given bit within the bitstream is signaled within the bitstream in the form of an offset relative to a previous entry point or relative to a predefined bitstream position associated with the given entry point.

12. A method (200) for arithmetically decoding a sequence of information values ​​from a bitstream, comprising: deriving entry point information from the bitstream (201); For each symbol of the bitstream: determining (203) a subinterval of a plurality of subintervals into which the current interval is subdivided according to a current version of the coding state of the arithmetic decoder, a probability estimate for the respective symbol, and estimating (204) a symbol value for the respective symbol based on the selected subinterval; and re-normalizing and updating decoder internal parameters defining the coding state by using the bitstream and the selected subinterval (202) to obtain an updated version of the coding state of the arithmetic decoder (205) for decoding the next symbol of the sequence of symbols, thereby resuming arithmetic decoding of the bitstream from a predetermined entry point onwards by arithmetically decoding a sequence of symbols from the bitstream using the entry point information; deriving (206) said information value from said sequence of symbols by desymbolization; Including, the information values ​​are neural network parameters; deriving a bitstream pointer to a predetermined bit in the bitstream from the entry point information, and using the predetermined bit as the next bit to be read after resuming the arithmetic decoding of the bitstream from the predetermined entry point onwards; The method, wherein the entry point information enables restarting arithmetic decoding of the bitstream after two or more entry points, and the bitstream pointer to the given bit within the bitstream is signaled within the bitstream in the form of an offset relative to a previous entry point or relative to a predefined bitstream position associated with the given entry point.

13. 13. A computer program having a program code for performing the method according to claim 11 or 12 when the computer program runs on a computer.

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