Active matrix substrate, manufacturing method of active matrix substrate, and liquid crystal display device

Abstract

To provide an active matrix substrate capable of improving a photopic contrast while suppressing a device load, a manufacturing method of the active matrix substrate, and a liquid crystal display device.SOLUTION: In an active matrix substrate (100), an interlayer film (14) in a TFT (10) includes: a silicon nitride film (14A) formed of a silicon nitride; and a silicon oxide film (14B) formed of a silicon oxide. Interlayer film removal regions (RM1) not including the silicon nitride films are in light transmission parts.SELECTED DRAWING: Figure 2

Description

[Technical Field]

[0001] The present disclosure relates to an active matrix substrate, a method for manufacturing an active matrix substrate, and a liquid crystal display device. [Background technology]

[0002] Liquid crystal display devices equipped with active matrix substrates are widely used for various applications. Active matrix substrates have thin film transistors (hereinafter also referred to as TFTs) serving as switching elements in each pixel region. The thin film transistors are supported on a transparent substrate such as glass, on which gate wiring for supplying gate signals to the thin film transistors, source wiring for supplying source signals to the thin film transistors, pixel electrodes, etc. are formed. The gate electrode, source electrode, and drain electrode of the thin film transistor are electrically connected to the gate wiring, source wiring, and pixel electrode, respectively.

[0003] A gate insulating film is provided between the semiconductor layer and the gate electrode of the thin film transistor, and an interlayer film is provided between the metal layer of the gate electrode of the thin film transistor and the metal layers of the source electrode and drain electrode. A planarizing film for planarizing the surface is formed on the interlayer film, and the pixel electrode is connected to the drain electrode of the thin film transistor through a contact hole formed in the planarizing film.

[0004] In displays such as liquid crystal display devices, dark contrast has been considered important for improving visibility, but in recent years, bright contrast has also been attracting attention. While methods for improving bright contrast include increasing the brightness of the backlight, this increases power consumption. Therefore, reducing internal reflectance and improving transmittance are urgently needed.

[0005] Patent Document 1 discloses a configuration in which a transparent opening is provided in a region other than the circuit portion extending to the transparent region in a laminated film including a thin film transistor in order to improve transmittance. In Patent Document 1, the laminated film is completely removed until the surface of the substrate is exposed. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Patent Publication No. 2021-071725 Summary of the Invention [Problem to be solved by the invention]

[0007] When removing the laminated film, organic films can be easily removed by using photosensitive materials. However, inorganic films can only be removed by etching, so completely removing the laminated film raises concerns about distribution and residue, which may affect transmittance. Furthermore, removing inorganic films requires a long processing time and places a heavy load on the equipment.

[0008] One aspect of the present disclosure has been made in consideration of the above points, and aims to provide an active matrix substrate, a method for manufacturing an active matrix substrate, and a liquid crystal display device that can improve bright area contrast while suppressing the load on the device. [Means for solving the problem]

[0009] In order to solve the above problem, an active matrix substrate according to one embodiment of the present disclosure has a plurality of pixel regions arranged in a matrix, and comprises: a substrate; TFTs supported on the substrate and provided corresponding to each of the plurality of pixel regions, the TFTs having a semiconductor layer, a gate electrode, a gate insulating film, a source electrode and a drain electrode, and an interlayer film; a plurality of gate wirings extending in the row direction and formed from the same conductive film as the gate electrodes; and a plurality of source wirings extending in the column direction and formed from the same conductive film as the source electrodes and the drain electrodes; a light-transmitting portion in a portion where the TFTs, the gate wirings, and the source wirings are not arranged; and the interlayer film has a silicon nitride layer formed from silicon nitride and a silicon oxide layer formed from silicon oxide, and the light-transmitting portion has a first portion that does not include the silicon nitride layer.

[0010] In order to solve the above problems, a liquid crystal display device according to one aspect of the present disclosure includes an active matrix substrate according to one aspect of the present disclosure, a counter substrate arranged to face the active matrix substrate, and a liquid crystal layer provided between the active matrix substrate and the counter substrate.

[0011] In order to solve the above-described problems, a method for manufacturing an active matrix substrate according to one aspect of the present disclosure includes a substrate, and TFTs provided on the substrate corresponding to each of a plurality of pixel regions arranged in a matrix, the TFTs having a semiconductor layer, a gate electrode, a gate insulating film, a source electrode, a drain electrode, and an interlayer film, and the active matrix substrate has a light-transmitting portion in a portion where the TFTs, the gate wiring, and the source wiring are not arranged, the method including: an interlayer film forming step of forming an interlayer film including a silicon nitride layer formed from silicon nitride and a silicon oxide layer formed from silicon oxide, so as to cover the gate electrode and the gate wiring; a hydrogenation step of repairing defective terminations of the semiconductor layer using hydrogen supplied from the silicon nitride layer; and an inorganic film removal step of removing the silicon nitride layer in at least a portion of the interlayer film located in the light-transmitting portion after the hydrogenation step, to form a removed region where the silicon nitride layer is not present in the film thickness direction. [Effects of the Invention]

[0012] According to one aspect of the present disclosure, it is possible to realize an active matrix substrate, a method for manufacturing an active matrix substrate, and a liquid crystal display device that can improve contrast in bright areas while suppressing the load on the device. [Brief explanation of the drawings]

[0013] [Figure 1] 1 is a plan view schematically showing an active matrix substrate according to a first embodiment. [Figure 2] FIG. 2 is a cross-sectional view schematically showing the active matrix substrate shown in FIG. [Figure 3] 2A to 2C are process charts showing, together with cross-sectional views, the manufacturing process of the active matrix substrate shown in FIG. [Figure 4] 2A to 2C are process charts showing, together with cross-sectional views, the manufacturing process of the active matrix substrate shown in FIG. [Figure 5] 2A to 2C are process diagrams showing, together with cross-sectional views, the manufacturing process of the active matrix substrate shown in FIG. [Figure 6]2A to 2C are process diagrams showing, together with cross-sectional views, the manufacturing process of the active matrix substrate shown in FIG. [Figure 7] FIG. 10 is a cross-sectional view schematically showing an active matrix substrate according to a second embodiment. [Figure 8] 8A to 8C are process diagrams showing, together with cross-sectional views, the manufacturing process of the active matrix substrate shown in FIG. 7. [Figure 9] FIG. 10 is a plan view schematically showing an active matrix substrate according to a third embodiment. [Figure 10] FIG. 10 is a cross-sectional view schematically showing the active matrix substrate shown in FIG. [Figure 11] FIG. 10 is a cross-sectional view taken along line II' in FIG. [Figure 12] FIG. 10 is a cross-sectional view taken along line II-II in FIG. [Figure 13] 10A to 10C are process charts showing, together with cross-sectional views, the manufacturing process of the active matrix substrate shown in FIG. [Figure 14] FIG. 10 is a plan view schematically showing an active matrix substrate according to a fourth embodiment. [Figure 15] FIG. 15 is a cross-sectional view schematically showing the active matrix substrate shown in FIG. [Figure 16] 15 is a cross-sectional view taken along line III-III in FIG. 14. [Figure 17] 15 is a cross-sectional view taken along line IV-IV in FIG. 14. [Figure 18] 15A to 15C are process charts showing, together with cross-sectional views, the manufacturing process of the active matrix substrate shown in FIG. 14. [Figure 19] 15 is a cross-sectional view showing processing inside a contact hole opened in a planarizing film in the active matrix substrate shown in FIG. 14. FIG. [Figure 20] 14 is a diagram showing the positional relationship between the drain electrode and the contact hole opened in the planarization film in the active matrix substrate shown in FIG. [Figure 21] 21 is a cross-sectional view taken along line VV in FIG. 20. [Figure 22] 21 is a cross-sectional view taken along line VI-VI in FIG. 20. [Figure 23]FIG. 10 is a cross-sectional view schematically showing an active matrix substrate according to a fifth embodiment. [Figure 24] FIG. 10 is a cross-sectional view schematically showing a liquid crystal display device according to Embodiment 5. DETAILED DESCRIPTION OF THE INVENTION

[0014] The present inventors have conducted extensive research to improve the contrast in bright areas of liquid crystal display devices. As a result, they have discovered that the cause of increased internal reflection is the SiNx (silicon nitride) film present in the light-transmitting portion, particularly the SiNx film in the interlayer film of the thin film transistor, which led to the present invention.

[0015] The light-transmitting portion is a portion through which light from a backlight passes when the liquid crystal display device is viewed from above. In other words, it is a portion through which light from a backlight passes, excluding portions where light is blocked by gate wiring, source wiring, and thin-film transistors provided on the active matrix substrate, and portions where light is blocked by a light-shielding layer or the like provided on the counter substrate.

[0016] By removing the SiNx film in the interlayer film present in the light-transmitting portion, it was possible to improve the bright contrast of the liquid crystal display device. Below, we will explain the structure and manufacturing method of an active matrix substrate that can improve the bright contrast by removing the SiNx film in the interlayer film while suppressing the load on the device.

[0017] Hereinafter, embodiments of the present disclosure will be described with reference to the drawings.

[0018] [Embodiment 1] (Structure of active matrix substrate) First, the configuration of an active matrix substrate 100 according to Embodiment 1 will be described with reference to Figures 1 and 2. Figure 1 is a plan view schematically showing the active matrix substrate 100 according to Embodiment 1. In Figure 1, the dotted areas are interlayer film removal areas RM1 where an interlayer film 14 containing a SiNx film, which will be described later, has been removed. Figure 2 is a cross-sectional view schematically showing the active matrix substrate 100.

[0019] 1, the active matrix substrate 100 is formed with a plurality of gate lines GL extending in the row direction and a plurality of source lines SL extending in the column direction. Each region surrounded by a pair of adjacent gate lines GL and a pair of adjacent source lines SL is a pixel region. In other words, the active matrix substrate 100 includes a plurality of pixel regions arranged in a matrix.

[0020] In the pixel region, TFTs 10 and pixel electrode sections 19 (see FIG. 2, not shown in FIG. 1) having pixel electrodes electrically connected to the TFTs 10 are arranged. The TFTs 10 are supported on the substrate and provided at each intersection of the gate lines GL and the source lines CL. The TFTs 10 are supplied with gate signals (scanning signals) from the corresponding gate lines GL and with source signals (display signals) from the corresponding source lines SL.

[0021] As shown in FIG. 2, the active matrix substrate 100 includes a substrate 1, a light-shielding layer 2, a base coat layer 3, a TFT 10, a planarizing film 16, and a pixel electrode portion 19.

[0022] The substrate 1 is transparent and insulating. The light-shielding layer 2 prevents light degradation of a semiconductor layer 11 (described later) of the TFT 10 due to backlight. The light-shielding layer 2 is disposed so as to overlap the semiconductor layer 11. The base coat layer 3 prevents impurities from the substrate 1 from affecting the semiconductor layer 11. The base coat layer 3 is disposed so as to cover the light-shielding layer 2.

[0023] The TFT 10 includes a semiconductor layer 11, a gate electrode 13, a source electrode 15A, a drain electrode 15B, a gate insulating film 12, and an interlayer film .

[0024] The semiconductor layer 11 is provided in an island shape on the base coat layer 3. The gate insulating film 12 provides insulation between the semiconductor layer 11 and the gate electrode 13, and is provided so as to cover the semiconductor layer 11. The gate electrode 13 is provided on the gate insulating film 12 so as to overlap the semiconductor layer 11. The gate electrode 13 and the gate wiring GL (see FIG. 1) are formed by patterning the same first metal layer, and are electrically connected.

[0025] The interlayer film 14 has a function of insulating between a first metal layer (conductive film) constituting the gate electrode 13 and the gate line GL and a second metal layer (conductive film) constituting the source electrode 15A, the drain electrode 15B, and the source line SL, and a function of supplying hydrogen used to repair defects in the semiconductor layer 11. In the first embodiment, the interlayer film 14 is made of a laminated film of a silicon nitride film (layer) 14A formed of SiNx (silicon nitride) having a hydrogen supply function and a silicon oxide film (layer) 14B formed of SiO2 (silicon oxide) having no hydrogen supply function, and the silicon nitride film 14A is located on the lower side closer to the semiconductor layer 11.

[0026] The source electrode 15A and the drain electrode 15B are provided on the interlayer film 14 so as to overlap the semiconductor layer 11 and be spaced apart from each other. The source electrode 15A and the drain electrode 15B are formed by patterning the same second metal layer as the source wiring SL (see FIG. 1), and the source electrode 15A and the source wiring SL are electrically connected. The source electrode 15A and the drain electrode 15B formed by patterning the second metal layer and the source wiring SL may also be referred to as SE wiring.

[0027] The planarization film 16 flattens the surface on which the pixel electrodes of the pixel electrode section 19 are formed, and is provided so as to cover the TFT 10. The pixel electrode section 19 is provided on the planarization film 16.

[0028] The pixel electrode section 19 includes a first pixel electrode 17A, a second pixel electrode 17B, and a capacitance-forming insulating film (upper insulating film) 18 provided between the first pixel electrode 17A and the second pixel electrode 17B. The first pixel electrode 17A, which is disposed on the substrate 1 side, is a pixel capacitance-forming electrode for forming a pixel capacitance. The second pixel electrode 17B, which is disposed on the first pixel electrode 17A via the capacitance-forming insulating film 18, is a liquid crystal voltage application electrode. The second pixel electrode 17B is divided into multiple parts by slits. A pixel capacitance is formed between the second pixel electrode 17B and the first pixel electrode 17A.

[0029] In this embodiment, a connection electrode 17c formed from the same conductive film layer as the first pixel electrode 17A is connected to the drain electrode 15B within a contact hole H2 formed in the planarization film 16, and the connection electrode 17c and the second pixel electrode 17B are connected via a contact hole formed in the capacitance-forming insulating film 18. The contact hole H2 formed in the planarization film 16 electrically connects the drain electrode 15B and the above-mentioned connection electrode 17c, and electrically connects the drain electrode 15B and the second pixel electrode 17B via the connection electrode 17c.

[0030] Next, the materials of each component constituting the active matrix substrate 100 will be described. The substrate 1 is, for example, a glass substrate, but may also be a plastic substrate. The light-shielding layer 2 is, for example, MoW. The base coat layer 3 is, for example, a stacked film of SiO2 / SiNx. The SiNx is located on the substrate 1 side. The film thickness is SiO2>SiNx.

[0031] The semiconductor layer 11 is, for example, poly-Si, a-Si, or an In-Ga-Zn-O based oxide semiconductor. The first metal layer constituting the gate electrode 13 and the gate line GL is, for example, a metal laminated film of W / TaN. The film thickness is W>TaN. The second metal layer constituting the source electrode 15A, the drain electrode 15B, and the source line SL is, for example, a metal laminated film of Ti / Al / Ti. The film thickness is Ti <al>It's Ti.

[0032] The gate insulating film 12 is, for example, an inorganic oxide film such as SiO2. Of the interlayer film 14, the silicon nitride film 14A having a hydrogen supply function is SiNx, and the silicon oxide film 14B is an inorganic oxide film such as SiO2. The thickness of the interlayer film 14 is SiO2>SiNx.

[0033] The planarization film 16 is made of, for example, a photosensitive resin such as a photosensitive acrylic resin, etc. The thickness of the planarization film 16 is on the order of μm, which is sufficiently thicker than the thickness of the other thin film portions.

[0034] The first pixel electrode 17A and the second pixel electrode 17B in the pixel electrode section 19 are both transparent conductive films such as an ITO (Indium Tin Oxide) film or an IZO (Indium Zinc Oxide) film. The capacitance-forming insulating film 18 is SiNx.

[0035] As mentioned above, the inventors of the present invention have discovered that the SiNx film present in the light-transmitting portion increases internal reflection and reduces the contrast in bright areas. The SiNx film is used in the base coat layer 3, the interlayer film 14, and the capacitance-forming insulating film 18.

[0036] Both SiNx and SiO2 films are stable insulating films. However, unlike SiNx films, SiO2 films cannot supply hydrogen, which is used to repair defects in the semiconductor layer 11. Therefore, a SiNx film is required for the interlayer film 14, which also repairs defects in the semiconductor layer 11. Furthermore, unlike SiNx films, SiO2 films cannot prevent impurities from the substrate 1 from penetrating into the semiconductor layer 11. Therefore, a top-gate type requires a SiNx film for the base coat layer 3. Furthermore, SiO2 films require high-temperature processing for film formation, whereas SiNx films can function as insulating films at lower film formation temperatures than SiO2 films. Therefore, the capacitance-forming insulating film 18, which is formed on the planarization film 16 made of photosensitive acrylic resin, cannot be made of SiO2 film.

[0037] In a conventional active matrix substrate, the base coat layer 3, the interlayer film 14, and the capacitance-forming insulating film 18, which include a SiNx film, are formed so as to extend to the light-transmitting portion.

[0038] Therefore, as shown in FIG. 2, in the active matrix substrate 100, the interlayer film 14 is provided with an interlayer film removed region (first portion) RM1 that does not include the silicon nitride film 14A in the light transmitting portion.

[0039] By providing the interlayer film removal region RM1 and removing the silicon nitride film 14A of the interlayer film 14 from the light transmitting portion, it is possible to reduce the reflectance in the light transmitting portion and increase the transmittance in the light transmitting portion.

[0040] Here, the base coat layer 3 including the SiNx film remains present in the light-transmitting portion, but since its film thickness is sufficiently thin (less than 1 / 10) compared to the silicon nitride film 14A, even if a removed area is provided in the light-transmitting portion of the base coat layer 3, its contribution to reducing the internal reflectance and increasing the transmittance is small.

[0041] Furthermore, if the base coat layer 3 is to be removed as well, the thickness of the film to be removed will exceed 1 μm. Also, since the area of ​​the film to be removed is large, it must be made thicker than usual. If the resist is made thicker, the resist will retreat significantly, which has the disadvantage of causing a large line width loss in the protected area and making it difficult to control.

[0042] By intentionally leaving the base coat layer 3 in the light transmitting portion, the etching process time can be shortened and the load on the device can be reduced.

[0043] However, this disclosure does not exclude a configuration in which all insulating films formed in the light-transmitting portion, from the interlayer film 14 to the base coat layer 3, are removed, and such a configuration is also within the scope of this disclosure.

[0044] (Method of manufacturing an active matrix substrate) Next, a method for manufacturing the active matrix substrate 100 of the first embodiment will be described with reference to Figs. 3 to 6. Here, a poiy-Si process is exemplified. Figs. 3 to 6 are process diagrams showing the manufacturing process of the active matrix substrate 100 together with cross-sectional views. Fig. 4 is a continuation of Fig. 3, Fig. 5 is a continuation of Fig. 4, and Fig. 6 is a continuation of Fig. 5.

[0045] 3, first, for example, a MoW film is formed on the surface of the substrate 1, and then photolithography, etching, and resist stripping and cleaning are performed to form a light-shielding layer 2. Then, for example, a SiNx film and a SiO2 film are formed thereon in this order by plasma CVD to form a base coat layer 3 (P1: base coat formation step).

[0046] Next, as shown by reference numeral 1002 in Fig. 3, a poiy-Si process is performed on the surface of the substrate on which the base coat layer 3 has been formed to form a semiconductor layer 11. The poiy-Si process includes a series of steps of film formation, photoetching, and then doping (P2: poiy-Si process).

[0047] Next, as shown by reference numeral 1003 in FIG. 3, an SiO 2 film is formed by, for example, plasma CVD on the surface of the substrate on which the semiconductor layer 11 has been formed, to form a gate insulating film 12 (P3: gate insulating film forming step).

[0048] Next, as shown by reference numeral 1004 in FIG. 3, a W film and a TaN film are sequentially formed by, for example, sputtering on the surface of the substrate on which the gate insulating film 12 has been formed, to form a metal laminate film (first metal layer), and then the metal laminate film is subjected to photolithography, etching, and resist stripping and cleaning to form a gate wiring GL including a gate electrode 13 (P4: gate electrode formation process).

[0049] Next, as indicated by reference numeral 1005 in FIG. 4, impurities (dopants) are implanted into the semiconductor layer 11 of the substrate on which the gate wiring GL including the gate electrode 13 has been formed (P5: doping step).

[0050] Next, as shown by reference numeral 1006 in FIG. 4, on the surface of the substrate on which the injection of impurities into the semiconductor layer 11 has been completed, a SiNx film and a SiO2 film are formed in this order by, for example, a plasma CVD method, to form a silicon nitride film 14A and a silicon oxide film 14B thereon, thereby forming an interlayer film 14 (P6: interlayer film formation (forming) process).

[0051] Next, although not shown in a cross-sectional view, the substrate on which the interlayer film 14 has been formed is annealed at about 400° C. to supply hydrogen to the defects in the semiconductor layer 11 and repair the defect terminations (P7: hydrogenation step).

[0052] Next, as shown by reference numeral 1007 in FIG. 4, a contact hole H1 is formed through the interlayer film 14 and the gate insulating film 12 in the substrate that has been subjected to the hydrogenation treatment (P8: contact hole forming step).

[0053] 5, a Ti film, an Al film, and a Ti film are sequentially formed by sputtering on the surface of the substrate on which the contact hole H1 has been formed, to form a metal laminate film (second metal layer). Thereafter, the metal laminate film is subjected to photolithography, etching, and resist stripping and cleaning to form the source electrode 15A, the drain electrode 15B, and the source wiring SL (P9: source electrode formation process).

[0054] 5, the substrate on which the source electrode 15A, the drain electrode 15B, and the source wiring SL have been formed is subjected to photolithography, etching, and resist stripping and cleaning to remove the interlayer film 14 from the light-transmitting portion, thereby forming an interlayer film-removed region RM1 (P10: inorganic film removal step). The inorganic film removal step P10 is an inorganic film removal step in which, after the hydrogenation step P8, the silicon nitride layer is removed from at least a portion of the interlayer film 14 located in the light-transmitting portion, to form a removal region in which no silicon nitride layer exists in the film thickness direction.

[0055] Next, as shown by the symbol 1010 in Figure 5, a photosensitive resin such as a photosensitive acrylic resin is deposited on the surface of the substrate on which the interlayer film removal region RM1 has been formed, so as to cover the TFT 10 and fill the interlayer film removal region RM1, thereby forming a planarization film 16 having a contact hole H2 (P11: planarization film deposition process).

[0056] Next, as shown by reference numeral 1011 in FIG. 6, an ITO film is formed by, for example, a sputtering method on the surface of the substrate on which the planarization film 16 has been formed, and then photolithography, etching, and resist peeling and cleaning are performed to form the first pixel electrode 17A (P12: first pixel electrode formation process). 6, an inorganic insulating film such as a SiNx film is formed by, for example, plasma CVD on the surface of the substrate on which the first pixel electrode 17A is formed. Thereafter, the inorganic insulating film is subjected to photolithography, etching, and resist peeling and cleaning to form the capacitance-forming insulating film 18 (P13: capacitance-forming insulating film forming step). Furthermore, as shown by reference numeral 1013 in FIG. 6, an ITO film is formed by, for example, a sputtering method on the substrate surface on which the capacitance-forming insulating film 18 is formed, and then photolithography, etching, and resist peeling and cleaning are performed to form the second pixel electrode 17B (P14: second pixel electrode forming process). Through the above steps, an active matrix substrate 100 can be obtained from which the interlayer film 14 in the light-transmitting portion has been removed.

[0057] [Embodiment 2] Other embodiments of the present disclosure will be described below. For ease of explanation, the same reference numerals will be used to designate components having the same functions as those described in the above embodiment, and the description thereof will not be repeated.

[0058] 7 is a cross-sectional view schematically showing an active matrix substrate 200 according to embodiment 2. The plan view schematically showing the active matrix substrate 200 is the same as FIG.

[0059] In the active matrix substrate 100, the interlayer film 14 has a silicon nitride film 14A, which is a SiNx film, located closer to the semiconductor layer 11, and a silicon oxide film 14B, which is a SiO2 film, stacked thereon (see FIG. 2). This is because it is considered preferable to place the silicon nitride film 14A, which has a hydrogen supply function, closer to the semiconductor layer 11. However, in this case, in order to remove the silicon nitride film 14A, it is also necessary to remove the silicon oxide film 14B located thereon.

[0060] 7, the active matrix substrate 200 includes an interlayer film 14-1 instead of the interlayer film 14, and in the interlayer film 14-1, a silicon oxide film 14B is located on the lower layer side closer to the semiconductor layer 11, and a silicon nitride film 14A is formed on the silicon oxide film 14B. In other words, the stacking order (film formation order) of the silicon nitride film 14A and the silicon oxide film 14B is reversed.

[0061] With this configuration, in the inorganic film removal step, it is possible to remove the silicon nitride film 14A first, and it is possible to leave the silicon oxide film 14B as it is, or to remove it partway as shown in Fig. 7. This reduces the load in the inorganic film removal step.

[0062] Because the stacking order of the silicon nitride film 14A and the silicon oxide film 14B is reversed, the silicon oxide film 14B is interposed between the silicon nitride film 14A and the semiconductor layer 11. However, by optimizing the process conditions (hydrogenation annealing conditions) in the hydrogenation step, it is possible to match the characteristics of the TFT 10. It has been confirmed that by optimizing the process conditions in the hydrogenation step, it is possible to match the characteristics of the TFT 10.

[0063] A method for manufacturing the active matrix substrate 200 of the second embodiment will be described with reference to Fig. 8. Fig. 8 is a process chart showing the manufacturing process of the active matrix substrate 200 together with cross-sectional views. Note that Fig. 8 shows only steps P1 to P14, which are different in content from those described with reference to Figs. 3 to 6 in the first embodiment, using cross-sectional views of the active matrix substrate 200, and omits cross-sectional views for steps that have the same content.

[0064] Through steps P1 to P5, the light-shielding layer 2, base coat layer 3, semiconductor layer 11, gate insulating film 12, gate electrode 13 and gate wiring GL are formed on the substrate 1, and impurities are implanted into the semiconductor layer 11.

[0065] Next, as shown by reference numeral 1014 in FIG. 8, on the surface of the substrate on which the injection of impurities into the semiconductor layer 11 has been completed, an SiO film and an SiN film are formed in this order by, for example, a plasma CVD method, in the opposite manner to that in the first embodiment, to form a silicon oxide film 14B and a silicon nitride film 14A thereon, thereby forming an interlayer film 14-1 (P6-1: interlayer film formation process).

[0066] Thereafter, through steps P7 to P9, defects in the semiconductor layer 11 are repaired, and contact holes H1, source electrodes 15A and drain electrodes 15B, and source wiring SL are formed.

[0067] 8, the substrate on which the source electrode 15A, the drain electrode 15B, and the source wiring SL have been formed is subjected to photolithography, etching, and resist stripping and cleaning to remove the silicon nitride film 14A located on the surface of the interlayer film 14-1 of the light transmitting portion, thereby forming an interlayer film removal region (first portion) RM1 (P10-1: inorganic film removal step). In P10-1, the silicon nitride film 14A is completely removed, but there is no problem even if the removal extends to the silicon oxide film 14B located below the silicon nitride film 14A.

[0068] Thereafter, through steps P11 to P14, the planarization film 16, the first pixel electrode 17A, the capacitance-forming insulating film 18, and the second pixel electrode 17B are formed.

[0069] [Embodiment 3] Other embodiments of the present disclosure will be described below. For ease of explanation, the same reference numerals will be used to designate components having the same functions as those described in the above embodiment, and the description thereof will not be repeated.

[0070] FIG. 9 is a plan view schematically showing an active matrix substrate 300 according to Embodiment 3. In FIG. 9, the dotted area is an interlayer film removal area (first portion) RM2 in which the silicon nitride film 14A of the interlayer film 14-1 has been removed. FIG. 10 is a cross-sectional view schematically showing the active matrix substrate 300. FIG. 11 is a cross-sectional view taken along line II' in FIG. 9. FIG. 12 is a cross-sectional view taken along line II-II in FIG. 9. In Embodiment 3, as in Embodiment 2, part of the silicon oxide film 14B is removed together with the silicon nitride film 14A.

[0071] In the third embodiment, only the differences will be described assuming the configuration and manufacturing method of the second embodiment, but it may be combined with the configuration and manufacturing method of the first embodiment. That is, in Fig. 9, the dotted interlayer film removal region RM2 may be a region where the interlayer film 14 has been removed.

[0072] In the second embodiment described above, the silicon nitride film 14A and a portion of the silicon oxide film 14B of the interlayer film 14-1 are removed in a process subsequent to the source electrode formation process P9. In this case, to prevent the source line SL from being affected in the subsequent inorganic film removal process, a resist must be formed and etched with a margin around the source line SL. Therefore, the silicon nitride film 14A around (on the edge of) the source line SL cannot be removed. However, as long as the interlayer film 14-1 (14) is present in the area where the gate line GL and TFT 10 are located, there is no problem in terms of the electrical circuit.

[0073] 9, in the active matrix substrate 300 of the third embodiment, an inorganic film removal step P10 is performed before the source electrode formation step P9, leaving only the portion where the gate line GL and the TFT 10 are located; in other words, the silicon nitride layer in the first region that does not include the portion where the gate line GL and the TFT 10 are located is removed. Here, part of the silicon oxide film 14B is also removed. By manufacturing in this manner, the area where the silicon nitride film 14A in the light-transmitting portion is removed can be made larger.

[0074] A method for manufacturing the active matrix substrate 300 of the third embodiment will be described with reference to Fig. 13. Fig. 13 is a process chart showing the manufacturing process of the active matrix substrate 300 together with cross-sectional views. Note that Fig. 13 shows only steps P1 to P14, P6-1, and P10-1 that are different in processing content from those described with reference to Figs. 3 to 6 and 8 in the first and second embodiments, using cross-sectional views of the active matrix substrate 300, and omits cross-sectional views for steps that have the same processing content.

[0075] As shown in FIG. 13, through steps P1 to P8, contact holes H1 are formed in the gate insulating film 12 and the interlayer film 14-1.

[0076] 13, the silicon nitride film 14A in the light transmitting portion and a part of the silicon oxide film 14B located thereunder are removed to form an interlayer film removal region RM2 (P10-1: inorganic film removal step). In P10-1, the silicon nitride film 14A is completely removed, but there is no problem even if the removal extends to the silicon oxide film 14B located under the silicon nitride film 14A.

[0077] 13, the source electrode 15A, the drain electrode 15B, and the source wiring SL are formed on the substrate in which the interlayer film 14-1 has been removed in the interlayer film region RM2 (P9-1: source electrode formation step). In the active matrix substrates 100 and 200, the drain electrode 15B can be formed in the portion where the source electrode 15A and the drain electrode 15B could not be formed.

[0078] After that, through steps P11 to P14, the planarization film 16, the first pixel electrode 17A, and the capacitor The capacitance-forming insulating film 18 and the second pixel electrode 17B are formed.

[0079] As shown in Figures 9 and 10, in the active matrix substrate 300 manufactured in this manner, the area that was not included in the interlayer film removal area RM1 is now included in the interlayer film removal area RM2, and the drain electrode 15B can be formed in the area where it could not be formed in the active matrix substrates 100 and 200.

[0080] 11, in the inorganic film removal process P10-1, the end face of the interlayer film 14-1, from which the silicon nitride film 14A and a portion of the silicon oxide film 14B located thereunder have been removed, has a gentle tapered shape that widens toward the substrate 1. Therefore, even if the source wiring SL is provided from the unremoved portion of the interlayer film 14-1 to the interlayer film removed region RM2, there is no concern about disconnection such as a step break in the source wiring SL or an increase in resistance value.

[0081] Furthermore, based on trial calculations, the inorganic film removal area per pixel is 59% for the active matrix substrates 100 and 200, while it is 69% for the active matrix substrate 300, meaning that the light-transmitting portion from which the silicon nitride film 14A has been removed increases by approximately 10%. Furthermore, since the silicon nitride film 14A remaining around the source line SL for margin purposes can be eliminated, it is possible to prevent an increase in internal reflectance and a decrease in transmittance in this portion.

[0082] [Embodiment 4] Other embodiments of the present disclosure will be described below. For ease of explanation, the same reference numerals will be used to designate components having the same functions as those described in the above embodiment, and the description thereof will not be repeated.

[0083] Fig. 14 is a plan view schematically showing an active matrix substrate 400 according to embodiment 4. In Fig. 14, the dotted area is an interlayer film removal area RM3 where the silicon nitride film 14A of the interlayer film 14-1 has been removed. Fig. 15 is a cross-sectional view schematically showing the active matrix substrate 400. Fig. 16 is a cross-sectional view taken along line III-III in Fig. 14. Fig. 17 is a cross-sectional view taken along line IV-IV in Fig. 14.

[0084] In the active matrix substrate 200 of the second embodiment, after the hydrogenation step P7 is completed, the silicon nitride film 14A as an insulating film is no longer needed, and only the silicon oxide film 14B remains as an interlayer film.

[0085] Therefore, in the active matrix substrate 400 of the fourth embodiment, the source electrodes 15A, the drain electrodes 15B, and the source lines SL are used as masks to remove only the silicon nitride film 14A.

[0086] By manufacturing the active matrix substrate in this manner, the silicon nitride film 14A can be entirely removed except for the portions where the source electrode 15A, the drain electrode 15B, and the source line SL are present, thereby achieving a reduction in internal reflectance and an improvement in transmittance beyond that of the active matrix substrate 300 of the third embodiment.

[0087] A method for manufacturing the active matrix substrate 400 of the fourth embodiment will be described with reference to Fig. 18. Fig. 18 is a process chart showing the manufacturing process of the active matrix substrate 400 together with cross-sectional views. Note that Fig. 18 also shows, using cross-sectional views of the active matrix substrate 400, only steps P1 to P14, P6-1, and P10-1 that are different in processing content from those described with reference to Figs. 3 to 6 and 8 in the first and second embodiments, and omits cross-sectional views of steps that are the same in processing content.

[0088] As shown in FIG. 18, steps P1 to P8 are performed to form the contact hole H1 in the gate insulating film 12 and the interlayer film 14-1.

[0089] 18, the source electrode 15A, the drain electrode 15B, and the source wiring SL are formed on the substrate on which the interlayer film 14-1 has been formed (P9-1: source electrode formation step). In the active matrix substrates 100 and 200, the drain electrode 15B can be formed in a portion where it could not be formed.

[0090] Next, as shown by reference numeral 1019 in FIG. 18, etching is performed using the source electrode 15A, the drain electrode 15B, and the source wiring SL as a mask to remove only the silicon nitride film 14A in the interlayer film 14-1, thereby forming an interlayer film removal region RM3 (P10-2: inorganic film removal process).

[0091] However, if the second metal layer is made of a Ti / Al / Ti metal laminated film, the upper Ti layer will be removed by a fluorine-based etching gas when removing the silicon nitride film 14A (see reference numeral 1019 in FIG. 18). Therefore, the second metal layer will be an Al / Ti metal laminated film. The second metal layer may also be an Al / Ti metal laminated film, with Al, which is not etched by a fluorine-based gas, as the uppermost layer.

[0092] After that, through steps P11 to P14, the planarization film 16, the first pixel electrode 17A, and the capacitor The capacitance-forming insulating film 18 and the second pixel electrode 17B are formed.

[0093] 15, in the active matrix substrate 400 manufactured in this manner, the silicon nitride film 14A is completely removed except for the portions located under the source electrode 15A and drain electrode 15B made of the second metal layer and the source line SL. Because the silicon oxide film 14B remains on the TFT 10 and the gate line GL, the state of being covered with an insulating film is maintained even after the silicon nitride film 14A is completely removed.

[0094] Incidentally, in the inorganic film removal process P10-2, when the silicon nitride film 14A is removed using the source electrode 15A, the drain electrode 15B, and the source wiring SL as masks, etching is performed using a fluorine-based gas, and therefore the upper metal (here, Ti) in the second metal layer is damaged and disappears.

[0095] Therefore, for the contact hole H2 formed in the planarization film 16, after the hole is formed, the Al in the hole is removed with an alkaline solution such as a developer to expose the underlying Ti, thereby enabling contact with the connection electrode 17c made of the same transparent conductive film as the first pixel electrode 17A.

[0096] Alternatively, a transparent conductive film may be disposed in advance at the contact portion of the drain electrode 15B with the connection electrode 17c, and then the silicon nitride film 14A may be removed. This allows the transparent conductive film disposed at the contact portion to remain even after etching, so that the contact resistance with the connection electrode 17c can be reduced without any problems.

[0097] 19, only the Al layer of the drain electrode 15B (second metal layer) in the contact hole H2 opened in the planarization film 16 may be removed. Fig. 19 is a cross-sectional view showing processing of the inside of the contact hole H2 opened in the planarization film 16. By using a mixed solution of acetic acid / phosphoric acid / nitric acid or a developer (alkaline solution), only the Al can be removed and the underlying Ti layer can be left.

[0098] However, since etching using a mixed solution of acetic acid / phosphoric acid / nitric acid or a developer (alkaline solution) is isotropic, etching of the Al inside the contact hole H2 proceeds more laterally than the contact hole H2. Therefore, if a transparent conductive film (the same transparent conductive film as the first pixel electrode 17A) that will become the connection electrode 17c is formed in that portion, a step will occur, preventing contact.

[0099] 20, the wiring end of the drain electrode 15B can be placed in a contact hole H2 formed in the planarization film 16 to bring the lower layer Ti of the drain electrode 15B into contact with the connection electrode 17c. FIG. 20 is a diagram showing the positional relationship between the drain electrode 15B and the contact hole H2 opened in the planarization film 16.

[0100] Fig. 21 is a cross-sectional view taken along line VV in Fig. 20. Fig. 22 is a cross-sectional view taken along line VI-VI in Fig. 20. As shown in Fig. 21, the portion of the wiring end of drain electrode 15B that is not located within contact hole H2 is being removed by lateral etching of the AI ​​layer, causing disconnection of connecting electrode 17c at that portion. In contrast, as shown in Fig. 22, when the wiring end of drain electrode 15B is located within contact hole H2, connecting electrode 17c comes into contact with the underlying Ti layer.

[0101] [Embodiment 5] Other embodiments of the present disclosure will be described below. For ease of explanation, the same reference numerals will be used to designate components having the same functions as those described in the above embodiment, and the description thereof will not be repeated.

[0102] 23 is a cross-sectional view schematically illustrating an active matrix substrate 500 according to embodiment 5. The plan view schematically illustrating the active matrix substrate 500 is the same as that shown in FIG. 1. In embodiment 5, the configuration and manufacturing method are based on the configuration and manufacturing method of embodiment 1, and only differences will be described. However, embodiment 5 can also be combined with the configurations and manufacturing methods of embodiments 2 to 4.

[0103] In the active matrix substrate 100 (200 to 400), the capacitance-forming insulating film 18 provided between the first pixel electrode 17A and the second pixel electrode 17B is formed so as to extend to the light-transmitting portion. As described above, the capacitance-forming insulating film 18 is a SiNx film, and therefore acts to increase the internal reflectance and decrease the transmittance. Moreover, since it is located in the upper layer, it is easy to remove.

[0104] 23, in the active matrix substrate 500 of the fifth embodiment, the capacitance-forming insulating film 18 is removed from the remaining portion, leaving only the portion necessary for forming a pixel capacitance between the first pixel electrode 17A and the second pixel electrode 17B. That is, a second portion where the capacitance-forming insulating film 18 is not provided is provided in the region where the pixel capacitance is not formed between the first pixel electrode 17A and the second pixel electrode 17B. This makes it possible to further reduce the internal reflectance and improve the transmittance.

[0105] As for the manufacturing method, in the capacitance-forming insulating film formation process P13, the capacitance-forming insulating film 18 is formed, and then photolithography, etching, and resist stripping and cleaning are performed to form the capacitance-forming insulating film 18 with unnecessary portions removed.

[0106] [Embodiment 6] Other embodiments of the present disclosure will be described below. For ease of explanation, the same reference numerals will be used to designate components having the same functions as those described in the above embodiment, and the description thereof will not be repeated.

[0107] The active matrix substrates 100, 200, 300, 400, and 500 according to the first to fifth embodiments can be suitably used in a liquid crystal display device. An example of a liquid crystal display device is shown in FIG.

[0108] The liquid crystal display device 1000 shown in Figure 24 includes an active matrix substrate 100 (or active matrix substrates 200, 300, 400, 500), a counter substrate 600 arranged opposite to the active matrix substrate 100, and a liquid crystal layer 30 arranged between the active matrix substrate 100 and the counter substrate 600.

[0109] An alignment film (not shown) is provided on the outermost surface of each of the active matrix substrate 100 and the counter substrate 600, facing the liquid crystal layer 30. The counter substrate 600 typically has a color filter layer and a black matrix (neither of which are shown). The thickness (cell gap) of the liquid crystal layer 30 is determined by columnar spacers (not shown) provided on the liquid crystal layer 30 side of the counter substrate 600 or the active matrix substrate 100.

[0110] 〔summary〕 An active matrix substrate according to a first aspect of the present disclosure has a plurality of pixel regions arranged in a matrix, and comprises: a substrate; TFTs supported on the substrate and provided corresponding to each of the plurality of pixel regions, the TFTs having a semiconductor layer, a gate electrode, a gate insulating film, source and drain electrodes, and an interlayer film; a plurality of gate wirings extending in the row direction and formed from the same conductive film as the gate electrodes; and a plurality of source wirings extending in the column direction and formed from the same conductive film as the source and drain electrodes. The active matrix substrate has a light-transmitting portion in a portion where the TFTs, the gate wirings, and the source wirings are not arranged, and the interlayer film has a silicon nitride layer formed from silicon nitride and a silicon oxide layer formed from silicon oxide. The light-transmitting portion has a first portion that does not include the silicon nitride layer.

[0111] In the active matrix substrate according to Aspect 2 of the present disclosure, in accordance with Aspect 1, the silicon nitride layer is located on the lower layer side of the interlayer film closer to the semiconductor layer, and the first portion does not include the silicon oxide layer.

[0112] According to a third aspect of the present disclosure, in the active matrix substrate of the first aspect, the silicon oxide layer is located on a lower layer side of the interlayer film closer to the semiconductor layer, and the first portion includes the silicon oxide layer.

[0113] In the active matrix substrate according to aspect 4 of the present disclosure, in the above aspect 1, the first portion is formed in a first region that does not include the portion where the gate line and the TFT are located, and the source line is located above the first portion.

[0114] An active matrix substrate according to a fifth aspect of the present disclosure is the above-mentioned first aspect, wherein the first portion is formed over the entire surface except for the source electrode, the drain electrode, and the lower side of the source line.

[0115] An active matrix substrate according to aspect 6 of the present disclosure is any of aspects 1 to 5 above, and comprises a planarization film covering the TFT, and a pixel electrode portion provided on the planarization film and electrically connected to the TFT, wherein the pixel electrode portion has a first pixel electrode, a second pixel electrode, an upper insulating film formed from silicon nitride and provided between the first pixel electrode and the second pixel electrode, and a second portion in which the upper insulating film is not provided in a region where the first pixel electrode and the second pixel electrode do not form a pixel capacitance.

[0116] A liquid crystal display device according to a seventh aspect of the present disclosure includes an active matrix substrate according to any one of the first to sixth aspects, a counter substrate arranged opposite the active matrix substrate, and a liquid crystal layer provided between the active matrix substrate and the counter substrate.

[0117] A method for manufacturing an active matrix substrate according to an eighth aspect of the present disclosure includes a substrate, and TFTs provided on the substrate corresponding to each of a plurality of pixel regions arranged in a matrix, the TFTs having a semiconductor layer, a gate electrode, a gate insulating film, a source electrode, a drain electrode, and an interlayer film, and a light-transmitting portion in a portion where the TFTs, the gate wiring, and the source wiring are not arranged, the method including: an interlayer film formation step of forming an interlayer film including a silicon nitride layer formed from silicon nitride and a silicon oxide layer formed from silicon oxide so as to cover the gate electrode and the gate wiring; a hydrogenation step of repairing defective terminations of the semiconductor layer using hydrogen supplied from the silicon nitride layer; and an inorganic film removal step of removing the silicon nitride layer in at least a portion of the interlayer film located in the light-transmitting portion after the hydrogenation step, to form a removal region in which the silicon nitride layer is not present in the film thickness direction.

[0118] A manufacturing method for an active matrix substrate according to aspect 9 of the present disclosure, in accordance with aspect 8 above, includes a source electrode formation step of forming the source electrode and the drain electrode, and a source wiring electrically connected to the source electrode, from a second metal layer on the interlayer film after the hydrogenation step, in which the interlayer film formation step forms a film from the silicon nitride layer and the silicon oxide layer on the silicon nitride layer, and in the inorganic film removal step, after the source electrode formation, removes at least a portion of the interlayer film located in the light-transmitting portion to form a removal area in which the interlayer film does not exist in the film thickness direction.

[0119] A manufacturing method for an active matrix substrate according to aspect 10 of the present disclosure, in accordance with aspect 8 above, includes, after the hydrogenation step, a source electrode formation step of forming the source electrode and the drain electrode, and a source wiring electrically connected to the source electrode, from a second metal layer on the interlayer film, in which, in the interlayer film formation step, a film is formed from the silicon oxide layer, and the silicon nitride layer is formed on the silicon oxide layer, and in the inorganic film removal step, after the source electrode is formed, at least a portion of the silicon nitride layer located in the light-transmitting portion is removed to form a removal region in which the silicon nitride layer is not present in the film thickness direction.

[0120] The manufacturing method for an active matrix substrate according to aspect 11 of the present disclosure, in the above aspect 8, includes a source electrode formation step in which, after the hydrogenation step, the silicon nitride layer in a first region that does not include the gate wiring and the portion where the TFT is located is removed, leaving the silicon oxide layer, and the source electrode, the drain electrode, and a source wiring electrically connected to the source electrode are formed from a second metal layer on the interlayer film from which the silicon nitride layer has been removed.

[0121] A method for manufacturing an active matrix substrate according to aspect 12 of the present disclosure includes, in the above-mentioned aspect 8, a source electrode formation step of forming the source electrode, the drain electrode, and a source wiring electrically connected to the source electrode from a second metal layer on the interlayer film after the hydrogenation step, in which in the interlayer film formation step, a film is formed from the silicon oxide layer and the silicon nitride layer is formed on the silicon oxide layer, and in the inorganic film removal step, after the source electrode formation step, the silicon nitride layer is removed using the source electrode, the drain electrode, and the source wiring as a mask, leaving the silicon oxide layer.

[0122] The present disclosure is not limited to the above-described embodiments, and various modifications are possible within the scope of the claims. Embodiments obtained by appropriately combining the technical means disclosed in different embodiments are also included in the technical scope of the present disclosure. Furthermore, new technical features can be formed by combining the technical means disclosed in each embodiment. [Explanation of symbols]

[0123] 1 board 10 TFT 11 Semiconductor layer 12 Gate insulating film 13 Gate electrode 14, 14-1 Interlayer film 14A Silicon nitride film (silicon nitride layer) 14B Silicon oxide film (silicon oxide layer) 15A source electrode 15B Drain electrode 16 Planarization film 17 Pixel electrode 17A First pixel electrode 17B Second pixel electrode 18 Capacitor forming insulating film 19 Pixel electrode section 30 Liquid crystal layer 100, 200, 300, 400, 500 Active matrix substrate 600 Opposing substrate 1000 lcd display device RM1, RM2, RM3 (1st part) GL gate wiring SL Source wiring< / al>

Claims

1. a plurality of pixel regions arranged in a matrix; A substrate; TFTs supported on the substrate and provided corresponding to each of the plurality of pixel regions, the TFTs having a semiconductor layer, a gate electrode, a gate insulating film, a source electrode, a drain electrode, and an interlayer film; a plurality of gate wirings extending in the row direction and formed from the same conductive film as the gate electrodes; a plurality of source wirings extending in the column direction and formed from the same conductive film as the source electrode and the drain electrode; a light-transmitting portion is provided in a portion where the TFT, the gate wiring, and the source wiring are not disposed; The interlayer film is An active matrix substrate comprising: a silicon nitride layer formed from silicon nitride; and a silicon oxide layer formed from silicon oxide; and a first portion of the light-transmitting portion that does not include the silicon nitride layer.

2. the interlayer film has the silicon nitride layer located on a lower layer side closer to the semiconductor layer, The active matrix substrate according to claim 1 , wherein the first portion does not include the silicon oxide layer.

3. the interlayer film has the silicon oxide layer located on a lower layer side closer to the semiconductor layer, The active matrix substrate according to claim 1 , wherein the first portion includes the silicon oxide layer.

4. The active matrix substrate according to claim 1 , wherein the first portion is formed in a first region that does not include a portion where the gate line and the TFT are located, and the source line is located above the first portion.

5. 2. The active matrix substrate according to claim 1, wherein the first portion is formed over the entire surface except for the source electrode, the drain electrode, and an underside of the source line.

6. a planarization film covering the TFT; a pixel electrode portion provided on the planarization film and electrically connected to the TFT, a first pixel electrode; A second pixel electrode; an upper insulating film formed of silicon nitride and provided between the first pixel electrode and the second pixel electrode; 2. The active matrix substrate according to claim 1, further comprising: a second portion in which the upper insulating film is not provided in a region where the first pixel electrode and the second pixel electrode do not form a pixel capacitance.

7. The active matrix substrate according to claim 1; an opposing substrate disposed opposite the active matrix substrate; a liquid crystal layer provided between the active matrix substrate and the counter substrate; A liquid crystal display device comprising:

8. A method for manufacturing an active matrix substrate comprising: a substrate; and TFTs provided on the substrate corresponding to each of a plurality of pixel regions arranged in a matrix, the TFTs having a semiconductor layer, a gate electrode, a gate insulating film, a source electrode, a drain electrode, and an interlayer film; and a light-transmitting portion in a portion where the TFTs, gate wirings, and source wirings are not arranged, the method comprising: an interlayer film forming step of forming an interlayer film including a silicon nitride layer formed from silicon nitride and a silicon oxide layer formed from silicon oxide so as to cover the gate electrode and the gate wiring; a hydrogenation step of repairing defective terminations of the semiconductor layer using hydrogen supplied from the silicon nitride layer; and an inorganic film removing step of removing the silicon nitride layer from at least a part of the interlayer film located in the light-transmitting portion after the hydrogenation step to form a removed region in which the silicon nitride layer is not present in a film thickness direction.

9. a source electrode forming step of forming the source electrode and the drain electrode, and a source wiring electrically connected to the source electrode, on the interlayer film from a second metal layer after the hydrogenation step; In the interlayer film forming step, the silicon nitride layer is formed, and the silicon oxide layer is formed on the silicon nitride layer; 9. The method for manufacturing an active matrix substrate according to claim 8, wherein in the inorganic film removing step, after forming the source electrode, at least a part of the interlayer film located in the light-transmitting portion is removed to form a removed region in which the interlayer film is not present in a film thickness direction.

10. a source electrode forming step of forming the source electrode and the drain electrode, and a source wiring electrically connected to the source electrode, on the interlayer film from a second metal layer after the hydrogenation step; In the interlayer film forming step, the silicon oxide layer is formed, and the silicon nitride layer is formed on the silicon oxide layer; 9. The method for manufacturing an active matrix substrate according to claim 8, wherein in the inorganic film removing step, after forming the source electrode, at least a part of the silicon nitride layer located in the light transmitting portion is removed to form a removed region in which the silicon nitride layer is not present in a film thickness direction.

11. In the inorganic film removing step, after the hydrogenation step, the silicon nitride layer in a first region not including a portion where the gate wiring and the TFT are located is removed, and the silicon oxide layer is left; 9. The method for manufacturing an active matrix substrate according to claim 8, further comprising a source electrode forming step of forming, from a second metal layer, the source electrode, the drain electrode, and a source wiring electrically connected to the source electrode on the interlayer film from which the silicon nitride layer has been removed.

12. a source electrode forming step of forming the source electrode and the drain electrode, and a source wiring electrically connected to the source electrode, on the interlayer film from a second metal layer after the hydrogenation step; In the interlayer film forming step, the silicon oxide layer is formed, and the silicon nitride layer is formed on the silicon oxide layer; 9. The method for manufacturing an active matrix substrate according to claim 8, wherein in the inorganic film removing step, after the source electrode forming step, the silicon nitride layer is removed using the source electrode, the drain electrode, and the source line as a mask, and the silicon oxide layer is left.

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