Light-receiving element

Abstract

To provide a light-receiving element capable of mitigating an electric field.SOLUTION: A light-receiving element comprises: a first semiconductor layer, a light absorption layer, a second semiconductor layer and a third semiconductor layer which are laminated successively; an insulator film; a first electrode which is electrically connected to the first semiconductor layer; a second electrode which is electrically connected to the third semiconductor layer; and a third electrode which is electrically connected to the first electrode. The first semiconductor layer has a first conductivity type, and the third semiconductor layer has a second conductivity type and forms a first mesa. The second electrode is positioned on the first mesa and the first semiconductor layer, the light absorption layer and the second semiconductor layer are overlapped with the first mesa and extend outside of the first mesa. The insulator film covers the first mesa and the second semiconductor layer, and the third electrode is provided in a portion, where the second semiconductor layer is covered, in the insulator film and encloses the first mesa.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present disclosure relates to a light receiving element. [Background technology]

[0002] BACKGROUND ART Light receiving elements that receive light and output an electrical signal are known (for example, Patent Document 1). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 2020-47639 Summary of the Invention [Problem to be solved by the invention]

[0004] The light-receiving element has a mesa. There is a risk that an electric field may concentrate around the mesa. Therefore, an object of the present invention is to provide a light-receiving element that can alleviate the electric field. [Means for solving the problem]

[0005] The light-receiving element according to the present disclosure comprises a first semiconductor layer, a light absorption layer, a second semiconductor layer, and a third semiconductor layer stacked in this order, an insulating film, a first electrode electrically connected to the first semiconductor layer, a second electrode electrically connected to the third semiconductor layer, and a third electrode electrically connected to the first electrode, wherein the first semiconductor layer has a first conductivity type and the third semiconductor layer has a second conductivity type, forming a first mesa, the second electrode is located on the first mesa, the first semiconductor layer, the light absorption layer, and the second semiconductor layer extend to a position overlapping with the first mesa and to the outside of the first mesa, the insulating film covers the first mesa and the second semiconductor layer, and the third electrode is provided in a portion of the insulating film that covers the second semiconductor layer and surrounds the first mesa. [Effects of the Invention]

[0006] According to the present disclosure, it is possible to provide a light receiving element capable of alleviating an electric field. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a plan view illustrating a light receiving element according to the embodiment. [Figure 2] FIG. 2 is a cross-sectional view illustrating an example of a light receiving element. [Figure 3] FIG. 3 is a diagram showing an example of how the light receiving element is used. [Figure 4] FIG. 4 is a schematic diagram showing the connection between the light receiving element and the terminal. DETAILED DESCRIPTION OF THE INVENTION

[0008] [Description of the embodiments of the present disclosure] First, the contents of the embodiments of the present disclosure will be listed and described.

[0009] One aspect of the present disclosure provides a light-receiving element (1) comprising a first semiconductor layer, a light-absorbing layer, a second semiconductor layer, and a third semiconductor layer stacked in order, an insulating film, a first electrode electrically connected to the first semiconductor layer, a second electrode electrically connected to the third semiconductor layer, and a third electrode electrically connected to the first electrode, wherein the first semiconductor layer has a first conductivity type and the third semiconductor layer has a second conductivity type, forming a first mesa, the second electrode being located on the first mesa, the first semiconductor layer, the light-absorbing layer, and the second semiconductor layer extending to a position overlapping the first mesa and outside the first mesa, the insulating film covering the first mesa and the second semiconductor layer, and the third electrode being provided on a portion of the insulating film covering the second semiconductor layer, surrounding the first mesa. The third electrode is connected to the second electrode and has the same potential as the second electrode. An inversion layer is formed in the second semiconductor layer. An electric field can be alleviated around the first mesa. (2) In the above (1), the second semiconductor layer may be i-type, the first semiconductor layer may be n-type, and the third semiconductor layer may be p-type. An inversion layer is formed in the second semiconductor layer. This can reduce the electric field around the first mesa. (3) In the above (1) or (2), the semiconductor device may have a plurality of the first mesas, and the third electrode may be provided between the plurality of first mesas and surround each of the plurality of first mesas, thereby reducing the electric field around the plurality of first mesas. (4) In any of the above (1) to (3), the insulating film may cover the side surface of the first mesa and the upper surface of the second semiconductor layer, and the third electrode may be provided on a portion of the insulating film that covers the upper surface of the second semiconductor layer, away from a portion of the insulating film that covers the side surface of the first mesa. An inversion layer is formed in the second semiconductor layer. An electric field can be alleviated around the first mesa. The potential of the third electrode is less likely to affect the third semiconductor layer. (5) In any one of (1) to (4) above, the light-receiving element may have a first portion and a second portion, a recess provided between the first portion and the second portion, the first semiconductor layer, the light absorption layer, the second semiconductor layer, and the third semiconductor layer being stacked in the first and second portions, the first mesa and the third electrode being provided in the first portion, the first semiconductor layer being exposed in the recess, the first electrode being connected to the first semiconductor layer in the recess, and wiring connected to the third electrode and a portion of the first electrode located in the recess. By connecting the third electrode to the second electrode by the wiring, the third electrode has the same potential as the second electrode. (6) In the above (5), the third semiconductor layer may have a second mesa in the second portion, the insulating film may cover the second mesa, and the first electrode may be provided from the second mesa to the inside of the recess. The first electrode and the second electrode may be positioned at the same height. The first electrode and the second electrode may be connected to an external device.

[0010] [Details of the embodiments of the present disclosure] Specific examples of light-receiving elements according to embodiments of the present disclosure will be described below with reference to the drawings. Note that the present disclosure is not limited to these examples, but is defined by the claims, and is intended to include all modifications within the meaning and scope of the claims.

[0011] (photodetector) FIG. 1 is a plan view illustrating a light receiving element 100 according to an embodiment. FIG. 2 is a cross-sectional view illustrating the light receiving element 100, illustrating a cross section taken along line AA in FIG. 1. The light receiving element 100 has, for example, a rectangular shape in the XY plane. Two sides of the light receiving element 100 are parallel to the X-axis direction. The other two sides are parallel to the Y-axis direction. The Z-axis direction is the thickness direction and is perpendicular to the X-axis and Y-axis directions. The light receiving element 100 is used, for example, in 3D sensing and optical communication, and detects, for example, near-infrared light (wavelengths of 0.7 μm to 2.5 μm).

[0012] The light receiving element 100 has a portion 10 (first portion) and a portion 11 (second portion). A recess 16 is provided between portion 10 and portion 11. Portion 10 is a pixel portion and has a plurality of mesas 12 (first mesas). The plurality of mesas 12 are arranged, for example, in a two-dimensional grid. One mesa 12 functions as a photodiode and corresponds to one pixel. An electrode 20 (first electrode) is provided on mesa 12. Portion 11 has mesa 14 (second mesa). An electrode 22 (second electrode) is provided on mesa 14. An electrode 24 (third electrode) is provided on portion 10.

[0013] 2, the light receiving element 100 has a substrate 30, a semiconductor layer 32 (first semiconductor layer), a light absorption layer 34, a semiconductor layer 36, a semiconductor layer 38 (second semiconductor layer), a semiconductor layer 40, a semiconductor layer 42, and a semiconductor layer 44. The semiconductor layer 40, the semiconductor layer 42, and the semiconductor layer 44 correspond to a third semiconductor layer.

[0014] A semiconductor layer 32 is stacked on one surface of the substrate 30. In portions 10 and 11, a light absorbing layer 34, a semiconductor layer 36, a semiconductor layer 38, a semiconductor layer 40, a semiconductor layer 42, and a semiconductor layer 44 are stacked in this order on the surface of the semiconductor layer 32 opposite the substrate 30.

[0015] The substrate 30 is made of, for example, semi-insulating indium phosphide (InP). The substrate 30 is doped with iron (Fe). The resistivity is 1×10 7The resistivity is Ω·cm or more. The thickness is, for example, 300 μm. The semiconductor layer 32 is made of n-type (first conductivity type) indium phosphide (n-InP). The semiconductor layer 32 has a resistivity of, for example, 1×10 18 cm -3 The light absorption layer 34 is doped with silicon (Si) at a concentration of, for example, 1×10. The thickness is, for example, 2 μm. The light absorption layer 34 is formed of, for example, i-type indium gallium arsenide (InGaAs). The light absorption layer 34 is doped with, for example, 1×10 15 cm -3 It is doped with Si at the following concentration and has a thickness of 4 μm.

[0016] The semiconductor layer 36 is formed of, for example, two indium gallium arsenide phosphide (InGaAsP) layers. The semiconductor layer 38 is formed of, for example, i-type indium phosphide (i-InP). The semiconductor layer 38 has, for example, 2×10 15 cm -3 The semiconductor layer 40 and the semiconductor layer 42 are doped with Si at a concentration of, for example, 1×10. The thickness is 0.5 μm. The semiconductor layer 40 and the semiconductor layer 42 are formed of, for example, p-type (second conductivity type) indium phosphide (p-InP). The semiconductor layer 40 is doped with Si at a concentration of, for example, 1×10. 16 cm -3 The semiconductor layer 42 is doped with zinc (Zn) at a concentration of, for example, 5×10 17 cm -3 The semiconductor layer 40 is doped with Zn at a concentration of, for example, 2×10. The thickness of the semiconductor layer 40 is, for example, 0.1 μm. The thickness of the semiconductor layer 42 is, for example, 0.2 μm. The semiconductor layer 44 is formed of, for example, p-InGaAs, and functions as a contact layer. The semiconductor layer 44 is doped with Zn at a concentration of, for example, 2×10. 19 cm -3 The semiconductor layers of the light receiving element 100 may be formed of compound semiconductors other than those mentioned above.

[0017] Portion 10 has multiple mesas 12 and recesses 13. The recesses 13 penetrate semiconductor layer 44, semiconductor layer 42, and semiconductor layer 40 in the Z-axis direction, and extend partway through semiconductor layer 38. Semiconductor layer 40, semiconductor layer 42, and semiconductor layer 44 are stacked on the portion of semiconductor layer 38 that protrudes above the recesses 13, forming mesas 12. The recesses 13 are provided on the outer periphery of portion 10 and between the multiple mesas 12, surrounding the mesas 12. The recesses 13 separate the mesas 12. The semiconductor layer 38, semiconductor layer 36, and light absorption layer 34 overlap the mesas 12 in the Z-axis direction and extend outside the mesas 12.

[0018] The width W1 of the mesa 12 is, for example, 85 μm. The height from the bottom surface of the recess 13 to the semiconductor layer 44 is 0.75 μm. The distance D1 between the two mesas 12 is, for example, 5 μm.

[0019] In portion 11, semiconductor layer 38, semiconductor layer 40, semiconductor layer 42, and semiconductor layer 44 form mesa 14 (second mesa). Mesa 14 is located at the same height as mesa 12. Light absorption layer 34, semiconductor layer 36, semiconductor layer 38, semiconductor layer 40, semiconductor layer 42, and semiconductor layer 44 are not provided in recess 16. Recess 16 is a portion recessed downward in the Z-axis direction from portions 10 and 11, and extends halfway through semiconductor layer 32. The depth of recess 16 is, for example, 5 μm.

[0020] An insulating film 46 is provided on the surface of the light-receiving element 100. The insulating film 46 covers the portions 10 and 11, the side and top surfaces of the mesa 12, the bottom surface of the recess 13, the side and top surfaces of the mesa 14, and the bottom surface of the recess 16. The insulating film 46 has an opening above the mesa 12 and an opening inside the recess 16.

[0021] The electrode 20 is provided on the mesa 12 and is electrically connected to the semiconductor layer 44 through an opening in the insulating film 46. The electrode 22 extends from the top surface of the mesa 14 to the bottom surface of the recess 16 and is electrically connected to the semiconductor layer 32 through the opening in the insulating film 46.

[0022] 1, the electrode 24 has a lattice pattern and is provided in the recess 13. As shown in FIGS. 1 and 2, the electrode 24 is located on the outer periphery of the portion 10 and between the multiple mesas 12, surrounding the mesas 12. Specifically, the electrode 24 is provided on the portion of the insulating film 46 that covers the semiconductor layer 38 in the recess 13, and is spaced apart from the portion of the insulating film 46 that covers the side surfaces of the mesas 12. The width of the electrode 24 is smaller than the distance D1 between the mesas 12, and is, for example, 4.5 μm.

[0023] The electrode 24 is insulated from the light absorbing layer 34, the semiconductor layer 36, the semiconductor layer 38, the semiconductor layer 40, the semiconductor layer 42, and the semiconductor layer 44. The electrode 24 is electrically connected to the electrode 22 by a wiring 26. The wiring 26 extends from the recess 16 to the portion 10. The wiring 26 is electrically connected to the electrode 22 in the recess 16, and is electrically connected to the electrode 24 in the portion 10. The electrodes 20, 22, 24, and the wiring 26 are formed of metal.

[0024] An insulating film 48 is provided on the surface of the substrate 30 opposite the semiconductor layer 32. The insulating film 48 is an anti-reflection film. The insulating films 46 and 48 are made of nitrides such as silicon oxide (SiO2), silicon nitride (SiN), and silicon oxynitride (SiON).

[0025] FIG. 3 is a diagram showing an example of how the light-receiving element 100 is used. The light-receiving element 100 is flip-chip mounted on a substrate 50. A readout integrated circuit (ROIC) is provided on the substrate 50. The surface of the light-receiving element 100 on which electrodes 20 and the like are provided faces the surface of the substrate 50 on which electrodes 52 are provided. Electrodes 20 and 22 are connected to electrode 52 by bumps 54. Electrode 24 is not connected to bumps 54, but is connected to electrode 22 through wiring 26 and has the same potential as electrode 22.

[0026] A reverse bias voltage is applied to the photodetector 100 through the substrate 50. A negative voltage is applied to the electrode 20, and a positive voltage is applied to the electrode 22. Light is incident on the back surface of the substrate 30. The light absorption layer 34 absorbs the light and generates carriers (hole-electron pairs). The carriers move due to the electric field, and a photocurrent is output. The substrate 50 reads out the photocurrent.

[0027] FIG. 4 is a schematic diagram showing the connection between the light receiving element 100 and terminals. Terminals T1 and T2 are schematic representations of terminals of an external power supply. A reverse bias voltage is applied from the external power supply. Terminal T1 is connected to multiple electrodes 20. Terminal T2 is connected to electrodes 22 and 24. The multiple electrodes 20 have the same potential. Electrodes 22 and 24 have the same potential.

[0028] According to the embodiment, an electrode 20 is connected to the semiconductor layer 44 of the mesa 12. An electrode 22 is connected to the semiconductor layer 32. An electrode 24 surrounds the mesa 12 and is connected to the electrode 22. Application of a reverse bias voltage generates a depletion layer below the mesa 12. An electric field is applied to the depletion layer. An inversion layer is generated in the semiconductor layer 38 near the electrode 24, making it difficult for an electric field to be applied. The electric field is relaxed around the mesa 12, preventing electric field concentration. This reduces the possibility of failure and erroneous operation of the photodetector 100, improving reliability.

[0029] The semiconductor layer 32 is n-type. The semiconductor layers 40, 42, and 44 are p-type. The light-absorbing layer 34 and the semiconductor layer 38 are i-type. The semiconductor layers 32, 34, and 44 form a pin junction. Carriers generated in the light-absorbing layer 34 move, and a photocurrent is output. The potential of the electrode 24 forms an inversion layer in the i-type semiconductor layer 38. This prevents electric field concentration. The semiconductor layer 32 may be p-type, and the mesa 12 may include an n-type semiconductor layer.

[0030] As shown in FIG. 1, a portion 10 is provided with a plurality of mesas 12 and an electrode 24. The electrode 24 surrounds each of the plurality of mesas 12. This prevents electric field concentration around the plurality of mesas 12. Failures and malfunctions in each mesa 12 are unlikely to occur. Light can be detected by a plurality of pixels. The light-receiving element may be a single-pixel element having one mesa 12. An electrode 24 is provided around each mesa 12.

[0031] The insulating film 46 covers the side surfaces of the mesa 12 and the upper surface of the semiconductor layer 38. The electrode 24 is provided on the portion of the insulating film 46 that covers the semiconductor layer 38. The electrode 24 has the same potential as the electrode 22, which generates an inversion layer in the semiconductor layer 38. This allows the electric field to be alleviated. The electrode 24 is spaced apart from the portion of the insulating film 46 that covers the side surfaces of the mesa 12. The potential of the electrode 24 is unlikely to affect the p-type semiconductor layer 40, the semiconductor layer 42, and the semiconductor layer 44.

[0032] A plurality of mesas 12 are provided in portion 10 of the light-receiving element 100, and electrodes 20 and 24 are provided thereon. Electrode 22 is provided in portion 11 and recess 16. Wiring 26 extends from recess 16 to portion 10 and is electrically connected to electrodes 22 and 24. By being connected to wiring 26, electrode 24 has the same potential as electrode 22.

[0033] A mesa 14 is provided on portion 11, and an electrode 22 is provided on mesa 14. Electrodes 20 and 22 are located at approximately the same height. As shown in FIG. 3, bumps 54 can be used to connect electrodes 20 and 22 to an external device such as a substrate 50. Electrode 24 is connected to electrode 22 by wiring 26, so it does not need to be located at the same height as electrodes 20 and 24.

[0034] Although the embodiments of the present disclosure have been described in detail above, the present disclosure is not limited to such specific embodiments, and various modifications and variations are possible within the scope of the gist of the present disclosure as described in the claims. [Explanation of symbols]

[0035] 10, 11 parts Mesa 12 and 14 13, 16 Recess 20, 22, 24, 52 electrodes 30, 50 board 54 Bump 32, 36, 38, 40, 42, 44 Semiconductor layer 46, 48 Insulating film 100 Photodetector

Claims

1. a first semiconductor layer, a light absorbing layer, a second semiconductor layer, and a third semiconductor layer stacked in this order; An insulating film; a first electrode electrically connected to the first semiconductor layer; a second electrode electrically connected to the third semiconductor layer; a third electrode electrically connected to the first electrode, the first semiconductor layer has a first conductivity type; the third semiconductor layer has a second conductivity type and forms a first mesa; the second electrode is located on the first mesa; the first semiconductor layer, the light absorption layer, and the second semiconductor layer extend to a position overlapping with the first mesa and to an outside of the first mesa; the insulating film covers the first mesa and the second semiconductor layer; The third electrode is provided on a portion of the insulating film that covers the second semiconductor layer and surrounds the first mesa.

2. the second semiconductor layer is i-type; the first semiconductor layer is n-type; 2. The light-receiving element according to claim 1, wherein the third semiconductor layer is a p-type semiconductor layer.

3. a plurality of the first mesas; 3. The light-receiving element according to claim 1, wherein the third electrode is provided between the plurality of first mesas and surrounds each of the plurality of first mesas.

4. the insulating film covers a side surface of the first mesa and an upper surface of the second semiconductor layer; 3. The photodiode according to claim 1, wherein the third electrode is spaced apart from a portion of the insulating film that covers a side surface of the first mesa and is provided on a portion of the insulating film that covers an upper surface of the second semiconductor layer.

5. the light receiving element has a first portion and a second portion; a recess is provided between the first portion and the second portion; the first semiconductor layer, the light absorption layer, the second semiconductor layer, and the third semiconductor layer are stacked in the first portion and the second portion; the first mesa and the third electrode are provided on the first portion; the first semiconductor layer is exposed in the recess; the first electrode is connected to the first semiconductor layer in the recess; 3. The light-receiving element according to claim 1, further comprising a wiring connected to the third electrode and a portion of the first electrode located in the recess.

6. the third semiconductor layer forms a second mesa in the second portion; the insulating film covers the second mesa; The light-receiving element according to claim 5 , wherein the first electrode is provided from the second mesa to the inside of the recess.

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