Image formation device

Abstract

To solve such the problem that a bottom emission type exposure device has insufficient light intensity for exposing a photoreceptor drum and a top emission type light-emitting device is used for exposing a photoreceptor drum but such a case that a stronger light intensity is needed for exposing a photoreceptor drum may occur.SOLUTION: An image formation device exposes a photoreceptor drum using light passing through a light-transmissive electrode that is laminated on a light-emitting layer on an opposite side to a first electrode that is laminated on a silicon substrate and arranged two-dimensionally while interposing the light-emitting layer therebetween.SELECTED DRAWING: Figure 7

Description

[Technical Field]

[0001] The present invention relates to an electrophotographic image forming apparatus. [Background technology]

[0002] Electrophotographic image forming devices are commonly known that form images by exposing a photosensitive drum to light using an exposure head equipped with light-emitting diodes (LEDs) or organic electroluminescence (EL). The exposure head includes multiple light-emitting elements arranged in a direction substantially perpendicular to the rotational direction of the photosensitive drum. The exposure head also includes a rod lens array for focusing light emitted from each light-emitting element onto the photosensitive drum. The number of light-emitting elements and the spacing between adjacent light-emitting elements are determined by the width of the image-forming area on the photosensitive drum and the resolution of the output image of the image forming device. For example, in a printer with an output resolution of 1200 dpi, the width of one pixel is 21.16 μm (omitted after the third decimal point), so the center-to-center distance between adjacent light-emitting elements is 21.16 μm. Image forming devices using such exposure heads do not use deflection devices such as polygon mirrors as laser beam printers do. Therefore, compared to laser scanning printers, fewer components are used, allowing for smaller size and lower cost.

[0003] As such an exposure head, an exposure head using a TFT circuit and an organic EL on a transparent glass substrate has been proposed (see, for example, Patent Document 1). [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2015-162428 Summary of the Invention [Problem to be solved by the invention]

[0005] The light-emitting device provided in the exposure head disclosed in Patent Document 1 is a so-called bottom-emission type light-emitting device that emits light from the organic layer from the TFT circuit side. In a bottom-emission type light-emitting device, the optical path is limited by the TFT circuit, so the ratio of the amount of light emitted from the light-emitting device to the amount of light emitted by the light-emitting layer is small. Therefore, when a bottom-emission type light-emitting device is used as an exposure light source for a photoconductor, there is a problem in that the amount of emitted light must be increased. [Means for solving the problem]

[0006] The present invention has been made in view of the above problems, and provides an image forming apparatus comprising: an exposure head including a photosensitive member that is rotationally driven about a rotation axis; a light emitting device; and a lens array that guides light emitted from the light emitting device to a surface of the photosensitive member, wherein the light emitting device includes a silicon substrate including a drive circuit that drives the light emitting device; a first electrode layer including a plurality of electrodes that are two-dimensionally arranged in the rotation direction of the photosensitive member and in a direction substantially parallel to the rotation axis, the plurality of electrodes being formed separately on the silicon substrate; and a second electrode layer formed in a layer on the first electrode layer. and a light-transmitting second electrode layer that is provided on the opposite side of the silicon substrate and the first electrode layer, sandwiching the light-emitting layer, and that is common to the plurality of electrodes of the first electrode layer, and that is light-transmitting; the drive circuit controls the voltage of each electrode included in the first electrode layer based on image data so that the light-emitting layer emits light; and the lens array is disposed between the second electrode layer and the surface of the photosensitive member so that light that has passed through the second electrode layer is guided onto the photosensitive member. [Effects of the Invention]

[0007] It is possible to provide an image forming apparatus that exposes a photosensitive drum using a light emitting device with a top emission structure. [Brief explanation of the drawings]

[0008] [Figure 1]1 is a schematic cross-sectional view of an image forming apparatus according to an embodiment of the present invention; [Figure 2] FIG. 1 is a diagram showing the positional relationship between an exposure head and a photosensitive drum according to the present embodiment. [Figure 3] Schematic diagram of an exposure head according to this embodiment [Figure 4] FIG. 1 is a diagram showing the layout relationship of a plurality of light-emitting devices on a printed circuit board according to an embodiment of the present invention; [Figure 5] FIG. 1 is a top view showing the arrangement relationship between the rod lens array and the printed circuit board according to this embodiment. [Figure 6] 1 is a top view of a light-emitting device according to an embodiment of the present invention; [Figure 7] FIG. 1 shows an arrangement of lower electrodes according to this embodiment. [Figure 8] Schematic cross-sectional view of a light emitting device according to the present embodiment. [Figure 9] FIG. 10 is a diagram illustrating the state of multiple spots according to this embodiment. [Figure 10] 1 is a block diagram of an image controller and a drive board according to the present embodiment. [Figure 11] Circuit diagram of the light emitting device according to the present embodiment [Figure 12] 10A and 10B are diagrams showing waveforms of each signal and shifts in image data; [Figure 13] 1 is a diagram showing waveforms of signals and image data for performing multiple exposure according to the present embodiment; FIG. [Figure 14] 1 is a block diagram of an analog section and a circuit diagram of a driving section according to the present embodiment. [Figure 15] Circuit diagram of a light-emitting device for switching the light-emitting order according to the present embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0009] [Example 1] Fig. 1 is a schematic cross-sectional view showing the configuration of an electrophotographic image forming apparatus in Example 1. The image forming apparatus shown in Fig. 1 is a multifunction peripheral (MFP) equipped with a scanner function and a printer function, and is composed of a scanner unit 100, an image creating unit 103, a fixing unit 104, a paper feed / transport unit 105, and a printer control unit (not shown) that controls these. The scanner unit 100 illuminates a document placed on a document table to optically read the document image, and converts the read image into an electrical signal to create image data.

[0010] The imaging unit 103 includes four image forming stations arranged in the order of cyan (C), magenta (M), yellow (Y), and black (K) along the rotational direction (counterclockwise) of an endless conveyor belt 111. The four image forming stations have the same configuration, and each image forming station includes a photosensitive drum 102, which is a photosensitive member that rotates in the direction of the arrow (clockwise), an exposure head 106, a charger 107, and a developing unit 108. The suffixes a, b, c, and d of the photosensitive drum 102, exposure head 106, charger 107, and developing unit 108 indicate that the configuration corresponds to the image forming station (black (K), yellow (Y), magenta (M), and cyan (C), respectively. In the following, the suffixes of the reference numerals will be omitted except when referring to a specific photosensitive drum, etc.

[0011] In the image forming unit 103, the photosensitive drum 102 is rotated and charged by a charger 107. An exposure head 106, which serves as an exposure means, causes a light-emitting device to emit light in accordance with image data, and the light generated by the light-emitting device is focused onto the photosensitive drum 102 (on the photosensitive member) by a rod lens array, forming an electrostatic latent image. A developing device 108, which serves as a development means, develops the electrostatic latent image formed on the photosensitive drum 102 with toner. The developed toner image is then transferred to a recording sheet on a conveyor belt 111 that conveys the recording sheet. This series of electrophotographic processes is performed at each image forming station. During image formation, after a predetermined time has elapsed since the start of image formation at the cyan (C) image forming station, image forming operations are performed sequentially at the magenta (M), yellow (Y), and black (K) image forming stations. This results in a full-color image being formed.

[0012] The image forming apparatus shown in FIG. 1 includes a paper feed / transport unit 105 having internal paper feed units 109a and 109b, a large-capacity external paper feed unit 109c, and a manual paper feed unit 109d as units for feeding recording paper. During image formation, recording paper is fed from a predetermined paper feed unit and transported to registration rollers 110. Registration rollers 110 transport the recording paper to a transport belt 111 at the timing when the toner image formed in the image forming unit 103 is transferred to the recording paper. Toner images formed on the photosensitive drums 102 of each image forming station are sequentially transferred onto the recording paper transported by the transport belt 111. The recording paper with the unfixed toner image transferred is transported to a fixing unit 104. Fixing unit 104 has a built-in heat source such as a halogen heater, and fixes the toner image on the recording paper to the recording paper by applying heat and pressure with two rollers. The recording paper on which the toner image has been fixed by the fixing unit 104 is discharged by a discharge roller 112 to the outside of the image forming apparatus.

[0013] An optical sensor 113, which serves as a detection unit, is disposed downstream of the black (K) image forming station in the recording paper transport direction, facing the transport belt 111. The optical sensor 113 detects the position of a test image formed on the transport belt 111 to derive the amount of color shift of the toner images between the image forming stations. The amount of color shift derived by the optical sensor 113 is notified to an image controller unit 700 (see FIG. 7), which will be described later, and the image position of each color is corrected so that a full-color toner image without color shift is transferred onto the recording paper. In addition, a printer control unit (not shown) executes image formation operations while controlling the scanner unit 100, image creating unit 103, fixing unit 104, paper feed / transport unit 105, etc., in accordance with instructions from an MFP control unit (not shown), which controls the entire multifunction peripheral (MFP).

[0014] Here, as an example of an electrophotographic image forming apparatus, an image forming apparatus of a type in which a toner image formed on the photosensitive drum 102 of each image forming station is directly transferred to recording paper on a conveyor belt 111 has been described. However, the embodiment is not limited to such a printer of a type in which a toner image on the photosensitive drum 102 is directly transferred to recording paper. For example, the embodiment may also be an image forming apparatus including a primary transfer unit that transfers the toner image on the photosensitive drum 102 to an intermediate transfer belt, and a secondary transfer unit that transfers the toner image on the intermediate transfer belt to recording paper.

[0015] [Exposure head configuration] Next, the exposure head 106 that exposes the photosensitive drum 102 will be described with reference to Fig. 2. Fig. 2(a) is a perspective view showing the positional relationship between the exposure head 106 and the photosensitive drum 102, and Fig. 2(b) is a diagram illustrating the internal configuration of the exposure head 106 and how a light beam from the exposure head 106 is focused onto the photosensitive drum 102 by a rod lens array 203. As shown in Fig. 2(a), the exposure head 106 is attached to the image forming apparatus by an attachment member (not shown) at a position above the photosensitive drum 102, which rotates in the direction of the arrow, facing the photosensitive drum 102 (Fig. 1).

[0016] As shown in FIG. 2(b), the exposure head 106 is composed of a printed circuit board 202, a light-emitting device group 400 mounted on the printed circuit board 202, a rod lens array 203, and a housing 204. The rod lens array 203 and printed circuit board 202 are attached to the housing 204. As shown in FIG. 2, the rod lens array 203 is disposed between the light-emitting device group 400 and the photosensitive drum 102. The rod lens array 203 is disposed along the longitudinal direction of the printed circuit board 202 and focuses the light beams emitted by the light-emitting device group onto the photosensitive drum 102. In the factory, the exposure head 106 is assembled and adjusted individually, and focus and light intensity adjustments are performed. Here, assembly adjustments are performed so that the distance between the photosensitive drum 102 and the rod lens array 203, and the distance between the rod lens array 203 and the light-emitting device group 400 are predetermined intervals. As a result, light from the light-emitting device group 400 is imaged on the photosensitive drum 102. Therefore, when adjusting the focus at the factory, the mounting position of the rod lens array 203 is adjusted so that the distance between the rod lens array 203 and the light-emitting device group 400 is a predetermined value. Also, when adjusting the light intensity at the factory, the lower electrode of the light-emitting device 401 described later is driven, and a voltage described later to be applied to the light-emitting device is adjusted so that the light focused on the photosensitive drum 102 via the rod lens array 203 becomes a predetermined light intensity.

[0017] Fig. 3 is a diagram illustrating the printed circuit board 202 and the light emitting device group 400 mounted on the printed circuit board. Fig. 3(a) is a schematic diagram showing the configuration of the surface of the printed circuit board 202 on which the light emitting device group 400 is mounted, and Fig. 3(b) is a schematic diagram showing the configuration of the surface (second surface) opposite to the surface (first surface) on which the light emitting device group 400 of the printed circuit board 202 is mounted.

[0018] As shown in FIG. 3A, the light emitting device group 400 mounted on the printed circuit board 202, which is a second substrate, has a configuration in which light emitting devices 401-1 to 401-20, which are independent chips, are arranged in two staggered rows along the longitudinal direction of the printed circuit board 202. That is, on the printed circuit board 202 (second substrate), odd-numbered light emitting devices 401-1... and even-numbered light emitting devices 401-2... are arranged at different positions in the rotation direction of the photosensitive drum 102. Hereinafter, when the light emitting devices 401-1 to 401-20 are collectively referred to, they will be described as light emitting devices 400. In FIG. 3A, the up-down direction indicates the rotation direction of the photosensitive drum 102, which is a first direction, and the horizontal direction indicates the longitudinal direction, which is a second direction perpendicular to the first direction. The longitudinal direction is also an intersecting direction that intersects with the rotation direction of the photosensitive drum 102. Each light-emitting device group 400 has a total of 748 lower electrodes (described later). In this embodiment, the lower electrodes are arranged at intervals of 21.16 μm (≒ 2.54 cm / 1200 dots). As a result, the arrangement distance from end to end of the 748 lower electrodes within one light-emitting device is approximately 15.8 mm (≒ 21.16 μm × 748). The light-emitting device group 400 is composed of 20 light-emitting devices 401-1 to 401-20. The number of lower electrodes in the light-emitting device group 400 is 14,960 (= 748 electrodes × 20 chips), and the light-emitting device group 400 enables exposure corresponding to an image width in the longitudinal direction of approximately 316 mm (≒ approximately 15.8 mm × 20 chips).

[0019] 3(b), a connector 305 is mounted on the surface of the printed circuit board 202 opposite to the surface on which the light emitting device group 400 is mounted. The connector 305 is a connector for connecting a power supply line and a control signal for controlling the light emitting device group 400 from the image controller unit 700 (not shown), and each of the light emitting devices 401-1 to 401-748 is driven via the connector 305.

[0020] Fig. 4 is a diagram showing the boundary between chips of light emitting devices 401 arranged in two rows in the longitudinal direction, with the horizontal direction being the longitudinal direction of light emitting device group 401 in Fig. 3(a). Fig. 4 also shows the boundary between chips of light emitting device 401 (the portion where the ends of chips overlap in the longitudinal direction (overlapping portion)). Even at the boundary between light emitting device 401-2n and light emitting device 401-2n+1, the pitch of the lower electrodes at the ends between different light emitting devices (the distance between the center points of two lower electrodes) is approximately 21.16 µm, which is the pitch for a resolution of 1200 dpi.

[0021] Fig. 5 is a top view showing the positional relationship between the rod lens array 203 and the printed circuit board 202 according to this embodiment. The rod lens array 203 is a lens group in which rod lenses whose optical axes extend in the Z direction are arranged as shown in Fig. 5. A plurality of rod lenses 500 are arranged over the length or longer of the light-emitting regions of the light-emitting devices 401-1 to 401-748 mounted on the printed circuit board 202. Instead of the rod lens array 203, a microlens array or the like can be used.

[0022] [Configuration of light-emitting device] FIG. 6 is a schematic diagram showing the internal configuration of the light-emitting device 401. As shown in FIG. 6, the longitudinal direction of the light-emitting device 401 is the X direction, and the lateral direction is the Y direction. The Y direction is the rotation direction of the photosensitive drum 102, or in other words, the movement direction of the photosensitive surface (photoconductor surface) of the rotating photosensitive drum 102. The X direction is a direction substantially perpendicular to the Y direction, i.e., the rotation direction of the photosensitive drum 102. It is also a direction substantially parallel to the rotation direction of the photosensitive drum 102. Note that substantially perpendicular allows a tilt of approximately ±1° relative to an angle of 90°, and substantially parallel allows a tilt of approximately ±1° relative to an angle of 0°. The light-emitting device 401 has wire bonding pads (hereinafter referred to as WB pads) 601-1, 601-2, 601-3, and 601-4 formed on a silicon substrate 402, which is a first substrate. A circuit unit 602 (indicated by a broken line), which serves as a drive unit, is built into the silicon substrate 402. An analog driving circuit, a digital control circuit, or both can be used as the circuit portion 602. Power supply to the circuit portion 602 and input / output of signals from outside the light emitting device 401 are performed via a WB pad.

[0023] The light-emitting device 401 of this embodiment includes a linear light-emitting region 604 extending along the rotation axis direction of the photosensitive drum. The light-emitting region 604 includes an anode, a cathode, and a light-emitting layer 450, which will be described later, and is a region that emits light when a potential difference occurs between the anode and the cathode.

[0024] Silicon substrates 402 have an advantage in that they can be used to form high-speed, high-performance circuits at high density, as the process technology for forming integrated circuits has already developed and they are already used as substrates for various integrated circuits. In addition, large-diameter wafers of silicon substrates are available on the market, making them inexpensive to purchase.

[0025] Light emitting device 401 will be described in more detail with reference to Figures 7 and 8. The X direction in Figures 7 and 8 indicates the longitudinal direction of the exposure head, and the Z direction is the direction in which each layer of the layer structure described below overlaps (stacking direction).

[0026] Fig. 7 is an enlarged view of a main part of the schematic diagram of the AA cross section in Fig. 6. Fig. 8 is a schematic diagram of lower electrodes 410-1 to 410-748, which will be described later, as viewed from the Y direction. As shown in Fig. 7, light emitting device 401 includes silicon substrate 402, lower electrodes 410-1 to 410-748, lower electrodes 420-1 to 420-748, light emitting layer 450, and upper electrode 460.

[0027] Silicon substrate 402 is a driving substrate on which driving circuits including driving sections corresponding to lower electrodes 410-1 to 410-748, which will be described later, are formed in the manufacturing process.

[0028] 5, lower electrodes 410-1 to 410-748 (cathodes) are a plurality of electrodes formed in layers (first electrode layers) on silicon substrate 402. Each of lower electrodes 410-1 to 410-748 is formed on a plurality of drive units built into silicon substrate 402 using Si integrated circuit processing technology in addition to the manufacturing process for silicon substrate 402. Lower electrodes 410-1 to 410-748 are preferably made of a metal that has high reflectivity at the emission wavelength of light-emitting layer 450, which will be described later. Therefore, lower electrodes 410-1 to 410-748 preferably contain silver (Ag), aluminum (Al), or an alloy thereof, a silver-magnesium alloy, or the like.

[0029] 7 and 8, lower electrodes 410-1 to 410-748 are electrodes provided corresponding to each pixel in the X direction. That is, lower electrodes 410-1 to 410-748 are electrodes provided to form one pixel each. Lower electrodes 410-1 to 410-748 form a first electrode row.

[0030] In this embodiment, the width W of the lower electrodes 410-1 to 410-748 in the X direction corresponds to the width of one pixel. The interval d is the distance between the lower electrodes in the X direction. The lower electrodes 410-1 to 410-748 are formed on the silicon substrate 402 with the interval d between them, so that the multiple driving units formed on the light-emitting substrate 402 can individually control the voltages of the lower electrodes 410-1 to 410-748. The interval d is filled with the organic material of the light-emitting layer 450, and the lower electrodes are partitioned by the organic material.

[0031] In the light-emitting device of this embodiment, the width W of the lower electrodes 410-1 to 410-748 is set to a nominal dimension of 20.90 μm, and the spacing d is set to a nominal dimension of 0.26 μm. In other words, the light-emitting device of this embodiment has one lower electrode 410 every 21.16 μm in the X direction. Since 21.16 μm is the size of one pixel at 1200 dpi, the width of each lower electrode 410 in the X direction is equivalent to one pixel corresponding to the output resolution of the image forming device of this embodiment. Note that the process rule for the light-emitting device of this embodiment is highly accurate, at approximately 0.2 μm, and it is possible to form the width d1 with a resolution of 0.26 μm.

[0032] The width of the lower electrodes 410-1 to 410-748 in the Y direction, which is the rotation direction of the photosensitive drum, is also W. That is, the lower electrodes 410-1 to 410-748 in this embodiment are 20.90 μm square, and the area of ​​the lower electrode 410 is 436.81 μm 2 This means that the area of ​​one pixel is 447.7456 μm 2The organic light-emitting material emits less light than an LED. By forming the lower electrodes on the silicon substrate 402 with a square shape and a small distance between adjacent lower electrodes as described above, it is possible to ensure a light-emitting area large enough to generate enough light to change the potential of the photosensitive drum. It is desirable to ensure a lower electrode area of ​​at least 90% of the area occupied by one pixel. Therefore, for an image forming device with an output resolution of 1200 dpi, it is desirable to form the lower electrode 410 with a side width of at least approximately 20.07 μm, and for an image forming device with an output resolution of 2400 dpi, it is desirable to form the lower electrode 410 with a side width of at least approximately 10.04 μm.

[0033] On the other hand, the upper limit of the area occupied by the lower electrode 410 should be set based on the transmittance of the rod lens array and the upper electrode (described later). In this embodiment, however, the upper limit is set to 110% of the area occupied by one pixel. If the area is designed to be larger than 110% of the area occupied by one pixel, the size of the pixel formed when exposing a highly sensitive photosensitive drum may significantly exceed the resolution. Therefore, the upper limit of the area occupied by the lower electrode 410 is set to 110%. Therefore, for an image forming apparatus with an output resolution of 1200 dpi, it is desirable to form the width of one side of the lower electrode 410 to approximately 22.19 μm or less. For an image forming apparatus with an output resolution of 2400 dpi, it is desirable to form the width of one side of the lower electrode 410 to approximately 11.10 μm or less. In other words, the range of the area occupied by the lower electrode relative to the area occupied by one pixel is preferably 90% or more and 110% or less.

[0034] The shape of the lower electrode is not limited to a square, and may be a polygon with more than a square, a circle, an ellipse, or any other shape as long as it emits light of an exposure area size corresponding to the output resolution of the image forming device and the image quality of the output image produced by that light is at a level that meets the design specifications of the image forming device.

[0035] As shown in FIG. 8(a), light emitting device 401 of this embodiment includes lower electrodes 420-1 to 420-748 in addition to lower electrodes 410-1 to 410-748. Like lower electrodes 410-1 to 410-748, lower electrodes 420-1 to 420-748 are multiple electrodes formed in layers (first electrode layers) on silicon substrate 402. Lower electrodes 420-1 to 420-748 form a second electrode row. In other words, light emitting device 401 includes lower electrodes that are two-dimensionally arranged. The size, shape, and arrangement in the X direction of lower electrodes 420-1 to 420-748 are the same as those of lower electrodes 420-1 to 420-748, so a description thereof will be omitted.

[0036] Lower electrodes 420-1 to 420-748 (second electrode row) are arranged at a distance d from lower electrodes 410-1 to 410-748 (first electrode row) in the Y direction. Lower electrode 420-1 is arranged adjacent to lower electrode 410-1 in the Y direction, and similarly, lower electrodes 420-2 to 420-748 are arranged adjacent to lower electrodes 410-2 to 410-748, respectively. Note that, as in this embodiment, it is not necessary to design the distance between lower electrodes in the X direction and the distance between lower electrodes in the Y direction to be equal, but it is desirable to design the distance between lower electrodes in both directions to be equal in order to efficiently arrange the lower electrodes within a specified area. Furthermore, in this embodiment, a light-emitting device having two electrode rows is illustrated as an example for ease of explanation, but as shown in FIG. 8(b), the number of electrode rows may be any number of rows, such as three or more. For example, similarly to the above, lower electrodes 430-1 to 430-748 may be arranged adjacent to lower electrodes 420-1 to 420-748, respectively, and further lower electrodes 440-1 to 440-748 may be arranged adjacent to lower electrodes 430-1 to 430-748. In the following, for ease of explanation, the explanation will be given taking as an example a light emitting device having lower electrodes 410-1 to 410-748 and lower electrodes 420-1 to 420-748.

[0037] When the lower electrode 410-1 and the lower electrode 420-1 are driven simultaneously, the distance between the central positions exposed by driving the two electrodes on the photosensitive drum 102 is shifted by W+d in the rotation direction of the photosensitive drum 102. The image forming apparatus of this embodiment exposes an area corresponding to one pixel in the output resolution of the image forming apparatus by driving multiple lower electrodes (for example, the lower electrode 410-1 and the lower electrode 420-1) that are adjacent in the rotation direction of the photosensitive drum 102. Therefore, by providing a time difference between the timing of applying a voltage to the lower electrode 410-1 and the timing of applying a voltage to the lower electrode 420-1 depending on the rotation speed of the photosensitive drum 102, it is possible to expose an area corresponding to one pixel multiple times (multiple exposure).

[0038] Next, light-emitting layer 450 will be described. Light-emitting layer 450 is formed by being laminated on silicon substrate 402 on which lower electrodes 410-1 to 410-748 and lower electrodes 420-1 to 420-748 have been formed. That is, light-emitting layer 450 is laminated on lower electrodes 410-1 to 410-748 and lower electrodes 420-1 to 420-748 in the portions where lower electrodes 410-1 to 410-748 and lower electrodes 420-1 to 420-748 have been formed. Light-emitting layer 450 is laminated on silicon substrate 402 in the portions where lower electrodes 410-1 to 410-748 and lower electrodes 420-1 to 420-748 have not been formed. In this example, light-emitting layer 450 in light-emitting device 202 is formed so as to straddle all of lower electrodes 410-1 to 410-748 and lower electrodes 420-1 to 420-748, but the embodiment is not limited to this. For example, the light-emitting layer 450 may be formed so as to be separately stacked on each lower electrode, similar to the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748, or the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748 may be divided into a plurality of groups, and one light-emitting layer may be stacked on each lower electrode belonging to each divided group.

[0039] For example, an organic material can be used for the light-emitting layer 450. The light-emitting layer 450, which is an organic EL film, is a laminated structure including functional layers such as an electron transport layer, a hole transport layer, an electron injection layer, a hole injection layer, an electron blocking layer, and a hole blocking layer. The light-emitting layer 450 may be made of an inorganic material other than an organic material.

[0040] An upper electrode 460 (anode) is laminated (second electrode layer) on the light-emitting layer 450. The upper electrode 460 is an electrode that can transmit (is transmissive to) light of the wavelength emitted by the light-emitting layer 450. For this reason, a material containing indium tin oxide (ITO) is used as a transparent electrode for the upper electrode 460 in this embodiment. An indium tin oxide electrode has a transmittance of 80% or more for light in the visible light range, making it suitable as an electrode for organic EL.

[0041] Upper electrode 460 is formed on the opposite side of lower electrodes 410-1 to 410-748 and lower electrodes 420-1 to 420-748, with at least light-emitting layer 450 sandwiched between them. That is, in the Z direction, light-emitting layer 450 is disposed between upper electrode 460 and lower electrodes 410-1 to 410-748, and between upper electrode 460 and lower electrodes 420-1 to 420-748, and when lower electrodes 410-1 to 410-748 and lower electrodes 420-1 to 420-748 are projected onto upper electrode 460 in the Z direction, the region in which lower electrodes 410-1 to 410-748 and lower electrodes 420-1 to 420-748 are formed falls within the region in which upper electrode 460 is formed. The transparent electrode does not have to be laminated over the entire light-emitting layer 450, but in order to efficiently emit light generated in the light-emitting layer 450 to the outside of the light-emitting device, the area occupied by the upper electrode 460 is preferably 100% or more, and more preferably 120% or more, of the area occupied by one pixel. The upper limit of the area occupied by the upper electrode 460 is arbitrarily designed depending on the areas of the silicon substrate 402 and the light-emitting layer 450. Wiring may be provided in the upper electrode 460 except for the portion that transmits light.

[0042] In this embodiment, the upper electrode 460 is an anode provided in common to each of the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748, but it may also be provided individually for each of the lower electrodes 410-1 to 410-748 and the lower electrodes 420-1 to 420-748, or one upper electrode may be provided for each of multiple lower electrodes.

[0043] The drive circuit controls the potential of each of lower electrodes 410-1 to 410-748 and lower electrodes 420-1 to 420-748 based on image data to generate a potential difference between upper electrode 460 and any lower electrode among lower electrodes 410-1 to 410-748 and lower electrodes 420-1 to 420-748.

[0044] The light-emitting device in this embodiment is a so-called top-emission type emission device. When a voltage is applied to the upper electrode 460, which serves as an anode, and the lower electrodes 410 and 420, which serve as cathodes, a potential difference is generated between the two electrodes. Electrons flow from the cathode into the light-emitting layer 450, and holes flow from the anode into the light-emitting layer 450. The electrons and holes then recombine in the light-emitting layer 450, causing the light-emitting layer 450 to emit light. When the light-emitting layer 450 emits light, light directed toward the upper electrode 460 passes through the upper electrode 460 and is emitted from the light-emitting device in the direction of arrow A shown in FIG. 7 . Light directed from the light-emitting layer 450 toward the lower electrodes 410 and 420 is reflected by the lower electrodes 410 and 420 toward the upper electrode 460, respectively. This reflected light also passes through the upper electrode 460 and is emitted from the light-emitting device. Although there is a time difference in the timing of emission from upper electrode 460 between the light emitted from light-emitting layer 450 directly toward upper electrode 460 and the light reflected by lower electrode 410 and lower electrode 420 and emitted from upper electrode 460, the emission can be considered to be almost simultaneous because the thickness of the layers of the light-emitting device is extremely small.

[0045] By using a transparent electrode such as indium tin oxide as the upper electrode 460, the aperture ratio, which indicates the light transmittance of the electrode, can be made substantially equal to the transmittance of the upper electrode 460. In other words, since there is substantially no portion other than the upper electrode 460 that attenuates or blocks light, the light emitted from the light-emitting layer 450 is attenuated as little as possible or becomes emitted light without being blocked.

[0046] Furthermore, as described above, by forming lower electrodes 410-1 to 410-748 and lower electrodes 420-1 to 420-748 using high-precision Si integrated circuit processing technology, lower electrodes 410-1 to 410-748 and lower electrodes 420-1 to 420-748 can be arranged at high density. As a result, most of the area of ​​light-emitting section 404 (here, the total area of ​​lower electrodes 410-1 to 410-748 and lower electrodes 420-1 to 420-748 and the area of ​​the regions between adjacent lower electrodes) can be allocated to lower electrodes 410-1 to 410-748 and lower electrodes 420-1 to 420-748. In other words, this results in an exposure head with high utilization efficiency of the light-emitting region per unit area.

[0047] When light-emitting layer 450 is made of a moisture-sensitive light-emitting material such as an organic EL layer or an inorganic EL layer, it is desirable to seal light-emitting portion 404 to prevent moisture from entering. For example, a sealing film is formed by forming a thin film, such as a single film or a laminated film, of silicon oxide, silicon nitride, or aluminum oxide. A method that excels in covering structures such as steps is preferred as a method for forming the sealing film, and for example, atomic layer deposition (ALD) can be used. The material, configuration, and formation method of the sealing film are merely examples, and are not limited to the above examples, and any suitable method may be selected as appropriate.

[0048] [Exposure area shape for multiple exposures] FIG. 9 shows the positional relationship of exposure areas (spots) during multiple exposure. FIG. 9 shows the exposure areas on the exposure drum 106 that are exposed by driving the lower electrode 410-n (n is a natural number satisfying the condition 1≦n≦748) and the lower electrode 420-n adjacent thereto in the Y direction. That is, FIG. 9 shows the exposure areas of the two lower electrodes, lower electrode 410-n and lower electrode 420-n, aligned in the Y direction for the nth lower electrode among the 748 lower electrodes aligned in the X direction. When voltages are applied to the lower electrodes 410-n and 420-n in the Y direction of the light-emitting substrate 402 substantially simultaneously to cause the light-emitting layer 450 to emit light, the exposure areas corresponding to the lower electrodes 410-n and 420-n are positioned at different positions in the Y direction, as shown in FIG. 9(a). The positions of the exposure areas are similar to the positional relationship between the lower electrodes 410-n and 420-n in the Y direction. That is, the center-to-center distance between the exposure areas in the Y direction is W (μm)+d (μm).

[0049] 9(b) shows the state of the exposure area when the timing of applying electric charge to the lower electrode 420-n arranged so as to expose the downstream side of the lower electrode 410-n in the rotation direction of the photosensitive drum 106 (hereinafter referred to as lighting timing) is delayed according to equation (1) in accordance with the rotation direction and rotation speed Vdr (mm / s) of the photosensitive drum 102. The timing T at which the positions of the exposure areas formed on the photosensitive drum 102 coincide is controlled based on the delay time Tdelay calculated by equation (1). Tdelay = ((W + d) ÷ 1000) ÷ Vdr Equation (1)

[0050] In this embodiment, the light emission signal is generated so that the maximum light emission time Tw of each lower electrode corresponding to each pixel is equal to the time corresponding to the interval of one line in the Y direction, and is expressed by equation (2) using the resolution (e.g., 1200 dpi) and the rotation speed Vdr. Tw=(25.4÷1200)÷Vdr Formula (2)

[0051] Multiple exposure enables exposure at approximately the same position on the photosensitive drum 102 using the lower electrode 410-n and the lower electrode 420-n, and the amount of light received by the photosensitive drum 102 can be increased in proportion to the number of lower electrodes arranged in the Y direction. Note that, in order to maintain this effect, it is preferable that the positional deviation of the exposure areas on the photosensitive drum 102 of the lower electrodes that are subjected to multiple exposure is small.

[0052] FIG. 9(c) shows an example in which the positions of the exposure areas on the photosensitive drum 102 are misaligned in multiple exposure. In this example, the two exposure areas resulting from multiple exposure do not completely overlap, but do partially overlap. Ideally, it is preferable for the two exposure areas to approximately coincide (completely overlap) as in FIG. 9(b), as this results in sharper dots. However, even if the exposure areas partially overlap as in FIG. 9(c), the required density can be obtained, although the sharpness of the dots will be degraded compared to FIG. 9(b).

[0053] Therefore, even if there are variations in control, the time Tdelay is controlled so that the light emission timing is within the allowable error ΔT of the light emission timing so that it falls within the range of equation (3) for the size Ws (μm) of the exposure area. ΔT=(Ws÷1000)÷Vdr Formula (3)

[0054] [Control Block] 10 shows a block diagram of the image controller unit 700 and the drive board 202. Hereinafter, the chip select signal is referred to as cs_x, the line synchronization signal as lsync_x, the clock signal as clk, and the image data signal as data. In this embodiment, to simplify the explanation, processing of a single color will be described, but similar processing is also performed in parallel for four colors.

[0055] (Image controller) Image controller unit 700 receives image data generated by scanner unit 100 and transmits control signals for controlling drive substrate 202. The image data input to image controller unit 700 may be data generated by scanner unit 100 as described above, or may be data transferred from a personal computer via a network device (not shown). The control signals include a chip select signal cs_x indicating the valid range of the image data, a clock signal clk, an image data signal data, a line synchronization signal lsync_x indicating the division of each line of image data, and a communication signal for communication with CPU 703. Each signal is transmitted to light-emitting device 401 in drive substrate 202 via a chip select signal line 705, a clock signal line 706, an image data signal line 707, a line synchronization signal line 708, and a communication signal line 709. Image controller unit 700 processes the image data and print timing. The image data generation unit 701 performs dithering processing on image data received from the scanner unit 100 or from outside the image forming apparatus at a resolution instructed by the CPU 703 to generate image data for print output. In this embodiment, the dithering processing is performed at a resolution of, for example, 1200 dpi.

[0056] The synchronization signal generation unit 704 generates a line synchronization signal lsync_x, which is a second signal. The CPU 703 instructs the synchronization signal generation unit 704 on the time interval of the signal period, assuming one line period for a predetermined rotation speed of the photosensitive drum 102. Here, one line period is the period during which the surface of the photosensitive drum 102 moves in the rotation direction by a pixel size of 1200 dpi (approximately 21.16 μm). For example, if printing is performed at a speed of 200 mm / s in the conveyance direction of the recording paper, the CPU 703 instructs the synchronization signal generation unit 704 on the time interval, assuming one line period of 105.8 μs (decimals to two decimal places omitted). The speed in the conveyance direction is calculated by the CPU 703 using a set value (fixed value) of the printing speed (image formation speed) set in a control unit (not shown) that controls the speed of the photosensitive drum 102. The printing speed is set, for example, depending on the type of recording paper.

[0057] The chip data conversion unit 702 divides one line of image data for each light emitting device 401 in synchronization with a line synchronization signal lsync_x generated by a synchronization signal generation unit 704. The chip data conversion unit 702 transmits the image data divided for each light emitting device 401 to the drive board 202 together with a clock signal clk and a chip select signal cs_x. The clock signal clk is a signal that serves as a reference for control.

[0058] (Drive board) Next, the configuration of the drive board 202 will be described. The head information storage unit 710 is a storage device that stores head information such as the light emission amount and mounting position information of each light emitting device 401, and is connected to the CPU 703 via a communication signal line 709. A clock signal line 706, an image data signal line 707, a line synchronization signal line 708, and a communication signal line 709 are connected to all of the light emitting devices 401. The chip select signal line 705 is connected to the input of the light emitting device 401-1. The output of the light emitting device 401-1 is connected to the input of the light emitting device 401-2 via a signal line 711-1, and the output of the light emitting device 401-2 is connected to the input of the light emitting device 401-3 via a signal line 711-2. In this way, the chip select signal line 705 (or the signal line 711) is connected in a so-called daisy chain (cascade connection) via each light emitting device 401. Each light emitting device 401 controls the voltage of its lower electrode based on the set values ​​set by the chip select signal line 705, clock signal line 706, line synchronization signal line 708, image data signal line 707, and communication signal line 709. In addition, each light emitting device 401 generates a chip select signal for the next light emitting device 401.

[0059] [Circuit configuration inside the light-emitting device] FIG. 11(a) shows a circuit block diagram within the light-emitting device 401. The circuit section 406 within the light-emitting device 401 has a digital section 800 and an analog section 806. The digital section 800 has the function of generating pulse signals for driving the lower electrodes 410-n and 420-n based on preset values ​​and various signals set by communication signals in synchronization with a clock signal clk, and transmitting the pulse signals to the analog section 806 via a pulse signal line 907. Here, the various signals refer to a chip select signal cs_x, an image data signal data, and a line synchronization signal lsync_x. The digital section 800 also has the function of generating a chip select signal for the next light-emitting device 401 from the input chip select signal cs_x.

[0060] [Digital Department] The communication IF unit 801 controls the writing and reading of setting values ​​to and from the register unit 802 based on communication signals from the CPU 703. The register unit 802 stores setting values ​​(preset setting values) required for operation. These setting values ​​include exposure timing information used in the image data storage unit 804, width and phase information of the pulse signal generated by the pulse signal generation unit 805, and setting information for the drive voltage set by the analog unit 806. Note that since the drive voltage can be derived from the resistance value between the lower electrode and the upper electrode and the range of this resistance value is known in advance, information on the drive current may be stored instead of setting information for the drive voltage. The register unit 802 stores at least one of these pieces of information. The chip select signal generation unit 803, which is a second generation unit, delays the input chip select signal cs_x, which is the first signal, and generates a chip select signal for the next light-emitting device 401 and transmits it via the signal line 711. The image data storage unit 804 holds the image data while the input chip select signal cs_x is valid, and outputs the image data in synchronization with the line synchronization signal lsync_x to the pulse signal generation unit 805. Details will be described later.

[0061] The pulse signal generating unit 805 generates a pulse signal based on the width information and phase information of the pulse signal set in the register unit 802 in accordance with the image data input from the image data storage unit 804, and outputs the pulse signal to the analog unit 806. Details will be described later. The analog unit 806 generates a signal required to drive the lower electrode based on the pulse signal generated in the digital unit 800. Details will be described later.

[0062] (Image data storage section) Next, the operation of the image data storage unit 804 will be described. The image data storage unit 804 of the first embodiment is built into the light emitting device 401. An example will be described in which the chip select signal cs_x and the line synchronization signal lsync_x are negative logic signals, but they may also be positive logic. FIG. 11(b) is a circuit configuration diagram of the image data storage unit 804. The clock gate circuit 810 outputs the logical product of the inverted signal of the chip select signal cs_x and the clock signal clk. The clock gate circuit 810 outputs the clock signal s_clk to the flip-flop circuit 811 only when the chip select signal cs_x is valid.

[0063] The flip-flop circuit 811 receives as its original input the image data signal DATA input to the image data storage unit 804. The flip-flop circuits 811 are connected in series in the same number as the number of bottom electrodes 401 arranged in the longitudinal direction of the light emitting device 401 (748 in this embodiment). The flip-flop circuits 811 operate in response to the clock signal s_clk sent from the clock gate circuit 810. The output of the flip-flop circuit 811 is output as image data dly_data_000 to dly_data_747 to the next flip-flop circuit 811 and flip-flop circuit 812 connected adjacently. The flip-flop circuits 811 and flip-flop circuits 812 are provided in the longitudinal direction of the bottom electrode row 401 in the number equal to the number of bottom electrodes 401 (748 in this embodiment).

[0064] The flip-flop circuit 812 receives the output of the flip-flop circuit 811 as input and operates in response to the line synchronization signal lsync_x. The output of the flip-flop circuit 812 is output as image data buf_data_0_000 to buf_data_0_747 to the pulse signal generating units 805 (805-1, 805-3, 805-5, etc.) and the flip-flop circuit 813. Each flip-flop circuit 812 functions as a memory circuit, and the flip-flop circuit 812 provided for one lower electrode column (lower electrodes 401-1 to 401-748) functions as a memory circuit group (or a first memory circuit group). The pulse signal generating units 805-1, 805-3, 805-5, etc. function as a first pulse signal generating unit group that generates a first pulse signal. Pulse signal generating unit 805-1 generates a pulse signal for driving lower electrode 410-1, pulse signal generating unit 805-3 generates a pulse signal for driving lower electrode 410-2, and pulse signal generating unit 805-5 generates a pulse signal for driving lower electrode 410-3.

[0065] The flip-flop circuit 813 receives the output of the flip-flop circuit 812 as input and operates in response to the multiple exposure timing signal lshift_0. The output of the flip-flop circuit 813 is output as image data buf_data_1_000 to buf_data_1_747 to the pulse signal generating units 805 (805-2, 805-4, 805-6, etc.). Each flip-flop circuit 813 functions as a memory circuit, and the flip-flop circuit 813 provided for one lower electrode row (402-1 to 402-748) functions as a memory circuit group (or a second memory circuit group). The pulse signal generating units 805-2, 805-4, 805-6, etc. function as a second pulse signal generating unit group that generates a second pulse signal. Pulse signal generating unit 805-2 generates a pulse signal for driving lower electrode 420-1, pulse signal generating unit 805-4 generates a pulse signal for driving lower electrode 420-2, and pulse signal generating unit 805-6 generates a pulse signal for driving lower electrode 420-3.

[0066] The multiplex timing signal generator 814, which is a first generator, generates a multiple exposure timing signal lshift_0, which is a timing signal, based on the line synchronization signal lsync_x, the clock signal clk, and the multiplex timing setting signal lshift_start. That is, the multiplex timing signal generator 814 generates the multiple exposure timing signal lshif_0 to generate pulse signals for the pulse signal generators 805-2, 805-4, ... at timings different from those of the pulse signal generators 805-1, 805-3, .... In this embodiment, the multiplex timing signal generator 814 delays the line synchronization signal lsync_x by a setting value set in the multiplex timing setting signal lshift_start to generate the multiple exposure timing signal lshift_0. For example, when the multiplex timing setting signal lshift_start is set to 1 (lshift_start=1), the multiple exposure timing signal lshift_0 is a signal obtained by delaying the line synchronization signal lsync_x by one cycle of the clock signal clk. The multiple timing signal generation unit 814 generates the multiple exposure timing signal lshift_0 based on the rotation speed of the photosensitive drum 102. That is, the multiple timing setting signal lshift_start is set based on the delay time Tdelay calculated by the above-mentioned equation (1).

[0067] FIG. 12 is a timing chart showing the operation of the image data storage unit 804 in the longitudinal direction of the light emitting device 401. In FIG. 12, (i) shows the waveform of the clock signal clk, (ii) shows the waveform of the line synchronization signal lsync_x, (iii) shows the waveform of the chip select signal cs_x, and (iv) shows the image data signal data indicated by 000 to 747. Here, "000" indicates image data corresponding to, for example, the lower electrode 410-1, and "747" indicates image data corresponding to the lower electrodes 410-748. The shaded portions of the image data signal data indicate invalid data. (v) indicates image data dly_data_000 and the like that is the output of the flip-flop circuit 811, and (vi) indicates image data buf_data_0_000 and the like that is the output of the flip-flop circuit 812.

[0068] During the period from time T0 to time T1 when the chip select signal cs_x is 0 (cs_x=0 (low level)), the image data is shifted through the serially connected flip-flop circuits 811 as follows: Time T1 is the time when cs_x=0 is captured by the rising edge of the clock signal clk. That is, the image data is shifted in the following order: data → dly_data_000 → dly_data_001 → ... → dly_data_747. During the period when the chip select signal cs_x is low level (cs_x=0), the clock signal clk is input in the same number as the number of bottom electrodes in the longitudinal direction of the light emitting device 401, i.e., 748. In this way, one line's worth of image data is held in dly_data_000 to dly_data_747.

[0069] After time T1, the chip select signal cs_x is 1 (cs_x=1 (high level)), so no shift operation is performed and the image data at time T1 is held. For example, the image data dly_data_000 held in the first flip-flop circuit 811 after time T1 is 747. When the line synchronization signal lsync_x becomes 0 (lsync_x=0 (low level)) at time T2, one line's worth of image data is simultaneously output to the pulse signal generation unit 805 as buf_data_0_000 to buf_data_0_747. Time T2 is the time when lsync_x=0 is captured by the rising edge of the clock signal clk. In other words, the image data dly_data_000 etc. held in the flip-flop circuit 811 is output to the pulse signal generation unit 805 via the flip-flop circuit 812 as image data buf_data_0_000 etc.

[0070] Next, Fig. 13 is a timing chart showing the Y-direction operation of the image data storage unit 804. Fig. 13 (i) shows the waveform of the line synchronization signal lsync_x, and (ii) shows the image data buf_data_0_000 etc. that are the output of the flip-flop circuit 812. (iii) shows the waveform of the multiple exposure timing signal lshift_0, and (iv) shows image data buf_data_1_000 and the like that are the output of the flip-flop circuit 813. In Figure 13, we will explain, as representative examples, the image data buf_data_0_000 that is the output of the flip-flop circuit 812 at the leftmost end of Figure 11(b) and the image data buf_data_1_000 that is the output of the flip-flop circuit 813. Note that this is the same for all of the image data buf_data_0_001 to buf_data_0_747 and buf_data_1_001 to buf_data_1_747.

[0071] As described in FIG. 12, image data dly_data_000 is input to the flip-flop circuit 812 at time T10 in FIG. 13, which is the timing when the line synchronization signal lsync_x becomes 0 at time T0 in FIG. 12. Then, the value of the image data dly_data_000 is output from the flip-flop circuit 812 as image data buf_data_0_000. At time T11, the multiple exposure timing signal lshift_0 is input as a low level (lshift_0=0) to the flip-flop circuit 813. Then, the value of the image data buf_data_0_000 output from the flip-flop circuit 812 is output from the flip-flop circuit 813 to the pulse signal generation unit 805 as image data buf_data_1_000. In this way, the data output to the pulse signal generation unit 805 as buf_data_0_000 when lsync_x=0 is output again to the pulse signal generation unit 805 as buf_data_1_000 at the next timing when lshift_0=0. Here, time T11 when the multiple exposure timing signal lshift_0 becomes low level is delayed by the multiple timing setting signal lshift_start from time T10 when the line synchronization signal lsync_x becomes low level. The image data buf_data_0_000 is output to the pulse signal generation unit 805 corresponding to the lower electrode used for the earlier exposure in the Y direction on the photosensitive drum 102. Also, the image data buf_data_1_000 is output to the pulse signal generation unit 805 corresponding to the lower electrode used for the later exposure in the Y direction on the photosensitive drum 102. In this way, multiple exposure is realized.

[0072] In this embodiment, multiple exposure is performed using two lower electrodes 410-n and 420-n arranged in the Y direction. However, the number of lower electrodes used for multiple exposure is not limited to two. To increase the number of lower electrodes used for multiple exposure (when m=3 or more columns are used for multiple exposure), the flip-flop circuits 812 and 813 (748) shown in FIG. 11(b) can be increased to m columns (m×748). This allows image data corresponding to m columns (m×748) of lower electrodes to be held. Furthermore, by increasing the number of pulse signal generators 805 connected to the m columns of flip-flop circuits to m columns (m×748), the light emission timing of each of the m columns (m×748) of lower electrodes 602 can be controlled, enabling multiple exposure for m columns.

[0073] In this embodiment, a flip-flop circuit has been described as an example of means for holding image data for each lower electrode 602. In this configuration, a simpler circuit with a smaller wiring area is configured by arranging the flip-flop circuits alongside the lower electrodes 410-1 to 410-748. On the other hand, even if a flip-flop circuit is not used, the following configuration can be adopted. That is, as long as there is a memory circuit (e.g., RAM) corresponding to the lower electrode and a control unit that controls the read timing and write timing to the memory circuit, it is not necessary to use a flip-flop circuit.

[0074] Increasing the number of lower electrodes used for multiple exposure and enabling selection of the number of lower electrode rows used for multiple exposure enables more dynamic control of the light intensity. For example, in a configuration in which the number m of lower electrode rows is 10 and the lower electrodes are arranged in the Y direction, it is possible to select from 2 to 10 lower electrode rows used for multiple exposure depending on the image formation speed of the image forming apparatus. This allows for nine levels of light output change. Therefore, the control range of the drive current for each lower electrode can be narrowed, making it possible to always drive the lower electrodes under approximately the same drive current conditions. For example, when driving the lower electrodes with a low current (i.e., low light intensity), the response of the lower electrodes may be slow, making it impossible to obtain the desired light intensity. In such cases, the multiple exposure of this embodiment enables stable drive of the lower electrodes. In this way, when selecting which of multiple rows of lower electrodes to use, a reset terminal may be added to flip-flop circuits 812, 813, etc., to selectively stop the output of image data. In addition to this method, a means for stopping the output of the pulse signal may be added to the pulse signal generating section 805.

[0075] [Analog section] FIG. 14(a) shows a block diagram of the analog unit 806. For simplicity, this embodiment will be described by illustrating only the driver units 1001-1 and 1001-3 that drive the two lower electrodes 410-1 and 410-2 in the lower electrode columns 410-1 to 410-748. However, it is assumed that similar driver units 1001-1 to 1001-748 are formed corresponding to the other lower electrodes included in the lower electrode columns 410-1 to 410-748, and further corresponding to the other lower electrode columns. The pulse signal generators 805-1 and 805-3 generate pulse signals that control the light emission (ON) timing of the lower electrodes 410-1 and 410-2. The pulse signal generators 805-1 and 805-3 input pulse signals to the driver units 1001-1 and 1001-3 via pulse signal lines 907-1 and 907-3.

[0076] A digital-to-analog converter (hereinafter referred to as DAC) 1002 supplies an analog voltage that determines the drive current to the drivers 1001-1 and 1001-3 via a signal line 1003 based on data set in the register unit 802. A driver selection unit 1007 supplies a driver select signal that selects the drivers 1001-1 and 1001-3 to the drivers 1001-1 and 1001-3 via signal lines 1004 and 1005 based on the data set in the register unit 802. The driver select signal is generated so that only the signal connected to the selected driver 1001 is at a high level. For example, when the driver 1001-1 is selected, a high-level driver select signal is supplied only to the signal line 1004, and a low-level driver select signal is supplied to signal lines 1005 and the like connected to other drivers 1001-3 and the like. In this embodiment, the driver select signal is positive logic, but it may also be negative logic.

[0077] An analog voltage input via signal line 1003 is set for driver units 1001-1 and 1001-3 at the timing selected by driver unit selection unit 1007 (the timing when the driver unit select signal goes high). CPU 703 sequentially selects driver units 1001-1 and 1001-3 via register unit 802 and sets a voltage corresponding to the selected driver units 1001-1 and 1001-3. In this way, CPU 703 sets analog voltages for all driver units 1001 using a single DAC 1002. By the above-described operation, analog voltages and pulse signals that determine the drive current are input to driver units 1001-1 and 1001-3, and the drive current and light-emitting time of each of lower electrodes 410-1 and 410-2 are independently controlled by a drive circuit, which will be described below.

[0078] (Drive unit) 14(b) shows the circuit of driver 1001-1 that drives lower electrode 410-1. Drivers 1001 for the other lower electrodes are also driven by a similar circuit. MOS field effect transistor (hereinafter referred to as MOSFET) 1102 supplies a drive current to lower electrode 410-1 according to the gate voltage value, and controls the current so that the drive current is turned off (light is turned off) when the gate voltage is at a low level.

[0079] A pulse signal line 907-1 is connected to the gate terminal of the MOSFET 1104, and when the pulse signal is at a high level, the voltage charged in the capacitor 1106 is transferred to the MOSFET 1102. A driver unit select signal (transmitted via a signal line 1004) sent from the driver unit selection unit 1007 is connected to the gate terminal of the MOSFET 1107. When the received driver unit select signal is at a high level, the MOSFET 1107 turns on and charges the analog voltage (transmitted via a signal line 1003) output from the DAC 1002 to the capacitor 1106. In this embodiment, the DAC 1002 sets an analog voltage in the capacitor 1106 before image formation, and keeps the MOSFET 1107 in an off state during the image formation period, thereby maintaining the voltage level.

[0080] Through this operation, MOSFET 1102 supplies a drive current to lower electrode 410-1 in accordance with the set analog voltage and pulse signal. If the input capacitance of lower electrode 410-1 is large and the response speed when turned off is slow, it is possible to speed up the turn-off speed by using MOSFET 1103. A signal obtained by logically inverting a pulse signal by inverter 1105 is input to the gate terminal of MOSFET 1103. When the pulse signal is at low level, the gate terminal of MOSFET 1103 becomes high level, and the charge stored in the input capacitance of lower electrode 410-1 is forcibly discharged.

[0081] In this embodiment, the light amount of the entire image is controlled by the drive current, and the light amount in each pixel section is controlled according to image data by PWM control. However, the present invention does not limit the light amount control method. Both the control of the entire image and the control within each pixel section may be performed by the drive current or by PWM control.

[0082] [Switching the drive direction of the bottom electrode (for staggered arrangement)] As described above, this embodiment illustrates a configuration in which the light-emitting devices 401 are arranged in a staggered pattern (hereinafter referred to as a staggered arrangement) on the drive substrate 202. When the light-emitting devices 401 are arranged in a staggered pattern, good imaging characteristics can be obtained by arranging the lower electrodes close to the center of the lenses in the short-side direction of the rod lens array 203. When an inexpensive rod lens array is used, there is a limit to the aperture of the rod lens. Therefore, if the lower electrodes are arranged too far from the center of the rod lens, light may not reach the aperture of the rod lens, and light may not be able to be emitted onto the photosensitive drum 102. For this reason, it is effective to arrange the lower electrode row closer to one side of the center of the light-emitting device 401 in the short-side direction, and to arrange the lower electrode row as close as possible to the center of the rod lens.

[0083] In FIG. 4, the center of the rod lens array 203 in the lateral direction is indicated by a dashed line as L_center. The rod lens array 203 and the light emitting devices 401 are mounted so that the center line (hereinafter referred to as the center line) L_center of the rod lens array 203 in the lateral direction coincides with the center of the two light emitting devices 401 arranged in a staggered pattern. The lower electrodes of each light emitting device 401 are arranged closer to the center line L_center than the center of the light emitting device 401. Here, for light emitting device 401-2n (one of the first substrates), the surface farther from light emitting device 401-2n+1 is referred to as end face 311, and the surface closer to light emitting device 401-2n+1 is referred to as end face 310. For light emitting device 401B (the other first substrate), the surface farther from light emitting device 401A is referred to as end face 311, and the surface closer to light emitting device 401B is referred to as end face 310. In each of the light emitting devices 401, the lower electrode is disposed closer to the end face 310 side.

[0084] By arranging the lower electrodes in this manner, light from each of the lower electrodes is incident on the opening of the rod lens array 203. In this embodiment, the lower electrodes in the light emitting device 401 are arranged at a position shifted to one side from the center in the short-side direction of the light emitting device 401. The mounting direction of each of the light emitting devices 401 is determined so that the end face 310 of each of the light emitting devices 401 is on the center line L_center side. That is, on the light emitting substrate 402, multiple lower electrode rows 410-1 to 410-748 are arranged on the side closer to the center (center line L_center) in the short-side direction of the rod lens array 203. When the light emitting devices 401 are arranged in a two-row staggered arrangement, the lower electrodes are arranged so that the light emitting devices 401A and 401B are rotated 180° from each other and the lower electrodes are closer to the center line L_center.

[0085] In this way, the mounting orientation of light emitting device 401 is determined so that the positions of the lower electrodes within light emitting device 401 are shifted to one side and the lower electrodes are closer to center line L_center. This makes it possible to obtain good imaging characteristics. Meanwhile, as described above, since light emitting devices 401 are arranged in different mounting orientations, it is necessary to control the lighting order of the lower electrodes in the Y direction according to the orientation of light emitting device 401. For example, in light emitting device 401A, the lower electrode on the side closer to end face 311 (upper side in the figure) lights up first, and in light emitting device 401B, the lower electrode on the side closer to end face 310 (upper side in the figure) lights up first. A control method for such a case will be described below.

[0086] (Circuit with selector) 15 is a circuit block diagram inside light emitting device 401 that switches the light emitting order of lower electrode rows 410-1 to 410-748 in the short direction of drive substrate 202. As with FIG. 11(b), a case will be described in which there are two lower electrode rows 410-1 to 410-748 and two lower electrode rows 420-1 to 420-748 in the Y direction. In addition to the circuit configuration described in FIG. 11(b), image data storage unit 804 has selectors 2200-12, 2200-34, 2200-56, .... Selector 2200-12 switches the connection combination between flip-flop circuit 812 and flip-flop circuit 813 and pulse signal generation unit 805-1 and pulse signal generation unit 805-2. The selector 2200-34 switches the connection combination between the flip-flop circuit 812 and the flip-flop circuit 813 and the pulse signal generating unit 805-3 and the pulse signal generating unit 805-4. The selector 2200-56 switches the connection combination between the flip-flop circuit 812 and the flip-flop circuit 813 and the pulse signal generating unit 805-5 and the pulse signal generating unit 805-6.

[0087] The selectors 2200-12, 2200-34, 2200-56, ... are collectively referred to as selector 2200. The selector 2200 is capable of switching the connection relationship with the pulse signal generation unit 805, which is the destination of image data from the flip-flop circuits 812 and 813. In other words, the selector 2200 functions as a selection unit that selects a combination of connections between the first memory circuit group and the second memory circuit group and the first pulse signal generation unit group and the second pulse signal generation unit group.

[0088] For example, in one light emitting device 401 in the longitudinal direction of the staggered arrangement, flip-flop circuit 812 is connected to pulse signal generating unit 805-1, and flip-flop circuit 813 is connected to pulse signal generating unit 805-2. In the other light emitting device 401 in the longitudinal direction of the staggered arrangement, flip-flop circuit 812 is connected to pulse signal generating unit 805-2, and flip-flop circuit 813 is connected to pulse signal generating unit 805-1. The connection information of selector 2200 is set in a predetermined register of register unit 802 based on a communication signal from CPU 703. It is assumed that the connection of selector 2200 is controlled based on the connection information (register value) set in register unit 802.

[0089] As described above, by providing a means for switching the lighting order of the lower electrodes, multiple exposure can be performed regardless of the arrangement direction of the light-emitting devices 401 on the drive substrate 202. In this embodiment, the usefulness of the staggered arrangement has been explained, but it is also useful when using the same exposure head in multiple different image forming apparatuses. The lighting order is selected depending on the rotation direction of the photosensitive drum 102 and the installation direction of the exposure head. This makes it possible to use the same exposure head even in image forming apparatuses in which the rotation direction of the photosensitive drum 102 is different.

[0090] As explained above, in this embodiment, by arranging the lower electrodes in the Y direction and performing multiple exposure, it is possible to increase the optical output of the exposure head, thereby enabling faster image forming devices and supporting photosensitive materials that require a larger amount of light. Furthermore, by configuring the lower electrode array and circuit unit 406 on a silicon substrate, it is possible to increase the output resolution and improve control performance by enabling the incorporation of a large-scale logic circuit for the light-emitting device.

[0091] The light-emitting substrate 402 also has a means for generating image data for multiple exposure. This makes it possible to generate the necessary image data without increasing the wiring (wire bonding) of the interface of the light-emitting device 401. By optimally arranging the memory circuit (flip-flop circuit), it is possible to optimize the wiring area. Furthermore, it is possible to control the light emission timing according to the printing speed and resolution of the image forming apparatus and the spacing between the lower electrodes of the light-emitting device 401. This makes it possible to sharpen the exposure area on the photosensitive drum 102 by multiple exposure.

[0092] As described above, according to this embodiment, it is possible to propose an exposure head that can be driven at high speed with a higher optical output.

Claims

1. An image forming apparatus, a photosensitive member that is driven to rotate around a rotation axis; an exposure head including a light-emitting device and a lens array that guides light emitted from the light-emitting device to a photosensitive member surface; The light emitting device comprises: a silicon substrate including a drive circuit for driving the light emitting device; a first electrode layer including a plurality of electrodes arranged two-dimensionally in a rotation direction of the photosensitive member and in a direction substantially parallel to the rotation axis, the plurality of electrodes being formed separately on the silicon substrate; a light-emitting layer formed in a layered form on the first electrode layer, which emits light when a voltage is applied thereto; a second electrode layer that is provided on the opposite side of the light-emitting layer from the side on which the silicon substrate and the first electrode layer are disposed, the second electrode layer being common to the plurality of electrodes of the first electrode layer and capable of transmitting light; the drive circuit controls a voltage of each electrode included in the first electrode layer based on image data so that the light-emitting layer emits light; an image forming apparatus, characterized in that the lens array is disposed between the second electrode layer and the surface of the photosensitive member so that light transmitted through the second electrode layer is guided onto the photosensitive member;

2. the plurality of electrodes include a first electrode and a second electrode disposed adjacent to and downstream of the first electrode in a rotation direction of the photoreceptor; An image forming apparatus characterized in that the drive circuit controls the timing of controlling the potentials of the first electrode and the second electrode based on image data so that an exposure area exposed by driving the first electrode on the photosensitive member is further exposed by driving the second electrode.

3. 2. The image forming apparatus according to claim 1, wherein the first electrode and the second electrode are driven based on the same pixel data and exposed multiple times to form each pixel at the output resolution of the image forming apparatus.

4. the plurality of electrodes included in the first electrode layer are provided corresponding to one pixel in an output resolution of the image forming apparatus, 4. The image forming apparatus according to claim 1, wherein the area of ​​each of the plurality of electrodes is 80% or more and 110% or less of the area occupied by the one pixel.

5. 5. The image forming apparatus according to claim 1, wherein the plurality of electrodes included in the first electrode layer are square.

6. 6. The image forming apparatus according to claim 1, wherein when the first electrode layer is projected onto the second electrode layer in the stacking direction of the silicon substrate, the first electrode layer, the light-emitting layer, and the second electrode layer, the plurality of electrodes in the first electrode layer are contained within the second electrode layer.

7. 7. The image forming apparatus according to claim 1, wherein the second electrode layer contains indium tin oxide.

8. 8. The image forming apparatus according to claim 7, wherein the plurality of electrodes included in the first electrode layer contain silver.

9. 9. The image forming apparatus according to claim 7, wherein the plurality of electrodes included in the first electrode layer contain aluminum.

10. 8. The image forming apparatus according to claim 7, wherein the plurality of electrodes included in the first electrode layer contain a silver-magnesium alloy.

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