Display device

Abstract

To provide a display device that arranges a camera for photographing a front face of a display panel at a lower part of the display panel without exposing the camera to the front face.SOLUTION: A display device includes: a display panel that includes a display area in which a video is displayed, and includes a substrate and first wiring that is located above the substrate and arranged in the display area; and a camera that is not exposed to the outside of a front face of the display panel, photographs the front of the display panel, is arranged below the display area of the display panel, and is located superimposed on a first area in the display area. The entirety or part of the first wiring is superimposed on the first area. A first portion of the first wiring superimposed on the first area includes a first semi-transmissive layer that is located above the substrate, a first light path compensation layer that is located on the first semi-transmissive layer, and a first metal layer that is located on the first light path compensation layer and includes first metal.SELECTED DRAWING: Figure 7

Description

[Technical Field]

[0001] TECHNICAL FIELD The embodiments of the present disclosure relate to a display device. [Background technology]

[0002] 2. Description of the Related Art As the information society develops, the demand for display devices for displaying images is increasing, and various types of display devices, such as liquid crystal display devices, organic light-emitting display devices, and quantum dot display devices, are being utilized.

[0003] In addition, display devices provide input methods such as touch sensors and optical devices such as cameras and proximity sensors to provide users with a variety of application functions, which makes designing the display device difficult. In particular, cameras and proximity sensors must be exposed to the outside to allow light in and out, which reduces the display area of ​​the display panel.

[0004] As a result, in the past, the front design of a display device was either designed with a large bezel to install and expose an optical device, or designed with the display panel cut out in a notch shape, or designed with the optical device exposed in a hole shape in a part of the display panel, which was a problem. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] Japanese Patent Application Publication No. 2019-109508 Summary of the Invention [Problem to be solved by the invention]

[0006] An embodiment of the present disclosure may provide a display device in which a camera for capturing images of the front side is not exposed on the front side but is arranged below the display panel.

[0007] Furthermore, the embodiments of the present disclosure may provide a display device that can capture high-quality front images even if the camera for capturing the front view is not exposed to the front but is arranged below the display panel.

[0008] In addition, when a camera for capturing images of the front side is placed below a display panel rather than exposed to the front side, the embodiments of the present disclosure can prevent the external light required for the camera to capture images from entering the inside of the display panel and repeating endlessly between the wiring inside the display panel and the camera, thereby providing a display device that can capture high-resolution images. [Means for solving the problem]

[0009] An embodiment of the present disclosure may provide a display device including a display area where an image is displayed, the display area including a substrate, a display panel located on top of the substrate and including first wiring arranged in the display area, and a camera that is not exposed to the outside of the front surface of the display panel, photographs the front surface of the display panel, is arranged below the display area of ​​the display panel, and is positioned overlapping with the first area within the display area.

[0010] In a display device according to an embodiment of the present disclosure, the first wiring may entirely or partially overlap the first region. The portion of the first wiring overlapping the first region may include a first semi-transmitting layer located on the substrate, a first optical path compensation layer located on the first semi-transmitting layer, and a first metal layer located on the first optical path compensation layer and including a first metal (S / D).

[0011] In the display device according to the embodiments of the present disclosure, the first semi-transmitting layer may have a thickness less than that of the first light path compensation layer.

[0012] In a display device according to an embodiment of the present disclosure, among the first semi-transmitting layer, the first optical path compensation layer, and the first metal layer, the first semi-transmitting layer closest to the camera may have the thinnest thickness, and the first metal layer closest to the portion where external light is incident may have the thickest thickness.

[0013] In the display device according to the embodiment of the present disclosure, the first semi-transmitting layer may have a thickness of 1 to 5 nm, and the first light path compensation layer may have a thickness of 30 to 120 nm.

[0014] In a display device according to an embodiment of the present disclosure, external light enters the opening on the side of the first wiring and is reflected from the front of the camera, and a portion of the external light reflected from the front of the camera is reflected from the back of the first semi-transmitting layer, and another portion of the external light reflected from the front of the camera passes through the first semi-transmitting layer and the first optical path compensation layer and may be reflected from the back of the first metal layer.

[0015] In a display device according to an embodiment of the present disclosure, the external light reflected from the rear surface of the first semi-transmissive layer and the external light reflected from the rear surface of the first metal layer may have a phase difference of an odd multiple of 180 degrees.

[0016] In the display device according to the embodiment of the present disclosure, the first light path compensation layer may include a conductive transparent material.

[0017] In a display device according to an embodiment of the present disclosure, a region of the display region excluding the first region is a second region, and the first wiring may include a portion overlapping the first region and a portion overlapping the second region. The portion of the first wiring overlapping the second region may include a first metal layer including a first metal without a first semi-transmitting layer and a first optical path compensation layer.

[0018] An embodiment of the present disclosure may provide a display device including a display area where an image is displayed, the display area including a substrate, a display panel located on the substrate and including electrodes arranged in the display area, and a camera that is not exposed to the outside of the front surface of the display panel, captures images of the front surface of the display panel, is located below the display area of ​​the display panel, and is positioned overlapping with a first region within the display area.

[0019] In a display device according to an embodiment of the present disclosure, the electrode overlaps a first region overlapping with the camera, and the electrode may include a semi-transparent layer located on the top of the substrate, an optical path compensation layer located on the semi-transparent layer, and a metal layer located on the optical path compensation layer.

[0020] The semi-transmissive layer may have a thickness that is less than the thickness of the light path compensation layer.

[0021] The electrode may be an electrode of a transistor in the subpixel that overlaps the first region, or a plate of a capacitor that overlaps the first region. [Effects of the Invention]

[0022] According to an embodiment of the present disclosure, a display device can be provided in which a camera for capturing images of the front side is not exposed on the front side but is arranged below the display panel.

[0023] According to an embodiment of the present disclosure, a display device capable of capturing a high-quality front image can be provided even if a camera for capturing a front image is disposed below a display panel rather than being exposed on the front.

[0024] According to an embodiment of the present disclosure, when a camera for capturing images of the front side is arranged below a display panel rather than being exposed to the front side, external light required for the camera to capture images enters the interior of the display panel, preventing a phenomenon in which light is endlessly repeated between the wiring inside the display panel and the camera, and a display device capable of capturing high-resolution images can be provided. [Brief explanation of the drawings]

[0025] [Figure 1] 1 is a diagram illustrating a display device according to an embodiment of the present disclosure. [Figure 2] 1 is a diagram showing a screen configuration of a display device according to an embodiment of the present disclosure. [Figure 3] 1 is a schematic cross-sectional view of a display device according to an embodiment of the present disclosure. [Figure 4] FIG. 1 is a diagram illustrating the configuration of a display part of a display device according to an embodiment of the present disclosure. [Figure 5] FIG. 2 is a block diagram of a touch sensing part and a fingerprint sensing part of a display device according to an embodiment of the present disclosure. [Figure 6]1 is an exemplary diagram of a touch sensor structure in a display panel of a display device according to an embodiment of the present disclosure. [Figure 7] FIG. 10 is another exemplary diagram of a touch sensor structure in a display panel of a display device according to an embodiment of the present disclosure. [Figure 8] FIG. 10 is another exemplary diagram of a touch sensor structure in a display panel of a display device according to an embodiment of the present disclosure. [Figure 9] 1 is a cross-sectional view of a display panel of a display device according to an embodiment of the present disclosure. [Figure 10] 1 is an exemplary diagram showing a touch electrode in a display panel of a display device according to an embodiment of the present disclosure. [Figure 11] 1 is a diagram showing a polarizer in a display panel of a display device according to an embodiment of the present disclosure. [Figure 12] 10 is a diagram illustrating the location of a light-generating device for a proximity sensor in a display panel of a display device according to an embodiment of the present disclosure. [Figure 13] 10 is a diagram illustrating the location of a light-generating device for a proximity sensor in a display panel of a display device according to an embodiment of the present disclosure. [Figure 14] 1 illustrates heterogeneous cathode electrode layers of a display device according to an embodiment of the present disclosure. [Figure 15] 1 is a diagram showing a wiring structure in a first area where a camera is arranged within a display area of ​​a display device according to an embodiment of the present disclosure. [Figure 16] 1 is a diagram showing a low-reflection structure in a first area where a camera is arranged within a display area of ​​a display device according to an embodiment of the present disclosure. [Figure 17] 1 is a diagram showing in more detail the low-reflection structure in a first area where a camera is arranged within the display area of ​​a display device according to an embodiment of the present disclosure. [Figure 18a] 1 is a diagram showing a low-reflection structure in a first area where a camera is arranged and a wiring structure in a second area where a camera is not arranged within a display area of ​​a display device according to an embodiment of the present disclosure. [Figure 18b]1 is a diagram showing a low-reflection structure in a first area where a camera is arranged and a wiring structure in a second area where a camera is not arranged within a display area of ​​a display device according to an embodiment of the present disclosure. [Figure 18c] 1 is a diagram showing a low-reflection structure in a first area where a camera is arranged and a wiring structure in a second area where a camera is not arranged within a display area of ​​a display device according to an embodiment of the present disclosure. [Figure 19] 10 is a graph showing the low-reflection effect when a low-reflection structure is applied to a first area where a camera is arranged within the display area of ​​a display device according to an embodiment of the present disclosure. [Figure 20] 10 is a graph showing the low-reflection effect when a low-reflection structure is applied to a first area where a camera is arranged within the display area of ​​a display device according to an embodiment of the present disclosure. [Figure 21] 1 is a diagram showing data lines and gate lines to which a low-reflection structure is applied in a first region where a camera is arranged within a display region of a display device according to an embodiment of the present disclosure. [Figure 22] 1 is a diagram showing a camera and subpixels arranged in a first region within a display region of a display device according to an embodiment of the present disclosure. [Figure 23] 1 is a cross-sectional view of a first region and a second region within a display area of ​​a display device according to an embodiment of the present disclosure. [Figure 24] 10 is another cross-sectional view of the first and second regions within the display area of ​​the display device according to the embodiment of the present disclosure. [Figure 25] 10 is a diagram illustrating a case where a camera of a display device according to an embodiment of the present disclosure is positioned at the center of a display area. DETAILED DESCRIPTION OF THE INVENTION

[0026] The advantages and features of the present disclosure, and methods for achieving them, will become clearer with reference to the following detailed description of the embodiments in conjunction with the accompanying drawings. However, the present disclosure is not limited to the embodiments disclosed below, and may be implemented in various different forms. These embodiments are provided solely to ensure that the disclosure of the present disclosure is complete and to fully convey the scope of the invention to those skilled in the art. The invention of the present disclosure is defined only by the scope of the claims.

[0027] The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for illustrating the embodiments of the present disclosure are merely examples and are not intended to limit the scope of the present disclosure. The same reference numerals refer to the same components throughout the specification. Furthermore, in describing the present disclosure, if it is determined that a detailed description of related known technology may unnecessarily obscure the gist of the present disclosure, the detailed description will be omitted.

[0028] When the terms "including," "having," "performed," etc. are used in this disclosure, other parts may be added unless "only" is used. When an element is expressed as singular, the plural is included unless otherwise expressly stated.

[0029] When interpreting elements, it is understood that a margin of error is included even if there is no other explicit statement.

[0030] When describing a positional relationship, for example, when the positional relationship of two parts is described using "above," "at the top," "below," or "beside," since "immediately" or "directly" is not used, one or more other parts may be located between the two parts.

[0031] When describing temporal relationships, for example, when the temporal precedence relationship is described using "after," "following," "next," or "before," since "immediately" or "directly" is not used, it may also include cases where things are not consecutive.

[0032] Although terms such as "first," "second," and the like are used to describe various components, these components are not limited by these terms. These terms are used merely to distinguish one component from another. Therefore, the first component described below may be the second component within the technical concept of the present disclosure.

[0033] The term "at least one" should be understood to include all possible combinations of one or more related items. For example, "at least one of the first, second, and third items" may mean not only the first, second, and third items, respectively, but also all possible combinations of two or more of the first, second, and third items.

[0034] The features of the various examples of the present disclosure may be partially or fully combined or combined with each other, may be technically interlocked and driven in various ways, and each example may be implemented independently of the other or may be implemented together in a linked relationship.

[0035] Hereinafter, examples of display devices according to embodiments of the present disclosure will be described in detail with reference to the accompanying drawings. When assigning reference numerals to components in each drawing, identical components may be assigned the same reference numerals as much as possible even if they are displayed in different drawings. Furthermore, the scales of the components illustrated in the accompanying drawings may be different from the actual scales for convenience of explanation, and therefore are not limited to the scales illustrated in the drawings.

[0036] 1 is a plan view of a display device 10 according to an embodiment of the present disclosure, viewed from the front. The display device 10 according to the embodiment of the present disclosure can provide functions of displaying images, sensing touches by fingers or pens, and sensing fingerprints.

[0037] 1, a display device 10 according to an embodiment of the present disclosure may include a display panel 100 that displays images and a case 200 that protects the display panel 100. In FIG. 1, a portion of the case 200 is visible when viewed from the front by a user, but in some cases, when implemented as a full display type, the case 200 may be completely invisible or barely visible when viewed from the front by a user, and only the display panel 100 may be visible. Only the display area of ​​the display panel 100 may be visible, or a non-display area (also called a bezel) around the periphery of the display area may also be visible.

[0038] 1, a display device 10 according to an embodiment of the present disclosure can sense touches by fingers, pens, etc., and can also sense fingerprints across the entire display area of ​​a display panel 100. That is, the display device 10 according to an embodiment of the present disclosure can provide front touch sensing and front fingerprint sensing.

[0039] The display device 10 according to the embodiment of the present disclosure may include, as an optical device, a camera 110 for taking pictures, a proximity sensor 120 for detecting the approach of a human body or an object in the vicinity, etc. The camera 110 of the present disclosure is a front camera for taking pictures of the front.

[0040] When the display device 10 according to the embodiment of the present disclosure is viewed from the front, one or more optical devices, among the camera 110 and the proximity sensor 120, are not visible from the outside. For this reason, the display device 10 according to the embodiment of the present disclosure has a structure in which one or more optical devices, among the camera 110 and the proximity sensor 120, are located below the display panel 100.

[0041] In the present disclosure, the camera 110 that is not exposed to the outside and is located below the display panel 100 is also referred to as an UDC (Under Display Camera). A display device 10 including such a camera 110 is referred to as a built-in camera display.

[0042] The display device 10 according to the embodiment of the present disclosure provides a structure that enables the camera 110 to perform a normal photographing function or the proximity sensor 120 to perform a proximity sensing function, regardless of the position of the optical device. This structure will be described in detail below.

[0043] FIG. 2 is a diagram showing a screen configuration of a display device 10 according to an embodiment of the present disclosure.

[0044] Referring to FIG. 2, the display panel 100 may include a display area AA where an image is displayed and a non-display area NA that is an outer area of ​​the display area AA where no image is displayed.

[0045] 2, the display area AA may include a first area A1 and a second area A2. The first area A1 in the display area AA may include a camera area (camera lens area) where a lens for capturing images of the camera 110 is located. The first area A1 in the display area AA may also include a proximity sensing area that can sense the approach of an object or a human body. In the present disclosure, the camera 110 overlapping the first area A1 in the display area AA may refer to the camera lens.

[0046] For example, when a user takes a picture of themselves while holding the display device 10, they take the picture while looking at the first area A1. If the user blocks the first area A1 with their face or fingers, the display device 10 may detect the proximity of the user's face or fingers via the proximity sensor 120 and perform a pre-specified action (e.g., turning off the screen).

[0047] The first area A1 in the display area AA may be a path (light entrance section) through which light enters the optical device from the outside. Here, the light may be electromagnetic waves such as visible light, infrared light, or ultraviolet light.

[0048] 2, one or more optical devices of the camera 110 and the proximity sensor 120 may be located below the first area A1, i.e., one or more optical devices of the camera 110 and the proximity sensor 120 may overlap with the first area A1.

[0049] 3 is a schematic cross-sectional view of a display device 10 according to an embodiment of the present disclosure. Referring to FIG. 3, the display device 10 according to the embodiment of the present disclosure is located below the display panel 100. Even if the optical devices (e.g., the camera 110, the proximity sensor 120, etc.) are positioned so as to overlap with the display area AA of the display panel 100, the display device 10 has a structure that allows the original functions of the optical devices (e.g., the photographing function, the light receiving function of the proximity sensor 120, etc.) to be performed normally and the display function to be performed normally.

[0050] 3, the display device 10 according to the embodiment of the present disclosure has a unique structure in an external light entrance section IA through which light (external light) enters for the function of the optical device. The external light entrance section IA is located within the display area AA.

[0051] Referring to FIG. 3, a display device 10 according to an embodiment of the present disclosure may include a transparent substrate 320, a subpixel forming unit 330 in which a subpixel-specific pattern for forming a plurality of subpixels SP is formed, a heterogeneous cathode electrode layer 340 located on the subpixel forming unit 330 and to which a cathode voltage corresponding to a common voltage is applied, a sealing layer 350 located on the heterogeneous cathode electrode layer 340 and having a slope on its outer periphery, and a touch sensor layer 360 located on the sealing layer 350 and including a touch electrode.

[0052] The subpixel forming portion 330 may include: a transistor array 331 located on the display area AA on top of the transparent substrate 320, including one or more transistors arranged in each of the multiple subpixels; an anode electrode layer 332 located on the transistor array 331, including an anode electrode arranged in each of the multiple subpixels and electrically connected to the source node or drain node of the transistor; and a light emitting layer 333 located on the anode electrode layer 332, including an anode electrode in each of the multiple subpixels.

[0053] The heterogeneous cathode electrode layer 340 is disposed on the light emitting layer 333. Accordingly, the anode electrode layer 332, the light emitting layer 333, and the heterogeneous cathode electrode layer 340 form a plurality of light emitting elements (e.g., OLEDs (Organic Light Emitting Diodes)) for each subpixel.

[0054] The touch sensor layer 360 may include a number of touch electrodes and may further include a number of touch lines electrically connected to all or part of the number of touch electrodes.

[0055] For example, multiple touch electrodes may be arranged on one layer, or may be arranged on two or more layers separated by insulating layers. Multiple touch lines may be located on a different layer from multiple touch electrodes, or may be located on the same layer as some of the multiple touch electrodes.

[0056] A number of touch electrodes are arranged in the display area AA, and a number of touch lines may electrically connect the corresponding touch electrodes located in the display area AA to pad units located in the non-display area NA. Therefore, the number of touch lines passes through the non-display area NA. The number of touch lines may descend along the slopes of the encapsulation layer 350 and be electrically connected to the pad units.

[0057] Referring to FIG. 3, the display device 10 according to an embodiment of the present disclosure may further include a polarizer 370 disposed on the touch sensor layer 360, an optically transparent adhesive 380 disposed on the polarizer 370, and a cover glass 390 located on the optically transparent adhesive 380.

[0058] Referring to FIG. 3, the display panel 100 may include a transparent substrate 320, a subpixel forming portion 330, a heterogeneous cathode electrode layer 340, a sealing layer 350, a touch sensor layer 360, a polarizer 370, an optical transparent adhesive 380, and a cover glass 390.

[0059] 3, the display device 10 according to the embodiment of the present disclosure may further include a fingerprint sensor panel 300 located below the display panel 100. That is, the fingerprint sensor panel 300 may be located below the transparent substrate 320.

[0060] 3, if an air gap exists between the display panel 100 and the fingerprint sensor panel 300, the fingerprint sensing performance of the fingerprint sensor panel 300 may be reduced or fingerprint sensing itself may become impossible. Therefore, to prevent an air gap from existing between the display panel 100 and the fingerprint sensor panel 300, the display panel 100 and the fingerprint sensor panel 300 may be bonded with a bonding material (e.g., resin, OCA (Optic Clear Adhesive), PSA (Pressure Sensitive Adhesive), etc.).

[0061] 3, the display device 10 according to the embodiment of the present disclosure may further include a backplate 310 located between the display panel 100 and the fingerprint sensor panel 300. The display panel 100 may be bonded to an upper surface of the backplate 310, and the fingerprint sensor panel 300 may be bonded to a lower surface of the backplate 310. Here, the backplate 310 is not an essential component.

[0062] 3, the display device 10 according to the embodiment of the present disclosure may further include a cushion plate 306 located below the fingerprint sensor panel 300 to protect the lower portion of the fingerprint sensor panel 300. The cushion plate 306 may include a foam pad 302 and a metal plate 304 made of copper (Cu) or the like.

[0063] 3, the display device 10 according to the embodiment of the present disclosure may further include an optical device located in the display area AA below the transparent substrate 320. The optical device may include, for example, one or more of a camera 110 and a proximity sensor 120. In the following description, both the camera 110 and the proximity sensor 120 are described as optical devices located in the display area AA below the transparent substrate 320.

[0064] 3, the camera 110 and the proximity sensor 120 may be located in a first area A1 within the display area AA, i.e., the camera 110 and the proximity sensor 120 may overlap with the first area A1 within the display area AA.

[0065] 3, the external light entrance area IA is a light path through which visible light for imaging by the camera 110 enters and exits, or through which light (e.g., infrared light) for reception by the proximity sensor 120 enters and exits. When viewed from above, the external light entrance area IA corresponds to the first area A1 in FIG. 2.

[0066] The first area A1 is a camera area (camera lens area) where a lens for capturing images of the camera 110 is located, and can also be a proximity sensing area that can sense the approach of an object or a human body. Therefore, the first area A1 is an external light entrance area IA, and therefore allows light to pass through easily.

[0067] Therefore, each of the layers 390, 380, 370, 360, 350, 340, 330, and 310 located on the light incident path may have a high transmittance in the portion corresponding to the first region A1 that is equal to or higher than a critical transmittance that is preset to a level that enables the camera 110 and the proximity sensor 120 to function, as will be described in more detail below.

[0068] 2, the first region A1 may be located within the display area AA, but may be located on the periphery of the display area AA. Alternatively, the first region A1 may be located in the center of the display area AA. The first region A1 may have a predetermined shape (e.g., a polygon such as a rectangle or hexagon, a circle, an ellipse, etc.) when viewed from above.

[0069] 4 is a configuration diagram of a display part of a display device 10 according to an embodiment of the present disclosure. Referring to FIG. 4, in the display device 10 according to the embodiment of the present disclosure, the display part may include a display panel 100 on which a number of data lines DL and a number of gate lines GL are arranged and a number of sub-pixels SP are arranged, a data driving circuit 420 that drives the number of data lines DL, a gate driving circuit 430 that drives the number of gate lines GL, and a display controller 440 that controls the data driving circuit 420 and the gate driving circuit 430.

[0070] The data driving circuit 420 can supply a video data voltage Vdata to a plurality of data lines DL under the timing control of the display controller 440. The gate driving circuit 430 can sequentially supply a scan signal SCAN to a plurality of gate lines GL under the timing control of the display controller 440.

[0071] A large number of data lines DL arranged in the display area AA of the display panel 100 are electrically connected to a display pad unit 421 located in the non-display area NA of the display panel 100. A data driving circuit 420 is electrically connected to the display pad unit 421.

[0072] The data driving circuit 420 may be implemented as a COF (Chip On Film) type and mounted on a circuit film bonded to the display pad unit 421 of the display panel 100. Alternatively, the data driving circuit 420 may be implemented as a COG (Chip On Glass) type or a COP (Chip On Panel) type and mounted directly on the display pad unit 421 of the display panel 100.

[0073] The gate driving circuit 430 may be implemented as a COF (Chip On Film) type and mounted on a circuit film electrically connected to the display panel 100. Alternatively, the gate driving circuit 430 may be implemented as a COG (Chip On Glass) type or a COP (Chip On Panel) type and mounted on the non-display area NA of the display panel 100. In this case, the gate driving circuit 430 is referred to as a COG (Chip On Glass) type or a COP (Chip On Panel) type. Alternatively, the gate driving circuit 430 may be implemented as a GIP (Gate In Panel) type and formed in the non-display area NA of the display panel 100.

[0074] The display device 10 according to an embodiment of the present disclosure may be a liquid crystal display (LCD) including a backlight unit, or may be a self-emissive display such as an OLED (organic light emitting diode) display, a quantum dot display, or a micro LED (micro light emitting diode) display.

[0075] When the display device 10 according to the embodiment of the present disclosure is an OLED display, each subpixel SP may include a light-emitting element that is an organic light-emitting diode (OLED) that emits light by itself. When the display device 10 according to the embodiment is a quantum dot display, each subpixel SP may include a light-emitting element made of quantum dots, which are semiconductor crystals that emit light by themselves. When the display device 10 according to the embodiment is a micro LED display, each subpixel SP may include a light-emitting element that is an inorganic-based micro LED (micro light-emitting diode) that emits light by itself.

[0076] In the display device 10 according to an embodiment of the present disclosure, each subpixel SP may include a light-emitting element ED, a drive transistor DRT that controls a current flowing through the light-emitting element ED, a scan transistor SCT that transmits an image data voltage Vdata to the drive transistor DRT, and a storage capacitor Cst for maintaining the voltage for a certain period of time.

[0077] The light-emitting element ED includes an anode electrode AE, a cathode electrode CE, and an emitting layer EL located between the anode electrode AE ​​and the cathode electrode CE. The light-emitting element ED may be, for example, an organic light-emitting diode (OLED), a light-emitting diode (LED), or a quantum dot light-emitting element.

[0078] The cathode electrode CE of the light emitting element ED may be a common electrode. In this case, a ground voltage EVSS may be applied to the cathode electrode CE of the light emitting element ED. Here, the ground voltage EVSS may be, for example, a ground voltage or a voltage similar to the ground voltage.

[0079] The driving transistor DRT is a transistor for driving the light emitting element ED and includes a first node (N1), a second node (N2), and a third node (N3).

[0080] The first node N1 of the drive transistor DRT corresponds to the gate node and may be electrically connected to the source or drain node of the scan transistor SCT. The second node N2 of the drive transistor DRT may be electrically connected to the anode electrode AE ​​of the light emitting element ED and may be the source or drain node. The third node N3 of the drive transistor DRT corresponds to the node to which the drive voltage EVDD is applied and may be electrically connected to a driving voltage line DVL that supplies the drive voltage EVDD and may be the drain or source node.

[0081] The scan transistor SCT can control the connection between the first node N1 of the drive transistor DRT and the corresponding data line DL in response to a scan signal SCAN supplied from the gate line GL.

[0082] The drain or source node of the scan transistor SCT may be electrically connected to the corresponding data line DL, the source or drain node of the scan transistor SCT may be electrically connected to the first node N1 of the drive transistor DRT, and the gate node of the scan transistor SCT is electrically connected to the gate line GL and receives a scan signal SCAN.

[0083] The scan transistor SCT is turned on by a scan signal SCAN of a turn-on level voltage, and can transfer the image data voltage Vdata supplied from the corresponding data line DL to the first node N1 of the drive transistor DRT.

[0084] The scan transistor SCT is turned on by a scan signal SCAN of a turn-on level voltage and turned off by a scan signal SCAN of a turn-off level voltage. Here, if the scan transistor SCT is an n-type, the turn-on level voltage may be a high level voltage and the turn-off level voltage may be a low level voltage. If the scan transistor SCT is a p-type, the turn-on level voltage may be a low level voltage and the turn-off level voltage may be a high level voltage.

[0085] The storage capacitor Cst is electrically connected between the first node N1 and the second node N2 of the driving transistor DRT and can maintain an image data voltage Vdata corresponding to the image signal voltage or a voltage corresponding thereto for one frame time.

[0086] The storage capacitor Cst may be an external capacitor intentionally designed outside the drive transistor DRT, rather than a parasitic capacitor (e.g., Cgs, Cgd) which is an internal capacitor present between the first node (N1) and the second node (N2) of the drive transistor DRT.

[0087] Each of the drive transistor DRT and the scan transistor SCT can be an n-type transistor or a p-type transistor. Both of the drive transistor DRT and the scan transistor SCT can be n-type transistors or p-type transistors. At least one of the drive transistor DRT and the scan transistor SCT can be an n-type transistor (or a p-type transistor), and the rest can be p-type transistors (or n-type transistors).

[0088] 4 are merely examples for the purpose of explanation and may further include one or more transistors, or in some cases, one or more capacitors. Alternatively, each of the multiple subpixels may have the same structure, with some of the multiple subpixels having different structures.

[0089] 5 is a configuration diagram of a touch sensing part and a fingerprint sensing part of the display device 10 according to the embodiment of the present disclosure. Referring to FIG. 5, in the display device 10 according to the embodiment of the present disclosure, a sensing part such as a processor 530 that acquires the presence or absence of a touch or a touch position using touch data may include the display panel 100 having a built-in touch sensor as a part that senses the touch position or the presence or absence of a touch when a user touches the display panel 100 with a touch pointer such as a finger or a pen, and a touch driving circuit 510 that drives the touch sensor to perform sensing and outputs touch sensing data.

[0090] The touch sensor built into the display panel 100 includes a number of touch electrodes TE arranged in a touch sensing area TSA of the display panel 100. Here, the touch sensing area TSA may correspond to the display area AA.

[0091] A touch pad unit 511 electrically connected to a touch driving circuit 510 may be present in the non-display area NA of the display panel 100. The display panel 100 may be electrically connected to a plurality of touch electrodes TE via a plurality of touch lines TL that electrically connect the plurality of touch electrodes TE and the touch pad unit 511.

[0092] The touch pad unit 511 may be located on the transparent substrate 320 in a non-display area NA, which is an outer area of ​​the display area AA. The touch lines TL may be electrically connected to all or part of the touch electrodes TE, extend along the slope of the encapsulation layer 350, and be electrically connected to the touch pad unit 511.

[0093] The touch driving circuit 510 can drive all or part of the multiple touch electrodes TE, sense all or part of the multiple touch electrodes TE, and generate and supply touch sensing data to the processor 530.

[0094] The processor 530 may determine the presence or absence of a touch or the touch position based on the touch sensing data, and may perform a predetermined function (e.g., input processing, object selection processing, handwriting processing, etc.) based on the determined presence or absence of a touch or the determined touch position. The touch driving circuit 510 may be integrated with the data driving circuit 420 and embodied in the form of an integrated circuit.

[0095] Referring to FIG. 5, the fingerprint sensing part of the display device 10 according to an embodiment of the present disclosure may include, as a part for sensing a user's fingerprint, a fingerprint sensor panel 300 on which a number of fingerprint sensing pixels FP-PXL are arranged, a fingerprint driving circuit 520 that drives the fingerprint sensor panel 300 for sensing and outputs fingerprint sensing data, and a processor 530 that recognizes the fingerprint using the fingerprint sensing data and performs a function (e.g., user authentication, etc.) determined based on the result of the fingerprint recognition.

[0096] The fingerprint sensing part of the display device 10 according to the embodiment of the present disclosure can sense fingerprints by an optical method, an ultrasonic method, etc. In the following, the fingerprint sensing part of the display device 10 will be exemplified as performing ultrasonic fingerprint sensing.

[0097] The fingerprint sensor panel 300 includes a number of fingerprint sensing pixels FP-PXL arranged in a fingerprint sensing area FSA, where the fingerprint sensing area FSA may correspond to the display area AA.

[0098] Each of the fingerprint sensing pixels FP-PXL may include a piezoelectric element including a driving electrode, a piezoelectric material layer, and a common electrode, a driving unit (transmitter) that drives the piezoelectric element to generate ultrasonic waves from the piezoelectric element, and a sensing unit (receiver) that receives ultrasonic waves reflected from a fingerprint and senses the generated signal. Here, each of the driving unit (transmitter) and the sensing unit (receiver) may include one or more switching elements (transistors).

[0099] A signal with a fluctuating voltage level (AC signal) is applied to one of the drive electrode and the common electrode, and a signal with a constant voltage level (DC signal) is applied to the other.

[0100] A fingerprint pad unit 521 to which a fingerprint driving circuit 520 is electrically connected may be present on the periphery of the fingerprint sensing area FSA of the fingerprint sensor panel 300.

[0101] The fingerprint sensor panel 300 may include a number of lead-out lines RL that electrically connect the sensing portions (receiving portions) of the multiple fingerprint sensing pixels FP-PXL to the fingerprint pad portion 521.

[0102] The fingerprint driving circuit 520 can drive all or part of the multiple fingerprint sensing pixels FP-PXL, sense all or part of the multiple fingerprint sensing pixels FP-PXL, generate fingerprint sensing data, and supply it to the processor TL.

[0103] The processor 530 may recognize a fingerprint based on the fingerprint sensing data and perform a function (e.g., user authentication, etc.) determined by the result of the fingerprint recognition.

[0104] Meanwhile, referring to FIG. 5, the fingerprint sensor panel 300 may have a hole or notch groove 500 in a portion corresponding to the first area A1.

[0105] The touch sensor structure of the display panel 100 will be described below with reference to Figures 6 to 10. The display device 10 according to the embodiment of the present disclosure can sense touches using a capacitance method.

[0106] 6 is an exemplary diagram of a touch sensor structure in a display panel 100 of a display device 10 according to an embodiment of the present disclosure. Referring to FIG. 6, each of the touch electrodes TE arranged in a touch sensing area TSA of the display panel 100 may be separated from each other and blocked. Each of the touch electrodes TE does not overlap each other.

[0107] Each of the multiple touch electrodes TE may be electrically connected to the touch drive circuit 510 via one or more touch lines TL. The touch lines TL may be arranged in parallel to and in the same direction as the data lines DL.

[0108] The plurality of touch electrodes TE may include first touch electrodes and second touch electrodes arranged in the same column. It is assumed that the first touch electrodes are located farther from the touch driving circuit 510 than the second touch electrodes. The plurality of touch lines TL may include first touch lines connected to the first touch electrodes and second touch lines connected to the second touch electrodes.

[0109] The first touch line connected to the first touch electrode overlaps the second touch electrode but is not electrically connected to the second touch electrode. The first touch electrode and the second touch electrode are separated and physically separated within the display panel 100. The first touch line and the second touch line are separated and physically separated within the display panel 100. The first touch electrode and the second touch electrode are separated within the display panel 100, but can be electrically connected by a switching circuit in the touch driving circuit 510 depending on the driving situation.

[0110] The touch sensor structure of FIG. 6 may be adapted to a self-capacitance-based touch sensing method that senses a touch using the capacitance between the touch electrode TE and a touch pointer (eg, a finger, a pen, etc.).

[0111] As a result, the touch drive circuit 510 can supply a touch drive signal to each of the multiple touch electrodes TE, detect a touch sensing signal from the touch electrode TE to which the touch drive signal is applied, obtain a sensing value for each touch electrode TE, and generate touch sensing data.

[0112] FIG. 7 is another exemplary diagram of a touch sensor structure in the display panel 100 of the display device 10 according to an embodiment of the present disclosure.

[0113] The touch sensor structure of FIG. 7 may be adapted to a mutual-capacitance-based touch sensing method that senses a touch using the capacitance between two touch electrodes TE.

[0114] 7, for the mutual capacitance-based touch sensing method, a plurality of touch electrodes TE arranged in a touch sensing area TSA of the display panel 100 may include a plurality of first touch electrodes X-TE and a plurality of second touch electrodes Y-TE arranged in different directions, where a mutual capacitance is formed between the first touch electrodes X-TE and the second touch electrodes Y-TE.

[0115] The plurality of first touch electrodes X-TE and the plurality of second touch electrodes Y-TE may intersect with each other, and a point (area) where the first touch electrodes X-TE and the second touch electrodes Y-TE intersect with each other is called a touch node.

[0116] Of the plurality of first touch electrodes X-TE and the plurality of second touch electrodes Y-TE, the plurality of first touch electrodes X-TE may be driving electrodes (or transmitting electrodes) to which touch driving signals are supplied from the touch driving circuit 510, and the plurality of second touch electrodes Y-TE may be sensing electrodes (or receiving electrodes) sensed by the touch driving circuit 510.

[0117] Conversely, among the plurality of first touch electrodes X-TE and the plurality of second touch electrodes Y-TE, the plurality of first touch electrodes X-TE may be sensing electrodes (or receiving electrodes) sensed by the touch driving circuit 510, and the plurality of second touch electrodes Y-TE may be driving electrodes (or transmitting electrodes) to which a touch driving signal is supplied from the touch driving circuit 510.

[0118] Figure 8 is another exemplary diagram of a touch sensor structure in the display panel 100 of the display device 10 according to an embodiment of the present disclosure. Figure 8 is another exemplary touch sensor structure for the mutual capacitance-based touch sensing of Figure 7. The touch sensor structure of Figure 8 is electrically equivalent to the touch sensor structure of Figure 7.

[0119] Referring to FIG. 8, a plurality of touch electrodes TE arranged in the touch sensing area TSA of the display panel 100 may include first touch electrodes X-TE arranged in the same row and electrically connected by a first bridge pattern X-CL, and second touch electrodes Y-TE arranged in the same column and electrically connected by a second bridge pattern Y-CL.

[0120] The first touch electrodes X-TE arranged in the same row and located in the same layer and the first bridge patterns X-CL connecting them may all be integrated and located in the same layer.

[0121] The second touch electrodes Y-TE arranged in the same column and located in the same layer and the second bridge patterns Y-CL connecting them are located in different layers and can be electrically connected to each other through contact holes.

[0122] The first touch electrodes X-TE arranged in the same row and electrically connected form one first touch electrode line X-TEL. One first touch electrode line X-TEL formed in this way is electrically identical to one first touch electrode X-TE in FIG. 7. The second touch electrodes Y-TE arranged in the same column and electrically connected form one second touch electrode line Y-TEL. One second touch electrode line Y-TEL formed in this way is electrically identical to one second touch electrode Y-TE in FIG. 7.

[0123] Each of the multiple first touch electrode lines X-TEL may be electrically connected to one or more first touch lines X-TL, and each of the multiple second touch electrode lines Y-TEL may be electrically connected to one or more second touch lines Y-TL.

[0124] Each of the plurality of first touch electrode lines X-TEL may be electrically connected to a first touch pad X-TP included in the touchpad unit 511 via one or more first touch lines X-TL, and each of the plurality of second touch electrode lines Y-TEL may be electrically connected to a second touch pad Y-TP included in the touchpad unit 511 via one or more second touch lines Y-TL.

[0125] FIG. 9 is a cross-sectional view of the display panel 100 of the display device 10 according to an embodiment of the present disclosure, taken along line XX' of FIG.

[0126] The drive transistor DRT in each subpixel SP in the display area AA is disposed on a transparent substrate 320 .

[0127] The driving transistor DRT includes a first node electrode NE1 corresponding to a gate electrode, a second node electrode NE2 corresponding to a source electrode or a drain electrode, a third node electrode NE3 corresponding to a drain electrode or a source electrode, and a semiconductor layer SEMI.

[0128] The first node electrode NE1 and the semiconductor layer SEMI may overlap with a gate insulating film GI therebetween. The second node electrode NE2 may be formed on the insulating layer INS and contact one side of the semiconductor layer SEMI, and the third node electrode NE3 may be formed on the insulating layer INS and contact the other side of the semiconductor layer SEMI.

[0129] The light emitting element ED may include an anode electrode AE ​​corresponding to a pixel electrode, an emission layer EL formed on the anode electrode AE, and a cathode electrode CE formed on the emission layer EL and corresponding to a common electrode.

[0130] The anode electrode AE ​​is electrically connected to the second node electrode NE2 of the driving transistor DRT exposed through a pixel contact hole that penetrates the planarization film PLN.

[0131] The light-emitting layer EL is formed on the anode electrode AE ​​in the light-emitting region defined (exposed) by the bank BANK. The light-emitting layer EL is formed by stacking a hole-related layer, a light-emitting layer, and an electron-related layer on the anode electrode AE ​​in this order or in the reverse order. The cathode electrode CE is formed to face the anode electrode AE ​​with the light-emitting layer EL interposed therebetween.

[0132] The sealing layer 350 prevents external moisture and oxygen from penetrating into the light emitting element ED, which is vulnerable to external moisture and oxygen. The sealing layer 350 may consist of one layer, or may consist of multiple layers PAS1, PCL, and PAS2, as shown in FIG.

[0133] For example, when the encapsulating layer 350 is composed of multiple layers PAS1, PCL, and PAS2, the encapsulating layer 350 may include one or more inorganic encapsulating layers PAS1 and PAS2 and one or more organic encapsulating layers PCL. As a specific example, the encapsulating layer 350 may have a structure in which a first inorganic encapsulating layer PAS1, an organic encapsulating layer PCL, and a second inorganic encapsulating layer PAS2 are stacked in order.

[0134] Here, the organic sealing layer PCL may further comprise at least one organic sealing layer or at least one inorganic sealing layer.

[0135] The first inorganic encapsulation layer PAS1 is formed on the transparent substrate 320 on which the cathode electrode CE is formed, so as to be closest to the light emitting element ED. The first inorganic encapsulation layer PAS1 is formed of an inorganic insulating material that can be deposited at low temperatures, such as silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), or aluminum oxide (Al2O3). Because the first inorganic encapsulation layer PAS1 is deposited in a low-temperature atmosphere, the first inorganic encapsulation layer PAS1 can prevent damage to the light emitting layer EL, which contains organic materials that are vulnerable to high-temperature atmospheres during the deposition process.

[0136] The organic encapsulation layer PCL may be formed to have a smaller area than the first inorganic encapsulation layer PAS1. In this case, the organic encapsulation layer PCL may be formed to expose both ends of the first inorganic encapsulation layer PAS1. The organic encapsulation layer PCL acts as a buffer to relieve stress between layers caused by bending of the touch display device, which is an organic light emitting display device, and may also serve to enhance planarization performance. For example, the organic encapsulation layer PCL may be formed using an organic insulating material such as acrylic resin, epoxy resin, polyimide, polyethylene, or silicon oxycarbonate (SiOC). For example, the organic encapsulation layer PCL may be formed using an inkjet method.

[0137] The display panel 100 may have one or more dams DAM1 and DAM2 formed therein to prevent the encapsulation layer 350 from collapsing. The one or more dams DAM1 and DAM2 may be located at or near the boundary between the display area AA and the non-display area NA. For example, the one or more dams DAM1 and DAM2 may be regions where the slope of the encapsulation layer 350 suddenly becomes gentler or higher after descending along the slope 900 of the encapsulation layer 350.

[0138] 9, one or more dams DAM1 and DAM2 may be disposed between the touchpad portion 511 including the touchpad Y-TP and the display area AA. The one or more dams DAM1 and DAM2 may be formed of a dam-forming pattern DFP containing the same material as the bank BANK.

[0139] One or more dams DAM1, DAM2 may be located only in the non-display area NA, and may be mostly present in the non-display area NA, but may partially extend into the display area AA.

[0140] Of the one or more dams DAM1 and DAM2, the dam DAM1 closer to the display area AA is referred to as the primary dam DAM1, and the dam DAM2 located relatively closer to the touchpad unit 511 is referred to as the secondary dam DAM2.

[0141] When the liquid organic encapsulation layer PCL is dropped onto the display area AA, the one or more dams DAM1 and DAM2 can prevent the liquid organic encapsulation layer PCL from collapsing toward the non-display area NA and violating the touchpad unit 511. This effect can be enhanced when two or more dams DAM1 and DAM2 are formed, as shown in FIG.

[0142] The primary dam DAM1 and / or the secondary dam DAM2 can be formed in a single layer or multi-layer structure.

[0143] The primary dam DAM1 and / or the secondary dam DAM2 can be basically made of a dam-forming pattern DFP. The dam-forming pattern DFP can have a height greater than that of the touch pad Y-TP disposed in the touch pad portion 511.

[0144] The dam-forming pattern DFP may be formed of the same material as the bank BANK for separating the subpixels SP in the display area AA. In some cases, the dam-forming pattern DFP may be formed of the same material as the spacer for maintaining the spacing between layers. In such a case, the dam-forming pattern DFP may be formed simultaneously with the bank BANK or the spacer, thereby forming the dam structure without an additional mask process and increasing costs.

[0145] Referring to FIG. 9, the first dam DAM1 and / or the second dam DAM2 may have a multi-layer structure in which the first inorganic sealing layer PAS1 and / or the second inorganic sealing layer PAS2 are stacked on the dam-forming pattern DFP.

[0146] The organic sealing layer PCL containing an organic substance may be located only on the inner surface of the innermost primary dam DAM1. Alternatively, the organic sealing layer PCL containing an organic substance may be located on at least the upper part of the primary dam DAM1 out of the primary dam DAM1 and the secondary dam DAM2.

[0147] The second inorganic encapsulation layer PAS2 may be formed on the transparent substrate 320 on which the organic encapsulation layer PCL is formed, covering the top and side surfaces of the organic encapsulation layer PCL and the first inorganic encapsulation layer PAS1. The second inorganic encapsulation layer PAS2 minimizes or blocks external moisture and oxygen from penetrating into the first inorganic encapsulation layer PAS1 and the organic encapsulation layer PCL. The second inorganic encapsulation layer PAS2 may be formed of an inorganic insulating material such as silicon nitride (SiNx), silicon oxide (SiOx), silicon oxynitride (SiON), or aluminum oxide (Al2O3), for example.

[0148] A touch buffer film T-BUF may be disposed on the encapsulation layer 350. The first and second touch electrodes X-TE, Y-TE and the first and second bridge patterns X-CL, Y-CL may be located on the touch buffer film T-BUF.

[0149] The first and second touch lines X-TL and Y-TL may be entirely or partially located on the touch buffer film T-BUF.

[0150] The touch buffer film T-BUF is located between the touch electrodes X-TE, Y-TE and the cathode electrode CE, and can be designed to maintain a predetermined minimum distance (e.g., 5 μm) between the touch electrodes X-TE, Y-TE and the cathode electrode CE of the light emitting element ED. This reduces or prevents parasitic capacitance between the touch electrodes X-TE, Y-TE and the cathode electrode CE, thereby preventing a decrease in touch sensitivity due to the parasitic capacitance.

[0151] The first and second touch electrodes X-TE, Y-TE and the first and second bridge patterns X-CL, Y-CL may be disposed directly on the encapsulation layer 350 without the touch buffer film T-BUF.

[0152] The touch buffer film T-BUF can block chemicals (developing solution, etching solution, etc.) used in the manufacturing process of the touch sensor metal placed on the touch buffer film T-BUF or external moisture from penetrating into the light-emitting layer EL, which contains organic matter. As a result, the touch buffer film T-BUF can prevent damage to the light-emitting layer EL, which is vulnerable to chemicals or moisture.

[0153] The touch buffer film T-BUF can be formed at a low temperature (e.g., 100°C or less) to prevent damage to the light-emitting layer EL, which includes organic materials vulnerable to high temperatures, and is formed of an organic insulating material with a low dielectric constant of 1 to 3. For example, the touch buffer film T-BUF can be formed of an acrylic, epoxy, or siloxane-based material. The touch buffer film T-BUF, which is an organic insulating material with planarization properties, can prevent damage to the encapsulation layers PAS1, PCL, and PAS2 in the encapsulation layer 350 and tearing of the touch sensor metal formed on the touch buffer film T-BUF due to bending of the OLED display device.

[0154] According to the mutual capacitance-based touch sensor structure, a first touch electrode line X-TEL and a second touch electrode line Y-TEL are arranged on a touch buffer film T-BUF, and the first touch electrode line X-TEL and the second touch electrode line Y-TEL may be arranged to cross each other.

[0155] The second touch electrode line Y-TEL may include a plurality of second touch electrodes Y-TE and a plurality of second bridge patterns Y-CL that electrically connect the plurality of second touch electrodes Y-TE. As shown in FIG. 8, the plurality of second touch electrodes Y-TE and the plurality of second bridge patterns Y-CL may be located on different layers with the touch insulating film ILD interposed therebetween.

[0156] 8 and 9, the second touch electrodes Y-TE arranged in the same column may be spaced apart at regular intervals along the y-axis direction (column direction), and each of the second touch electrodes Y-TE may be electrically connected to another second touch electrode Y-TE adjacent to the second touch electrode Y-TE in the y-axis direction via a second bridge pattern Y-CL.

[0157] The second bridge pattern Y-CL is formed on the touch buffer film T-BUF, exposed through a touch contact hole penetrating the touch insulating film ILD, and electrically connected to two second touch electrodes Y-TE adjacent to each other in the y-axis direction.

[0158] The second bridge pattern Y-CL may be disposed so as to overlap with the bank BANK, thereby preventing the aperture ratio from being reduced by the second bridge pattern Y-CL.

[0159] 8 and 9 , the first touch electrode line X-TEL may include a plurality of first touch electrodes X-TE and a plurality of first bridge patterns X-CL that electrically connect the plurality of first touch electrodes X-TE. The plurality of first touch electrodes X-TE and the plurality of first bridge patterns X-CL may be located on different layers with the touch insulating film ILD therebetween, or the plurality of first bridge patterns X-CL and the plurality of first touch electrodes X-TE may be located integrally on the same layer.

[0160] 8 and 9 , the first touch electrodes X-TE arranged in the same row may be spaced apart at regular intervals along the x-axis direction (row direction) on the touch insulating film ILD, and each of the first touch electrodes X-TE may be electrically connected to another first touch electrode X-TE adjacent to it in the x-axis direction via a first bridge pattern X-CL.

[0161] The first bridge pattern X-CL may be disposed on the same plane as the first touch electrodes X-TE and may be electrically connected to two first touch electrodes X-TE adjacent to each other in the x-axis direction without a separate contact hole, or may be integrated with two first touch electrodes X-TE adjacent to each other in the x-axis direction.

[0162] The first bridge pattern X-CL may be disposed so as to overlap with the bank BANK, thereby preventing the first bridge pattern X-CL from reducing the aperture ratio.

[0163] 9, the second touch electrode line Y-TEL may be electrically connected to a second touch pad Y-TP located in the touch pad unit 511 in the first non-display area NA1 via a second touch line Y-TL. The second touch pad Y-TP may be electrically connected to the touch driving circuit 510.

[0164] Similar to this structure, the first touch electrode line X-TEL may be electrically connected to the first touch pad X-TP present in the touch pad unit 511 in the first non-display area NA1 via the first touch line X-TL. The first touch pad X-TP may be electrically connected to the touch driving circuit 510.

[0165] Pad cover electrodes may further be arranged to cover the first touch pad X-TP and the second touch pad Y-TP.

[0166] The first touch pad X-TP may be formed separately from the first touch line X-TL and may be formed by extending the first touch line X-TL. The second touch pad Y-TP may be formed separately from the second touch line Y-TL and may be formed by extending the second touch line Y-TL.

[0167] When the first touch pad X-TP is formed by extending the first touch line X-TL and the second touch pad Y-TP is formed by extending the second touch line Y-TL, the first touch pad X-TP, the first touch line X-TL, the second touch pad Y-TP, and the second touch line Y-TL may be formed of the same first conductive material. Here, the first conductive material may be formed as a single layer or a multi-layer structure using a metal having high corrosion resistance, high acid resistance, and high conductivity, such as Al, Ti, Cu, or Mo, for example.

[0168] For example, the first touch pad X-TP, the first touch line X-TL, the second touch pad Y-TP, and the second touch line Y-TL made of the first conductive material may be formed as a three-layer structure stacked, such as Ti / Al / Ti or Mo / Al / Mo.

[0169] The pad cover electrodes that can cover the first touch pad X-TP and the second touch pad Y-TP may be formed of the same material as the first and second touch electrodes X-TE and Y-TE as a second conductive material. Here, the second conductive material may be formed as a transparent conductive material such as ITO or IZO, which has strong corrosion resistance and acid resistance. These pad cover electrodes are formed to be exposed by the touch buffer film T-BUF, so that they can be bonded to the touch driving circuit 510 or to a circuit film on which the touch driving circuit 510 is mounted.

[0170] Here, the touch buffer film T-BUF is formed to cover the touch sensor metal and prevents the touch sensor metal from being corroded by external moisture, etc. For example, the touch buffer film T-BUF may be formed of an organic insulating material, a circular polarizer, or a film made of epoxy or acrylic material. These touch buffer films T-BUF may not be present on the encapsulation layer 350. That is, the touch buffer film T-BUF may not be an essential component.

[0171] The second touch line Y-TL may be electrically connected to the second touch electrode Y-TE through a contact hole or may be integrated with the second touch electrode Y-TE.

[0172] These second touch lines Y-TL may extend to the non-display area NA, descend along the slope 900 of the encapsulation layer 350, and pass through one or more dams DAM1 and DAM2 to be electrically connected to the second touch pad Y-TP present in the touch pad unit 511 in the non-display area NA1. As a result, the second touch lines Y-TL may be electrically connected to the touch driving circuit 510 via the second touch pad Y-TP.

[0173] The second touch line Y-TL may transmit a touch sensing signal at the second touch electrode Y-TE to the touch driving circuit 510, or may receive a touch driving signal from the touch driving circuit 510 and transmit the touch driving signal to the second touch electrode Y-TE.

[0174] The first touch line X-TL may be electrically connected to the first touch electrode X-TE through a contact hole or may be integrated with the first touch electrode X-TE.

[0175] These first touch lines X-TL may extend to the non-display area NA, descend along the slope 900 of the encapsulation layer 350, and electrically connect to the first touch pads X-TP present in the touch pad unit 511 in the first non-display area NA1 through one or more dams DAM. As a result, the first touch lines X-TL may be electrically connected to the touch driving circuit 510 via the first touch pads X-TP.

[0176] The first touch line X-TL may receive a touch driving signal from the touch driving circuit 510 and transmit the touch driving signal to the first touch electrode X-TE, and may transmit a touch sensing signal at the first touch electrode X-TE to the touch driving circuit 510.

[0177] The arrangement of the first touch line X-TL and the second touch line Y-TL can be changed in various ways depending on the design details of the panel.

[0178] Touch protective films PAC may be disposed on the first touch electrodes X-TE and the second touch electrodes Y-TE. These touch protective films PAC may extend to the front or rear of one or more dams DAM and may also be disposed on the first touch lines X-TL and the second touch lines Y-TL.

[0179] 9 is a conceptual diagram of the structure, and the position, thickness, or width of each pattern (various layers and various electrodes) may vary depending on the viewing direction or position, the connection structure of each pattern may also be changed, additional layers may exist in addition to the multiple layers shown, and some of the multiple layers shown may be omitted or integrated. For example, the width of the bank BANK may be narrower than in the drawing, and the height of the dams DAM1 and DAM2 may be shorter or taller than in the drawing.

[0180] FIG. 10 is an exemplary diagram showing a touch electrode TE in a display panel 100 of a display device 10 according to an embodiment of the present disclosure.

[0181] 10, among the touch electrodes TE arranged inside the display panel 100, each of the touch electrodes TE located in the first area A1 may be or include a mesh-type electrode having one or more openings. Alternatively, among the touch electrodes TE, each of the touch electrodes TE located in the first area A1 may be or include a transparent electrode.

[0182] As described above, the touch electrode TE located in the first area A1 is formed as a mesh type or transparent electrode, thereby increasing the transmittance of the first area A1 and enabling the camera 110 to perform the photographing function through the first area A1 and the proximity sensor 120 to perform the sensing function through the first area A1.

[0183] One touch electrode TE may be a transparent electrode without openings (open areas). Alternatively, one touch electrode TE may be a mesh type having a large number of open areas OA. That is, one touch electrode TE may be an electrode metal EM patterned in a mesh type so as to have a large number of open areas OA. Here, the electrode metal EM is one of the touch sensor metals.

[0184] Each of the open areas OA in one touch electrode TE may correspond to the light-emitting areas of one or more subpixels SP. That is, the open areas OA serve as paths through which light emitted from the subpixels SP disposed below passes upward. The open areas OA in each touch electrode TE disposed in the first area A1 may improve the transmittance in the first area A1.

[0185] Instead of a large number of open areas OA in the touch electrode TE, the actual electrode portion (ie, electrode metal EM) may be located on the bank BANK.

[0186] To form a large number of touch electrodes TE, a metal electrode EM is formed in a mesh type over a wide area where the large number of touch electrodes TE will be formed, and then the metal electrode EM is cut in a predetermined pattern along the boundary lines between the touch electrodes TE to form electrically isolated metal electrodes EM. The electrically isolated metal electrode EM becomes the large number of touch electrodes TE.

[0187] The outer shape of the touch electrode TE may be, for example, a quadrilateral such as a diamond or rhombus, or may be any of various shapes such as a triangle, a pentagon, or a hexagon.

[0188] Referring to FIG. 10, one or more dummy metals DM, which are cut off from the mesh-type electrode metal EM, may be present in the area occupied by the mesh-type touch electrode TE.

[0189] The electrode metal EM is a portion that substantially corresponds to the touch electrode TE and is a portion to which a touch driving signal is applied or a touch sensing signal is sensed, while the dummy metal DM is a portion that exists within the region of the touch electrode TE but is not a portion to which a touch driving signal is applied or a touch sensing signal is not sensed, i.e., the dummy metal DM may be an electrically floating metal.

[0190] Therefore, the electrode metal EM can be electrically connected to the touch drive circuit 510, but the dummy metal DM is not electrically connected to the touch drive circuit 510.

[0191] In each region of all the touch electrodes TE, one or more dummy metals DM may exist in a state separated from the electrode metal EM. In contrast to this, one or more dummy metals DM may exist in a state separated from the electrode metal EM only in the regions of some of the touch electrodes TE among all the touch electrodes TE. In other words, there may be no dummy metals DM in the regions of some of the touch electrodes TE.

[0192] Meanwhile, in relation to the role of the dummy metal DM, if there is not one or more dummy metals DM within the area of ​​the touch electrode TE and only the electrode metal EM exists as a mesh type, a visibility issue may occur in which the outline of the electrode metal EM is visible on the screen.

[0193] In contrast to this, when one or more dummy metals DM exist within the region of the touch electrode TE, it is possible to prevent the visibility issue in which the outline of the electrode metal EM is visible on the screen.

[0194] In addition, by adjusting the presence or absence or number (ratio of dummy metal) of dummy metal DM for each touch electrode TE, the effective electrode area that affects the magnitude of mutual capacitance for each touch electrode TE can be adjusted, thereby adjusting the magnitude of mutual capacitance between the first touch electrode X-TE and the second touch electrode Y-TE, and improving touch sensitivity.

[0195] Meanwhile, by cutting a portion of the electrode metal EM formed within the region of one touch electrode TE, the cut electrode metal EM may be formed as a dummy metal DM. That is, the electrode metal EM and the dummy metal DM may be the same material formed in the same layer.

[0196] FIG. 11 is a diagram showing a polarizer 370 in a display panel 100 of a display device 10 according to an embodiment of the present disclosure.

[0197] Referring to FIG. 11, the polarizer 370 in the display panel 100 of the display device 10 according to the embodiment of the present disclosure may include a first portion POL1 corresponding to the first region A1 and a second portion POL2 corresponding to the second region A2.

[0198] The first portion POL1 of the polarizing plate 370 may have a higher transmittance than the second portion POL2. The first portion POL1 of the polarizing plate 370 may have a high transmittance equal to or higher than a critical transmittance that is preset to a level that enables the camera 110 and the proximity sensor 120 to function.

[0199] As described above, the first portion POL1 located in the first region A1 of the polarizing plate 370 is formed with high transmittance, thereby increasing the transmittance of the first region A1 and enabling the camera 110 to perform the photographing function through the first region A1 and the proximity sensor 120 to perform the sensing function through the first region A1.

[0200] The optically transparent adhesive 380 and cover glass 390 located on top of the polarizer 370 each have a transparency equal to or greater than a critical transparency preset to a level that enables the camera 110 and proximity sensor 120 to function, respectively.

[0201] 12 and 13 are diagrams illustrating the location of a light-generating device 1200 for a proximity sensor 120 in a display panel 100 of a display device 10 according to an embodiment of the present disclosure.

[0202] 12 and 13, the display device 10 according to an embodiment of the present disclosure includes a proximity sensor 120 that detects whether a human body or object is nearby. The proximity sensor 120 receives light (e.g., infrared rays) that enters the external light entrance section IA and can detect whether a human body or object is nearby.

[0203] To this end, the display device 10 according to the embodiment of the present disclosure may further include a light-generating device 1200 that generates light (e.g., infrared light). The proximity sensor 120 can detect nearby human bodies or objects using the light emitted from the light-generating device 1200.

[0204] When the light-generating device 1200 generates light, the light is reflected by a nearby human body or object, and the reflected light enters the external light entrance part IA corresponding to the first area A1.

[0205] The proximity sensor 120 is located at the bottom of the display panel 100 in a first area A1 within the display area AA, and can receive light that has entered the external light receiving unit IA corresponding to the first area A1. The proximity sensor 120 can detect whether a human body or an object is approaching based on the received light. The proximity sensor 120 is considered to include a light-generating device 1200.

[0206] 12 and 13 , the light-generating device 1200 may be located on the encapsulation layer 350 and on a side of the touch sensor layer 360. For example, the light-generating device 1200 may be located on the upper left side, upper right side, lower left side, or lower right side of the touch sensor layer 360, or may be located at one corner of the display panel 100.

[0207] 13, the viewing area VA is the area from where the display area AA ends to where the slope of the encapsulation layer 360 begins. The light-generating device 1200 is located on the encapsulation layer 350, but may be located in the viewing area VA between the slope 900 of the encapsulation layer 350 and the display area AA.

[0208] Looking at the mounting structure of the light-generating device 1200, a pad 1311 is disposed on the flattened portion of the encapsulation layer 350 in the viewing area VA. A bumper 1313 is bonded onto the pad 1311 by a bonding agent 1312. The light-generating device 1200 is mounted on the bumper 1313.

[0209] The light-generating device 1200 is lower than the polarizer 370 formed on the touch sensor layer 360. Here, the touch sensor layer 360 may include the second touch electrode Y-TE and the second bridge pattern Y-CL, which are located on different layers, an interlayer insulating film ILD located between the second touch electrode Y-TE and the second bridge pattern Y-CL, and a touch protective film PAC located on a layer on which touch sensor metals such as the first bridge pattern X-CL, the second touch electrode Y-TE, and the second bridge pattern Y-CL are formed.

[0210] Since the light-generating device 1200 is lower than the polarizing plate 370 formed on the touch sensor layer 360 , the upper space 1314 of the light-generating device 1200 corresponds to a hole in the polarizing plate 370 .

[0211] FIG. 14 is a diagram illustrating a heterogeneous cathode electrode layer 340 of a display device 10 according to an embodiment of the present disclosure.

[0212] Referring to FIG. 14, the heterogeneous cathode electrode layer 340 includes a first cathode electrode CE1 and a second cathode electrode CE2.

[0213] The first cathode electrode CE1 overlaps the optical device and is positioned in a first area A1 that is part of the display area AA, and may have a first transmittance that is equal to or greater than a critical transmittance that is preset to a level that enables the camera 110 and the proximity sensor 120 to function, respectively.

[0214] The second cathode electrode CE2 is disposed in a second area A2 different from the first area A1 in the display area AA, and can have a second transmittance (second transparency) different from the first transmittance (first transparency) of the first cathode electrode CE1.

[0215] The first cathode electrode CE1 may be a transparent electrode having a first transparency higher than the second transparency, and may include, for example, one or more of indium zinc oxide (IZO), indium tin oxide (ITO), zinc oxide (ZnO), Ba / Ag, Ca / Ag, graphene, silver nanowires, and carbon nanotubes.

[0216] The second cathode electrode CE2 may be a semi-transparent electrode having a second transparency lower than the first transparency. For example, the second cathode electrode CE2 may include one or more of Mg and Ag.

[0217] FIG. 15 is a diagram showing a wiring structure in a first area A1 in which a camera 110 is arranged within a display area AA of a display device 10 according to an embodiment of the present disclosure.

[0218] Referring to FIG. 15, external light should be incident on the camera 110 disposed in the first area A1 within the display area AA of the display panel 100 for capturing an image.

[0219] The first area A1 in which the camera 110 is disposed is included in the display area AA in which an image is displayed, and therefore wiring SL for the display may be disposed in the first area A1. The wiring SL in the present disclosure may include a metal pattern such as an electrode.

[0220] In this way, since the first area A1 in which the camera 110 is located is included within the display area AA in which the image is displayed, external light enters through the side opening LOA between the metal wiring SL and reaches the front of the camera 110.

[0221] External light reaching the front surface of the camera 110 may be reflected from the front surface of the camera 110. The external light reflected from the front surface of the camera 110 may be reflected again from the rear surface of the wiring SL, the external light reflected from the rear surface of the wiring SL may be reflected again from the front surface of the camera 110, and the external light reflected again from the front surface of the camera 110 may be reflected again from the rear surface of the wiring SL. This reflection process may be continuously repeated.

[0222] The repeated infinite reflection process between the camera 110 and the wiring SL causes light scattering and interference, making it impossible to capture a normal image through the camera or to obtain a high-resolution image.

[0223] FIG. 16 is a diagram illustrating a low-reflection structure in a first area A1 where a camera 110 is arranged in a display area AA of a display device 10 according to an embodiment of the present disclosure.

[0224] Referring to FIG. 16, the display device 10 according to the embodiment of the present disclosure may provide a low-reflection structure to prevent a repetitive reflection process between the camera 110 and the wiring SL.

[0225] 16, external light incident through a side opening LOA between the wiring SL having a low reflection structure may be reflected from the front surface of the camera 110. The external light reflected from the front surface of the camera 110 may not be reflected from the back surface of the wiring SL having a low reflection structure, or the reflectivity may be significantly reduced. Therefore, repeated reflection processes between the camera 110 and the wiring SL may be prevented.

[0226] Therefore, by using the low-reflection structure according to the embodiment of the present disclosure, high-resolution images can be obtained even using the camera 110 that is not exposed to the outside and is positioned below the display area AA of the display panel 100.

[0227] The low-reflection structure will be described in more detail below. Although the low-reflection structure will be described below from the perspective of wiring, it can be similarly applied to metal patterns such as electrodes.

[0228] Figure 17 is a diagram showing in more detail the low-reflection structure in a first area A1 where a camera 110 is arranged within a display area AA of a display device 10 according to an embodiment of the present disclosure, and Figures 18a to 18c are diagrams showing the low-reflection structure in the first area A1 where a camera 110 is arranged and the wiring structure in a second area A2 where a camera 110 is not arranged within a display area AA of a display device 10 according to an embodiment of the present disclosure. Figure 18b is an X-X' cross-sectional view of Figure 18a, and Figure 18c is a Y-Y' cross-sectional view of Figure 18a.

[0229] 17 and 18a to 18c, a display device 10 according to an embodiment of the present disclosure may include a display panel 100 including a display area AA where an image is displayed, and a camera 110 that is not exposed to the outside and is disposed below the display area AA of the display panel 100. The camera 110 referred to in the present disclosure may be a camera lens.

[0230] The display panel 100 may include a substrate 320, a first wiring SL1 located on the substrate 320 and arranged in the display area AA.

[0231] The camera 110 is not exposed to the outside, but is disposed below the display area AA of the display panel 100, and may be positioned so as to overlap the first area A1 within the display area AA.

[0232] 17, 18a, and 18b, the first wiring SL1 may entirely or partially overlap the first region A1. Therefore, the first wiring SL1 may entirely or partially overlap the camera 110.

[0233] The display area AA in which an image is displayed on the display panel 100 may include a first area A1 in which an optical device such as the camera 110 is disposed, and a second area A2 that is not the first area A1.

[0234] 17, 18a, and 18b, the first wiring SL1 may include a first part SL1_PART1 overlapping the first region A1 and a second part SL1_PART2 overlapping a second region A2 different from the first region A1.

[0235] Referring to Figures 17, 18a and 18b, the first part SL1_PART1 of the first wiring SL1 overlapping the first region A1 may include a first semi-transparent layer L1a located on the top of the substrate 320, a first optical path compensation layer L1b located on the first semi-transparent layer L1a, and a first metal layer L1c located on the first optical path compensation layer L1b and including a first metal.

[0236] The first semi-transmitting layer L1a may have a thickness thinner than the first light path compensation layer L1b. For example, the first semi-transmitting layer L1a may have a thickness of 1 to 5 nm, and the first light path compensation layer L1b may have a thickness of 30 to 120 nm.

[0237] Looking at the relationship in thickness among the three layers L1a, L1b, and L1c that make up the first wiring SL1, for example, of the first semi-transmitting layer L1a, the first optical path compensation layer L1b, and the first metal layer L1c, the first semi-transmitting layer L1a that is closest to the camera 110 can be made the thinnest. Of the first semi-transmitting layer L1a, the first optical path compensation layer L1b, and the first metal layer L1c, the first metal layer L1c that is closest to the portion where external light enters can be made the thickest.

[0238] The first optical path compensation layer L1b may include a conductive transparent material, such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium zinc tin oxide (IZTO), SiO2, or SiNx.

[0239] 17, external light may enter the opening LOA on the side surface of the first wiring SL1 and be reflected from the front surface (top surface) of the camera 110.

[0240] Referring to FIG. 17, a portion RL1a of the external light reflected from the front surface of the camera 110 may be reflected from the back surface of the first semi-transparent layer L1a, and another portion RL1b of the external light reflected from the front surface of the camera 110 may be transmitted through the first semi-transparent layer L1a and the first optical path compensation layer L1b and reflected from the back surface of the first metal layer L1c.

[0241] Referring to FIG. 17, the external light RL1a reflected from the rear surface of the first semi-transmissive layer L1a and the external light RL1b reflected from the rear surface of the first metal layer L1c may have a phase difference of an odd multiple of 180 degrees.

[0242] Referring to FIG. 17, the difference in the optical path length between the external light RL1a reflected from the back surface of the first semi-transparent layer L1a and the external light RL1b reflected from the back surface of the first metal layer L1c can be an odd multiple of half the wavelength.

[0243] Therefore, external light RL1a reflected from the back surface of the first semi-transmissive layer L1a and external light RL1b reflected from the back surface of the first metal layer L1c cause destructive interference with each other.

[0244] Therefore, a repeated reflection process between the first wiring SL1 and the camera 110 is prevented, and thus scattering of light between the first wiring SL1 and the camera 110 can also be prevented.

[0245] On the other hand, if the vertical relationship between the first semi-transmitting layer L1a and the first optical path compensation layer L1b is changed, or if the thickness relationship between the first semi-transmitting layer L1a and the first optical path compensation layer L1b is changed from that described above, a low-reflection structure cannot be created, and light scattering between the first wiring SL1 and the camera 110 cannot be prevented.

[0246] 17, 18a, and 18b, the second part SL1_PART2 of the first wiring SL1 overlapping with the second region A2 may include a first metal layer L1c including a first metal without the first semi-transmitting layer L1a and the first optical path compensation layer L1b. That is, the part SL1_PART2 of the first wiring SL1 overlapping with the second region A2 where the camera 110 is not disposed is made of a single layer.

[0247] Referring to FIG. 17, the display panel 100 of the display device 10 may further include second wiring SL2 disposed on the substrate 320, in the display area AA, and partially overlapping the first area A1.

[0248] 17, 18a, and 18c, the second wiring SL2 may include a first portion SL2_PART1 overlapping the first region A1 and a second portion SL2_PART2 overlapping the second region A2.

[0249] Referring to Figures 17, 18a and 18c, the first part SL2_PART1 of the second wiring SL2 overlapping the first region A1 may include a second semi-transparent layer L2a located on the top of the substrate 320, a second optical path compensation layer L2b located on the second semi-transparent layer L2a, and a second metal layer L2c located on the second optical path compensation layer L2b and including a second metal (Gate) different from the first metal.

[0250] The first semi-transparent layer L1a of the first wiring SL1 and the second semi-transparent layer L2a of the second wiring SL2 may include the same material and may have corresponding thicknesses.

[0251] The first optical path compensation layer L1b of the first wiring SL1 and the second optical path compensation layer L2b of the second wiring SL2 may include the same material and may have corresponding thicknesses.

[0252] 17, 18a, and 18c, the second part SL2_PART2 of the second wiring SL2 overlapping with the second region A2 may include a second metal layer L2c including a second metal without the second semi-transmitting layer L2a and the second optical path compensation layer L2b. That is, the part SL2_PART2 of the second wiring SL2 overlapping with the second region A2 where the camera 110 is not disposed is made of a single layer.

[0253] For example, the first metal included in the first metal layer L1c of the first wiring SL1 may include a source-drain metal, and the second metal included in the second metal layer L2c of the second wiring SL2 may include a gate metal. Conversely, the first metal included in the first metal layer L1c of the first wiring SL1 may include a gate metal, and the second metal included in the second metal layer L2c of the second wiring SL2 may include a source-drain metal.

[0254] For example, the source-drain metal may be a metal included in the source electrode and drain electrode of a transistor (e.g., DRT, SCT, etc.) or a metal included in wiring such as a data line DL. The gate metal may be a metal included in the gate electrode of a transistor (e.g., DRT, SCT, etc.) or a metal included in wiring such as a gate line GL.

[0255] 17, external light enters the opening LOA between the first wiring SL1 and the second wiring SL2 from above the substrate 320 and travels toward the front surface of the camera 110. All or part of the external light may be reflected from the front surface of the camera 110.

[0256] In the region where the first wiring SL1 including three layers L1a, L1b, and L1c is formed, a portion RL1a of the external light reflected from the front surface of the camera 110 is reflected from the back surface of the first semi-transparent layer L1a, and another portion RL1b of the external light reflected from the front surface of the camera 110 passes through the first semi-transparent layer L1a and the first optical path compensation layer L1b and may be reflected from the back surface of the first metal layer L1c.

[0257] In the region where the first wiring SL1 is formed, external light RL1a reflected from the back surface of the first semi-transparent layer L1a and external light RL1b reflected from the back surface of the first metal layer L1c may have a phase difference of an odd multiple of 180 degrees.

[0258] In the region where the first wiring SL1 is formed, the difference in the length of the optical path between the external light RL1a reflected from the back surface of the first semi-transparent layer L1a and the external light RL1b reflected from the back surface of the first metal layer L1c can be an odd multiple of half the wavelength.

[0259] In the region where the first wiring SL1 is formed, external light RL1a reflected from the back surface of the first semi-transmissive layer L1a and external light RL1b reflected from the back surface of the first metal layer L1c cause destructive interference with each other.

[0260] Therefore, in the area where the first wiring SL1 is formed, repeated reflection processes between the first wiring SL1 and the camera 110 are prevented, thereby preventing light scattering between the first wiring SL1 and the camera 110.

[0261] In addition, in the region where the second wiring SL2 including the three layers L2a, L2b, and L2c is formed, a portion RL2a of the external light reflected from the front surface of the camera 110 is reflected from the back surface of the second semi-transparent layer L2a, and another portion RL2b of the external light reflected from the front surface of the camera 110 passes through the second semi-transparent layer L2a and the second optical path compensation layer L2b and may be reflected from the back surface of the second metal layer L2c.

[0262] In the region where the second wiring SL2 is formed, external light RL2a reflected from the back surface of the second semi-transparent layer L2a and external light RL2b reflected from the back surface of the second metal layer L2c may have a phase difference of an odd multiple of 180 degrees.

[0263] In the region where the second wiring SL2 is formed, the difference in the optical path length between the external light RL2a reflected from the back surface of the second semi-transparent layer L2a and the external light RL2b reflected from the back surface of the second metal layer L2c can be an odd multiple of half the wavelength.

[0264] In the region where the second wiring SL2 is formed, external light RL2a reflected from the back surface of the second semi-transmitting layer L2a and external light RL2b reflected from the back surface of the second metal layer L2c cause destructive interference with each other.

[0265] Therefore, in the area where the second wiring SL2 is formed, repeated reflection processes between the second wiring SL2 and the camera 110 are prevented, thereby preventing light scattering between the second wiring SL2 and the camera 110.

[0266] 19 and 20 are graphs showing the low-reflection effect when a low-reflection structure is applied to the first area A1 where the camera 110 is located within the display area AA of the display device 10 according to an embodiment of the present disclosure.

[0267] FIG. 19 is a graph showing the results of measuring the reflectance of the first wiring SL1 to which the low-reflection structure is applied and the first wiring SL1 to which the low-reflection structure is not applied.

[0268] The first wiring SL1 to which the low-reflection structure is applied may have a multi-layer film structure. The first wiring SL1 to which the low-reflection structure is applied may include a thin-film first semi-transmitting layer L1a, a first optical path compensation layer L1b that creates a difference in the length of the optical path, and a first metal layer L1c that serves as the main wiring. The first wiring SL1 to which the low-reflection structure is not applied may have a single-film structure. The first wiring SL1 to which the low-reflection structure is not applied may include only the first metal layer L1c that serves as the main wiring.

[0269] FIG. 20 is a graph showing the results of measuring the reflectance of the second wiring SL2 to which the low-reflection structure is applied and the second wiring SL2 to which the low-reflection structure is not applied.

[0270] The second wiring SL2 to which the low-reflection structure is applied may have a multilayer film structure. The second wiring SL2 to which the low-reflection structure is applied may include a thin-film second semi-transmitting layer L2a, a second optical path compensation layer L2b that creates a difference in the length of the optical path, and a second metal layer L2c that serves as the main wiring. The second wiring SL2 to which the low-reflection structure is not applied may have a single film structure. The second wiring SL2 to which the low-reflection structure is not applied may include only the second metal layer L2c that serves as the main wiring.

[0271] Referring to Figure 19, in the case of the first wiring SL1 based on the first metal, it can be confirmed that the first wiring SL1 to which the low-reflection structure is applied has a significantly reduced reflectance in the visible light wavelength band (range from approximately 380 nm to approximately 800 nm) compared to the first wiring SL1 to which the low-reflection structure is not applied.

[0272] Referring to Figure 20, in the case of the second wiring SL2 based on the second metal, it can be confirmed that the reflectance of the second wiring SL2 to which the low-reflection structure is applied is significantly reduced in the visible light wavelength band (range from approximately 380 nm to approximately 800 nm) compared to the second wiring SL2 to which the low-reflection structure is not applied.

[0273] FIG. 21 is a diagram showing data lines DL and gate lines GL to which a low-reflection structure is applied in a first area A1 where a camera 110 is arranged within a display area AA of a display device 10 according to an embodiment of the present disclosure.

[0274] Figure 21 is a diagram simply showing the formation area of ​​the sub-pixel SP that overlaps with the first area A1 in which the camera 110 is arranged and its surroundings, and Figure 22 is a diagram showing the camera 110 and the sub-pixel SP arranged in the first area A1 within the display area AA of the display device 10 according to an embodiment of the present disclosure.

[0275] Referring to FIG. 21, the sub-pixel SP may be connected to a data line DL and a gate line GL.

[0276] For example, one of the first wiring SL1 and the second wiring SL2 in Figures 17 to 20 may be a row-direction display wiring (e.g., a gate line GL, etc.), and the other may be a column-direction display wiring (e.g., a data line DL, etc.).

[0277] For example, as shown in Figure 21, if the data lines DL are display wirings in the column direction and the gate lines GL are display wirings in the row direction, the first wiring SL1 may be the data line DL, and the second wiring SL2 may be the gate line GL.

[0278] Referring to FIG. 21, since the sub-pixel SP overlaps with the first region A1, a transmission region TA through which external light passes may exist around the sub-pixel SP.

[0279] The data lines DL and gate lines GL connected to the subpixels SP in FIG. 21 overlap the first area A1 in which the camera 110 is disposed, and therefore each of the data lines DL and gate lines GL may have a low reflection structure.

[0280] As described above, the sub-pixel SP in FIG. 21 overlaps with the first area A1 in which the camera 110 is located.

[0281] Therefore, the transistors (DRT, SCT, etc.) and storage capacitors Cst arranged in the subpixels SP overlapping with the first region A1 may have the low-reflection structure described above. The low-reflection structure may be a multi-layer structure further including an additional layer under the main metal. Here, the additional layer may include an optical path compensation layer that creates a difference in optical path length and a semi-transmitting layer formed of a thin film.

[0282] The first area A1 overlapped by the camera 110 may have the same resolution as the second area A2, i.e., the number of sub-pixels SP arranged per unit area in the first area A1 is the same as the number of sub-pixels SP arranged per unit area in the second area A2.

[0283] In order to improve the imaging performance of the camera 110 in the first region A1, the transmittance of the first region A1 needs to be higher than the transmittance of the second region A2. For this reason, the first region A1 overlapped by the camera 110 may have a lower resolution than the second region A2. That is, the number of sub-pixels SP arranged per unit area in the first region A1 may be smaller than the number of sub-pixels SP arranged per unit area in the second region A2.

[0284] FIG. 23 is a cross-sectional view of the first area A1 and the second area A2 within the display area AA of the display device 10 according to an embodiment of the present disclosure, and FIG. 24 is another cross-sectional view of the first area A1 and the second area A2 within the display area AA of the display device 10 according to an embodiment of the present disclosure.

[0285] 23 and 24, as described above, the first transistor TR1 and the first capacitor Cst1 disposed in the subpixel SP in the first region A1 overlapping with the camera 110 may have a low-reflection structure.

[0286] That is, the first transistor TR1 and the first capacitor Cst1 disposed in the sub-pixel SP in the first region A1 overlapping with the camera 110 may be configured with a triple film.

[0287] 23 and 24, the second transistor TR2 and the second capacitor Cst2 disposed in the subpixel SP in the second region A2 that does not overlap with the camera 110 may not have a low-reflection structure. That is, the second transistor TR2 and the second capacitor Cst2 disposed in the subpixel SP in the second region A2 that does not overlap with the camera 110 may be formed of a single film.

[0288] The following describes the structure of the first transistor TR1 and the first capacitor Cst1 arranged in the subpixel SP in the first region A1, and the structure of the second transistor TR2 and the second capacitor Cst2 arranged in the subpixel SP in the second region A2.

[0289] 23 and 24, it is assumed that the first and second transistors TR1 and TR2 have a top gate structure. However, as in FIG. 9, the first and second transistors TR1 and TR2 may have a bottom gate structure.

[0290] The stacked structure for the first region A1 will be described with reference to Figures 23 and 24. The first transistor TR1 is located on the upper portion of the substrate 320, but may overlap with the first region A1 but not with the second region A2.

[0291] A buffer layer BUF is disposed on the substrate 320. An active layer ACT1 of the first transistor TR1 is disposed on the buffer layer BUF.

[0292] A gate insulating film GI is disposed on the active layer ACT1 of the first transistor TR1. A gate electrode G1 of the first transistor TR1 is disposed on the gate insulating film GI. A passivation layer PAS may be disposed on the gate insulating film GI while covering the gate electrode G1.

[0293] The source electrode S1 and the drain electrode D1 of the first transistor TR1 are disposed on the passivation layer PAS. The source electrode S1 of the first transistor TR1 may be connected to a portion of the active layer ACT1 through a double contact hole in the passivation layer PAS and the gate insulating film GI.

[0294] The drain electrode D1 of the first transistor TR1 can be connected to another part of the active layer ACT1 through a double contact hole in the passivation layer PAS and the gate insulating film GI.

[0295] In the active layer ACT1, a first portion connected to the source electrode S1 of the first transistor TR1 and a second portion connected to the drain electrode D1 of the first transistor TR1 are conductive portions. In the active layer ACT1, the channel of the first transistor TR1 is formed between the first and second portions.

[0296] The first transistor TR1 may be a drive transistor DRT or a scan transistor SCT in the subpixel SP. The first transistor TR1 in Figures 23 and 24 is exemplified as a drive transistor DRT in the subpixel SP. Also, for example, a source electrode S1 of the first transistor TR1 is electrically connected to an anode electrode AE ​​of the light-emitting element ED.

[0297] An insulating layer PAC may be disposed on the passivation layer PAS while covering the source electrode S1 and drain electrode D1 of the first transistor TR1. An anode electrode AE ​​is disposed on the insulating layer PAC. The anode electrode AE ​​is connected to the source electrode S1 of the first transistor TR1 through a contact hole in the insulating layer PAC.

[0298] Banks BANK that define the light-emitting areas of the sub-pixels SP can be disposed on the insulating layer PAC.

[0299] 23 and 24, the first capacitor Cst1 disposed in the first region A1 includes two plates PLT1A and PLT1B spaced apart from each other. Of the two plates PLT1A and PLT1B, the first plate PLT1A may be an electrode made of the same material (semiconductor material) as the active layer ACT1, which is made conductive. Of the two plates PLT1A and PLT1B, the second plate PLT1B may be the same gate metal as the gate electrode G1.

[0300] The stacked structure for the second region A2 will be described with reference to FIGS. 23 and 24. The second transistor TR2 is located on the upper portion of the substrate 320, but does not overlap with the first region A1, and may overlap with the second region A2. A buffer layer BUF is disposed on the substrate 320. An active layer ACT2 of the second transistor TR2 is disposed on the buffer layer BUF. A gate insulating film GI is disposed on the active layer ACT2 of the second transistor TR2. A gate electrode G2 of the second transistor TR2 is disposed on the gate insulating film GI. A passivation layer PAS may be disposed on the gate insulating film GI, covering the gate electrode G2.

[0301] The source electrode S2 and the drain electrode D2 of the second transistor TR2 are disposed on the passivation layer PAS. The source electrode S2 of the second transistor TR2 may be connected to a portion of the active layer ACT2 through a double contact hole in the passivation layer PAS and the gate insulating film GI.

[0302] The drain electrode D2 of the second transistor TR2 can be connected to another part of the active layer ACT1 through a double contact hole in the passivation layer PAS and the gate insulating film GI.

[0303] In the active layer ACT1, a first portion connected to the source electrode S2 of the second transistor TR2 and a second portion connected to the drain electrode D2 of the second transistor TR2 are conductive portions. In the active layer ACT2, the channel of the second transistor TR2 is formed between the first and second portions.

[0304] The second transistor TR2 may be a drive transistor DRT or a scan transistor SCT in the subpixel SP. The second transistor TR2 in Figures 23 and 24 is exemplified as a drive transistor DRT in the subpixel SP. Also, for example, the source electrode S2 of the second transistor TR2 is electrically connected to the anode electrode AE ​​of the light-emitting element ED.

[0305] An insulating layer PAC may be disposed on the passivation layer PAS while covering the source electrode S2 and drain electrode D2 of the second transistor TR2. An anode electrode AE ​​is disposed on the insulating layer PAC. The anode electrode AE ​​is connected to the source electrode S2 of the second transistor TR2 through a contact hole in the insulating layer PAC.

[0306] Banks BANK that define the light-emitting areas of the sub-pixels SP can be disposed on the insulating layer PAC.

[0307] 23, the second capacitor Cst2 disposed in the second region A2 includes two plates PLT2A and PLT2B spaced apart from each other. Of the two plates PLT2A and PLT2B, the first plate PLT2A may be an electrode made of the same material (semiconductor material) as the active layer ACT2, which is made conductive. Of the two plates PLT2A and PLT2B, the second plate PLT2B may be the same gate metal as the gate electrode G2.

[0308] Referring to FIG. 23, the first transistor TR1, which is entirely or partially overlapped with the camera 110, has a low reflection structure.

[0309] Referring to FIG. 23, the source electrode S1 of the first transistor TR1 may include a first source electrode layer 2331, a second source electrode layer 2332, and a third source electrode layer 2333.

[0310] The first source electrode layer 2331 may have a material and thickness corresponding to the first semi-transmitting layer L1a, the second source electrode layer 2332 may have a material and thickness corresponding to the first light path compensation layer L1b, and the third source electrode layer 2333 may include a first metal which is a source-drain metal.

[0311] The drain electrode D1 of the first transistor TR1 may include a first drain electrode layer 2321, a second drain electrode layer 2322, and a third drain electrode layer 2323.

[0312] The first drain electrode layer 2321 may have a material and thickness corresponding to the first semi-transmitting layer L1a, the second drain electrode layer 2322 may have a material and thickness corresponding to the first optical path compensation layer L1b, and the third drain electrode layer 2323 may include a first metal which is a source-drain metal.

[0313] The gate electrode G1 of the first transistor TR1 may include a first gate electrode layer 2311, a second gate electrode layer 2312, and a third gate electrode layer 2313.

[0314] The first gate electrode layer 2311 may have a material and thickness corresponding to the second semi-transparent layer L2a, the second gate electrode layer 2312 may have a material and thickness corresponding to the second optical path compensation layer L2b, and the third gate electrode layer 2313 may include a second metal which is a gate metal.

[0315] 23, the second transistor TR2 that does not overlap with the camera 110 may have a general structure (single layer structure) rather than a low reflection structure (triple layer structure). In some cases, the second transistor TR2 that does not overlap with the camera 110 may also have a low reflection structure (triple layer structure) like the first transistor TR1.

[0316] 23, the source electrode S2 of the second transistor TR2 may include only the third source electrode layer 2333, without the first source electrode layer 2331 and the second source electrode layer 2332. The drain electrode D2 of the second transistor TR2 may include only the third drain electrode layer 2323, without the first drain electrode layer 2321 and the second drain electrode layer 2322. The gate electrode G2 of the second transistor TR2 may include only the third gate electrode layer 2313, without the first gate electrode layer 2311 and the second gate electrode layer 2312.

[0317] Referring to FIG. 23, the display panel 100 may further include a first capacitor Cst1 located on the substrate 320, but not overlapping the second region A2, but overlapping the first region A1.

[0318] The first capacitor Cst1 may include two plates PLT1A and PLT1B spaced apart from each other. At least one (e.g., PLT1B) of the two plates PLT1A and PLT1B may include a first plate layer 2341, a second plate layer 2342, and a third plate layer 2343. That is, at least one (e.g., PLT1B) of the two plates PLT1A and PLT1B of the first capacitor Cst1 arranged in the first region A1 overlapping with the camera 110 may have a low-reflection structure.

[0319] The first plate layer 2341 may have a material and thickness corresponding to the first semi-transmitting layer L1a, the second plate layer 2342 may have a material and thickness corresponding to the first optical path compensation layer L1b, and the third plate layer 2343 may include a first metal that is a source / drain metal or a second metal that is a gate metal.

[0320] The display panel 100 may further include a second capacitor Cst2 located on the substrate 320, not overlapping the first area A1 but overlapping the second area A2.

[0321] The second capacitor Cst2 may include two plates PLT2A and PLT2B spaced apart from each other and formed in a single layer. The first plate PLT2A of the second capacitor Cst2 may include the same material as the third plate layer 2343 of the first capacitor Cst1 or may be disposed on the same layer as the third plate layer 2343 of the first capacitor Cst1.

[0322] 24, the display panel 100 may further include a first light shield LS1 disposed under the active layer ACT1 of the first transistor TR1. The first light shield LS1 overlapping the camera 110 in the first region A1 is a pattern that protects the channel of the first transistor TR1.

[0323] First light shield LS1 arranged in first region A1 overlapping with camera 110 may have a low-reflection structure. That is, first light shield LS1 arranged in first region A1 overlapping with camera 110 may include a first light shield layer 2401 located on substrate 320, a second light shield layer 2402 located on first light shield layer 2401, and a third light shield layer 2403 located on second light shield layer 2402.

[0324] In the first write shield LS1, the first write shield layer 2401 may be thinner than the second write shield layer 2402, and the first write shield layer 2401 may have a material corresponding to the first semi-transparent layer L1a, and the second write shield layer 2402 may have a material corresponding to the first optical path compensation layer L1b.

[0325] 24, the display panel 100 may further include a second light shield LS2 disposed under the active layer ACT2 of the second transistor TR2 in a second region A2 that does not overlap with the camera 110. The second light shield LS2 that does not overlap with the camera 110 is a pattern that protects the channel of the second transistor TR2.

[0326] Second light shield LS2 arranged in second region A2 not overlapping with camera 110 may include third light shield layer 2403 and not include first light shield layer 2401 or second light shield layer 2402.

[0327] That is, the second light shield LS2 disposed in the second area A2 that does not overlap with the camera 110 may have a single layer structure.

[0328] FIG. 25 is a diagram illustrating a case where the camera 110 of the display device 10 according to an embodiment of the present disclosure is positioned at the center of the display area AA.

[0329] Referring to FIG. 25, the display area AA of the display panel 100 may include a first area A1 that overlaps with the camera 110 and a second area A2 that is different from the first area A1.

[0330] The first region A1 may be located within the display area AA, but may be located in a boundary area adjacent to the non-display area NA, which is the outer boundary of the display area AA. In this case, only a portion of the first region A1 may be surrounded by the second region A2. The first region A1 may be located at the top edge of the display device 10.

[0331] Alternatively, the first area A1 may be located in the center of the display area AA, as shown in Figure 25. In this case, the first area A1 may be surrounded in all directions by the second area A2.

[0332] The embodiments of the present disclosure described above may provide a display device including a display area where an image is displayed, a substrate, a display panel located on top of the substrate and including first wiring arranged in the display area, and a camera that is not exposed to the outside of the front surface of the display panel, captures images in front of the display panel, is arranged below the display area of ​​the display panel, and is positioned overlapping with the first area within the display area.

[0333] In a display device according to an embodiment of the present disclosure, the first wiring may entirely or partially overlap the first region. The portion of the first wiring overlapping the first region may include a first semi-transmitting layer located on the substrate, a first optical path compensation layer located on the first semi-transmitting layer, and a first metal layer located on the first optical path compensation layer and including a first metal (S / D).

[0334] In the display device according to the embodiments of the present disclosure, the first semi-transmitting layer may have a thickness less than that of the first light path compensation layer.

[0335] In a display device according to an embodiment of the present disclosure, among the first semi-transmitting layer, the first optical path compensation layer, and the first metal layer, the first semi-transmitting layer closest to the camera may have the thinnest thickness, and the first metal layer closest to the portion where external light is incident may have the thickest thickness.

[0336] In the display device according to the embodiment of the present disclosure, the first semi-transmitting layer may have a thickness of 1 to 5 nm, and the first light path compensation layer may have a thickness of 30 to 120 nm.

[0337] In a display device according to an embodiment of the present disclosure, external light enters the opening on the side of the first wiring and is reflected from the front of the camera, and a portion of the external light reflected from the front of the camera is reflected from the back of the first semi-transmitting layer, and another portion of the external light reflected from the front of the camera passes through the first semi-transmitting layer and the first optical path compensation layer and may be reflected from the back of the first metal layer.

[0338] In the display device according to the embodiment of the present disclosure, the external light reflected from the rear surface of the first semi-transmissive layer and the external light reflected from the rear surface of the first metal layer may have a phase difference of an odd multiple of 180 degrees.

[0339] In the display device according to the embodiment of the present disclosure, the first light path compensation layer may include a conductive transparent material.

[0340] In a display device according to an embodiment of the present disclosure, a region of the display region excluding the first region is a second region, and the first wiring may include a portion overlapping the first region and a portion overlapping the second region. The portion of the first wiring overlapping the second region may include a first metal layer including a first metal without a first semi-transmitting layer and a first optical path compensation layer.

[0341] The display device according to the embodiment of the present disclosure may further include a second wiring located on the substrate, disposed in the display area, and overlapping the first area entirely or partially.

[0342] In a display device according to an embodiment of the present disclosure, the portion of the second wiring that overlaps with the first region may include a second semi-transmitting layer located on the top of the substrate, a second optical path compensation layer located on the second semi-transmitting layer, and a second metal layer located on the second optical path compensation layer and including a second metal (Gate) different from the first metal.

[0343] In the display device according to the embodiments of the present disclosure, the first semi-transmitting layer and the second semi-transmitting layer may include the same material, and the first optical path compensation layer and the second optical path compensation layer may include the same material.

[0344] In the display device according to the embodiment of the present disclosure, external light can enter the opening between the first wiring and the second wiring from above the substrate and travel toward the front of the camera.

[0345] In a display device according to an embodiment of the present disclosure, one of the first wiring and the second wiring may be a row-direction display wiring for driving the display, and the other may be a column-direction display wiring for driving the display.

[0346] The display device according to the embodiment of the present disclosure may further include a first transistor located on the substrate and overlapping the first region.

[0347] In a display device according to an embodiment of the present disclosure, the source electrode of the first transistor may include a first source electrode layer, a second source electrode layer, and a third source electrode layer, where the first source electrode layer has a material and thickness corresponding to the first semi-transmissive layer, the second source electrode layer has a material and thickness corresponding to the first light path compensation layer, and the third source electrode layer may include a first metal.

[0348] In a display device according to an embodiment of the present disclosure, the drain electrode of the first transistor may include a first drain electrode layer, a second drain electrode layer, and a third drain electrode layer, where the first drain electrode layer has a material and thickness corresponding to the first semi-transmitting layer, the second drain electrode layer has a material and thickness corresponding to the first light path compensation layer, and the third drain electrode layer may include a first metal.

[0349] In a display device according to an embodiment of the present disclosure, the gate electrode of the first transistor may include a first gate electrode layer, a second gate electrode layer, and a third gate electrode layer, where the first gate electrode layer has a material and a thickness corresponding to the second semi-transmitting layer, the second gate electrode layer has a material and a thickness corresponding to the second optical path compensation layer, and the third gate electrode layer may include a second metal.

[0350] The display device according to the embodiment of the present disclosure may further include a light shield disposed below the active layer of the first transistor.

[0351] In a display device according to an embodiment of the present disclosure, the write shield may include a first write shield layer located on the substrate, a second write shield layer located on the first write shield layer, and a third write shield layer located on the second write shield layer.

[0352] In a display device according to an embodiment of the present disclosure, the first light shield layer may be thinner than the second light shield layer, and the first light shield layer may have a material corresponding to the first semi-transmissive layer, and the second light shield layer may have a material corresponding to the first light path compensation layer.

[0353] A display device according to an embodiment of the present disclosure may further include a second transistor located on the substrate and overlapping a second region excluding the first region within the display region.

[0354] In a display device according to an embodiment of the present disclosure, the source electrode of the second transistor may include only the third source electrode layer without the first source electrode layer and the second source electrode layer, the drain electrode of the second transistor may include only the third drain electrode layer without the first drain electrode layer and the second drain electrode layer, and the gate electrode of the second transistor may include only the third gate electrode layer without the first gate electrode layer and the second gate electrode layer.

[0355] The display device according to the embodiment of the present disclosure may further include a first capacitor located on the substrate and overlapping the first region, the first storage capacitor including two plates spaced apart from each other, at least one of the two plates including a first plate layer, a second plate layer, and a third plate layer.

[0356] In the display device according to the embodiments of the present disclosure, the first plate layer has a material and thickness corresponding to the first semi-transparent layer, the second plate layer has a material and thickness corresponding to the first optical path compensation layer, and the third plate layer may include a first metal or a second metal.

[0357] The display device according to the embodiment of the present disclosure may further include a second capacitor located on the substrate and overlapping a second region within the display region excluding the first region, and the second storage capacitor may include two plates spaced apart from each other and formed of a single layer.

[0358] A display device according to an embodiment of the present disclosure may further include a transistor array located in a display region on an upper portion of the substrate, an anode electrode layer located on the transistor array, a light-emitting layer located on the anode electrode layer, a cathode electrode layer located on the light-emitting layer, and a sealing layer located on the cathode electrode layer.

[0359] In a display device according to an embodiment of the present disclosure, the cathode electrode layer may include a first cathode electrode overlapping the first region and a second cathode electrode overlapping a second region excluding the first region within the display area.

[0360] In the display device according to the embodiment of the present disclosure, the first cathode electrode may be a transparent cathode electrode having a first transmittance equal to or greater than a predetermined critical transmittance.

[0361] In the display device according to the embodiments of the present disclosure, the first cathode electrode and the second cathode electrode are separated, and the second cathode electrode may have a second transmittance that is less than the first transmittance.

[0362] A display device according to an embodiment of the present disclosure may further include a touch sensor layer disposed on the encapsulation layer and including a touch electrode; a touch pad unit located on the substrate in a non-display area that is an outer peripheral area of ​​the display area; and a touch line electrically connected to the entire or part of the touch electrode, extending along a slope of the encapsulation layer, and electrically connected to the touch pad unit.

[0363] The display device according to the embodiment of the present disclosure may further include a light-generating device and a proximity sensor that detects a nearby human body or object using light emitted from the light-generating device. The light-generating device may be located on the encapsulation layer and on a side of the touch sensor layer. The proximity sensor may be located under the substrate and overlap with the first region.

[0364] In a display device according to an embodiment of the present disclosure, among the touch electrodes, each of the touch electrodes positioned overlapping the area where the camera is disposed may be a transparent electrode or a mesh-type electrode having one or more openings.

[0365] The display area may include a first area overlapping with the camera and a second area different from the first area. For example, the first area may be located on the outer periphery of the display area, and only a portion of the first area may be surrounded by the second area.

[0366] As another example, the first region may be located in the center of the display region, and the first region may be surrounded on all sides by the second region.

[0367] An embodiment of the present disclosure may provide a display device including a display area where an image is displayed, the display area including a substrate, a display panel located on top of the substrate and including electrodes arranged in the display area, and a camera that is not exposed to the outside of the front surface of the display panel, captures images in front of the display panel, is located below the display area of ​​the display panel, and is positioned overlapping a first area within the display area.

[0368] In a display device according to an embodiment of the present disclosure, the electrode overlaps a first region overlapping with the camera, and the electrode may include a semi-transparent layer located on the top of the substrate, an optical path compensation layer located on the semi-transparent layer, and a metal layer located on the optical path compensation layer.

[0369] The semi-transmissive layer may have a thickness less than a thickness of the light path compensation layer. The electrode may be an electrode of a transistor in the subpixel that overlaps the first region or a plate of a capacitor that overlaps the first region.

[0370] According to an embodiment of the present disclosure, a display device can be provided in which a camera for capturing images of the front is not exposed to the front but is arranged below a display panel.

[0371] Furthermore, according to an embodiment of the present disclosure, a display device that can obtain a high-quality forward image can be provided even if a camera that captures the forward view is not exposed on the front but is arranged below the display panel.

[0372] Furthermore, according to an embodiment of the present disclosure, when a camera capturing images in front of the display panel is not exposed to the front but is arranged below the display panel, it is possible to prevent external light required for the camera from entering the interior of the display panel and being repeatedly reflected between the wiring in the display panel and the camera, thereby providing a display device capable of capturing high-resolution images.

[0373] The above-described specification is not limited to the above-described embodiments and the attached drawings, and it will be apparent to those skilled in the art that various substitutions, modifications, and alterations are possible within the scope of the technical idea of ​​the present disclosure. Therefore, the scope of the present disclosure is defined by the following claims, and all modifications and alterations derived from the meaning and scope of the claims and their equivalents should be interpreted as being included in the scope of the present disclosure.

Claims

1. a display area including a first area and a second area different from the first area, and a non-display area outside the display area; Flexible substrate, an anode electrode layer disposed over the transistor array; a light-emitting layer located on the anode electrode layer; a cathode electrode layer located over the light-emitting layer; and a sealing layer including a first inorganic layer, an organic layer, and a second inorganic layer disposed on the cathode electrode layer; a display panel including: a touch buffer film disposed on the encapsulation layer; an optical device positioned below the display panel and overlapping the first region of the display area; At least two wirings including a first wiring and a second wiring different from the first wiring, at least a portion of the at least two wirings being disposed in the first region surrounding the optical device; at least one dam disposed in a non-display area outside the display area; a touch sensor layer disposed on the encapsulation layer and including a plurality of mesh-type touch electrodes; at least one dummy touch electrode disposed between the plurality of mesh-type touch electrodes; a touch pad portion on the flexible substrate and located in the non-display area; a plurality of touch wirings electrically connected to one or more of the plurality of mesh-type touch electrodes and electrically connected to the touch pad unit; A proximity sensor that detects nearby people and objects; a transistor located on the flexible substrate; a write shield disposed below an active layer of the transistor; The first inorganic layer and the second inorganic layer overlap the dam.

2. further comprising a light-generating device configured to emit light; The display device of claim 1 , wherein the light-generating device is located above the encapsulation layer and to the side of the touch sensor layer.

3. 2. The display device according to claim 1, wherein the at least two wirings include a plurality of signal lines, a plurality of electrodes, or a plurality of metal patterns.

4. 2. The display device of claim 1, wherein at least one of the first wiring and the second wiring includes multiple layers.

5. The display device of claim 4 , wherein the plurality of layers includes a semi-transmissive layer, a light path compensation layer, and a metal layer.

6. the first wiring includes a first portion overlapping the first region and a second portion overlapping the second region; The display device according to claim 5 , wherein the semi-transmissive layer, the optical path compensation layer, and the metal layer included in the first wiring are disposed in the first portion overlapping the first region.

7. 7. The display device of claim 6, wherein the metal layer included in the first wiring is disposed in at least a portion of the second portion, and the second portion of the first wiring that overlaps the second region includes the metal layer without the optical path compensation layer.

8. The display device according to claim 5 , wherein the semi-transmissive layer, the optical path compensation layer, and the metal layer included in the second wiring are disposed in a portion of the second wiring that overlaps with the first region.

9. the semi-transmitting layer has a thickness less than a thickness of the light path compensation layer; The display device of claim 5 , wherein the light path compensation layer comprises a conductive transparent material.

10. 6. The display device of claim 5, wherein the semi-transmitting layer closest to the optical device is the thinnest among the semi-transmitting layer, the light path compensation layer, and the metal layer, and the metal layer closest to the portion where external light is incident is the thickest.

11. a first transistor located on the flexible substrate and overlapping the first region; a source electrode of the first transistor including a first source electrode layer, a second source electrode layer, and a third source electrode layer; the first source electrode layer has a material corresponding to a material of the semitransparent layer; the second source electrode layer has a material corresponding to a material of the optical path compensation layer; the third source electrode layer includes a first metal; the drain electrode of the first transistor includes a first drain electrode layer, a second drain electrode layer, and a third drain electrode layer; the first drain electrode layer has a material corresponding to a material of the semi-transparent layer; the second drain electrode layer has a material corresponding to a material of the optical path compensation layer; the third drain electrode layer includes the first metal; a gate electrode of the first transistor including a first gate electrode layer, a second gate electrode layer, and a third gate electrode layer; the first gate electrode layer has a material corresponding to a material of the semitransparent layer; the second gate electrode layer has a material corresponding to a material of the optical path compensation layer; 6. The display device of claim 5, wherein the third gate electrode layer comprises a second metal.

12. further comprising a write shield disposed below an active layer of the first transistor; the write shield includes a first write shield layer located on the flexible substrate, a second write shield layer located on the first write shield layer, and a third write shield layer located on the second write shield layer; the first write shield layer is thinner than the second write shield layer; the first write shield layer has a material corresponding to that of the semi-transparent layer; The display device of claim 11 , wherein the second light shield layer has a material corresponding to that of the light path compensation layer.

13. a second transistor located on the flexible substrate and overlapping the second region of the display area; a source electrode of the second transistor includes the third source electrode layer but does not include the first source electrode layer or the second source electrode layer; a drain electrode of the second transistor includes the third drain electrode layer but does not include the first drain electrode layer or the second drain electrode layer; 12. The display device according to claim 11, wherein the gate electrode of the second transistor includes the third gate electrode layer and does not include the first gate electrode layer and the second gate electrode layer.

14. a first storage capacitor located on the flexible substrate and overlapping the first region; the first storage capacitor includes two plates spaced apart from each other; At least one of the two plates includes a first plate layer, a second plate layer, and a third plate layer; the first plate layer has a material corresponding to the semi-transparent layer; the second plate layer has a material corresponding to the light path compensation layer; 6. The display device of claim 5, wherein said third plate layer has a material corresponding to said metal layer.

15. a second storage capacitor positioned on the flexible substrate and overlapping the second region of the display area; the second storage capacitor includes two plates spaced apart from each other; 15. The display device of claim 14, wherein each of the two plates of the second storage capacitor is a single layer.

16. 2. The display device according to claim 1, wherein the first wirings are arranged in a first direction, and the second wirings are arranged in a second direction different from the first direction.

17. 17. The display device of claim 16, wherein the first direction is perpendicular to the second direction.

18. a transparent cathode electrode having a first transmittance equal to or greater than a minimum transmittance that enables the optical device and the proximity sensor to function; 2. The display device of claim 1, wherein the second cathode electrode layer has a second transmittance lower than the first transmittance.

19. 2. The display device of claim 1, wherein the first region is located at the center of the display region, and the first region is surrounded on all sides by second regions.

20. 2. The display device of claim 1, wherein at least one material contained in at least one of the first and second wirings arranged in the first region overlapping with the optical device is different from a material contained in at least one of the first and second wirings arranged in the second region not overlapping with the optical device.

21. 2. The display device of claim 1, wherein the organic layer is interrupted by the dam.

22. The display device of claim 1 , wherein at least one of the touch buffer film and the touch sensor layer overlaps the dam.

23. 2. The display device according to claim 1, wherein the cathode electrode layer comprises a first cathode electrode layer disposed in the first region and a second cathode electrode layer disposed in the second region.

24. the first wiring and the second wiring supply different signals; The display device according to claim 1 , wherein the proximity sensor is located below the flexible substrate and overlaps the first region.

25. The display device of claim 1 , wherein the light shield includes a first light shield layer located in the first region and a second light shield layer located in the second region.

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