Real-time clock device

Abstract

To realize a real-time clock device and the like that can provide a highly accurate time.SOLUTION: A real-time clock device 20 includes: an input terminal TPRF to which a reference pulse signal PRF of a time is input; an oscillation circuit 60 that outputs an oscillation clock signal CK; a clock count circuit 70 that generates information on an internal time on the basis of the oscillation clock signal CK; and a processing circuit 40 that performs, in a case in which it is determined that a time lag occurs at the internal time when the reference pulse signal PRF is input, frequency correction of the oscillation clock signal CK based on a time lag amount and a time interval of the time lag, and time correction of the internal time.SELECTED DRAWING: Figure 1

Description

[Technical Field]

[0001] The present invention relates to a real-time clock device and the like. [Background technology]

[0002] There are known real-time clock devices that generate time information by measuring time based on an oscillating clock signal. For example, Patent Document 1 discloses a method for correcting subsecond time by reading data from a subsecond counter at a timing corresponding to a reference pulse signal, measuring the error in the measured time data, and performing distributed logical speed-up / speed-down with a subsecond counter. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2021-189037 Summary of the Invention [Problem to be solved by the invention]

[0004] According to the conventional technology of Patent Document 1, it is possible to periodically correct the time with high resolution by using logical timing. However, as time passes, aging causes the frequency accuracy of the clock signal that is the basis of the timekeeping data to decrease, which creates the problem that it becomes difficult to provide a highly accurate time unless the time information is updated frequently. [Means for solving the problem]

[0005] One aspect of the present disclosure relates to a real-time clock device including an input terminal to which a reference pulse signal for time is input, an oscillation circuit that outputs an oscillation clock signal, a timekeeping counting circuit that generates information on internal time based on the oscillation clock signal, and a processing circuit that, when it is determined that a time deviation has occurred in the internal time when the reference pulse signal is input, performs frequency correction of the oscillation clock signal based on the amount of time deviation and the time interval of the time deviation, and time correction of the internal time. [Brief explanation of the drawings]

[0006] [Figure 1] 2 shows an example of the configuration of a real-time clock device according to the present embodiment. [Figure 2] FIG. 10 is an explanatory diagram of a problem in the method of the comparative example. [Figure 3] FIG. [Figure 4] FIG. 3 is an explanatory diagram of input and output signals according to the embodiment. [Figure 5] 2 shows a detailed configuration example of the real-time clock device of the present embodiment. [Figure 6] FIG. 4 is a signal waveform diagram illustrating the operation of the present embodiment. [Figure 7] 4 is a flowchart illustrating the operation of the present embodiment. [Figure 8] 4 is a flowchart illustrating the operation of the present embodiment. [Figure 9] FIG. 3 is an explanatory diagram of time correction control according to the present embodiment. [Figure 10] FIG. 3 is an explanatory diagram of time correction control according to the present embodiment. [Figure 11] 2 shows a detailed configuration example of the real-time clock device of the present embodiment. [Figure 12] FIG. 4 is a signal waveform diagram illustrating the operation of the present embodiment. [Figure 13] 4 is a flowchart illustrating the operation of the present embodiment. [Figure 14] 4 is a flowchart illustrating the operation of the present embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0007] The present embodiment will be described below. Note that the present embodiment described below does not unduly limit the content of the claims. Furthermore, not all of the configurations described in the present embodiment are necessarily essential components.

[0008] 1. Real-time clock device FIG. 1 shows an example of the configuration of a real-time clock device 20 according to this embodiment. The real-time clock device 20 is, for example, a device that generates time information by measuring time based on an oscillation clock signal CK, and is, for example, a real-time clock module. The real-time clock device 20 in FIG. 1 includes a processing circuit 40, an oscillation circuit 60, a timekeeping count circuit 70, and an input terminal TPRF for a reference pulse signal PRF. Note that the configuration of the real-time clock device 20 is not limited to that shown in FIG. 1, and various modifications are possible, such as omitting some of the components, adding other components, or replacing some components with other components.

[0009] The input terminal TPRF is a terminal to which a time reference pulse signal PRF is input. The input terminal TPRF is, for example, an input terminal for external connection provided on the package of the real-time clock device 20. The reference pulse signal PRF is a time reference signal. For example, the edge timing of the reference pulse signal PRF serves as the reference timing for the time, e.g., the timing indicating the hour. As an example, the reference pulse signal PRF may be a 1PPS (Pulse Per Second) signal, which is a timing standard signal in GPS (GNSS) or the like. In this embodiment, a reference signal such as 1PPS output from an external GPS module may be used as the reference pulse signal PRF, but this is not limiting. For example, instead of a signal output every second like 1PPS, a signal output every 10 seconds, which is greater than 1 second, may also be used. Furthermore, when time information is transmitted to synchronize the time of multiple communication devices connected via a network, a synchronization signal for the time information may be used as the reference pulse signal PRF. For example, a signal generated by time synchronization using NTP (Network Time Protocol) or PTP (Precision Time Protocol) may be used as the reference pulse signal PRF.

[0010] The oscillator circuit 60 is a circuit that outputs an oscillation clock signal CK. For example, the oscillator circuit 60 generates an oscillation signal through oscillation operation and outputs the oscillation clock signal CK based on the oscillation signal. For example, the oscillator circuit 60 generates an oscillation signal with a frequency controlled by a frequency control signal SFC from the processing circuit 40 and outputs the oscillation clock signal CK based on this oscillation signal. As an example, the oscillator circuit 60 generates a sine-wave oscillation signal by driving a resonator such as a quartz crystal resonator with a drive circuit to oscillate it, and then waveform-shapes the generated oscillation signal with a waveform shaping circuit to output a square-wave oscillation clock signal CK. The oscillation clock signal CK is a clock signal with a frequency of, for example, 32.768 kHz. Note that the frequency of the oscillation clock signal CK is not limited to this and may be a frequency such as 32 kHz. The real-time clock device 20 may also have a clock output terminal that outputs the oscillation clock signal CK. Note that the oscillation operation of the oscillator circuit 60 is not limited to using such a resonator and various modifications are possible.

[0011] The processing circuit 40 is a circuit that performs various arithmetic processing and control processing in the real-time clock device 20. The processing circuit 40 can be realized, for example, by a logic circuit, and more specifically, by an ASIC (Application Specific Integrated Circuit) circuit that is automatically placed and routed using a gate array or the like.

[0012] The time count circuit 70 generates internal time information based on the oscillation clock signal CK from the oscillation circuit 60. For example, the time count circuit 70 performs time counting based on a frequency-divided clock signal obtained by dividing the oscillation clock signal CK using, for example, a frequency divider circuit, and generates time information indicating, for example, the current time through this time counting process. For example, a frequency-divided clock signal with a frequency of, for example, 1 Hz or 1 kHz is generated by dividing the oscillation clock signal CK using the frequency divider circuit, and time information is generated through time counting based on this frequency-divided clock signal. The time information, which is timekeeping data, can include data indicating seconds, minutes, hours, days, months, and years. For example, the time count circuit 70 has counters for counting seconds, minutes, hours, days, months, and years, and generates time information through the counting process of these counters. The generated time information is output to the outside, for example, via an interface circuit. Internal time information corresponding to the time information is also output from the time count circuit 70 to the processing circuit 40.

[0013] In this embodiment, if the processing circuit 40 determines that a time discrepancy has occurred in the internal time when the reference pulse signal PRF is input, it performs frequency correction of the oscillation clock signal CK and time correction of the internal time based on the amount of time discrepancy and the time interval of the time discrepancy. For example, the processing circuit 40 monitors the internal time of the real-time clock device 20 at each timing when the reference pulse signal PRF is input and determines whether a time discrepancy has occurred in the internal time. For example, the processing circuit 40 determines whether a time discrepancy has occurred in the internal time based on internal time information generated by the timing processing of the timing counting circuit 70. For example, if the internal time generated by the timing processing of the timing counting circuit 70 is strictly accurate, the internal time at each input timing of the reference pulse signal PRF will coincide with the hour, and no time discrepancy will occur. However, if a situation occurs, such as a change in the frequency of the oscillation clock signal CK due to aging, a time discrepancy will occur in which the internal time deviates from the hour. When the processing circuit 40 determines that such a time deviation of the internal time has occurred, it performs frequency correction of the oscillation clock signal CK based on the amount of time deviation and the time interval of the time deviation. The amount of time deviation represents the amount of time deviation of the internal time, such as the time error of the internal time. The time interval of the time deviation represents the length of the period during which the time deviation of the time deviation amount has occurred. When the processing circuit 40 determines that a time deviation of the internal time has occurred, it performs time correction of the internal time. For example, the processing circuit 40 outputs a signal to the timing count circuit 70 instructing it to perform time correction of the internal time, and the timing count circuit 70, upon receiving this signal, performs a process to correct (update) the internal time to the correct time. Here, the frequency correction of the oscillation clock signal CK and the time correction of the internal time do not need to be performed at the same time; for example, after the frequency correction has been performed, the internal time correction may be performed when the next reference pulse signal PRF is input.

[0014] As described above, the real-time clock device 20 of this embodiment includes an input terminal TPRF to which a time reference pulse signal PRF is input, an oscillation circuit 60 that outputs an oscillation clock signal CK, a timekeeping count circuit 70 that generates internal time information based on the oscillation clock signal CK, and a processing circuit 40. If the processing circuit 40 determines that a time discrepancy has occurred in the internal time when the reference pulse signal PRF was input, it performs frequency correction of the oscillation clock signal CK and time correction of the internal time based on the amount of time discrepancy and the time interval of the time discrepancy. In this manner, if a time discrepancy occurs in the internal time of the real-time clock device 20, the internal time is corrected and the frequency of the oscillation clock signal CK used in the internal time timing process is also corrected. This allows the real-time clock device 20 to provide highly accurate time information by suppressing errors in the timekeeping count caused by a discrepancy in the oscillation frequency, even if a discrepancy occurs in the oscillation frequency of the oscillation circuit 60 due to aging, for example.

[0015] For example, Figure 2 is an explanatory diagram of the problems with the method of the comparative example of this embodiment. In Figure 2, the frequency error corresponding to the oscillation frequency accuracy increases over time due to aging, etc., and this frequency error causes a deviation in the internal time. Correction is then performed to eliminate the deviation in the internal time caused by this frequency error. In this case, because the frequency error increases over time, the deviation in the internal time also increases, requiring frequent correction of the internal time.

[0016] For example, in conventional single-package real-time clock (RTC) modules, the frequency offset increases over time due to aging of the internal oscillator, which causes the time deviation to accelerate. In order to maintain highly accurate time information when the time deviation is large, frequent corrections must be made to update the time information, as shown in Figure 2, making it difficult to provide highly accurate time.

[0017] On the other hand, to achieve highly accurate timekeeping, it is also possible to consider a method of correcting the logical speed and speed of the timekeeping count. However, since logical speed and speed does not adjust the frequency, when a clock signal is output from the real-time clock module, the clock accuracy remains poor.

[0018] Another possible time synchronization method is to supply sub-second clock pulses from a time synchronization device to multiple information processing devices, and the information processing devices count these clock pulses to count the time, clearing it to zero when a synchronization signal is input. However, this method requires the supply of both the synchronization signal and the sub-second clock pulses, which increases the amount of wiring and increases current consumption due to the need to transmit the sub-second clock pulses.

[0019] It is also possible to consider an oscillator that has the function of detecting the error from the expected frequency based on the reference pulse signal of the GPS module, which is a GPS receiver, and performing frequency correction based on the detection results, but this oscillator does not perform time correction using the reference pulse signal.

[0020] Another method to achieve an accurate timekeeping clock is to use a processing unit such as an MCU to adjust the frequency of the clock generation circuit, rather than using a single-package real-time clock module. However, this method results in a larger device and consumes more power than a single-package real-time module. Another problem is that frequency adjustment is performed only by time comparison, so frequency adjustment can only be performed to the time resolution of the timestamp.

[0021] In this regard, the present embodiment provides an input terminal TPRF for a reference pulse signal PRF for correcting both the time and frequency. The input terminal TPRF determines whether a time discrepancy has occurred in the internal time at the input timing of the reference pulse signal PRF. If a time discrepancy is determined to have occurred, the frequency of the oscillation clock signal CK and the internal time are corrected. For example, the internal time of the real-time clock device 20 is corrected based on the reference pulse signal PRF, and the frequency is corrected based on the discrepancy between the time indicated by the reference pulse signal PRF and the internal time of the real-time clock device 20. This corrects both the time and the frequency using only the reference pulse signal PRF. As shown in FIG. 3, this allows for time correction to update the internal time to the correct time, while also performing frequency correction to reduce the frequency error to zero. This makes it possible to provide a real-time clock device 20 that can provide accurate time information and maintain time accuracy. Furthermore, in this embodiment, as shown in FIG. 4, the frequency of the oscillation clock signal CK and the internal time are corrected by inputting the reference pulse signal PRF to the real-time clock device 20. Therefore, the real-time clock device 20, which is a single-package real-time clock module, can incorporate an internal time correction function and an oscillation frequency adjustment correction function, making it possible to provide highly accurate time information with a small size and low power consumption.

[0022] 2. Detailed configuration example Fig. 5 shows a detailed configuration example of the real-time clock device 20 of this embodiment. The real-time clock device 20 of Fig. 5 is provided with an interface circuit 30 in addition to a processing circuit 40, an oscillation circuit 60, and a time counting circuit 70. Fig. 5 also shows detailed configuration examples of the processing circuit 40 and the time counting circuit 70. Note that the configurations of the real-time clock device 20, the processing circuit 40, and the time counting circuit 70 are not limited to those shown in Fig. 5, and various modifications are possible, such as omitting some of the components, adding other components, or replacing some of the components with other components.

[0023] In FIG. 5 , the oscillator circuit 60 generates an oscillation signal by oscillating the resonator 10 and outputs an oscillation clock signal CK. The resonator 10 is an element that generates mechanical vibrations in response to an electrical signal. The resonator 10 can be realized by a resonator element such as a quartz crystal resonator element. For example, the resonator 10 can be realized by a quartz crystal resonator element that vibrates in a thickness-shear mode, such as an AT-cut or SC-cut cut angle, a tuning-fork type quartz crystal resonator element, or a double-ended tuning-fork type quartz crystal resonator element. Note that the resonator 10 of this embodiment can also be realized by various resonators, such as a resonator element other than a thickness-shear type, tuning-fork type, or double-ended tuning-fork type, or a piezoelectric resonator element formed from a material other than quartz. For example, the resonator 10 can be a SAW (Surface Acoustic Wave) resonator or a MEMS (Micro Electro Mechanical Systems) resonator, which is a silicon resonator formed using a silicon substrate.

[0024] For example, in the real-time clock device 20 of FIG. 5, an integrated circuit device including an interface circuit 30, a processing circuit 40, an oscillation circuit 60, a timekeeping counting circuit 70, etc., and a resonator 10 are housed in a package 5. The integrated circuit device is a circuit device called an IC (Integrated Circuit). For example, the integrated circuit device is an IC manufactured by a semiconductor process, and is a semiconductor chip with circuit elements formed on a semiconductor substrate. The resonator 10 is electrically connected to the integrated circuit device. For example, the resonator 10 and the integrated circuit device are electrically connected using internal wiring, bonding wires, metal bumps, or the like of the package 5 that houses the resonator 10 and the integrated circuit device. Note that a variation is also possible in which the resonator 10 is not built into the real-time clock device 20, but is instead provided externally.

[0025] The interface circuit 30 is a circuit for communicating with an external processing device. For example, the interface circuit 30 communicates with the external processing device based on a given communication standard. For example, the interface circuit 30 performs serial communication using I2C (Inter-Integrated Circuit) or SPI (Serial Peripheral Interface). In the case of serial communication, the real-time clock device 20 has communication terminals such as a serial clock input terminal and a serial data input / output terminal. In FIG. 5, time stamp information TMS, which is time information, is input to the interface circuit 30. For example, the time stamp information TMS is input to the interface circuit 30 as serial data. The interface circuit 30 also outputs time information TMQ, which indicates the current time kept by the real-time clock device 20.

[0026] The oscillator circuit 60 can be realized, for example, by a drive circuit for oscillation electrically connected to one end and the other end of the vibrator 10, and passive elements such as capacitors and resistors. The drive circuit can be realized, for example, by a bipolar transistor or a CMOS inverter circuit. The drive circuit is the core circuit of the oscillator circuit 60, and the drive circuit drives the vibrator 10 with voltage or current, causing the vibrator 10 to oscillate. Various types of oscillator circuits can be used as the oscillator circuit 60, for example, inverter type, Pierce type, Colpitts type, or Hartley type.

[0027] The oscillator circuit 60 may also include a variable capacitance circuit (not shown). The variable capacitance circuit may include, for example, a capacitor array having multiple capacitors and a switch array having multiple switches. Each of the multiple capacitors and each of the multiple switches are connected in series between a node at one end or the other end of the vibrator 10 and, for example, a ground node. The capacitance values ​​of the multiple capacitors in the capacitor array are binary-weighted. The multiple switches in the switch array are turned on and off based on frequency control data, which is a frequency control signal SFC from the processing circuit 40. This controls the capacitance value of the variable capacitance circuit, thereby adjusting the oscillation frequency of the oscillator circuit 60. Alternatively, the variable capacitance circuit may be implemented using a variable capacitance element, such as a varactor. In this case, a frequency control voltage is input to the oscillator circuit 60 as the frequency control signal SFC from the processing circuit 40. This frequency control voltage adjusts the capacitance of the variable capacitance element, thereby adjusting the oscillation frequency of the oscillator circuit 60. In this embodiment, a temperature compensation circuit may be provided that performs temperature compensation based on a temperature detection signal from a temperature sensor. In this case, temperature compensation of the oscillation frequency is performed by adjusting the capacitance of the variable capacitance circuit based on the temperature compensation result of the temperature compensation circuit. Note that the connection in this embodiment is an electrical connection. An electrical connection is a connection that allows the transmission of an electrical signal, and is a connection that allows the transmission of information by an electrical signal. The electrical connection may be a connection via a passive element or the like.

[0028] In FIG. 5, the time count circuit 70 includes a time counter 72 and a divider circuit 78. The divider circuit 78 divides the oscillation clock signal CK from the oscillation circuit 60 to generate a divided clock signal CKD. For example, the divider circuit 78 includes a divide-by counter that operates based on the oscillation clock signal CK and generates the divided clock signal CKD. The divided clock signal CKD is a clock signal with a frequency of, for example, 1 Hz. The divider circuit 78 may include a first divider circuit that divides the oscillation clock signal CK by a first division ratio and a second divider circuit that divides the first divided clock signal from the first divider circuit by a second division ratio to output the divided clock signal CKD, which is a second divided clock signal. The first division ratio is, for example, 32, and the frequency of the first divided clock signal is, for example, 1.024 kHz. The second division ratio is, for example, 1024, which results in the divided clock signal CKD being output from the divider circuit 78 at 1 Hz. The frequency of the divided clock signal CKD may be, for example, 1 KHz. The clock output terminal of the real-time clock device 20 may be configured to selectively output the oscillation clock signal CK, the first divided clock signal, or the divided clock signal CKD, which is the second divided clock signal.

[0029] The time counter 72 performs time counting based on the divided clock signal CKD from the frequency divider circuit 78, generating internal time TM information. For example, the time counter 72 has counters for seconds, minutes, hours, days, months, and years, and generates internal time TM information through counting by these counters. This internal time TM information is stored in the internal time register 56 of the processing circuit 40 and output to the outside via the interface circuit 30 as time information TMQ indicating the current time. For example, the time counter 72 includes a first counter 73 and a second counter 74. The first counter 73 counts hours, minutes, and seconds, and the second counter 74 counts fractions of a second. Details of the first counter 73 and second counter 74 will be described later.

[0030] In addition, in FIG. 5, the processing circuit 40 includes a time lag calculation unit 42, a time interval timing unit 46, a frequency offset calculation unit 50, a frequency adjustment circuit 52, and an internal time register 56.

[0031] The time deviation calculation unit 42 calculates the time deviation of the internal time TM based on the internal time TM at the timing when the reference pulse signal PRF is input. The timing when the reference pulse signal PRF is input is, for example, the edge timing of the reference pulse signal PRF. For example, the time deviation calculation unit 42 determines whether a time deviation has occurred by performing a comparison process based on the value of the internal time TM at a first input timing of the reference pulse signal PRF and the value of the internal time TM at a second input timing of the reference pulse signal PRF after the first input timing. If the time deviation calculation unit 42 determines that a time deviation has occurred, it outputs the time deviation amount TE to the frequency offset calculation unit 50.

[0032] The time interval measuring unit 46 measures the time interval TI during which the time lag occurs and outputs the measured time interval TI to the frequency offset calculation unit 50. For example, the time interval measuring unit 46 measures the time interval from when the time correction is performed until the next time it is determined that a time lag has occurred as the time lag interval TI. For example, the time interval measuring unit 46 measures the time interval from when it is determined that there is no time lag in the internal time TM until when it is determined that a time lag has occurred in the internal time TM as the time lag interval TI. For example, assume that there is no time lag in the internal time TM at the ith input timing of the reference pulse signal PRF, and that it is determined that a time lag has occurred at the jth input timing of the reference pulse signal PRF (i, j are integers such that j > i). In this case, the period from the ith input timing to the jth input timing is measured as the time interval TI. For example, the time counter circuit 70 outputs a count pulse CP that becomes active at each input timing of the reference pulse signal PRF. The time interval measuring unit 46 measures the time interval TI by counting the number of count pulses CP. For example, if it is determined that there is no time lag at the ith input timing but that a time lag occurs at the jth input timing, the time interval measuring unit 46 measures the time interval TI of the time lag by counting the number of count pulses CP from the ith input timing to the jth input timing.

[0033] The frequency offset calculation unit 50 then performs a calculation to estimate the frequency offset FOF based on the time offset amount TE from the time offset calculation unit 42 and the time interval TI of the time offset from the time interval measurement unit 46. For example, the frequency offset calculation unit 50 calculates the frequency offset as FOF = TE / TI. The frequency adjustment circuit 52 then adjusts the frequency of the oscillation circuit 60 based on the frequency offset FOF. For example, the frequency adjustment circuit 52 performs frequency correction so as to cancel out the estimated frequency offset FOF. For example, the frequency adjustment circuit 52 generates a frequency control signal SFC that increases or decreases the frequency of the oscillation clock signal CK by the calculated frequency offset FOF and outputs it to the oscillation circuit 60. The oscillation circuit 60 then outputs the oscillation clock signal CK having an oscillation frequency corresponding to the frequency offset FOF. For example, the frequency control signal SFC based on the frequency offset FOF controls the capacitance of the variable capacitance circuit of the oscillation circuit 60, thereby generating an oscillation clock signal CK having an oscillation frequency corresponding to the frequency offset FOF.

[0034] Figure 6 is a signal waveform diagram illustrating the operation of real-time clock device 20 of Figure 5. In the initial time adjustment shown at A1 in Figure 6, the time is adjusted using timestamp information TMS. For example, if the time of [12:00:00] is input using timestamp information TMS, then the time of [12:00:00] is set as the internal time of real-time clock device 20, as shown at A2. Then, after the initial time adjustment, the time correction valid flag is set to, for example, 1, as shown at A3, and time correction is enabled.

[0035] Then, as shown at A4, input of the reference pulse signal PRF begins, and, for example, at the first input timing of the reference pulse signal PRF, time correction is executed as shown at A5. The input timing, which is the edge timing of the reference pulse signal PRF, is on the hour, and time correction is executed at the input timing of this reference pulse signal PRF on the hour. For example, time correction is executed to reset the sub-second counter of the timing count circuit 70. Then, when time correction is executed, increment processing of the time interval count for each input timing of the reference pulse signal PRF begins as shown at A6, and the time correction flag is cleared (reset), for example, to 0 as shown at A7.

[0036] After the initial time adjustment and time correction, a subsecond time comparison is performed at the input timing of the reference pulse signal PRF, as shown in A8, to detect a time discrepancy. For example, by detecting whether the last digit (1 ms) of the subsecond 000 has changed from 0 to 1, it is determined whether a time discrepancy has occurred. Then, at A9, a subsecond time comparison of the internal time detects a subsecond discrepancy. Specifically, as shown in A9, a 1 ms discrepancy in the internal time at the input timing of the reference pulse signal PRF is detected. That is, since the input timing of the reference pulse signal PRF is on the hour, the subsecond time should be 000, but since it is 001 in A9, it is determined that a subsecond discrepancy has occurred. Note that in this embodiment, the time discrepancy accuracy is assumed to be 1 ms. For example, by providing a millisecond counter as the time counter 72, an accuracy of 1 ms can be achieved. However, the time discrepancy accuracy may be smaller or larger than 1 ms.

[0037] When it is determined that a time deviation has occurred in the internal time, frequency correction of the oscillation clock signal CK is performed, as indicated by A10. Specifically, the frequency offset FOF = TE / TI = time deviation amount / time interval is calculated, and frequency correction of the oscillation clock signal CK is performed based on the calculated frequency offset FOF. For example, as indicated by A9, the time deviation amount TE is 1 ms. Also, as indicated by A11, the time count value is incremented from 0 to 1000, so the time interval TI of the time deviation is 1000 s (1000 counts x 1 second). Therefore, as indicated by A12, the frequency offset FOF = 1 ms / 1000 s = 1 ppm is calculated, and frequency correction of the oscillation clock signal CK is performed based on this frequency offset OFF. Then, as indicated by A13, the time correction valid flag is set to 1. This causes time correction to be performed when the next reference pulse signal PRF is input, as indicated by A14. Specifically, as indicated by A15, the fractional seconds of the internal time are reset to 000. For example, the millisecond counter is reset. Once the time correction is performed in this manner, the time correction valid flag is cleared to 0 as shown at A16.

[0038] Figures 7 and 8 are flowcharts illustrating the operation of the real-time clock device 20 described in Figures 5 and 6. When power is applied and the real-time clock device 20 starts up, the time count circuit 70 begins counting (steps S1 and S2). As shown at A1 and A2 in Figure 6, the initial time is adjusted using the timestamp information TMS, and as shown at A3, the time correction valid flag is set, enabling time correction (steps S3 and S4). Then, as shown at A4 in Figure 6, input of the reference pulse signal PRF begins, and the time count circuit 70 begins counting (steps S5 and S6).

[0039] As shown in Fig. 8, when the reference pulse signal PRF is input during the execution period of the time count, it is determined whether or not time correction is valid (steps S11 and S12). That is, it is determined whether or not the time correction valid flag is set, as shown at A3 in Fig. 6. If time correction is valid, time correction is executed, as shown at A5 in Fig. 6 (step S13). When time correction is executed, the time interval count is reset to 0, as shown at A6, and the increment process of the time interval count from 0 begins. At the same time, the time correction flag is cleared to 0, as shown at A7, and time correction is invalidated (steps S14 and S15).

[0040] On the other hand, if the time correction flag is cleared to 0 and time correction is disabled, the internal time is held at the edge timing of the reference pulse signal PRF (step S16). The subsecond value of the internal time held last time is compared with the subsecond value of the internal time held this time (step S17). If the subsecond value held last time and the subsecond value held this time differ, and a subsecond shift is detected as shown at A9 in FIG. 6, a frequency offset FOF is calculated from the difference between the subsecond values ​​and the time interval (steps S18 and S19). That is, the frequency offset FOF is calculated based on the time shift amount TE, which is the difference between the subsecond values, and the time interval TI calculated based on the time interval count. Based on the calculated frequency offset FOF, frequency correction is performed (step S20), as shown at A10. The time correction valid flag is set as shown at A13, time correction is enabled, and the input process for the reference pulse signal PRF ends (steps S21 and S22).

[0041] Then, when the reference pulse signal PRF is next input, time correction is enabled, so step S12 after step S11 in Fig. 8 becomes "YES" and time correction is executed (step S13) as shown at A14 in Fig. 6. Then, the time interval count is reset and starts from 0, and the time correction enabled flag is cleared as shown at A16, disabling time correction (steps S14 and S15).

[0042] 9 and 10 are explanatory diagrams of the time correction control of this embodiment. For example, as shown in Fig. 5, the timing count circuit 70 is provided with a first counter 73 that counts hours, minutes, and seconds, and a second counter 74 that counts fractions of a second. For example, the first counter 73 is provided with counters that count hours, minutes, and seconds, and the second counter 74 is provided with a counter that counts milliseconds.

[0043] 9, the internal time of the real-time clock device 20 is ahead of the hour of [12:00:00] indicated by the reference pulse signal PRF. That is, the first counter 73, which counts hours, minutes, and seconds, indicates [12:00:00], but the second counter 74, which counts milliseconds less than seconds, has a count value of, for example, 2, so the internal time is ahead by, for example, 2 milliseconds. If it is determined that the internal time is ahead of the time corresponding to the reference pulse signal PRF in this way, the count value of the second counter 74 is reset (cleared) to, for example, 0 during time correction, as shown in FIG.

[0044] On the other hand, in FIG. 10 , the internal time of the real-time clock device 20 is delayed relative to the hour, 12:00:00, indicated by the reference pulse signal PRF. Specifically, the first counter 73, which counts hours, minutes, and seconds, indicates 11:59:59, while the second counter 74, which counts milliseconds less than seconds, has a count value of 998, indicating that the internal time is delayed by, for example, 2 milliseconds. If it is determined that the internal time is delayed relative to the time corresponding to the reference pulse signal PRF, the time correction involves resetting the count value of the second counter 74 to, for example, 0, and adding a value corresponding to one second to the count value of the first counter 73, as shown in FIG. 10 . For example, the count value of the second counter of the first counter 73 is incremented by, for example, 1. This allows time correction to be performed, in which the count values ​​of the first counter 73 and the second counter 74 are set to the count value corresponding to the hour, regardless of whether the internal time is advanced or delayed at the time the reference pulse signal PRF is input. That is, if the internal time is fast, the count value of the second counter 74 that counts fractional seconds is reset and the count value of the first counter 73 that counts hours, minutes, and seconds is left unchanged, as shown in Figure 9. If the internal time is slow, the count value of the second counter 74 that counts fractional seconds is reset and the count value of the first counter 73 that counts hours, minutes, and seconds is increased by +1 second, as shown in Figure 10, so that the count value can be set to the count value that corresponds to the hour.

[0045] Fig. 11 is a diagram showing a detailed configuration example of the real-time clock device 20 of this embodiment. In Fig. 11, a reference pulse input time register 43 and a time comparison and determination unit 44 are provided as the time deviation calculation unit 42 in Fig. 5, and a time interval counter 47 and a time interval register 48 are provided as the time interval timing unit 46 in Fig. 5.

[0046] The reference pulse input time register 43 holds the internal time TM at the timing when the reference pulse signal PRF is input. For example, the reference pulse input time register 43 holds the internal time TM=TM1 at the first input timing of the reference pulse signal PRF and the internal time TM=TM2 at the second input timing of the reference pulse signal PRF. The time comparison and determination unit 44 then compares the internal time TM1 at the first input timing with the internal time TM2 at the second input timing to determine whether a time deviation has occurred. If the time comparison and determination unit 44 determines that a time deviation has occurred, it outputs the time deviation amount TE to the frequency offset calculation unit 50 and also outputs a time deviation detection signal SCT.

[0047] The time interval counter 47 performs counting of the time interval count based on the count pulse CP, which becomes active at each input timing of the reference pulse signal PRF. For example, the count value of the time interval counter is incremented each time the count pulse CP becomes active. When the time comparison and determination unit 44 detects a time deviation and outputs a time deviation detection signal SCT, the count value TCT at that time is output from the time interval counter 47 and stored in the time interval register 48. The time interval register 48 outputs this count value TCT as the time interval TI to the frequency offset calculation unit 50. The frequency offset calculation unit 50 then calculates a frequency offset FOF based on the time deviation TE from the time comparison and determination unit 44 and the time interval TI from the time interval register 48. The frequency adjustment circuit 52 outputs a frequency control signal SFC to the oscillation circuit 60 based on the frequency offset FOF. This performs frequency correction of the oscillation clock signal CK.

[0048] FIG. 12 is a signal waveform diagram illustrating the operation of the real-time clock device 20 of FIG. 11. When the initial time adjustment is performed using the timestamp information TMS, as shown in B1 and B2 of FIG. 12, the subsecond adjustment flag is set to, for example, 1, as shown in B3, and the input of the reference pulse signal PRF begins, as shown in B4. That is, while time correction was performed at the initial input timing of the reference pulse signal PRF, as shown in A4 in FIG. 6, time correction is not performed at B4 in FIG. 12, and the subsecond adjustment flag, which is a time adjustment flag, is set to 1. Then, as shown in B5, a time difference of less than a second is detected by comparing the internal time at the input timing of the reference pulse signal PRF. For example, the internal time at the first input timing of the reference pulse signal PRF is compared with the internal time at the second input timing following the reference pulse signal PRF to determine whether a time difference has occurred. For example, a comparison of the internal time with less than a second (000) is performed.

[0049] At the input timing of the reference pulse signal PRF shown in B6, the first time difference (subsecond difference) of the internal time is detected as shown in B7. For example, the fractional seconds of the internal time is 001, indicating a time difference of 1 millisecond. When this first time difference is detected, the subsecond adjustment flag is cleared to, for example, 0 as shown in B8, and the time difference interval count begins to increment from 0 as shown in B9.

[0050] Next, at the input timing of the reference pulse signal PRF shown in B10, a second time deviation (subsecond deviation) of the internal time is detected as shown in B11. For example, in the first time deviation, B7, the subsecond value of the internal time is 001, while in the second time deviation, B11, the subsecond value of the internal time is 002, resulting in a time deviation of 1 millisecond, corresponding to the minimum resolution of the time accuracy. In Figure 12, when a second time deviation occurs, frequency correction is performed as shown in B12. For example, the time deviation amount TE is 1 ms as shown in B7 and B11. Furthermore, as shown in B13, the time count value is incremented from 0 to 1000, so the time interval TI of the time deviation is 1000 s (1000 counts x 1 second). Therefore, as shown in B14, the frequency offset FOF = 1 ms / 1000 s = 1 ppm is calculated, and frequency correction of the oscillation clock signal CK is performed based on this frequency offset FOF. Then, after the frequency correction is performed, the time correction valid flag is set to 1 as shown in B15. As a result, as shown in B16, time correction is performed the next time the reference pulse signal PRF is input. Specifically, as shown in B17, the internal time's fractional seconds are reset to 000. For example, the millisecond counter is reset. Once time correction is performed in this way, the time correction valid flag is cleared to 0 as shown in B18.

[0051] For example, when a network time information synchronization signal or the like is used as the reference pulse signal PRF, the accuracy of the time indicated by the input timing of the reference pulse signal PRF may be lower than that of GPS 1PPS. For example, in B5 of Figure 12, a comparison is made of the internal time less than a second, but the digits below 000, which are less than a second at the input timing of the reference pulse signal PRF, are not 0, such as 5 or 6, resulting in low time accuracy. Therefore, if the time interval is counted from the first input timing of the reference pulse signal PRF as shown in Figure 6, there is a risk that an inaccurate time interval will be measured.

[0052] 12, the time interval TI of the time shifts is measured based on the time interval count between the timing of the first time shift at B6 and B7 and the timing of the second time shift at B10 and B11, so that the time interval TI when a time shift of, for example, 1 millisecond occurs can be accurately measured. Therefore, the frequency offset FOF can be calculated using the accurate time interval TI, and therefore highly accurate frequency correction can be achieved even when the time accuracy of the reference pulse signal PRF is low.

[0053] Figures 13 and 14 are flowcharts illustrating the operation of real-time clock device 20 described in Figures 11 and 12. When power is applied and real-time clock device 20 starts up, time counting begins, and an initial time adjustment is performed using timestamp information TMS as shown in B1 and B2 of Figure 12, and the subsecond adjustment flag is set to 1 as shown in B3 (steps S31, S32, S33, and S34). Then, input of reference pulse signal PRF begins as shown in B4, and time counting circuit 70 executes time counting (steps S35 and S36).

[0054] 14, when the reference pulse signal PRF is input during the execution period of the time count, it is determined whether or not the time correction is valid (steps S41 and S42). If the time correction flag is cleared to 0 and the time correction is invalid, the internal time is held at the edge timing of the reference pulse signal PRF (step S43). Then, the sub-second value of the internal time held previously is compared with the sub-second value of the internal time held this time (step S44).

[0055] If the sub-second value held previously and the sub-second value held currently are different and a first sub-second deviation is detected as shown at B7 in Fig. 12, it is determined whether the sub-second adjustment flag is set (steps S45 and S46). Since the sub-second adjustment flag is set to 1 during the first sub-second deviation, the sub-second adjustment flag is cleared to 0 as shown at B8 in Fig. 12, and the time interval count is reset as shown at B9, and the time interval count begins (steps S47 and S48).

[0056] On the other hand, if the subsecond value held last time and the subsecond value held this time differ, and a second subsecond deviation is detected as shown in B11 of FIG. 12, it is determined whether the subsecond adjustment flag is set (steps S45 and S46). Since the subsecond adjustment flag is not set to 1 during the second subsecond deviation, the frequency offset FOF is calculated from the difference in the subsecond values ​​and the time interval (step S49). Then, based on the calculated frequency offset FOF, frequency correction is performed as shown in B12 (step S50). Then, the time correction valid flag is set as shown in B15, the time correction is valid, and the input process for the reference pulse signal PRF is completed (steps S51 and S52).

[0057] Then, when the reference pulse signal PRF is next input, time correction is enabled, so step S42 after step S41 in Fig. 14 becomes "YES" and time correction is executed (step S53) as shown in B16 in Fig. 12. Then, the time interval count is reset and starts from 0, and the time correction enabled flag is cleared as shown in B18, disabling time correction (steps S54 and S55).

[0058] As described above, the real-time clock device 20 of this embodiment includes, as shown in FIGS. 1, 5, and 11, an input terminal TPRF to which a time reference pulse signal PRF is input, an oscillation circuit 60 that outputs an oscillation clock signal CK, a timekeeping counting circuit 70 that generates internal time information based on the oscillation clock signal CK, and a processing circuit 40. When the processing circuit 40 determines that a time discrepancy has occurred in the internal time when the reference pulse signal PRF was input, it performs frequency correction of the oscillation clock signal CK and time correction of the internal time based on the amount of time discrepancy and the time interval of the time discrepancy. For example, in FIG. 6, when the processing circuit 40 determines that a time discrepancy has occurred as shown at A9, it performs frequency correction of the oscillation clock signal CK as shown at A10 and time correction as shown at A14. Also in FIG. 12, when the processing circuit 40 determines that a time discrepancy has occurred as shown at B11, it performs frequency correction as shown at B12 and time correction as shown at B16. Note that the time correction may be performed at the next input timing of the reference pulse signal PRF after the frequency correction. The frequency correction of the oscillation clock signal CK is performed based on the time lag amount TE shown at A9 in Fig. 6 and B11 and B7 in Fig. 12, and the time interval TI of the time lag measured by, for example, time interval counting at A6 and A11 in Fig. 6 and B9 and B13 in Fig. 12. For example, a frequency offset is calculated based on the time lag amount TE and the time interval TI of the time lag, and the oscillation frequency of the oscillation circuit 60 is adjusted based on this frequency offset, thereby performing the frequency correction of the oscillation clock signal CK.

[0059] As described above, in this embodiment, an input terminal TPRF for the reference pulse signal PRF is provided. A determination is made as to whether a time discrepancy has occurred in the internal time at the timing of input of the reference pulse signal PRF to this input terminal TPRF. If a time discrepancy is determined to have occurred, frequency correction of the oscillation clock signal CK and time correction of the internal time are performed. This results in time correction to update the internal time to the correct time and frequency correction to bring the frequency error closer to zero. That is, the RTC's internal frequency offset is estimated and corrected based on the time information within the RTC at the timing the reference pulse signal PRF is input. This suppresses timekeeping count errors caused by offset deviations in the oscillation frequency due to aging, enabling the provision of highly accurate time. Therefore, a real-time clock device 20 can be provided that can provide accurate time information and maintain time accuracy. For example, by incorporating a correction function into a single-package RTC module, highly accurate time can be provided with a small size and low power consumption.

[0060] The processing circuit 40 also determines whether a time discrepancy has occurred by, for example, comparing the internal time at a first input timing of the reference pulse signal PRF with the internal time at a second input timing of the reference pulse signal PRF after the first input timing. For example, in B5 of FIG. 12, a time discrepancy is determined by comparing the internal time at the first input timing of the reference pulse signal PRF with the internal time at the second input timing in units of less than a second. The time comparison in units of less than a second is, for example, a time comparison in units of a millisecond, corresponding to the minimum resolution, in B5. This time comparison can be achieved, for example, by comparing the count values ​​of a 1-millisecond counter. Since a discrepancy in the internal time of less than a second is detected in B11 and B7, it is determined that a discrepancy in the internal time has occurred, and frequency correction in B12 and time correction in B16 are performed.

[0061] In this way, by comparing the internal times at each input timing of the reference pulse signal PRF, it becomes possible to determine a time deviation in the internal time. Note that instead of comparing the internal time at the first input timing of the reference pulse signal PRF with the internal time at the second input timing, it may be determined that a time deviation in the internal time has occurred when a predetermined digit less than a second (for example, a digit of one millisecond) has changed, as shown at A9 in FIG.

[0062] Furthermore, after the frequency correction has been performed, the processing circuit 40 performs time correction of the internal time at the timing when the reference pulse signal PRF is next input. For example, in FIG. 6, at the kth input timing (k is an integer greater than or equal to 1) of the reference pulse signal PRF, it is determined that a time deviation has occurred as shown in A9, and frequency correction of the oscillation clock signal CK is performed as shown in A10. Then, at the next k+1th input timing of the reference pulse signal PRF, time correction of the internal time is performed as shown in A14. Similarly, in FIG. 12, at the kth input timing of the reference pulse signal PRF, it is determined that a time deviation has occurred as shown in B11, and frequency correction of the oscillation clock signal CK is performed as shown in B12. Then, at the next k+1th input timing of the reference pulse signal PRF, time correction of the internal time is performed as shown in B16.

[0063] This allows for more accurate time correction than when both frequency correction and time correction are performed during the period corresponding to the input timing of the reference pulse signal PRF. For example, at the kth input timing of the reference pulse signal PRF, a calculation period is required from detecting a time deviation in the internal time until frequency correction is completed. Therefore, if time correction is performed after this calculation period has elapsed, accurate time correction may not be possible. In this regard, if the internal time is corrected at the next input timing of the reference pulse signal PRF after frequency correction, time correction can be performed in a short time at the k+1th input timing of the reference pulse signal PRF, allowing for more accurate time correction.

[0064] Furthermore, the processing circuit 40 may not perform frequency correction when it is determined that a time difference has occurred the first time, but may perform frequency correction when it is determined that the time difference has occurred the second time. For example, in Fig. 12, when a time difference has occurred the first time, as shown at B6 and B7, frequency correction is not performed, but when a time difference has occurred the second time, as shown at B10 and B11, frequency correction is performed as shown at B12.

[0065] In this way, the time interval TI of the time lag can be accurately measured, and the frequency of the oscillation clock signal CK can be corrected using the more accurate time interval TI. For example, depending on the type of reference pulse signal PRF, the accuracy of subseconds at the input timing of the reference pulse signal PRF may be low, for example, digits below 000 may not be zero, as shown by B5 in FIG. 12. Therefore, if the time interval TI of the time lag is measured in such a case as shown by A6 and A11 in FIG. 6, the accuracy of the time interval TI may be low, and the accuracy of the frequency correction may also be low. In this regard, in FIG. 12, when it is determined that a time lag has occurred the first time as shown by B6 and B7, frequency correction is not performed. However, when it is determined that a time lag has occurred the second time as shown by B10 and B11, frequency correction is performed as shown by B12. Therefore, the time interval TI of the time lag used for this frequency correction can be accurately measured. For example, the difference between the first time deviation shown in B7 and the second time deviation shown in B11 is exactly 1 millisecond, which is the minimum resolution of the time accuracy, so the time interval during which this 1 millisecond time deviation occurs can be accurately measured by the time interval counts in B9 and B13. Therefore, this accurate time interval TI can be used to calculate the frequency offset FOF = time deviation amount / time interval = TE / TI, making it possible to achieve highly accurate frequency correction even when the time accuracy of the reference pulse signal PRF is low.

[0066] The time interval TI of the time lag is, for example, the time interval from when time correction is performed until the next time lag is detected. For example, in FIG. 6, time correction is performed at the ith input timing of the reference pulse signal PRF as shown in A5, and counting of the time interval of the time lag begins as shown in A6. Then, when it is determined that a time lag has occurred at the jth input timing of the reference pulse signal PRF (i, j are integers such that j>i) as shown in A9, the time interval TI of the time lag is calculated from the count value of the time interval as shown in A11. In this way, the time interval TI of the time lag is the time interval from when time correction is performed as shown in A5 until the next time lag is detected as shown in A9. In this way, the period from when there is no time lag until when a time lag occurs can be used as the time interval of the time lag, and frequency correction of the oscillation clock signal CK can be achieved.

[0067] As shown in FIGS. 5 and 11 , the timekeeping counting circuit 70 includes a first counter 73 that counts hours, minutes, and seconds, and a second counter 74 that counts fractional seconds. For example, the first counter 73 is configured with counters that count hours, minutes, and seconds, and the second counter 74 is configured with a counter that counts fractional seconds, such as a millisecond counter. As described with reference to FIG. 9 , if the internal time is ahead of the time corresponding to the reference pulse signal PRF, the processing circuit 40 resets the count value of the second counter 74 during time correction. For example, the processing circuit 40 resets the count value of the millisecond counter. On the other hand, as described with reference to FIG. 10 , if the internal time is behind the time corresponding to the reference pulse signal PRF, the processing circuit 40 adds a value corresponding to one second to the count value of the first counter 73 and resets the count value of the second counter 74 during time correction. For example, the processing circuit 40 increments the count value of the second counter of the first counter 73 by one, and resets the count value of the millisecond counter of the second counter 74. In this way, whether the internal time is ahead or behind at the time the reference pulse signal PRF is input, time correction can be performed to set the count values ​​of the first counter 73 and the second counter 74 to the count values ​​corresponding to the hour.

[0068] 5 and 11, real-time clock device 20 includes an interface circuit 30 to which timestamp information TMS is input, and processing circuit 40 sets internal time information based on the timestamp information TMS. For example, at A1 and A2 in FIG. 6 and B1 and B2 in FIG. 12, the internal time of real-time clock device 20 is initially adjusted based on timestamp information TMS input from the outside via interface circuit 30. This time adjustment is achieved, for example, by setting the time represented by timestamp information TMS in the internal time register of real-time clock device 20.

[0069] In this way, time adjustments such as the initial time adjustment of real-time clock device 20 can be performed using externally input timestamp information TMS. After the time adjustment using such timestamp information TMS, the reference pulse signal PRF input via input terminal TPRF can be used to detect time discrepancies in the internal time and to correct the internal time and the frequency of oscillation clock signal CK. For example, after the initial time adjustment using timestamp information TMS, the internal time of real-time clock device 20 can be maintained accurately using only the input reference pulse signal PRF.

[0070] For example, if the processing circuit 40 determines that a time discrepancy has occurred after setting the internal time information based on the timestamp information TMS, it performs frequency correction and time correction. For example, in Fig. 6, time adjustment is performed at A1 and A2 by setting the internal time information based on the timestamp information TMS, and if it is determined that a time discrepancy has occurred at A9, frequency correction and time correction are performed as shown at A10 and A14. In Fig. 12, time adjustment is performed at B1 and B2 by setting the internal time information based on the timestamp information TMS, and if it is determined that a time discrepancy has occurred at B11 and B7, frequency correction and time correction are performed as shown at B12 and B16.

[0071] In this way, after the internal time is set using the timestamp information TMS, the input reference pulse signal PRF is used to detect time discrepancies, correct the frequency of the oscillation clock signal CK, and correct the internal time, thereby making it possible to maintain the internal time set using the timestamp information TMS at an accurate time.

[0072] Note that various modifications of this embodiment are possible. For example, automatic time correction may not be performed, and only frequency correction may be performed. Time correction may be performed by, for example, writing appropriate time information separately from the reference pulse signal. Furthermore, the internal time can also be updated (corrected) by detecting the end of serial communication, such as SPI or I2C, performed by the interface circuit. For example, in the case of SPI, the falling edge of the CE signal (chip enable signal) can be detected, and in the case of I2C, the detection of a STOP condition or repeated start condition can be used. This allows time updating without using a 1PPS signal when high accuracy in time synchronization is not required.

[0073] As described above, the real-time clock device of this embodiment includes an input terminal to which a time reference pulse signal is input, an oscillation circuit that outputs an oscillation clock signal, and a timekeeping count circuit that generates internal time information based on the oscillation clock signal.The real-time clock device also includes a processing circuit that, if it determines that a time deviation has occurred in the internal time when the reference pulse signal is input, performs frequency correction of the oscillation clock signal and time correction of the internal time based on the amount of time deviation and the time interval of the time deviation.

[0074] According to this embodiment, a determination is made as to whether or not a time discrepancy has occurred in the internal time at the input timing of the reference pulse signal input to the input terminal, and if a time discrepancy is determined to have occurred, frequency correction of the oscillation clock signal and time correction of the internal time are performed. This results in time correction that updates the internal time to the correct time, as well as frequency correction that brings the frequency error closer to zero. This makes it possible to provide a real-time clock device that can provide accurate time information and maintain time precision.

[0075] In addition, in this embodiment, the processing circuit may determine whether a time discrepancy has occurred by comparing the internal time at the first input timing of the reference pulse signal with the internal time at the second input timing of the reference pulse signal after the first input timing.

[0076] In this way, by comparing the internal times of the respective input timings of the reference pulse signals, it becomes possible to determine the time deviation of the internal times.

[0077] In this embodiment, the processing circuit may also correct the internal time at the timing when the reference pulse signal is next input after the frequency correction has been performed.

[0078] In this way, more accurate time correction can be achieved than when both frequency correction and time correction are performed during the period corresponding to the input timing of the reference pulse signal.

[0079] In this embodiment, the processing circuit may not perform frequency correction when it determines that a time difference has occurred the first time, but may perform frequency correction when it determines that a time difference has occurred the second time.

[0080] In this way, it becomes possible to accurately measure the time interval of the time difference and correct the frequency of the oscillation clock signal using the more accurate time interval.

[0081] In this embodiment, the time interval of the time difference may be the time interval from when the time correction is performed until the next time a time difference is detected.

[0082] In this way, the period from when there is no time lag until when a time lag occurs is regarded as the time interval of the time lag, and it becomes possible to achieve frequency correction of the oscillation clock signal.

[0083] In this embodiment, the timekeeping counting circuit may include a first counter that counts hours, minutes, and seconds, and a second counter that counts fractions of a second. If the internal time is ahead of the time corresponding to the reference pulse signal, the processing circuit may reset the count value of the second counter during time correction. If the internal time is behind the time corresponding to the reference pulse signal, the processing circuit may add a value corresponding to one second to the count value of the first counter and reset the count value of the second counter during time correction.

[0084] In this way, whether the internal time is ahead or behind at the time the reference pulse signal is input, time correction can be performed to set the count values ​​of the first counter and the second counter to the count values ​​corresponding to the hour.

[0085] This embodiment may also include an interface circuit to which timestamp information is input, and the processing circuit may set internal time information based on the timestamp information.

[0086] In this way, it becomes possible to synchronize the time of the real-time clock device using time stamp information input from an external source.

[0087] In this embodiment, the processing circuit may perform frequency correction and time correction if it determines that a time discrepancy has occurred after the internal time information has been set based on the time stamp information.

[0088] In this way, the internal time set by the time stamp information can be maintained accurately.

[0089] Although the present embodiment has been described in detail above, those skilled in the art will readily understand that many modifications are possible without substantially departing from the novel features and advantages of the present disclosure. Therefore, all such modifications are intended to be included within the scope of the present disclosure. For example, a term described at least once in the specification or drawings together with a different term having a broader or equivalent meaning may be replaced with that different term anywhere in the specification or drawings. Furthermore, all combinations of the present embodiment and modifications are also included within the scope of the present disclosure. Furthermore, the configuration and operation of the real-time clock device are not limited to those described in the present embodiment, and various modifications are possible. [Explanation of symbols]

[0090] 5...Package, 10...Oscillator, 20...Real-time clock device, 30...Interface circuit, 40...Processing circuit, 42...Time lag calculation unit, 43...Reference pulse input time register, 44...Time comparison and judgment unit, 46...Time interval timing unit, 47...Time interval counter, 48...Time interval register, 50...Frequency offset calculation unit, 52...Frequency adjustment circuit, 56...Internal time register, 60...Oscillator circuit, 70...Time count circuit, 72...Time counter, 73...First counter, 74...Second counter, 78...Divider circuit, CK...Oscillation clock signal, CKD...Divided clock signal, CP...Count pulse, FOF...Frequency offset, PRF...Reference pulse signal, SCT...Detection signal, SFC...Frequency control signal, TCT...Count value, TE...Time lag amount, TI...Time interval, TM, TM1, TM2...Internal time, TMQ...Time information, TMS...Time stamp information, TPRF...Input terminal

Claims

1. an input terminal to which a time reference pulse signal is input; an oscillation circuit that outputs an oscillation clock signal; a time count circuit that generates internal time information based on the oscillation clock signal; a processing circuit that, when it is determined that a time deviation has occurred in the internal time when the reference pulse signal is input, performs frequency correction of the oscillation clock signal and time correction of the internal time based on the amount of time deviation and the time interval of the time deviation; 1. A real-time clock device comprising:

2. 2. The real-time clock device according to claim 1, The processing circuitry A real-time clock device characterized by determining whether or not a time discrepancy has occurred by comparing the internal time at a first input timing of the reference pulse signal with the internal time at a second input timing of the reference pulse signal after the first input timing.

3. 2. The real-time clock device according to claim 1, The processing circuitry a real-time clock device that performs the time correction of the internal time at the timing when the reference pulse signal is next input after the frequency correction has been performed;

4. 2. The real-time clock device according to claim 1, The processing circuitry This real-time clock device is characterized in that when it is determined that the time difference has occurred the first time, the frequency correction is not performed, and when it is determined that the time difference has occurred the second time, the frequency correction is performed.

5. 2. The real-time clock device according to claim 1, A real-time clock device, wherein the time interval of the time difference is the time interval from when the time correction is performed until the next time the time difference is detected.

6. 2. The real-time clock device according to claim 1, The time count circuit a first counter that counts hours, minutes, and seconds; a second counter that counts fractional seconds; Including, The processing circuitry If the internal time is ahead of the time corresponding to the reference pulse signal, resetting the count value of the second counter in the time correction; A real-time clock device characterized in that, when the internal time is behind the time corresponding to the reference pulse signal, in the time correction, a value corresponding to one second is added to the count value of the first counter and the count value of the second counter is reset.

7. 2. The real-time clock device according to claim 1, an interface circuit into which time stamp information is input; The processing circuitry a real-time clock device that sets the internal time information based on the timestamp information;

8. 8. The real-time clock device according to claim 7, The processing circuitry A real-time clock device characterized in that after the internal time information is set based on the timestamp information, if it is determined that the time deviation has occurred, the frequency correction and the time correction are performed.

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