Quantum computer system, quantum information processing method and quantum information processing program

Abstract

To provide a quantum computer system, quantum information processing method and quantum information processing program capable of improving reliability for execution results of a quantum circuit.SOLUTION: A quantum computer system according to an embodiment has a first execution unit, a storage unit, a second execution unit, and a determination unit. The first execution unit executes a first quantum circuit in a first phase, where the first quantum circuit is used as a control for a second quantum circuit to be determined. The storage unit stores an execution result of the first quantum circuit in the first phase. The second execution unit executes the first quantum circuit and a second quantum circuit in a second phase after the first phase. The determination unit determines the reliability of the execution result of the second quantum circuit based on a comparison between the execution result of the first quantum circuit in the first phase and the execution result of the first quantum circuit in the second phase.SELECTED DRAWING: Figure 6

Description

[Technical Field]

[0001] The present invention relates to a quantum computer system, a quantum information processing method, and a quantum information processing program. Regarding. [Background technology]

[0002] Quantum circuit execution using NISQ (Noisy Intermediate-Scale Quantum) devices, which are noisy intermediate-scale quantum computers, has been proposed. One example of quantum circuit execution is the training and inference of machine learning models (hereinafter referred to as quantum machine learning models) that include quantum circuits. Here, if the noise state of a device during training differs from the noise state of a device during inference, the reliability of the execution results of the quantum circuit is reduced, and sufficient accuracy of training and / or inference cannot be achieved. This is due to the fact that the noise state differs for each device and that the noise state of each device changes from moment to moment.

[0003] For example, when using NISQ devices provided by cloud services, different devices may be assigned for training and inference depending on factors such as congestion. Due to individual differences in devices, the noise conditions will differ for different devices. Furthermore, if a model is trained using training data in advance, and then inference is performed using the trained model after some time has passed, the noise conditions will differ even when the same device is used for training and inference due to the passage of time. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Special Publication No. 2022-522101 Summary of the Invention [Problem to be solved by the invention]

[0005] The problem to be solved by the present invention is to provide a quantum computer system, a quantum information processing method, and a quantum information processing program that can increase the reliability of the execution results of a quantum circuit. [Means for solving the problem]

[0006] A quantum computer system according to an embodiment includes a first execution unit, a storage unit, a second execution unit, and a determination unit. The first execution unit executes a first quantum circuit in a first phase, and the first quantum circuit is used as a control for a second quantum circuit to be determined. The storage unit stores an execution result of the first quantum circuit in the first phase. The second execution unit executes the first quantum circuit and the second quantum circuit in a second phase subsequent to the first phase. The determination unit determines the reliability of the execution result of the second quantum circuit based on a comparison between the execution result of the first quantum circuit in the first phase and the execution result of the first quantum circuit in the second phase. [Brief explanation of the drawings]

[0007] [Figure 1] FIG. 1 is a diagram showing an example of the configuration of a quantum computer system according to an embodiment of the present invention; [Figure 2] FIG. 1 is a diagram showing an example of the configuration of a classical computer according to a first embodiment. [Figure 3] Diagram showing an example of the configuration of the first quantum machine learning model [Figure 4] Diagram showing an example of the configuration of the second quantum machine learning model [Figure 5] FIG. 1 is a diagram showing a flow of reliability determination processing according to the first embodiment; [Figure 6] FIG. 6 is a diagram schematically illustrating the reliability determination process shown in FIG. 5. [Figure 7] FIG. 6 is a diagram showing an example of a display screen of the determination result in step SA8 of FIG. 5. [Figure 8] FIG. 10 is a diagram showing an example of the configuration of a classical computer according to a second embodiment. [Figure 9] A diagram showing an example of a list [Figure 10] FIG. 10 is a diagram showing a flow of a training phase of a reliability determination process according to the second embodiment. [Figure 11] FIG. 10 is a diagram showing a flow of an inference phase of a reliability determination process according to a second embodiment. [Figure 12] FIG. 11 is a diagram showing the flow of the inference phase of the screening process of the quantum computer according to the third embodiment. [Figure 13] A diagram showing a mapping pattern [Figure 14] FIG. 13 is a diagram showing the flow of the inference phase of the screening process of the quantum bit map according to the fourth embodiment. [Figure 15] An example of a heatmap of test accuracy [Figure 16] Another example of a heatmap of test accuracy DETAILED DESCRIPTION OF THE INVENTION

[0008] Hereinafter, a quantum computer system, a quantum information processing method, and a quantum information processing program according to this embodiment will be described with reference to the drawings.

[0009] FIG. 1 is a diagram showing an example of the configuration of a quantum computer system 100 according to this embodiment. As shown in FIG. 1, the quantum computer system 100 has a classical computer 1 and N quantum computers 2-i (1≦i≦N). The classical computer 1 and the N quantum computers 2-i communicate data with each other via a network. The number N of quantum computers may be 1 or more. Although only one classical computer 1 is shown in FIG. 1, two or more classical computers 1 may be included in the quantum computer system 100.

[0010] As an example, the quantum computer system 100 is assumed to be a network system in which a classical computer 1 utilizes N quantum computers 2-i provided via the cloud. In this case, the classical computer 1 transmits data of a quantum circuit to be executed to the quantum computer 2-i. The quantum circuit data is assumed to be data of the circuit diagram and / or program code of the quantum circuit. The quantum computer 2-i is a noisy intermediate-scale quantum (NISQ) device, which is a noisy intermediate-scale quantum computer. The multiple quantum computers 2-i may have different noise characteristics. The quantum computer 2-i is equipped with hardware such as qubits and quantum gates for executing the quantum circuit (hereinafter referred to as quantum hardware) and a control computer for controlling the quantum hardware. The quantum hardware may be implemented using superconducting circuits, ion traps, quantum dots, optical lattices, or any other method. The control computer receives quantum circuit data from the classical computer 1 and converts the received quantum circuit data into a control sequence optimized for the quantum hardware of the quantum computer 2-i. Optimization items include conversion to primitive quantum circuits, scheduling of quantum gates, and mapping of qubits. The control computer then operates the quantum hardware according to the control sequence. This executes the target quantum circuit. The data resulting from the execution of the quantum circuit is sent from the control computer to the classical computer 1. The classical computer 1 uses the received execution results for various purposes.

[0011] (First embodiment) Fig. 2 is a diagram showing an example of the configuration of a classical computer 1 according to the first embodiment. As shown in Fig. 2, the classical computer 1 has a processor 11, a storage device 12, an input device 13, a display device 14, and a communication device 15. Transmission and reception of data and various signals between the processor 11, the storage device 12, the input device 13, the display device 14, and the communication device 15 is performed via a bus.

[0012] The processor 11 is an integrated circuit that controls the overall operation of the classical computer 1. For example, the processor 11 has a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), a DSP (Digital Signal Processor), and / or an FPU (Floating-Point Unit). The processor 11 may also have an internal memory and an I / O interface. The processor 11 executes various processes by interpreting and calculating programs stored in advance in the storage device 12 or the like. The processor 11 may also be implemented in part or in whole by hardware such as an ASIC (Application Specific Integrated Circuit) or an FPGA (Field Programmable Gate Array).

[0013] The storage device 12 is a volatile memory and / or a non-volatile memory that stores various data. For example, the storage device 12 stores data and setting values ​​used when the processor 11 executes various processes, data generated by various processes in the processor 11, etc. The storage device 12 is configured with a read-only memory (ROM), a random access memory (RAM), a hard disk drive (HDD), a solid state drive (SSD), an integrated circuit storage device, etc. The storage device 12 may also include a non-transitory computer-readable storage medium that stores a program executed by the processor 11.

[0014] The input device 13 accepts various operation inputs from an operator. Examples of the input device 13 that can be used include a keyboard, a mouse, various switches, a touchpad, and a touch panel display. An electrical signal corresponding to the accepted operation input (hereinafter referred to as an operation signal) is supplied to the processor 11.

[0015] The display device 14 displays various data under the control of the processor 11. A CRT (Cathode-Ray Tube) display, a liquid crystal display, an organic EL (Electro Luminescence) display, an LED (Light-Emitting Diode) display, a plasma display, or any other display may be used as appropriate as the display device 14. The display device 14 may also be a projector.

[0016] The communication device 15 includes a communication interface such as a network interface card (NIC) for performing data communication with various devices connected to the classical computer 1 via a network. Note that an operation signal may be supplied from a computer connected via the communication device 15 or an input device provided in the computer, and various data may be displayed on a display device or the like provided in the computer connected via the communication device 15. However, for the sake of simplicity in the following explanation, unless otherwise specified, it is assumed that the source of the operation signal is the input device 13 and the display destination of the various data is the display device 14. The input device 13 can be replaced by a computer connected via the communication device 15 or an input device provided in the computer, and the display device 14 can be replaced by a display device or the like provided in the computer connected via the communication device 15.

[0017] The classical computer 1 does not need to include all of the processor 11, storage device 12, input device 13, display device 14, and communication device 15. If necessary, some of the storage device 12, input device 13, display device 14, and communication device 15 may be omitted. The classical computer 1 may also be provided with any additional hardware device useful for executing the processing according to this embodiment. The classical computer 1 does not need to be physically composed of a single computer, but may be composed of a computer system having multiple computers communicably connected via wires, a network, or the like. The allocation of the series of processing according to this embodiment to the multiple processors 11 implemented in each of the multiple computers can be set arbitrarily. All of the processors 11 may execute all processing in parallel, or specific processing may be assigned to one or some of the processors 11, and the series of processing according to this embodiment may be executed by the entire computer system.

[0018] As shown in FIG. 2, the processor 11 has a first execution unit 111, a second execution unit 112, a determination unit 113, and a display control unit 114 as functional components.

[0019] The first execution unit 111 executes a first quantum circuit in a first phase. The first quantum circuit is a quantum circuit used as a control for the second quantum circuit to be judged. The execution result of the first quantum circuit in the first phase is stored in the storage device 12. More specifically, the first execution unit 111 executes the first quantum circuit via a first quantum computer among the multiple quantum computers 2-i. Specifically, the first execution unit 111 transmits data of the first quantum circuit to the first quantum computer. The first quantum computer converts the data of the first quantum circuit into a control sequence and operates quantum hardware in accordance with the control sequence. This executes the first quantum circuit via the first quantum computer.

[0020] The second execution unit 112 executes the first quantum circuit and the second quantum circuit in a second phase subsequent to the first phase. More specifically, the second execution unit 112 executes the first quantum circuit and the second quantum circuit simultaneously or sequentially via a first quantum computer among the multiple quantum computers 2-i or a second quantum computer different from the first quantum computer. Specifically, the second execution unit 112 transmits data of the first quantum circuit to the first quantum computer or the second quantum computer. The first quantum computer or the second quantum computer converts the data of the first quantum circuit into a control sequence and operates quantum hardware according to the control sequence. This executes the first quantum circuit via the first quantum computer or the second quantum computer. The second quantum circuit can also be executed via the first quantum computer or the second quantum computer in a similar manner.

[0021] The determination unit 113 determines the reliability of the execution result of the second quantum circuit based on a comparison between the execution result of the first quantum circuit in the first phase and the execution result of the first quantum circuit in the second phase. As an example, if the difference between the execution result of the first quantum circuit in the first phase and the execution result of the first quantum circuit in the second phase is greater than a threshold, the determination unit 113 determines that the execution result of the second quantum circuit is low. On the other hand, if the difference is smaller than the threshold, the determination unit 113 determines that the execution result of the second quantum circuit is high.

[0022] The display control unit 114 displays on the display device 14 the determination result of the determination unit 113 regarding the reliability of the execution result of the second quantum circuit.

[0023] An example of the operation of the quantum computer system 100 according to the first embodiment will be described below. Hereinafter, the first phase in which the first execution unit 111 executes the quantum circuit is assumed to be a phase in which a quantum machine learning model including a second quantum circuit is trained, and the second phase in which the second execution unit 112 executes the quantum circuit is assumed to be a phase in which inference is performed using the trained quantum machine learning model. During the training phase, the first execution unit 111 performs a training process on the quantum machine learning model including the second quantum circuit to optimize model parameters of the quantum machine learning model. During the inference phase, the second execution unit 112 executes the trained quantum machine learning model to which the optimized model parameters have been assigned. The determination unit 113 determines the reliability of the execution result of the second quantum circuit based on a comparison between the execution result of the first quantum circuit during the training phase and the execution result of the first quantum circuit during the inference phase.

[0024] Hereinafter, the first quantum circuit will be referred to as a quantum inspection circuit, and the second quantum circuit will be referred to as a quantum circuit to be judged or a quantum inference circuit. The quantum machine learning model according to this embodiment is assumed to be of the following two types.

[0025] 3 is a diagram showing an example configuration of a first quantum machine learning model 300. As shown in FIG. 3, the first quantum machine learning model 300 is a machine learning model that trains parameters that control quantum gates of a quantum circuit. Specifically, the first quantum machine learning model 300 has an encoding block 301, a parameterized quantum circuit 302, and a measuring device 303. The encoding block 301, the parameterized quantum circuit 302, and the measuring device 303 are processed by a quantum computer 2.

[0026] The encoding block 301 is denoted by U(x) and includes a sequence of quantum gates that encode input data x into a quantum bit |0>. The encoding block 301 encodes the input data x into a quantum bit |0> to generate an encoded quantum state. The parameterized quantum circuit 302 is denoted by U(θ) and includes a sequence of quantum gates to which a circuit parameter (training parameter) θ to be trained is assigned. The parameterized quantum circuit 302 performs quantum operations according to the training parameter θ on the encoded quantum state to generate an output quantum state. The measuring device 303 measures the output quantum state and outputs output data according to the measured output quantum state as the execution result. The training parameter θ is variable during training, but is fixed to the parameter optimized during training during inference.

[0027] FIG. 4 is a diagram showing an example configuration of a second quantum machine learning model 400. As shown in FIG. 4, the second quantum machine learning model 400 is a quantum reservoir model in which a quantum circuit of a quantum system and a linear layer of a classical system are connected. Specifically, the second quantum machine learning model 400 has an encoding block 401, a quantum circuit 402, a measuring device 403, and a classical linear layer 404. The quantum circuit 402 functions as a quantum reservoir unit, and the classical linear layer 404 functions as a readout unit. The encoding block 401, the quantum circuit 402, and the measuring device 403 are processed by the quantum computer 2, and the classical linear layer 404 is processed by the first execution unit 111 or the second execution unit 112 of the classical computer 1.

[0028] The encoding block 401, denoted by U(x), includes a sequence of quantum gates that encode input data x into a quantum bit |0>. The encoding block 401 encodes the input data x into a quantum bit |0> to generate an encoded quantum state. The quantum circuit 402, denoted by U(Θ), includes a sequence of quantum gates to which a fixed circuit parameter Θ is assigned. The circuit parameter Θ may be set to a random value or may be set to a value determined by an arbitrary algorithm, simulation, or the like. The quantum circuit 402 performs a quantum operation according to the circuit parameter Θ on the encoded quantum state to generate an output quantum state. The measuring device 403 measures the output quantum state and outputs measurement data according to the measured output quantum state. The measurement data is sent to the classical computer 1.

[0029] The classical linear layer 404 includes an artificial neural network including two or more fully connected layers to which network parameters (training parameters) Wi to be trained are assigned. The network layers forming the classical linear layer 404 are not limited to fully connected layers, and may include other network layers such as convolutional layers, pooling layers, and normalization layers. The first execution unit 111 or the second execution unit 112 of the classical computer 1 inputs measurement data to the classical linear layer 404, performs propagation processing according to the training parameters Wi to convert the data into output data, and outputs the output data as the execution result.

[0030] Next, a process for determining the reliability of the execution result of the second quantum circuit by the quantum computer system 100 according to the first embodiment will be described.

[0031] Fig. 5 is a diagram showing the flow of the reliability determination process according to the first embodiment, and Fig. 6 is a diagram showing a schematic diagram of the reliability determination process shown in Fig. 5. The reliability determination process shown in Fig. 5 is started when the processor 11 reads out the quantum information processing program from the storage device 12 and executes it.

[0032] As shown in FIG. 5, first, the first execution unit 111 executes the quantum check circuit 502 (step SA1). In step SA1, the first execution unit 111 executes the quantum check circuit 502 via the quantum computer 2-K. It is assumed that the quantum computer 2-K has been assigned to the classical computer 1 in advance, taking into account congestion and other factors. The circuit configuration of the quantum check circuit 502 is not particularly limited and is assumed to be prepared in advance. Note that in FIG. 6, the quantum check circuit 502 is assumed to be a quantum circuit consisting only of a quantum system without a classical linear layer. Predetermined input data is input to the quantum check circuit 502, and the execution of the quantum check circuit 502 outputs a training execution result 503. The training execution result 503 is supplied to the classical computer 1.

[0033] When step SA1 is performed, the storage device 12 stores the training execution results 503 output in step SA1 (step SA2).

[0034] After step SA2 is performed, the first execution unit 111 trains the quantum circuit (unlearned circuit) 501 to be judged (step SA3). In step SA3, the first execution unit 111 trains the unlearned circuit 501 via the quantum computer 2-K. The unlearned circuit 501 is assumed to be a parameterized quantum circuit to which a training parameter θ is assigned, as shown in FIG. 3. In the case of supervised learning, for a training data set including an input x and a correct output y of training data, the input x is input to the unlearned circuit 501, a quantum operation according to the training parameter θ is performed to output a predicted output y', and the training parameter θ is optimized based on the difference between the correct output y and the predicted output y'. An optimized training parameter Θ is output as a result of training. The optimized training parameter Θ is supplied to the classical computer 1. This completes the training phase.

[0035] After the training phase is completed, the next phase is the inference phase. The inference phase is assumed to start several hours or days after the training phase, but it is not excluded that the inference phase may start immediately after the training phase.

[0036] After step SA3 is performed, the second execution unit 112 executes the quantum check circuit 505 (step SA4). In step SA4, the first execution unit 111 executes the quantum check circuit 502 via the quantum computer 2-L. ​​The quantum computer 2-L may be the same as the quantum computer 2-K, but is assumed to be a different quantum computer from the quantum computer 2-K. The quantum computer 2-L is assumed to have been assigned to the classical computer 1 in advance, taking into account congestion and other factors. The quantum check circuit 505 is assumed to have a circuit configuration that is logically identical to that of the quantum check circuit 502 used during training. The same input data as in step SA1 is input to the quantum check circuit 502, and the execution of the quantum check circuit 505 outputs a training execution result 507. The training execution result 507 is supplied to the classical computer 1.

[0037] After step SA4 is performed, the storage device 12 saves the inference execution result 507 output in step SA4 (step SA5). Because the inference process is performed some time after the training process, the noise state of the quantum computer 2-K at the time of training may differ from the noise state of the quantum computer 2-L at the time of inference. For this reason, the values ​​of the inference execution result 507 and the training execution result 503 may differ.

[0038] After step SA5 is performed, the second execution unit 112 executes the target quantum circuit (trained circuit) 504 (step SA6). In step SA6, the second execution unit 112 assigns an optimized training parameter Θ to the trained circuit 504, inputs an inference input x to the trained circuit 504, executes a quantum operation according to the optimized training parameter Θ, and outputs an inference result 506.

[0039] When step SA6 is performed, the determination unit 113 determines the reliability of the inference result 506 of the trained circuit 504 based on a comparison between the training execution result 503 saved in step SA2 and the inference execution result 507 saved in step SA5 (step SA7). Specifically, the determination unit 113 compares the difference between the training execution result 503 and the inference execution result 507 with a threshold. The threshold may be set to a value that ensures sufficient inference accuracy of the inference result 506 between the noise state of the quantum computer 2-K at the time of training and the noise state of the quantum computer 2-L at the time of inference. If the difference is greater than the threshold, the determination unit 113 determines that the reliability of the inference result 506 is low because the noise state of the quantum computer 2-K at the time of training and the noise state of the quantum computer 2-L at the time of inference are significantly different. More specifically, if the noise state is significantly different between training and inference, there is no guarantee that the learned parameters optimized during training are also optimized during inference, and as a result, the reliability of the inference result can be said to be low. On the other hand, if the difference is smaller than the threshold, the determination unit 113 determines that the noise state of the quantum computer 2-K during training and the noise state of the quantum computer 2-L during inference are not significantly different, and therefore the reliability of the inference result 506 is high. More specifically, if the noise state is not significantly different between training and inference, it can be said that the learned parameters optimized during training are also optimized during inference, and as a result, the reliability of the inference result can be said to be high.

[0040] If it is determined that the reliability is high (step SA8: YES), the determination unit 113 outputs the inference result 506 output in step SA6 (step SA9). If it is determined that the reliability is low (step SA8: NO), the determination unit 113 rejects the inference result 506 output in step SA6 (step SA10). By outputting the inference result 506 with high reliability and rejecting the inference result 506 with low reliability in this way, it is possible to ensure the reliability of the inference result 506. Furthermore, because only the inference result 506 with high reliability is output, the accuracy of post-processing using the inference result 506 is improved.

[0041] The determination result of step SA8 may be displayed on the display device 14. Fig. 7 is a diagram showing an example of a display screen I1 of the determination result of step SA8. The determination result in Fig. 7 illustrates a determination result when the reliability of the inference result 506 is low (step SA8: NO). As shown in Fig. 7, the display screen I1 includes a display field I11 for the quantum computer during training, a display field I12 for the quantum computer during inference, a display field I13 for the difference result, and a display field I14 for the determination result.

[0042] Display field I11 displays the identifier of the quantum computer used during training, such as "Quantum Computer "K"." Display field I12 displays the identifier of the quantum computer used during inference, such as "Quantum Computer "L"." This allows the user to understand the quantum computers used during training and inference. Display field I13 displays a symbol, such as "XX > Threshold," indicating the magnitude relationship of the threshold for the difference between the training execution result 503 and the inference execution result 507. Display field I14 displays a character string indicating the reliability judgment result for the inference result 506, such as "Low reliability. Inference result discarded." The judgment result can also be displayed when the reliability of the inference result 506 is high (step SA8: YES). Displaying the reliability judgment result for the inference result 506 in this way allows the user to judge whether the inference result 506 is good or bad, and to know whether the inference result 506 should be adopted or rejected. Furthermore, displaying the magnitude relationship of the threshold for the difference allows the user to understand the basis for the judgment result.

[0043] When step SA9 or SA10 is performed, the reliability determination process according to the first embodiment ends.

[0044] 5 is an example, and various elements can be added, deleted, and / or changed. As an example, the order of executing and saving the quantum test circuit (SA4 and SA5) and executing the learned circuit (SA6) can be reversed.

[0045] According to the first embodiment, it is possible to determine the reliability of the inference result of the quantum circuit (quantum inference circuit) to be judged based on the difference between the execution result of the quantum test circuit during training and the execution result during inference. For example, if the noise state of the quantum computer is different during training and inference, the difference will be large, and the inference result will be rejected as being low in reliability. However, if the noise state is approximately the same, the difference will be small, and the inference result will be adopted as being high in reliability. This makes it possible to increase the reliability of the inference result of the quantum circuit to be judged.

[0046] (Second embodiment) In the operation of a quantum machine learning model, it is assumed that inference processing is performed sequentially on multiple input data. A quantum computer system according to the second embodiment will be described below. In the following description, components having substantially the same functions as those in the first embodiment will be assigned the same reference numerals, and redundant descriptions will be provided only when necessary.

[0047] Fig. 8 is a diagram showing an example of the configuration of a classical computer 1 according to the second embodiment. As shown in Fig. 8, the processor 11 has, as its functional configuration, a first execution unit 111, a second execution unit 112, a determination unit 113, a display control unit 114, and a list creation unit 115.

[0048] The list creation unit 115 creates a list that records the execution order of the first quantum circuit (quantum inspection circuit) and the second quantum circuit (quantum inference circuit) in the second phase. Specifically, the list creation unit 115 creates a list in which a plurality of quantum inference circuits corresponding to a plurality of input data are recorded in accordance with the execution order, and in which a quantum inspection circuit corresponding to a predetermined input data is recorded in a predetermined order. The second execution unit 112 executes the quantum inspection circuit and the quantum inference circuit according to the list created by the list creation unit 115.

[0049] FIG. 9 is a diagram showing an example of the list. In FIG. 9, "inspection" represents the execution of the quantum inspection circuit, and "inference" represents the execution of the quantum inference circuit. As shown in FIG. 9, three types of patterns are possible for the execution order of the quantum inspection circuit and the quantum inference circuit. Here, the quantum inference circuit is assumed to be the trained circuit according to the first embodiment, as an example.

[0050] In pattern 1, the "predetermined order" in which the quantum inspection circuit is executed is the beginning P11 and the end P12 of the list, and the quantum inference circuit is executed between the beginning P11 and the end P12. The determination unit 113 determines the reliability of the execution result (inference result) of the quantum inference circuit executed between the beginning P11 and the end P12 based on a comparison between the execution result of the quantum inspection circuit during training (training execution result) and the execution result of the quantum inspection circuit at the beginning P11 (first inference execution result), and a comparison between the execution result of the quantum inspection circuit during training (training execution result) and the execution result of the quantum inspection circuit at the end P12 (second inference execution result). Specifically, if the difference between the training execution result and the first inference execution result is smaller than a threshold and the difference between the training execution result and the second inference execution result is smaller than a threshold, the determination unit 113 determines that the reliability of the inference result is high. Otherwise, the determination unit 113 determines that the reliability of the inference result is low.

[0051] According to Pattern 1, the execution results of the quantum inspection circuits at the beginning and end of the list are used to determine the reliability of the inference results made between the beginning and end. This makes it possible to appropriately determine the reliability of the inference results even when the execution time of the list is long and there is a high probability that the noise state of the quantum computer will change between the beginning and end of the list.

[0052] In pattern 2, the "predetermined order" in which the quantum inspection circuit is executed is set in the list at a predetermined interval P20, and the quantum inference circuit is executed within the predetermined interval P20. The determination unit 113 determines the reliability of the execution result (inference result) of the quantum inference circuit executed within the predetermined interval P20 based on a comparison between the execution result of the quantum inspection circuit during training (training execution result) and the execution result of the quantum inspection circuit during a first period P21 (first inference execution result) and a comparison between the execution result of the quantum inspection circuit during training (training execution result) and the execution result of the quantum inspection circuit during a second period P22 following the first period P21 (second inference execution result). Note that, when focusing on the second predetermined interval P20, the first period is P22 and the second period is P23. The determination unit 113 determines that the reliability of the inference result is high if the difference between the training execution result and the first inference execution result is smaller than a threshold and the difference between the training execution result and the second inference execution result is smaller than a threshold. In other cases, the determining unit 113 determines that the reliability of the inference result is low.

[0053] Pattern 2 makes it possible to determine the reliability of inference results in a more detailed manner than Pattern 1.

[0054] In pattern 3, the "predetermined order" at which the quantum inspection circuit is executed is an arbitrary position P31 in the list, and the quantum inference circuit is executed at a position other than the arbitrary position. In FIG. 9, the arbitrary position P31 is set to the beginning of the list. The determination unit 113 determines the reliability of the execution results (inference results) of all the quantum inference circuits included in the list based on a comparison between the execution result of the quantum inspection circuit during training (execution result during training) and the execution result of the quantum inspection circuit at the arbitrary position P31 (execution result during inference), and based on the execution time of the entire list.

[0055] The execution time of the entire list is measured during the period P33 following the final inference P32 in the list. Because the noise state of a quantum computer can change from moment to moment, in pattern 3, the execution time of the entire list is used as an index for evaluating changes in the noise state of the quantum computer. If the difference between the execution result during training and the execution result during inference is smaller than a threshold and the execution time is smaller than a time threshold, the determination unit 113 determines that the reliability of the inference result is high. Otherwise, the determination unit 113 determines that the reliability of the inference result is low.

[0056] According to pattern 3, it is possible to reduce the number of times the quantum test circuit is executed compared to patterns 1 and 2, thereby reducing the load associated with the execution of the quantum test circuit while ensuring the reliability of the inference results.

[0057] Next, taking pattern 1 as an example, a process of determining the reliability of the execution result of the second quantum circuit by the quantum computer system 100 according to the second embodiment will be described. Note that the second quantum circuit is assumed to be a quantum inference circuit. The quantum inference circuit is assumed to be a quantum circuit with parameters.

[0058] Fig. 10 is a diagram showing a flow of a training phase of the reliability determination process according to the second embodiment. The reliability determination process shown in Fig. 10 is started when the processor 11 reads out the quantum information processing program from the storage device 12 and executes it.

[0059] As shown in FIG. 10, first, the first execution unit 111 executes the quantum check circuit 502 (step SB1). Step SB1 is similar to the processing content of step SA1. Predetermined input data is input to the quantum check circuit, and the execution of the quantum check circuit outputs a training execution result. The training execution result is supplied to the classical computer 1.

[0060] When step SB1 is performed, the storage device 12 stores the training execution results output in step SB1 (step SB2).

[0061] When step SB2 is performed, the first execution unit 111 updates the model parameters of the quantum inference circuit (step SB3). The first execution unit 111 evaluates the quantum inference circuit and determines whether to end the training of the model parameters (step SB4). For example, the training end condition can be set to when the number of updates of the model parameters reaches a predetermined number, when the difference between the output of the quantum inference circuit and the correct output is less than a threshold, or any other arbitrary condition.

[0062] If it is determined in step SB4 that the training of the model parameters is not to be ended (step SB4: NO), the first execution unit 111 updates the model parameters of the quantum inference circuit again (step SB3). The first execution unit 111 repeats updating the model parameters until it is determined in step SB4 that the training of the model parameters is to be ended.

[0063] If it is determined in step SB4 that the training of the model parameters is to be completed (step SB4: YES), the first execution unit 111 outputs the learned model parameters (learned parameters) (step SB5). The learned parameters are stored in the storage device 12.

[0064] This completes the training phase of the reliability determination process.

[0065] Fig. 11 is a diagram showing a flow of an inference phase of the reliability determination process according to the second embodiment. The reliability determination process shown in Fig. 11 is started when the processor 11 reads out the quantum information processing program from the storage device 12 and executes it.

[0066] First, the second execution unit 112 executes the quantum check circuit (step SC1). Step SC1 corresponds to the first check P11 of pattern 1 in FIG. 9. Step SC1 is similar to the processing content of step SA4. The same input data as in step SB1 is input to the quantum check circuit, and the first inference execution result is output by executing the quantum check circuit. The first inference execution result is supplied to the classical computer 1.

[0067] When step SC1 is performed, the second execution unit 112 reads out the learned parameters output in step SB5 from the storage device 12, and assigns the read learned parameters to the quantum inference circuit (step SC2).

[0068] After step SC2 is performed, the second execution unit 112 sets input data to the quantum inference circuit and executes the quantum inference circuit (step SC3). The execution of the quantum inference circuit outputs an inference result. The inference result is supplied to the classical computer 1 and stored in the storage device 12. In step SC3, the second execution unit 112 refers to the list created in advance by the list creation unit 115 and executes inference using the quantum inference circuit according to the execution order of the list. For example, input data is associated with the schedule frame of the inference to be executed in the list, and the second execution unit 112 reads out the input data associated with the schedule frame of the inference to be executed, inputs the input data to the quantum inference circuit, and outputs the inference result by executing the quantum inference circuit.

[0069] After step SC3 is performed, the second execution unit 112 determines whether inference has been performed for all input data (step SC4). Specifically, if all inferences stored in the list have not been performed (step SC4: NO), the second execution unit 112 determines that inference has not been performed for all input data, and executes the quantum inference circuit for the next input data (step SC3). The second execution unit 112 repeats steps SC3 and SC4 until it is determined that inference has been performed for all input data.

[0070] If it is determined in step SC4 that inference has been performed on all input data (step SC4: YES), the second execution unit 112 executes the quantum check circuit (step SC5). Step SC5 corresponds to the check P12 at the end of pattern 1 in FIG. 9. Step SC5 is similar to the processing content of step SC4. The same input data as in step SC1 is input to the quantum check circuit, and the execution of the quantum check circuit outputs a second inference execution result. The second inference execution result is supplied to the classical computer 1.

[0071] When step SC5 is performed, the determination unit 113 reads out the training execution results stored in step SB2 from the storage device 12 (step SC6).

[0072] When step SC6 is performed, the judgment unit 113 judges the reliability of the inference result of the quantum inference circuit based on the training execution result read out in step SC6, the first inference execution result output in step SC1, and the second inference execution result output in step SC5 (step SC7).

[0073] If it is determined in step SC7 that the reliability is high (step SC8: YES), the determination unit 113 outputs the inference result output in step SC3 (step SC9). If it is determined that the reliability is low (step SC8: NO), the determination unit 113 rejects the inference result output in step SC3 (step SC10). By outputting highly reliable inference results and rejecting less reliable inference results in this way, it is possible to ensure the reliability of the inference results. Furthermore, because only highly reliable inference results are output, the accuracy of post-processing using the inference results is improved.

[0074] This completes the inference phase of the reliability determination process.

[0075] 10 and 11 are merely examples, and various elements can be added, deleted, and / or changed. As an example, the processes shown in Fig. 10 and 11 may be performed according to pattern 2 or 3 in Fig. 9.

[0076] (Third embodiment) The quantum computer system 100 according to the third embodiment selects (screens) from among multiple quantum computers a quantum computer that is most likely to produce the most appropriate results because it has a noise state closest to that of the quantum computer used during training. The quantum computer system 100 according to the third embodiment will be described below. In the following description, components that have substantially the same functions as those in the first and second embodiments will be assigned the same reference numerals and will be described only when necessary.

[0077] The processor 11 of the classical computer 1 according to the third embodiment performs the screening process. The functional configuration of the processor 11 according to the third embodiment is the same as that of the second embodiment. The first execution unit 111 executes a first quantum circuit using a first quantum computer 2 in a first phase. The second execution unit 112 executes the first quantum circuit using multiple quantum computers 2 in a second phase. The determination unit 113 selects, from the multiple quantum computers 2, a quantum computer 2 that has the smallest difference between the execution result of the first quantum circuit in the first phase and the execution result of the first quantum circuit in the second phase, as the second quantum computer that executes the second quantum circuit. The second execution unit 112 executes the second quantum circuit using the selected second quantum computer 2 in the second phase.

[0078] The screening process according to the third embodiment will be described below. As in the second embodiment, the screening process is also divided into a training phase and an inference phase. The training phase of the screening process is the same as in the second embodiment, so its description will be omitted. The second quantum circuit is assumed to be a quantum inference circuit. The quantum inference circuit is assumed to be a quantum circuit with parameters.

[0079] Fig. 12 is a diagram showing the flow of the inference phase of the screening process of the quantum computer according to the third embodiment. The screening process of the quantum computer shown in Fig. 12 is started by the processor 11 reading and executing the quantum information processing program from the storage device 12. At the start of the screening process of the quantum computer, the processor 11 assigns the maximum value of a floating-point number to the variable min_diff, and assigns the value -1 to the variable qc_number, which assigns the quantum computer number with the smallest difference.

[0080] First, the second execution unit 112 selects an available, unselected quantum computer i (step SD1). For example, the second execution unit 112 selects any one quantum computer i from the N quantum computers available on the cloud at the start of step SD1.

[0081] After step SD1 is performed, the second execution unit 112 executes the quantum check circuit on the quantum computer i selected in step SD1 (step SD2). The execution of the quantum check circuit outputs an execution result during inference. The execution result during inference is supplied to the classical computer 1.

[0082] After step SD2 is performed, the determination unit 113 calculates the difference diff between the training execution result and the inference execution result output in step SD2 (step SD3).The determination unit 1113 then determines whether the calculated difference diff is smaller than the variable min_diff (step SD4).If it is determined that the difference diff is smaller than the variable min_diff (step SD4: YES), the determination unit 113 updates the quantum computer number qc_number to i and assigns the difference diff to the variable min_diff (step SD5).

[0083] If step SD5 has been performed or if it is determined in step SD4 that the difference diff is greater than the variable min_diff (step SD4: NO), the determination unit 113 determines whether or not all available quantum computers have been selected (step SD6).

[0084] If it is determined that all available quantum computers have not been selected (step SD6: NO), steps SD1 to SD6 are repeated. If it is determined that all available quantum computers have been selected (step SD6: YES), the second execution unit 112 selects the quantum computer corresponding to the quantum computer number qc_number (step SD7). The selected quantum computer 2 is closest in noise state to the quantum computer 2 used during training, and is therefore likely to produce the most appropriate results.

[0085] After step SD7 is performed, the second execution unit 112 executes the quantum inference circuit using the quantum computer selected in step SD7 (step SD8). The execution of the quantum inference circuit outputs an inference result. Since the inference result is the result of execution by the quantum computer selected in step SD7, it can be said that reliability is ensured.

[0086] Once step SD8 is performed, the screening process for the quantum computer is completed.

[0087] 12 is an example, and various elements can be added, deleted, and / or modified. As an example, the third embodiment described above is intended to be a scenario of training and inference of a quantum machine learning model, but is not limited to this. The present invention is also applicable to a scenario in which a specific quantum inference circuit (quantum inference circuit A) is executed as a second quantum circuit in a first phase, and another quantum inference circuit (quantum inference circuit B) is executed as the second quantum circuit in a second phase. In other words, when quantum inference circuit B is executed on a quantum computer having a noise state similar to the noise state when quantum inference circuit A is executed, the quantum computer can be screened.

[0088] (Fourth embodiment) The quantum computer system 100 according to the fourth embodiment selects (screens) from among a plurality of mapping patterns a mapping pattern that is most likely to produce the most appropriate results because it is closest to the noise state of the mapping pattern used during training. The quantum computer system 100 according to the fourth embodiment will be described below. In the following description, components having substantially the same functions as those in the first, second, and third embodiments will be assigned the same reference numerals and will be described only when necessary.

[0089] First, we will explain the mapping pattern. The mapping pattern represents the correspondence between the qubits used by the quantum circuit and the qubits implemented by the quantum computer (hereinafter referred to as physical qubits). A physical qubit refers to a qubit implemented as quantum hardware. The graph that represents the connection form between physical qubits is called a topology.

[0090] Fig. 13 is a diagram schematically illustrating a mapping pattern. As shown in Fig. 13, topology 603 is a graph representing the connection topology between physical quantum bits implemented by quantum computer 2. Each vertex of topology 603 corresponds to a physical quantum bit. The number of each vertex represents the number of the physical quantum bit. In other words, topology 603 represents the connection topology of 16 physical quantum bits.

[0091] When running four-qubit quantum circuits 601, 602 on a 16-qubit quantum computer 2 having topology 603, the four qubits of quantum test circuits 601, 602 must be assigned to one of 16 physical qubits. Because the noise characteristics of a quantum computer change depending on which physical qubits are used, maintaining the qubit mapping is important in quantum machine learning. For example, in FIG. 13 , the four qubits of quantum test circuit 601 and the four qubits of quantum circuit 602 included in the quantum machine learning model are both assigned to the first, second, third, and fifth physical qubits of topology 603.

[0092] However, even if the mapping pattern of quantum test circuit 601 and the mapping pattern of quantum circuit 602 included in the quantum machine learning model are made the same, the noise state changes from moment to moment, so the noise state is not necessarily the same. For this reason, it is necessary to screen the mapping pattern of quantum circuit 602 included in the quantum machine learning model that is closest to the noise state when quantum test circuit 601 is executed.

[0093] The processor 11 of the classical computer 1 according to the fourth embodiment performs the screening process. The functional configuration of the processor 11 according to the fourth embodiment is the same as that of the second embodiment. The first execution unit 111 executes the first quantum circuit using a first mapping pattern that represents a correspondence between the quantum bits used by the quantum circuit and the quantum bits implemented by the quantum computer. The second execution unit 112 executes the first quantum circuit using multiple mapping patterns. The determination unit 113 selects, from the multiple mapping patterns, a mapping pattern that produces the smallest difference between the execution result of the first quantum circuit in the first phase and the execution result of the first quantum circuit in the second phase as a second mapping pattern to be used in the execution of the second quantum circuit. The second execution unit 112 executes the second quantum circuit in the second phase using the selected second mapping pattern.

[0094] The following describes the screening process of a quantum bit map according to the fourth embodiment. A quantum bit map refers to a table or database data file that represents a mapping pattern. As with the second embodiment, the screening process of a quantum bit map is also divided into a training phase and an inference phase. The training phase of the screening process of a quantum bit map is the same as in the second embodiment, so a description thereof will be omitted.

[0095] Fig. 14 is a diagram showing the flow of the inference phase of the quantum bit map screening process according to the fourth embodiment. The quantum bit map screening process shown in Fig. 14 is started by processor 11 reading and executing a quantum information processing program from storage device 12. At the start of the quantum bit map screening process, processor 11 assigns the maximum value of a floating-point number to variable min_diff, and assigns -1 to variable qbit_map, which assigns the quantum bit map number with the smallest difference.

[0096] First, the second execution unit 112 selects an available unselected quantum bitmap j (step SE1). For example, the second execution unit 112 selects any one quantum bitmap j from M (M is a natural number equal to or greater than 1) quantum bitmaps that can execute the quantum test circuit and the quantum inference circuit.

[0097] After step SE1 is performed, the second execution unit 112 executes the quantum check circuit with the quantum bit map j selected in step SE1 (step SE2). Specifically, the second execution unit 112 transmits the data of the quantum check circuit and the quantum bit map j to the specific quantum computer assigned to it. The control computer of the quantum computer associates the quantum bits of the quantum check circuit with the physical quantum bits implemented in the quantum computer according to the quantum bit map j, and generates a control sequence based on the association. The control computer executes the quantum check circuit by operating the quantum hardware according to the generated control sequence. Execution of the quantum check circuit outputs an execution result during inference. The execution result during inference is supplied to the classical computer 1.

[0098] After step SE2 is performed, the determination unit 113 calculates the difference diff between the training execution result and the inference execution result output in step SE2 (step SE3). Then, the determination unit 1113 determines whether the calculated difference diff is smaller than the variable min_diff (step SE4). If it is determined that the difference diff is smaller than the variable min_diff (step SE4: YES), the determination unit 113 updates the quantum bit map number qbit_map to j and assigns the difference diff to the variable min_diff (step SE5).

[0099] If step SE5 is performed or if it is determined in step SE4 that the difference diff is greater than the variable min_diff (step SE4: NO), the determination unit 113 determines whether or not all available quantum bit maps have been selected (step SE6).

[0100] If it is determined that all available quantum bitmaps have not been selected (step SE6: NO), steps SE1 to SE6 are repeated again. If it is determined that all available quantum bitmaps have been selected (step SE6: YES), second execution unit 112 selects the quantum bitmap corresponding to quantum bitmap number qbit_map (step SE7). The selected quantum bitmap is closest to the noise state of the quantum bitmap used during training, and is therefore the quantum bitmap that is most likely to produce the most appropriate results.

[0101] After step SE7 is performed, the second execution unit 112 executes the quantum inference circuit using the quantum bit map selected in step SE7 (step SE8). The execution of the quantum inference circuit outputs an inference result. It is assumed that the quantum computer executing the quantum inference circuit is the same quantum computer that executed the quantum testing circuit. Specifically, the second execution unit 112 transmits the data of the quantum inference circuit and the quantum bit map to the quantum computer. The control computer of the quantum computer associates the quantum bits of the quantum testing circuit with the physical quantum bits implemented in the quantum computer according to the quantum bit map, and generates a control sequence based on the association. The control computer executes the quantum inference circuit by operating the quantum hardware according to the generated control sequence. Since the inference result is the result of execution using the quantum bit map selected in step SE7, it can be said that reliability is ensured.

[0102] Once step SE8 is performed, the screening process for the quantum bit map is completed.

[0103] 14 is an example, and various elements can be added, deleted, and / or modified. As an example, the above-described fourth embodiment is assumed to be a scene of training and inference of a quantum machine learning model, but is not limited to this, and can also be applied to a scene in which a specific quantum inference circuit (quantum inference circuit A) is executed as a second quantum circuit in a first phase, and another quantum inference circuit (quantum inference circuit B) is executed as the second quantum circuit in a second phase. In other words, when quantum inference circuit B is executed with a quantum bitmap having a noise state similar to the noise state when quantum inference circuit A is executed, it is possible to screen the quantum bitmap.

[0104] (Variation 1) In the first to fourth embodiments described above, the quantum inspection circuit has a circuit configuration different from that of the quantum inference circuit executed by the second execution unit 112. However, this embodiment is not limited to this. The quantum inspection circuit according to the first modification may be all or part of the quantum circuit of the quantum inference circuit executed by the second execution unit 112. As an example, the quantum inspection circuit according to the first modification can be set in the encode block of a parameterized quantum circuit or the reservoir part (encode block and quantum circuit) of a quantum reservoir model. According to the first modification, it is possible to ensure the reliability of the inference results by verifying the training accuracy during inference.

[0105] The quantum test circuit may be a quantum circuit for all or part of another quantum machine learning model different from the quantum machine learning model executed by the second execution unit 112. The other quantum machine learning model is assumed to be a quantum machine learning model for a task different from the quantum machine learning model executed by the second execution unit 112.

[0106] (Variation 2) In the first to fourth embodiments described above, the reliability of the inference process is ensured by executing the quantum check circuit during quantum machine learning inference. However, if the training process of the quantum machine learning model takes a long time, the noise state of the quantum computer may change during training. Therefore, by executing the quantum check circuit at predetermined intervals during the training process, it is possible to improve the training accuracy of the quantum machine learning model.

[0107] The first execution unit 111 according to the second modification executes a first quantum circuit in a first phase, where the first phase is a first stage of a phase of training a quantum machine learning model including a second quantum circuit using a quantum computer. The second execution unit 112 executes the first quantum circuit and the second quantum circuit in a second phase subsequent to the first phase, where the second phase is a second stage subsequent to the first stage of the training phase.

[0108] The determination unit 113 determines the reliability of the training result of the second quantum circuit based on a comparison between the execution result of the first quantum circuit in the first stage and the execution result of the first quantum circuit in the second stage. If the determination unit 113 determines that the reliability is high, it outputs the training result of the second quantum circuit executed after the first stage, and if the determination unit 113 determines that the reliability is low, it rejects the training result. The second execution unit 112 optimizes model parameters of the quantum machine learning model including the second quantum circuit based on the training result of the second quantum circuit executed after the first stage. This makes it possible to reduce the possibility that optimization will proceed in an inappropriate direction, and ultimately shorten the optimization execution time.

[0109] (effect) Figure 15 shows an example of a heat map of test accuracy. More specifically, Figure 15 is a matrix plotting the test accuracy when a quantum reservoir model classifies 10 classes of digit character recognition processing from the Mixed National Institute of Standards and Technology database (MNIST). The accuracy is evaluated by switching between eight quantum computers, QC1 to QC8, used for model training and inference. The vertical axis represents the quantum computers used for training (Train devices), and the horizontal axis represents the quantum computers used for inference (Test devices). For reference, the first two rows and two columns show the results when noise-free simulators (state_vec and qasm) are used.

[0110] Looking at the row trained with QC3 in the fifth row from the top of this matrix, we see that the quantum computer used for inference has a test accuracy of 70% or less on a noise-free simulator, while QC2 in the fourth column and QC4 in the sixth column have an accuracy rate of 75% or more. On the other hand, QC7 and QC8 have an accuracy rate of 20% or less. This shows that in quantum machine learning, when making inferences using a trained model, sufficient performance cannot be obtained simply by running it on a quantum computer with low noise and small errors, and that it is important to select a quantum computer that is in as similar a state as possible to that at the time of training.

[0111] Figure 16 shows another example of a heat map of test accuracy. qc5 and qc5' represent the same fifth quantum computer, but executed at different times. As shown by qc5 and qc5', higher accuracy is obtained compared to when other quantum computers are used. However, the accuracy decreases when the timing is shifted compared to when training and inference are performed at the same time. Since the noise state of the noisy quantum computer changes depending on the execution timing, the reliability of the inference results can be improved by executing the combination of the quantum test circuit and the quantum inference circuit multiple times over time and selecting the inference results from the execution results with the smallest difference from the execution results of the quantum test circuit during training.

[0112] According to the above embodiment, the quantum computer system 100 includes a first execution unit 111, a storage device 12, a second execution unit 112, and a determination unit 113. The first execution unit 111 executes a first quantum circuit in a first phase, and the first quantum circuit is used as a control for a second quantum circuit to be determined. The storage device 12 stores the execution result of the first quantum circuit in the first phase. The second execution unit 112 executes the first quantum circuit and the second quantum circuit in a second phase after the first phase. The determination unit 113 determines the reliability of the execution result of the second quantum circuit based on a comparison between the execution result of the first quantum circuit in the first phase and the execution result of the first quantum circuit in the second phase.

[0113] By comparing the execution results of the first quantum circuit in the first phase with the execution results of the first quantum circuit in the second phase, it is possible to estimate the difference between the noise state when the first quantum circuit is executed and the noise state when the first quantum circuit is executed in the second phase. The larger the difference, the more different the noise state when the quantum circuit is executed in the first phase and the second phase, making it possible to determine that the execution results of the second quantum circuit obtained in the second phase are less reliable. Conversely, the smaller the difference, the more reliable the execution results of the second quantum circuit in the second phase are. For example, when inference is performed in the second phase using a second quantum circuit trained in the first phase, if the noise state differs between the first and second phases, there is no guarantee that the learned parameters optimized in the first phase are also optimized in the second phase, resulting in a low reliability of the inference results of the second quantum circuit. As another example, if it is known that the reliability of the execution results or noise conditions of the first quantum circuit in the first phase is high, if the difference between the execution results of the first quantum circuit in the first phase and the second phase is significantly small, it becomes possible to determine that the reliability of the execution results of the second quantum circuit in the second phase is high.

[0114] Thus, according to this embodiment, it is possible to increase the reliability of the execution results of the quantum circuit.

[0115] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be embodied in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, and are also included in the scope of the invention and its equivalents as defined in the claims. [Explanation of symbols]

[0116] 1...classical computer, 2...quantum computer, 11...processor, 12...storage device, 13...input device, 14...display device, 15...communication device, 100...quantum computer system, 111...first execution unit, 112...second execution unit, 113...determination unit, 114...display control unit, 115...list creation unit.

Claims

1. A first execution unit that executes a first quantum circuit in a first aspect, the first quantum circuit being a quantum circuit used as a control for a second quantum circuit to be judged; a storage unit that stores an execution result of the first quantum circuit in the first aspect; a second execution unit that executes the first quantum circuit and the second quantum circuit in a second phase subsequent to the first phase; a determination unit that determines reliability of the execution result of the second quantum circuit based on a comparison between an execution result of the first quantum circuit in the first phase and an execution result of the first quantum circuit in the second phase; A quantum computer system comprising:

2. 2. The quantum computer system according to claim 1, wherein the determination unit determines that the execution result of the second quantum circuit is low when a difference between the execution result of the first quantum circuit in the first phase and the execution result of the first quantum circuit in the second phase is greater than a threshold, and determines that the execution result of the second quantum circuit is high when the difference is smaller than the threshold.

3. the first aspect is a phase of training a quantum machine learning model including the second quantum circuit; The second aspect is an aspect of performing inference using a trained quantum machine learning model, the first execution unit performs a training process on the quantum machine learning model including the second quantum circuit to optimize model parameters of the quantum machine learning model; The second execution unit executes the trained quantum machine learning model to which the optimized model parameters have been assigned. The quantum computer system of claim 1 .

4. a creation unit that creates a list in which a plurality of second quantum circuits corresponding to a plurality of input data are recorded in an execution order, and in which the first quantum circuit corresponding to a predetermined input data is recorded in a predetermined order; the second execution unit executes the first quantum circuit and the second quantum circuit according to the list. The quantum computer system of claim 3.

5. the predetermined order is the top and bottom of the list, the determination unit determines reliability of the execution result of the second quantum circuit executed between the beginning and the end based on a comparison between the execution result of the first quantum circuit in the first phase and the execution result of the first quantum circuit in the beginning, and a comparison between the execution result of the first quantum circuit in the first phase and the execution result of the first quantum circuit in the end.

5. The quantum computer system of claim 4.

6. The predetermined sequence is set at predetermined intervals, the determination unit determines reliability of the execution result of the second quantum circuit executed in the predetermined interval based on a comparison between the execution result of the first quantum circuit in the first phase and the execution result of the first quantum circuit in a first period, and a comparison between the execution result of the first quantum circuit in the first phase and the execution result of the first quantum circuit in a second period subsequent to the first period.

5. The quantum computer system of claim 4.

7. the predetermined order is an arbitrary position in the list, the determination unit determines reliability of the execution results of all of the second quantum circuits included in the list based on a comparison between the execution result of the first quantum circuit in the first phase and the execution result of the first quantum circuit at the arbitrary location in the second phase, and on the entire execution time of the list.

5. The quantum computer system of claim 4.

8. the first execution unit executes the first quantum circuit using a first quantum computer; the second execution unit executes the first quantum circuit using a plurality of quantum computers; the determination unit selects, from the plurality of quantum computers, a quantum computer having the smallest difference between the execution result of the first quantum circuit in the first phase and the execution result of the first quantum circuit in the second phase, as a second quantum computer that executes the second quantum circuit. The quantum computer system of claim 1 .

9. The quantum computer system according to claim 8 , wherein the second execution unit executes the second quantum circuit using the selected second quantum computer.

10. the first execution unit executes the first quantum circuit using a first mapping pattern that represents a correspondence between quantum bits used by the quantum circuit and quantum bits implemented by a quantum computer; the second execution unit executes the first quantum circuit using a plurality of mapping patterns; the determination unit selects, from the plurality of mapping patterns, a mapping pattern that has the smallest difference between the execution result of the first quantum circuit in the first phase and the execution result of the first quantum circuit in the second phase, as a second mapping pattern to be used for executing the second quantum circuit. The quantum computer system of claim 1 .

11. The quantum computer system according to claim 10 , wherein the second execution unit executes the second quantum circuit using the selected second mapping pattern in the second phase.

12. The first aspect is a first stage of an aspect of training a quantum machine learning model including the second quantum circuit using one quantum computer; The second phase is a second phase of the training phase that is subsequent to the first phase. The quantum computer system of claim 1 .

13. the determination unit determines reliability of the execution result of the second quantum circuit executed between the first stage and the second stage based on a comparison between the execution result of the first quantum circuit in the first stage and the execution result of the first quantum circuit in the second stage; 13. The quantum computer system of claim 12.

14. 14. The quantum computer system according to claim 13, wherein, when the reliability is determined to be high, the second execution unit optimizes model parameters of a quantum machine learning model including the second quantum circuit based on an execution result of the second quantum circuit executed between the first stage and the second stage.

15. The quantum computer system according to claim 1 , further comprising a display control unit that displays the reliability determination result on a display device.

16. further comprising a plurality of quantum computers; the first execution unit executes the first quantum circuit via a first quantum computer among the plurality of quantum computers; the second execution unit executes the first quantum circuit and the second quantum circuit via the first quantum computer or a second quantum computer different from the first quantum computer among the plurality of quantum computers. The quantum computer system of claim 1 .

17. a first execution step of executing a first quantum circuit in a first aspect, the first quantum circuit being a quantum circuit used as a control for a second quantum circuit to be judged; a storage step of storing an execution result of the first quantum circuit in the first aspect in a storage device; a second execution step of executing the first quantum circuit and the second quantum circuit in a second phase subsequent to the first phase; a determination step of determining reliability of the execution result of the second quantum circuit based on a comparison between the execution result of the first quantum circuit in the first phase and the execution result of the first quantum circuit in the second phase; A quantum information processing method comprising:

18. For classical computers, A first execution function that executes a first quantum circuit in a first aspect, the first quantum circuit being a quantum circuit used as a control for a second quantum circuit to be judged; a storage function for storing an execution result of the first quantum circuit in the first aspect in a storage device; a second execution function that executes the first quantum circuit and the second quantum circuit in a second phase subsequent to the first phase; a determination function for determining reliability of the execution result of the second quantum circuit based on a comparison between the execution result of the first quantum circuit in the first phase and the execution result of the first quantum circuit in the second phase; A quantum information processing program that makes this possible.

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