Manufacturing method of wiring circuit board

By bonding conductor and metal layers in a vacuum and forming patterns after bonding, the method addresses high electrical resistance issues in printed circuit boards, achieving reduced resistance and improved adhesion with enhanced production efficiency.

JP2025182084APending Publication Date: 2025-12-11NITTO DENKO CORP
View PDF 1 Cites 0 Cited by

Patent Information

Application Number
JP2025169320
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2025-10-07
Publication Date
2025-12-11

AI Technical Summary

Technical Problem

Existing methods for manufacturing printed circuit boards result in high electrical resistance at the interfaces between the metal foil and the metal thin film, and between the metal thin film and the metal supporting board, hindering the reduction of electrical resistance between the metal foil and the metal supporting board.

Method used

A method involving the preparation of substrates with insulating and conductor layers, followed by a joining process where the conductor and metal layers are bonded in a vacuum, using interfacial or solid-state joining, and forming conductor patterns after bonding, with the use of stainless steel or copper alloy metal layers.

Benefits of technology

This method reduces electrical resistance between the conductor and metal layers, enhances adhesion, and improves production efficiency through roll-to-roll lamination, while maintaining conductor pattern integrity.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 2025182084000001_ABST
    Figure 2025182084000001_ABST
Patent Text Reader

Abstract

To provide a manufacturing method of a wiring circuit board, capable of reducing an electric resistance between a conductor layer and a metal layer in a wiring circuit board having a conductor layer and a metal layer on the side opposite to a conductor pattern to an isolation layer.SOLUTION: A manufacturing method of a wiring circuit board, executes: a first preparation step of preparing a first base material 21 having an isolation layer 211 and a conductor layer 212 arranged on a one surface S1 of the isolation layer 211; a second preparation step of preparing a second base material 22 having a metal layer 221; a bonding step of laminating the first base material 21 and the second base material 22 so as to contact the conductor layer 212 and the metal layer 221, and bonding the conductor layer 212 and the metal layer 221 with a metal; and a pattern forming step of forming a conductor pattern 12 onto the other surface S2 of the isolation layer 211.SELECTED DRAWING: Figure 3
Need to check novelty before this filing date? Find Prior Art

Description

[Technical Field]

[0001] The present invention relates to a method for manufacturing a printed circuit board. [Background technology]

[0002] Conventionally, a method for manufacturing a wired circuit board has been disclosed in which a metal thin film is formed on a metal supporting substrate by sputtering or electrolytic plating, a metal foil is formed on the metal thin film by electrolytic plating, and a base insulating layer, a conductor pattern, and a cover insulating layer are sequentially formed on the metal foil and the metal supporting substrate (see, for example, Patent Document 1 below).

[0003] In the method for manufacturing a wired circuit board, a thin metal film is formed between the metal foil and the metal supporting board in order to improve the adhesion between the metal foil and the metal supporting board. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Japanese Patent Application Laid-Open No. 2006-245220 Summary of the Invention [Problem to be solved by the invention]

[0005] In the method for manufacturing a wired circuit board as described in Patent Document 1, electrical resistance occurs at the interface between the metal foil and the metal thin film and at the interface between the metal thin film and the metal supporting board, making it difficult to reduce the electrical resistance between the metal foil and the metal supporting board.

[0006] For example, there are cases where it is desired to reduce the electrical resistance between the metal foil and the metal supporting board, such as when it is desired to ground a part of the conductor pattern via the metal foil.

[0007] The present invention provides a method for manufacturing a wired circuit board that can reduce the electrical resistance between a conductor layer and a metal layer in a wired circuit board having a conductor layer and a metal layer on the opposite side of a conductor pattern with respect to an insulating layer. [Means for solving the problem]

[0008] The present invention [1] includes a method for manufacturing a wired circuit board, which includes a first preparation step of preparing a first substrate having an insulating layer and a conductor layer arranged on one side of the insulating layer, a second preparation step of preparing a second substrate having a metal layer, a joining step of stacking the first substrate and the second substrate so that the conductor layer and the metal layer are in contact with each other and metal-joining the conductor layer and the metal layer, and a pattern formation step of forming a conductor pattern on the other side of the insulating layer, wherein the pattern formation step is performed after the joining step, or the joining step is performed after the pattern formation step, and the metal layer is made of stainless steel or a copper alloy.

[0009] According to this method, a wired circuit board can be obtained in which the conductor layer and the metal layer are metal-bonded.

[0010] Therefore, the electrical resistance between the conductor layer and the metal layer can be reduced.

[0011] The present invention [2] includes the method for producing a wired circuit board according to the above [1], wherein the conductor layer and the metal layer are joined by interfacial joining in the joining step.

[0012] According to this method, the electrical resistance between the conductor layer and the metal layer can be further reduced.

[0013] The present invention [3] includes the method for producing a wired circuit board according to the above [2], wherein the conductor layer and the metal layer are joined by solid-state joining in the joining step.

[0014] According to this method, the electrical resistance between the conductor layer and the metal layer can be further reduced.

[0015] The present invention [4] includes the method for manufacturing a wired circuit board according to the above [3], wherein in the joining step, a first step of activating the surface of the conductor layer and the surface of the metal layer, and a second step of joining the activated surface of the conductor layer and the activated surface of the metal layer are carried out in a vacuum.

[0016] According to this method, by performing the first and second steps in a vacuum, the surfaces of the conductor layer and the metal layer can be activated and bonded while suppressing oxidation and adsorption of gas molecules.

[0017] Therefore, the electrical resistance at the interface between the conductor layer and the metal layer can be further reduced.

[0018] The present invention [5] includes the method for manufacturing a wired circuit board according to any one of the above [1] to [4], wherein in the first preparation step, a first roll that is a roll of the first substrate is prepared, in the second preparation step, a second roll that is a roll of the second substrate is prepared, and in the joining step, the first substrate unwound from the first roll and the second substrate unwound from the second roll are laminated together.

[0019] According to this method, the conductor layer and the metal layer can be bonded by a roll-to-roll method, and production efficiency can be improved.

[0020] The present invention [6] includes the method for producing a wired circuit board according to the above [5], wherein the pattern forming step is carried out after the bonding step.

[0021] According to this method, it is not necessary to take into consideration deformation of the conductor pattern in the bonding step, as compared to when the bonding step is carried out after the pattern forming step, and the conductor layer and the metal layer can be reliably bonded.

[0022] The present invention [7] includes the method for producing a wired circuit board according to any one of the above [1] to [6], wherein the conductor layer is made of copper.

[0023] According to this method, it is possible to reduce the electrical resistance between the conductor layer made of copper and the metal layer made of stainless steel or a copper alloy.

[0024] The present invention [8] includes the method for manufacturing a wired circuit board according to any one of the above [1] to [7], wherein the conductor pattern has a ground pattern electrically connected to the conductor layer and a wiring pattern insulated from the conductor layer.

[0025] According to this method, it is possible to reduce the electrical resistance between the conductor layer to which the ground pattern is connected and the metal layer. [Effects of the Invention]

[0026] According to the method for producing a wired circuit board of the present invention, it is possible to reduce the electrical resistance between the conductor layer and the metal layer. [Brief explanation of the drawings]

[0027] [Figure 1] FIG. 1 is a plan view showing an example of a printed circuit board. [Figure 2] FIG. 2 is a cross-sectional view taken along line AA in FIG. [Figure 3] Figures 3A to 3F are explanatory diagrams for explaining a first embodiment of a method for manufacturing a wired circuit board, in which Figure 3A shows the steps of preparing a first substrate and a second substrate (first preparation step and second preparation step), Figure 3B shows the step of joining the conductor layer of the first substrate and the metal layer of the second substrate (joining step), Figure 3C shows the step of forming a via in the insulating layer, Figure 3D shows the step of forming a conductor pattern (pattern formation step), Figure 3E shows the step of forming a cover insulating layer, and Figure 3F shows the step of etching the metal layer and the conductor layer (etching step). [Figure 4] FIG. 4 is an explanatory diagram for explaining the details of the joining step. [Figure 5]Figures 5A to 5F are explanatory diagrams for explaining a second embodiment of the method for manufacturing a wired circuit board, in which Figure 5A shows a process of preparing a first substrate (first preparation process), Figure 5B shows a process of forming a via in an insulating layer, Figure 5C shows a process of forming a conductor pattern (pattern formation process), Figure 5D shows a process of forming a cover insulating layer, Figure 5E shows a process of preparing a second substrate (second preparation process) and joining the conductor layer of the first substrate and the metal layer of the second substrate (joining process), and Figure 5F shows a process of etching the metal layer and the conductor layer (etching process). [Figure 6] Figures 6A to 6D are explanatory diagrams for explaining a third embodiment of the method for manufacturing a wired circuit board, in which Figure 6A shows a step of etching a conductor layer (first etching step) following Figure 5D, Figure 6B shows a step of preparing a second substrate (second preparation step), Figure 6C shows a step of etching a metal layer (second etching step), and Figure 6D shows a step of joining the conductor layer of the first substrate and the metal layer of the second substrate (joining step). DETAILED DESCRIPTION OF THE INVENTION

[0028] 1. Wiring circuit board 1, the wired circuit board 1 extends in a first direction and a second direction. In this embodiment, the wired circuit board 1 has a substantially rectangular shape. However, the shape of the wired circuit board 1 is not limited.

[0029] As shown in FIG. 2, the wired circuit board 1 has a base insulating layer 11, a conductor pattern 12, a plurality of conductor layers 13A, 13B, 13C, 13D, and 13E, a plurality of metal layers 14A, 14B, 14C, 14D, and 14E, and a cover insulating layer 15.

[0030] (1) Base insulation layer The base insulating layer 11 is disposed between the conductor pattern 12 and the conductor layers 13A, 13B, 13C, 13D, and 13E in the thickness direction. The thickness direction is perpendicular to the first and second directions. The base insulating layer 11 insulates the wiring patterns 12A, 12B, 12C, and 12D from the conductor layers 13A, 13B, 13C, and 13D. The wiring patterns 12A, 12B, 12C, and 12D will be described later. The base insulating layer 11 is made of a resin. Examples of resins include polyimide, maleimide, epoxy resin, polybenzoxazole, and polyester. The base insulating layer 11 has one surface S1 and another surface S2 in the thickness direction.

[0031] (2) Conductor pattern The conductive pattern 12 is disposed on the other surface S2 of the insulating base layer 11 in the thickness direction. The conductive pattern 12 is made of a metal. Examples of metals include copper, silver, gold, iron, aluminum, chromium, and alloys thereof. Copper is preferable from the viewpoint of obtaining good electrical properties. The shape of the conductive pattern 12 is not limited.

[0032] As shown in FIG. 1, the conductor pattern 12 has a plurality of wiring patterns 12A, 12B, 12C, and 12D, and a ground pattern 12E.

[0033] (2-1) Wiring pattern The wiring pattern 12A has a terminal 121A, a terminal 122A, and a wiring 123A. The wiring pattern 12A electrically connects the electronic component connected to the terminal 121A with the electronic component connected to the terminal 122A.

[0034] Terminal 121A is disposed at one end in the first direction of wired circuit board 1. Terminal 121A has a square land shape.

[0035] The terminal 122A is disposed at the other end in the first direction of the wired circuit board 1. The terminal 122A has a square land shape.

[0036] One end of the wiring 123A is connected to the terminal 121 A. The other end of the wiring 123A is connected to the terminal 122 A. The wiring 123A electrically connects the terminal 121A and the terminal 122A.

[0037] Each of the wiring patterns 12B, 12C, and 12D will be described in the same manner as the wiring pattern 12A, and therefore a description of each of the wiring patterns 12B, 12C, and 12D will be omitted.

[0038] (2-2) Ground pattern The ground pattern 12E has a ground terminal 121E and a ground wiring 122E. The ground pattern 12E connects the electronic components connected to the ground terminal 121E to the ground via a conductor layer 13E.

[0039] The ground terminal 121E is disposed at one end of the wired circuit board 1 in the first direction. The ground terminal 121E has a square land shape. The terminals 121A, 121B, 121C, and 121D and the ground terminal 121E are arranged in the second direction at intervals from one another.

[0040] One end of the ground wiring 122E is connected to the ground terminal 121 E. The other end of the ground wiring 122E is connected to the conductor layer 13E through a via 11A in the base insulating layer 11 (see FIG. 2).

[0041] (3) Conductor layer As shown in Fig. 2, the conductor layers 13A, 13B, 13C, 13D, and 13E are arranged on one surface S1 of the base insulating layer 11 in the thickness direction. The conductor layers 13A, 13B, 13C, 13D, and 13E are made of metal. Examples of metals include copper, silver, gold, iron, aluminum, chromium, and alloys thereof. Copper is preferable from the viewpoint of obtaining good electrical characteristics. The conductor layers 13A, 13B, 13C, 13D, and 13E are arranged in the second direction at intervals from each other in correspondence with the wiring patterns 12A, 12B, 12C, and 12D and the ground pattern 12E.

[0042] Specifically, the conductor layer 13A is disposed on the opposite side of the base insulating layer 11 to the wiring pattern 12A in the thickness direction. The conductor layer 13A extends along the wiring pattern 12A. The conductor layer 13A reduces the transmission loss of the wiring pattern 12A.

[0043] The conductor layer 13B is disposed on the opposite side of the base insulating layer 11 to the wiring pattern 12B in the thickness direction. The conductor layer 13B extends along the wiring pattern 12B. The conductor layer 13B reduces the transmission loss of the wiring pattern 12B.

[0044] The conductor layer 13C is disposed on the opposite side of the base insulating layer 11 from the wiring pattern 12C in the thickness direction. The conductor layer 13C extends along the wiring pattern 12C. The conductor layer 13C reduces the transmission loss of the wiring pattern 12C.

[0045] The conductor layer 13D is disposed on the opposite side of the base insulating layer 11 to the wiring pattern 12D in the thickness direction. The conductor layer 13D extends along the wiring pattern 12D. The conductor layer 13D reduces the transmission loss of the wiring pattern 12D.

[0046] The conductor layer 13E is electrically connected to the ground pattern 12E. As shown in FIG. 1, the conductor layer 13E has a wiring portion 131E and a terminal portion 132E. One end of the wiring portion 131E is connected to the ground wiring 122E. The other end of the wiring portion 131E is connected to the terminal portion 132E. The terminal portion 132E is disposed at one end of the wired circuit board 1 in the first direction. The terminal portion 132E has a square land shape.

[0047] (4) Metal layer 2, the metal layers 14A, 14B, 14C, 14D, and 14E correspond to the conductor layers 13A, 13B, 13C, 13D, and 13E and are arranged in the second direction at intervals from one another. The metal layers 14A, 14B, 14C, 14D, and 14E are made of metal. Examples of metals include stainless steel and copper alloys.

[0048] Specifically, the metal layer 14A is disposed on the opposite side of the conductor layer 13A from the wiring pattern 12A in the thickness direction. The metal layer 14A is bonded to the conductor layer 13A. The metal layer 14A supports the conductor layer 13A and the wiring pattern 12A.

[0049] The metal layer 14B is disposed on the opposite side of the conductor layer 13B from the wiring pattern 12B in the thickness direction. The metal layer 14B is bonded to the conductor layer 13B. The metal layer 14B supports the conductor layer 13B and the wiring pattern 12B.

[0050] The metal layer 14C is disposed on the opposite side of the conductor layer 13C from the wiring pattern 12C in the thickness direction. The metal layer 14C is bonded to the conductor layer 13C. The metal layer 14C supports the conductor layer 13C and the wiring pattern 12C.

[0051] The metal layer 14D is disposed on the opposite side of the conductor layer 13D from the wiring pattern 12D in the thickness direction. The metal layer 14D is bonded to the conductor layer 13D. The metal layer 14D supports the conductor layer 13D and the wiring pattern 12D.

[0052] The metal layer 14E is disposed on the opposite side of the conductor layer 13E from the ground pattern 12E in the thickness direction. The metal layer 14E is joined to the conductor layer 13E. The metal layer 14E supports the conductor layer 13E and the ground pattern 12E.

[0053] (5) Cover insulation layer As shown in FIG. 1, the cover insulating layer 15 covers the wiring 123A, 123B, 123C, and 123D and the ground wiring 122E. The cover insulating layer 15 is disposed on the other surface S2 of the base insulating layer 11 in the thickness direction. The cover insulating layer 15 does not cover the terminals 121A, 121B, 121C, and 121D, the terminals 122A, 122B, 122C, and 122D, and the ground terminal 121E. The cover insulating layer 15 is made of a resin. Examples of resins include polyimide, maleimide, epoxy resin, polybenzoxazole, and polyester.

[0054] 2. Manufacturing method of printed circuit board Next, a first embodiment of a method for manufacturing the wired circuit board 1 will be described.

[0055] As shown in Figures 3A to 3F, the method for manufacturing the wired circuit board 1 includes a first preparation step (see Figure 3A), a second preparation step (see Figure 3A), a bonding step (see Figure 3B), a pattern formation step (see Figure 3D), an etching step (see Figure 3F), and an exterior processing step.

[0056] (1) First preparation process 3A, in the first preparation step, a first base material 21 is prepared. In this embodiment, in the first preparation step, a first roll R1 (see FIG. 4) that is a roll of the first base material 21 is prepared. The first base material 21 has an insulating layer 211 and a conductor layer 212.

[0057] The insulating layer 211 is made of the same material as the base insulating layer 11. The insulating layer 211 is made of a resin. Examples of resins include polyimide, maleimide, epoxy resin, polybenzoxazole, and polyester. The insulating layer 211 has one surface S1 and another surface S2 in the thickness direction.

[0058] The conductor layer 212 is made of the same material as the conductor layers 13A, 13B, 13C, 13D, and 13E described above. The conductor layer 212 is disposed on one surface S1 of the insulating layer 211. The conductor layer 212 is made of a metal. Examples of metals include copper, silver, gold, iron, aluminum, chromium, and alloys thereof. From the viewpoint of obtaining good electrical properties, the conductor layer 212 is preferably made of copper. That is, the first substrate 21 is preferably a copper-clad laminate.

[0059] (2)Second preparation process In the second preparation step, the second base material 22 is prepared. In this embodiment, in the second preparation step, a second roll R2 (see FIG. 4) that is a roll of the second base material 22 is prepared. The second base material 22 has a metal layer 221. In this embodiment, the second base material 22 is made of only the metal layer 221.

[0060] The metal layer 221 is made of the same material as the metal layers 14A, 14B, 14C, 14D, and 14E described above. The metal layer 221 is made of a metal. Examples of metals include stainless steel and copper alloys.

[0061] (3)Joining process 3B, in the bonding step, the first base material 21 and the second base material 22 are laminated so that the conductor layer 212 and the metal layer 221 are in contact with each other, and the conductor layer 212 and the metal layer 221 are metal-bonded to each other. In the bonding step, the conductor layer 212 and the metal layer 221 are preferably bonded to each other by interfacial bonding, more preferably by solid-state bonding.

[0062] In this embodiment, as shown in Fig. 4, in the joining step, a first substrate 21 unwound from a first roll R1 and a second substrate 22 unwound from a second roll R2 are laminated together (roll-to-roll method). More specifically, in the joining step, the first step and the second step described below are performed in a vacuum.

[0063] The term "vacuum" refers to a state in which a space is filled with gas at a pressure lower than normal atmospheric pressure (JIS Z 8126-1:1999). More specifically, the term "vacuum" refers to a state in which a space is filled with gas at a pressure lower than standard atmospheric pressure. From the viewpoint of suppressing oxidation of the conductor layer 212 and the metal layer 221 and the adsorption of gas molecules to the conductor layer 212 and the metal layer 221, the higher the degree of vacuum, the more preferable.

[0064] The first and second steps may be carried out, for example, under high vacuum (10 -1 ~10 -5 Pa), preferably ultra-high vacuum (10 -5 It is performed at a speed of 1000 kJ / s (less than 1000 kJ / s).

[0065] In the first step, the surface S11 of the conductor layer 212 (see FIG. 3A) and the surface S12 of the metal layer 221 (see FIG. 3A) are activated.

[0066] To activate the surface S11 of the conductor layer 212, the surface S11 of the conductor layer 212 of the first base material 21 unwound from the first roll R1 is ion-etched by the first ion etching device 31. For example, the surface S11 of the conductor layer 212 of the first base material 21 unwound from the first roll R1 is irradiated with an argon ion beam by the first ion etching device 31. This removes oxides and adsorbates on the surface S11 of the conductor layer 212, and activates the surface S11 of the conductor layer 212.

[0067] To activate the surface S12 of the metal layer 221, the surface S12 of the metal layer 221 of the second substrate 22 unwound from the second roll R2 is ion-etched by the second ion etching device 32. This removes oxides and adsorbed substances on the surface S12 of the metal layer 221, and activates the surface S12 of the metal layer 221.

[0068] Next, in the second step, the activated surface S11 of the conductor layer 212 and the activated surface S12 of the metal layer 221 are bonded together.

[0069] Specifically, the first substrate 21 and the second substrate 22 are brought together so that the activated surface S11 of the conductor layer 212 and the activated surface S12 of the metal layer 221 are in contact with each other, and then pressed together using a press device 33.

[0070] As a result, as shown in FIG. 3B, the surface S11 of the conductor layer 212 and the surface S12 of the metal layer 221 are joined together.

[0071] By performing the first and second steps in a vacuum, oxides and adsorbates are removed from the surface S11 of the conductor layer 212 and the surface S12 of the metal layer 221, which makes it possible to further reduce the electrical resistance at the interface between the conductor layer 212 and the metal layer 221. In addition, it is possible to further improve the adhesion between the conductor layer 212 and the metal layer 221.

[0072] (4) Pattern formation process Next, in this embodiment, the pattern forming step is performed after the bonding step. This eliminates the need to consider deformation of the conductor pattern 12 in the bonding step, as compared to the case where the bonding step is performed after the pattern forming step as in the second and third embodiments described below, and allows the conductor layer 212 and the metal layer 221 to be reliably bonded together. This is particularly suitable for performing the bonding step using a roll-to-roll method.

[0073] In the pattern forming step, the conductive pattern 12 is formed on the other surface S2 of the insulating layer 211.

[0074] 3C, first, if necessary, vias 11A are formed in insulating layer 211. In this embodiment, vias 11A are formed to connect ground pattern 12E (see FIG. 2) and conductor layer 13E (see FIG. 2).

[0075] Next, in this embodiment, as shown in Fig. 3D, the conductor pattern 12 is formed on the other surface S2 of the insulating layer 211 by electroless plating. That is, the conductor pattern 12 is formed by an additive method. The conductor pattern 12 has a ground pattern 12E electrically connected to the conductor layer 212, and wiring patterns 12A, 12B, 12C, and 12D insulated from the conductor layer 212. Note that the conductor pattern 12 may also be formed by a subtractive method.

[0076] Next, as shown in FIG. 3E, the above-described cover insulating layer 15 is formed on the other surface S2 of the insulating layer 211.

[0077] (5) Etching process Next, as shown in FIG. 3F, metal layer 221 and conductor layer 212 are etched to form the above-described conductor layers 13A, 13B, 13C, 13D, and 13E and metal layers 14A, 14B, 14C, 14D, and 14E.

[0078] (6) External shape processing process 2, the insulating layer 211 is then processed into a predetermined shape to obtain the above-described wired circuit board 1. The method of processing the shape is not limited. Examples of the method of processing the shape include etching and cutting.

[0079] 3. Effects (1) According to the method for manufacturing the wired circuit board 1, as shown in FIG. 2, a wired circuit board 1 can be obtained in which the conductor layers 13A, 13B, 13C, 13D, and 13E are metal-bonded to the metal layers 14A, 14B, 14C, 14D, and 14E.

[0080] Therefore, it is possible to reduce the electrical resistance between the conductor layers 13A, 13B, 13C, 13D, and 13E and the metal layers 14A, 14B, 14C, 14D, and 14E.

[0081] (2) According to the method for manufacturing the wired circuit board 1, in the bonding step (see FIG. 3B), the conductor layer 212 and the metal layer 221 are bonded to each other by interfacial bonding.

[0082] Therefore, the electrical resistance between the conductor layers 13A, 13B, 13C, 13D, and 13E and the metal layers 14A, 14B, 14C, 14D, and 14E can be further reduced.

[0083] (3) According to the method for manufacturing the wired circuit board 1, in the joining step (see FIG. 3B), the conductor layer 212 and the metal layer 221 are joined by solid-state joining.

[0084] Therefore, the electrical resistance between the conductor layers 13A, 13B, 13C, 13D, and 13E and the metal layers 14A, 14B, 14C, 14D, and 14E can be further reduced.

[0085] (4) According to the manufacturing method of the wired circuit board 1, as shown in FIG. 4, in the bonding process, a first process of activating the surface S11 of the conductor layer 212 with a first ion etching device 31 and activating the surface S12 of the metal layer 221 with a second ion etching device 32, and a second process of bonding the activated surface S11 of the conductor layer 212 and the activated surface S12 of the metal layer 221 with a press device 33 are carried out in a vacuum.

[0086] By performing the first and second steps in a vacuum, the surface S11 of the conductor layer 212 and the surface S12 of the metal layer 221 can be activated and bonded while suppressing oxidation and adsorption of gas molecules.

[0087] As a result, the electrical resistance at the interface between the conductor layer 212 and the metal layer 221 can be further reduced.

[0088] (5) According to the method for manufacturing the wired circuit board 1, as shown in FIG. 4, in the joining step, the first base material 21 unwound from the first roll R1 and the second base material 22 unwound from the second roll R2 are laminated together.

[0089] Therefore, the conductor layer 212 and the metal layer 221 can be bonded together by a roll-to-roll method, which improves production efficiency.

[0090] (6) According to the method for manufacturing the wired circuit board 1, as shown in FIG. 3D, the pattern forming step is carried out after the bonding step (see FIG. 3B).

[0091] Therefore, compared to when the bonding step is performed after the pattern forming step, there is no need to consider deformation of the conductor pattern 12 in the bonding step, and the conductor layer 212 and the metal layer 221 can be reliably bonded.

[0092] (7) According to the manufacturing method of the wired circuit board 1, when the conductor layer 212 is made of copper and the metal layer 221 is made of stainless steel or a copper alloy, as shown in FIG. 2, it is possible to reduce the electrical resistance between the conductor layers 13A, 13B, 13C, 13D, and 13E made of copper and the metal layers 14A, 14B, 14C, 14D, and 14E made of stainless steel or a copper alloy.

[0093] (8) According to the method for manufacturing the wired circuit board 1, as shown in FIG. 2, it is possible to reduce the electrical resistance between the conductor layer 13E to which the ground pattern 12E is connected and the metal layer 14E.

[0094] 4. Second embodiment Next, a second embodiment will be described. In the second embodiment, the same members as those in the first embodiment are denoted by the same reference numerals, and the description thereof will be omitted.

[0095] As shown in FIGS. 5A to 5F, in the second embodiment, a bonding step (see FIG. 5E) is performed after a pattern forming step (see FIG. 5C).

[0096] Specifically, first, as shown in FIG. 5A, a first base material 21 having an insulating layer 211 and a conductive layer 212 is prepared (first preparation step).

[0097] Next, the conductive pattern 12 is formed on the other surface S2 of the insulating layer 211.

[0098] More specifically, as shown in FIG. 5B, vias 11A are formed in insulating layer 211 as needed.

[0099] Next, as shown in FIG. 5C, the conductive pattern 12 is formed on the other surface S2 of the insulating layer 211 by an additive method or a subtractive method (pattern forming step).

[0100] Next, as shown in FIG. 5D, the above-described cover insulating layer 15 is formed on the other surface S2 of the insulating layer 211.

[0101] Next, as shown in FIG. 5E, a second substrate 22 having a metal layer 221 is prepared (second preparation step), and the first substrate 21 and the second substrate 22 are laminated so that the conductor layer 212 and the metal layer 221 are in contact with each other, thereby bonding the conductor layer 212 and the metal layer 221 (bonding step).

[0102] Next, as shown in FIG. 5F, the metal layer 221 and the conductor layer 212 are etched to form the above-described conductor layers 13A, 13B, 13C, 13D, and 13E and metal layers 14A, 14B, 14C, 14D, and 14E (etching step).

[0103] Thereafter, as shown in FIG. 2, the insulating layer 211 is processed into a predetermined shape (process of processing the outer shape), thereby obtaining the above-described wired circuit board 1.

[0104] In the second embodiment, the same effects as those of the first embodiment can be obtained.

[0105] 5. Third embodiment Next, a third embodiment will be described. In the third embodiment, the same members as those in the second embodiment are given the same reference numerals, and the description thereof will be omitted.

[0106] In the third embodiment, as shown in Figures 5A to 5D, similar to the second embodiment, processes including a first preparation process (see Figure 5A) and a pattern formation process (see Figure 5C) are performed, and then, as shown in Figure 6A, the conductor layer 212 is etched to form the above-mentioned conductor layers 13A, 13B, 13C, 13D, and 13E (first etching process).

[0107] Next, as shown in FIG. 6B, a second substrate 22 having a metal layer 221 is prepared (second preparation step), and as shown in FIG. 6C, the metal layer 221 is etched to form the above-mentioned metal layers 14A, 14B, 14C, 14D, and 14E (second etching step).

[0108] Thereafter, as shown in FIG. 6D, the first substrate 21 and the second substrate 22 are stacked so that the conductor layers 13A, 13B, 13C, 13D, and 13E contact the metal layers 14A, 14B, 14C, 14D, and 14E, thereby bonding the conductor layers 13A, 13B, 13C, 13D, and 13E to the metal layers 14A, 14B, 14C, 14D, and 14E (bonding process).

[0109] In the third embodiment, the same effects as those of the first embodiment can be obtained.

[0110] 6. Variations (1) In the above-described embodiments, the first base material 21 is prepared having the conductor layer 212 only on one surface S1 of the insulating layer 211. However, the first base material 21 may have the conductor layer 212 on each of the one surface S1 and the other surface S2 of the insulating layer 211. In this case, in the pattern formation step, the conductor layer 212 on the other surface S2 is patterned into the conductor pattern 12 by a subtractive method.

[0111] (2) In each of the above-described embodiments, the first substrate 21 and the second substrate 22 are joined by a roll-to-roll method, but a sheet of the first substrate 21 and a sheet of the second substrate 22 may also be joined. [Explanation of symbols]

[0112] 1 Wiring circuit board 12 Conductor pattern 12A wiring pattern 12B wiring pattern 12C wiring pattern 12D wiring pattern 12E ground pattern 21 First base material 22 Second base material 211 Insulating layer 212 Conductor layer 221 Metal layer R1 First Roll R2 Second Roll S1 One side of the insulating layer S2 Other side of insulating layer S11 Surface of the conductor layer S12 Metal layer surface

Claims

1. a first preparation step of preparing a first base material having an insulating layer and a conductor layer disposed on one surface of the insulating layer; a second preparation step of preparing a second substrate having a metal layer; stacking the first base material and the second base material so that the conductor layer and the metal layer are in contact with each other; a bonding step of metallurgically bonding the conductor layer and the metal layer; a pattern forming step of forming a conductor pattern on the other surface of the insulating layer; Including, The pattern forming step is performed after the bonding step, or the pattern forming step is performed after the bonding step, The method for manufacturing a wired circuit board, wherein the metal layer is made of stainless steel or a copper alloy.

2. The method for producing a wired circuit board according to claim 1 , wherein in the bonding step, the conductor layer and the metal layer are bonded by interfacial bonding.

3. 3. The method for producing a wired circuit board according to claim 2, wherein in the bonding step, the conductor layer and the metal layer are bonded by solid-state bonding.

4. In the joining step, a first step of activating a surface of the conductor layer and a surface of the metal layer; 4. The method for producing a wired circuit board according to claim 3, wherein the second step of bonding the activated surface of the conductor layer and the activated surface of the metal layer is carried out in a vacuum.

5. In the first preparation step, a first roll is prepared, which is a roll of the first substrate; In the second preparation step, a second roll is prepared, which is a roll of the second substrate; 5. The method for manufacturing a wired circuit board according to claim 1, wherein in the joining step, the first base material unwound from the first roll and the second base material unwound from the second roll are laminated.

6. The method for manufacturing a wired circuit board according to claim 5 , wherein the pattern forming step is carried out after the bonding step.

7. The method for producing a wired circuit board according to any one of claims 1 to 6, wherein the conductor layer is made of copper.

8. The conductor pattern is a ground pattern electrically connected to the conductor layer; a wiring pattern insulated from the conductor layer; The method for producing the wired circuit board according to any one of claims 1 to 7, comprising:

Citation Information

Patent Citations

  • Wiring circuit board

    JP2006245220A