Preamplifier, disk device, control device, and analysis method

Abstract

To provide a preamplifier, a disk device, a control device, and an analysis method capable of reducing the number of steps required to analyze detected abnormalities.SOLUTION: A preamplifier 50 provided on a head assembly 30 of a disk device includes: an abnormality detection circuit 72 connected to a head element 31p included in a head 31 of the head assembly 30; a reference resistance element 73 having a resistance value corresponding to a resistance value of the head element 31p and connected to the abnormality detection circuit 72; and a switching unit 74 capable of switching between a first state and a second state. The first state is a state where the abnormality detection circuit 72 and the head element 31p are connected, and the abnormality detection circuit 72 is disconnected from the reference resistance element 73, and the second state is a state where the abnormality detection circuit 72 and the reference resistance element 73 are connected, and the abnormality detection circuit 72 is disconnected from the head element 31p.SELECTED DRAWING: Figure 4

Description

[Technical Field]

[0001] FIELD Embodiments of the present invention relate to a preamplifier, a disk device, a control device, and an analysis method. [Background technology]

[0002] Preamplifiers are known that are provided in head assemblies of disk drives. Such preamplifiers may be provided with an abnormality detection circuit for detecting abnormalities in the head element. When the abnormality detection circuit detects an abnormality, the abnormality may not be an abnormality in the head element, but an abnormality in the abnormality detection circuit. Because the preamplifier is provided in a head assembly located inside the disk drive, in the past, analyzing whether the abnormality was in the head element or the abnormality detection circuit required disassembly of the disk drive. This resulted in a problem of increased man-hours required to analyze abnormalities detected in the preamplifier. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] U.S. Patent No. 8,077,415 Summary of the Invention [Problem to be solved by the invention]

[0004] The problem to be solved by the present invention is to provide a preamplifier, a disk device, a control device, and an analysis method that can reduce the number of steps required to analyze a detected abnormality. [Means for solving the problem]

[0005] The preamplifier of the embodiment is a preamplifier provided in a head assembly of a disk drive. The preamplifier of the embodiment has an abnormality detection circuit connected to a head element of a head of the head assembly, a reference resistance element having a resistance value corresponding to the resistance value of the head element and connected to the abnormality detection circuit, and a switch unit switchable between a first state and a second state. The first state is a state in which the abnormality detection circuit and the head element are connected and the abnormality detection circuit and the reference resistance element are disconnected. The second state is a state in which the abnormality detection circuit and the reference resistance element are connected and the abnormality detection circuit and the head element are disconnected. [Brief explanation of the drawings]

[0006] [Figure 1] FIG. 1 is a perspective view showing a disk device according to a first embodiment. [Figure 2] FIG. 1 is a perspective view showing a part of a disk device according to a first embodiment. [Figure 3] FIG. 2 is a block diagram showing a part of the disk device according to the first embodiment. [Figure 4] FIG. 2 is a block diagram showing a part of the head assembly according to the first embodiment. [Figure 5] FIG. 4 is a diagram showing a case where the switch unit of the first embodiment is in a second state. [Figure 6] 4 is a flowchart showing an example of the procedure of an analysis method according to the first embodiment. [Figure 7] FIG. 10 is a block diagram showing a part of a disk device according to a third embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0007] Hereinafter, a preamplifier, a disk device, a control device, and an analysis method according to the embodiments will be described with reference to the drawings.

[0008] (First embodiment) FIG. 1 is a perspective view showing a disk device 100 of the first embodiment. FIG. 2 is a perspective view showing a portion of the disk device 100 of the first embodiment. FIG. 3 is a block diagram showing a portion of the disk device 100 of the first embodiment. The Z-axis direction shown in FIGS. 1 and 2 is a direction parallel to the rotation axis R of a disk 20, which will be described later. In the following description, the direction parallel to the Z-axis direction will be referred to as the "axial direction," the side of the axial direction toward which the Z-axis arrow points (+Z side) will be referred to as the "upper side," and the side of the axial direction opposite to the side toward which the Z-axis arrow points (-Z side) will be referred to as the "lower side." Note that the terms "upper side" and "lower side" are simply names used to describe the relative positions of the various components, and the actual relative positions may be other than those indicated by these names.

[0009] The disk device 100 of the first embodiment shown in Figures 1 to 3 is a magnetic disk device with a built-in hard disk drive. The disk device 100 can store information as digital data. The disk device 100 is driven based on commands from a higher-level device (not shown). The higher-level device (not shown) is, for example, a personal computer. The higher-level device (not shown) is not particularly limited as long as it is a device that issues commands to the disk device 100. The higher-level device (not shown) can record information in the disk device 100 and read data recorded in the disk device 100.

[0010] As shown in FIG. 1, the disk device 100 includes a case 10, a disk 20, a head assembly 30, a control device 40, a power terminal 81, and a connection terminal 82. The case 10 accommodates the disk 20 and the head assembly 30 inside. In the first embodiment, the case 10 is in the shape of a rectangular parallelepiped box. The case 10 includes a case body 11 and a lid 12. The case body 11 is in the shape of a rectangular parallelepiped box that is open on the top. The disk 20 and the head assembly 30 are accommodated inside the case body 11. The lid 12 is fixed to the upper end of the case body 11. The lid 12 closes the upper opening of the case body 11.

[0011] In the first embodiment, the disk 20 is a magnetic disk. The disk 20 is disk-shaped. The disk 20 is rotated around a rotation axis R extending in the axial direction by a spindle motor (not shown). The disk 20 has a recording surface on which digital data is recorded. In the first embodiment, a plurality of disks 20 are provided spaced apart in the axial direction. The number of disks 20 is not particularly limited as long as it is one or more.

[0012] The control device 40 is a device that controls the disk device 100. The control device 40 is attached to the outer surface of the case 10. In the first embodiment, the control device 40 is attached to the lower surface of the case 10. For example, at least a part of the control device 40 is exposed to the outside of the case 10. As shown in FIG. 3, the control device 40 has a circuit board 40a, a control unit 41, a connector unit 42, a non-volatile memory 43, a volatile memory 44, and a motor driver IC 45. The circuit board 40a is a printed circuit board (PCB). The control unit 41, the connector unit 42, the non-volatile memory 43, the volatile memory 44, and the motor driver IC 45 are mounted on the circuit board 40a.

[0013] The control unit 41 is a system controller that controls the disk device 100. The control unit 41 is a large-scale integrated circuit (LSI) known as a system-on-a-chip (SoC) in which multiple elements such as a microprocessor are integrated on a single chip. The control unit 41 is electrically connected to a nonvolatile memory 43, a volatile memory 44, a motor driver IC 45, and a connector unit 42. A connector unit 62 of a flexible printed circuit (FPC) 60 (described later) is connected to the connector unit 42. The control unit 41 is electrically connected to a preamplifier 50 (described later) via the flexible printed circuit 60. The control device 40 controls the preamplifier 50 using the control unit 41.

[0014] The nonvolatile memory 43 is a semiconductor memory that continues to hold recorded data even when the power supply is cut off. In the first embodiment, the nonvolatile memory 43 is a flash memory. The nonvolatile memory 43 is, for example, a NOR or NAND flash memory. The nonvolatile memory 43 stores, for example, at least a part of a program for driving the disk device 100, and data required before reading and writing data from and to the disk 20.

[0015] The volatile memory 44 is a semiconductor memory that loses stored data when the power supply is cut off. In the first embodiment, the volatile memory 44 is a dynamic random access memory (DRAM). The volatile memory 44 may also be an SRAM, a synchronous dynamic random access memory (SDRAM), a ferroelectric random access memory (FeRAM), a magnetoresistive random access memory (MRAM), or the like.

[0016] The motor driver IC 45 controls the driving of a spindle motor (not shown) and a voice coil motor (not shown) based on commands from the control unit 41. The spindle motor (not shown) rotates the disk 20 around the rotation axis R. The voice coil motor (not shown) moves the head 31 (described later).

[0017] As shown in FIG. 1 , the power supply terminal 81 and the connection terminal 82 are exposed to the outside of the case 10. In the first embodiment, the power supply terminal 81 and the connection terminal 82 are exposed on the side surface of the case body 11. The power supply terminal 81 and the connection terminal 82 are electrically connected to the control device 40. A power cable (not shown) is connected to the power supply terminal 81. The power cable is connected to, for example, a host device (not shown). Power is supplied to the disk device 100 from the host device via the power cable and the power supply terminal 81. A connection cable (not shown) is connected to the connection terminal 82. The connection cable is connected to the host device. A command signal from the host device is input to the control device 40 via the connection cable and the connection terminal 82. An output signal from the control device 40 is input to the host device via the connection cable and the connection terminal 82.

[0018] In the first embodiment, the head assembly 30 is a head stack assembly (HSA) having multiple heads 31. As shown in FIG. 2, the head assembly 30 includes a head assembly main body 30a, a preamplifier 50, and a flexible substrate 60. The head assembly main body 30a includes a head 31, an arm 32, and a base 33. The arm 32 extends from the base 33 in a direction perpendicular to the axial direction. In the first embodiment, multiple arms 32 are provided lined up in the axial direction. A head 31 is provided at the tip of each of the multiple arms 32. Each of the multiple arms 32 is rotatable around an axis extending in the axial direction. Each of the multiple arms 32 is rotated around an axis extending in the axial direction by a voice coil motor (not shown). Each arm 32 is rotated around an axis extending in the axial direction by a voice coil motor (not shown), and each head 31 provided at the tip of each arm 32 is moved to a position facing the recording surface of each disk 20 and a position not facing the recording surface of the disk 20.

[0019] The head 31 is a magnetic head capable of reading data recorded on the disk 20 and writing data to the disk 20. The head 31 is positioned opposite the recording surface of the disk 20 and is capable of reading data from and writing data to the recording surface of the disk 20. FIG. 4 is a block diagram showing a portion of the head assembly 30. As shown in FIG. 4, each head 31 has a plurality of head elements 31p. The plurality of head elements 31p includes a read head element 31a, a write head element 31b, a heater element 31c, a sensor element 31d, and an assist element 31e.

[0020] The read head element 31a is an element that reads data recorded on the disk 20. The write head element 31b is an element that writes data to the disk 20. The heater element 31c is an element that can adjust the distance between the disk 20 and the head 31. The heater element 31c can adjust the distance between the disk 20 and the head 31 by applying heat to the head 31 to cause thermal expansion. Although not shown, there are provided two heater elements 31c, for example, one heater element 31c that applies heat to the read head element 31a and the other heater element 31c that applies heat to the write head element 31b. The sensor element 31d is an element that can detect contact between the disk 20 and the head 31. The sensor element 31d is an HDI (Head Disk Interface) sensor. The assist element 31e is an element that assists in writing data to the disk 20. The assist element 31e is, for example, an assist element of a MAMR (Microwave Assisted Magnetic Recording) type. The assist element 31e may be, for example, a heat-assisted magnetic recording (HAMR) type assist element 31e.

[0021] The flexible substrate 60 connects the circuit board 40a and the head assembly main body 30a. As shown in FIG. 2, the flexible substrate 60 has a flexible substrate main body 61 and a connector portion 62. The flexible substrate main body 61 extends from the connector portion 62 and is connected to the head assembly main body 30a. The flexible substrate main body 61 has portions attached to the base portion 33 and to the side surfaces of the multiple arms 32. The flexible substrate main body 61 is electrically connected to each of the heads 31 provided at the tip ends of the multiple arms 32.

[0022] The preamplifier 50 is mounted on the flexible substrate 60. More specifically, the preamplifier 50 is mounted on a portion of the flexible substrate main body 61 that is attached to the base 33. The preamplifier 50 is attached to the base 33 via the flexible substrate 60. The preamplifier 50 is electrically connected to the control unit 41 via a wiring pattern provided on the flexible substrate main body 61 and a wiring pattern provided on the circuit board 40a. The preamplifier 50 is electrically connected to each head 31 via wiring patterns provided on the side surfaces of each arm 32 of the flexible substrate main body 61.

[0023] 3, the preamplifier 50 has a plurality of head drivers 51 that respectively drive a plurality of heads 31. As shown in Fig. 4, each head driver 51 has a head element circuit 71, an abnormality detection circuit 72, a reference resistance element 73, and a switch unit 74. The head element circuit 71, the abnormality detection circuit 72, the reference resistance element 73, and the switch unit 74 are provided for each of the plurality of head elements 31p.

[0024] Each head element circuit 71 is connected to a corresponding head element 31p. The head element circuits 71 include a head element circuit 71a connected to the read head element 31a, a head element circuit 71b connected to the write head element 31b, a head element circuit 71c connected to the heater element 31c, a head element circuit 71d connected to the sensor element 31d, and a head element circuit 71e connected to the assist element 31e.

[0025] The head element circuit 71a connected to the read head element 31a amplifies the signal of data read from the disk 20 by the read head element 31a and outputs it as read data RD. The read data RD output from the head element circuit 71a is transmitted to the circuit board 40a via the flexible substrate 60 as shown in FIG. 3 and input to the control unit 41. As shown in FIG. 4, the head element circuit 71a is connected to the read head element 31a via a pair of terminals 77a1 and 77a2 provided on the preamplifier 50. One of the pair of terminals 77a1 and 77a2 is a positive terminal and the other is a negative terminal. The pair of terminals 77a1 and 77a2 are connected to the positive and negative terminals of the read head element 31a via wiring on the flexible substrate main body 61, respectively.

[0026] The head element circuit 71b connected to the write head element 31b is a driver circuit that drives the write head element 31b. The head element circuit 71b outputs a write current to the write head element 31b according to write data WD sent from the control unit 41. The write data WD is input from the control unit 41 to the preamplifier 50 via the flexible substrate 60. The head element circuit 71b is connected to the write head element 31b via a pair of terminals 77b1 and 77b2. One of the pair of terminals 77b1 and 77b2 is a positive terminal, and the other is a negative terminal. The pair of terminals 77b1 and 77b2 are connected to the positive and negative terminals of the write head element 31b, respectively, via wiring on the flexible substrate main body 61.

[0027] The head element circuit 71c connected to the heater element 31c is a driver circuit that drives the heater element 31c based on a signal from the control unit 41. The head element circuit 71c is connected to the heater element 31c via a terminal 77c. The terminal 77c is connected to a terminal of the heater element 31c via wiring on the flexible substrate main body 61. The heater element 31c is connected to ground GND within the head 31.

[0028] The head element circuit 71d connected to the sensor element 31d amplifies and outputs a detection signal from the sensor element 31d that detects contact between the head 31 and the disk 20. The head element circuit 71d is connected to the sensor element 31d via a pair of terminals 77d1 and 77d2. One of the pair of terminals 77d1 and 77d2 is a positive terminal, and the other is a negative terminal. The pair of terminals 77d1 and 77d2 are connected to the positive and negative terminals of the sensor element 31d, respectively, via wiring on the flexible substrate main body 61.

[0029] The head element circuit 71e connected to the assist element 31e is a driver circuit that drives the assist element 31e. The head element circuit 71e is connected to the assist element 31e via a pair of terminals 77e1 and 77e2. One of the pair of terminals 77e1 and 77e2 is a positive terminal, and the other is a negative terminal. The pair of terminals 77e1 and 77e2 are connected to the positive and negative terminals of the assist element 31e, respectively, via wiring on the flexible substrate main body 61.

[0030] Each abnormality detection circuit 72 is a circuit for detecting an abnormality in each head element 31p. If the current flowing through or the voltage applied to each head element 31p when it is driven is not within a predetermined range, each abnormality detection circuit 72 outputs a predetermined signal indicating that an abnormality has been detected. The current flowing through each head element 31p when it is driven is, for example, the current flowing between the head element circuit 71 and each head element 31p. The voltage applied to each head element 31p when it is driven is, for example, a voltage applied to a location between the terminal of the preamplifier 50 to which the head element 31p is connected and the head element circuit 71. The current flowing through or the voltage applied to each head element 31p when it is driven may not be within the predetermined range if, for example, part of the circuit is short-circuited or part of the circuit is disconnected.

[0031] The predetermined output indicating that an abnormality has been detected and output from the abnormality detection circuit 72 is, for example, a fault signal indicating that an abnormality has occurred in the head element 31p. The fault signal is output from a fault terminal provided in the preamplifier 50 and input to the control unit 41. The fault signal is, for example, either high or low under normal conditions, and becomes the other of high and low when the abnormality detection circuit 72 detects an abnormality. For example, if the fault signal is high under normal conditions, the abnormality detection circuit 72 sets the fault signal to low upon detecting an abnormality. If at least one of the multiple abnormality detection circuits 72 detects an abnormality, the fault signal output from the fault detection circuit 72 becomes a state indicating an abnormality.

[0032] In the first embodiment, each abnormality detection circuit 72 is disposed between a terminal connected to each head element 31p and each head element circuit 71. In the circuit disclosed herein, "another element is disposed between a certain element and another element" means that the other element is disposed on the circuit between the certain element and the other element. Each abnormality detection circuit 72 is connected to each head element circuit 71 and each head element 31p. The multiple abnormality detection circuits 72 include an abnormality detection circuit 72a connected to the read head element 31a, an abnormality detection circuit 72b connected to the write head element 31b, an abnormality detection circuit 72c connected to the heater element 31c, an abnormality detection circuit 72d connected to the sensor element 31d, and an abnormality detection circuit 72e connected to the assist element 31e.

[0033] Each reference resistor element 73 is a resistor element having a resistance value corresponding to the resistance value of each head element 31p. The resistance value corresponding to the resistance value of the head element 31p includes a resistance value that is the same as the resistance value of the head element 31p, a resistance value that is approximately the same as the resistance value of the head element 31p, and a resistance value within a standard range for the resistance value of the head element 31p. The resistance value corresponding to the resistance value of the head element 31p is within a range in which the abnormality detection circuit 72 will not detect an abnormality even if the head element 31p is replaced with the reference resistor element 73 when the abnormality detection circuit 72 is normal. In other words, the resistance value corresponding to the resistance value of the head element 31p is a resistance value in which the current or voltage value used by the abnormality detection circuit 72 to determine an abnormality is within the above-mentioned predetermined range even if the head element 31p is replaced with the reference resistor element 73 when the abnormality detection circuit 72 is normal.

[0034] Each reference resistance element 73 is connected to a corresponding abnormality detection circuit 72. The plurality of reference resistance elements 73 include a reference resistance element 73a connected to the abnormality detection circuit 72a, a reference resistance element 73b connected to the abnormality detection circuit 72b, a reference resistance element 73c connected to the abnormality detection circuit 72c, a reference resistance element 73d connected to the abnormality detection circuit 72d, and a reference resistance element 73e connected to the abnormality detection circuit 72e.

[0035] The reference resistor 73a is disposed between a wiring 78a connecting a terminal 77a1 connected to the read head element 31a to the abnormality detection circuit 72a and a wiring 79a connecting a terminal 77a2 to the abnormality detection circuit 72a. One end of the reference resistor 73a is connected to the wiring 78a. The other end of the reference resistor 73a is connected to the wiring 79a.

[0036] The reference resistor element 73b is connected in the same manner as the reference resistor element 73a, except that the connected abnormality detection circuit 72 and head element 31p are different. The reference resistor element 73d is connected in the same manner as the reference resistor element 73a, except that the connected abnormality detection circuit 72 and head element 31p are different. The reference resistor element 73e is connected in the same manner as the reference resistor element 73a, except that the connected abnormality detection circuit 72 and head element 31p are different.

[0037] The reference resistor 73c is disposed between a wiring 78c connecting the terminal 77c and the abnormality detection circuit 72c and the ground GND of the preamplifier 50. One end of the reference resistor 73c is connected to the wiring 78c. The other end of the reference resistor 73c is connected to the ground GND of the preamplifier 50. The ground GND of the preamplifier 50 and the ground GND of the head 31 are common grounds having the same reference potential. The ground GND of the preamplifier 50 and the ground GND of the head 31 are connected to the ground of the circuit board 40a via a ground wiring pattern (not shown) provided on the flexible substrate 60. The ground of the control unit 41 is connected to the ground of the circuit board 40a. That is, in the first embodiment, the reference potential of the ground GND of the preamplifier 50 and the reference potential of the ground GND of the head 31 are the same as the reference potential of the ground of the control unit 41.

[0038] Each switch unit 74 is switchable between a first state ST1 and a second state ST2. The first state ST1 is a state in which the abnormality detection circuit 72 and the head element 31p are connected and the abnormality detection circuit 72 and the reference resistance element 73 are disconnected. The second state ST2 is a state in which the abnormality detection circuit 72 and the reference resistance element 73 are connected and the abnormality detection circuit 72 and the head element 31p are disconnected. Each switch unit 74 is maintained in the first state ST1 while the disk device 100 is being used normally. Each switch unit 74 is disposed between the terminal of the preamplifier 50 to which the head element 31p is connected and the corresponding abnormality detection circuit 72.

[0039] The multiple switch sections 74 include switch sections 74a to 74e. Switch section 74a is arranged between terminals 77a1 and 77a2 to which the read head element 31a is connected and the abnormality detection circuit 72a. Switch section 74b is arranged between terminals 77b1 and 77b2 to which the write head element 31b is connected and the abnormality detection circuit 72b. Switch section 74c is arranged between terminal 77c to which the heater element 31c is connected and the abnormality detection circuit 72c. Switch section 74d is arranged between terminals 77d1 and 77d2 to which the sensor element 31d is connected and the abnormality detection circuit 72d. Switch section 74e is arranged between terminals 77e1 and 77e2 to which the assist element 31e is connected and the abnormality detection circuit 72e.

[0040] In the first embodiment, the switch unit 74a includes a pair of switch elements 75a and a pair of switch elements 76a. The pair of switch elements 75a are provided on a pair of wirings 78a and 79a, respectively. The pair of switch elements 76a are provided on a wiring that connects the wiring 78a and one end of the reference resistor 73a, and a wiring that connects the wiring 79a and the other end of the reference resistor 73a, respectively. Each of the switch elements 75a and 76a is a transistor, for example, a field effect transistor (FET). Each of the switch elements 75a and 76a is switched between an ON state and an OFF state. In the OFF state, each of the switch elements 75a and 76a cuts off the wiring on which the switch element 75a and 76a is provided.

[0041] The pair of switch elements 75a are driven in conjunction with each other. The ON / OFF states of the pair of switch elements 75a are the same. The pair of switch elements 76a are driven in conjunction with each other. The ON / OFF states of the pair of switch elements 76a are the same. The ON / OFF states of the pair of switch elements 76a are opposite to the ON / OFF states of the pair of switch elements 75a. In other words, when the pair of switch elements 76a are in the ON state, the pair of switch elements 75a are in the OFF state. When the pair of switch elements 76a are in the OFF state, the pair of switch elements 75a are in the ON state.

[0042] When the pair of switch elements 75a are in the ON state, the abnormality detection circuit 72a and the read head element 31a are connected. When the pair of switch elements 75a are in the OFF state, the abnormality detection circuit 72a and the read head element 31a are disconnected. When the pair of switch elements 76a are in the ON state, the abnormality detection circuit 72a and the reference resistance element 73a are connected. When the pair of switch elements 76a are in the OFF state, the abnormality detection circuit 72a and the reference resistance element 73a are disconnected. When the pair of switch elements 75a are in the ON state and the pair of switch elements 76a are in the OFF state, the switch unit 74a is in the first state ST1. When the pair of switch elements 75a are in the OFF state and the pair of switch elements 76a are in the ON state, the switch unit 74a is in the second state ST2. FIG. 4 shows the case where the switch unit 74a is in the first state ST1. FIG. 5 shows the case where the switch unit 74a is in the second state ST2.

[0043] Switch unit 74b has the same configuration as switch unit 74a except for the connected abnormality detection circuit 72. Switch unit 74d has the same configuration as switch unit 74a except for the connected abnormality detection circuit 72. Switch unit 74e has the same configuration as switch unit 74a except for the connected abnormality detection circuit 72.

[0044] In the first embodiment, the switch unit 74c includes a switch element 75c and a switch element 76c. The switch element 75c is provided on a wiring 78c. The switch element 76c is provided on a wiring connecting the wiring 78c and one end of the reference resistor 73c. ​​The switch elements 75c and 76c are similar to the switch elements 75a and 76a described above.

[0045] The preamplifier 50 has an interface unit 52 and a register 53. The register 53 is a memory unit that stores data related to the state of the preamplifier 50. The register 53 stores data indicating the state of each of the plurality of abnormality detection circuits 72. The data indicating the state of the abnormality detection circuit 72 is data indicating whether or not the abnormality detection circuit 72 has detected an abnormality.

[0046] The register 53 stores data indicating whether to set the switch unit 74 to the first state ST1 or the second state ST2. The register 53 stores, for example, data indicating whether to set each of the plurality of switch units 74 to the first state ST1 or the second state ST2.

[0047] The interface unit 52 is capable of communicating with the control unit 41 via the flexible substrate 60. In the first embodiment, the interface unit 52 is capable of serial communication with the control unit 41. A serial signal SS transmitted from the control unit 41 via the flexible substrate 60 is input to the interface unit 52. The interface unit 52 is connected to a register 53. Based on the received serial signal SS, the interface unit 52 outputs data stored in the register 53 to the control unit 41. For example, if the received serial signal SS is a signal that causes data indicating the state of the abnormality detection circuit 72 to be output, the interface unit 52 outputs the data indicating the state of the abnormality detection circuit 72 to the control unit 41.

[0048] The interface unit 52 rewrites the data in the register 53 based on the received serial signal SS. For example, if the received serial signal SS is a signal to switch the state of a certain switch unit 74 to the second state ST2, the interface unit 52 rewrites the data in the corresponding location in the register 53 with data that changes the state of the certain switch unit 74 to the second state ST2. As a result, the state of the certain switch unit 74 is switched to the second state ST2.

[0049] 6 is a flowchart showing an example of the procedure of the analysis method of the first embodiment. The analysis method of the first embodiment includes analyzing an abnormality detected in the preamplifier 50 provided in the head assembly 30. As shown in FIG. 6, the analysis method of the first embodiment includes step S1 in which an abnormality is detected, step S2 in which the switch unit 74 is set to the second state ST2, step S3 in which it is determined whether the abnormality has been resolved, step S4 in which it is determined that an abnormality has occurred in the head element 31p, and step S5 in which it is determined that an abnormality has occurred in the abnormality detection circuit 72.

[0050] In step S1, an abnormality is detected by the abnormality detection circuit 72. When at least one of the multiple abnormality detection circuits 72 detects an abnormality, a fault signal output from the preamplifier 50 changes to a state indicating that an abnormality has been detected. The fault signal output from the preamplifier 50 is input to the control unit 41. Therefore, the control unit 41 determines that an abnormality has been detected in the preamplifier 50 based on the input fault signal. When the control unit 41 determines that an abnormality has been detected in the preamplifier 50, it prohibits writing of data to the disk 20, reading of data from the disk 20, etc., and sends a signal to a higher-level device (not shown) informing that an abnormality has occurred.

[0051] In step S2 of the first embodiment, the operator performing the analysis sends a command to the control unit 41 to set the switch unit 74 to the second state ST2. Therefore, as shown in FIG. 5, the abnormality detection circuit 72 is connected to the reference resistor element 73, and the abnormality detection circuit 72 is disconnected from the head element 31p. Thus, in the analysis method of the first embodiment, analyzing the abnormality detected in the preamplifier 50 includes switching the switch unit 74 to the second state ST2 when the abnormality detection circuit 72 detects an abnormality while the switch unit 74 is in the first state ST1. In step S2, the operator sends a command to the control unit 41, for example, via a host device (not shown) connected via a connection cable (not shown) connected to the connection terminal 82.

[0052] In step S3 of the first embodiment, the operator performing the analysis checks the fault signal output to the control unit 41 and determines whether the abnormality has been resolved. In step S3, the operator checks the fault signal output to the control unit 41 via a host device (not shown) connected via a connection cable (not shown) connected to the connection terminal 82. If the fault signal output to the control unit 41 in step S3 indicates a normal state, the operator can determine that the abnormality has been resolved (step S3: YES). When the switch unit 74 is in the second state ST2, the abnormality detection circuit 72 is connected to the reference resistance element 73 rather than the head element 31p. Since the abnormality detection circuit 72 did not detect an abnormality in the second state ST2, the operator can determine that the abnormality was present in the head element 31p that was connected to the abnormality detection circuit 72 when the abnormality was detected (step S4). Thus, in the analysis method of the first embodiment, analyzing the abnormality detected in the preamplifier 50 includes determining that the head element 31p has an abnormality if the abnormality detection circuit 72 did not detect an abnormality when the switch unit 74 is in the second state ST2.

[0053] On the other hand, if the fault signal output to the control unit 41 in step S3 remains a signal indicating an abnormal state, the operator can determine that the abnormality has not been resolved (step S3: NO). Because the abnormality detection circuit 72 continues to detect an abnormality even in the second state ST2 in which the abnormality detection circuit 72 is connected to the reference resistor element 73 rather than the head element 31p, the operator can determine that the abnormality detected by the abnormality detection circuit 72 when the switch unit 74 is in the first state ST1 is a false detection and that the abnormality is in the abnormality detection circuit 72, not the head element 31p (step S5). Thus, in the analysis method of the first embodiment, analyzing the abnormality detected in the preamplifier 50 includes determining that the abnormality exists in the abnormality detection circuit 72 when the abnormality detection circuit 72 detects an abnormality when the switch unit 74 is in the second state ST2.

[0054] As a result, the operator performing the analysis can determine whether the abnormality detected by the abnormality detection circuit 72 is an abnormality occurring in the head element 31p or in the abnormality detection circuit 72. The operator performing the analysis can identify which head element 31p or which abnormality detection circuit 72 has experienced the abnormality by sending a command to the preamplifier 50 via the control unit 41 and reading out the data indicating the state of the abnormality detection circuit 72 stored in the register 53. The operation of reading out the data from the register 53 may be performed at any stage of the analysis.

[0055] For example, before performing step S2, the operator performing the analysis may send a command to the preamplifier 50 via the control unit 41 to read data indicating the state of the abnormality detection circuit 72 stored in the register 53. In this case, the operator may set only the switch unit 74 provided for the abnormality detection circuit 72 that detected the abnormality to the second state ST2 in step S2. Note that the operator may set all switch units 74 to the second state ST2 in step S2.

[0056] For example, when analyzing an abnormality detected in the control device 40, the operator performing the analysis replaces the control device 40 externally attached to the case 10 with another control device 40 that has been confirmed to be operating normally. If the control device 40 continues to detect an abnormality in this state, the operator can determine that the abnormality is in another device connected to the control device 40. Furthermore, if the control device 40 no longer detects an abnormality in this state, the operator can determine that the abnormality is in the control device 40 that was originally attached. In other words, if the abnormality is detected in a control device 40 externally attached to the case 10, the abnormality can be easily analyzed simply by replacing the control device 40 from outside the disk device 100. Note that the other device connected to the control device 40 may be, for example, a voice coil motor or a spindle motor (not shown).

[0057] On the other hand, in the past, when an abnormality was detected in the preamplifier 50 provided in the head assembly 30, it was necessary to remove the lid 12 of the case 10 and take out the head assembly 30 for analysis. In other words, in order to analyze an abnormality detected in the preamplifier 50 disposed within the disk drive 100, it was necessary to disassemble the disk drive 100. Furthermore, when analyzing the head elements 31p, it was necessary to observe the connection state between the flexible substrate 60 and the terminals of the head elements 31p using a microscope and to check the resistance value of each head element 31p. Furthermore, when analyzing the preamplifier 50, it was necessary to remove the head 31 from the flexible substrate 60 and perform a test to confirm the functionality of the preamplifier 50 alone and isolate the defective part. Therefore, in the past, there was a problem of increased man-hours required for analyzing an abnormality detected in the preamplifier 50.

[0058] In contrast, according to the first embodiment, the preamplifier 50 includes an abnormality detection circuit 72 connected to the head element 31p of the head 31 of the head assembly 30, a reference resistor 73 having a resistance value corresponding to the resistance value of the head element 31p and connected to the abnormality detection circuit 72, and a switch unit 74 switchable between a first state ST1 and a second state ST2. The first state ST1 connects the abnormality detection circuit 72 to the head element 31p and disconnects the abnormality detection circuit 72 from the reference resistor 73. The second state ST2 connects the abnormality detection circuit 72 to the reference resistor 73 and disconnects the abnormality detection circuit 72 from the head element 31p. Therefore, as described above, when an abnormality is detected in the abnormality detection circuit 72, the switch unit 74 can be switched from the first state ST1 to the second state ST2 to disconnect the abnormality detection circuit 72 from the head element 31p and connect it to the reference resistor 73. By checking whether an abnormality continues to be detected in this second state ST2, the worker performing the analysis can easily determine whether the cause of the detected abnormality lies in the head element 31p or the abnormality detection circuit 72. Therefore, the worker can analyze the cause of the abnormality detected in the preamplifier 50 simply by performing work externally on the control device 40, without disassembling the disk device 100. This reduces the amount of work required to analyze the abnormality detected in the preamplifier 50.

[0059] According to the first embodiment, the analysis method includes analyzing an abnormality detected in the preamplifier 50. Analyzing the abnormality includes switching the switch unit 74 to the second state ST2 when the abnormality detection circuit 72 detects an abnormality while the switch unit 74 is in the first state ST1. Therefore, as described above, the operator performing the analysis can easily determine whether the cause of the detected abnormality is the head element 31p or the abnormality detection circuit 72.

[0060] According to the first embodiment, analyzing the abnormality detected in the preamplifier 50 includes determining that there is an abnormality in the head element 31p if the abnormality detection circuit 72 does not detect an abnormality when the switch unit 74 is in the second state ST2, and determining that there is an abnormality in the abnormality detection circuit 72 if the abnormality detection circuit 72 detects an abnormality when the switch unit 74 is in the second state ST2. Therefore, the operator performing the analysis can easily determine whether the cause of the detected abnormality is the head element 31p or the abnormality detection circuit 72.

[0061] According to the first embodiment, the disk drive 100 includes a head assembly 30 having a preamplifier 50, a case 10 that houses the head assembly 30, a control device 40 that controls the preamplifier 50, and a connection terminal 82 that is exposed to the outside of the case 10 and electrically connected to the control device 40. Therefore, an operator performing an analysis can connect a connection cable (not shown) from outside the disk drive 100 to the connection terminal 82. The operator can connect the disk drive 100 to a host device (not shown) via the connection cable. This allows the operator to send a command from the host device to the control device 40 to set the switch unit 74 to the second state ST2 without disassembling the disk drive 100. Furthermore, the operator can check the signal output from the control device 40 via the host device without disassembling the disk drive 100, and determine whether the abnormality has been resolved when the switch unit 74 is in the second state ST2.

[0062] According to the first embodiment, the head element 31p includes a read head element 31a that reads data recorded on the disk 20 of the disk drive 100. The abnormality detection circuit 72, the reference resistance element 73, and the switch unit 74 are provided for at least the read head element 31a. This allows an operator performing analysis to easily determine whether an abnormality detected by the abnormality detection circuit 72a connected to the read head element 31a is in the read head element 31a or in the abnormality detection circuit 72a. This reduces the amount of work required to analyze an abnormality related to the read head element 31a among the abnormalities detected in the preamplifier 50.

[0063] According to the first embodiment, the head element 31p includes a write head element 31b that writes data to the disk 20 of the disk drive 100. The abnormality detection circuit 72, the reference resistance element 73, and the switch unit 74 are provided for at least the write head element 31b. This allows the operator performing the analysis to easily determine whether the abnormality detected by the abnormality detection circuit 72b connected to the write head element 31b is in the write head element 31b or in the abnormality detection circuit 72b. This reduces the amount of work required to analyze abnormalities related to the write head element 31b among those detected in the preamplifier 50.

[0064] According to the first embodiment, the head element 31p includes a heater element 31c that can adjust the distance between the disk 20 and the head 31 of the disk drive 100. The abnormality detection circuit 72, the reference resistance element 73, and the switch unit 74 are provided for at least the heater element 31c. This allows an operator performing analysis to easily determine whether an abnormality detected by the abnormality detection circuit 72c connected to the heater element 31c is in the heater element 31c or in the abnormality detection circuit 72c. This reduces the amount of work required to analyze an abnormality related to the heater element 31c among the abnormalities detected in the preamplifier 50.

[0065] According to the first embodiment, the head element 31p includes a sensor element 31d capable of detecting contact between the disk 20 of the disk drive 100 and the head 31. The abnormality detection circuit 72, the reference resistance element 73, and the switch unit 74 are provided for at least the sensor element 31d. This allows an operator performing an analysis to easily determine whether an abnormality detected by the abnormality detection circuit 72d connected to the sensor element 31d is due to the sensor element 31d or the abnormality detection circuit 72d. This reduces the amount of work required to analyze abnormalities related to the sensor element 31d among those detected in the preamplifier 50.

[0066] According to the first embodiment, the head element 31p includes an assist element 31e that assists in writing data to the disk 20 of the disk drive 100. The abnormality detection circuit 72, the reference resistance element 73, and the switch unit 74 are provided for at least the assist element 31e. Therefore, an operator performing an analysis can easily determine whether an abnormality detected by the abnormality detection circuit 72e connected to the assist element 31e is in the assist element 31e or in the abnormality detection circuit 72e. This reduces the amount of work required to analyze an abnormality related to the assist element 31e among abnormalities detected in the preamplifier 50.

[0067] According to the first embodiment, the head 31 has a plurality of head elements 31p. An abnormality detection circuit 72, a reference resistance element 73, and a switch unit 74 are provided for each of the plurality of head elements 31p. Therefore, an operator performing an analysis can easily determine whether an abnormality detected by each abnormality detection circuit 72 connected to the plurality of head elements 31p is in the head element 31p or in the abnormality detection circuit 72. Therefore, even if an abnormality occurs in any of the plurality of head elements 31p in the preamplifier 50, the amount of work required to analyze the abnormality can be reduced.

[0068] (Second embodiment) The second embodiment differs from the first embodiment in that the control device 40 analyzes an abnormality detected in the preamplifier 50. In the second embodiment, the control unit 41 of the control device 40 executes the analysis method shown in the flowchart of FIG. 6. When the abnormality detection circuit 72 of the preamplifier 50 detects an abnormality in step S1, a fault signal is output from the preamplifier 50 to the control unit 41, indicating that an abnormality has been detected. The control unit 41 determines that an abnormality has been detected in the preamplifier 50 based on the fault signal.

[0069] After determining that an abnormality has been detected, in step S2, the control unit 41 sends a serial signal SS to the preamplifier 50, rewrites the data in the corresponding location of the register 53 of the preamplifier 50, and sets the switch unit 74 to the second state ST2. That is, in the second embodiment, if the abnormality detection circuit 72 detects an abnormality while the switch unit 74 is in the first state ST1, the control unit 41 switches the switch unit 74 to the second state ST2. In step S2, the control unit 41, for example, refers to the register 53 of the preamplifier 50 to identify the abnormality detection circuit 72 that detected the abnormality, and sets only the switch unit 74 connected to the identified abnormality detection circuit 72 to the second state ST2. Note that in step S2, the control unit 41 may set all switch units 74 to the second state ST2.

[0070] After setting the switch unit 74 to the second state ST2, the control unit 41 determines in step S3 whether the abnormality has been resolved. In step S3, the control unit 41 determines whether the abnormality detected in the preamplifier 50 has been resolved based on the fault signal. If it is determined in step S3 that the abnormality has been resolved (step S3: YES), the control unit 41 determines that the head element 31p has an abnormality (step S4). If it is determined in step S3 that the abnormality has not been resolved (step S3: NO), the control unit 41 determines that the abnormality detection circuit 72 has an abnormality (step S5). As described above, in the second embodiment, the control unit 41 of the control device 40 determines that the head element 31p has an abnormality if the abnormality detection circuit 72 does not detect an abnormality when the switch unit 74 is in the second state ST2, and determines that the abnormality detection circuit 72 has an abnormality if the abnormality detection circuit 72 detects an abnormality when the switch unit 74 is in the second state ST2.

[0071] After determining whether the abnormality is in the head element 31p or the abnormality detection circuit 72, the control unit 41 outputs the analysis result to a higher-level device (not shown). The analysis result output by the control unit 41 includes information indicating whether the abnormality is determined to be in the head element 31p or the abnormality detection circuit 72, and information that can identify the head element 31p or the abnormality detection circuit 72 that is determined to be abnormal. The control unit 41 may output the entire analysis result to the higher-level device, or may output only a portion of the analysis result to the higher-level device. Note that the control unit 41 does not have to output the analysis result to the higher-level device. The control unit 41 stores the analysis result in a storage unit, such as a non-volatile memory 43 in the control device 40, for example. Other configurations and methods in the second embodiment are similar to those in the first embodiment.

[0072] According to the second embodiment, the control device 40 includes a control unit 41 that controls the preamplifier 50. If the abnormality detection circuit 72 detects an abnormality while the switch unit 74 is in the first state ST1, the control unit 41 switches the switch unit 74 to the second state ST2. Therefore, when an abnormality is detected in the preamplifier 50, the control unit 41 can automatically switch the state of the switch unit 74 to the second state ST2. This eliminates the need for a human being to switch the switch unit 74 to the second state ST2 via the control unit 41. This further reduces the amount of work required to analyze an abnormality detected in the preamplifier 50.

[0073] According to the second embodiment, when the switch unit 74 is in the second state ST2 and the abnormality detection circuit 72 does not detect an abnormality, the control unit 41 determines that an abnormality exists in the head element 31p. When the switch unit 74 is in the second state ST2 and the abnormality detection circuit 72 detects an abnormality, the control unit 41 determines that an abnormality exists in the abnormality detection circuit 72. Therefore, the control unit 41 automatically analyzes whether an abnormality occurring in the preamplifier 50 has occurred in the head element 31p or the abnormality detection circuit 72. This automatically analyzes an abnormality detected in the preamplifier 50 without manual intervention. This effectively reduces the amount of work required to analyze an abnormality detected in the preamplifier 50. The control unit 41 outputs the analysis results to a host device (not shown), allowing a user or other user of the host device to obtain the analysis results. Furthermore, when the control unit 41 stores the analysis results in a memory unit of the disk device 100, a user or other user can obtain the analysis results by accessing the memory unit of the disk device 100 via the host device or the control unit 41.

[0074] (Third embodiment) The third embodiment differs from the first embodiment in that a preamplifier 350 includes a control unit 355. Fig. 7 is a block diagram showing a part of a disk device 300 of the third embodiment. In the following description, the same components as those in the above-described embodiments may be denoted by the same reference numerals as appropriate and the description thereof may be omitted.

[0075] 7, the preamplifier 350 of the disk device 300 includes a control unit 355. The control unit 355 can control the preamplifier 350 without receiving a command from the control unit 41 of the control device 40. In the third embodiment, the control unit 355 of the preamplifier 350 executes the analysis method shown in the flowchart of Fig. 6. When the abnormality detection circuit 72 detects an abnormality in step S1, the control unit 355 receives a fault signal output from the abnormality detection circuit 72 and determines that an abnormality has been detected.

[0076] After determining that an abnormality has been detected, the control unit 355 sets the switch unit 74 to the second state ST2 in step S2. That is, in the third embodiment, if the abnormality detection circuit 72 detects an abnormality while the switch unit 74 is in the first state ST1, the control unit 355 of the preamplifier 350 switches the switch unit 74 to the second state ST2. In step S2, for example, the control unit 355 sets only the switch unit 74 connected to the abnormality detection circuit 72 that output the signal detecting the abnormality to the second state ST2. Note that in step S2, the control unit 355 may set all switch units 74 to the second state ST2. In step S2, the control unit 355 may set the switch unit 74 to the second state ST2 by rewriting the data in the corresponding location of the register 53, or may directly send a command to the switch unit 74 to set the switch unit 74 to the second state ST2 without going through the register 53.

[0077] After setting the switch unit 74 to the second state ST2, the control unit 355 determines in step S3 whether the abnormality has been resolved. In step S3, the control unit 355 determines whether the abnormality detected in the abnormality detection circuit 72 has been resolved based on the fault signal. If it is determined in step S3 that the abnormality has been resolved (step S3: YES), the control unit 355 determines that the head element 31p has an abnormality (step S4). If it is determined in step S3 that the abnormality has not been resolved (step S3: NO), the control unit 355 determines that the abnormality detection circuit 72 has an abnormality (step S5). As described above, the control unit 355 of the preamplifier 350 in the third embodiment determines that the head element 31p has an abnormality if the abnormality detection circuit 72 does not detect an abnormality when the switch unit 74 is in the second state ST2, and determines that the abnormality detection circuit 72 has an abnormality if the abnormality detection circuit 72 detects an abnormality when the switch unit 74 is in the second state ST2.

[0078] After determining whether the abnormality is in the head element 31p or the abnormality detection circuit 72, the control unit 355 stores the analysis result in the register 53 and outputs the analysis result to the control unit 41 of the control device 40. The analysis result output by the control unit 355 includes information indicating whether it has been determined that the abnormality is in the head element 31p or the abnormality detection circuit 72, and information that can identify the head element 31p or the abnormality detection circuit 72 that has been determined to have an abnormality. The control unit 355 may output the entire analysis result to the control unit 41, or may output only a part of the analysis result to the control unit 41. The control unit 355 does not have to output the analysis result to the control unit 41. Other configurations and methods in the third embodiment are the same as those in the second embodiment.

[0079] According to the third embodiment, the preamplifier 350 includes a control unit 355. When the anomaly detection circuit 72 detects an abnormality while the switch unit 74 is in the first state ST1, the control unit 355 switches the switch unit 74 to the second state ST2. Therefore, as in the second embodiment, the state of the switch unit 74 can be automatically switched to the second state ST2 without manual intervention. This further reduces the amount of work required to analyze an abnormality detected in the preamplifier 350. Furthermore, when an abnormality is detected in the preamplifier 350, the preamplifier 350 itself switches the state of the switch unit 74 to the second state ST2. This makes it easier to switch the switch unit 74 to the second state ST2 in a shorter time than when the control device 40 switches the switch unit 74 to the second state ST2. Furthermore, by configuring each abnormality detection circuit 72 to send a signal to the control unit 355 when an abnormality occurs, the control unit 355 can identify the abnormality detection circuit 72 in which the abnormality occurred without referring to the register 53. This allows the control unit 355 to easily set only the switch unit 74 connected to the abnormality detection circuit 72 in which an abnormality has occurred to the second state ST2 in a short time.

[0080] According to the third embodiment, the control unit 355 of the preamplifier 350 determines that the head element 31p is abnormal if the abnormality detection circuit 72 does not detect an abnormality when the switch unit 74 is in the second state ST2, and determines that the abnormality detection circuit 72 is abnormal if the abnormality detection circuit 72 detects an abnormality when the switch unit 74 is in the second state ST2. Therefore, as in the second embodiment, an abnormality detected in the preamplifier 350 is automatically analyzed without manual intervention. This effectively reduces the amount of work required to analyze an abnormality detected in the preamplifier 350. Furthermore, the preamplifier 350 can self-analyze the abnormality without the intervention of a control device 40 external to the preamplifier 350. Therefore, even in a disk drive equipped with a control device 40 that does not include a program for analyzing an abnormality detected in the preamplifier 350, the preamplifier 350 can analyze the abnormality by itself. The control unit 355 outputs the analysis results to the control device 40, allowing a user of a higher-level device to obtain the analysis results. Furthermore, if the analysis results of the control unit 355 are simply stored in the register 53, the user or the like can obtain the analysis results by referring to the data in the register 53 via the control unit 41 of the control device 40.

[0081] According to at least one of the above-described embodiments, the preamplifier is a preamplifier provided in a head assembly of a disk drive. The preamplifier of the embodiment includes an abnormality detection circuit connected to a head element of a head of the head assembly; a reference resistor element having a resistance value corresponding to the resistance value of the head element and connected to the abnormality detection circuit; and a switch unit switchable between a first state and a second state. The first state connects the abnormality detection circuit to the head element and disconnects the abnormality detection circuit from the reference resistor element. The second state connects the abnormality detection circuit to the reference resistor element and disconnects the abnormality detection circuit from the head element. This allows for easy determination of whether the abnormality occurred in the head element or the abnormality detection circuit by switching the switch unit to the second state when an abnormality is detected in the preamplifier and determining whether the abnormality has been resolved. This reduces the amount of work required to analyze an abnormality detected in the preamplifier.

[0082] The switch unit may have any configuration as long as it can be switched between a first state and a second state. The switch unit may be a circuit configured with a transistor and other elements. The switch unit may be configured with elements other than transistors. If the head has multiple head elements, the abnormality detection circuit, reference resistance element, and switch unit may be provided for only some of the multiple head elements. The abnormality detection circuit may be a circuit with any configuration as long as it can detect an abnormality in the head element. The resistance value of the reference resistance element is not particularly limited as long as it corresponds to the resistance value of the head element.

[0083] The method of switching the switch unit from the first state to the second state is not particularly limited. For example, the preamplifier may be equipped with a diagnostic mode. In this case, the switch unit may be switched to the second state by placing the preamplifier in the diagnostic mode. In the diagnostic mode, all switch units may be switched to the second state, or only the switch unit connected to the abnormality detection circuit in which an abnormality has been detected may be switched to the second state.

[0084] At least a portion of the functions of the control unit of the control device in the disk device described in the above-mentioned embodiment and at least a portion of the functions of the control unit of the preamplifier are realized, for example, by a microprocessor executing a program, i.e., software, stored in a storage unit. The program is, for example, a program that causes a computer to execute the analysis method described in the above-mentioned embodiment. Note that at least a portion of the functions of the control unit of the control device in the disk device and at least a portion of the functions of the control unit of the preamplifier may be realized by hardware including circuit units such as LSI (Large Scale Integration), ASIC (Application Specific Integrated Circuit), FPGA (Field-Programmable Gate Array), and GPU (Graphics Processing Unit), or may be realized by a combination of software and hardware.

[0085] The preamplifier, the disk device, the control device, and the analysis method according to the embodiments include the following additional aspects. (Appendix 1) A preamplifier provided in a head assembly of a disk device, an abnormality detection circuit connected to a head element of the head of the head assembly; a reference resistor element having a resistance value corresponding to the resistance value of the head element and connected to the abnormality detection circuit; a switch unit that can be switched between a first state and a second state; Equipped with the first state is a state in which the abnormality detection circuit and the head element are connected and the abnormality detection circuit and the reference resistance element are disconnected, The second state is a state in which the abnormality detection circuit and the reference resistance element are connected, and the abnormality detection circuit and the head element are disconnected. (Appendix 2) the head element includes a read head element that reads data recorded on a disk of the disk device, 2. The preamplifier according to claim 1, wherein the abnormality detection circuit, the reference resistance element, and the switch section are provided for at least the read head element. (Appendix 3) the head element includes a write head element that writes data onto a disk of the disk device, 3. The preamplifier according to claim 1, wherein the abnormality detection circuit, the reference resistance element, and the switch unit are provided for at least the write head element. (Appendix 4) the head element includes a heater element that can adjust the distance between the head and a disk of the disk device, 4. The preamplifier according to claim 1, wherein the abnormality detection circuit, the reference resistance element, and the switch unit are provided for at least the heater element. (Appendix 5) the head element includes a sensor element capable of detecting contact between the head and a disk of the disk device, 5. The preamplifier according to claim 1, wherein the abnormality detection circuit, the reference resistance element, and the switch unit are provided for at least the sensor element. (Appendix 6) the head element includes an assist element that assists in writing data to a disk of the disk device, 6. The preamplifier according to claim 1, wherein the abnormality detection circuit, the reference resistance element, and the switch unit are provided for at least the assist element. (Appendix 7) the head has a plurality of the head elements, 7. The preamplifier according to claim 1, wherein the abnormality detection circuit, the reference resistance element, and the switch unit are provided for each of a plurality of the head elements. (Appendix 8) A control unit is provided, 8. The preamplifier according to claim 1, wherein the control unit switches the switch unit to the second state when the abnormality detection circuit detects an abnormality while the switch unit is in the first state. (Appendix 9) The preamplifier described in Appendix 8, wherein the control unit determines that there is an abnormality in the head element if the abnormality detection circuit does not detect an abnormality when the switch unit is in the second state, and determines that there is an abnormality in the abnormality detection circuit if the abnormality detection circuit detects an abnormality when the switch unit is in the second state. (Appendix 10) A head assembly having a preamplifier according to any one of Supplementary Note 1 to Supplementary Note 9; a case that houses the head assembly; a control device for controlling the preamplifier; a connection terminal exposed to the outside of the case and electrically connected to the control device; A disk device comprising: (Appendix 11) a control unit for controlling a preamplifier provided in a head assembly of the disk device; The preamplifier is an abnormality detection circuit connected to a head element of the head of the head assembly; a reference resistor element having a resistance value corresponding to the resistance value of the head element and connected to the abnormality detection circuit; a switch unit that can be switched between a first state and a second state; and the first state is a state in which the abnormality detection circuit and the head element are connected and the abnormality detection circuit and the reference resistance element are disconnected, the second state is a state in which the abnormality detection circuit and the reference resistance element are connected and the abnormality detection circuit and the head element are disconnected, The control unit switches the switch unit to the second state when the abnormality detection circuit detects an abnormality while the switch unit is in the first state. (Appendix 12) The control device described in Appendix 11, wherein the control unit determines that there is an abnormality in the head element if the abnormality detection circuit does not detect an abnormality when the switch unit is in the second state, and determines that there is an abnormality in the abnormality detection circuit if the abnormality detection circuit detects an abnormality when the switch unit is in the second state. (Appendix 13) analyzing an abnormality detected in a preamplifier provided in a head assembly of a disk drive; The preamplifier is an abnormality detection circuit connected to a head element of the head of the head assembly; a reference resistor element having a resistance value corresponding to the resistance value of the head element and connected to the abnormality detection circuit; a switch unit that can be switched between a first state and a second state; and the first state is a state in which the abnormality detection circuit and the head element are connected and the abnormality detection circuit and the reference resistance element are disconnected, the second state is a state in which the abnormality detection circuit and the reference resistance element are connected and the abnormality detection circuit and the head element are disconnected, The analyzing method includes switching the switch unit to the second state when the abnormality detection circuit detects an abnormality while the switch unit is in the first state. (Appendix 14) The analysis method described in Appendix 13, wherein analyzing the abnormality includes determining that there is an abnormality in the head element if the abnormality detection circuit does not detect an abnormality when the switch unit is in the second state, and determining that there is an abnormality in the abnormality detection circuit if the abnormality detection circuit detects an abnormality when the switch unit is in the second state.

[0086] Although several embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the spirit of the invention. These embodiments and their modifications are included within the scope and spirit of the invention, as well as the inventions described in the claims and their equivalents. [Explanation of symbols]

[0087] 10...Case, 20...Disk, 30...Head assembly, 31...Head, 31a...Read head element, 31b...Write head element, 31c...Heater element, 31d...Sensor element, 31e...Assist element, 31p...Head element, 40...Control device, 41,355...Control unit, 50,350...Preamplifier, 72,72a,72b,72c,72d,72e...Abnormality detection circuit, 73,73a,73b,73c,73d,73e...Reference resistance element, 74,74a,74b,74c,74d,74e...Switch unit, 82...Connection terminal, 100,300...Disk device, ST1...First state, ST2...Second state

Claims

1. A preamplifier provided in a head assembly of a disk device, an abnormality detection circuit connected to a head element of the head of the head assembly; a reference resistor element having a resistance value corresponding to the resistance value of the head element and connected to the abnormality detection circuit; a switch unit that can be switched between a first state and a second state; Equipped with the first state is a state in which the abnormality detection circuit and the head element are connected and the abnormality detection circuit and the reference resistance element are disconnected, The second state is a state in which the abnormality detection circuit and the reference resistance element are connected, and the abnormality detection circuit and the head element are disconnected.

2. the head element includes a read head element that reads data recorded on a disk of the disk device, 2. The preamplifier according to claim 1, wherein the abnormality detection circuit, the reference resistance element, and the switch section are provided for at least the read head element.

3. the head element includes a write head element that writes data onto a disk of the disk device, 2. The preamplifier according to claim 1, wherein the abnormality detection circuit, the reference resistance element, and the switch section are provided for at least the write head element.

4. the head element includes a heater element that can adjust the distance between the head and a disk of the disk device, 2. The preamplifier according to claim 1, wherein the abnormality detection circuit, the reference resistance element, and the switch section are provided for at least the heater element.

5. the head element includes a sensor element capable of detecting contact between the head and a disk of the disk device, 2. The preamplifier according to claim 1, wherein the abnormality detection circuit, the reference resistance element, and the switch section are provided for at least the sensor element.

6. the head element includes an assist element that assists in writing data to a disk of the disk device, 2. The preamplifier according to claim 1, wherein the abnormality detection circuit, the reference resistance element, and the switch section are provided for at least the assist element.

7. the head has a plurality of the head elements, 2. The preamplifier according to claim 1, wherein the abnormality detection circuit, the reference resistance element, and the switch section are provided for each of a plurality of the head elements.

8. A control unit is provided, 2. The preamplifier according to claim 1, wherein the control unit switches the switch unit to the second state when the abnormality detection circuit detects an abnormality while the switch unit is in the first state.

9. 9. The preamplifier of claim 8, wherein the control unit determines that there is an abnormality in the head element if the abnormality detection circuit does not detect an abnormality when the switch unit is in the second state, and determines that there is an abnormality in the abnormality detection circuit if the abnormality detection circuit detects an abnormality when the switch unit is in the second state.

10. a head assembly having the preamplifier according to any one of claims 1 to 9; a case that houses the head assembly; a control device for controlling the preamplifier; a connection terminal exposed to the outside of the case and electrically connected to the control device; A disk device comprising:

11. a control unit for controlling a preamplifier provided in a head assembly of the disk device; The preamplifier is an abnormality detection circuit connected to a head element of the head of the head assembly; a reference resistor element having a resistance value corresponding to the resistance value of the head element and connected to the abnormality detection circuit; a switch unit that can be switched between a first state and a second state; and the first state is a state in which the abnormality detection circuit and the head element are connected and the abnormality detection circuit and the reference resistance element are disconnected, the second state is a state in which the abnormality detection circuit and the reference resistance element are connected and the abnormality detection circuit and the head element are disconnected, The control unit switches the switch unit to the second state when the abnormality detection circuit detects an abnormality while the switch unit is in the first state.

12. The control device according to claim 11, wherein the control unit determines that there is an abnormality in the head element if the abnormality detection circuit does not detect an abnormality when the switch unit is in the second state, and determines that there is an abnormality in the abnormality detection circuit if the abnormality detection circuit detects an abnormality when the switch unit is in the second state.

13. analyzing an abnormality detected in a preamplifier provided in a head assembly of a disk drive; The preamplifier is an abnormality detection circuit connected to a head element of the head of the head assembly; a reference resistor element having a resistance value corresponding to the resistance value of the head element and connected to the abnormality detection circuit; a switch unit that can be switched between a first state and a second state; and the first state is a state in which the abnormality detection circuit and the head element are connected and the abnormality detection circuit and the reference resistance element are disconnected, the second state is a state in which the abnormality detection circuit and the reference resistance element are connected and the abnormality detection circuit and the head element are disconnected, The analyzing method includes switching the switch unit to the second state when the abnormality detection circuit detects an abnormality while the switch unit is in the first state.

14. The analysis method of claim 13, wherein analyzing the abnormality includes determining that there is an abnormality in the head element if the abnormality detection circuit does not detect an abnormality when the switch unit is in the second state, and determining that there is an abnormality in the abnormality detection circuit if the abnormality detection circuit detects an abnormality when the switch unit is in the second state.

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