Nonlinear neural network equalizer for high-speed data channels

Abstract

To provide a receiver with nonlinear neural network equalizers for a high speed data channel and provide a method of use.SOLUTION: The present invention provides a method performed by a receiver for use in a data channel on an integrated circuit device. The method comprises steps of: performing nonlinear equalization of digitized samples of an input signal on a data channel; determining respective values of each of the output signals from the nonlinear equalized output signals; and adapting parameters of the nonlinear equalization based on the respective values.SELECTED DRAWING: Figure 11

Description

[Technical Field]

[0001] [CROSS-REFERENCE TO RELATED APPLICATIONS] This disclosure claims the benefit of commonly assigned, co-pending U.S. Provisional Patent Application No. 63 / 112,504, filed November 11, 2020, which is incorporated herein by reference in its entirety.

[0002] This disclosure relates to the use of a nonlinear equalizer on the receiver side of a high-speed data channel. More specifically, this disclosure relates to the use of a nonlinear neural network equalizer on the receiver side of a high-speed SERDES (Serializer-Deserializer) channel on an integrated circuit device. [Background technology]

[0003] The background discussion provided herein is intended to provide a general context for the present disclosure. The work of the inventors herein is not expressly or implicitly admitted to be prior art to the subject matter of the present disclosure, as are aspects of the description that may not be admitted as prior art at the time of filing, provided that that work is described in this background section.

[0004] Many integrated circuit devices, particularly "systems-on-chip" (SoCs), include high-speed serial links between various device components (e.g., individual silicon dice in an SoC). Typical high-speed serial links of that type, commonly known as "SERDES" (serializer / deserializer), can suffer from significant nonlinearities or channel impairments in the signal path, for example, as a result of insertion loss, inter-symbol interference (ISI), and nonlinearities such as scattering losses in optical systems, or crosstalk and jitter in copper (i.e., wiring) systems. To attempt to mitigate such channel impairments, various forms of linear equalization are typically used at the receiver end of such links. However, linear equalization may not be sufficient to compensate for such nonlinearities, especially when the data levels to be distinguished are close to each other. Summary of the Invention

[0005] According to some implementations of the subject matter of this disclosure, a receiver for use in a data channel on an integrated circuit device includes a nonlinear equalizer having digitized samples of signals on the data channel as inputs, a decision circuit configured to determine a respective value of each of the signals from an output of the nonlinear equalizer, and an adaptation circuit configured to adapt parameters of the nonlinear equalizer based on each of the values.

[0006] A first implementation of such a receiver may further include a feedback circuit configured to feed back the value output by the decision circuit to an input of the nonlinear equalizer to mitigate inter-symbol interference.

[0007] In a first example of the first implementation, the feedback circuit may include a decision feedback equalizer.

[0008] In a second example of that first implementation, the nonlinear equalizer may be a neural network equalizer. In a first variation of that first example, the neural network equalizer may be a multilayer perceptron neural network equalizer. In such a variation, the multilayer perceptron neural network equalizer may be a low-complexity multilayer perceptron neural network equalizer.

[0009] In a second implementation of such a receiver, the decision circuit may include a threshold circuit.

[0010] In a first example of the second implementation form, the decision circuit may operate on a code, the threshold circuit may have multiple thresholds, and may select a code from multiple codes based on the value of the output of the nonlinear equalizer for the multiple thresholds.

[0011] In a second example of that second implementation, the decision circuit may operate on bits, the nonlinear equalizer may output a probability prediction for each bit, and the threshold circuit may assign a value to each bit based on a comparison of the probability prediction to 0.5.

[0012] In a third implementation of such a receiver, the adaptation circuit may adapt parameters of the nonlinear equalizer based on a mean square error.

[0013] In a fourth implementation of such a receiver, the adaptation circuit adapts parameters of the nonlinear equalizer based on cross-entropy.

[0014] In a fifth implementation of such a receiver, the nonlinear equalizer may include a linear filter and a nonlinear activation function.

[0015] In a first example of the fifth implementation form, the nonlinear activation function may be a hyperbolic tangent function. In a second example of the fifth implementation form, the nonlinear activation function may be a sigmoid function.

[0016] According to another implementation of the subject matter of the present disclosure, a method for detecting data on a data channel on an integrated circuit device includes performing nonlinear equalization of digitized samples of an input signal on the data channel, determining respective values ​​of each of the output signals from output signals of the nonlinear equalization, and adapting parameters of the nonlinear equalization based on each of the values.

[0017] A first implementation of such a method may further include feeding back one of the respective values ​​output by the determining step to an input of the nonlinear equalization to mitigate inter-symbol interference.

[0018] In a second implementation of such a method, performing the nonlinear equalization may include performing a linear equalization and applying a nonlinear activation function to the signal output by the linear equalization.

[0019] In a third implementation of such a method, each respective value output by the determining step may represent a respective candidate code, and the adapting step may include minimizing a mean squared error between the respective candidate code and a target code.

[0020] In a fourth implementation of such a method, each respective value output by the determining step represents a respective candidate code, and the adapting step may include determining an output code and a log-likelihood ratio of the output code from the respective candidate code, and minimizing cross-entropy between the output code and the log-likelihood ratio of the output code.

[0021] In a fifth implementation of such a method, each respective value output by the determining step represents a respective candidate bit of an output code, and the adapting step may include determining, from each respective candidate bit, a respective output bit and a log-likelihood ratio of the respective output bit, and minimizing the cross-entropy between the log-likelihood ratio of each respective candidate bit and the respective output bit.

[0022] According to yet another implementation of the subject matter of this disclosure, an apparatus for detecting data on a data channel on an integrated circuit device may include means for performing nonlinear equalization of digitized samples of input signals on the data channel, means for determining from output signals of the means for performing the nonlinear equalization respective values ​​of each of the output signals, and means for adapting parameters of the nonlinear equalization based on each of the values.

[0023] A first implementation of such an apparatus may further include means for feeding back one of the respective values ​​output by the means for determining to an input of the means for performing nonlinear equalization to mitigate inter-symbol interference.

[0024] In a second implementation of such an apparatus, the means for performing nonlinear equalization may include means for performing linear equalization and means for applying a nonlinear activation function to a signal output by the means for performing linear equalization.

[0025] In a third implementation of such an apparatus, each respective value output by the means for determining may represent a respective candidate code, and the means for adapting may include means for minimizing a mean square error between the respective candidate code and a target code.

[0026] In a fourth implementation of such an apparatus, each respective value output by the means for determining may represent a respective candidate code, and the means for adapting may include means for determining, from the respective candidate code, an output code and a log-likelihood ratio of the output code, and means for minimizing cross-entropy between the output code and the log-likelihood ratio of the output code.

[0027] In a fifth implementation form of such an apparatus, each respective value output by the means for determining represents a respective candidate bit of an output code, and the means for adapting may include means for determining, from each respective candidate bit, a respective output bit and a log-likelihood ratio of the respective output bit, and means for minimizing cross-entropy between the log-likelihood ratio of each respective candidate bit and the respective output bit. [Brief explanation of the drawings]

[0028] Further features of the present disclosure, its nature and various advantages will become apparent from consideration of the following detailed description taken in conjunction with the accompanying drawings, in which like reference characters refer to like parts throughout.

[0029] [Figure 1] 1A-1C illustrate two different graphical representations of an exemplary signal that may be processed according to implementations of the subject matter of this disclosure.

[0030] [Figure 2] 1 is a schematic representation of a SERDES channel with which implementations of the subject matter of this disclosure may be used.

[0031] [Figure 3] 1 is a plot of an exclusive-OR function in Cartesian coordinate space illustrating a problem solved by implementations of the disclosed subject matter.

[0032] [Figure 4] 4 is a plot of the transformation of the exclusive-OR function of FIG. 3 into different coordinate spaces illustrating a solution based on an implementation of the subject matter of this disclosure.

[0033] [Figure 5] 1 is a diagram of a first implementation of a receiver incorporating the subject matter of the present disclosure.

[0034] [Figure 6] FIG. 1 is a diagram of a second implementation of a receiver incorporating the subject matter of this disclosure.

[0035] [Figure 7] FIG. 10 is a diagram of a third implementation of a receiver incorporating the subject matter of the present disclosure.

[0036] [Figure 8] FIG. 10 is a diagram of a fourth implementation of a receiver incorporating the subject matter of the present disclosure.

[0037] [Figure 9] FIG. 10 is a diagram of a fifth implementation of a receiver incorporating the subject matter of the present disclosure.

[0038] [Figure 10] FIG. 10 is a diagram of a sixth implementation of a receiver incorporating the subject matter of the present disclosure.

[0039] [Figure 11] FIG. 1 is a flow diagram illustrating a method according to an implementation of the subject matter of this disclosure. DETAILED DESCRIPTION OF THE INVENTION

[0040] As noted above, integrated circuit devices may include high-speed SERDES links between various device components. Typical SERDES links may suffer from significant nonlinearities or channel impairments in the signal path, for example, as a result of insertion loss, inter-symbol interference (ISI), and nonlinearities such as scattering losses in optical systems, or crosstalk and jitter in copper (i.e., wiring) systems. Various forms of linear equalization are typically used at the receiver end of such links to attempt to address such channel impairments.

[0041] However, linear equalization may not be sufficient to compensate for such nonlinearities, especially when the data levels to be distinguished are close to each other. For example, in contrast to typical non-return-to-zero (NRZ) signaling, which uses two levels to represent "0" and "1," a SERDES in an SoC device may represent four possible 2-bit codes ("00," "01," "10," and "11") using four-level pulse amplitude modulation (PAM4) signaling, which has four voltage levels but the same maximum voltage amplitude as NRZ signaling. Therefore, rather than one threshold within the voltage range dividing two signal levels, there are three thresholds within the voltage range dividing four signal levels. In some cases, higher-order signaling, such as eight-level pulse amplitude modulation (PAM8) or sixteen-level pulse amplitude modulation (PAM16), is used, in which the signal levels are even closer to each other. When the thresholds are close to each other, linear equalization may not be sufficient to accurately assign samples near the threshold between levels to the correct side of the threshold.

[0042] According to implementations of the subject matter of this disclosure, nonlinear equalization is used to compensate for nonlinearities in the SERDES channel, thereby reducing the bit error rate (BER). Different implementations may use different types of nonlinear equalizers.

[0043] Conceptually, a linear equalizer performs separation of samples for assignment to one level or another by drawing substantially straight lines between groups of samples plotted in a two-dimensional (e.g., (x, y)) space. In channels with poor linearity, or if the levels are too close to each other, there may not be straight lines that can be drawn between samples from different levels on such a plot. A nonlinear equalizer effectively remaps samples into a different space where samples from different levels can be separated by straight lines or other smooth curves.

[0044] Nonlinear equalizers according to implementations of the subject matter of this disclosure may be more or less complex. For example, a nonlinear equalizer may have more or fewer variables or taps, with the complexity being proportional to the number of variables. In addition, a nonlinear equalizer that operates at the bit level, i.e., operates separately on each code bit (e.g., 2 bits / code for PAM4 signaling) rather than on the entire code, may be less complex than a nonlinear equalizer that operates at the code level. In any case, all other considerations being equal, greater complexity results in better performance. However, greater complexity may also require greater device area and / or power consumption.

[0045] Types of nonlinear equalizers that may be used in accordance with the subject matter of this disclosure may include multi-layer perceptron neural network (MLPNN) equalizers and low-complexity multi-layer perceptron neural network (RC-MLPNN) equalizers. Nonlinear equalizers may incorporate or be supplemented by decision feedback equalizers to filter out the contribution of previous results to mitigate inter-symbol interference.

[0046] The performance of a nonlinear equalizer may be affected by the cost function used for equalizer adaptation. For example, according to implementations of the subject matter of this disclosure, a nonlinear equalizer may use one of a variety of different cost functions for adaptation, including either a minimum mean square error (MMSE or MSE) cost function or a cross-entropy (CE)-based cost function. While a CE-based cost function may yield better results than an MMSE cost function, the CE-based cost function is more complex than an MMSE cost function.

[0047] Thus, according to implementations of the subject matter of this disclosure, the choice of which form of nonlinear equalizer to use and which cost function to use can be a cost versus performance trade-off.

[0048] The subject matter of the present disclosure may be better understood by referring to FIGS.

[0049] 1 and 2 illustrate the transmission, reception, and detection of PAM4 signals that may occur on a SERDES channel 200 with which implementations of the subject matter of this disclosure may be used. A set of six 2-bit codes 111, 101 (“00”), 121 (“10”), 131 (“01”), 141 (“10”), 151 (“11”), and 161 (“10”), are transmitted to a transmit end 201 of the channel 200, which, in a particular implementation of the physical topology, may be mounted on a transmitter printed circuit board (PCB) 202 coupled to a channel medium 204 by a connector 203. The channel medium 204 may be an optical (e.g., fiber) channel or a wired channel (e.g., copper wire or PCB trace). At the receive end of the channel 200, a PAM4 receiver 211 may be mounted on a receiver PCB 212 coupled to the channel medium 204 by a connector 213.

[0050] The eye diagram 102 represents an idealized received signal 111-116 with clearly defined data eyes 112, 122, and 132. The sharp dotted lines 142, 152, 162, and 172 represent the actual voltage levels for the four data code values ​​"00," "01," "10," and "11," respectively. The thin dotted lines 110, 120, and 130 represent threshold detection that separates the four data code values ​​"00," "01," "10," and "11." In some implementations, the code values ​​are determined by a slicer (i.e., a multi-level comparator; not shown in FIG. 1 or FIG. 2) that designates any signal below threshold 110 as "00," any signal equal to or greater than threshold 110 but less than threshold 120 as "01," any signal equal to or greater than threshold 120 but less than threshold 130 as "10," and any signal equal to or greater than threshold 130 as "11."

[0051] However, in real-world, non-idealized situations, channels are nonlinear, and samples representing particular code values ​​may not fall neatly between the thresholds as might be expected in an idealized channel. Using only "00" and "01" codes as an example, in a nonlinear channel, most "00" samples will be below threshold 110 and most "01" samples will be above threshold 110 (and below threshold 120), while there may be some "00" samples above threshold 110 and some "01" samples below threshold 110 (and above threshold 120).

[0052] The goal of implementing equalization for a channel is to correct for the various sources of interference mentioned above, thereby essentially moving samples that are on the wrong side of the threshold to the correct side of the threshold. Linear equalization essentially takes a plot of the samples in a two-dimensional (x,y) space and draws a straight line through the samples where the threshold should be. However, in a channel with nonlinearities, there may not be a straight line that can be drawn on the two-dimensional plot that exactly separates the samples. In such cases, nonlinear equalization may be used. Nonlinear equalization may essentially remap the samples to a different space where a straight line that exactly separates the samples does in fact exist.

[0053] Alternatively, the nonlinear equalization function may remap the samples into a space in which there is some smooth curve other than a straight line separating the samples exactly. For example, the nonlinear equalization function may remap the samples into a polar or radial space in which the samples are grouped into circular or annular bands that may be separated by circles or ellipses.

[0054] The advantages of nonlinear equalization over linear equalization in nonlinear channels can be seen in simplified examples such as those shown in FIGS. 3 and 4, where the signal to be equalized is an exclusive OR (XOR or

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[0055] However, the radial basis function

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[0056] As discussed below, various types of nonlinear equalizers are available. The type of nonlinear equalizer used may be adaptive to accommodate changing channel conditions. Various forms of adaptation may be used.

[0057] One type of adaptation function that can be used is the minimum mean square error (MMSE), where the mean square error (MSE) is the mean square error between the equalized signal (Y) and the ideal signal (Y).

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[0058] Another type of adaptation function that can be used is the cross-entropy (CE) between training bits and their log-likelihood ratios (LLRs). In particular, a cost function circuit can be configured to calculate a cross-entropy value that indicates the difference between the probability distribution of the LLR signal and the probability distribution of the training bit values. The cost function circuit then adapts the equalizer to reduce the bit error rate of the channel by setting the equalizer's parameters (e.g., one or more coefficients of the equalizer's filter taps) to values ​​corresponding to the minimum cross-entropy value from the calculated cross-entropy value and one or more previously calculated cross-entropy values. As with MSE equalization, the equalizer can first be adapted in a training mode where ideal signal values ​​are available. Later, during runtime operation, the detected output values ​​of the equalized channel should be sufficiently close to the ideal values ​​to be used for adaptation. Specifically, if any forward error correction code (FEC) decoder (e.g., a Reed-Solomon (RS) decoder or a low-density parity check (LDPC) decoder) is available after the equalizer, successfully decoded frames from the output of the FEC decoder can be used for adaptation.

[0059] LLR may be defined as the relationship between the probability that a bit is a "0" (P0) and the probability that a bit is a "1" (P1).

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[0060]

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[0061] The gradient of the cross-entropy with respect to the LLR can be calculated by substituting for P0 and P1 in the cross-entropy equation.

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[0062] LLR is the cross entropy (i.e.,

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[0063] A negative LLR means that bit=0 has a higher probability than bit=1, while a positive LLR means that bit=1 has a higher probability than bit=0. In these equations, P0 and P1 are probabilities and are therefore positive values, and α is the adaptation bandwidth, which is also positive. Thus, when true bit=0, adaptation using cross-entropy will make the negative LLR more negative, and when true bit=1, adaptation using cross-entropy will make the positive LLR more positive. Therefore, cross-entropy-based adaptation maximizes the magnitude of the LLR and is therefore a maximum likelihood adaptation, which reduces the BER. Thus, adapting the equalizer to minimize cross-entropy also minimizes the BER.

[0064] If we assume a general computation graph from parameters X → Y → LLR → CE, such that parameter X affects the value of output Y, which in turn affects LLR, from which cross-entropy can be calculated, then the gradient of the cross-entropy can be expressed with respect to the other parameters:

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[0065] 5 shows an implementation 500 of receiver 211 in accordance with the subject matter of this disclosure. Receiver 500 includes a nonlinear equalizer 501 in the form of a multi-layer perceptron neural network 541 that provides an equalized signal (Y) 511 from input digitized samples 521, which are delayed in 531 and combined in multi-layer perceptron neural network 541. Slicer 502 provides output decisions 512 that are fed back to multi-layer perceptron neural network 541 to mitigate inter-symbol interference from previous symbols.

[0066] As can be seen in Figure 5, multi-layer perceptron neural network 541 includes at least one hidden layer 550 of hidden nodes 551. Although only one hidden layer 550 is shown in this figure, a multi-layer perceptron neural network equalizer according to an implementation of the disclosed subject matter may have multiple hidden layers (not shown). Similarly, while Figure 5 shows four hidden nodes 551 in hidden layer 550, each hidden layer in a multi-layer perceptron neural network equalizer according to an implementation of the disclosed subject matter may have more or fewer hidden nodes 551, reflecting the number of parameters (filter tap coefficients).

[0067] Each hidden node 551 multiplies a delay sample (only one delay 531 is shown coupled to the node 551 to avoid clutter in the drawing; however, each delay 531 is coupled to a node 551) by a parameter (a filter tap coefficient; not shown) and then sums the filter taps (Σ). Each hidden node 551 then applies a nonlinear activation function (e.g., a hyperbolic tangent activation function) to the computed sum.

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[0068] Hidden node 551 receives input not only from feedforward delay 531 but also from feedback delay 561, which represents samples of previous symbol decisions 560 that have been fed back, to mitigate intersymbol interference.

[0069] The aforementioned parameters of the nonlinear equalizer 501 are adapted based on the output Y. One way to adapt the parameters of the nonlinear equalizer 501 is to use, at 572, the ideal samples derived from the PAM4 training symbols 569 that are then mapped to their respective ideal voltages at 570 (e.g., −1 for “00”, −1 / 3 for “01”, +1 / 3 for “10”, and +1 for “11”).

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[0070] As a rough example of the multi-layer perceptron neural network 541, an implementation 600 (FIG. 6) of the receiver 211 according to the subject matter of this disclosure may include a low-complexity multi-layer perceptron neural network 641 coupled with a decision feedback equalizer 644. The receiver 600 provides an equalized signal (Y) 611 from input digitized samples 621. The low-complexity multi-layer perceptron neural network 641 includes two feed-forward filters 642, 643, which may be, for example, finite impulse response (FIR) filters. The slicer 602 provides an output decision 612 that is fed back through the decision feedback equalizer (DFE) 644 and combined with the output of the second feed-forward filter 643 to mitigate inter-symbol interference from previous symbols. The receiver 600 also includes a non-linear activation function 645 (e.g., a hyperbolic tangent activation function

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[0071] As with the nonlinear equalizer 501 in the receiver 500, the parameters of the nonlinear equalizer 601 are adapted based on the output Y. One approach to adapting the parameters of the nonlinear equalizer 601 is to use ideal samples derived from the PAM4 training symbols 669 that are then mapped to respective ideal voltages in 670 (e.g., −1 for “00”, −1 / 3 for “01”, +1 / 3 for “10”, and +1 for “11”).

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[0072] However, as noted above, cross-entropy may serve as a more effective cost function for adapting the parameters of a nonlinear equalizer to minimize the BER.

[0073] 7 shows an implementation 700 of receiver 211 in accordance with the subject matter of this disclosure. Receiver 700 includes a nonlinear equalizer 701 in the form of a multi-layer perceptron neural network 741 that provides four separate equalized signals (Yij; i=0,1; j=0,1) 711 from input digitized samples 721 that are delayed in 731 and combined in a multi-layer perceptron neural network 741. A softmax function implemented in circuit 702:

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[0074] As in Figure 5, the multi-layer perceptron neural network 741 includes at least one hidden layer 750 of hidden nodes 751. Although only one hidden layer 750 is shown in this figure, a multi-layer perceptron neural network equalizer according to an implementation of the disclosed subject matter may have multiple hidden layers (not shown). Similarly, while Figure 7 shows four hidden nodes 751 in hidden layer 750, each hidden layer in a multi-layer perceptron neural network equalizer according to an implementation of the disclosed subject matter may have more or fewer hidden nodes 751, reflecting the number of parameters (filter tap coefficients).

[0075] Each hidden node 751 multiplies a delay sample (only one delay 731 is shown coupled to the node 751 to avoid clutter in the drawing; however, each delay 731 is coupled to a node 751) by a parameter (a filter tap coefficient; not shown) and then sums the filter taps (Σ). Each hidden node 751 then applies a nonlinear activation function (e.g., a hyperbolic tangent activation function) to the computed sum.

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[0076] Hidden node 751 receives input not only from feedforward delay 731 but also from feedback delay 761, which represents samples of previous symbol decisions 760 that have been fed back, to mitigate intersymbol interference.

[0077] Since the equalizer 701 provides a soft output in the form of LLR, the output can be used with a further outer decoder (not shown), which can be a low-density parity check (LDPC) decoder or a forward error correction (FEC) decoder such as a Reed-Solomon decoder.

[0078] The aforementioned parameters of the nonlinear equalizer 701 are determined by the training code (

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[0079] FIG. 8 illustrates an implementation 800 of a receiver 211 in accordance with the subject matter of this disclosure, including a low-complexity multi-layer perceptron neural network 841 coupled to a decision feedback equalizer 842 and a log-likelihood ratio circuit 843, which inputs an equalized signal (Y) 811 derived from input digitized samples 821 and calculates a target code value

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[0080] The low-complexity multi-layer perceptron neural network 841 includes two feed-forward filters 846, 847, which may be, for example, finite impulse response (FIR) filters, and a nonlinear activation function 848 (e.g., a hyperbolic tangent activation function

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[0081] The parameters of the feedforward filters 846, 847 may be adapted to minimize the cross-entropy between the output log-likelihood ratio (LLRsym) 845 and the "true" code obtained from the true bits, which may be training bits or, during run-time, may be the output of a further outer decoder (not shown). The cross-entropy adaptation circuit 860 has as input the output log-likelihood ratio (LLRsym) 845. In training mode, the cross-entropy adaptation circuit 860 also takes as input known training bits 861, which serve as the "true" bits that are then grouped to obtain the true code. The cross-entropy adaptation circuit 860 then adapts the training bits (

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[0082] Because a neural network equalizer can decorrelate two bits in a PAM4 symbol, a further implementation 900 of receiver 211 according to an implementation of the subject matter of this disclosure may be provided ( FIG. 9 ). Receiver 900 includes an MLPNN equalizer 941 that is similar to MLPNN equalizer 541 in that it includes at least one hidden layer 950 of hidden nodes 951, where delayed samples at 931 (to avoid clutter in the drawing, only one delay 931 is shown as coupled to node 951; however, each delay 931 is coupled to node 951) are multiplied by parameters (filter tap coefficients; not shown) and then the filter taps are summed (Σ). Each hidden node 951 then applies a nonlinear activation function (e.g., a hyperbolic tangent activation function) to the computed sum.

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[0083] MLPNN 941 differs from MLPNN 541 in that final layer 952 contains two nodes 953, 954, where the inputs are not simply summed as in layer 552 of MLPNN 541, but rather a nonlinear activation function is also applied that decorrelates the two bits of each code after summing, different from the nonlinear activation function of node 951, such that each node 953, 954 provides one of the two bits. The nonlinear activation function of each node 953, 954 is a hyperbolic tangent activation function instead of a

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[0084] Node 953 provides a probability prediction 963 (p(bit msb)), and node 954 provides a probability prediction 964 (p(bit lsb The two probability predictions 963, 964 are then compared in slicer 955 with a threshold of 0.5 to obtain a bit prediction (e.g., if p<0.5, then bit=0, and if p≧0.5, then bit=1) for each bit in the code.

[0085] At 956, the separate bits are grouped back into a code, then fed back at 957 and converted at 958 to a corresponding voltage (e.g., -1 for "00", -1 / 3 for "01", +1 / 3 for "10", and +1 for "11") for input to a feedback delay 961 that represents a sample of the previous code decision fed back to the next input from the feedforward delay 931 to mitigate inter-symbol interference.

[0086] Because implementation 900 operates at the bit level rather than the code level, the cross-entropy adaptation circuit 970 also operates at the bit level, determining the cross-entropy based on separate bit-level probabilities 963, 964 and training bits 971, or at runtime, the output 990 of an outer decoder (e.g., an FEC decoder; not shown).

[0087] At the bit level, the cross-entropy can be determined by first determining the log-likelihood ratio from the probability estimates as described above. msb=0 ), and P1 is p(bit msb=1 ), and the LLR(bit msb ) can be calculated. Then, LLR(bit msb ) and the most significant bit of the training bit or outer decoder bit, CE(bit msb ) can be calculated. Then, p(bit lsb=0 ) as P0, and p(bit lsb=1 ) as P1, and LLR(bit lsb) can be calculated. Then, LLR(bit lsb ) and the least significant bit of the training bits or outer decoder bits, CE(bit lsb ) can be calculated. The bit-level cross entropy is CE(bit msb )+CE(bit lsb ) is the sum of

[0088] FIG. 10 shows an implementation 1000 of a receiver 211 in accordance with the subject matter of this disclosure that includes a low-complexity multi-layer perceptron neural network 1041 coupled to a respective decision feedback equalizer 1042, 1052 for each respective bit that decorrelates the two bits in the PAM4 code.

[0089] The low-complexity multi-layer perceptron neural network 1041 includes a first feed-forward filter 1046, which may be, for example, a finite impulse response (FIR) filter, and a nonlinear activation function 1045 (e.g., a hyperbolic tangent activation function).

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[0090] Respective nonlinear activation functions 1061, 1062, different from the nonlinear activation function 1045, are applied to each respective equalized bit output Ymsb 1044 and Ylsb 1054. The nonlinear activation functions 1061, 1062 are, instead of a hyperbolic tangent activation function,

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[0091] The nonlinear activation function 1061 is a probability estimate (p(bit msb )), and the non-linear activation function 1062 provides a probability prediction for the least significant of the two bits of the code (p(bit lsb Each of the two probability predictions is then compared to a threshold of 0.5 in a respective slicer 1055, 1056 to obtain a bit prediction (e.g., if p<0.5 then bit=0, and if p≧0.5 then bit=1) for each bit in the code.

[0092] At 1070, the two bits are grouped into a code 1071, which is then converted at 1072 to a corresponding voltage (e.g., −1 for “00”, −1 / 3 for “01”, +1 / 3 for “10”, and +1 for “11”) for input to decision feedback equalizer 1042 in the most significant bit path and decision feedback equalizer 1052 in the least significant bit path. To mitigate inter-symbol interference from previous symbols, the output of each respective decision feedback equalizer 1042, 1052 is combined at 1043, 1053, respectively, with the output of a respective feed-forward filter 1047, 1057 to obtain a respective equalized bit output Ymsb 1044 and Ylsb 1054, i.e., the input to the nonlinear activation functions 1061, 1062, as described above.

[0093] Cross entropy is calculated as in implementation 900 by first determining the log-likelihood ratios from the probability predictions as described above, p(bit msb ), p(bit msb ), and can be determined from the training bits 1081 in the cross-entropy adaptation circuit 1080 or from the outer decoder output 1090. msb=0 ), and P1 is p(bit msb=1), and the LLR(bit msb ) can be calculated. Then, LLR(bit msb ) and the most significant bit of the training bit or outer decoder bit, CE(bit msb ) can be calculated. Then, p(bit lsb=0 ) as P0, and p(bit lsb=1 ) as P1, and LLR(bit lsb ) can be calculated. Then, LLR(bit lsb ) and the least significant bit of the training bits or outer decoder bits, CE(bit lsb ) can be calculated. The bit-level cross entropy is CE(bit msb )+CE(bit lsb ) is the sum of

[0094] A method 1100 according to an implementation of the disclosed subject matter is diagrammed in FIG.

[0095] Method 1100 begins at 1101, where nonlinear equalization is performed on digitized samples of an input signal on a data channel. At 1102, a respective value for each of the output signals of the nonlinear equalization is determined. At 1103, parameters of the nonlinear equalization are adapted based on each of the values. As noted above, the adaptation may be based on minimizing the mean squared error (e.g., between an output value and a target value) or minimizing the cross entropy (e.g., between an output value and its log-likelihood ratio). After the adaptation, method 1100 may end, or optionally, at 1104, one of the respective values ​​may be fed back to the input of the nonlinear equalization to mitigate inter-symbol interference during processing of the next symbol, after which method 1100 ends.

[0096] Thus, it can be seen that a high speed data channel using a non-linear equalizer is provided.

[0097] As used in this specification and the claims that follow, the construction "one of A and B" shall mean "A or B."

[0098] It should be understood that the foregoing is merely illustrative of the principles of the invention, that the invention may be practiced other than by the described embodiments, which are presented for purposes of illustration and not limitation, and that the invention is limited only by the following claims.

Claims

1. 1. A receiver for use in a data channel on an integrated circuit device, said receiver comprising: a nonlinear equalizer having as an input digitized samples of the signal on the data channel; a decision circuit configured to determine a respective value of each of the signals from the output of the nonlinear equalizer; and an adaptation circuit configured to adapt parameters of the nonlinear equalizer based on the respective values; Equipped with the nonlinear equalizer having first and second linear feedforward filters and a nonlinear activation function; an output of the first linear feedforward filter connected to an input of the nonlinear activation function; The output of the nonlinear activation function is connected to the input of the second linear feedforward filter. Receiver.

2. 2. The receiver of claim 1, further comprising a feedback circuit configured to feed back the respective values ​​output by the decision circuit to an input of the nonlinear equalizer to mitigate intersymbol interference.

3. 3. The receiver of claim 2, wherein the feedback circuit comprises a decision feedback equalizer.

4. 4. The receiver of claim 1, wherein the non-linear equalizer is a neural network equalizer.

5. 5. The receiver of claim 4, wherein the neural network equalizer is a multi-layer perceptron neural network equalizer.

6. 4. A receiver as claimed in any one of claims 1 to 3, wherein the decision circuit comprises a threshold circuit.

7. the decision circuit operates on a code; The threshold circuit has a plurality of thresholds, and selects a code from a plurality of codes based on the value of the output of the nonlinear equalizer relative to the plurality of thresholds.

7. The receiver of claim 6.

8. the decision circuit operates on bits; the nonlinear equalizer outputs a probability estimate for each bit; the threshold circuit assigns a value to each bit based on a comparison of the probability estimate to 0.5; 7. The receiver of claim 6.

9. 9. The receiver of claim 1, wherein the adaptive circuitry adapts parameters of the non-linear equalizer based on a mean square error.

10. 9. The receiver of claim 1, wherein the adaptation circuitry adapts parameters of the non-linear equalizer based on cross-entropy.

11. Receiver according to any one of claims 1 to 10, wherein the non-linear activation function is a hyperbolic tangent function.

12. Receiver according to any one of claims 1 to 10, wherein the non-linear activation function is a sigmoid function.

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