DATA PROCESSING METHOD, ELECTRONIC DEVICE, STORAGE MEDIUM, AND PROGRAM PRODUCT

By iteratively extending error correction encoded bit sequences, the method addresses the complexity and energy consumption issues in IoT devices, ensuring reliable and efficient data transmission.

JP2025500507AActive Publication Date: 2025-01-09ZTE CORP
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Patent Information

Application Number
JP2024538417
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-05-19
Filing Date
2023-04-19
Publication Date
2025-01-09
Estimated Expiration
2043-04-19

AI Technical Summary

Technical Problem

Existing digital communication systems face challenges in ensuring simplicity and reliability of data transmission in passive Internet of Things (IoT) devices while minimizing energy consumption, due to increased hardware complexity and energy consumption from traditional coding methods.

Method used

Implementing error correction encoding on information bit sequences, followed by iterative extension to obtain second encoded bit sequences, which are transmitted to receivers, allowing for simplified hardware requirements and reliable data reception with reduced energy consumption.

Benefits of technology

The proposed method ensures simplicity and reliability of data transmission in IoT devices by lowering hardware complexity and energy consumption, while maintaining robustness against channel distortions.

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Abstract

This application discloses a data processing method, an electronic device, a storage medium, and a program product. The data processing method includes the steps of: error-correcting coding an acquired information bit sequence to obtain a first coded bit sequence of a target length, repeatedly extending the first coded bit sequence to obtain a second coded bit sequence, and transmitting the second coded bit sequence to a receiving side.
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Description

[Technical field]

[0001] This application is filed based on a Chinese patent application bearing application number 202210545672.5 and filing date May 19, 2022, and claims priority to the Chinese patent application, the entire contents of which are hereby incorporated by reference into this application.

[0002] The present application relates to the technical field of communications, and in particular to a data processing method, an electronic device, a computer storage medium, and a computer program product. [Background technology]

[0003] In a digital communication system, the transmitting end performs channel coding on the original information bit sequence to obtain a coded bit sequence, and then maps the coded bit sequence to a constellation modulation symbol, and finally transmits the obtained constellation modulation symbol. In the channel, data transmission may be distorted due to factors such as multipath, movement, noise, and interference. For example, the channel coding may be forward error correction (FEC) coding. At present, in order to reduce the performance loss caused by burst interference, the traditional coding method adds modules for sub-block interleaving, bit collection, bit selection, etc., which improves the resistance to sudden fading and interference of the channel, but increases the complexity of the hardware, making it impossible to ensure the simplicity and reliability of the tag equipment of the passive Internet of Things, which is accompanied by more energy consumption. Summary of the Invention [Problem to be solved by the invention]

[0004] The embodiments of the present application provide a data processing method, an electronic device, a computer storage medium, and a computer program product that can ensure the simplicity of a tag device and the reliability of data transmission, and reduce energy consumption. [Means for solving the problem]

[0005] In a first aspect, the present embodiment comprises: performing error correction coding on the obtained information bit sequence to obtain a first coded bit sequence of a target length; iteratively extending the first coded bit sequence to obtain a second coded bit sequence; transmitting the second coded bit sequence to a receiving side; The step of repeatedly extending the first coded bit sequence to obtain a second coded bit sequence comprises: repeatedly generating another first bit for each first bit of the first coded bit sequence until a preset target number of times is reached to obtain a bit sequence including a plurality of the first bits, and sequentially generating the second coded bit sequence based on each bit sequence; or The present invention provides a data processing method, comprising the steps of repeatedly generating a first coded bit sequence of another target length until a preset target number of times is reached, to obtain a plurality of the first coded bit sequences, and sequentially generating the second coded bit sequence based on the plurality of the first coded bit sequences.

[0006] In a second aspect, the present embodiment comprises: receiving a second coded bit sequence transmitted by a transmitter; and processing the second coded bit sequence; The second coded bit sequence is obtained by the transmitting end performing a first operation or a second operation on a first coded bit sequence of a target length, and the first coded bit sequence is obtained by error correction coding an information bit sequence acquired by the transmitting end; the first operation includes repeatedly generating another first bit for each first bit of the first coded bit sequence until a preset target number of times is reached to obtain a bit sequence including a plurality of the first bits, and sequentially generating the second coded bit sequence based on each of the bit sequences; The data processing method further provides a method in which the second operation includes repeatedly generating another first coded bit sequence of the target length until a preset target number of times is reached, to obtain a plurality of the first coded bit sequences, and sequentially generating the second coded bit sequence based on the plurality of the first coded bit sequences.

[0007] In a third aspect, the present embodiment comprises: At least one processor; at least one memory for storing at least one program; There is further provided an electronic device, wherein at least one said program, when executed by at least one said processor, implements the above data processing method.

[0008] In a fourth aspect, the present embodiment comprises: There is further provided a computer readable storage medium having stored thereon a processor executable program which, when executed by a processor, implements the above data processing method.

[0009] In a fifth aspect, the present embodiment comprises: The present invention further provides a computer program product including a computer program or computer instructions, the computer program or computer instructions being stored in a computer-readable storage medium, the computer program or computer instructions being read by a processor of a computing device from the computer-readable storage medium, and the processor executing the computer program or computer instructions, thereby causing the computing device to perform the above-mentioned data processing method. Effect of the Invention

[0010] In the embodiment of the present application, the acquired information bit sequence is error-correction coded to obtain a first coded bit sequence, the obtained first coded bit sequence is repeatedly extended to obtain a second coded bit sequence, and the second coded bit sequence is sent to a receiving side, which is a tag device. A desired second coded bit sequence can be obtained by simply repeatedly extending each bit of the first coded bit sequence of a target length or the entire first coded bit sequence a preset target number of times, so that the receiving side can simply and easily receive and process the second coded bit sequence, and the entire processing process can be simply and easily realized, with low hardware requirements, i.e., the simplicity of the tag device and the reliability of data transmission can be ensured, and energy consumption can be reduced, thereby filling the technical gap of related methods. [Brief description of the drawings]

[0011] [Figure 1] FIG. 1 is a schematic diagram of an implementation environment for performing a data processing method according to an embodiment of the present application; [Diagram 2] FIG. 2 is a schematic diagram of an implementation environment for performing a data processing method according to another embodiment of the present application; [Diagram 3] FIG. 2 is a schematic diagram of the use of forward error correction coding in IoT devices in an implementation environment for performing a data processing method according to an embodiment of the present application. [Figure 4] 2 is a flowchart of a data processing method according to an embodiment of the present application. [Diagram 5] 4 is a flow chart of a data processing method according to an embodiment of the present application, for error correction coding an acquired information bit sequence to obtain a first coded bit sequence of a target length. [Figure 6] FIG. 2 is a schematic diagram of a data processing method based on IoT communication according to an embodiment of the present application. [Figure 7] FIG. 2 is a schematic diagram of a data processing method based on IoT communication according to another embodiment of the present application. [Figure 8]FIG. 2 is a schematic diagram of a data processing method based on IoT communication according to another embodiment of the present application. [Figure 9] 4 is a flowchart of transmitting a second coded bit sequence to a receiving side in a data processing method according to an embodiment of the present application; [Figure 10] FIG. 1 is a schematic diagram of data transmission using the backscattering principle based on IoT communication according to an embodiment of the present application. [Figure 11] FIG. 11 is a comparison diagram of performance of second coded bit sequences corresponding to various preset target times according to an embodiment of the present application. [Figure 12] 4 is a flowchart of a data processing method according to another embodiment of the present application; [Figure 13] 4 is a flowchart of processing a second coded bit sequence in a data processing method according to an embodiment of the present application; [Figure 14] 4 is a flow chart of a method for processing data according to an embodiment of the present disclosure, for iteratively processing a second coded bit sequence inversely to obtain a first coded bit sequence; [Figure 15] 4 is a flowchart of convolutionally decoding a first coded bit sequence to obtain an information bit sequence in a data processing method according to an embodiment of the present application; [Figure 16] FIG. 1 is a schematic diagram of an electronic device according to an embodiment of the present application. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] In order to make the objectives, technical solutions and advantages of the present application clearer, the present application will be described in more detail below with reference to the drawings and examples. It should be understood that the specific examples described in this specification are only used to explain the present application, and are not used to limit the present application.

[0013] It should be noted that although a logical order is depicted in the flowchart, the steps shown or described may, in some cases, be performed in an order different from that depicted in the flowchart. The terms "first," "second," and the like in the specification and claims, as well as in the above drawings, are not used to describe a particular order or priority, but rather to distinguish between similar subject matter.

[0014] The present application provides a data processing method, an electronic device, a computer storage medium, and a computer program product. The data processing method according to one embodiment includes the steps of: performing error correction coding on an acquired information bit sequence to obtain a first coded bit sequence of a target length; repeatedly extending the first coded bit sequence to obtain a second coded bit sequence; and transmitting the second coded bit sequence to a receiving side, in which the step of repeatedly extending the first coded bit sequence to obtain the second coded bit sequence includes the steps of repeatedly generating another first bit for each first bit of the first coded bit sequence until a preset target number of times is reached, obtaining a bit sequence including a plurality of first bits, and sequentially generating a second coded bit sequence based on each bit sequence, or repeatedly generating a first coded bit sequence of a different target length until a preset target number of times is reached, obtaining a plurality of first coded bit sequences, and sequentially generating a second coded bit sequence based on the plurality of first coded bit sequences. In this embodiment, the acquired information bit sequence is subjected to error correction coding to obtain a first coded bit sequence, the obtained first coded bit sequence is repeatedly extended to obtain a second coded bit sequence, and the second coded bit sequence is transmitted to a receiving side which is a tag device. A desired second coded bit sequence can be obtained by simply repeatedly extending each bit of a first coded bit sequence of a target length or the entire first coded bit sequence a preset target number of times, so that the receiving side can simply and easily receive and process the second coded bit sequence, and the entire processing process can be simply and easily realized, reducing the requirements for hardware, i.e., ensuring the simplicity of the tag equipment and the reliability of data transmission, and reducing energy consumption, thereby filling the technical gap in related methods.

[0015] Hereinafter, the embodiments of the present application will be further described with reference to the drawings.

[0016] As shown in FIG. 1, FIG. 1 is a schematic diagram of an implementation environment for performing a data processing method according to an embodiment of the present application.

[0017] In the example of FIG. 1, the implementation environment includes, but is not limited to, a sender 100 and a receiver 200, and transmission, reception, and related interactions of wireless signals are possible between the receiver 200 and the sender 100.

[0018] In one embodiment, the relative positions of the receiver 200 and the transmitter 100 and the number thereof may be set according to a specific application scenario, but there are multiple receivers 200, and different receivers 200 are set as described above, so that the wireless signal transmitted by the transmitter 100 can be received at different spatial positions. Note that the spatial positions here may be different regional conditions.

[0019] In one embodiment, the transmitter 100 and the receiver 200 may include one of a base station (BS), an access point (AP), a node B, a g node B (generalized node B), a radio network controller (RNC), an evolved node B (eNB), a base station controller (BSC), a base transceiver station (TF), a transceiver function (TF), a wireless router, a wireless transceiver, a basic service set (BSS), an extended service set (ESS), or a radio base station (RBS), but are not limited thereto, and this embodiment does not particularly limit this.

[0020] In one embodiment, the sender 100 and the receiver 200 may be referred to as an access terminal, a user equipment (UE), a subscriber unit, a subscriber station, a mobile station, a mobile station, a remote station, a remote terminal, a mobile device, a user terminal, a wireless communication device, a user agent, or a user device. For example, the sender 100 may be a mobile phone, a cordless phone, a Session Initiation Protocol (SIP) phone, a Wireless Local Loop (WLL) station, a Personal Digital Assistant (PDA), a handheld device with wireless communication capabilities, a computing device or other processing device connected to a wireless modem, an in-vehicle device, a wearable device, a terminal device in a 5G network or a future 5G or higher network, etc., but this embodiment is not particularly limited thereto.

[0021] In one embodiment, the implementation environment for executing the data processing method of this embodiment may be some networks that can automatically adapt to wireless communication devices, such as, but not limited to, the Internet of Things (IoT). The sender 100 and the receiver 200 may be devices that communicate via IoT (e.g., machine-type communication devices), and may include, but are not limited to, various sensors, water meters, electric meters, product tags, and item data tags.

[0022] In some scenarios, the battery power of IoT devices is low and these devices may have applications with very low throughput data volume, but need to consume very little energy to facilitate very long time communication without battery replacement. Or, the IoT device may be a passive IoT device that can transmit signals to a receiver 200 (e.g., base station) by direct back scattering without requiring battery energy storage, and the tag (Tap) collects energy and back scatters the signal to the receiver 200, and can transmit signals to a licensed frequency spectrum, e.g., a mobile communication base station (e.g., Node B or G Node B), or access an existing cellular mobile network.

[0023] In some scenarios, the IoT devices may also be able to communicate using unlicensed frequency spectrum.

[0024] In some scenarios, the IoT device transmits data using an impedance network and exhibits different data signals depending on different impedance network parameters.

[0025] In some scenarios, the IoT device may forward error correction code the data that needs to be transmitted to improve the reliability of the data transmission, for example, to increase the coverage or reduce the transmission energy by forward error correction coding the raw data that needs to be transmitted, where the forward error correction coding may be, but is not limited to, Hamming coding, polarization coding, low density parity check coding, Reed-Solomon coding, convolutional coding, turbo coding, etc.

[0026] As shown in FIG. 2, FIG. 2 is a schematic diagram of an implementation environment for performing a data processing method according to another embodiment of the present application.

[0027] In FIG. 2, the implementation environment includes a base station 210 (i.e., receiver 200), various types of UEs (including 120, 130, and 140 in FIG. 2, i.e., transmitter 100), and a core network 300. Here, the various types of UEs may be IoT devices for transmitting data to the base station 210 after collecting various information and forward error correction coding the data information, and the base station 210 communicates with the various UEs and communicates with the core network 300, which can provide functions such as access permission, user authentication, Internet protocol connection, tracking, and other access, routing, or mobility management. The various types of UEs may be distributed throughout the implementation environment, and each UE may be fixed or mobile, and the various types of UEs may communicate with various types of base stations 210 and network equipment (including macro eNBs, small cell eNBs, relay base stations, etc.).

[0028] Examples of applications for IoT devices include, but are not limited to, smart metering, inventory monitoring, water level monitoring, temperature monitoring, equipment monitoring, medical monitoring, wildlife monitoring, weather and geographic event monitoring, fleet management and tracking, remote security sensing, physical access control, and transaction-based commercial billing.

[0029] As shown in FIG. 3, FIG. 3 shows a schematic diagram of an IoT device 800 in an implementation environment using forward error correction coding. Here, the IoT device 800 may include, but is not limited to, a data coding processing module 810 and a transmitter 820. In addition, the IoT device may include a processor, memory, etc. that performs data processing operations, such as storing required parameter data and information bit sequences, forward error correction coding the input information bit sequence, and sequentially transmitting the coded data. Each component of the IoT device 800 can communicate with each other, and the transmitter 820 may include a single antenna or multiple antennas.

[0030] The transmitting side 100 has at least a function of performing error correction coding on an information bit sequence to obtain a first coded bit sequence, a function of repeatedly extending the first coded bit sequence to obtain a second coded bit sequence, and a function of transmitting the second coded bit sequence to the receiving side 200.

[0031] The receiving side 200 has at least the function of receiving the second coded bit sequence transmitted by the transmitting side 100 and processing this second coded bit sequence, where the second coded bit sequence is obtained by the transmitting side 100 repeatedly extending the first coded bit sequence, and the first coded bit sequence is obtained by error correction coding the information bit sequence acquired by the transmitting side 100.

[0032] In one embodiment, the above functions possessed by the sender 100 and the receiver 200 can be applied to various application scenarios, which are not limited here.

[0033] This implementation environment can be applied to 5G, 6G communication network systems and subsequent evolving mobile communication network systems, and the present embodiment is not particularly limited thereto.

[0034] The implementation environments illustrated in Figures 1, 2, and 3 are not intended to limit embodiments of the present application, which may include more or fewer components than those illustrated, may combine certain components, or have different arrangements of components.

[0035] Based on the above implementation environment, examples of the data processing method of the present application will be described below.

[0036] As shown in FIG. 4, FIG. 4 is a flowchart of a data processing method according to an embodiment of the present application, which may include, but is not limited to, steps S110 to S130.

[0037] Step S110: Error-correction-encode the obtained information bit sequence to obtain a first encoded bit sequence of a target length.

[0038] In one embodiment, the execution subject of the data processing method in this embodiment may be the transmitting side 100 in the embodiment shown in FIG. 1, the UE in the embodiment shown in FIG. 2, or the IoT device 400 in the embodiment shown in FIG. 3, but is not limited thereto. Alternatively, a person skilled in the art may select and set a corresponding execution subject according to an actual application scenario, and this embodiment does not limit this. In order to more simply explain the application scenario and principle of this application, in each of the following related embodiments, the transmitting side is respectively described as the execution subject of the data processing method, but this should not be understood as limiting the embodiments of this application.

[0039] In this step, the obtained information bit sequence is error correction coded to obtain a first coded bit sequence, which can be further processed in a later step to facilitate obtaining a new coded bit sequence.

[0040] In an embodiment, the method of obtaining the information bit sequence may be various, and those skilled in the art may select it according to the actual application scenario, and there is no particular limitation here.

[0041] In one embodiment, the error correction coding comprises: Low Density Parity Check Code (LDPC) and Polar encoding and Reed-Solomon RS coding and Tail-biting convolutional code, Turbo encoding and and BCH coding.

[0042] Wherein, the LDPC code is determined by a low-density parity check matrix, and an information bit sequence is encoded by the parity check matrix to obtain an LDPC-encoded bit sequence. In one example, the parity check matrix of the LDPC code may be determined by one or more basis matrices having a dimension of 42 rows and 52 columns or 46 rows and 68 columns, including an element indicating an all-zero square matrix and an element indicating a cyclic shift of an identity array.

[0043] The polar code is a linear block code proposed based on channel polarization theory. In one example, the polar code is defined by the n-th order Kronecker product of a matrix G, which is a 2-by-2 matrix. In one example, G=[1 0; 1 1].

[0044] The RS codes, or Reed-solomon codes, may be referred to as Reed-Solomon codes, and because this coding method allows for a coding method that maximizes the minimum distance, the RS coding has a very high ability to correct burst errors. In one example, an RS code with a code length of n1 and an information length of k1 is defined by a generator polynomial, and any codeword polynomial output by the RS coding is divisible by the generator polynomial. In one example, the n1 is m powers of 2 minus 1, where m is equal to one of 4, 5, 6, 7, 8, 9, or 10.

[0045] The BCH code is a cyclic code capable of correcting multiple random errors, and is a binary linear cyclic code discovered independently by Bose, Chaudhuri, and Hocquenghem, and is named after the initials of their names. In one example, the BCH code is determined by a generator polynomial, and the generator polynomial is determined by multiple primitive polynomials.

[0046] The turbo code may be a parallel cascaded convolutional code, i.e., two or more component codes are connected in parallel, and the turbo code output may be a system code. In one embodiment, the turbo is a turbo coding method defined in the LTE (Long Term Evolution) system, including bidirectional component codes and system bits, and the mother code rate is 1 / 3. Here, the LDPC code is determined by a low-density parity check matrix, and an information bit sequence is coded by the parity check matrix to obtain an LDPC coded bit sequence. The polar code is a linear block code proposed based on the channel polarization theory, and polar coding can output a coded bit sequence of S bits per input bit, where S is a positive integer.

[0047] Here, when tail-biting convolutional coding is performed on the obtained information bit sequence, if the head state and tail state of the convolutional coding codeword trellis are made the same, the decoding performance of tail-biting convolutional coding can be improved. For example, but not limited to, first, v-1 bits of the tail of the information bit sequence are sequentially stored in the register of the convolutional code, and then all bits of the information bit sequence are sequentially shifted bit by bit, stored in the register, and coded to obtain a first coded bit sequence.

[0048] The specific method of error correction coding can be selected and set according to a specific application scenario, but this embodiment is not limited to this.

[0049] As shown in Figure 5, in an embodiment of the present application, step S110 is further described. Step S110 may include, but is not limited to, step S1101.

[0050] Step S1101: For every second bit of the obtained information bit sequence, convolutionally encode the second bit to obtain a first encoded bit sequence of a target length.

[0051] In this step, a first coded bit sequence of a target length can be obtained by sequentially selecting one bit from the acquired information bit sequence and convolutionally coding it; that is, by convolutionally coding each bit of the information bit sequence in this manner, a first coded bit sequence of a target length corresponding to each bit can be obtained, which makes it easy to further process the desired first coded bit sequence in a later step; for example, a first coded bit sequence of a target length of n bits {c0, c1, c2, . . . , cn-1} can be obtained by convolutionally coding the k-th bit of the information bit sequence, where k = 0, 1, 2 . . . , n-1.

[0052] Step S120: Iteratively extend the first coded bit sequence to obtain a second coded bit sequence.

[0053] In one embodiment, the step of repeatedly extending the first coded bit sequence to obtain the second coded bit sequence comprises: repeatedly generating another first bit for each first bit of the first coded bit sequence until a preset target number of times is reached to obtain a bit sequence including a plurality of first bits, and sequentially generating a second coded bit sequence based on each bit sequence; or The method includes a step of repeatedly generating a first coded bit sequence of another target length until a preset target number of times is reached, obtaining a plurality of first coded bit sequences, and sequentially generating a second coded bit sequence based on the plurality of first coded bit sequences.

[0054] In this step, the first coded bit sequence is repeatedly extended, that is, based on the original first coded bit sequence, the second coded bit sequence that meets the coding requirements can be obtained by extending it. For example, when the first coded bit sequence {c0, c1, c2, ..., cn-1} having a length of n bits is obtained by error correction coding the k-th bit of the information bit sequence, the first coded bit sequence is repeatedly extended a preset q times to obtain a second coded bit sequence having a length of n x q bits. Specifically, the purpose of the repetitive coding can be achieved without consuming extra energy by repeatedly extending each first bit of the first coded bit sequence, or by repeatedly extending the entire first coded bit sequence. That is, by repeatedly extending as described above, it is not necessary to perform operations such as sub-block interleaving, bit collection, bit selection, etc. as in conventional convolutional coding, and the purpose of the repetitive coding can be achieved by more simply performing bit extension or bit sequence extension. For example, each bit of the first coded bit sequence {c0, c1, c2, ..., cn-1} is repeatedly extended q times to obtain a second coded bit sequence {[c0, c0, ..., c0], [c1, c1, ..., c1], ..., [cn-1, cn-1, ..., cn-1]} having a length of n × q bits, or the entire first coded bit sequence {c0, c1, c2, ..., cn-1} is repeatedly extended q times to obtain a second coded bit sequence {[c0, c1, c2, ..., cn-1], [c0, c1, c2, ..., cn-1], ..., [c0, c1, c2, ..., cn-1]} having a length of n × q bits.

[0055] In one embodiment, the target length is: A preset target number of times, A number of predetermined target impedance networks; The constraint length of the error correction coding; the length of the information bit sequence; and and higher layer configuration signaling.

[0056] In one embodiment, the target length n includes at least one of 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, and 12.

[0057] In one embodiment, the constraint length v of the convolutional coding includes at least one of 7, 8, 9, 10, and 11.

[0058] In one embodiment, the number of target impedance networks includes at least one of 2, 4, 8, 16, and 32.

[0059] A specific example will be given below to explain the principles and flow of the above embodiment. Example 1

[0060] Referring to Figures 6 and 7, Figure 6 shows a schematic diagram of a data processing method based on convolutional coding in IoT communication of this embodiment, and Figure 7 shows a schematic diagram of another data processing method based on convolutional coding in IoT communication of this embodiment.

[0061] 6, the k-th bit of the information bit sequence 410 enters into a convolutional encoding 420 to output n bits, and the output n bits form a coded bit sequence 430 such as {c0, c1, c2, ..., cn-1}, and then enters into a repetitive extension operation 440 to obtain a second coded bit sequence 450 such as {[c0, c0, ..., c0], [c1, c1, ..., c1], ..., [cn-1, cn-1, ..., cn-1]}. Here, in one embodiment, the corresponding repetitive extension number q (i.e., the preset target number) in the repetitive extension operation 440 is equal to 6. The advantage of using this method to perform repeated extension operations is that the sender can directly and repeatedly transmit the coded bits output by convolutional coding, which is very simple and efficient, and the hardware implementation is extremely simple; the receiver can calculate the corresponding first bit soft information data in the first coded bit sequence every time it receives q consecutive data information, which does not need caching, has low hardware complexity, and is easier to implement.

[0062] As shown in FIG. 7, the k-th bit of the information bit sequence 510 enters the convolutional coding 520, and n bits are output. The output n bits form a coded bit sequence 530 such as {c0, c1, c2, ..., cn-1}, and then enters the iterative extension operation 540 to obtain a second coded bit sequence 550 such as {[c0, c1, c2, ..., cn-1], [c0, c1, c2, ..., cn-1], ..., [c0, c1, c2, ..., cn-1]}. The advantage of performing the iterative operation in this way is that the randomness of the transmitted signal can be improved, the signal coverage can be expanded, and it is easy to realize in terms of hardware, since the probability of occurrence of "0" and "1" in the first coded bit sequence is almost equal by the transmitting side continuously transmitting the coded bit sequence. In one embodiment, the corresponding iterative extension number q (i.e., the preset target number) in the iterative extension operation 540 is equal to 6.

[0063] When the specific value of q is configured by higher layer signaling, i.e., when a preset target number of times q is determined, the specific value of the number n of component codes of the convolutional coding 410 of FIG. 6 or the convolutional coding 510 of FIG. 7 can be determined from q.

[0064] In one embodiment, the operations of the method illustrated in Figure 6 or Figure 7 may be performed by the data encoding processing module 410 illustrated in Figure 3. An IoT device (or UE) may execute a set of code that controls functional elements of the IoT device (or UE) to perform corresponding data processing functions.

[0065] In one embodiment, the preset target number of times is: The target length, A number of predetermined target impedance networks; The constraint length of the error correction coding; the length of the information bit sequence; and and higher layer configuration signaling.

[0066] Here, the preset target number of times may include at least one of 4, 5, 6, 7, 8, 12, 16, 24, 32, 48, and 64, but is not limited thereto. The generated second coded bit sequence can be repeatedly transmitted in the IoT device (or UE), thereby improving the robustness of data reception at the receiving side. By selecting the preset target number of times from among two or more integers, the flexibility of scheduling of the IoT device (or UE) can be increased, for example, when the radio resources in the current scenario are insufficient, the preset target number of times can be reduced, while when the scenario interference is large, the preset target number can be increased, thereby improving the reliability and flexibility of data transmission.

[0067] Here, the target length n is the number of component codes of the convolutional coding, and FIG. 8 shows a schematic diagram of a data processing method using convolutional coding in IoT communication. As shown in FIG. 8, the constraint length v of the convolutional coding is 7, and the number of the corresponding shift registers is the constraint length minus 1, so FIG. 8 includes six shift registers 610. In some examples, the constraint length v of the convolutional coding may be equal to other values ​​such as, but not limited to, 8, 9, 10, or 11. In the example of FIG. 8, the target length n=12 (the number of component codes of the convolutional coding is 12, i.e., the convolutional coding has 12 coding outputs), that is, the first coded bit sequence 620 is {c0, c1, c2, c3, c4, c5, c6, c7, c8, c9, c10, c11}, and each bit is obtained by coding by one generator polynomial. For example, referring to Table 1 below, Table 1 is a table of example generator polynomials for all bits of the first coded bit sequence corresponding to a constraint length of 7 for convolutional coding, where the generation of c0 is obtained by generator polynomial G0, which in octal notation is represented as G0=133 and the corresponding binary notation is 001 101 101, and the generation of c1 is obtained by generator polynomial G1, which in octal notation is represented as G0=171 and the corresponding binary notation is 001 111 001.

[0068] [Table 1]

[0069] In one embodiment, when the constraint length v=9 of the corresponding convolutional coding, the output coded bit sequence contains 12 bits, i.e., the number of component codes of the convolutional coding is equal to 12. As shown in Table 2, an example table of generator polynomials of all bits of the first coded bit sequence corresponding to the constraint length 9 of the convolutional coding is shown.

[0070] [Table 2]

[0071] In another embodiment, when the first coded bit sequence includes 2 bits and the corresponding convolutional coding constraint length is 7, the corresponding generator polynomials are G0 and G1 in Table 1, and the output coded bit sequence is {c0, c1}; alternatively, when the coded bit sequence includes only 6 bits and the corresponding convolutional coding constraint length is 7, the corresponding generator polynomials are G0 to G5 in Table 1, and the output coded bit sequence is {c0, c1, c2, c3, c4, c5}. The longer the length of the coded bit sequence, i.e., the lower the code rate of the corresponding convolutional coding, the better the coding gain will be, so that when transmitting the same energy, the lower the code rate is favorable for enhancing the coverage of the signal of the IoT device; and conversely, the shorter the target length (i.e., the higher the code rate), the fewer the component codes of the convolutional coding, and the lower the complexity of the convolutional coding and decoding, and the easier it is to realize the corresponding IoT device.

[0072] In another embodiment, if the constraint length of the corresponding convolutional coding is 7, the corresponding generator polynomials include at least two of the generator polynomials in Table 1, namely, at least two of 133, 171, 165, 117, 135, 157, 123, 173. In one example, the constraint length of the corresponding convolutional coding is 9, the corresponding generator polynomials include at least two of the generator polynomials in Table 2, namely, at least two of 561, 753, 715, 517, 675, 513, 657, 745, 473.

[0073] In another embodiment, when the constraint length of the corresponding convolutional coding is 7 and the number of constituent code packets of the convolutional coding is 6, the corresponding generator polynomials are G0 to G5 in Table 1, i.e., the generator polynomials G0 to G5 are 133, 171, 165, 117, 135, and 157, respectively, and the corresponding output coded bit sequence is {c0, c1, c2, c3, c4, c5}. In one example, when the constraint length of the corresponding convolutional coding is 9 and the number of constituent code packets of the convolutional coding is 6, the corresponding generator polynomials are G0 to G5 in Table 2, i.e., the generator polynomials G0 to G5 are 561, 753, 715, 517, 675, and 513, respectively, and the corresponding output coded bit sequence is {c0, c1, c2, c3, c4, c5}. The coding code rate corresponding to the number of component codes of 6 in the convolutional coding is 1 / 6, and in this case, the coding gain of the convolutional coding is maximized, and the transmission code rate (i.e., the ratio of the length of the information bit sequence to the length of the second coded bit sequence) is less than 1 / 6, which is achieved by repeating the first coded bit sequence. In order to achieve a lower transmission code rate (less than 1 / 6) than convolutional coding with a larger number of component codes (e.g., more than 6), the decoding complexity can be reduced by repeating the convolutional coding with the number of component codes of 6 without compromising the decoding performance.

[0074] In one embodiment, the constraint length of the convolutional coding determines the number of states of the codeword trellis, and the number of states of the codeword trellis of the convolutional coding is equal to 2 to the power of v-1, where v is the constraint length of the convolutional coding. In Viterbi decoding of the convolutional coding, the more the number of states, the higher the decoding complexity, and the more path metrics and surviving paths that need to be cached, the more metric calculations are required, which means the higher the decoding complexity. However, the longer the constraint length, the larger the minimum code distance of the convolutional coding, and the better the performance of the corresponding convolutional coding. In one example, the constraint length of the convolutional coding may further include at least one of 8, 10, or 11.

[0075] Step S130: Send the second coded bit sequence to a receiving side.

[0076] In this step, the obtained information bit sequence is error-correction coded to obtain a first coded bit sequence, the obtained first coded bit sequence is repeatedly extended to obtain a second coded bit sequence, and the second coded bit sequence is sent to a receiving side, which is a tag device. A desired second coded bit sequence can be obtained by simply repeatedly extending each bit of the first coded bit sequence of a target length or the entire first coded bit sequence a preset target number of times, so that the receiving side can simply and easily receive and process the second coded bit sequence, and the entire processing process can be simply and easily realized, with low requirements for hardware, i.e., the simplicity of the tag device and the reliability of data transmission can be ensured, and energy consumption can be reduced, thereby filling the technical gap of related methods.

[0077] In one embodiment of the present application, step S130 will be further described as shown in Fig. 9. Step S130 may include, but is not limited to, steps S1301 to S1302.

[0078] Step S1301: Determine a target impedance network from a second encoded bit sequence.

[0079] Step S1302: Send the second coded bit sequence to a receiving side through a target impedance network.

[0080] In this step, a related target impedance network is determined by the second coded bit sequence, so as to facilitate transmitting the second coded bit sequence to the receiving side based on the target impedance network. By adjusting the capacitance parameters of the impedance network, the user can realize various circuit tuning frequencies, so that the frequency of the transmitted signal changes with the change of the circuit capacitance value, and can even realize signal modulation such as frequency shift keying, so that a better signal transmission effect can be realized by transmitting the second coded bit sequence to the receiving side through the target impedance network that meets the requirements.

[0081] In one embodiment, the number of target impedance networks is: The target length, A preset target number of times, The constraint length of the error correction coding; the length of the information bit sequence; and and higher layer configuration signaling.

[0082] Specific examples will be given below to explain the principles and flows of each of the above embodiments. Example 2

[0083] FIG. 10 shows a schematic diagram of data transmission using the backscattering principle in IoT communication. In FIG. 10, an IoT device 740 can receive a carrier signal 720 transmitted from a base station 710 and transmit an electromagnetic wave signal 730 to the base station 710 to perform energy collection or signal data reception. The IoT device 740 includes an impedance network 7402, an impedance network selection control module 7404, a data encoding processing module 7406, and a transmitting antenna 7408. Here, the impedance network 7402, the impedance network selection control module 7404, and the transmitting antenna 7408 in FIG. 10 can constitute the transmitter 420 in FIG. 4, where the IoT device may be a UE, and the carrier signal may be an excitation source signal.

[0084] In the IoT device 740, the impedance network selection control module 7404 selects an impedance network based on the second encoded bit sequence output by the data encoding processing module 7406, and adjusts the capacitance of the impedance network to realize various circuit tuning frequencies so that the frequency of a transmitted signal changes with the change in the circuit capacitance value, thereby realizing signal modulation such as frequency shift keying. In one embodiment, the impedance network 7402 includes t types of impedance networks, the impedance networks are selected according to the second encoded bit sequence, and any two types of impedance networks among the t types of impedance networks have different parameters. Here, the parameters of the impedance networks may include at least one of a resistance value, a capacitance value, and an inductance value.

[0085] Specifically, in one embodiment, two types of impedance networks are included, the two types of impedance networks have different parameters and are controlled by one bit in the second encoded bit sequence, for example, if the bit is "0", impedance network 0 is selected, and if the bit is "1", impedance network 1 is selected. In another example, four types of impedance networks are included, the four types of impedance networks have different parameters and are controlled by two consecutive bits in the second encoded bit sequence, for example, if the two bits are "00", impedance network 0 is selected, if the two bits are "01", impedance network 1 is selected, if the two bits are "10", impedance network 2 is selected, and if the two bits are "11", impedance network 3 is selected, and in this way, it is also possible to control using more bits, which will not be described here.

[0086] In one embodiment, the number of impedance networks in the impedance network 7402 is equal to 2 to the power of a, where a is a positive integer. That is, the impedance network is selected in the impedance network selection control module 7404 based on the state of the a bit in the second encoded bit sequence, where a is at least one of 1, 2, 3, 4, or 5. a or the number t of impedance networks is determined by at least one of parameters such as the length of the information bit sequence, the target length n, the preset target number of times q, and the upper layer control signaling. The existence of multiple impedance network options can reduce interference between the transmission signals of each IoT device. For example, in a large-scale Internet of Things, it is necessary to obtain information of many IoT devices at once. In this case, different IoT devices can select different impedance networks to transmit data. The more impedance networks available, the more a person skilled in the art can reduce interference between the transmission signals of different IoT devices by making a certain control selection.

[0087] In one embodiment, the target length of the convolutional coding output by the convolutional coding 420 of Fig. 6 or the convolutional coding 520 of Fig. 7 is n, i.e., the number of component codes of the convolutional coding is n, and the specific value of n is configured by upper layer signaling. After the number of component codes n is determined, a specific value of the preset target number of times q for which the repeated extension operation 440 of Fig. 6 or the repeated extension operation 540 of Fig. 7 is performed is further determined according to the number of component codes n.

[0088] In one embodiment, the target length n of the convolutional coding output by convolutional coding 420 of Fig. 6 or convolutional coding 520 of Fig. 7 is determined by the length of the information bit sequence. Specifically, the number of component codes n1 corresponding to an information bit sequence having a length K1 and the number of component codes n2 corresponding to an information bit sequence having a length K2 satisfy at least one of the following: 1. when K1 is greater than K2, n1 is greater than or equal to n2; 2. when K1 is greater than K2, n1 is less than or equal to n2.

[0089] In one embodiment, the preset target number q of iterative extension by the iterative extension operation 440 of Fig. 6 or the iterative extension operation 540 of Fig. 7 is determined by the length K of the information bit sequence. The second coded bit sequence obtained in Fig. 6 or Fig. 7 is transmitted in association with the impedance networks of Fig. 10, and the number of impedance networks is determined by at least one parameter of the target length, the number n of component codes of the convolutional coding, the preset target number q, and the length K of the information bit sequence. The number of impedance networks can also be configured by higher layer configuration signaling.

[0090] In one embodiment, when there are multiple determined target impedance networks, the network parameters of any two target impedance networks are not identical, thereby ensuring that the characteristics of different target impedance networks are different from each other, and therefore, in certain application scenarios, it is possible to operate each target impedance network in combination, thereby further adapting to various complex scenarios. Example 3

[0091] A specific example showing a specific flow of a method for determining some relevant parameters in a data processing method, such as a preset target number of times q, a target length n, etc., is given below.

[0092] The coding and decoding complexity of convolutional coding is directly correlated with the number of component codes n (i.e., the target length n), and the specific value of n can be determined by the preset target number q. For example, in an Internet of Things communication system including different UEs, each UE can support a different preset target number q, and if the total number of bits that need to be transmitted is Y, and the preset target number in the system configuration or higher layer signaling configuration is q, the number of component codes n can be determined by the preset target number q, the length K of the information bit sequence, and the total number of bits transmitted Y. Specifically, in one embodiment, it is calculated using the following formula:

number

[0093] Here, the function function(x) represents the smallest integer equal to or greater than the real number x, the integer obtained by rounding off the real number x, or the largest integer equal to or less than the real number x. The total number of bits Y may be the length of the second encoded bit sequence. Here, when the length K of the information bit sequence is an integer greater than 1 and less than or equal to 512, the length K of the information bit sequence is equal to all integers having an interval of 8 between 24 and 512. The length K of the information bit sequence is at least one of 24, 64, 96, 128, 192, 256, 288, 384, and 512. The number of component codes n may be determined by the length K of the information bit sequence. The advantage of setting in this way is that when the total number of bits Y to be transmitted is constant, a relatively reasonable value of the number of component codes n can be adopted, and energy consumption for encoding or decoding can be reduced. In addition, when the number n of component codes determined as described above is greater than the number of generator polynomials for convolutional coding, the number n of component codes is equal to the number of generator polynomials for convolutional coding, that is, both the number of generator polynomials for convolutional coding and the generator polynomials may be uniformly defined in advance.

[0094] In one embodiment, the specific value of the component code number n is determined by a preset target number q. For example, the preset target number is 4, 8, 16, and 24, and the preset target number is configured by upper layer signaling. After obtaining the preset target number q, the IoT device determines the component code number n according to the corresponding Table 3 as follows:

[0095] [Table 3]

[0096] In one embodiment, the combination of the preset target number q and the number n of component codes may be directly indicated by signaling, such as a two-bit signaling. The advantage of setting in this way is that the signaling overhead can be reduced. Since signaling generally occupies more resources in communication, compressing the signaling can improve the robustness of the communication system. Example 4

[0097] In one embodiment, the specific value of the preset target number q is determined by the number of component codes n. For example, if the total number of bits that need to be transmitted is Y, and an external system or higher layer signaling configures the number of component codes n, the preset target number q can be determined by the number of component codes n, the length K of the information bit sequence, and the total number of bits Y to be transmitted. Specifically, it is calculated using the following formula:

number

[0098] Here, the function function(x) represents the smallest integer equal to or greater than the real number x, the integer obtained by rounding the real number x, or the largest integer equal to or less than the real number x. The length K of the information bit sequence and the total number Y of transmitted bits can be obtained by an external system configuration or a higher layer signaling configuration.

[0099] In one embodiment, the specific value of the preset target number of times q is determined by the number of component codes n. For example, the number of component codes is four, 4, 7, 9, and 11. The number of component codes is configured and selected by upper layer signaling, and after the IoT device obtains the specific value of n, the preset target number of times q is determined according to the following correspondence table 4.

[0100] [Table 4]

[0101] In one embodiment, the combination of the number of component codes n and the preset target number q may be indicated directly by signaling, such as a two-bit signaling, which may be RRC signaling, MAC signaling, or DCI signaling, etc. Example 5

[0102] In the communication system shown in FIG. 10, the IoT device 740 needs to transmit a signal 730 to the base station 710 and transmit an information bit sequence with a length of K bits. The length of the information bit sequence is also called the transmission block size. When only two impedance networks are selected, i.e., when t=2, if the current bit of the second encoded bit sequence is "0", the 0th impedance network is selected, and if it is "1", the 1st impedance network is selected. In one example, the number of component codes of the convolutional encoding in the data encoding processing module is 7, the preset target number is 6, and the total number of bits that need to be transmitted is Y of the second encoded bit sequence. The impedance network selection control module 7404 selects a corresponding impedance network according to the control of the second encoded bit sequence and transmits the signal 730 to the base station 710 by backscattering.

[0103] Figure 11 shows a schematic diagram comparing the performance of the second coded bit sequence at different preset target repetitions when the length of the information bit sequence is K=64 and the length of the second coded bit sequence is Y=3648. Here, the horizontal axis of Figure 11 is the additive white Gaussian noise (AWGN) signal-to-noise ratio (SNR), and the vertical axis is the block error rate (BLER), and the performance of the BLER curve is better the closer to the left. The five BLER curves shown in Figure 11 are respectively 5, 6, 8, 12, and 16 times the preset target repetitions (Rep), and it was found that the second coded bit sequence has better performance when the preset target repetition is 6 times.

[0104] As shown in FIG. 12, FIG. 12 is a flowchart of a data processing method according to another embodiment of the present application, and the data processing method may include, but is not limited to, steps S210 to S220.

[0105] Step S210: Receive a second coded bit sequence sent by the sender.

[0106] Step S220: Process the second coded bit sequence.

[0107] Here, the second coded bit sequence is obtained by the transmitting end performing a first operation or a second operation on the first coded bit sequence of a target length, and the first coded bit sequence is obtained by error correction coding the information bit sequence acquired by the transmitting end.

[0108] The first operation includes repeatedly generating another first bit for each first bit of the first coded bit sequence until a preset target number of times is reached to obtain a bit sequence including a plurality of first bits, and sequentially generating a second coded bit sequence based on each bit sequence; The second operation includes repeatedly generating a first coded bit sequence of another target length until a preset target number of times is reached to obtain a plurality of first coded bit sequences, and sequentially generating a second coded bit sequence based on the plurality of first coded bit sequences.

[0109] In one embodiment, the execution entity of the data processing method in this embodiment may be the receiving side 200 in the embodiment shown in Fig. 1, or the base station 210 in the embodiment shown in Fig. 2, but is not limited thereto, and those skilled in the art can select and set the corresponding execution entity according to the actual application scenario, and this embodiment does not limit this. In order to more simply describe the application scenario and principle of this application, in the following related embodiments, the receiving side is respectively described as the execution entity of the data processing method, but should not be understood as limiting the embodiments of this application.

[0110] In this step, the transmitting side performs error correction coding on the acquired information bit sequence to obtain a first coded bit sequence, repeatedly extends the obtained first coded bit sequence to obtain a second coded bit sequence, and transmits the second coded bit sequence to the receiving side, which is the tag device. That is, the transmitting side can obtain a desired second coded bit sequence by simply extending each bit of the first coded bit sequence of a target length or the entire first coded bit sequence a preset target number of times, so that the receiving side can simply and easily receive and process the second coded bit sequence, and the entire processing process can be simply and easily realized, with low requirements for hardware, i.e., the simplicity of the tag device and the reliability of data transmission can be ensured, and energy consumption can be reduced, thereby filling the technical gap of related methods.

[0111] As shown in FIG. 13, in one embodiment of the present application, step S220 will be further described.

[0112] Step S220 may include steps S221 and S222, but is not limited to these.

[0113] Step S221: Iteratively process the second coded bit sequence inversely to obtain a first coded bit sequence.

[0114] Step S222: Convolutionally decode the first coded bit sequence to obtain an information bit sequence.

[0115] In this step, the received second coded bit sequence is sequentially subjected to reverse iteration processing and convolutional decoding, so that the second coded bit sequence can be restored to the original information bit sequence, so that the source and content of the information bit sequence can be grasped, and the performance of the second coded bit sequence and the information bit sequence can be grasped more accurately and reliably.

[0116] 14, in an embodiment of the present application, step S221 is further described. Step S221 may include, but is not limited to, step S2210.

[0117] Step S2210: Iteratively reverse process the second coded bit sequence based on a predetermined target length and a predetermined target number of times to obtain a first coded bit sequence.

[0118] In this step, according to a predetermined target length and a predetermined target number of times, the second coded bit sequence is inversely iterated based on the target length and the predetermined target number of times to facilitate obtaining the first coded bit sequence, that is, a further intermediated first coded bit sequence can be obtained through the above restoration operation.

[0119] In one embodiment of the present application, step S221 will be further described. Step S221 includes: if the second coded bit sequence includes a plurality of bit sequences, and the bit sequence includes a plurality of first bits, for each bit sequence in the second coded bit sequence, extracting a plurality of first bits from the bit sequence and sequentially generating a first coded bit sequence based on the plurality of first bits; If the second coded bit sequence includes a plurality of first coded bit sequences, the method may include at least one of the steps of: splitting and combining the second coded bit sequence to obtain the first coded bit sequence, but is not limited to these.

[0120] In this step, one method is to obtain the first coded bit sequence by extracting and combining each bit sequence of the second coded bit sequence, so that each bit sequence of the second coded bit sequence can be better associated and the obtained first coded bit sequence can better embody its characteristics. Another method is to obtain the first coded bit sequence by performing a splitting and combining process on the second coded bit sequence, so that each first coded bit sequence of the second coded bit sequence can be better associated and the obtained first coded bit sequence can better embody its characteristics.

[0121] As shown in FIG. 15, in one embodiment of the present application, step S222 will be further described.

[0122] Step S222 may include step S2220, but is not limited to this.

[0123] Step S2220: Convolutionally decode the first coded bit sequence according to the predetermined target length, the constraint length of the error correction coding, and the length of the information bit sequence to obtain an information bit sequence.

[0124] In this step, by determining in advance the length of the first coded bit sequence, the constraint length of the convolutional coding and the length of the information bit sequence, it is easy to obtain the information bit sequence by convolutionally decoding the first coded bit sequence based on the length of the first coded bit sequence, the constraint length of the convolutional coding and the length of the information bit sequence, that is, a further initialized information bit sequence can be obtained by the above restoration operation.

[0125] In one embodiment of the present application, step S210 will be further described. Step S210 may include, but is not limited to, step S211.

[0126] Step S211: Receive a second coded bit sequence sent by the sending end according to a predetermined number of target impedance networks.

[0127] In this step, by predetermining the number of associated target impedance networks, it is easy to receive the second coded bit sequence transmitted by the transmitting end based on the number of target impedance networks, that is, the above restoration operation can stably and reliably receive the second coded bit sequence transmitted by the transmitting end, for example, when the number of target impedance networks is multiple, the parameters of any two target impedance networks are not identical, in this case, a desired target impedance network can be selected from the multiple target impedance networks.

[0128] In one embodiment, the method of predetermining each parameter in each of the above embodiments is not limited, for example, it may be determined by controlling transmission based on an external operating system, or it may be determined by higher layer signaling management, or it may be predetermined according to an actual application scenario, which is not limited.

[0129] In one embodiment, the target length is: A preset target number of times, A number of predetermined target impedance networks; The constraint length of the error correction coding; the length of the information bit sequence; and and higher layer configuration signaling.

[0130] In one embodiment, the preset target number of times is: The target length, A number of predetermined target impedance networks; The constraint length of the error correction coding; the length of the information bit sequence; and and higher layer configuration signaling.

[0131] In one embodiment, the number of target impedance networks is: The target length, A preset target number of times, The constraint length of the error correction coding; the length of the information bit sequence; and and higher layer configuration signaling.

[0132] In one embodiment, the error correction coding comprises: Low density parity check coding; Polarization coding; Reed-Solomon coding and Tail-biting convolutional coding; turbo encoding.

[0133] In one embodiment, the target length includes at least one of 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, and 12.

[0134] In one embodiment, the preset target number of times includes at least one of the following: 4, 5, 6, 7, 8, 12, 16, 24, 32, 48, and 64.

[0135] In one embodiment, when the error correction coding includes convolutional coding, a constraint length of the convolutional coding includes at least one of 7, 8, 9, 10, and 11.

[0136] In one embodiment, the number of target impedance networks includes at least one of 2, 4, 8, 16, and 32.

[0137] In one embodiment, the target length, the preset target number of times, the number of target impedance networks, and the type of error correction coding, etc., have been described in detail in the above embodiments, but the only difference between the above embodiments and this embodiment is the execution body, that is, one is the transmitting side and the other is the receiving side. Therefore, the related embodiment in this embodiment corresponds to the above embodiment, and in order to avoid redundancy, the description of the target length, the preset target number of times, the number of target impedance networks, the type of error correction coding, etc. will be omitted.

[0138] Furthermore, as shown in FIG. 16, an embodiment of the present application further discloses an electronic device 900 including at least one processor 910 and at least one memory 920 for storing at least one program, which, when executed by the at least one processor 910, realizes the data processing method in any of the aforementioned embodiments.

[0139] Moreover, an embodiment of the present application further discloses a computer-readable storage medium having stored thereon computer-executable instructions for performing the data processing method according to any of the above-mentioned embodiments.

[0140] Furthermore, an embodiment of the present application further discloses a computer program product including a computer program or computer instructions, the computer program or computer instructions being stored in a computer-readable storage medium, the computer program or computer instructions being read by a processor of the computer device from the computer-readable storage medium, and the processor executing the computer program or computer instructions, thereby causing the computer device to perform the data processing method of any of the above-mentioned embodiments.

[0141] All or part of the steps in the methods and systems disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. Some or all of the physical components may be implemented as software executed by a processor, such as a central processor, digital signal processor, microprocessor, or as hardware, or as an integrated circuit, such as an application specific integrated circuit. Such software may be distributed on a computer readable medium, which may include computer storage media (or non-transitory media) and communication media (or transitory media). As known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (e.g., computer readable instructions, data structures, program modules, or other data). Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disk (DVD) or other optical disk storage, magnetic cartridge, magnetic tape, magnetic disk storage or other magnetic storage device, or any other medium that can be used to store the desired information and that can be accessed by a computer. Additionally, communication media typically includes computer readable instructions, data structures, program modules or other data in a modulated data signal, such as a carrier wave or other transmission mechanism, and may include any information delivery media as known to those skilled in the art.

Claims

1. performing error correction coding on the obtained information bit sequence to obtain a first coded bit sequence of a target length; iteratively extending the first coded bit sequence to obtain a second coded bit sequence; transmitting the second coded bit sequence to a receiving side; The step of repeatedly extending the first coded bit sequence to obtain a second coded bit sequence comprises: repeatedly generating another first bit for each first bit of the first coded bit sequence until a preset target number of times is reached to obtain bit sequences including a plurality of the first bits, and sequentially generating the second coded bit sequence based on each bit sequence; or 1. A data processing method comprising the steps of: repeatedly generating a first coded bit sequence of another target length until a preset target number of times is reached, to obtain a plurality of the first coded bit sequences, and sequentially generating the second coded bit sequence based on the plurality of the first coded bit sequences.

2. said step of error correction coding the obtained information bit sequence to obtain a first coded bit sequence of a target length, 2. The method of claim 1, further comprising the step of: for each second bit of a obtained information bit sequence, convolutionally encoding said second bit to obtain said first encoded bit sequence of a target length.

3. said step of transmitting said second coded bit sequence to a receiving side further comprising: determining a target impedance network from the second encoded bit sequence; and transmitting said second encoded bit sequence to a receiver by said target impedance network.

4. The target length is The preset target number of times; A number of predetermined target impedance networks; A constraint length of the error correction coding; the length of said information bit sequence; and and higher layer configuration signaling.

5. The preset target number of times is: The target length; A number of predetermined target impedance networks; A constraint length of the error correction coding; the length of said information bit sequence; and and higher layer configuration signaling.

6. The number of the target impedance networks is The target length; The preset target number of times; A constraint length of the error correction coding; the length of said information bit sequence; and and higher layer configuration signaling.

7. The error correction coding is Low density parity check coding; Polarization coding; Reed-Solomon coding; Tail-biting convolutional coding; 2. The data processing method of claim 1, further comprising at least one of:

8. The data processing method of claim 1 , wherein the target length includes at least one of the following: 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, and 12.

9. The data processing method according to claim 1 , wherein the preset target number of times includes at least one of 4, 5, 6, 7, 8, 12, 16, 24, 32, 48, and 64.

10. The data processing method of claim 2 , wherein the convolutional coding constraint length comprises at least one of the following: 7, 8, 9, 10, and 11.

11. The data processing method of claim 3 , wherein the number of target impedance networks includes at least one of 2, 4, 8, 16, and 32.

12. The data processing method according to claim 3 , wherein when there are a plurality of target impedance networks, network parameters of any two of the target impedance networks are different.

13. receiving a second coded bit sequence transmitted by a transmitter; and processing the second coded bit sequence; The second coded bit sequence is obtained by the transmitting end performing a first operation or a second operation on a first coded bit sequence of a target length, and the first coded bit sequence is obtained by error correction coding an information bit sequence acquired by the transmitting end; the first operation includes repeatedly generating another first bit for each first bit of the first coded bit sequence until a preset target number of times is reached to obtain a bit sequence including a plurality of the first bits, and sequentially generating the second coded bit sequence based on each of the bit sequences; The data processing method, wherein the second operation includes repeatedly generating another first coded bit sequence of the target length until a preset target number of times is reached, to obtain a plurality of the first coded bit sequences, and sequentially generating the second coded bit sequence based on the plurality of the first coded bit sequences.

14. The step of processing the second coded bit sequence further comprises: inversely iterating through the second coded bit sequence to obtain the first coded bit sequence; and convolutionally decoding said first coded bit sequence to obtain said information bit sequence.

15. said step of iteratively processing the second coded bit sequence to obtain the first coded bit sequence comprises:

15. The method of claim 14, further comprising the step of: iteratively processing the second coded bit sequence inversely based on the predetermined target length and the predetermined target number of times to obtain the first coded bit sequence.

16. The step of convolutionally decoding the first coded bit sequence to obtain the information bit sequence comprises:

15. The data processing method of claim 14, further comprising: convolutionally decoding the first coded bit sequence based on a predetermined target length, a constraint length of the error correction coding, and a length of the information bit sequence to obtain the information bit sequence.

17. said step of iteratively processing the second coded bit sequence to obtain the first coded bit sequence comprises: if the second coded bit sequence includes a plurality of bit sequences, each of the bit sequences including a plurality of first bits, extracting a plurality of the first bits from each of the bit sequences of the second coded bit sequence, and sequentially generating the first coded bit sequence based on the plurality of the first bits; and if the second coded bit sequence includes a plurality of the first coded bit sequences, performing a splitting and combining process on the second coded bit sequence to obtain the first coded bit sequence.

18. The step of receiving a second coded bit sequence transmitted by a transmitter comprises: The data processing method according to claim 13, further comprising the step of receiving the second coded bit sequence transmitted by the transmitting end according to a number of predetermined target impedance networks.

19. The target length is The preset target number of times; A number of predetermined target impedance networks; A constraint length of the error correction coding; the length of said information bit sequence; and and higher layer configuration signaling.

20. The preset target number of times is: The target length; A number of predetermined target impedance networks; A constraint length of the error correction coding; the length of said information bit sequence; and and higher layer configuration signaling.

21. The number of the target impedance networks is The target length; The preset target number of times; A constraint length of the error correction coding; the length of said information bit sequence; and and higher layer configuration signaling.

22. The error correction coding is Low density parity check coding; Polarization coding; Reed-Solomon coding; Tail-biting convolutional coding; 14. The data processing method of claim 13, further comprising at least one of:

23. The data processing method of claim 13 , wherein the target length includes at least one of the following: 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, and 12.

24. The data processing method according to claim 13 , wherein the preset target number of times includes at least one of 4, 5, 6, 7, 8, 12, 16, 24, 32, 48, and 64.

25. 14. The data processing method of claim 13, wherein when the error correction coding comprises convolutional coding, a constraint length of the convolutional coding comprises at least one of 7, 8, 9, 10, and 11.

26. 20. The data processing method of claim 18, wherein the number of target impedance networks includes at least one of 2, 4, 8, 16, and 32.

27. The data processing method of claim 18 , wherein when there are a plurality of target impedance networks, network parameters of any two of the target impedance networks are different.

28. At least one processor; at least one memory for storing at least one program; An electronic device, wherein at least one of said programs, when executed by at least one of said processors, implements the data processing method according to any one of claims 1 to 27.

29. A computer readable storage medium storing a processor executable program for implementing the data processing method according to any one of claims 1 to 27, when executed by a processor.

30. A computer program product comprising a computer program or computer instructions, the computer program or computer instructions being stored in a computer-readable storage medium, the computer program or computer instructions being read by a processor of a computing device from the computer-readable storage medium, and the processor executing the computer program or computer instructions, thereby causing the computing device to perform the data processing method according to any one of claims 1 to 27.

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