Micro LED panel having photonic crystal structure and its manufacturing method

Abstract

A micro LED panel having a micro LED array, and a system and method for manufacturing the micro LED panel are provided in the present disclosure. The micro LED array includes at least one micro LED structure. The micro LED structure includes at least a mesa structure and a photonic crystal structure array formed in the mesa structure, which realizes higher directional light emission, simplifies the structure, and reduces the cost. Furthermore, a re-grown layer is formed on at least a portion of the sidewall of the mesa structure, which reduces non-radiative recombination on the sidewall surface of the mesa structure, and enhances the light emission efficiency and image quality.

Description

[Technical field]

[0001] Technical Field The present disclosure relates generally to light emitting diode (LED) technology, and more particularly to micro LED panels and methods for manufacturing micro LED structures. [Background technology]

[0002] background

[0002] Display technology is becoming increasingly important in today's commercial electronic devices. These display panels are widely used not only in stationary large screens such as liquid crystal display televisions (LCD TVs) and organic light emitting diode televisions (OLED TVs), but also in portable electronic devices such as laptop personal computers, smartphones, tablets, and wearable electronic devices.

[0003]

[0003] Inorganic micro light-emitting diodes are becoming increasingly important for use in a variety of applications, including self-luminous microdisplays, visible light communication, and optogenetics. Micro LEDs exhibit higher output performance than conventional LEDs due to their excellent strain relief, improved light extraction efficiency, and uniform current distribution. Micro LEDs also have improved thermal effects and operate at higher current densities, faster response speeds, larger operating temperature ranges, higher resolutions, color gamuts, and contrasts, and lower power consumption compared to conventional LEDs.

[0004]

[0004] To achieve higher pixel density, the size of micro-LEDs is getting smaller than 200 nm. However, the efficiency and carrier lifetime of devices based on micro-LED arrays are significantly degraded with the drastic reduction in micro-LED size due to surface recombination and poor p-type electrical conduction caused by top-down etching. The performance of micro-LEDs is also severely affected, especially by the quantum confined Stark effect caused by strain-induced polarization fields, which leads to unstable operation and a large change in emission wavelength with increasing current. In addition, as the diameter of the micro-LEDs is reduced, a large number of surface states and scratches are formed on the surface of the micro-LED structure by Inductively Coupled Plasma (ICP) etching, which increases non-radiative recombination at the surface of the micro-LED structure.

[0005]

[0005] In addition, the light emitted by the conventional micro LED structure is mainly distributed in all directions, resulting in poor directional light emission and reduced light intensity along the vertical direction. In order to realize the directional light emission of the micro LED structure, an additional reflective structure is configured around the mesa and at the bottom of the mesa of the micro LED structure to reflect the emitted light in the same direction, which complicates the manufacturing process and increases the cost of the micro LED.

[0006]

[0006] Furthermore, in devices based on micro-LED arrays, one micro-LED is traditionally used as one pixel, such as in a monolithic micro-LED array panel. However, as the diameter of the micro-LED structure decreases, the external quantum efficiency (EQE) decreases, which reduces the light efficiency of each pixel.

[0007]

[0007] The above content is only used to facilitate understanding of the technical solutions of the present application, and is not an admission that the above content is prior art. Summary of the Invention [Problem to be solved by the invention]

[0008] overview

[0008] Improved display designs are needed that help ameliorate and address the shortcomings of conventional display systems as discussed above. In particular, display panels with increased efficiency and improved images are needed.

[0009]

[0009] To overcome the above-mentioned drawbacks, the present invention provides a micro LED panel that improves luminous efficiency, avoids crosstalk, minimizes surface carrier loss, and optimizes quantum well sidewall area. [Means for solving the problem]

[0010]

[0010] In order to achieve the above objectives, some exemplary embodiments of the present disclosure provide a micro LED panel including a micro LED array, At least a micro LED structure, comprising at least a mesa structure including, from bottom to top, a first type epitaxial layer, a light emitting layer, and a second type epitaxial layer; a photonic crystal structure array including a plurality of photonic crystal structures formed in a mesa structure, the photonic crystal structure array having gaps between adjacent photonic crystal structures; The present invention provides a micro LED panel comprising a micro LED structure comprising:

[0011]

[0011] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the photonic crystal structure array is formed above the light emitting layer as the light emitting surface of the mesa structure.

[0012]

[0012] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the mesa structure further includes a first mesa structure and a second mesa structure, the first mesa structure is formed on the bottom of the second mesa structure, and the photonic crystal array is formed within the second mesa structure and is not in contact with the light emitting layer.

[0013]

[0013] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the bottom of the photonic crystal structure array is aligned with the bottom of the second mesa structure and aligned with the top of the regrown layer.

[0014]

[0014] In some exemplary embodiments of the micro LED panel or any combination of exemplary embodiments, the second mesa structure is formed by at least a portion of the second type epitaxial layer.

[0015]

[0015] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the first mesa structure is formed from top to bottom by a light emitting layer and a first type epitaxial layer.

[0016]

[0016] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the second type epitaxial layer includes an upper layer and a bottom layer below the upper layer, a first mesa structure is formed by the bottom layer, the light emitting layer, and the second type epitaxial layer, and a second mesa structure is formed by the upper layer.

[0017]

[0017] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, a first mesa structure is formed by a first type epitaxial layer and a portion of the light emitting layer, and a second mesa structure is formed, from bottom to top, by a portion of the light emitting layer and a second type epitaxial layer.

[0018]

[0018] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the width of the bottom of the second mesa structure is greater than the width of the top of the first mesa structure.

[0019]

[0019] In some exemplary embodiments of the micro LED panel or any combination of exemplary embodiments, the photonic crystal structure is a one-dimensional nanostructure.

[0020]

[0020] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the multiple one-dimensional nanostructures are distributed in a photonic crystal structure array.

[0021]

[0021] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the one-dimensional nanostructure is formed in a mesa structure above the light emitting layer along the light emission direction of the mesa structure.

[0022]

[0022] In some exemplary embodiments of the micro LED panel or any combination of exemplary embodiments, the diameter of the one-dimensional nanostructure is less than or equal to 1000 nm.

[0023] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the one-dimensional nanostructures are formed perpendicular to the light emitting layer.

[0024]

[0024] In some exemplary embodiments of the micro LED panel or any combination of the exemplary embodiments, a dielectric layer fills the gaps.

[0025]

[0025] In some exemplary embodiments of the micro LED panel or any combination of the exemplary embodiments, a dielectric layer is further formed on the sidewalls of the mesa structure.

[0026]

[0026] In some exemplary embodiments of the micro LED panel or any combination of exemplary embodiments, the dielectric layer is transparent and electrically insulating.

[0027]

[0027] In some exemplary embodiments of the micro LED panel or any combination of exemplary embodiments, the width of the mesa structure is 3 μm or less.

[0028]

[0028] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the light emitting layer includes a stack of multiple quantum well pairs.

[0029]

[0029] In some exemplary embodiments of the micro LED panel or any combination of exemplary embodiments, the light emitting layer has a linear shape without any bends.

[0030]

[0030] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the material of the first epitaxial layer is single crystalline and the material of the second epitaxial layer is single crystalline.

[0031]

[0031] In some exemplary embodiments of the micro LED panel or any combination of exemplary embodiments, the micro LED structure further includes a re-growth layer formed on at least a portion of the sidewall of the mesa structure.

[0032]

[0032] In some exemplary embodiments of the micro LED panel or any combination of exemplary embodiments, a re-growth layer is formed on the sidewalls of the light emitting layer.

[0033]

[0033] In some exemplary embodiments of the micro LED panel or any combination of exemplary embodiments, a re-growth layer is formed on a sidewall of the first mesa structure.

[0034]

[0034] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the material of the regrown layer having intrinsic doped ions is the same as the material of the first type epitaxial layer and / or the material of the second type epitaxial layer, but without intentional doping ions.

[0035]

[0035] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the material of the regrown layer is one or more of GaP, AlP, GaAs, InP, AlInP, GaInP, AlN, GaN, and / or InN.

[0036]

[0036] In some exemplary embodiments of the micro LED panel or any combination of exemplary embodiments, the material of the re-grown layer is single crystalline.

[0037]

[0037] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the band gap of the regrown layer is greater than the band gap of the light emitting layer.

[0038]

[0038] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the thickness of the re-grown layer is less than the thickness of the light emitting layer.

[0039]

[0039] In some exemplary embodiments of the micro LED panel or any combination of exemplary embodiments, the thickness of the re-grown layer is less than or equal to 100 nm.

[0040]

[0040] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the resistance of the regrown layer is greater than the resistance of the light emitting layer.

[0041]

[0041] In some exemplary embodiments of the micro LED panel or any combination of exemplary embodiments, the re-grown layer is not electrically conductive.

[0042]

[0042] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, a top contact is formed on the top of the mesa structure and a top conductive layer is formed on the top contact and on the top of the mesa structure.

[0043]

[0043] In some exemplary embodiments or any combination of exemplary embodiments of the micro LED panel, the upper conductive layer fills a portion of the gap and the lower portion of the upper contact fills a portion of the gap.

[0044]

[0044] In some exemplary embodiments of the micro LED panel or any combination of exemplary embodiments, the top conductive layer is transparent.

[0045]

[0045] In some exemplary embodiments of the micro LED panel or any combination of exemplary embodiments, a dielectric layer is formed between adjacent mesa structures.

[0046] Some exemplary embodiments of the present disclosure relate to a method for manufacturing a micro LED panel, comprising the following steps: Step 1 of providing an epitaxial structure on a semiconductor substrate; Step 2 of sequentially forming a lower contact layer and a lower connection layer on the upper surface of the first type epitaxial layer; Step 3: bonding the lower connection layer with the IC backplane by turning the semiconductor substrate upside down, and then removing the semiconductor substrate; Step 4 of forming a photonic crystal structure array including a plurality of photonic crystal structures by etching the second epitaxial layer; Step 5: forming a separation space defining a mesa structure by etching the photonic crystal structure array, the light emitting layer, the first type epitaxial layer, the lower contact layer and the lower connection layer from top to bottom; Step 6, forming a dielectric layer on the sidewalls of the photonic crystal structure; Step 7 of forming a top contact and a top conductive layer on top of the dielectric layer and on top of the mesa structure; The present invention provides a method comprising:

[0047]

[0047] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, in step 4, the power for etching is 200 W to 800 W, the time for etching is 50 seconds to 300 seconds, and the lower part of the photonic crystal structure of the photonic crystal structure array is above the light emitting layer and is not in contact with the light emitting layer.

[0048]

[0048] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, in step 6, a dielectric layer is further formed on top of the regrown layer between adjacent second mesa structures, further completely filling the separation space.

[0049]

[0049] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, in step 4, the photonic crystal structure is a one-dimensional nanostructure, and the one-dimensional nanostructure is formed in a second mesa structure above the light emitting layer along the light emission direction of the mesa structure, and the one-dimensional nanostructure is formed perpendicular to the light emitting layer.

[0050]

[0050] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, the diameter of the one-dimensional nanostructure is less than or equal to 1000 nm.

[0051]

[0051] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, in step 5, the width of the mesa structure is 3 μm or less.

[0052] Some exemplary embodiments of the present disclosure relate to a method for manufacturing a micro LED panel, comprising the following steps: Step 1 of providing an epitaxial structure on a semiconductor substrate; Step 2 of forming a first mesa structure by patterning the first type epitaxial layer, the light emitting layer, and a portion of the second type epitaxial layer from top to bottom; Step 3 of forming a regrowth layer on the sidewalls and tops of the first mesa structures and on exposed tops of the second type epitaxial layer between adjacent first mesa structures; Step 4 forming a bottom contact in the regrowth layer, forming a dielectric layer over the regrowth layer, and forming an opening in the dielectric layer to expose the bottom contact; Step 5, forming a sub-connection structure in the opening; Step 6: bonding the lower connection structure with the IC backplane by turning the semiconductor substrate upside down, and then removing the semiconductor substrate; Step 7: forming a photonic crystal structure array including a plurality of photonic crystal structures by forming a second mesa structure and etching the second epitaxial layer, and a separation space is formed between adjacent second mesa structures; Step 8 forming a second dielectric layer on the sidewalls of the photonic crystal structure; Step 9: forming a top contact and a top conductive layer on the top of the dielectric layer and on the top of the second mesa structure, the mesa structure being formed by the first mesa structure and the second mesa structure; The present invention provides a method comprising:

[0053]

[0053] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, in step 7, the method further includes etching the second epitaxial layer and stopping on the top of the regrown layer, wherein the bottom of the photonic crystal structure of the photonic crystal structure array is above the light emitting layer and is not in contact with the light emitting layer, the bottom of the photonic crystal structure array is aligned with the bottom of the second mesa structure and aligned with the top of the regrown layer, the power for etching is 200W to 800W, and the time for etching is 50 seconds to 300 seconds.

[0054]

[0054] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, in step 8, a second dielectric layer is further formed on top of the regrown layer between adjacent second mesa structures, further completely filling the separation space.

[0055]

[0055] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, in step 7, the width of the bottom of the second mesa structure is wider than the width of the top of the first mesa structure.

[0056]

[0056] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, in step 7, the photonic crystal structure is a one-dimensional nanostructure, and the one-dimensional nanostructure is formed in a second mesa structure above the light emitting layer along the light emission direction of the mesa structure, and the one-dimensional nanostructure is formed perpendicular to the light emitting layer.

[0057]

[0057] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, the diameter of the one-dimensional nanostructure is less than or equal to 1000 nm.

[0058]

[0058] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, in step 7, the width of the second mesa structure is 3 μm or less.

[0059]

[0059] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, the material of the regrowth layer having intrinsic doped ions is the same as the material of the first type epitaxial layer and / or the material of the second type epitaxial layer, but without intentional doping ions, and the material of the regrowth layer is single crystalline.

[0060]

[0060] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, the material of the regrown layer is one or more of GaP, AlP, GaAs, InP, AlInP, GaInP, AlN, GaN, and / or InN.

[0061]

[0061] In some exemplary embodiments or any combination of exemplary embodiments of the method for manufacturing a micro LED panel, the band gap of the regrown layer is greater than the band gap of the light-emitting layer, the thickness of the regrown layer is less than the thickness of the light-emitting layer, and the resistance of the regrown layer is greater than the resistance of the light-emitting layer.

[0062]

[0062] The micro LED panel provided by the present disclosure can avoid non-radiative recombination on the sidewall of the micro LED structure. Moreover, compared with the conventional micro LED, the micro LED structure of the present disclosure has high directional emission without other reflective structures, which simplifies the micro LED structure and reduces the cost. Moreover, the present disclosure can also suppress non-radiative recombination on the surface of the micro LED structure, which improves the image quality and increases the EQE of the pixel.

[0063]

[0063] It should be noted that the various embodiments described above can be combined with any other embodiments described herein. The features and advantages described herein are not all-inclusive, and in particular many additional features and advantages will be apparent to those skilled in the art in view of the drawings, specification, and claims. It should also be noted that the wording used herein is primarily selected for readability and instructional purposes, and may not be selected to delineate or limit the subject matter of the present invention.

[0064] BRIEF DESCRIPTION OF THE DRAWINGS

[0064] In order to allow the present disclosure to be more fully understood, a more specific description may be given with reference to the features of various embodiments, some of which are illustrated in the accompanying drawings. However, the accompanying drawings merely illustrate the relevant features of the present disclosure and should therefore not be considered limiting, since the description may admit of other useful features.

[0065]

[0065] For convenience, "up" is used to mean away from the substrate of the light-emitting structure shown in the figures and "down" means toward the substrate, and other directional terms such as top, bottom, above, below, underneath, beneath, etc. should be interpreted accordingly. [Brief description of the drawings]

[0066] [Figure 1]

[0066] FIG. 2 is a cross-sectional view of a mesa structure according to some embodiments (eg, the first embodiment) of the present disclosure. [Diagram 2]

[0067] FIG. 1 is a cross-sectional structural diagram of a micro LED panel according to some embodiments (e.g., the first embodiment) of the present disclosure. [Diagram 3]

[0068] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (e.g., a first embodiment). [Figure 4] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the first embodiment). [Diagram 5] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the first embodiment). [Figure 6] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the first embodiment). [Figure 7]1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the first embodiment). [Figure 8] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the first embodiment). [Figure 9] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the first embodiment). [Figure 10] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the first embodiment). [Figure 11]

[0069] FIG. 2 is a cross-sectional structural diagram of a micro LED panel according to some embodiments (e.g., the second embodiment) of the present disclosure. [Figure 12]

[0070] FIG. 1 is a cross-sectional structural diagram of another micro LED panel according to some embodiments (e.g., the second embodiment) of the present disclosure. [Figure 13]

[0071] 1 is a cross-sectional structural diagram of a mesa structure according to some embodiments (eg, the second embodiment) of the present disclosure. [Figure 14] FIG. 11 is a cross-sectional structural diagram of a mesa structure according to some embodiments (eg, the second embodiment) of the present disclosure. [Figure 15]

[0072] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (e.g., the second embodiment). [Figure 16] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the second embodiment). [Figure 17] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the second embodiment). [Figure 18] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the second embodiment). [Figure 19] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the second embodiment). [Figure 20] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the second embodiment). [Figure 21] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the second embodiment). [Figure 22] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the second embodiment). [Figure 23] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the second embodiment). [Figure 24] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the second embodiment). [Diagram 25] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the second embodiment). [Figure 26]

[0073] FIG. 13 is a cross-sectional structural diagram of another micro LED panel according to some embodiments (e.g., the third embodiment) of the present disclosure. [Figure 27]

[0074] FIG. 27 is a top view of the mesa structure of FIG. 26 according to some embodiments (e.g., the third embodiment) of the present disclosure. [Figure 28]

[0075] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (e.g., the third embodiment). [Figure 29] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the third embodiment). [Diagram 30]1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the third embodiment). [Diagram 31] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the third embodiment). [Diagram 32] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the third embodiment). [Diagram 33] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the third embodiment). [Diagram 34] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the third embodiment). [Diagram 35] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the third embodiment). [Diagram 36] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the third embodiment). [Figure 37] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the third embodiment). [Figure 38]

[0076] 1 illustrates another step 7 of depositing a dielectric layer according to some embodiments (eg, the third embodiment). [Figure 39]

[0077] FIG. 13 is a cross-sectional structural diagram of another micro LED panel according to some embodiments (e.g., the third embodiment) of the present disclosure. [Diagram 40]

[0078] FIG. 1 is a cross-sectional structural diagram of a micro LED panel according to some embodiments (e.g., the fourth embodiment) of the present disclosure. [Diagram 41]

[0079] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (e.g., the fourth embodiment). [Diagram 42] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the fourth embodiment). [Diagram 43] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the fourth embodiment). [Diagram 44] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the fourth embodiment). [Diagram 45] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the fourth embodiment). [Diagram 46] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the fourth embodiment). [Figure 47] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the fourth embodiment). [Figure 48] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the fourth embodiment). [Figure 49] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the fourth embodiment). [Figure 50] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the fourth embodiment). [Figure 51] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the fourth embodiment). [Figure 52] 1 illustrates steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the fourth embodiment). DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0067]

[0080] According to common practice, the various features illustrated in the figures are not drawn to scale. Accordingly, dimensions of the various features may be arbitrarily expanded or reduced for clarity. In addition, some drawings may not depict all of the components of a given system, method, or device. Finally, like reference numerals may be used to denote like features throughout the specification and figures.

[0068] Detailed Description

[0081] Numerous details have been described herein to provide a thorough understanding of the example embodiments illustrated in the accompanying drawings. However, some embodiments may be practiced without many of the specific details, and the claims are limited only by the features and aspects specifically recited in the claims. Moreover, well-known processes, components, and materials have not been described in extensive detail so as not to unnecessarily obscure relevant aspects of the embodiments described herein.

[0069]

[0082] In order to solve the problems in the related art as discussed above, in some embodiments, a micro LED panel including a plurality of micro LED structures is disclosed in the present disclosure. The dimension of the micro LED panel is 1 cm or less. The micro LED structures are arrayed in the micro LED panel with a resolution of 720*480, 640*480, 1920*1080, 1280*720, 2k, or 4k, etc. The diameter of the micro LED structure is at the nanometer level, such as 20 nm to 100 nm.

[0070]

[0083] FIG. 1 is a cross-sectional view of a mesa structure according to some embodiments (eg, the first embodiment) of the present disclosure.

[0071]

[0084] Referring to Fig. 1, the micro LED structure includes a mesa structure. The mesa structure is formed from bottom to top by a first type epitaxial layer 01, a light emitting layer 03, and a second type epitaxial layer 02. The first type and the second type have different conductivity types, for example, the first type is P type while the second type is N type. In another example, the first type is N type while the second type is P type. The material of the first type epitaxial layer 01 can be one or more of p-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and / or InN, etc., or any combination thereof, preferably one or more of p-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, and / or AlGaInP, or any combination thereof; The material of the second type epitaxial layer 02 can be one or more of n-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and / or InN, etc., or any combination thereof, preferably one or more of n-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, and / or AlGaInP, or any combination thereof.

[0072]

[0085] In some embodiments, the light emitting layer 03 is formed by stacking a plurality of pairs of quantum well layers. The material of the quantum well layers can be one of GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, and the like. In addition, the thickness of the first type epitaxial layer 01 is greater than the thickness of the second type epitaxial layer 02, and the thickness of the light emitting layer 03 is less than the thickness of the first type epitaxial layer 01. Preferably, the thickness of the first type epitaxial layer 101 is between 700 nm and 2 μm, and the thickness of the second type epitaxial layer 02 is between 100 and 200 nm. Preferably, the thickness of a single quantum well layer is less than or equal to 30 nm. In some embodiments, the light emitting layer 03 includes three or less pairs of quantum well layers. In addition, the light emitting layer has a straight shape without bending.

[0073]

[0086] In some embodiments, the first type epitaxial layer 01 may have multiple stacked first type semiconductor sublayers, and the second type epitaxial layer 02 may have multiple stacked second type semiconductor sublayers. For example, the top layer of the first type epitaxial sublayer is a P cap layer connected to the bottom of the light emitting layer 03, and the bottom layer of the second type epitaxial sublayer is an N cap layer connected to the top of the light emitting layer 03 to protect the quantum well layer from damage.

[0074]

[0087] Furthermore, the first type epitaxial layer 01 includes one or more reflective mirror layers 011 (not shown in FIG. 1). The reflective mirror layer 011 can be formed on the bottom surface of the first type epitaxial layer 01 or formed inside the first type epitaxial layer 01. The material of the reflective mirror layer is a combination of a dielectric material and a metal material. It is known that multiple reflective mirror layers 011 are horizontally formed on the first type epitaxial layer 01 one by one at different horizontal levels, which divides the first type epitaxial layer 01 into multiple layers. In addition, the material of the first epitaxial layer is monocrystalline, and the material of the second epitaxial layer is monocrystalline.

[0075]

[0088] FIG. 2 is a cross-sectional structural diagram of a micro LED panel according to some embodiments (e.g., the first embodiment) of the present disclosure.

[0076]

[0089] Referring to FIG. 2, a top contact 09 and a top conductive layer 08 are formed on the top surface of the second type epitaxial layer 02. The conductivity type of the top contact 09 is the same as the type of the second type epitaxial layer 02, e.g., if the second type is n-type, the top contact 09 is an n-type top contact, or if the second type is p-type, the top contact 09 is a p-type top contact. In some embodiments, the top contact 09 is made of a metal or alloy, such as AuGe, AuGeNi, etc. The top contact 09 is used to form an ohmic contact between the top conductive layer 08 and the second type epitaxial layer 02 to optimize the electrical properties of the micro LED. The diameter of the top contact 09 is about 20 nm to 50 nm, and the thickness of the top contact 09 is about 10 nm to 20 nm. In some embodiments, the top conductive layer 08 is transparent and conductive, for example, indium tin oxide (ITO), fluorine doped tin oxide (FTO), or the like.

[0077]

[0090] In the present disclosure, to achieve highly directional light emission of the micro LED structure, the photonic crystal structure array is formed in the mesa structure. In some embodiments, the photonic crystal structure array is not in contact with the light emitting layer 03. In other embodiments, the photonic crystal structure array can be in contact with the light emitting layer 03. Furthermore, the photonic crystal structure array can be formed in any part of the mesa structure. For example, the photonic crystal structure array is formed on the light emitting surface of the mesa structure, or the photonic crystal structure array is formed through the mesa structure from top to bottom.

[0078]

[0091] Additionally, in some embodiments, the top conductive layer 08 is continuous over the entire micro LED panel, where "whole" means a substantial portion or all of the micro LED panel, while in other embodiments the top conductive layer 08 is not interconnected between adjacent mesa structures.

[0079]

[0092] The details of the micro LED panel will be further described below in conjunction with the drawings.

[0080]

[0093] First embodiment

[0094] To solve the problems in the related art, a micro LED panel is provided in an embodiment of the present disclosure.

[0081]

[0095] The micro LED panel includes a micro LED array. Referring to FIG. 1, the micro LED structure in the micro LED array includes at least a mesa structure and a photonic crystal structure array. The mesa structure includes a first type epitaxial layer 01, a light emitting layer 03, and a second type epitaxial layer 02 from bottom to top. The photonic crystal structure array is formed in the mesa structure. There is a gap between adjacent photonic crystal structures 10. Here, the second epitaxial layer includes an upper layer 021 and a bottom layer 022 (for example, as shown in FIG. 2). Furthermore, the photonic crystal structure array is formed in the upper layer 021 above the light emitting layer 03 as the light emitting surface of the mesa structure. In addition, in order to achieve high image quality, the width of the mesa structure is 3 μm or less.

[0082]

[0096] In addition, the photonic crystal structure 10 is a one-dimensional nanostructure. A plurality of one-dimensional nanostructures are distributed in an array. The one-dimensional nanostructures are formed in a mesa structure along the light emission direction. Moreover, the one-dimensional nanostructures are formed perpendicular to the light emitting layer 03. The one-dimensional nanostructures are such as nanowires, nanorods, nanofibers, and so on. Preferably, the diameter of the one-dimensional nanostructure is less than or equal to 1000 nm.

[0083]

[0097] Referring to FIG. 2, a dielectric layer 05 is filled in the gap between adjacent photonic crystal structures. Furthermore, the dielectric layer 05 can be further formed on the sidewall of the mesa structure. Preferably, the material of the dielectric layer 05 is selected from one or more of SiO2, SiNx, Al2O3, AlN, HfO2, TiO2, and / or ZrO2, etc. The dielectric layer 05 in the gap between adjacent photonic crystal structures is transparent and electrically insulating. In addition, the dielectric layer 05 is further formed in the space between adjacent mesa structures, and even completely fills the space between adjacent mesa structures.

[0084]

[0098] In some embodiments, a top contact 09 is formed on the top of the mesa structure, and a top conductive layer 08 is formed on the top contact 09 and the top of the mesa structure. Here, the top conductive layer 08 is formed continuously on the entire array of micro LED structures. In addition, when the top of the dielectric layer 05 is lower than the top of the photonic crystal structures, the top conductive layer 08 fills a part of the gap between adjacent photonic crystal structures, and the bottom of the top contact 09 fills a part of the gap between adjacent photonic crystal structures. Here, the light emission direction is from bottom to top, so the top conductive layer 08 is transparent.

[0085]

[0099] In some embodiments, the bottom contact layer 06' is formed on the bottom surface of the first type epitaxial layer 01. The conductivity type of the bottom contact is the same as that of the first type epitaxial layer 01, for example, if the first type epitaxial layer 01 is P type, the bottom contact layer 06' is also P type. Furthermore, since light is emitted upwards or downwards from the LED mesa structure consisting of or including the first type epitaxial layer 01, the second type epitaxial layer 02, and the light emitting layer 03, the diameter of the bottom contact layer 06' is larger than the diameter of the top contact 09. The diameter of the top contact 09 can be as small as possible, but it is also possible that the top contact 09 can be as small as a dot on the top surface of the second type epitaxial layer 02. For example, the width of the top contact 09 is less than 1 / 5, 1 / 6, 1 / 10 or 1 / 20 of the width of the second type epitaxial layer 02 or mesa structure. In some embodiments, the diameter of the bottom contact layer 06' can also be equal to or smaller than the diameter of the top contact 09. A bottom connection layer 07' is formed under the bottom contact layer 06'. The bottom connection layer 07' is used to connect with a bottom electrode, such as a contact pad of the IC backplane 00. Furthermore, the diameter of the bottom connection structure 07 is between 20 nm and 1 μm. Preferably, the diameter of the bottom connection layer 07' is between 800 nm and 1 μm. Furthermore, the center of the bottom contact layer 06' is vertically aligned with the center of the top contact 09. In addition, the material of the bottom contact layer 06' and the bottom connection layer 07' is a transparent, conductive material, such as ITO or FTO, and so on. In some embodiments, the material of the bottom contact layer 06' and the bottom connection layer 07' is not transparent. In some embodiments, the material of the bottom contact layer 06' and the bottom connection layer 07' may be a conductive metal. Preferably, the material of the bottom contact layer 06' may be selected from at least one of Au, Zn, Be, Cr, Ni, Ti, Ag, and Pt. The material of the bottom connection layer 07' may be selected from at least one of Au, Zn, Be, Cr, Ni, Ti, Ag, and Pt.

[0086]

[0100] 2, the center of the bottom contact layer 06' is vertically aligned with the center of the first type epitaxial layer 01. However, in another embodiment, the center of the bottom contact layer 06' is not vertically aligned with the center of the first type epitaxial layer 01.

[0087]

[0101] In some embodiments, the method for manufacturing the aforementioned micro LED panel in this first embodiment includes the following steps:

[0088]

[0102] 3-10 separately illustrate steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the first embodiment).

[0089]

[0103] Referring to FIG. 3, step 1 involves providing an epitaxial structure on a semiconductor substrate 00''.

[0090]

[0104] Here, the epitaxial structure includes, from top to bottom, a first type epitaxial layer 01, a light emitting layer 03, and a second type epitaxial layer 02. The material of the semiconductor substrate 00' can be GaN, GaAs, etc. The epitaxial structure is grown on the substrate 00'.

[0091]

[0105] Referring to FIG. 4, step 2 involves sequentially forming a bottom contact layer 06 ′ and a bottom connection layer 07 ′ on the top surface of the first type epitaxial layer 01 .

[0092]

[0106] Here, the bottom contact layer 06' and the bottom connection layer 07' are deposited in sequence by conventional physical vapor deposition. The bottom connection layer 07' also serves as a metal bonding layer for the subsequent metal bonding process in step 3.

[0093]

[0107] Referring to FIG. 5, step 3 includes bonding the bottom connection layer 07' with the IC backplane 00 by turning the semiconductor substrate 00' upside down, and then removing the semiconductor substrate 00'.

[0094]

[0108] Here, the semiconductor substrate 00' with the epitaxial structure is first turned upside down. Then, the bottom connection layer 07' is bonded with the pads of the IC backplane 00. After the bonding process, the semiconductor substrate 00' is removed by a conventional removal process, such as laser lift-off.

[0095]

[0109] Referring to FIG. 6, step 4 includes forming a photonic crystal structure array by etching the second epitaxial layer 02.

[0096]

[0110] Here, the upper layer 021 of the second epitaxial layer 02 is etched by a plasma etching process and stopped on the bottom layer 022 of the second epitaxial layer 02 above the light emitting layer 03. Thus, a photonic crystal structure array is formed in the upper layer 021 above the light emitting layer 03 and is not in contact with the light emitting layer 03. The power for etching is 200W-800W, and the time for etching is 50s-300s.

[0097]

[0111] Referring to FIG. 7, step 5 includes etching the photonic crystal structure array, the light emitting layer 03, the first type epitaxial layer 01, the lower contact layer 06' and the lower connection layer 07' from top to bottom to form spaces defining the mesa structure.

[0098]

[0112] Now, referring to Fig. 7, the photonic crystal structure array is further etched by a conventional plasma etching process to define mesa structures, forming spaces between adjacent mesa structures. The bottom contact layer 06' and the bottom connection layer 07' are further etched from top to bottom, such that the bottom of the spaces extends to the top of the IC backplane 00. Thus, the bottom contact layer 06' and the bottom connection layer 07' are separated by spaces.

[0099]

[0113] Referring to FIG. 8, step 6 involves forming a dielectric layer 05 on the sidewalls of the photonic crystal structure.

[0100]

[0114] Here, the dielectric layer 05 is deposited on the sidewalls of the photonic crystal structures by conventional chemical vapor deposition. The dielectric layer 05 further completely fills the gaps between adjacent photonic crystal structures. Furthermore, the dielectric layer 05 is formed in the spaces between adjacent mesa structures. Preferably, the dielectric layer 05 completely fills the spaces. In another embodiment, the dielectric layer 05 is formed only on the sidewalls of the mesa structures and does not completely fill the spaces.

[0101]

[0115] 9 and 10, step 7 includes forming a top contact 09 and a top conductive layer 08 on top of the dielectric layer 05 and on top of the mesa structure.

[0102]

[0116] Now, referring to FIG. 9, a top contact 09 is deposited on top of the second type epitaxial layer 02 while protecting other areas with a mask, and then the mask is removed. Now, referring to FIG. 10, a top conductive layer 08 is deposited on the second epitaxial layer 02 by a conventional vapor deposition process. Here, the top conductive layer 08 is formed on top of the photonic crystal structure, on top of the dielectric layer 05, and covers the top contact 09. In another embodiment, the dielectric layer 05 is formed only on the sidewalls of the mesa structures and does not completely fill the spaces. Thus, the top conductive layer 08 is further formed in the spaces between adjacent mesa structures.

[0103]

[0117] Second embodiment

[0118] The micro LED panel of the second embodiment includes a micro LED array. Figure 11 is a cross-sectional structural diagram of a micro LED panel according to some embodiments (e.g., the second embodiment) of the present disclosure.

[0104]

[0119] 11, the micro LED structure in the micro LED array includes a mesa structure and a photonic crystal structure array formed in the mesa structure. The difference between the first embodiment and the second embodiment will be further described herein below.

[0105]

[0120] In the second embodiment, the mesa structure further includes a first mesa structure (below the dotted line) and a second mesa structure (above the dotted line). The first mesa structure is formed below the second mesa structure. Also, the photonic crystal array is formed in the second structure above the light emitting layer 03 and is not in contact with the light emitting layer 03. Here, the light emission direction is from bottom to top.

[0106]

[0121] In some embodiments, here the second mesa structure is formed by at least a part of the epitaxial layer 02 of the second type (above the dotted line in FIG. 11 ), and the first mesa structure is formed by the remaining part of the epitaxial layer 02 of the second type, the light emitting layer 03, and the epitaxial layer 01 of the first type. Furthermore, the epitaxial layer 02 of the second type includes an upper layer 021 and a bottom layer 022 that is below the upper layer 021. Thus, the first mesa structure is formed by the bottom layer 022, the light emitting layer 03, and the epitaxial layer 02 of the second type, and the second structure is formed by the upper layer 021. In addition, here the width of the bottom of the second mesa structure is wider than the width of the top of the first mesa structure.

[0107]

[0122] FIG. 12 is a cross-sectional structural diagram of another micro LED panel according to some embodiments (e.g., the second embodiment) of the present disclosure.

[0108]

[0123] 12, a re-grown layer 04 is formed on at least a portion of the sidewall of the mesa structure. Preferably, the re-grown layer 04 is formed on at least a portion of the sidewall of the light emitting layer 03. Furthermore, the re-grown layer 04 is formed on the sidewall of the first mesa structure.

[0109]

[0124] The regrown layer 04 formed on the sidewall of the light-emitting layer 03 is not parallel to the horizontal direction in which the light-emitting layer 03 extends. Furthermore, the light-emitting layer 03 includes a top surface, an end surface, and a bottom surface, and the regrown layer 04 is grown only on the end surface of the light-emitting layer 03, but not on the top surface and the bottom surface of the light-emitting layer 03. Preferably, the inclination angle of the regrown layer 04 on the sidewall of the light-emitting layer is 30 degrees to 90 degrees with respect to the horizontal direction of the light-emitting layer 03. That is, the regrown layer 04 is grown on the end surface of the light-emitting layer 03, but not on the top and bottom surfaces of the light-emitting layer 03. In addition, the light-emitting layer 03 includes a plurality of quantum well pairs. The regrown layer 04 is not parallel to each surface of the plurality of quantum well pairs. Here, the light-emitting layer 03 has a straight shape without bending. Preferably, the diameter of the mesa structure is 3 μm or less. Furthermore, the bottom of the photonic crystal structure array is aligned with the bottom of the second mesa structure and is aligned with the top of the regrown layer 04 .

[0110]

[0125] Here, the material of the regrown layer 04 with intrinsic doped ions is the same as the material of the first type epitaxial layer 01 and / or the material of the second type epitaxial layer 02, but without intentional extrinsic doping ions. For example, when the material of the first type epitaxial layer 01 and the material of the second type epitaxial layer 02 are the same and the level of intentional ion doping of the material of the first type epitaxial layer 01 and the material of the second type epitaxial layer 02 are different, the material of the regrown layer 04 can be the same as the material of the underlying first type epitaxial layer 01 and the material of the second type epitaxial layer 02, but without intentional extrinsic doping ions. In another example, when the material of the first type epitaxial layer 01 and the material of the second type epitaxial layer 02 are not the same and the level of intentional ion doping of the material of the first type epitaxial layer 01 and the material of the second type epitaxial layer 02 are different, the material of the regrown layer 04 can be the same as the material of the first type epitaxial layer 01 or the material of the second type epitaxial layer 02, but without the intentional extrinsic doping ions. The light emitting layer is the active region of the PN junction formed by the first type epitaxial layer 01 and the second type epitaxial layer 02, and can be considered to be composed of two materials, the first type epitaxial layer 01 and the second type epitaxial layer 02. In some embodiments, the part of the material of the regrown layer covering the first type epitaxial layer 01 is the same material as the underlying first type epitaxial layer 01 but without the extrinsic intentional doping of the first type epitaxial layer 01, and the part of the material of the regrown layer covering the second type epitaxial layer 02 is the same material as the underlying second type epitaxial layer 02 but without the extrinsic intentional doping of the second type epitaxial layer 02. In some embodiments, the regrown layer 04 can have any intrinsic doping level or no doping level.In some embodiments, the parameters of the material growth, such as ambient / gas pressure, power, and materials for the regrowth process, are the same or similar to the parameters of the first type epitaxial layer 01 and / or the second type epitaxial layer 02. The material of the regrowth layer 04 should be lattice matched to the light emitting layer 03, the first type epitaxial layer 01, and / or the second type epitaxial layer 02. Preferably, the material of the regrowth layer 04 is single crystalline, the material of the first epitaxial layer 01 is single crystalline, and the material of the second epitaxial layer 02 is single crystalline. Furthermore, the material of the regrown layer 04 is one or more of GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and / or InN, etc., or any combination thereof, preferably one or more of GaP, AlP, GaAs, InP, AlInP, GaInP, AlN, GaN, and / or InN, or any combination thereof. In another embodiment, the material of the regrown layer 04 is free of intentional doping ions and is not the same as the material of the first type epitaxial layer or the material of the second type epitaxial layer 02.

[0111]

[0126] The resistance of the re-grown layer 04 is greater than the resistance of the light-emitting layer 03, and the re-grown layer 04 is not conductive, thereby ensuring the normal operation of the micro LED structure and preventing the carriers from spreading outside the light-emitting layer 03. Preferably, the band gap of the re-grown layer 04 is greater than the band gap of the light-emitting layer 03. Furthermore, the thickness of the re-grown layer 04 is less than the thickness of the light-emitting layer 03, preferably the thickness of the re-grown layer 04 is less than 100 nm or 10 nm. In another embodiment, the thickness of the re-grown layer 04 is equal to or greater than the thickness of the light-emitting layer 03.

[0112]

[0127] 13 and 14 are cross-sectional structural diagrams of mesa structures according to some embodiments (eg, the second embodiment) of the present disclosure.

[0113]

[0128] In another embodiment, referring to FIG. 13, the first mesa structure is formed by the light emitting layer 03 and the first type epitaxial layer 01 from top to bottom, and the second mesa structure is formed by the second type epitaxial layer 02. Thus, the regrown layer 04 is formed on the sidewalls of the first mesa structure (on the sidewalls of the light emitting layer 03 and on the sidewalls of the first type epitaxial layer 01). In some embodiments, referring to FIG. 14, the first mesa structure is formed by the first type epitaxial layer 01 and a part of the light emitting layer 03, and the second mesa structure is formed by a part of the light emitting layer 03 and the second type epitaxial layer 02 from top to bottom. Thus, the regrown layer 04 is formed on the sidewalls of the first mesa structure (on the sidewalls of the first type epitaxial layer 01 and on a part of the sidewalls of the light emitting layer 03).

[0114]

[0129] The micro LED structure in the second embodiment further includes an upper contact and an upper conductive layer, and the details of the upper contact and the upper conductive layer can be referred to in the first embodiment, so they will not be repeated below.

[0115]

[0130] In some embodiments, a bottom contact 06 is formed on the bottom surface of the first type epitaxial layer 02. The conductivity type of the bottom contact is the same as that of the first type epitaxial layer 01, for example, if the first type epitaxial layer 01 is P type, the bottom contact 06 is also P type. Furthermore, since light is emitted upwards or downwards from the mesa structure, the diameter of the bottom contact 06 is larger than the diameter of the top contact 09. The diameter of the top contact 09 can be as small as possible, but the top contact 09 can also be as small as a dot on the top surface of the second type epitaxial layer 02. In another embodiment, the diameter of the bottom contact 06 can also be equal to or smaller than the diameter of the top contact 09. A bottom connection structure 07 is formed on the bottom of the bottom contact 06. The bottom connection structure 07 is used to connect with a bottom electrode, such as a contact pad of the IC backplane 00. Furthermore, the diameter of the bottom connection structure 07 is 20 nm to 1 μm. Preferably, the diameter of the bottom connection structure 07 is 800 nm to 1 μm. Furthermore, the center of the bottom contact 06 is vertically aligned with the center of the top contact 09. In addition, the material of the bottom contact 06 and the bottom connection structure 07 is a transparent, conductive material, such as ITO or FTO, and so on. In addition, the material of the bottom contact 06 and the bottom connection structure 07 is not transparent. The material of the bottom contact 06 and the bottom connection structure 07 can be a conductive metal. Preferably, the material of the bottom contact 06 can be selected from at least one of Au, Zn, Be, Cr, Ni, Ti, Ag, and Pt. The material of the bottom connection structure 07 can be selected from at least one of Au, Zn, Be, Cr, Ni, Ti, Ag, and Pt.

[0116]

[0131] In some embodiments, the center of the bottom contact 06 is vertically aligned with the center of the first type epitaxial layer 01. However, in other embodiments, the center of the bottom contact 06 is not vertically aligned with the center of the first type epitaxial layer 01.

[0117]

[0132] The method for manufacturing the micro LED panel of FIG. 12 in the second embodiment includes the following steps:

[0118]

[0133] 15-25 separately illustrate steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the second embodiment).

[0119]

[0134] Referring to FIG. 15, step 1 involves providing an epitaxial structure on a semiconductor substrate 00''.

[0120]

[0135] Here, the epitaxial structure includes, from top to bottom, a first type epitaxial layer 01, a light emitting layer 03, and a second type epitaxial layer 02. The material of the semiconductor substrate 00' can be GaN, GaAs, etc. The epitaxial structure is grown on the substrate 00'.

[0121]

[0136] Referring to FIG. 16, step 2 involves patterning the first-type epitaxial layer 01, the light emitting layer 03, and a portion of the second-type epitaxial layer 02 to form a first mesa structure.

[0122]

[0137] Here, the first-type epitaxial layer 01, the light emitting layer 03, and a part of the second-type epitaxial layer 02 are etched from top to bottom by a conventional plasma etching process. A first mesa structure is formed by the first-type epitaxial layer 01, the light emitting layer 03, and a part of the second-type epitaxial layer 02.

[0123]

[0138] Referring to FIG. 17, step 3 includes forming a regrowth layer 04 on the sidewalls and tops of the first mesa structures and on the exposed tops of the second type epitaxial layer 02 between adjacent first mesa structures.

[0124]

[0139] Here, in this regrowth process, the temperature is 400° C.-1000° C. and the regrowth time is 5 s-1000 s. Here, the material for the regrowth process is preferably the same as the material of the first type epitaxial layer and / or the material of the second type epitaxial layer, but without intentional doping ions.

[0125]

[0140] 18-20, step 4 includes forming a bottom contact 06 in the regrown layer 04, forming a first dielectric layer 051 on the regrown layer 04, and forming an opening in the first dielectric layer 051 to expose the bottom contact 06.

[0126]

[0141] Here, referring to FIG. 18, an opening is first formed in the regrown layer 04 on top of the first type epitaxial layer 01. Then, a bottom contact 06 is formed in the opening on top of the first type epitaxial layer 01. Next, referring to FIG. 19, a first dielectric layer 051 is first deposited on top of the regrown layer 04 by conventional chemical vapor deposition. Referring to FIG. 20, another opening is formed in the first dielectric layer 051 on top of the first type epitaxial layer 01 by a plasma etching process to expose the bottom contact 06.

[0127]

[0142] Referring to FIG. 21, step 5 includes forming a lower connection structure 07 in the opening.

[0128]

[0143] Here, a conductive material is deposited by a physical vapor process into the other openings to form the bottom connecting pillars, which in this embodiment can be a conventional metal.

[0129]

[0144] Referring to FIG. 22, step 6 includes bonding the lower connection structure 07 with the IC backplane 00 by turning the semiconductor substrate 00' upside down, and then removing the semiconductor substrate 00'.

[0130]

[0145] Here, the semiconductor substrate 00' with the epitaxial structure is first turned upside down. Then, the lower connection structure 07 is bonded with the pads of the IC backplane 00. After the bonding process, the semiconductor substrate 00' is removed by a conventional removal process, such as a laser lift-off method.

[0131]

[0146] 23, step 7 includes forming second mesa structures by etching the second epitaxial layer 02 to form a photonic crystal structure array, with spaces being formed between adjacent second mesa structures.

[0132]

[0147] Here, the second type epitaxial layer 02 is etched by a plasma etching process to form a photonic crystal structure array and a second mesa structure, and a space is formed between adjacent second mesa structures.

[0133]

[0148] The bottom of the photonic crystal structure of the photonic crystal structure array is above and not in contact with the light emitting layer 03. In some embodiments, the etching process is not stopped until etching the regrown layer 04, so that the bottom of the photonic crystal structure array is aligned with the bottom of the second mesa structure and aligned with the top of the regrown layer 04. In step 7, preferably, the power for etching is 200W-800W, and the time for etching is 50 seconds-300 seconds.

[0134]

[0149] In addition, the width of the bottom of the second structure is now greater than the width of the top of the first mesa structure.

[0135]

[0150] For more details about the photonic crystal structure and the re-grown layers, please refer to the above description of the micro LED panel, so they will not be repeated here.

[0136]

[0151] Referring to FIG. 24, step 8 involves forming a second dielectric layer 052 over the sidewalls of the photonic crystal structure.

[0137]

[0152] Here, a second dielectric layer 052 is deposited on the sidewalls of the photonic crystal structure. Moreover, the second dielectric layer 052 is further formed on the top of the regrown layer 04 between adjacent second mesa structures. Preferably, the second dielectric layer 052 further completely fills the space between adjacent mesa structures.

[0138]

[0153] Referring to FIG. 25, step 9 includes forming a top contact 09 and a top conductive layer 08 on top of the second dielectric layer 052 and on top of the second mesa structure.

[0139]

[0154] 25, a top contact 09 is deposited on top of the second type epitaxial layer 02 while protecting other areas with a photoresist mask, which is then removed. A top conductive layer 08 is then deposited on top of the second epitaxial layer 02 by a conventional vapor deposition process.

[0140]

[0155] In some embodiments, the mesa structure is formed by a first mesa structure and a second mesa structure. The dielectric layer 05 in FIG. 12 is formed by a first dielectric layer 051 and a second dielectric layer 052 in FIG. 25. The materials of the first dielectric layer 051 and the second dielectric layer 052 can be the same as each other or different from each other. Preferably, the material of the first dielectric layer 051 or the second dielectric layer 052 is selected from one or more of SiO2, SiNx, Al2O3, AlN, HfO2, TiO2, and / or ZrO2, etc.

[0141]

[0156] Third embodiment

[0157] To solve the problems in the related art, a micro LED panel is provided in an embodiment of the present disclosure.

[0142]

[0158] FIG. 26 is a cross-sectional structural diagram of another micro LED panel according to some embodiments (e.g., the third embodiment) of the present disclosure.

[0143]

[0159] The micro LED panel includes a micro LED array. Referring to FIG. 26, the micro LED structure in the micro LED array includes at least a mesa structure and a photonic crystal structure array. The mesa structure includes a first type epitaxial layer 01, a light emitting layer 03, and a second type epitaxial layer 02 from bottom to top. The photonic crystal structure array is formed in the mesa structure. There is a gap between adjacent photonic crystal structures 10. Here, the second epitaxial layer 02 includes an upper layer 021 and a bottom layer 022. Furthermore, the photonic crystal structure array is formed in the upper layer 021 above the light emitting layer 03 as the light emitting surface of the mesa structure. In addition, in order to achieve high image quality, the width of the mesa structure is 3 μm or less.

[0144]

[0160] FIG. 27 is a top view of the mesa structure of FIG. 26 according to some embodiments (eg, the third embodiment) of the present disclosure.

[0145]

[0161] 27, the photonic crystal structure array includes a central photonic crystal structure 2702. The other photonic crystal structures, e.g., 2704, are formed around the center of the photonic crystal structure. In addition, the diameter of the central photonic crystal structure 2702 is larger than the diameter of each of the other photonic crystal structures.

[0146]

[0162] In addition, the photonic crystal structure 10 is a one-dimensional nanostructure. A plurality of one-dimensional nanostructures are distributed in an array. The one-dimensional nanostructures are formed in a mesa structure along the light emission direction. Moreover, the one-dimensional nanostructures are formed perpendicular to the light emitting layer 03. The one-dimensional nanostructures are such as nanowires, nanorods, nanofibers, and so on. Preferably, the diameter of the one-dimensional nanostructure is less than or equal to 1000 nm.

[0147]

[0163] A dielectric layer 05 is filled in the gap between adjacent photonic crystal structures. Furthermore, the dielectric layer 05 can be further formed on the sidewall of the mesa structure. Preferably, the material of the dielectric layer 05 is selected from one or more of SiO2, SiNx, Al2O3, AlN, HfO2, TiO2, and / or ZrO2, etc. The dielectric layer 05 in the gap between adjacent photonic crystal structures is transparent and electrically insulating. In addition, the dielectric layer 05 is further formed in the space between adjacent mesa structures, and even completely fills the space between adjacent mesa structures.

[0148]

[0164] The top contact 09 is formed on the top of the mesa structure, and the top conductive layer 08 is formed on the top of the top contact 09 and on the top of the mesa structure. Here, the top conductive layer 08 is formed continuously on the entire micro LED structure array. In addition, when the top of the dielectric layer 05 is lower than the top of the photonic crystal structure, the top conductive layer 08 fills a part of the gap between the adjacent photonic crystal structures, and the bottom of the top contact 09 fills a part of the gap between the adjacent photonic crystal structures. Here, the light emission direction is from bottom to top, so the top conductive layer 08 is transparent. Furthermore, the top contact 09 is formed only on the top of the central photonic crystal structure.

[0149]

[0165] The bottom contact layer 06' is formed on the bottom surface of the first type epitaxial layer 02. The conductivity type of the bottom contact is the same as that of the first type epitaxial layer 01, for example, if the first type epitaxial layer 01 is P type, the bottom contact layer 06' is also P type. Furthermore, since light is emitted upward or downward from the mesa structure, the diameter of the bottom contact layer 06' is larger than the diameter of the top contact 09. The diameter of the top contact 09 can be as small as possible, but the top contact 09 can also be as small as a dot on the top surface of the second type epitaxial layer 02. In another embodiment, the diameter of the bottom contact layer 06' can also be equal to or smaller than the diameter of the top contact 09. The bottom connection layer 07' is formed on the bottom of the bottom contact layer 06'. The bottom connection layer 07' is used to connect with a bottom electrode, such as a contact pad of the IC backplane 00. Furthermore, the diameter of the lower connection layer 07' is between 20 nm and 1 μm. Preferably, the diameter of the lower connection layer 07' is between 800 nm and 1 μm. Furthermore, the center of the lower contact 06 is vertically aligned with the center of the upper contact 09. In addition, the material of the lower contact layer 06' and the lower connection layer 07' is a transparent, conductive material, such as ITO, or FTO, and so on. In addition, the material of the lower contact layer 06' and the lower connection layer 07' is not transparent. The material of the lower contact layer 06' and the lower connection layer 07' can be a conductive metal. Preferably, the material of the lower contact layer 06' can be selected from at least one of Au, Zn, Be, Cr, Ni, Ti, Ag, and Pt. The material of the lower connection layer 07' can be selected from at least one of Au, Zn, Be, Cr, Ni, Ti, Ag, and Pt.

[0150]

[0166] In some embodiments, the center of the bottom contact layer 06' is now vertically aligned with the center of the first type epitaxial layer 01. However, in other embodiments, the center of the bottom contact 06 is not vertically aligned with the center of the first type epitaxial layer 01.

[0151]

[0167] The method for manufacturing the aforementioned micro LED panel in this third embodiment includes the following steps:

[0152]

[0168] 28-37 separately illustrate steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the third embodiment).

[0153]

[0169] Referring to FIG. 28, step 1 involves providing an epitaxial structure on a semiconductor substrate 00'.

[0154]

[0170] Here, the epitaxial structure includes, from top to bottom, a first type epitaxial layer 01, a light emitting layer 03, and a second type epitaxial layer 02. The material of the semiconductor substrate 00' can be GaN, GaAs, etc. The epitaxial structure is grown on the substrate 00'.

[0155]

[0171] Referring to FIG. 29, step 2 involves sequentially forming a bottom contact layer 06 ′ and a bottom connection layer 07 ′ on the top surface of the first type epitaxial layer 01 .

[0156]

[0172] Here, the bottom contact layer and the bottom connection layer 07' are deposited in sequence by conventional physical vapor deposition. The bottom connection layer 07' also serves as a metal bonding layer for the subsequent metal bonding process in step 3.

[0157]

[0173] Referring to FIG. 30, step 3 includes bonding the bottom connection layer 07' with the IC backplane 00 by turning the semiconductor substrate 00' upside down, and then removing the semiconductor substrate 00'.

[0158]

[0174] Here, the semiconductor substrate 00' with the epitaxial structure is first turned upside down. Then, the bottom connection layer 07' is bonded with the pads of the IC backplane 00. After the bonding process, the semiconductor substrate 00' is removed by a conventional removal process, such as laser lift-off.

[0159]

[0175] Referring to FIG. 31, step 4 involves forming a top contact 09 on the top of the second type epitaxial layer 02.

[0160]

[0176] Here, the top contact 09 is deposited on top of the second type epitaxial layer 02 by a conventional physical vapor deposition process while protecting other areas with a mask, and then the mask is removed by a conventional wet etching process.

[0161]

[0177] Referring to FIG. 32, step 5 includes forming a photonic crystal structure array by etching the second epitaxial layer 02.

[0162]

[0178] Here, the top layer 021 of the second epitaxial layer 02 is etched by a plasma etching process and stopped on the bottom layer 022 of the second epitaxial layer 02 above the light emitting layer 03. Thus, the photonic crystal structure array is formed in the top layer 021 above the light emitting layer 03 and is not in contact with the light emitting layer 03.

[0163]

[0179] In the etching process of step 5, a central photonic crystal structure is formed under the top contact that is not etched. The diameter of the central photonic crystal structure is larger than each of the diameters of the other photonic crystal structures. Preferably, the power for etching is 200W-800W, and the time for etching is 50s-300s.

[0164]

[0180] Referring to Figures 33 and 34, step 6 includes etching the photonic crystal structure array, the light emitting layer 03, the first type epitaxial layer 01, the lower contact layer 06' and the lower connection layer 07' from top to bottom to form spaces defining the mesa structure.

[0165]

[0181] Now, referring to FIG. 33, the photonic crystal structure array is further etched by a conventional plasma etching process to define mesa structures. Spaces are formed between adjacent mesa structures. Referring to FIG. 34, the bottom contact layer 06' and the bottom connection layer 07' are further etched from top to bottom, such that the bottom of the space extends to the top of the IC backplane 00. Thus, the bottom contact layer 06' and the bottom connection layer 07' are separated by a space.

[0166]

[0182] In some embodiments, the sidewalls of the space are not perpendicular to the bottom surface of the mesa structure, as shown in Figure 35. Furthermore, the material of the bottom contact layer 06' and the bottom connection layer 07' are different from the material of the mesa structure, so that the sidewalls of the bottom contact layer 06' and the sidewalls of the bottom connection layer 07' are inclined with respect to the bottom surface of the mesa structure.

[0167]

[0183] Referring to FIG. 36, step 7 involves forming a dielectric layer 05 on the sidewalls of the photonic crystal structure.

[0168]

[0184] Here, the dielectric layer 05 is deposited on the sidewalls of the photonic crystal structures by conventional chemical vapor deposition. The dielectric layer 05 further completely fills the gaps between adjacent photonic crystal structures. Furthermore, the dielectric layer 05 is formed in the spaces between adjacent mesa structures. Preferably, the dielectric layer 05 completely fills the spaces. In another embodiment, the dielectric layer 05 is formed only on the sidewalls of the mesa structures and does not completely fill the spaces.

[0169]

[0185] Referring to FIG. 37, step 8 involves forming a top contact 09 and a top conductive layer 08 on top of the dielectric layer 05 and on top of the mesa structure.

[0170]

[0186] 37, a top contact 09 is deposited on top of the second type epitaxial layer 02 while protecting other areas with a mask, which is then removed. A top conductive layer 08 is then deposited on top of the second epitaxial layer 02 by a conventional vapor deposition process. Here, the top conductive layer 08 is formed on top of the photonic crystal structure, on top of the dielectric layer 05, and covers the top contact 09.

[0171]

[0187] In another embodiment, referring to Fig. 38, in step 7, the dielectric layer 05 is formed only on the sidewalls of the mesa structures and does not completely fill the spaces. Thus, in step 8, referring to Fig. 39, a top conductive layer 08 is further formed in the spaces between adjacent mesa structures.

[0172]

[0188] Fourth embodiment

[0189] The micro LED panel of the fourth embodiment includes a micro LED array. Figure 40 is a cross-sectional structural diagram of a micro LED panel according to some embodiments (e.g., the fourth embodiment) of the present disclosure.

[0173]

[0190] 40, the micro LED structure in the micro LED array includes a mesa structure and a photonic crystal structure array formed in the mesa structure. The differences between the third and fourth embodiments will be further described herein below.

[0174]

[0191] In a fourth embodiment, the mesa structure further includes a first mesa structure (below the dotted line) and a second mesa structure (above the dotted line), where the first mesa structure is formed on the bottom of the second mesa structure, and the photonic crystal array is formed in the second structure above the light emitting layer 03 and is not in contact with the light emitting layer 03. Here, the light emission direction is from bottom to top.

[0175]

[0192] In some embodiments, here, the second mesa structure is formed by at least a part of the second type epitaxial layer 02 (above the dotted line in FIG. 40), and the first mesa structure is formed by the remaining part of the second type epitaxial layer 02, the light emitting layer 03, and the first type epitaxial layer 01. Furthermore, the second type epitaxial layer 02 includes an upper layer 021 and a bottom layer 022 at the bottom of the upper layer 021. Thus, the first structure is formed by the bottom layer 022, the light emitting layer 03, and the second type epitaxial layer 02, and the second structure is formed by the upper layer 021. In addition, here, the width of the bottom of the second mesa structure is wider than the width of the top of the first mesa structure. Furthermore, the photonic crystal structure array is formed in the upper layer 021 above the light emitting layer 03 as the light emitting surface of the mesa structure.

[0176]

[0193] 40, a re-grown layer 04 is formed on at least a portion of the sidewall of the mesa structure. Preferably, the re-grown layer 04 is formed on at least a portion of the sidewall of the light emitting layer 03. Furthermore, the re-grown layer 04 is formed on the sidewall of the first mesa structure.

[0177]

[0194] The regrown layer 04 formed on the sidewall of the light-emitting layer 03 is not parallel to the extending direction of the light-emitting layer 03. Furthermore, the light-emitting layer 03 includes a top surface, an end surface, and a bottom surface, and the regrown layer 04 is grown only on the end surface of the light-emitting layer 03, but not on the top surface and the bottom surface of the light-emitting layer 03. Preferably, the inclination angle of the regrown layer 04 on the sidewall of the light-emitting layer is 30 degrees to 90 degrees with respect to the horizontal direction of the light-emitting layer 03. That is, the regrown layer 04 is grown on the end surface of the light-emitting layer 03, but not on the top and bottom surfaces of the light-emitting layer 03. In addition, the light-emitting layer 03 includes a plurality of quantum well pairs, and the regrown layer 04 is not parallel to the surfaces of each of the plurality of quantum well pairs. Here, the light-emitting layer 03 has a straight shape without bending. Preferably, the diameter of the mesa structure is 3 μm or less. Additionally, the bottom of the photonic crystal structure array is aligned with the bottom of the second mesa structure and is aligned with the top of the regrown layer 04 .

[0178]

[0195] Here, the material of the regrown layer 04 with intrinsic doped ions is the same as the material of the first type epitaxial layer 01 and / or the material of the second type epitaxial layer 02, without any intentional doping ions. The material of the regrown layer 04 must be lattice-matched to the light emitting layer 03, the first type epitaxial layer 01 and / or the second type epitaxial layer 02. Preferably, the material of the regrown layer 04 is single crystalline, the material of the first epitaxial layer 01 is single crystalline and the material of the second epitaxial layer 02 is single crystalline. Furthermore, the material of the regrown layer 04 is one or more of GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and / or InN, etc., or any combination thereof, preferably one or more of GaP, AlP, GaAs, InP, AlInP, GaInP, AlN, GaN, and / or InN, or any combination thereof. In another embodiment, the material of the regrown layer 04 is free of intentional doping ions and is not the same as the material of the first type epitaxial layer or the material of the second type epitaxial layer 02.

[0179]

[0196] The resistance of the regrown layer 04 is greater than the resistance of the light-emitting layer 03 and is not conductive, thereby ensuring the normal operation of the micro LED structure and preventing the carriers from spreading outside the light-emitting layer 03. Preferably, the band gap of the regrown layer 04 is greater than the band gap of the light-emitting layer 03. Furthermore, the thickness of the regrown layer 04 is less than the thickness of the light-emitting layer 03, preferably the thickness of the regrown layer 04 is less than 100 nm or 10 nm. In another embodiment, the thickness of the regrown layer 04 is equal to or greater than the thickness of the light-emitting layer 03.

[0180]

[0197] In another embodiment, referring to FIG. 13, the first mesa structure is formed by the light emitting layer 03 and the first type epitaxial layer 01 from top to bottom, and the second mesa structure is formed by the second type epitaxial layer 02. Thus, the regrown layer 04 is formed on the sidewalls of the first mesa structure (on the sidewalls of the light emitting layer 03 and on the sidewalls of the first type epitaxial layer 01). In some embodiments, referring to FIG. 14, the first structure is formed by the first type epitaxial layer 01 and a part of the light emitting layer 03, and the second structure is formed by a part of the light emitting layer 03 and the second type epitaxial layer 02 from top to bottom. Thus, the regrown layer 04 is formed on the sidewalls of the first mesa structure (on the sidewalls of the first type epitaxial layer 01 and on a part of the sidewalls of the light emitting layer 03).

[0181]

[0198] The micro LED structure in the second embodiment further includes an upper contact and an upper conductive layer, and the details of the upper contact and the upper conductive layer can be referred to the first embodiment, so they will not be repeated here.

[0182]

[0199] In some embodiments, a bottom contact 06 is formed on the bottom surface of the first type epitaxial layer 02. The conductivity type of the bottom contact is the same as that of the first type epitaxial layer 01, for example, if the first type epitaxial layer 01 is P type, the bottom contact 06 is also P type. Furthermore, since light is emitted upwards or downwards from the mesa structure, the diameter of the bottom contact 06 is larger than the diameter of the top contact 09. The diameter of the top contact 09 can be as small as possible, but the top contact 09 can also be as small as a dot on the top surface of the second type epitaxial layer 02. In another embodiment, the diameter of the bottom contact 06 can also be equal to or smaller than the diameter of the top contact 09. A bottom connection structure 07 is formed on the bottom of the bottom contact 06. The bottom connection structure 07 is used to connect with a bottom electrode, such as a contact pad of the IC backplane 00. Furthermore, the diameter of the bottom connection structure 07 is 20 nm to 1 μm. Preferably, the diameter of the bottom connection structure 07 is 800 nm to 1 μm. Furthermore, the center of the bottom contact 06 is vertically aligned with the center of the top contact 09. In addition, the material of the bottom contact 06 and the bottom connection structure 07 is a transparent, conductive material, such as ITO, FTO, and so on. In addition, the material of the bottom contact 06 and the bottom connection structure 07 is not transparent. The material of the bottom contact 06 and the bottom connection structure 07 can be a conductive metal. Preferably, the material of the bottom contact 06 can be selected from at least one of Au, Zn, Be, Cr, Ni, Ti, Ag, and Pt. The material of the bottom connection structure 07 can be selected from at least one of Au, Zn, Be, Cr, Ni, Ti, Ag, and Pt.

[0183]

[0200] The method for manufacturing the micro LED panel of FIG. 40 in the fourth embodiment includes the following steps:

[0184]

[0201] 41-52 separately illustrate steps of a method for manufacturing a micro LED panel according to some embodiments (eg, the fourth embodiment).

[0185]

[0202] Referring to FIG. 41, step 1 involves providing an epitaxial structure on a semiconductor substrate 00'.

[0186]

[0203] Here, the epitaxial structure includes, from top to bottom, a first type epitaxial layer 01, a light emitting layer 03, and a second type epitaxial layer 02. The material of the semiconductor substrate 00' can be GaN, GaAs, etc. The epitaxial structure is grown on the substrate 00'.

[0187]

[0204] Referring to FIG. 42, step 2 involves patterning the first-type epitaxial layer 01, the light emitting layer 03, and a portion of the second-type epitaxial layer 02 to form a first mesa structure.

[0188]

[0205] Here, the first-type epitaxial layer 01, the light emitting layer 03, and a part of the second-type epitaxial layer 02 are etched from top to bottom by a conventional plasma etching process. A first mesa structure is formed by the first-type epitaxial layer 01, the light emitting layer 03, and a part of the second-type epitaxial layer 02.

[0189]

[0206] Referring to FIG. 43, step 3 includes forming a regrowth layer 04 on the sidewalls and tops of the first mesa structures and on the exposed tops of the second type epitaxial layer 02 between adjacent first mesa structures.

[0190]

[0207] Here, in this regrowth process, the temperature is 400° C.-1000° C. and the regrowth time is 5 s-1000 s. Here, the material for the regrowth process is preferably the same as the material of the first type epitaxial layer and / or the material of the second type epitaxial layer, but without intentional doping ions.

[0191]

[0208] 44-46, step 4 includes forming a bottom contact 06 in the regrown layer 04, forming a first dielectric layer 051 on the regrown layer 04, and forming an opening in the first dielectric layer 051 to expose the bottom contact 06.

[0192]

[0209] Here, referring to FIG. 44, an opening is first formed in the regrown layer 04 on top of the first type epitaxial layer 01. Then, a bottom contact 06 is formed in the opening on top of the first type epitaxial layer 01. Next, referring to FIG. 45, a first dielectric layer 051 is first deposited on top of the regrown layer 04 by conventional chemical vapor deposition. Referring to FIG. 46, then, by a plasma etching process, another opening is formed in the first dielectric layer 051 on top of the first type epitaxial layer 01 to expose the bottom contact 06.

[0193]

[0210] Referring to FIG. 47, step 5 includes forming a lower connection structure 07 in the opening.

[0194]

[0211] Here, a conductive material is deposited by a physical vapor process into the other openings to form the bottom connecting pillars, which in this embodiment can be a conventional metal.

[0195]

[0212] Referring to FIG. 48, step 6 includes bonding the lower connection structure 07 with the IC backplane 00 by turning the semiconductor substrate 00' upside down, and then removing the semiconductor substrate 00'.

[0196]

[0213] Here, the semiconductor substrate 00' with the epitaxial structure is first turned upside down. Then, the lower connection structure 07 is bonded with the pads of the IC backplane 00. After the bonding process, the semiconductor substrate 00' is removed by a conventional removal process, such as a laser lift-off method.

[0197]

[0214] Referring to FIG. 49, step 7 involves forming a top contact 09 on the top of the second type epitaxial layer 02.

[0198]

[0215] Here, the top contact 09 is deposited by conventional physical vapor deposition on top of the second type epitaxial layer 02 while protecting other areas with a mask, and the mask is then removed by conventional wet etching.

[0199]

[0216] 50, step 8 includes forming second mesa structures to form a photonic crystal structure array by etching the second epitaxial layer 02. Spaces are formed between adjacent second mesa structures.

[0200]

[0217] Here, the second type epitaxial layer 02 is etched by a plasma etching process to form a photonic crystal structure array and a second mesa structure, and a space is formed between adjacent second mesa structures.

[0201]

[0218] In the etching process of step 5, a central photonic crystal structure is formed below the top contact that is not etched, and the diameter of the central photonic crystal structure is larger than each of the diameters of the other photonic crystal structures.

[0202]

[0219] In some embodiments, the bottom of the photonic crystal structure of the photonic crystal structure array is above and not in contact with the light emitting layer 03. In some embodiments, the etching process is not stopped until etching the regrown layer 04, so that the bottom of the photonic crystal structure array is aligned with the bottom of the second mesa structure and aligned with the top of the regrown layer 04. In step 7, preferably, the power for etching is 200W-800W, and the time for etching is 50 seconds-300 seconds.

[0203]

[0220] In addition, here the width of the bottom of the second structure is greater than the width of the top of the first structure.

[0204]

[0221] For more details about the photonic crystal structure and the re-grown layers, please refer to the above description of the micro LED panel, so they will not be repeated here.

[0205]

[0222] Referring to FIG. 51, step 9 involves forming a second dielectric layer 052 over the sidewalls of the photonic crystal structure.

[0206]

[0223] Here, a second dielectric layer 052 is deposited on the sidewalls of the photonic crystal structure. Moreover, the second dielectric layer 052 is further formed on the top of the regrown layer 04 between adjacent second mesa structures. Preferably, the second dielectric layer 052 further completely fills the space between adjacent mesa structures.

[0207]

[0224] Referring to FIG. 52, step 10 includes forming an upper conductive layer 08 on top of the second dielectric layer 052 and on top of the second mesa structure.

[0208]

[0225] Here, a top conductive layer 08 is deposited by a conventional vapor deposition process on top of the second epitaxial layer 02, on top of the second dielectric layer 052, and covering the top contact 09.

[0209]

[0226] In some embodiments, the mesa structure is formed by a first mesa structure and a second mesa structure. The dielectric layer 05 in Fig. 52 is formed by a first dielectric layer 051 and a second dielectric layer 052, which are also shown in Fig. 25. The materials of the first dielectric layer 051 and the second dielectric layer 052 can be the same as each other or different from each other. Preferably, the material of the first dielectric layer 051 is selected from one or more of SiO2, SiNx, Al2O3, AlN, HfO2, TiO2, and / or ZrO2, etc.

[0210]

[0227] Those skilled in the art will appreciate that the microdisplay panel is not limited to the structures described above and may include more or fewer components than those shown, or some components may be combined, or different components may be utilized.

[0211]

[0228] Those skilled in the art will understand that all or part of the steps for implementing the above embodiments can be implemented by hardware, or by a program instructing related hardware. The program can be stored in a flash memory, a conventional computer device, a central processing module, a control module, etc.

[0212]

[0229] The above description is merely an embodiment of the present disclosure, and the present disclosure is not limited to those embodiments. Any modifications, equivalent replacements, and improvements made without departing from the concept and principle of the present disclosure shall be within the protection scope of the present disclosure.

[0213]

[0230] Further embodiments also include various subsets of the above embodiments, including the embodiments shown in Figures 1-52 combined or otherwise rearranged in various other embodiments.

[0214]

[0231] Although the detailed description includes many details, these should not be interpreted as limiting the scope of the present invention, but merely as illustrating different examples and aspects of the present invention. It should be understood that the scope of the present invention includes other embodiments not detailed above. For example, the above-described techniques can also be applied to the integration of control circuitry other than pixel drivers for functional devices other than LEDs and OLEDs. Examples of non-LED devices include vertical cavity surface emitting lasers (VCSELs), photodetectors, microelectromechanical systems (MEMS), silicon photonic devices, power electronic devices, and distributed feedback lasers (DFBs). Examples of other control circuitry include current drivers, voltage drivers, transimpedance amplifiers, and logic circuits.

[0215]

[0232] The above description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the embodiments described herein and variations thereof. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other embodiments without departing from the spirit or scope of the subject matter disclosed herein. Thus, the present disclosure is not intended to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the following claims and the principles and novel features disclosed herein.

[0216]

[0233] Features of the present invention can be implemented in, using, or with the aid of a computer program product, such as a storage medium(s) or computer-readable storage medium(s) having stored therein / within instructions that can be used to program a processing system to perform any of the features presented herein. The storage medium can include high-speed random access memory, such as, but not limited to, DRAM, SRAM, DDR RAM, or other random access solid-state memory devices, and may include non-volatile memory, such as one or more magnetic disk storage devices, optical disk storage devices, flash memory devices, or other non-volatile solid-state storage devices. The memory optionally includes one or more storage devices located remotely from the CPU. The memory, or alternatively the non-volatile memory devices in the memory, include non-transitory computer-readable storage media.

[0217]

[0234] When stored on any machine-readable medium(s), features of the present invention may be embodied in software and / or firmware to control the hardware of a processing system and to enable the processing system to utilize the results of the present invention and interact with other mechanisms. Such software or firmware may include, but is not limited to, application code, device drivers, operating systems, and execution environments / containers.

[0218]

[0235] Although terms such as "first," "second," and the like may be used herein to describe various elements or steps, it will be understood that these elements or steps should not be limited by these terms. These terms are used merely to distinguish one element or step from another.

[0219]

[0236] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of the claims. When used in the description of the embodiments and the appended claims, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that the term "and / or" when used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items. It will be further understood that the terms "comprises" and / or "comprising" when used herein specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0220]

[0237] As used herein, the term "if" may be interpreted to mean "when" a stated precondition is true or "upon" a stated precondition is true or "in response to determining" a stated precondition is true or "in accordance with a determination" a stated precondition is true or "in response to detecting" a stated precondition is true, depending on the context. Similarly, the phrases "if a stated precondition is determined to be true" or "if a stated precondition is true" or "when a stated precondition is true" may be interpreted to mean "as soon as" a stated precondition is determined to be true or "in response to determining" a stated precondition is true or "in accordance with a determination" a stated precondition is true or "as soon as" a stated precondition is detected to be true or "in response to detecting" a stated precondition is true, depending on the context.

[0221]

[0238] The above description, for purposes of illustration, has been written with reference to specific embodiments. However, the above exemplary discussion is not intended to be exhaustive or to limit the scope of the claims to the precise form disclosed. Many modifications and variations are possible in light of the above teachings. The embodiments have been chosen and described in order to best explain the principles of operation and practical application, and thereby enable others skilled in the art to best utilize the invention and various embodiments.

Claims

1. 1. A micro LED panel comprising a micro LED array, At least a micro LED structure, a mesa structure including, from bottom to top, a first type epitaxial layer, a light emitting layer, and a second type epitaxial layer; a photonic crystal structure array including a plurality of photonic crystal structures formed within the mesa structure, the photonic crystal structure array having gaps between adjacent photonic crystal structures; A micro LED panel comprising a micro LED structure comprising at least

2. 2. The micro LED panel of claim 1, wherein the photonic crystal structure array is formed as a light emitting surface of the mesa structure above the light emitting layer.

3. 3. The micro LED panel of claim 2, wherein the mesa structure further comprises a first mesa structure and a second mesa structure, the first mesa structure being formed on a bottom of the second mesa structure, and the photonic crystal array being formed within the second mesa structure and not in contact with the light emitting layer.

4. 3. The micro LED panel of claim 2, wherein a bottom of the photonic crystal structure array is aligned with a bottom of the second mesa structure and aligned with an top of the re-grown layer.

5. 4. The micro LED panel of claim 3, wherein the second mesa structure is formed by at least a portion of the second type epitaxial layer.

6. 4. The micro LED panel of claim 3, wherein the first mesa structure is formed from top to bottom by the light emitting layer and the first type epitaxial layer.

7. 6. The micro LED panel of claim 5, wherein the epitaxial layer of the second type includes an upper layer and a bottom layer that is below the upper layer, the first mesa structure is formed by the bottom layer, the light emitting layer, and the epitaxial layer of the second type, and the second mesa structure is formed by the upper layer.

8. 4. The micro LED panel of claim 3, wherein the first mesa structure is formed by the epitaxial layer of the first type and a portion of the light emitting layer, and the second mesa structure is formed, from bottom to top, by a portion of the light emitting layer and the epitaxial layer of the second type.

9. 4. The micro LED panel of claim 3, wherein a width of a bottom of the second mesa structure is greater than a width of a top of the first mesa structure.

10. 10. The micro LED panel of claim 1, wherein the photonic crystal structure is a one-dimensional nanostructure.

11. 11. The micro LED panel of claim 10, wherein a plurality of said one-dimensional nanostructures are distributed in said photonic crystal structure array.

12. 11. The micro LED panel of claim 10, wherein the one-dimensional nanostructure is formed in the mesa structure above the light emitting layer and along a light emission direction of the mesa structure.

13. 11. The micro LED panel of claim 10, wherein the one-dimensional nanostructures have a diameter of 1000 nm or less.

14. 11. The micro LED panel of claim 10, wherein the one-dimensional nanostructures are formed perpendicular to the light emitting layer.

15. 10. The micro LED panel of claim 1, wherein a dielectric layer fills the gap.

16. 16. The micro LED panel of claim 15, wherein the dielectric layer is further formed on a sidewall of the mesa structure.

17. 16. The micro LED panel of claim 15, wherein the dielectric layer is transparent and electrically insulating.

18. 2. The micro LED panel of claim 1, wherein the mesa structure has a width of 3 μm or less.

19. 10. The micro LED panel of claim 1, wherein the light emitting layer comprises a stack of multiple quantum well pairs.

20. 10. The micro LED panel of claim 1, wherein the light emitting layer has a linear shape without bending.

21. 10. The micro LED panel of claim 1, wherein the material of the first epitaxial layer is single crystalline and the material of the second epitaxial layer is single crystalline.

22. 4. The micro LED panel of claim 3, wherein the micro LED structure further comprises a re-growth layer formed on at least a portion of a sidewall of the mesa structure.

23. 23. The micro LED panel of claim 22, wherein the re-growth layer is formed on sidewalls of the light emitting layer.

24. 23. The micro LED panel of claim 22, wherein the regrowth layer is formed on a sidewall of the first mesa structure.

25. 23. The micro LED panel of claim 22, wherein the material of the regrown layer with intrinsic doped ions is the same as the material of the first type epitaxial layer and / or the material of the second type epitaxial layer, but without intentional doping ions.

26. 23. The micro LED panel of claim 22, wherein the material of the re-grown layer is one or more of GaP, AlP, GaAs, InP, AlInP, GaInP, AlN, GaN, and / or InN.

27. 23. The micro LED panel of claim 22, wherein the material of the regrowth layer is single crystalline.

28. 23. The micro LED panel of claim 22, wherein the bandgap of the regrown layer is greater than the bandgap of the light emitting layer.

29. 23. The micro LED panel of claim 22, wherein the re-grown layer has a thickness less than a thickness of the light emitting layer.

30. 30. The micro LED panel of claim 29, wherein the re-grown layer has a thickness of 100 nm or less.

31. 23. The micro LED panel of claim 22, wherein the resistance of the re-grown layer is greater than the resistance of the light emitting layer.

32. 32. The micro LED panel of claim 31 , wherein the re-grown layer is not conductive.

33. 10. The micro LED panel of claim 1, wherein a top contact is formed on a top of the mesa structure, and a top conductive layer is formed on the top contact and the top of the mesa structure.

34. 34. The micro LED panel of claim 33, wherein the top conductive layer fills a portion of the gap and a bottom of the top contact fills a portion of the gap.

35. 34. The micro LED panel of claim 33, wherein the top conductive layer is transparent.

36. 16. The micro LED panel of claim 15, wherein the dielectric layer is formed between adjacent mesa structures.

37. 1. A method for manufacturing a micro LED panel, comprising: Step 1 of providing an epitaxial structure on a semiconductor substrate; Step 2 of sequentially forming a lower contact layer and a lower connection layer on the upper surface of the first type epitaxial layer; Step 3: bonding the lower connection layer with an IC backplane by turning the semiconductor substrate upside down, and then removing the semiconductor substrate; Step 4 of forming a photonic crystal structure array including a plurality of photonic crystal structures by etching the second epitaxial layer; Step 5: forming a separation space defining a mesa structure by etching the photonic crystal structure array, the light emitting layer, the first type epitaxial layer, the lower contact layer and the lower connection layer from top to bottom; Step 6 of forming a dielectric layer on the sidewalls of the photonic crystal structure; Step 7 of forming a top contact and a top conductive layer on top of the dielectric layer and on top of the mesa structure; The method includes:

38. 38. The method of claim 37, wherein in step 4, the power for etching is 200 W to 800 W, the time for etching is 50 seconds to 300 seconds, and the lower part of the photonic crystal structure of the photonic crystal structure array is above the light emitting layer and is not in contact with the light emitting layer.

39. 38. The method of claim 37, wherein in step 6, the dielectric layer is further formed on top of the regrown layer between adjacent second mesa structures, and further completely filling the separation space.

40. 38. The method of claim 37, wherein in step 4, the photonic crystal structure is a one-dimensional nanostructure, the one-dimensional nanostructure is formed in the second mesa structure above the light emitting layer along the light emission direction of the mesa structure, and the one-dimensional nanostructure is formed perpendicular to the light emitting layer.

41. 41. The method of claim 40, wherein the one-dimensional nanostructure has a diameter of 1000 nm or less.

42. 38. The method of claim 37, wherein in step 5, the mesa structure has a width of 3 μm or less.

43. 1. A method for manufacturing a micro LED panel, comprising: Step 1 of providing an epitaxial structure on a semiconductor substrate; Step 2: forming a first mesa structure by patterning the first type epitaxial layer, the light emitting layer, and a portion of the second type epitaxial layer from top to bottom; forming a regrowth layer on the sidewalls and tops of the first mesa structures and on exposed tops of the second type epitaxial layer between adjacent first mesa structures; Step 4: forming a bottom contact in the regrowth layer, forming a dielectric layer over the regrowth layer, and forming an opening in the dielectric layer to expose the bottom contact; Step 5: forming a sub-connection structure in the opening; Step 6: bonding the lower connection structure with an IC backplane by turning the semiconductor substrate upside down, and then removing the semiconductor substrate; Step 7: forming a photonic crystal structure array including a plurality of photonic crystal structures by forming a second mesa structure and etching the second epitaxial layer, and a separation space is formed between adjacent second mesa structures; Step 8 of forming a second dielectric layer on the sidewalls of the photonic crystal structure; Step 9: forming a top contact and a top conductive layer on the top of the dielectric layer and on the top of the second mesa structure, where a mesa structure is formed by the first mesa structure and the second mesa structure; The method includes:

44. 44. The method of claim 43, further comprising, in step 7, etching the second epitaxial layer and stopping on a top of the regrown layer, wherein a bottom of the photonic crystal structure of the photonic crystal structure array is above the light emitting layer and is not in contact with the light emitting layer, a bottom of the photonic crystal structure array is aligned with a bottom of the second mesa structure and with a top of the regrown layer, and a power for etching is between 200 W and 800 W, and a time for etching is between 50 seconds and 300 seconds.

45. 44. The method of claim 43, wherein in step 8, the second dielectric layer is further formed on top of the regrown layer between the adjacent second mesa structures and further completely filling the separation spaces.

46. 44. The method of claim 43, wherein in step 7, a width of a bottom portion of the second mesa structure is greater than a width of a top portion of the first mesa structure.

47. 44. The method of claim 43, wherein in step 7, the photonic crystal structure is a one-dimensional nanostructure, the one-dimensional nanostructure is formed in the second mesa structure above the light emitting layer along the light emission direction of the mesa structure, and the one-dimensional nanostructure is formed perpendicular to the light emitting layer.

48. 48. The method of claim 47, wherein the one-dimensional nanostructure has a diameter of 1000 nm or less.

49. 44. The method of claim 43, wherein in step 7, the second mesa structure has a width of 3 μm or less.

50. 44. The method of claim 43, wherein the material of the regrowth layer with intrinsic doped ions is the same as the material of the first type epitaxial layer and / or the material of the second type epitaxial layer, but without intentional doping ions, and the material of the regrowth layer is single crystalline.

51. 51. The method of claim 50, wherein the material of the regrown layer is one or more of GaP, AlP, GaAs, InP, AlInP, GaInP, AlN, GaN, and / or InN.

52. 44. The method of claim 43, wherein a band gap of the regrown layer is greater than a band gap of the light emitting layer, a thickness of the regrown layer is less than a thickness of the light emitting layer, and a resistance of the regrown layer is greater than a resistance of the light emitting layer.

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