Display device and manufacturing method thereof

JP2025505471APending Publication Date: 2025-02-27SAMSUNG DISPLAY CO LTD
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Patent Information

Application Number
JP2024527133
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-12-08
Filing Date
2022-12-16
Publication Date
2025-02-27

AI Technical Summary

Benefits of technology

【0028】 実施形態によれば、一つの基板上に発光素子だけでなく、色変換層などの素子を形成することによって、表示装置の厚さを減少させ、光損失を減らし、製造費用を節減することができる。

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Abstract

The present disclosure relates to a display device and a method for manufacturing a display device. According to one embodiment, the display device includes a substrate, a transistor disposed on the substrate, a light-emitting element electrically connected to the transistor, an encapsulation layer disposed on the light-emitting element, a partition disposed on the encapsulation layer and including an opening overlapping the light-emitting element, and a color conversion layer, a low refractive index layer, and a color filter sequentially stacked in the opening.
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Description

[Technical field]

[0001] The present disclosure relates to a display device and a manufacturing method thereof. [Background technology]

[0002] A display device is a device that displays a screen. Examples of such a display device include a liquid crystal display (LCD) and an organic light emitting diode (OLED). Such display devices can be used in a variety of electronic devices, such as mobile phones, navigation systems, digital cameras, e-books, portable game consoles, and various terminals.

[0003] An OLED display device includes two electrodes and an organic light-emitting layer between them. Electrons injected from one electrode combine with holes injected from the other electrode in the organic light-emitting layer to form excitons. As the excitons change from an excited state to a ground state, they release energy and emit light.

[0004] Recently, a display device including a color conversion panel has been proposed to realize a display device having a high color reproduction ratio while reducing light loss. The color conversion panel may include a color conversion layer including semiconductor nanocrystals such as quantum dots, and may convert incident light into different colors. The color conversion panel may further include a scatterer.

[0005] An organic light emitting display device can be formed by combining a display panel having light emitting elements formed thereon with a color conversion panel. However, forming elements on two substrates and bonding them together to realize a display device increases the thickness of the display device, causing light loss and increasing manufacturing costs. Summary of the Invention [Problem to be solved by the invention]

[0006] An object of the embodiments is to provide a display device and a manufacturing method thereof that can reduce the thickness, light loss, and manufacturing cost of the display device.

[0007] Another object of the present invention is to provide a display device and a manufacturing method thereof that can prevent diffuse reflection from occurring on the surface by forming the upper surface of the display device to be flat. [Means for solving the problem]

[0008] According to one embodiment, the display device includes a substrate, a transistor disposed on the substrate, a light-emitting element electrically connected to the transistor, an encapsulation layer disposed on the light-emitting element, a partition disposed on the encapsulation layer and including an opening overlapping the light-emitting element, and a color conversion layer, a low refractive index layer, and a color filter sequentially stacked in the opening.

[0009] The partition wall may include a first opening overlapping the light emitting element of a first pixel, a second opening overlapping the light emitting element of a second pixel, and a third opening overlapping the light emitting element of a third pixel.

[0010] A first color conversion layer, the low refractive index layer, and a first color filter may be located within the first opening, a second color conversion layer, the low refractive index layer, and a second color filter may be located within the second opening, and a transmissive layer, the low refractive index layer, and a third color filter may be located within the third opening.

[0011] The low refractive index layer may be located on the first color conversion layer, the second color conversion layer, and the transmissive layer, and the low refractive index layer may be located on a side surface of the partition wall.

[0012] The low refractive index layer does not have to be located on the upper surface of the partition wall.

[0013] The first color filter, the second color filter, and the third color filter do not have to overlap each other.

[0014] The first color filter, the second color filter, and the third color filter may not be located on the upper surface of the partition wall.

[0015] A display device according to one embodiment may further include a first capping layer and a second capping layer located in the first opening, the second opening, and the third opening, wherein the first capping layer is located between the first color conversion layer and the low refractive index layer, between the second color conversion layer and the low refractive index layer, and between the transparent layer and the low refractive index layer, and the second capping layer may be located between the low refractive index layer and the first color filter, between the low refractive index layer and the second color filter, and between the low refractive index layer and the third color filter.

[0016] The first capping layer and the second capping layer may be located on an upper surface of the partition wall.

[0017] The display device according to an embodiment may further include an overcoat layer located on the first color filter, the second color filter, the third color filter, and the barrier rib.

[0018] A method for manufacturing a display device according to one embodiment includes forming a transistor and a light-emitting element electrically connected to the transistor on a substrate, forming an encapsulation layer on the light-emitting element, forming a layer forming a partition on the encapsulation layer, patterning the layer forming the partition to form an opening overlapping the light-emitting element, forming a color conversion layer in the opening, forming a low refractive index layer in the opening, and forming a color filter in the opening.

[0019] The steps of forming the color conversion layer, the low refractive index layer, and the color filter may be performed using an inkjet printing process.

[0020] In the step of patterning the layer forming the partition, a first opening overlapping the light-emitting element of a first pixel, a second opening overlapping the light-emitting element of a second pixel, and a third opening overlapping the light-emitting element of a third pixel can be formed.

[0021] In the step of forming the color conversion layer, different ink materials can be dropped into the first opening, the second opening, and the third opening to form a first color conversion layer in the first opening, a second color conversion layer in the second opening, and a transmissive layer in the third opening.

[0022] In the step of forming the low refractive index layer, the same ink material can be dropped into the first opening, the second opening, and the third opening, thereby forming a low refractive index layer on the first color conversion layer, the second color conversion layer, and the transparent layer, respectively.

[0023] The low refractive index layer may be located on a side surface of the partition wall, and the low refractive index layer may not be located on an upper surface of the partition wall.

[0024] In the step of forming the color filters, a first color filter may be formed in the first opening, a second color filter may be formed in the second opening, and a third color filter may be formed in the third opening by dropping different ink materials into the first opening, the second opening, and the third opening, and the first color filter, the second color filter, and the third color filter may be positioned on the low refractive index layer.

[0025] The first color filter, the second color filter, and the third color filter may not overlap each other, and the first color filter, the second color filter, and the third color filter may not be located on an upper surface of the partition wall.

[0026] A manufacturing method for a display device according to one embodiment may further include a step of forming a first capping layer on the first color conversion layer, the second color conversion layer, and the transmissive layer before the step of forming the low refractive index layer, and may further include a step of forming a second capping layer on the low refractive index layer after the step of forming the low refractive index layer.

[0027] According to an embodiment, the method for manufacturing a display device may further include forming an overcoat layer on the first color filter, the second color filter, the third color filter, and the barrier rib. Effect of the Invention

[0028] According to the embodiment, by forming elements such as a color conversion layer as well as a light emitting element on one substrate, it is possible to reduce the thickness of the display device, reduce light loss, and save manufacturing costs.

[0029] Furthermore, by forming the upper surface of the display device to be flat, it is possible to prevent diffuse reflection from occurring on the surface. [Brief description of the drawings]

[0030] [Figure 1] 1 is a cross-sectional view illustrating a display device according to an embodiment. [Diagram 2] 1A to 1C are cross-sectional views each showing a schematic sequence of a manufacturing process for a display device according to an embodiment. [Diagram 3] 1A to 1C are cross-sectional views each showing a schematic sequence of a manufacturing process for a display device according to an embodiment. [Figure 4] 1A to 1C are cross-sectional views each showing a schematic sequence of a manufacturing process for a display device according to an embodiment. [Diagram 5] 1A to 1C are cross-sectional views each showing a schematic sequence of a manufacturing process for a display device according to an embodiment. [Figure 6] 2 is a diagram illustrating a schematic plan view of some layers at some stages in a manufacturing process of a display device according to an embodiment; [Figure 7]2A to 2C are schematic cross-sectional views of some layers at some stages in a manufacturing process of a display device according to an embodiment; [Figure 8] 2 is a diagram illustrating a schematic plan view of some layers at some stages in a manufacturing process of a display device according to an embodiment; [Figure 9] 2A to 2C are schematic cross-sectional views of some layers at some stages in a manufacturing process of a display device according to an embodiment; [Figure 10] 1A to 1C are cross-sectional views each showing a schematic sequence of a manufacturing process for a display device according to an embodiment. [Figure 11] 1A to 1C are cross-sectional views each showing a schematic sequence of a manufacturing process for a display device according to an embodiment. [Figure 12] 1 is a cross-sectional view illustrating a display device according to an embodiment. [Figure 13] 1 is a cross-sectional view illustrating a display device according to an embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0031] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, various embodiments of the present disclosure will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement the present disclosure. As such, the present disclosure may be embodied in many different forms and is not limited to the embodiments set forth herein.

[0032] In order to clearly explain the present disclosure, parts not necessary for the explanation are omitted, and the same reference numerals are used throughout the specification to refer to the same or similar components.

[0033] In addition, the size and thickness of each component shown in the drawings are arbitrarily shown for convenience of explanation, and the present disclosure is not necessarily limited to those shown in the drawings. In the drawings, thicknesses are enlarged to clearly express multiple layers and regions. In the drawings, thicknesses of some layers and regions are exaggerated for convenience of explanation.

[0034] In addition, when a part such as a layer, film, region, or plate is said to be "above" another part, this includes not only the case where it is "directly above" the other part, but also the case where there is another part in between. Conversely, when a part is said to be "directly above" another part, it means that there is no other part in between. In addition, being "above" a reference part means being located above or below the reference part, and does not necessarily mean being located "above" in the opposite direction to gravity.

[0035] Furthermore, throughout the specification, when a part is said to "comprise" a certain element, this does not mean that it excludes other elements and may further include other elements, unless specifically stated to the contrary.

[0036] Also, throughout the specification, a reference to "in a plane" means when the subject part is viewed from above, and a reference to "in cross section" means when the subject part is cut vertically and viewed from the side.

[0037] Hereinafter, a display device according to an embodiment will be described with reference to FIG.

[0038] FIG. 1 is a cross-sectional view that illustrates a display device according to an embodiment.

[0039] As shown in FIG. 1, a display device according to an embodiment includes a substrate 110, a transistor TFT disposed on the substrate 110, and a light emitting element ED connected to the transistor TFT.

[0040] The substrate 110 may include at least one of polystyrene, polyvinyl alcohol, polymethyl methacrylate, polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, triacetate cellulose, and cellulose acetate propionate. The substrate 110 may be a rigid substrate or a flexible substrate capable of bending, folding, rolling, and the like. The substrate 110 may be a single layer or a multilayer. The substrate 110 may be comprised of at least one base layer including a polymeric resin and at least one inorganic layer, which are alternately laminated in sequence.

[0041] The surface of the substrate 110 may be flat. The buffer layer 111 is made of silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y The buffer layer 111 may include an inorganic insulating material and / or an organic insulating material, such as silicon nitride (SiN). The buffer layer 111 may be a single layer or a multi-layer structure of the above materials. A barrier layer (not shown) may be further disposed on the substrate 110. In this case, the barrier layer may be disposed between the substrate 110 and the buffer layer 111. The barrier layer may be formed of silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiOx N y The barrier layer (BA) may comprise a single layer or multiple layers of the above materials.

[0042] A light blocking layer 177 may be positioned on the buffer layer 111. The light blocking layer 177 may serve to block light incident on the semiconductor 131. The light blocking layer 177 may overlap the semiconductor 131 and may have a width greater than that of the semiconductor 131.

[0043] An insulating layer 113 may be disposed on the light blocking layer 177. The insulating layer 113 may be made of silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y The insulating layer 113 may include an inorganic insulating material and / or an organic insulating material such as SiO 2 , etc. The insulating layer 113 may block impurities from the substrate 110 from entering the semiconductor 131, thereby improving the characteristics of the semiconductor 131.

[0044] A semiconductor 131 may be positioned on the insulating layer 113. The semiconductor 131 may include any one of amorphous silicon, polycrystalline silicon, and an oxide semiconductor. For example, the semiconductor 131 may include low temperature polysilicon (LTPS) or an oxide semiconductor material including at least one of zinc (Zn), indium (In), gallium (Ga), tin (Sn), and mixtures thereof. For example, the semiconductor 131 may include indium-gallium-zinc oxide (IGZO). The semiconductor 131 may include a channel region, a source region, and a drain region, which are differentiated by the presence or absence of impurity doping. The source region and the drain region may have conductive properties corresponding to a conductor.

[0045] A gate insulating film 120 may be located on the semiconductor 131. The gate insulating film 120 may have a single layer or a multi-layer structure. The gate insulating film 120 may be made of silicon nitride (SiN x), silicon oxide (SiO x ), silicon oxynitride (SiO x N y The gate insulating film 120 may include an inorganic insulating material such as a SiO 2 film or a SiO 3 film. The gate insulating film 120 may be located to cover at least a portion of the semiconductor 131. For example, the gate insulating film 120 may overlap a channel region of the semiconductor 131. In this case, the gate insulating film 120 may not overlap a source region and a drain region of the semiconductor 131. However, the present invention is not limited thereto, and the gate insulating film 120 may be formed to cover the entire semiconductor 131. In this case, the gate insulating film 120 may be located entirely on the substrate 110.

[0046] A gate electrode 124 may be positioned on the gate insulating film 120. The gate electrode 124 may include a metal or a metal alloy, such as copper (Cu), molybdenum (Mo), aluminum (Al), silver (Ag), chromium (Cr), tantalum (Ta), or titanium (Ti). The gate electrode 124 may be formed of a single layer or multiple layers. A region of the semiconductor 131 that overlaps with the gate electrode 124 on a plane may be a channel region. After the gate electrode 124 is formed, a doping process or a plasma treatment may be performed. A portion of the semiconductor 131 covered by the gate electrode 124 is not doped or plasma treated, and a portion of the semiconductor 131 that is not covered by the gate electrode 124 is doped or plasma treated to have the same characteristics as a conductor. For example, a source region and a drain region of the semiconductor 131 do not overlap with the gate electrode 124, but are doped or plasma treated to have the same characteristics as a conductor.

[0047] A first interlayer insulating layer 160 may be located on the gate electrode 124. The first interlayer insulating layer 160 may be formed over the entire substrate 110. For example, the first interlayer insulating layer 160 may be formed to cover the gate insulating layer 120, the semiconductor 131, and the insulating layer 113. The first interlayer insulating layer 160 may have a single layer or a multi-layer structure. The first interlayer insulating layer 160 may include an inorganic insulating material and / or an organic insulating material.

[0048] The source electrode 173 and the drain electrode 175 may be located on the first interlayer insulating film 160. The source electrode 173 and the drain electrode 175 may include a metal or a metal alloy, such as aluminum (Al), copper (Cu), silver (Ag), gold (Au), platinum (Pt), palladium (Pd), nickel (Ni), molybdenum (Mo), tungsten (W), titanium (Ti), chromium (Cr), or tantalum (Ta). The source electrode 173 and the drain electrode 175 may be configured as a single layer or multiple layers. According to an embodiment, the source electrode 173 and the drain electrode 175 may be configured as a triple layer including an upper layer, a middle layer, and a lower layer, where the upper layer and the lower layer may include titanium (Ti), and the middle layer may include aluminum (Al).

[0049] The first interlayer insulating film 160 may include an opening overlapping the source electrode 173 and the source region of the semiconductor 131. The source electrode 173 may be connected to the source region of the semiconductor 131 through an opening formed in the first interlayer insulating film 160. The first interlayer insulating film 160 may include an opening overlapping the drain electrode 175 and the drain region of the semiconductor 131. The drain electrode 175 may be connected to the drain region of the semiconductor 131 through an opening formed in the first interlayer insulating film 160. The first interlayer insulating film 160 may further include an opening overlapping the drain electrode 175 and the light blocking layer 177. An opening may also be formed in the insulating layer 113. The drain electrode 175 may be connected to the light blocking layer 177 through an opening formed in the first interlayer insulating film 160 and the insulating layer 113.

[0050] The above-described semiconductor 131, gate electrode 124, source electrode 173, and drain electrode 175 constitute one transistor TFT. In some embodiments, the transistor TFT may include only the source region and drain region of the semiconductor 131 instead of the source electrode 173 and drain electrode 175.

[0051] The display device according to an embodiment may include a first pixel PX1, a second pixel PX2, and a third pixel PX3. Although one each of the first pixel PX1, the second pixel PX2, and the third pixel PX3 is shown, the present invention is not limited thereto, and the display device according to an embodiment may include a plurality of first pixels PX1, a plurality of second pixels PX2, and a plurality of third pixels PX3. The plurality of first pixels PX1, the plurality of second pixels PX2, and the plurality of third pixels PX3 may be arranged in various forms. Although one transistor TFT is shown in each of the first pixel PX1, the second pixel PX2, and the third pixel PX3, the present invention is not limited thereto, and a plurality of transistor TFTs may be located in each of the first pixel PX1, the second pixel PX2, and the third pixel PX3. For example, a switching transistor, a driving transistor, etc. may be located in each of the first pixel PX1, the second pixel PX2, and the third pixel PX3. Although not shown in the drawings, at least one capacitor may be located in each of the first pixel PX1, the second pixel PX2, and the third pixel PX3.

[0052] A second interlayer insulating film 180 may be positioned on the source electrode 173 and the drain electrode 175. The second interlayer insulating film 180 may cover the source electrode 173, the drain electrode 175, and the first interlayer insulating film 160. The second interlayer insulating film 180 is for planarizing the surface of the substrate 110 on which the transistor TFT is provided, and may be an organic insulating film, and may include one or more materials selected from the group consisting of polyimide, polyamide, acrylic resin, benzocyclobutene, and phenol resin.

[0053] A pixel electrode 191 may be located on the second interlayer insulating film 180. The pixel electrode 191 is also called an anode electrode and may be composed of a single layer including a transparent conductive oxide film or a metal material, or a multi-layer including these. The transparent conductive oxide film may include ITO (Indium Tin Oxide), poly-ITO, IZO (Indium Zinc Oxide), IGZO (Indium Gallium Zinc Oxide), ITZO (Indium Tin Zinc Oxide), etc. The metal material may include silver (Ag), molybdenum (Mo), copper (Cu), gold (Au), aluminum (Al), etc.

[0054] The second interlayer insulating film 180 may include an opening overlapping the pixel electrode 191 and the drain electrode 175. The pixel electrode 191 may be connected to the drain electrode 175 through the opening of the second interlayer insulating film 180. Thus, the pixel electrode 191 may receive an output current transmitted from the drain electrode 175 to the light emitting layer 370.

[0055] A bank layer 350 may be located on the pixel electrode 191 and the second interlayer insulating film 180. The bank layer 350 is also called a pixel defining layer (PDL) and includes a pixel opening 351 overlapping at least a portion of the pixel electrode 191. At this time, the pixel opening 351 may overlap a center portion of the pixel electrode 191, but may not overlap an edge portion of the pixel electrode 191. Therefore, the size of the pixel opening 351 may be smaller than the size of the pixel electrode 191. The bank layer 350 may define a position for forming the light emitting layer 370 so that the light emitting layer 370 may be located on an exposed portion of the upper surface of the pixel electrode 191. The bank layer 350 may be an organic insulating film including one or more materials selected from the group consisting of polyimide, polyamide, acrylic resin, benzocyclobutene, and phenol resin. Depending on the embodiment, the bank layer 350 may be formed of a black pixel defining layer (BPDL) including a black pigment.

[0056] The bank layer 350 can be located at the boundary between the first pixel PX1 and the second pixel PX2, between the second pixel PX2 and the third pixel PX3, or between the third pixel PX3 and the first pixel PX1. In other words, the bank layer 350 can be located at the boundary between multiple pixels.

[0057] Each of the pixel openings 351 may have a shape similar to that of the pixel electrode 191 on a plane. For example, the pixel openings 351 and the pixel electrodes 191 may be polygonal on a plane. In this case, corners of the pixel openings 351 and the pixel electrodes 191 may be chamfered. However, the shapes of the pixel openings 351 and the pixel electrodes 191 are not limited thereto and may be variously changed.

[0058] At this time, the pixel electrodes 191 corresponding to the first pixel PX1, the second pixel PX2, and the third pixel PX3 may have different sizes on a plane. Similarly, the pixel openings 351 corresponding to the first pixel PX1, the second pixel PX2, and the third pixel PX3 may have different sizes on a plane. For example, the pixel opening 351 and the pixel electrode 191 corresponding to the first pixel PX1 may have a larger size than the pixel opening 351 and the pixel electrode 191 corresponding to the second pixel PX2 on a plane. Also, the pixel opening 351 and the pixel electrode 191 corresponding to the first pixel PX1 may have a smaller or similar size than the pixel opening 351 and the pixel electrode 191 corresponding to the third pixel PX3 on a plane. However, this is not limited thereto, and each pixel opening 351 and pixel electrode 191 may be set to have various sizes.

[0059] The light-emitting layer 370 may be located in the pixel opening 351 defined by the bank layer 350. However, the present invention is not limited thereto, and the light-emitting layer 370 may be located not only in the pixel opening 351 but also on the bank layer 350. That is, the light-emitting layer 370 may be formed on the entire substrate 110. At this time, the light-emitting layer 370 may be formed by performing a deposition process using an open mask having an opening corresponding to a display region. The light-emitting layer 370 may include a low molecular weight or high molecular weight organic material. Although the light-emitting layer 370 is shown as a single layer, in practice, auxiliary layers such as an electron injection layer, an electron transport layer, a hole transport layer, and a hole injection layer may be included above and below the light-emitting layer 370. A hole injection layer and a hole transport layer may be located below the light-emitting layer 370, and an electron transport layer and an electron injection layer may be located above the light-emitting layer 370. In addition, another light-emitting layer may be located on the light-emitting layer 370. That is, two or more light-emitting layers 370 may be stacked.

[0060] Although not shown, a spacer may be further positioned on the bank layer 350. The spacer may include the same material as the bank layer 350. However, the present invention is not limited thereto, and the spacer may be made of a different material from the bank layer 350. The spacer may be an organic insulating film including one or more materials selected from the group consisting of polyimide, polyamide, acrylic resin, benzocyclobutene, and phenol resin.

[0061] The common electrode 270 may be located on the bank layer 350 and the light emitting layer 370. The common electrodes 270 of the pixels PX1, PX2, and PX3 may be connected to each other. The common electrode 270 may be formed on the substrate 110 so as to be entirely connected. The common electrode 270 is also called a cathode electrode and may be formed of a transparent conductive layer including ITO (Indium Tin Oxide), IZO (Indium Zinc Oxide), IGZO (Indium Gallium Zinc Oxide), and ITZO (Indium Tin Zinc Oxide). The common electrode 270 may be made of a metal material such as silver (Ag), magnesium (Mg), or a mixture thereof. At this time, the thickness of the common electrode 270 may be adjusted to form a transparent conductive layer. Also, the common electrode 270 may have a semi-transparent characteristic, and in this case, a microcavity may be formed together with the pixel electrode 191.

[0062] The pixel electrode 191, the light-emitting layer 370, and the common electrode 270 can configure a light-emitting element ED. In each of the first pixel PX1, the second pixel PX2, and the third pixel PX3, the overlapping portion of the pixel electrode 191, the light-emitting layer 370, and the common electrode 270 can become a light-emitting region of each light-emitting element ED.

[0063] The encapsulation layer 400 may be located on the common electrode 270. The encapsulation layer 400 may include at least one inorganic film and at least one organic film. In the present embodiment, the encapsulation layer 400 may include a first inorganic encapsulation layer 410, an organic encapsulation layer 420, and a second inorganic encapsulation layer 430. However, this is merely an example, and the number of inorganic films and organic films constituting the encapsulation layer 400 may be variously changed. The display device according to an embodiment may include a display area for displaying a screen and a peripheral area surrounding the display area. The first inorganic encapsulation layer 410, the organic encapsulation layer 420, and the second inorganic encapsulation layer 430 may be located in a part of the display area and the peripheral area. In some embodiments, the organic encapsulation layer 420 may be formed around the display area, and the first inorganic encapsulation layer 410 and the second inorganic encapsulation layer 430 may be formed up to the peripheral area. The encapsulation layer 400 is for protecting the light emitting element ED from moisture, oxygen, etc. that may flow in from the outside, and the side ends of the first inorganic encapsulation layer 410 and the second inorganic encapsulation layer 430 may be formed to directly contact each other.

[0064] The partitions 265 may be positioned on the encapsulation layer 400. The partitions 265 may overlap the bank layer 350. The partitions 265 may be positioned at boundaries between the pixels PX1, PX2, and PX3. The partitions 265 may be made of a photosensitive resin. The partitions 265 may include a colored pigment such as a black pigment or a blue pigment. The thickness of the partitions 265 may be about 10 μm or more and about 20 μm or less. The width of the partitions 265 may gradually decrease as it becomes farther from the encapsulation layer 400. The width of the partitions 265 may gradually decrease as it becomes farther from the substrate 110. However, the present invention is not limited thereto, and the width of the partitions 265 may be constant. Alternatively, the width of the partitions 265 may gradually increase as it becomes farther from the substrate 110.

[0065] The partition wall 265 may include openings 267a, 267b, and 267c. The openings 267a, 267b, and 267c may include a first opening 267a, a second opening 267b, and a third opening 267c. The first opening 267a may overlap with the light-emitting region of the light-emitting element ED of the first pixel PX1, the second opening 267b may overlap with the light-emitting region of the light-emitting element ED of the second pixel PX2, and the third opening 267c may overlap with the light-emitting region of the light-emitting element ED of the third pixel PX3. The openings 267a, 267b, and 267c of the partition wall 265 may overlap with the pixel opening 351 of the bank layer 350. The first opening 267a, the second opening 267b, and the third opening 267c are separated from each other by the partition wall 265. For example, the first opening 267a, the second opening 267b, and the third opening 267c are surrounded by a partition wall 265.

[0066] A first color conversion layer 520a may be positioned within the first opening 267a, a second color conversion layer 520b may be positioned within the second opening 267b, and a transmissive layer 520c may be positioned within the third opening 267c.

[0067] The first color conversion layer 520a can convert the light incident from the light emitting element ED of the first pixel PX1 into light of the first wavelength. At this time, the light of the first wavelength may be red light having a maximum emission peak wavelength of about 600 nm to about 650 nm, for example, about 620 nm to about 650 nm. The first color conversion layer 520a may include first quantum dots 521a and scatterers 530.

[0068] The second color conversion layer 520b can convert the light incident from the light emitting element ED of the second pixel PX2 into light of the second wavelength. At this time, the light of the second wavelength may be green light having a maximum emission peak wavelength of about 500 nm to about 550 nm, for example, about 510 nm to about 550 nm. The second color conversion layer 520b may include second quantum dots 521b and scatterers 530.

[0069] The transmissive layer 520c can transmit the light incident from the light emitting element ED of the third pixel PX3. The light passing through the transmissive layer 520c may be light of a third wavelength. The light of the third wavelength may be blue light having a maximum emission peak wavelength of about 380 nm to about 480 nm, for example, about 420 nm or more, about 430 nm or more, about 440 nm or more, or about 445 nm or more, and about 470 nm or less, about 460 nm or less, or about 455 nm or less. The transmissive layer 520c may include a plurality of scatterers 530.

[0070] The plurality of scatterers 530 can improve light efficiency by scattering light incident on the first color conversion layer 520a, the second color conversion layer 520b, and the transmissive layer 520c.

[0071] Each of the first quantum dots 521a and the second quantum dots 521b (hereinafter also referred to as semiconductor nanocrystals) can independently comprise a II-VI compound, a III-V compound, a IV-VI compound, a group IV element or compound, a I-III-VI compound, a II-III-VI compound, a I-II-IV-VI compound, or a combination thereof. The quantum dots may be free of cadmium.

[0072] The II-VI compound is a binary compound selected from the group consisting of CdSe, CdTe, ZnS, ZnSe, ZnTe, ZnO, HgS, HgSe, HgTe, MgSe, MgS and mixtures thereof; AgInS, CuInS, CdSeS, CdSeTe, CdSTe, ZnSeS, ZnSeTe, ZnSTe, HgSeS, HgSeTe, HgSTe, CdZnS, CdZnSe, CdZnTe, CdHgS, CdH ternary compounds selected from the group consisting of CdZnSe, CdHgTe, HgZnS, HgZnSe, HgZnTe, MgZnSe, MgZnS, and mixtures thereof; and quaternary compounds selected from the group consisting of CdZnSeS, CdZnSeTe, CdZnSTe, CdHgSeS, CdHgSeTe, CdHgSTe, HgZnSeS, HgZnSeTe, HgZnSTe, and mixtures thereof. The II-VI compound may further comprise a Group III metal.

[0073] The III-V compound may be selected from the group consisting of binary compounds selected from the group consisting of GaN, GaP, GaAs, GaSb, AlN, AlP, AlAs, AlSb, InN, InP, InAs, InSb, and mixtures thereof; ternary compounds selected from the group consisting of GaNP, GaNAs, GaNSb, GaPAs, GaPSb, AlNP, AlNAs, AlNSb, AlPAs, AlPSb, InGaP, InNP, InNAs, InNSb, InPAs, InZnP, InPSb, and mixtures thereof; and quaternary compounds selected from the group consisting of GaAlNP, GaAlNAs, GaAlNSb, GaAlPAs, GaAlPSb, GaInNP, GaInNAs, GaInNSb, GaInPAs, GaInPSb, InAlNP, InAlNAs, InAlNSb, InAlPAs, InAlPSb, InZnP, and mixtures thereof. The III-V compound may also include a Group II metal (e.g., InZnP).

[0074] The IV-VI compound may be selected from the group consisting of binary compounds selected from the group consisting of SnS, SnSe, SnTe, PbS, PbSe, PbTe, and mixtures thereof; ternary compounds selected from the group consisting of SnSeS, SnSeTe, SnSTe, PbSeS, PbSeTe, PbSTe, SnPbS, SnPbSe, SnPbTe, and mixtures thereof; and quaternary compounds selected from the group consisting of SnPbSSe, SnPbSeTe, SnPbSTe, and mixtures thereof.

[0075] The Group IV element or compound may be selected from the group consisting of, but is not limited to, mono-element compounds selected from the group consisting of Si, Ge, and combinations thereof; and bi-element compounds selected from the group consisting of SiC, SiGe, and combinations thereof.

[0076] Examples of the I-III-VI compounds include, but are not limited to, CuInSe2, CuInS2, CuInGaSe, and CuInGaS. Examples of the I-II-IV-VI compounds include, but are not limited to, CuZnSnSe, and CuZnSnS. The Group IV element or compound may be selected from the group consisting of monoelements selected from the group consisting of Si, Ge, and mixtures thereof; and binary compounds selected from the group consisting of SiC, SiGe, and mixtures thereof.

[0077] The II-III-VI compound may be selected from the group consisting of, but is not limited to, ZnGaS, ZnAlS, ZnInS, ZnGaSe, ZnAlSe, ZnInSe, ZnGaTe, ZnAlTe, ZnInTe, ZnGaO, ZnAlO, ZnInO, HgGaS, HgAlS, HgInS, HgGaSe, HgAlSe, HgInSe, HgGaTe, HgAlTe, HgInTe, MgGaS, MgAlS, MgInS, MgGaSe, MgAlSe, MgInSe, and combinations thereof.

[0078] The group I-II-IV-VI compound may be selected from, but is not limited to, CuZnSnSe and CuZnSnS.

[0079] In one embodiment, the quantum dots may be free of cadmium. The quantum dots may include semiconductor nanocrystals based on III-V compounds including indium and phosphorus. The III-V compounds may further include zinc. The quantum dots may include semiconductor nanocrystals based on II-VI compounds including chalcogen elements (e.g., sulfur, selenium, tellurium, or combinations thereof) and zinc.

[0080] In the quantum dots, the two-element compound, three-element compound, and / or four-element compound may be present in a particle with a uniform concentration, or may be present in the same particle with a partially different concentration distribution. Also, the color conversion layer (which may include, for example, the first color conversion layer 520a and the second color conversion layer 520b) may have a core / shell structure in which one quantum dot surrounds another quantum dot. The interface between the core and the shell may have a concentration gradient in which the concentration of the element present in the shell decreases toward the center.

[0081] In some embodiments, the quantum dots may have a core-shell structure including a core containing the nanocrystals described above and a shell surrounding the core. The shell of the quantum dots may act as a protective layer to prevent chemical denaturation of the core and maintain the semiconductor properties and / or as a charging layer to impart electrophoretic properties to the quantum dots. The shell may be a single layer or multiple layers. The interface between the core and the shell may have a concentration gradient in which the concentration of the elements present in the shell decreases toward the center. Examples of the shell of the quantum dots include metal or nonmetal oxides, semiconductor compounds, or combinations thereof.

[0082] For example, the metal or nonmetal oxide is SiO 2 , Al 2 O 3 , TiO 2 , ZnO, MnO, Mn 2 O 3 , Mn 3 O 4 , CuO, FeO, Fe 2 O 3 , Fe 3 O 4 , CoO, Co 3 O 4 , binary compounds such as NiO, or MgAl 2 O 4 , CoFe 2 O 4 , NiFe 2 O 4 , CoMn2 O 4 Examples of ternary element compounds include, but are not limited to, the present disclosure.

[0083] Furthermore, examples of the semiconductor compound include CdS, CdSe, CdTe, ZnS, ZnSe, ZnTe, ZnSeS, ZnTeS, GaAs, GaP, GaSb, HgS, HgSe, HgTe, InAs, InP, InGaP, InSb, AlAs, AlP, and AlSb, but the present disclosure is not limited thereto.

[0084] The interface between the core and the shell may have a concentration gradient in which the concentration of the element present in the shell decreases toward the center. The semiconductor nanocrystal may also have a structure including a semiconductor nanocrystal core and a multi-layer shell surrounding the core. In an embodiment, the multi-layer shell may have two or more layers, for example, two, three, four, five or more layers. Two adjacent layers of the shell may have the same composition or different compositions. Each layer in the multi-layer shell may have a composition that varies along the radius.

[0085] The quantum dots may have a full width of half maximum (FWHM) of the emission wavelength spectrum of about 45 nm or less, preferably about 40 nm or less, and more preferably about 30 nm or less, and within this range, color purity and color reproducibility can be improved. Furthermore, light emitted through such quantum dots can be emitted in all directions, thereby improving the light viewing angle.

[0086] The quantum dot may have a shell material and a core material having different energy band gaps. For example, the energy band gap of the shell material may be larger than that of the core material. In other embodiments, the energy band gap of the shell material may be smaller than that of the core material. The quantum dot may have a multi-layer shell. In the multi-layer shell, the energy band gap of an outer layer may be larger than that of an inner layer (i.e., a layer closer to the core). In the multi-layer shell, the energy band gap of an outer layer may be smaller than that of an inner layer.

[0087] The quantum dots can adjust the absorption / emission wavelength by adjusting the composition and size. The maximum emission peak wavelength of the quantum dots can range from ultraviolet to infrared wavelengths or even longer.

[0088] The quantum dots can include organic ligands (e.g., having hydrophobic and / or hydrophilic residues). The organic ligand residues can be attached to the surface of the quantum dots. The organic ligands can be RCOOH, RNH 2 , R 2 N.H., R. 3 N, R.S.H., R. 3 P.O., R. 3 P, ROH, RCOOR, RPO(OH) 2 , R.H.P.O.H., R. 2 POOH, or combinations thereof, where each R can be independently a C3 to C40 (e.g., C or more and C24 or less) substituted or unsubstituted alkyl, a C3 to C40 substituted or unsubstituted aliphatic hydrocarbon group such as a substituted or unsubstituted alkenyl, a C6 to C40 (e.g., C6 or more and C20 or less) substituted or unsubstituted aromatic hydrocarbon group such as a substituted or unsubstituted C6 to C40 aryl group, or a combination thereof.

[0089] Examples of the organic ligand include thiol compounds such as methanethiol, ethanethiol, propanethiol, butanethiol, pentanethiol, hexanethiol, octanethiol, dodecanethiol, hexadecanethiol, octadecanethiol, and benzylthiol; amines such as methaneamine, ethaneamine, propaneamine, butaneamine, pentylamine, hexylamine, octylamine, nonylamine, decylamine, dodecylamine, hexadecylamine, octadecylamine, dimethylamine, diethylamine, dipropylamine, tributylamine, and trioctylamine; and amines such as methanoic acid, ethanoic acid, propanoic acid, butanoic acid, pentanoic acid, hexanoic acid, heptanoic acid, octanoic acid, dodecanoic acid, hexadecane acid, octadecanoic acid, and oleic acid. acid), carboxylic acid compounds such as benzoic acid; phosphine compounds such as methylphosphine, ethylphosphine, propylphosphine, butylphosphine, pentylphosphine, octylphosphine, dioctylphosphine, tributylphosphine, trioctylphosphine; phosphine compounds or oxide compounds such as methylphosphine oxide, ethylphosphine oxide, propylphosphine oxide, butylphosphine oxide, pentylphosphine oxide, tributylphosphine oxide, octylphosphine oxide, dioctylphosphine oxide, trioctylphosphine oxide; diphenylphosphine, triphenylphosphine compounds or oxide compounds; alkylphosphinic acids having C5 to C20, such as hexylphosphinic acid, octylphosphinic acid, dodecanephosphinic acid, tetradecanephosphinic acid, hexadecanephosphinic acid, and octadecanephosphinic acid, and alkylphosphonic acids having C5 to C20; and the like, but are not limited thereto. The quantum dots may contain hydrophobic organic ligands alone or as a mixture of one or more types. The hydrophobic organic ligands may be free of photopolymerizable moieties (eg, acrylate groups, methacrylate groups, etc.).

[0090] The low refractive index layer 240 may be located on the first color conversion layer 520a, the second color conversion layer 520b, and the transmissive layer 520c. The low refractive index layer 240 may be located in the first opening 267a, the second opening 267b, and the third opening 267c. The low refractive index layer 240 may be located on the first color conversion layer 520a in the first opening 267a and may cover the side of the partition wall 265. The low refractive index layer 240 may be located on the second color conversion layer 520b in the second opening 267b and may cover the side of the partition wall 265. The low refractive index layer 240 may be located on the transmissive layer 520c in the third opening 267c and may cover the side of the partition wall 265. The low refractive index layer 240 may include an organic material or an inorganic material having a low refractive index. For example, the refractive index of the low refractive index layer 240 may be about 1.1 or more and about 1.3 or less.

[0091] A first color filter 230a, a second color filter 230b, and a third color filter 230c may be positioned on the low refractive index layer 240. The first color filter 230a may be positioned in the first opening 267a, the second color filter 230b may be positioned in the second opening 267b, and the third color filter 230c may be positioned in the third opening 267c.

[0092] The first color filter 230a can transmit light of the first wavelength and absorb light of the remaining wavelengths, so that the first color filter 230a can increase the purity of the light of the first wavelength emitted to the outside of the display device. The first color filter 230a is surrounded by the low refractive index layer 240 in the first opening 267a. The lower surface and the side surface of the first color filter 230a can be in contact with the low refractive index layer 240. The first color filter 230a does not need to be in contact with the partition wall 265. The first color filter 230a can overlap the first color conversion layer 520a. The low refractive index layer 240 can be located between the first color filter 230a and the first color conversion layer 520a.

[0093] The second color filter 230b can transmit light of the second wavelength and absorb light of the remaining wavelengths, so that the second color filter 230b can increase the purity of light of the second wavelength emitted to the outside of the display device. In the second opening 267b, the second color filter 230b is surrounded by the low refractive index layer 240. The lower surface and the side surface of the second color filter 230b can be in contact with the low refractive index layer 240. The second color filter 230b does not need to be in contact with the partition 265. The second color filter 230b can overlap the second color conversion layer 520b. The low refractive index layer 240 can be located between the second color filter 230b and the second color conversion layer 520b.

[0094] The third color filter 230c can transmit light of the third wavelength and absorb light of the remaining wavelengths, so that the third color filter 230c can increase the purity of light of the third wavelength emitted to the outside of the display device. The third color filter 230c is surrounded by the low refractive index layer 240 in the third opening 267c. The lower surface and the side surface of the third color filter 230c can be in contact with the low refractive index layer 240. The third color filter 230c does not have to be in contact with the partition wall 265. The third color filter 230c can overlap with the transmissive layer 520c. The low refractive index layer 240 can be located between the third color filter 230c and the transmissive layer 520c.

[0095] Although it has been described above that the first color filter 230a, the second color filter 230b, and the third color filter 230c are not in contact with the partition 265, this is not limiting. In some cases, at least a portion of the first color filter 230a, the second color filter 230b, and the third color filter 230c may be in contact with the partition 265.

[0096] The thickness of the partition wall 265 may correspond to the thickness of the first color conversion layer 520a, the low refractive index layer 240, and the first color filter 230a. For example, the thickness of the partition wall 265 may be equal to or greater than the sum of the thicknesses of the first color conversion layer 520a, the low refractive index layer 240, and the first color filter 230a. The thickness of the partition wall 265 may correspond to the thickness of the second color conversion layer 520b, the low refractive index layer 240, and the second color filter 230b. For example, the thickness of the partition wall 265 may be equal to or greater than the sum of the thicknesses of the second color conversion layer 520b, the low refractive index layer 240, and the second color filter 230b. The thickness of the partition wall 265 may correspond to the thickness of the transmissive layer 520c, the low refractive index layer 240, and the third color filter 230c. For example, the thickness of the partition 265 may be the same as or greater than the sum of the thicknesses of the transmissive layer 520c, the low refractive index layer 240, and the third color filter 230c.

[0097] An overcoat layer 290 may be disposed on the first color filter 230a, the second color filter 230b, the third color filter 230c, and the barrier ribs 265. The overcoat layer 290 may be formed of silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y The overcoat layer 290 may include an inorganic insulating material or an organic insulating material such as SiO 2 . The overcoat layer 290 may be a single layer or a multi-layer structure of the above materials. The overcoat layer 290 may serve to flatten the top surfaces of the first color filter 230a, the second color filter 230b, the third color filter 230c, and the barrier ribs 265.

[0098] In the display device according to an embodiment, the transistor TFT, the light emitting device ED, the color conversion layers 520a, 520b, the transmissive layer 520c, and the color filters 230a, 230b, 230c are formed on one substrate 110. In the display device according to an embodiment, the color conversion layers 520a, 520b, the transmissive layer 520c, and the color filters 230a, 230b, 230c are not formed on separate substrates and then bonded using a filling layer. Therefore, a separate filling layer may not be located between the encapsulation layer 400 and the color conversion layer. In addition, a separate substrate may not be located on the color filters 230a, 230b, 230c. Since a separate substrate for forming the color conversion layers 520a, 520b is not used, the overall thickness of the display device can be reduced. In addition, the distance between the light emitting device ED and the color conversion layers 520a, 520b and the distance between the light emitting device ED and the transmissive layer 520c can be reduced to reduce light loss. Furthermore, the manufacturing process of the display device can be simplified, and the manufacturing cost can be reduced.

[0099] In the display device according to an embodiment, the color filters 230a, 230b, and 230c are formed in the openings 267a, 267b, and 267c of the partition 265, so that the color filters 230a, 230b, and 230c do not need to overlap with each other at the boundaries between the pixels PX1, PX2, and PX3. Therefore, the upper surfaces of the color filters 230a, 230b, and 230c can be flat. In addition, the upper surfaces of the color filters 230a, 230b, and 230c and the upper surface of the partition 265 can be flat. As a result, the upper surface of the overcoat layer 290 can be flat, and diffuse reflection on the surface of the display device can be prevented.

[0100] In the display device according to the embodiment, the low refractive index layer 240 is formed to cover the side surface of the partition wall 265 within the openings 267a, 267b, and 267c, so that light incident on the side surface of the partition wall 265 can be totally reflected and emitted to the front, thereby improving the front light emission efficiency of the display device.

[0101] Next, a method of manufacturing a display device according to an embodiment will be described with reference to FIG. 1 as well as FIG. 2 to FIG.

[0102] 2 to 5, 10, and 11 are cross-sectional views sequentially and diagrammatically illustrating a manufacturing process of a display device according to an embodiment. Figures 6 and 8 are views illustrating planes of some layers at some stages of a manufacturing process of a display device according to an embodiment, and Figures 7 and 9 are views illustrating cross-sections of some layers at some stages of a manufacturing process of a display device according to an embodiment.

[0103] As shown in FIG. 2, a transistor TFT is formed on a substrate 110, and a light emitting element ED is formed connected to the transistor TFT.

[0104] A conductive material such as a metal material may be deposited on the substrate 110, and a photo and etching process may be performed to form the light blocking layer 177, the gate electrode 124, the source electrode 173, the drain electrode 175, the pixel electrode 191, the common electrode 270, etc. Also, a semiconductor material layer may be formed, and a photo and etching process may be performed to form the semiconductor 131. Also, the buffer layer 111, the insulating layer 113, the gate insulating layer 120, the first interlayer insulating film 160, the second interlayer insulating film 180, etc. may be formed using an inorganic insulating material or an organic insulating material. Also, the light emitting layer 370 may be formed using a light emitting material.

[0105] After forming the common electrode 270, an encapsulation layer 400 may be formed over the entire substrate 110. At this time, a first inorganic encapsulation layer 410, an organic encapsulation layer 420, and a second inorganic encapsulation layer 430 may be formed in sequence.

[0106] As shown in FIG. 3, the partition 265 is formed on the encapsulation layer 400 using a photosensitive resin containing a color pigment such as a black pigment or a blue pigment. After the partition 265 is formed on the entire encapsulation layer 400, it is patterned to form the openings 267a, 267b, and 236c, and a curing process is performed. A first opening 267a overlapping the light emitting element ED of the first pixel PX1, a second opening 267b overlapping the light emitting element ED of the second pixel PX2, and a third opening 267c overlapping the light emitting element ED of the third pixel PX3 may be formed. The first opening 267a may overlap the pixel opening 351 of the first pixel PX1, the second opening 267b may overlap the pixel opening 351 of the second pixel PX2, and the third opening 267c may overlap the pixel opening 351 of the third pixel PX3.

[0107] The side of the partition 265 may have a tapered shape. That is, the side of the partition 265 may have a predetermined inclination angle with respect to the upper surface of the encapsulation layer 400. The width of the partition 265 may gradually become narrower as it becomes farther from the encapsulation layer 400. The width of the openings 267a, 267b, and 267c may gradually become wider as it becomes farther from the encapsulation layer 400.

[0108] As shown in FIG. 4, an inkjet printing process is performed to form a first color conversion layer 520a in the first opening 267a, a second color conversion layer 520b in the second opening 267b, and a transmissive layer 520c in the third opening 267c.

[0109] Different ink materials may be dropped into the first opening 267a, the second opening 267b, and the third opening 267c. An inkjet printing process may be performed using an inkjet printing device including a plurality of nozzles, and ink materials may be dropped into the plurality of openings 267a, 267b, and 267c while moving the nozzles. In some cases, an error may occur in the position of the nozzles, and the ink materials may be dropped outside the openings 267a, 267b, and 267c. In this case, ink may be dropped on the upper surface of the partition wall 265. The upper surface of the partition wall 265 may be treated to be hydrophobic. Therefore, the ink materials dropped on the upper surface of the partition wall 265 may move into the openings 267a, 267b, and 267c.

[0110] The first color conversion layer 520a can include a plurality of first quantum dots 521a and a plurality of scatterers 530. The second color conversion layer 520b can include a plurality of second quantum dots 521b and a plurality of scatterers 530. The transmissive layer 520c can include a plurality of scatterers 530.

[0111] 5, an inkjet printing process is performed to form a low refractive index layer 240 in the first opening 267a, the second opening 267b, and the third opening 267c. The low refractive index layer 240 may be formed using a material with a low refractive index. The low refractive index layer 240 may include an organic material or an inorganic material having a low refractive index of about 1.1 or more and about 1.3 or less.

[0112] The same ink material may be dropped into the first opening 267a, the second opening 267b, and the third opening 267c. The inkjet printing process may be performed using an inkjet printing device including a plurality of nozzles, and the ink material may be dropped into the plurality of openings 267a, 267b, and 267c while moving the nozzles. In the first opening 267a, the low refractive index layer 240 may be positioned on the first color conversion layer 520a and may cover the side of the partition wall 265. In the second opening 267b, the low refractive index layer 240 may be positioned on the second color conversion layer 520b and may cover the side of the partition wall 265. In the third opening 267c, the low refractive index layer 240 may be positioned on the transmissive layer 520c and may cover the side of the partition wall 265. The low refractive index layer 240 may not be formed on the upper surface of the partition wall 265.

[0113] The shapes of the low refractive index layer 240 in the first opening 267a, the second opening 267b, and the third opening 267c will be described with reference to Figures 6 to 9. Figure 6 shows a schematic planar shape of the openings, and Figure 7 shows a schematic cross-sectional shape of the openings. Figure 8 shows a schematic planar shape of the openings with the low refractive index layer formed therein, and Figure 9 shows a schematic cross-sectional shape of the openings with the low refractive index layer formed therein.

[0114] The opening may have a substantially rectangular planar shape as shown in Fig. 6. The opening may have a cross-sectional shape in which the side of the partition has a steep inclination as shown in Fig. 7.

[0115] As shown in Figures 8 and 9, the low refractive index layer can be formed not only on the bottom surface of the opening but also on the side surface SS of the partition wall. This is because the ink material for forming the low refractive index layer fills the corners and side surface SS of the partition wall, which have strong surface tension, due to a capillary phenomenon. As a result, the gradient of the low refractive index layer located on the side surface SS of the partition wall can be made lower than the gradient of the side surface of the partition wall.

[0116] By forming the low refractive index layer 240 by the inkjet printing method, the low refractive index layer 240 can also be positioned on the side of the partition wall 265. Therefore, light incident on the side of the partition wall 265 can be totally reflected by the low refractive index layer 240 and emitted to the front, thereby improving the front light emission efficiency of the display device.

[0117] As shown in FIG. 10, an inkjet printing process is performed to form a first color filter 230a in the first opening 267a, a second color filter 230b in the second opening 267b, and a third color filter 230c in the third opening 267c.

[0118] Different ink materials may be dropped into the first opening 267a, the second opening 267b, and the third opening 267c, respectively. The inkjet printing process may be performed using an inkjet printing device including a plurality of nozzles, and ink materials may be dropped into the plurality of openings 267a, 267b, and 267c while the nozzles are moved.

[0119] The first color filter 230a may be positioned on the low refractive index layer 240 within the first opening 267a. The bottom and side surfaces of the first color filter 230a may contact the low refractive index layer 240. The first color filter 230a may overlap the first color conversion layer 520a. The first color filter 230a may be formed using an ink material that transmits light of a first wavelength and absorbs light of the remaining wavelengths.

[0120] The second color filter 230b may be located on the low refractive index layer 240 within the second opening 267b. The bottom and side surfaces of the second color filter 230b may be in contact with the low refractive index layer 240. The second color filter 230b may overlap the second color conversion layer 520b. The second color filter 230b may be formed using an ink material that transmits light of the second wavelength and absorbs the remaining light.

[0121] The third color filter 230c may be positioned on the low refractive index layer 240 within the third opening 267c. The bottom and side surfaces of the third color filter 230c may be in contact with the low refractive index layer 240. The third color filter 230c may overlap the transmissive layer 520c. The third color filter 230c may be formed using an ink material that transmits light of a third wavelength and absorbs light of the remaining wavelengths.

[0122] In the display device according to an embodiment, the first color filter 230a, the second color filter 230b, and the third color filter 230c may not overlap each other. Also, the first color filter 230a, the second color filter 230b, and the third color filter 230c may not overlap the partition 265. The first color filter 230a, the second color filter 230b, and the third color filter 230c may not be formed on the upper surface of the partition 265. The first color filter 230a may be located only in the first opening 267a, and may not be located outside the first opening 267a. The second color filter 230b may be located only in the second opening 267b, and may not be located outside the second opening 267b. The third color filter 230c may be located only in the third opening 267c, and may not be located outside the third opening 267c. The partitions 265 may be positioned between the first color filter 230a and the second color filter 230b, between the second color filter 230b and the third color filter 230c, and between the third color filter 230c and the first color filter 230a. The partitions 265 may act as a light blocking member. The low refractive index layer 240 may be positioned between a side of the first color filter 230a and a side of the partition 265. The low refractive index layer 240 may be positioned between a side of the second color filter 230b and a side of the partition 265. The low refractive index layer 240 may be positioned between a side of the third color filter 230c and a side of the partition 265.

[0123] In the display device according to the embodiment, the low refractive index layer 240, the first color filter 230a, the second color filter 230b, and the third color filter 230c can be formed only in the openings 267a, 267b, and 267c using an inkjet printing process without using a photo process. Therefore, the material cost and process cost for forming the low refractive index layer 240, the first color filter 230a, the second color filter 230b, and the third color filter 230c can be reduced. For example, when the inkjet printing process is performed with the openings 267a, 267b, and 267c having an area ratio of 33% and the partition wall 265 having an area ratio of 67%, the material cost of the low refractive index layer 240 can be reduced by about 66%, and the material cost of the color filters 230a, 230b, and 230c can be reduced by about 90%.

[0124] In addition, by forming the first color filter 230a, the second color filter 230b, and the third color filter 230c so that they do not overlap each other, steps are not generated between adjacent pixels PX1, PX2, and PX3, and the upper surface of the display device according to one embodiment can be made flat.

[0125] 11, an overcoat layer 290 is formed on the first color filter 230a, the second color filter 230b, the third color filter 230c, and the barrier ribs 265. The overcoat layer 290 may be formed using an inorganic insulating material or an organic insulating material, and may be formed entirely on the substrate 110. The overcoat layer 290 may entirely cover and planarize the first color filter 230a, the second color filter 230b, the third color filter 230c, and the barrier ribs 265. At this time, the first color filter 230a, the second color filter 230b, and the third color filter 230c located under the overcoat layer 290 do not overlap with each other, so that the planarity of the upper surface of the overcoat layer 290 may be increased. Therefore, it is possible to prevent diffuse reflection from occurring on the surface of the display device according to an embodiment.

[0126] Next, a display device and a manufacturing method thereof according to an embodiment will be described with reference to FIG.

[0127] The display device and the manufacturing method thereof according to the embodiment shown in Fig. 12 are substantially the same as the display device and the manufacturing method thereof according to the embodiment shown in Fig. 1 to Fig. 11, and therefore the description of the same parts will be omitted. This embodiment differs from the above-mentioned embodiment in that a first capping layer and a second capping layer are further formed, which will be described below.

[0128] FIG. 12 is a cross-sectional view illustrating a display device according to an embodiment.

[0129] The display device according to the embodiment includes a substrate 110, a transistor TFT disposed on the substrate 110, and a light emitting element ED connected to the transistor TFT, as in the above-described embodiment. An encapsulation layer 400 may be disposed on the light emitting element ED, and a partition wall 265 including a first opening 267a, a second opening 267b, and a third opening 267c is disposed on the encapsulation layer 400. A first color conversion layer 520a, a low refractive index layer 240, and a first color filter 230a may be disposed in the first opening 267a. A second color conversion layer 520b, a low refractive index layer 240, and a second color filter 230b may be disposed in the second opening 267b. A transmission layer 520c, a low refractive index layer 240, and a third color filter 230c may be disposed in the third opening 267c.

[0130] In the above embodiment, the low refractive index layer 240 may be located directly above the first color conversion layer 520a, the second color conversion layer 520b, and the transmissive layer 520c, whereas in the present embodiment, the first capping layer 251 may be located on the first color conversion layer 520a, the second color conversion layer 520b, and the transmissive layer 520c, and the low refractive index layer 240 may be located on the first capping layer 251. The first capping layer 251 may be located in the first opening 267a, the second opening 267b, and the third opening 267c, and may not be located on the upper surface of the partition 265.

[0131] After forming the first color conversion layer 520a, the second color conversion layer 520b, and the transparent layer 520c, silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ) may be deposited and patterned to form the first capping layer 251. The first capping layer 251 may be formed of a single layer or a multi-layer structure of the above material.

[0132] In the first opening 267a, the first capping layer 251 may be located between the first color conversion layer 520a and the low refractive index layer 240. The first capping layer 251 may also be located on a side surface of the partition 265. In the first opening 267a, the low refractive index layer 240 does not have to be in contact with the partition 265. The first capping layer 251 may be located between the low refractive index layer 240 and the partition 265.

[0133] In the second opening 267b, the first capping layer 251 may be located between the second color conversion layer 520b and the low refractive index layer 240. The first capping layer 251 may also be located on a side surface of the partition 265. In the second opening 267b, the low refractive index layer 240 does not have to be in contact with the partition 265. The first capping layer 251 may be located between the low refractive index layer 240 and the partition 265.

[0134] In the third opening 267c, the first capping layer 251 may be positioned between the transmissive layer 520c and the low refractive index layer 240. The first capping layer 251 may also be positioned on a side surface of the partition 265. In the third opening 267c, the low refractive index layer 240 does not have to be in contact with the partition 265. The first capping layer 251 may be positioned between the low refractive index layer 240 and the partition 265.

[0135] In the above embodiment, the first color filter 230a, the second color filter 230b, and the third color filter 230c may be located directly above the low refractive index layer 240, whereas in the present embodiment, the second capping layer 253 may be located on the low refractive index layer 240, and the first color filter 230a, the second color filter 230b, and the third color filter 230c may be located on the second capping layer 253. The second capping layer 253 may be located in the first opening 267a, the second opening 267b, and the third opening 267c, and may not be located on the upper surface of the partition 265.

[0136] After forming the low refractive index layer 240, silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ) may be deposited and patterned to form the second capping layer 253. The second capping layer 253 may be formed of a single layer or a multi-layer structure of the above materials.

[0137] A second capping layer 253 may be positioned between the low refractive index layer 240 and the first color filter 230a in the first opening 267a. The second capping layer 253 may contact the bottom and side surfaces of the first color filter 230a.

[0138] A second capping layer 253 may be positioned between the low refractive index layer 240 and the second color filter 230b in the second opening 267b. The second capping layer 253 may contact the bottom and side surfaces of the second color filter 230b.

[0139] A second capping layer 253 may be positioned between the low refractive index layer 240 and the third color filter 230c in the third opening 267c. The second capping layer 253 may contact the bottom and side surfaces of the third color filter 230c.

[0140] In the display device according to an embodiment, a first capping layer 251 may be located under the low refractive index layer 240, and a second capping layer 253 may be located on the low refractive index layer 240. The low refractive index layer 240 may be protected by the first capping layer 251 and the second capping layer 253.

[0141] Next, a display device according to an embodiment will be described with reference to FIG.

[0142] The display device and the manufacturing method thereof according to the embodiment shown in Fig. 13 are substantially the same as the display device and the manufacturing method thereof according to the embodiment shown in Fig. 12, and therefore the description of the same parts will be omitted. This embodiment differs from the above-described embodiment in that a first capping layer and a second capping layer are formed on the entire surface, which will be described below.

[0143] FIG. 13 is a cross-sectional view illustrating a display device according to an embodiment.

[0144] The display device according to the embodiment includes a substrate 110, a transistor TFT disposed on the substrate 110, and a light emitting element ED connected to the transistor TFT, as in the above-described embodiment. An encapsulation layer 400 may be disposed on the light emitting element ED, and a partition wall 265 including a first opening 267a, a second opening 267b, and a third opening 267c is disposed on the encapsulation layer 400. A first color conversion layer 520a, a first capping layer 251, a low refractive index layer 240, a second capping layer 253, and a first color filter 230a may be disposed in the first opening 267a. A second color conversion layer 520b, a first capping layer 251, a low refractive index layer 240, a second capping layer 253, and a second color filter 230b may be disposed in the second opening 267b. The transmissive layer 520c, the first capping layer 251, the low refractive index layer 240, the second capping layer 253, and the third color filter 230c may be positioned within the third opening 267c.

[0145] In the above-described embodiment, the layer forming the first capping layer 251 may be patterned so that the first capping layer 251 is not located on the upper surface of the partition wall 265, whereas in the present embodiment, the first capping layer 251 may be formed over the entire surface. That is, a separate process of patterning the layer forming the first capping layer 251 does not need to be performed. In this case, the first capping layer 251 may be located on the upper surface of the partition wall 265.

[0146] In the above-described embodiment, the layer forming the second capping layer 253 may be patterned so that the second capping layer 253 is not located on the upper surface of the partition wall 265, whereas in the present embodiment, the second capping layer 253 may be formed over the entire surface. That is, a separate process of patterning the layer forming the second capping layer 253 may not be required. In this case, the second capping layer 253 may be located on the upper surface of the partition wall 265.

[0147] In the display device according to an embodiment, a first capping layer 251 and a second capping layer 253 may be positioned on the upper surface of the partition 265. A low refractive index layer 240 may be positioned between the first capping layer 251 and the second capping layer 253 in the first opening 267a, the second opening 267b, and the third opening 267c. The second capping layer 253 may be positioned directly above the first capping layer 251 on the upper surface of the partition 265. The first capping layer 251 and the second capping layer 253 may be made of the same material or different materials. The first capping layer 251 and the second capping layer 253 each have a thickness of about 4000 Å, and do not have a large effect on the flatness of the upper surface of the overcoat layer 290. Therefore, even if the first capping layer 251 and the second capping layer 253 are formed on the upper surface of the partition 265, the upper surface of the overcoat layer 290 may be formed flat. In the display device according to the embodiment, a process for patterning the first capping layer 251 and the second capping layer 253 is not separately performed, so that the process time and cost can be reduced.

[0148] Although the embodiments of the present disclosure have been described in detail above, the scope of the present disclosure is not limited thereto, and various modifications and improvements made by those skilled in the art using the basic concept of the present disclosure defined in the claims also fall within the scope of the present disclosure.

Claims

1. A substrate; a transistor located on the substrate; a light emitting device electrically connected to the transistor; a sealing layer located on the light-emitting element; a partition wall located on the sealing layer and including an opening portion overlapping the light emitting element; a color conversion layer, a low refractive index layer, and a color filter, which are stacked in sequence within the opening; A display device comprising:

2. The partition wall is a first opening overlapping the light emitting element of a first pixel; a second opening overlapping the light emitting element of a second pixel; a third opening overlapping the light emitting element of a third pixel; Including, The display device according to claim 1 .

3. a first color conversion layer, the low refractive index layer, and a first color filter are located within the first opening; a second color conversion layer, the low refractive index layer, and a second color filter are located within the second opening; a transmissive layer, the low refractive index layer, and a third color filter are located within the third opening; The display device according to claim 2 .

4. the low refractive index layer is located on the first color conversion layer, the second color conversion layer, and the transmissive layer; The low refractive index layer is located on a side surface of the partition wall. The display device according to claim 3 .

5. The low refractive index layer is not located on an upper surface of the partition wall. The display device according to claim 4.

6. the first color filter, the second color filter, and the third color filter do not overlap with each other; The display device according to claim 3 .

7. the first color filter, the second color filter, and the third color filter are not located on an upper surface of the partition wall; The display device according to claim 6.

8. a first capping layer and a second capping layer located within the first opening, the second opening, and the third opening; the first capping layer is located between the first color conversion layer and the low refractive index layer, between the second color conversion layer and the low refractive index layer, and between the transparent layer and the low refractive index layer; the second capping layer is located between the low refractive index layer and the first color filter, between the low refractive index layer and the second color filter, and between the low refractive index layer and the third color filter; The display device according to claim 3 .

9. the first capping layer and the second capping layer are located on an upper surface of the partition wall; The display device according to claim 8.

10. an overcoat layer disposed on the first color filter, the second color filter, the third color filter, and the partition wall; The display device according to claim 3 .

11. forming a transistor on a substrate and a light emitting device electrically connected to the transistor; forming an encapsulation layer on the light emitting device; forming a partition wall on the sealing layer; forming an opening overlapping the light emitting device by patterning the partition; forming a color conversion layer in the opening; forming a low refractive index layer within the opening; forming a color filter within the opening; A manufacturing method of a display device comprising the steps of:

12. The steps of forming the color conversion layer, forming the low refractive index layer, and forming the color filter are performed using an inkjet printing process. The method for manufacturing the display device according to claim 11 .

13. In the step of patterning the partition wall, a first opening overlapping the light emitting element of a first pixel; a second opening overlapping the light emitting element of a second pixel; forming a third opening overlapping the light emitting element of a third pixel; The method for manufacturing the display device according to claim 11 .

14. In the step of forming the color conversion layer, Dropping different ink substances into the first opening, the second opening, and the third opening; forming a first color conversion layer in the first opening; forming a second color conversion layer in the second opening; forming a transmissive layer within the third opening; The method for manufacturing the display device according to claim 13 .

15. In the step of forming the low refractive index layer, by dropping the same ink material into the first opening, the second opening, and the third opening; forming a low refractive index layer on each of the first color conversion layer, the second color conversion layer, and the transmissive layer; The method for manufacturing the display device according to claim 14 .

16. the low refractive index layer is located on a side surface of the partition wall, The low refractive index layer is not located on an upper surface of the partition wall. The method for manufacturing the display device according to claim 15 .

17. In the step of forming the color filter, Dropping different ink substances into the first opening, the second opening, and the third opening, forming a first color filter within the first opening; forming a second color filter within the second opening; forming a third color filter within the third opening; the first color filter, the second color filter, and the third color filter are located on the low refractive index layer; The method for manufacturing the display device according to claim 15 .

18. the first color filter, the second color filter, and the third color filter do not overlap with each other, the first color filter, the second color filter, and the third color filter are not located on an upper surface of the partition wall; The method for manufacturing the display device according to claim 17 .

19. Prior to the step of forming the low refractive index layer, forming a first capping layer on the first color conversion layer, the second color conversion layer, and the transmissive layer; After the step of forming the low refractive index layer, forming a second capping layer on the low refractive index layer; The method for manufacturing the display device according to claim 17 .

20. forming an overcoat layer on the first color filter, the second color filter, the third color filter, and the partition wall; The method for manufacturing the display device according to claim 17 .