Display substrate and display device

Abstract

The present disclosure relates to a display technology field, and provides a display substrate and a display device that can reduce the frame width of the display substrate and reduce the cost of the display substrate. The display substrate includes a plurality of conductive layers, each of which includes a plurality of data lines, a plurality of connecting lines, and a plurality of fan-out lines. The connecting lines span at least one data line and are insulated from the data line they span. The first fan-out line is electrically connected to the connecting line, and the second fan-out line is electrically connected to an end of the second data line that is close to the fan-out region. The first fan-out line includes a transfer line. The fan-out region includes a first fan-out region and a second fan-out region, and the transfer line is located in the second fan-out region. The transfer line is located on a different conductive layer from the plurality of second fan-out lines and spans at least one second fan-out line, so that the arrangement order of the ends of the plurality of fan-out lines that are farther from the display region in the first direction is the same as the arrangement order of the plurality of data lines in the first direction. The display substrate provided by the present disclosure can be used in a display device.

Description

Technical Field

[0001] (Cross-reference to related applications) This application claims priority based on the PCT international patent application with application number PCT / CN2022 / 089120 filed on April 25, 2022, and the Chinese patent application with application number 202210876068.0 filed on July 25, 2022, and all of its disclosure content is incorporated herein by reference.

[0002] This disclosure relates to the field of display technology, and particularly to display substrates and display devices.

Background Art

[0003] Currently, organic light-emitting diode (OLED) display devices are widely applied because they have features such as self-emission, fast response, high contrast, wide viewing angle, and can be fabricated on a flexible substrate.

[0004] An OLED display device includes a plurality of sub-pixels, each sub-pixel includes a pixel driving circuit and a light-emitting element, and drives the light-emitting element to emit light through the pixel driving circuit, thereby realizing display.

Summary of the Invention

Means for Solving the Problems

[0005] The objective of this disclosure is to provide a display substrate and a display device that can reduce the cost of the display substrate while narrowing the border of the display substrate.

[0006] In one embodiment, a display substrate is provided. The display substrate has a display area and a fan-out area. The fan-out area is adjacent to one edge of the display area. The display substrate comprises a base and a plurality of conductive layers. The plurality of conductive layers are located on the same side of the base. The plurality of conductive layers are installed in a stack. The plurality of conductive layers include a plurality of data lines, a plurality of connection lines, and a plurality of fan-out lines. The plurality of data lines are spaced apart along a first direction, and each of the plurality of data lines extends along a second direction. The second direction intersects the first direction. The plurality of data lines include a plurality of first data lines and a plurality of second data lines. The plurality of first data lines are located in two edge areas along the first direction of the display area, and the plurality of second data lines are located in a central area along the first direction of the display area. The first end of one connection line is located in the edge region along the first direction of the display area and is electrically connected to one first data line, and the second end of the connection line extends to a position close to the fan-out region in the central region of the display area. The connection line spans at least one data line and is insulated from the data line it spans. The second end of at least one connection line is located between two adjacent second data lines. Multiple fan-out lines are located in the fan-out region. Multiple fan-out lines include multiple first fan-out lines and multiple second fan-out lines. The first fan-out lines are electrically connected to the second end of the connection line, and the second fan-out lines are electrically connected to the end of the second data line closest to the fan-out region. The display board further has a bent region. The fan-out region includes a first fan-out region and a second fan-out region, the first fan-out region being closer to the display area than the second fan-out region, and the bent region being located between the first fan-out region and the second fan-out region. The first fan-out line includes a transfer line, which is located in the second fan-out region. Because the transfer line is located in a different conductive layer from the multiple second fan-out lines and spans at least one second fan-out line, the arrangement order along the first direction of the ends of the multiple fan-out lines that move away from the display region is the same as the arrangement order along the first direction of the multiple data lines.

[0007] In some embodiments, multiple connection lines are electrically connected in a one-to-one correspondence with multiple first data lines. Multiple second fan-out lines are electrically connected in a one-to-one correspondence with multiple second data lines.

[0008] In some embodiments, a plurality of first data lines include a plurality of first type first data lines and a plurality of second type first data lines. A plurality of second fanout lines include a plurality of first type second fanout lines and a plurality of second type second fanout lines. A plurality of first type first data lines are electrically connected to a plurality of connection lines in a one-to-one correspondence. A plurality of first type second fanout lines are electrically connected to a plurality of second data lines in a one-to-one correspondence. A plurality of second type second fanout lines are electrically connected to a plurality of second type first data lines in a one-to-one correspondence.

[0009] In some embodiments, the display board further comprises a plurality of subpixels. The plurality of subpixels are arranged in a plurality of columns along a first direction and in a plurality of rows along a second direction. A column of subpixels is electrically connected to a single data line. Two first data lines of type 1 are provided between two adjacent first data lines of type 2. One of the two first data lines of type 1 is electrically connected to a first subpixel in a column, and the first subpixel includes a subpixel that emits red light and a subpixel that emits blue light. The second data line is electrically connected to a subpixel in a column that emits green light.

[0010] In some embodiments, the first fan-out line further includes a first sub-fan-out line, a plurality of adapters, and a first signal transmission line. The first sub-fan-out line is electrically connected to the second end of the connecting line. The plurality of adapters include a first adapter located in a region close to the bend in the first fan-out area and a second adapter located in a region close to the bend in the second fan-out area. The first adapter is electrically connected to the end of the first sub-fan-out line away from the connecting line. The transmission line is electrically connected to the second adapter. The first signal transmission line passes through the bend and connects the first adapter and the second adapter.

[0011] In some embodiments, the centerline of the display board is located at the center along the first direction of the display board and is parallel to the base. The portion of the second fan-out line located in the first fan-out region is defined as the third sub-fan-out line. The third sub-fan-out line and the first sub-fan-out line are arranged along the first direction. For two adjacent fan-out lines among the third sub-fan-out line and the first sub-fan-out line, at least a portion of the line segment in the fan-out line away from the centerline curves toward the fan-out line closer to the centerline.

[0012] In some embodiments, the second fan-out region includes a first sub-fan-out region and a second sub-fan-out region, wherein the first sub-fan-out region is closer to the bending region than the second sub-fan-out region. At least a portion of the transfer line is located in the first sub-fan-out region. Multiple conductive layers It further comprises an isolation section. The isolation section is located in the first sub-fanout region and is situated between the transfer line and a plurality of second fanout lines.

[0013] In some embodiments, the first fan-out line further includes a second signal transmission line, which is connected between the second adapter and the transfer line. The orthographic projection of the base of the second signal transmission line is located between the orthographic projection of the base of the isolation section and the edge of the first sub-fan-out region on the side closer to the bending region.

[0014] In some embodiments, the second signal transmission line runs from one end close to the display area to the other end away from the display area. ,table Approaching the center line of the display board.

[0015] In some embodiments, Each of the fan-out lines described above is one Second signal transmission line including Of the two adjacent second signal transmission lines, at least a portion of the line segment in the second signal transmission line that is further away from the center line curves toward the second signal transmission line that is closer to the center line.

[0016] In some embodiments, the end of the transfer line that separates from the first sub-fanout line extends into a second sub-fanout region.

[0017] In some embodiments, the first fan-out line further includes a second sub-fan-out line. The second sub-fan-out line is located in a different conductive layer from the transfer line. An isolation section is located between the transfer line and the second sub-fan-out line. The end of the transfer line away from the first sub-fan-out line is located around the isolation section and is electrically connected to the second sub-fan-out line. The end of the second sub-fan-out line away from the transfer line extends into the second sub-fan-out region.

[0018] In some embodiments, the first connection point is defined as the location where the transfer line connects to the second sub-fanout line. The orthographic projection of the base of the transfer line near the first connection point and beyond the isolation section substantially overlaps with the orthographic projection of the base of the second sub-fanout line near the first connection point and beyond the isolation section.

[0019] In some embodiments, Each of the first fan-out lines includes a transfer line and a second sub-fan-out line electrically connected to the transfer line, with the point where the transfer line connects to the second sub-fan-out line being the first connection point. The portion of a transfer line that is close to the first connection point and extends beyond the isolation section is located on at least one side along the first direction of the isolation section. The portion of a transfer line that is close to the first connection point and extends beyond the isolation section and is located on the same side along the first direction of the isolation section is defined as a first extension. The multiple first extensions are arranged sequentially along the second direction, and in the second direction, the lengths of the multiple first extensions are , increase In addition, Reduce To reduce. Or, the length of multiple first extended portions is , decrease A little bit Ra increase Add.

[0020] In some embodiments, the orthographic projection at the base of the transfer line is U-shaped or nearly U-shaped, with the openings pointing towards the bending region. 。

[0021] In some embodiments, the plurality of conductive layers include at least one gate metal layer, a first source / drain metal layer, and a second source / drain metal layer. The first source / drain metal layer and the second source / drain metal layer are both located on the side away from the base of the at least one gate metal layer, and the first source / drain metal layer is closer to the base than the second source / drain metal layer. The first sub-fan-out line, the second sub-fan-out line, and the plurality of second fan-out lines are located on the at least one gate metal layer, the isolation part is located on the first source / drain metal layer, and the transfer line is located on the second source / drain metal layer.

[0022] In some embodiments, the isolation part includes at least one power signal line.

[0023] In some embodiments, the second fan-out region includes a first sub-fan-out region and a second sub-fan-out region. The first sub-fan-out region is closer to the bending region than the second sub-fan-out region. The transfer line is located in the second sub-fan-out region.

[0024] In some embodiments, the transfer line includes a first sub-transfer line and a second sub-transfer line. The first sub-transfer line is electrically connected to the first sub-fan-out line. The first sub-transfer line extends across at least one second fan-out line. The second sub-transfer line is electrically connected to the end of the first sub-transfer line away from the first sub-fan-out line. The orthographic projection of the base of the at least one second sub-transfer line is located between the orthographic projections of the bases of two adjacent second fan-out lines.

[0025] In some embodiments, the center line of the display substrate is located at the center along the first direction of the display substrate and is parallel to the base. The second sub-fan-out region includes two first regions, and the two first regions are located on both sides of the center line. At least one of the first regions includes a plurality of sub-regions, and the plurality of sub-regions include a first sub-region, a second sub-region, and a third sub-region. The first sub-region, the second sub-region, and the third sub-region are arranged in order along the direction from the edge on the side away from the center line of the first region to the center line. The end of the first sub-transfer line that is electrically connected to the first sub-fan-out line is located in at least one of the first sub-region, the second sub-region, and the third sub-region, and the second sub-transfer line is located in the first sub-region.

[0026] In some embodiments, the ends of the plurality of first sub-transfer lines that are electrically connected to the first sub-fan-out lines are located in different sub-regions of the first region.

[0027] In some embodiments, the ends of the plurality of first sub-transfer lines that are electrically connected to the first sub-fan-out lines are evenly distributed in the first sub-region, the second sub-region, and the third sub-region.

[0028] In some embodiments, the outer contour shape of the region where the orthographic projection of the bases of all the first sub-transfer lines in the first region is located is trapezoidal or triangular.

[0029] In some embodiments, the second sub-fan-out region includes a second region and a third region, and the second region is closer to the first sub-fan-out region than the third region. The length of the edge of the second region closer to the first sub-fan-out region is greater than the length of the edge of the second region away from the first sub-fan-out region. The first sub-transfer line extends along the first direction, and the second sub-transfer line extends along the second direction. At least one first sub-transfer line is located in the second region, and at least one second sub-transfer line extends from the second region to the third region.

[0030] In some embodiments, the distance between at least two adjacent first subtransfer lines gradually decreases along the direction from the first subfanout region to the second subfanout region.

[0031] In some embodiments, the first fan-out line further includes a second sub-fan-out line, the second sub-fan-out line located in a different conductive layer from the transfer line. The second sub-fan-out line is located in the second sub-fan-out region and is electrically connected to the end of the transfer line away from the first sub-fan-out line.

[0032] In some embodiments, the orthographic projection at the base of the transfer line is U-shaped or substantially U-shaped, with the opening facing the bending region. One end of the transfer line is electrically connected to a first sub-fanout line, and the other end of the transfer line is electrically connected to a second sub-fanout line.

[0033] In some embodiments, the multiple conductive layers include at least one gate metal layer, a first source-drain metal layer, and a second source-drain metal layer. Both the first and second source-drain metal layers are located away from the base of the at least one gate metal layer, and the first source-drain metal layer is closer to the base than the second source-drain metal layer. A first sub-fan-out line, a second sub-fan-out line, and a plurality of second fan-out lines are located on the at least one gate metal layer, and the transfer lines are located alternately on the first source-drain metal layer and the second source-drain metal layer.

[0034] In some embodiments, at least one gate metal layer includes a first gate metal layer and a second gate metal layer, wherein the first gate metal layer is closer to the base than the second gate metal layer. A plurality of first sub-fanout lines, a plurality of second sub-fanout lines, and a plurality of second fanout lines are located in the first and second gate metal layers. Any two adjacent fanout lines among the plurality of first sub-fanout lines and the plurality of second fanout lines are located in different gate metal layers. Any two adjacent fanout lines among the plurality of second sub-fanout lines and the plurality of second fanout lines are located in different gate metal layers.

[0035] In some embodiments, the plurality of conductive layers include a light-shielding metal layer, at least one active layer, at least one source / drain metal layer, a plurality of gate metal layers, at least one transparent wire layer, and an anode layer. The transfer line is located in at least one of the following layers: the light-shielding metal layer, at least one active layer, at least one source / drain metal layer, one gate metal layer from the plurality of gate metal layers, at least one transparent wire layer, and an anode layer. The plurality of second fan-out lines are located in at least one of the plurality of gate metal layers.

[0036] In another embodiment, a display device is provided, comprising the display board described above.

[0037] The display substrate and display device provided by this disclosure have the following beneficial effects.

[0038] In the embodiments of this disclosure, by positioning the second end of the connecting wire within the central region and extending it to a position close to the fan-out region within the central region, multiple first fan-out wires can be electrically connected to the second end of the connecting wire at a position close to the center line of the display board. In this way, the space occupied along the second direction when multiple fan-out wires converge in the fan-out region and extend away from the display region can be reduced, thereby reducing the width of the fan-out region along the second direction. That is, the width of the side frame (e.g., the bottom frame) of the display panel can be reduced, thereby enabling the display panel to have an ultra-narrow bottom frame and improving the visual effect of the display panel.

[0039] Furthermore, by adopting the above installation method, the first data line at the rounded corner position can be electrically connected to the first fan-out line via a connecting line, thus avoiding the first fan-out line occupying space in the fan-out area near the rounded corner position. This allows for a reduction in the frame width at the rounded corner, enabling the display panel to achieve an extra-large rounded corner. This improves the visual effect of the display panel, while also improving the ease of installation between the external frame and the display panel, reducing the stress on the frame during installation, decreasing the possibility of wrinkles or cracks in the frame due to installation stress, improving the ease of processing the display device, and increasing the yield of the display device.

[0040] Furthermore, the first fan-out line includes a transfer line, and by arranging the transfer line to span at least one second fan-out line, the transfer line can be adjusted along the first direction of the ends of the multiple first fan-out lines that are away from the display area (i.e., the ends that are electrically connected to the drive ICs of the first fan-out lines), thereby adjusting the arrangement order along the first direction of the ends of the multiple fan-out lines that are away from the display area.

[0041] By installing the components in this manner, the arrangement order of the output terminals of the driver IC (Integrated Circuit, abbreviated as IC) along the first direction, the arrangement order of the ends of the multiple fan-out lines that move away from the display area along the first direction, and the arrangement order of the multiple data lines along the first direction are all the same. As a result, the output terminals of the driver IC can sequentially provide drive signals to multiple data lines, meaning that the driver IC can sequentially drive the illumination of multiple rows of subpixels. This eliminates the need to redevelop the driver IC in order to achieve a narrow bezel on the display board, thereby reducing the cost of the display board.

[0042] Furthermore, placing the transfer lines in the second fan-out region avoids them occupying space in the first fan-out region, thus reducing the width of the first fan-out region along the second direction. Since the first fan-out region is located closer to the display area of ​​the curved region, reducing the width of the first fan-out region along the second direction allows for a further reduction in the width of the side frame (e.g., the bottom frame) of the display board, thereby improving the visual effect of the display panel.

[0043] In another embodiment, a display device is provided, comprising a display board as described above.

[0044] The display device provided by the embodiments of this disclosure, having the above-described display substrate, has all the above-described beneficial effects, which will not be repeated here. [Brief explanation of the drawing]

[0045] To provide a clearer explanation of the technical concepts related to this disclosure, the drawings used in some embodiments of this disclosure will be briefly described below. However, it will be clear that the drawings in the following description represent only a portion of the drawings used in some embodiments of this disclosure. Those skilled in the art can obtain other drawings based on these. Furthermore, the drawings in the following description can be considered schematic diagrams and do not limit the actual dimensions of the products, the actual flow of the methods, the actual timing of the signals, etc., related to the embodiments of this disclosure. [Figure 1]This is a structural diagram of a display device according to several embodiments. [Figure 2] This is a structural diagram of a display panel according to several embodiments. [Figure 3] This is a structural diagram of a display board according to several embodiments. [Figure 4] This is a schematic diagram of the connection structure between the light-emitting element and the pixel driving circuit in a subpixel. [Figure 5] This is a structural diagram of a display substrate according to some other embodiments of the present disclosure. [Figure 6] This is also a structural diagram of a display board according to several other embodiments. [Figure 7] This is also a structural diagram of a display board according to several other embodiments. [Figure 8] This is also a structural diagram of a display board according to several other embodiments. [Figure 9] This is also a structural diagram of a display board according to several other embodiments. [Figure 10] This is also a structural diagram of a display board according to several other embodiments. [Figure 11] These are partial structural diagrams of a display board according to several embodiments. [Figure 12] This is a magnified view of area 1C in Figure 7. [Figure 13] This is also a structural diagram of a display board according to several other embodiments. [Figure 14] This is also a structural diagram of a display board according to several other embodiments. [Figure 15] This is a magnified view of area 1A in Figure 13. [Figure 16] This is a magnified view of area 2A in Figure 13. [Figure 17] This is a magnified view of area 3A in Figure 13. [Figure 18] This is a magnified view of area 4A in Figure 13. [Figure 19] This is a magnified view of area 5A in Figure 13. [Figure 20] This is a magnified view of area 6A in Figure 13. [Figure 21] This is a magnified view of area 7A in Figure 13. [Figure 22] This is also a structural diagram of a display board according to several other embodiments. [Figure 23] This is a partial structural diagram of a display board according to several other embodiments. [Figure 24] This is a magnified view of area 1B in Figure 23. [Figure 25] This is a magnified view of area 2B in Figure 23. [Figure 26] This is a magnified view of area 3B in Figure 23. [Figure 27] This is also a partial structural diagram of a display board relating to several other embodiments. [Figure 28] This is a magnified view of area 1D in Figure 27. [Figure 29] This is also a partial structural diagram of a display board relating to several other embodiments. [Figure 30] This is also a partial structural diagram of a display board relating to several other embodiments. [Figure 31] This is also a partial structural diagram of a display board relating to several other embodiments. [Figure 32] This is also a partial structural diagram of a display board relating to several other embodiments. [Figure 33] This is a magnified view of area 1E in Figure 32. [Figure 34] This is a magnified view of area 2D in Figure 27. [Figure 35] This is a magnified view of area 1F in Figure 34. [Figure 36] This is a magnified view of area 2F in Figure 34. [Figure 37] This is a magnified view of a 3D region in Figure 27. [Figure 38] This is a magnified view of area 4D in Figure 27. [Figure 39] This is also a partial structural diagram of a display board relating to several other embodiments. [Figure 40] This is a magnified view of area 3F in Figure 34. [Figure 41] This is also a partial structural diagram of a display board relating to several other embodiments. [Figure 42]This is a magnified view of area 4B in Figure 23. [Figure 43] This is a magnified view of area 5B in Figure 23. [Figure 44] This is a structural diagram of a transfer line according to several embodiments. [Figure 45] This is also a partial structural diagram of a display board relating to several other embodiments. [Figure 46] This is also a partial structural diagram of a display board relating to several other embodiments. [Figure 47] This is a magnified view of area 1H in Figure 46. [Figure 48] This is a magnified view of area 2H in Figure 46. [Figure 49] This is also a partial structural diagram of a display board relating to several other embodiments. [Figure 50] This is a magnified view of area 3H in Figure 49. [Figure 51] This is also a partial structural diagram of a display board relating to several other embodiments. [Figure 52] This is also a partial structural diagram of a display board relating to several other embodiments. [Figure 53] This is also a partial structural diagram of a display board relating to several other embodiments. [Figure 54] This is also a partial structural diagram of a display board relating to several other embodiments. [Figure 55] This is also a partial structural diagram of a display board relating to several other embodiments. [Figure 56] This is also a partial structural diagram of a display board relating to several other embodiments. [Figure 57] This is also a partial structural diagram of a display board relating to several other embodiments. [Figure 58] This is also a partial structural diagram of a display board relating to several other embodiments. [Figure 59] This is also a partial structural diagram of a display board relating to several other embodiments. [Figure 60] This is a magnified view of area 4H in Figure 59. [Modes for carrying out the invention]

[0046] Hereinafter, several embodiments of this disclosure will be clearly and completely described with reference to the drawings. Of course, the embodiments described herein are only a selection of the embodiments of this disclosure, not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this disclosure shall be included within the scope of this disclosure.

[0047] Unless otherwise indicated in the context, the term “comprise” and other forms, such as the third-person singular “comprises” and the present participle “comprising,” should be interpreted in an open, inclusive sense, that is, “including, but not limited to.”

[0048] In the description of this specification, terms such as “one embodiment,” “some embodiments,” “exemplary embodiments,” “example,” “specific example,” or “some examples” are intended to indicate that a particular feature, structure, material, or property related to this embodiment or such example is included in at least one embodiment or example of this disclosure. The general expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, any particular feature, structure, material, or property described may be included in any one or more embodiments or examples in any suitable manner.

[0049] In the following, the terms “first” and “second” are merely for illustrative purposes and should not be understood as indicating or implying relative importance or the quantity of the indicated technical features. Accordingly, features defined as “first” and “second” may explicitly or implicitly include one or more such features. In the description of the embodiments of this disclosure, unless otherwise specified, “multiple” means two or more.

[0050] The term "connection" and related expressions may be used when describing certain embodiments. For example, the term "connection" may be used when describing certain embodiments to indicate that two or more components have direct physical or electrical contact with one another.

[0051] "At least one of A, B, and C" has the same meaning as "at least one of A, B, or C," and both include combinations of A, B, and C such as A only, B only, C only, a combination of A and B, a combination of A and C, a combination of B and C, and a combination of A, B, and C.

[0052] In this specification, "to apply to..." or "to be arranged to..." means an open and inclusive language.

[0053] As used herein, “parallel,” “perpendicular,” and “equal” include the conditions described and conditions that approximate the conditions described, the range of which the approximate conditions are within an acceptable range of deviation, the acceptable range of deviation being determined in consideration of the errors (i.e., limitations of the measuring system) associated with the measurement and the measurement of a particular quantity under consideration by a person skilled in the art. For example, “parallel” includes true parallel and approximate parallel, where the acceptable range of deviation for approximate parallel is, for example, a deviation of 5° or less; and “perpendicular” includes true perpendicular and approximate perpendicular, where the acceptable range of deviation for approximate perpendicular may be, for example, a deviation of 5° or less. “Equal” includes absolutely equal and approximately equal, where within the acceptable range of deviation for approximately equal, for example, the difference between the two equals is 5% or less of either.

[0054] When a layer or element is mentioned as being on another layer or substrate, it is understood that the layer or element may be directly on the other layer or substrate, or there may be an intermediate layer between the layer or element and the other layer or substrate.

[0055] In the embodiments of this disclosure, it is understood that the “electrical connection” may be a direct connection or may be achieved through other wiring (e.g., signal transmission lines).

[0056] In the embodiments of this disclosure, it is understood that "two conductive wires adjacent to each other" may mean that two conductive wires are located in the same conductive layer and are adjacent to each other, or that two conductive wires are located in different conductive layers and their orthographic projections on the base of the two conductive wires are adjacent.

[0057] Figure 1 is a structural diagram of a display device according to several embodiments.

[0058] As shown in Figure 1, in some embodiments of the present disclosure, a display board 200 is provided. It is understood that the display device 200 is a product having an image display function. Exemplarily, the display device 200 may be used to display still images such as pictures or photographs. The display device 200 may be used to display moving images such as videos or game screens.

[0059] In some examples, the display device 200 may be a laptop computer, mobile phone, wireless device, personal data assistant (PDA), handheld or portable computer, GPS receiver / navigator, camera, MP4 video player, video camera, game console, wristwatch, clock, calculator, television monitor, flat panel display, computer monitor, car display (e.g., speed / distance meter display), navigator, cockpit controller and / or display, camera view display (e.g., rearview camera display in a vehicle), electrophotography, electronic sign or sign, projector, packaging and aesthetic structures (e.g., display of an image of a piece of jewelry), etc.

[0060] The display device 200 includes a display panel 210. In some examples, the display panel 210 is an organic light-emitting diode display (OLED) or a quantum dot light-emitting diode display (QLED).

[0061] Furthermore, the display device 200 may also be equipped with an under-screen camera and an under-screen fingerprint recognition sensor, thereby enabling the display device 200 to perform various different functions such as taking photos, recording videos, fingerprint recognition, or facial recognition.

[0062] Figure 2 shows the structure of a display panel according to several embodiments.

[0063] The display panel 210 includes the display substrate 100. Exemplarily, as shown in Figure 2, the display panel 210 may further include other functional film layers 211 located on the display side of the display substrate 100, such as a touch control function layer, an anti-reflective layer, an anti-fingerprint layer, a hardening layer, and a package cover, thereby enabling the display panel 210 to realize different functions.

[0064] The embodiments of this disclosure do not further limit the other functional film layers 211 of the display panel 210. The display substrate 100 will be described below with reference to an example.

[0065] Figure 3 shows the structure of a display board according to several embodiments.

[0066] In some examples, as shown in Figure 3, the display board 100 comprises a plurality of subpixels 101. The plurality of subpixels 101 are arranged in a plurality of columns along a first direction X and in a plurality of rows along a second direction Y. In some examples, the first direction X intersects with the second direction Y. Exemplarily, the first direction X is perpendicular to the second direction Y. In some examples, the first direction X is horizontal and the second direction Y is vertical.

[0067] It is understood that the subpixels 101 are the smallest units for the display board 100 to display an image. Each subpixel 101 may display a single color such as red, green, or blue. The display board 100 may have multiple red subpixels, multiple green subpixels, and multiple blue subpixels. By adjusting the brightness (grayscale) of subpixels 101 of different colors, red, green, and blue light of different intensities can be obtained. By superimposing at least two of the red, green, and blue light of different intensities, more colors of light can be displayed, thus realizing full-color display on the display board 100.

[0068] As shown in Figure 3, it is understood that the display board 100 has a display area AA and a fanout area BB, with the fanout area BB adjacent to one edge of the display area AA. Here, the display area AA is used to display image information, and a plurality of subpixels 101 are located in the display area AA of the display board 100.

[0069] Furthermore, the fan-out area BB is adjacent to one edge of the display area AA. That is, the edge of the fan-out area BB closer to the display area AA overlaps with the edge of the display area AA closer to the fan-out area BB. In the attached drawings of this disclosure, taking Figure 3 as an example, the edges of the fan-out area BB and the edges of the display area AA are separated from each other, but this is simply to easily show the display area AA and the fan-out area BB, and does not further limit the display area AA and the fan-out area BB.

[0070] In some examples, as shown in Figure 3, the fan-out region BB is located on one side of the display region AA along the second direction Y.

[0071] In some examples, as shown in Figure 3, the fan-out region BB is adjacent to the lower edge of the display region AA. That is, the fan-out region BB is located below the display region AA along the second direction Y. Exemplarily, when the display device 200 is used perpendicular or nearly perpendicular to the ground, the fan-out region BB is closer to the ground relative to the display region AA.

[0072] In some examples, each subpixel 101 includes a light-emitting element 300 and a pixel driving circuit, the pixel driving circuit being electrically connected to the light-emitting element 300 and used to drive the light emission of the light-emitting element 300.

[0073] Figure 4 is a schematic diagram of the connection structure between the light-emitting element and the pixel driving circuit in a subpixel.

[0074] In some examples, as shown in Figure 4, the display substrate 100 comprises a base 102 and a plurality of conductive layers 103. The plurality of conductive layers 103 are located on the same side of the base 102, and the plurality of conductive layers 103 are installed in a stacked manner.

[0075] In some examples, the base 102 is made of a flexible material, allowing the display substrate 100 to be curved, thereby enabling the display panel 210 to implement functions such as curved display, folding display, or scrolling. In some other examples, the base 102 is made of a rigid material.

[0076] For example, the material of base 102 may be any of the following: polyimide (PI), polycarbonate (PC), or polyvinyl chloride (PVC).

[0077] In some examples, insulating layers (e.g., gate insulating layer and buffer layer, passivation layer, organic layer, etc.) may be provided between multiple conductive layers 103, serving to electrically isolate two adjacent conductive layers 103.

[0078] Exemplary, the pixel driving circuit is provided within a plurality of conductive layers 103. In some examples, as shown in Figure 4, the plurality of conductive layers 103 include, in order away from the base 102, an active layer 1031, a first gate metal layer Gate1, a second gate metal layer Gate2, a first source / drain metal layer SD1, and a second source / drain metal layer SD2, and so on.

[0079] The pixel driving circuit includes a plurality of thin-film transistors (TFTs) and at least one capacitor. Exemplarily, the active layer 1031 and the first gate metal layer Gate1 may be used to form some of the plurality of thin-film transistors (one or more). The active layer 1031 and the second gate metal layer Gate2 may be used to form some of the other thin-film transistors (one or more). The first gate metal layer Gate1 and the second gate metal layer Gate2 may be used to form at least one capacitor.

[0080] The number of active layers 1031 is not limited. For example, in some embodiments of this disclosure, only one active layer 1031 may be included, and the material of the active layer 1031 may include a metal oxide or low-temperature polysilicon. Alternatively, in some embodiments of this disclosure, two active layers 1031 may be further included, where the material of one active layer 1031 includes a metal oxide and the material of the other active layer 1031 includes low-temperature polysilicon.

[0081] In some examples, the multiple conductive layers 103 may further include a third gate metal layer (not shown). Exemplarily, the first gate metal layer Gate1, the second gate metal layer Gate2, the third gate metal layer, the first source / drain metal layer SD1, and the second source / drain metal layer SD2 may be stacked in order along the direction away from the base 102.

[0082] As can be seen from the above, the display board 100 further includes light-emitting elements 300, and the pixel driving circuit is electrically connected to the light-emitting elements 300. The light-emitting elements 300 will now be explained with an example, referring to Figure 4.

[0083] In some examples, the light-emitting element 300 is located on the side of the plurality of conductive layers 103 away from the base 102. Exemplarily, the light-emitting element 300 is provided in order away from the base 102, with an anode layer AND and an emissive layer EML. part , and includes cathode layer CTD.

[0084] In some examples, it is understood that the EML (Emitting-Mining Layer) includes multiple spaced-apart active light-emitting sections, which are used to emit light. Exemplarily, the active light-emitting sections include electroluminescent materials. Electroluminescence is understood to refer to the phenomenon in which organic semiconductor materials, under the influence of an electric field, form excitons through carrier injection, transport, and electron-hole coupling, and subsequently emit light through radiative recombination.

[0085] It is understood that among multiple active light-emitting parts, some are used to emit red light, some are used to emit green light, and some are used to emit blue light. Exemplarily, different electroluminescent materials may be selected, thereby causing the active light-emitting parts to emit light of different colors. It is understood that the number of active light-emitting parts emitting red light, green light, and blue light may be the same or different.

[0086] For example, an effective light-emitting unit that emits red light, an effective light-emitting unit that emits green light, and an effective light-emitting unit that emits blue light may be arranged in a mixed manner. By controlling the light emission intensity of the different effective light-emitting units, it is possible to obtain red light, green light, and blue light of different intensities. By mixing red light, green light, and blue light of different intensities, a color image can be displayed on the display board 100.

[0087] It is understood that a pixel driving circuit may drive the emission of light from the light-emitting layer (EML). In some examples, one pixel driving circuit is electrically connected to one active light-emitting section via an anode layer AND, so that each pixel driving circuit can supply a drive current to each active light-emitting section via the anode layer AND, that is, to make multiple active light-emitting sections emit light independently, reduce mutual interference between multiple active light-emitting sections, and improve the display effect of the display substrate 100. It is understood that the luminescence brightness of the active light-emitting section may be adjusted by adjusting the magnitude of the drive current supplied to the active light-emitting section by the pixel driving circuit.

[0088] In some examples, the anode layer AND is a metallic material such as copper or silver. The cathode layer CTD is a transparent material such as transparent indium tin oxide (ITO) or transparent indium zinc oxide (IZO). Therefore, the light rays emitted from the active light-emitting part can be emitted through the cathode layer CTD, meaning that in this case, the display substrate 100 is a top-emission display substrate.

[0089] In some other examples, the anode layer AND is a transparent material such as ITO or IZO, and the cathode layer CTD is a metallic material such as copper or silver, so that the light rays emitted from the active light-emitting part can be emitted through the anode layer AND, i.e., in this case the display substrate 100 is a bottom emission display substrate.

[0090] In some other examples, since both the anode layer AND and the cathode layer CTD are made of transparent materials such as ITO or IZO, the light rays emitted from the effective light-emitting section can be emitted through the anode layer AND and the cathode layer CTD; in other words, in this case, the display substrate 100 is a double-sided light-emitting display substrate.

[0091] In some examples, considering the work function, the anode layer AND can supply more holes if the material of the anode layer AND includes ITO or an ITO-Ag-ITO stack. The cathode layer CTD can supply more electrons if the material of the cathode layer CTD includes MgAg. The cathode layer CTD is very thin and light-transmitting, thereby enabling the display substrate 100 to achieve top emission.

[0092] In some examples, along the direction from the anode layer AND to the active light-emitting section, at least one of the following is provided between the anode layer AND and the active light-emitting section: a hole injection layer (HIL), a hole transport layer (HTL), and an electron blocking layer (EBL). Along the direction from the cathode layer CTD to the active light-emitting section, at least one of the following is provided between the cathode layer CTD and the active light-emitting section: an electron injection layer (EIL), an electron transport layer (ETL), and a hole blocking layer (HBL). The above installation method improves the light emission reliability of the active light-emitting section.

[0093] Figure 5 shows the structure of a display board according to several other embodiments.

[0094] In some examples, as shown in Figure 5, the display substrate 100 further comprises a package layer 104. The package layer 104 is located on the side of the light-emitting element 300 away from the base 102 and may cover the light-emitting element 300. By covering the light-emitting element 300, it prevents water vapor and oxygen gas from the external environment from entering the light-emitting element 300 and protects the light-emitting element 300.

[0095] Figure 6 is a structural diagram of a display board according to several other embodiments.

[0096] In some examples, as shown in Figure 6, the multiple conductive layers 103 further include multiple data lines 110 and multiple fan-out lines 130 in addition to the pixel driving circuit. It is understood that the multiple data lines 110 may be located in display area AA and electrically connected to the multiple pixel driving circuit, and by transporting drive signals to the pixel driving circuit, the pixel driving circuit may drive the emission of light from the light-emitting element 300 to realize different grayscale displays. The multiple fan-out lines 130 are located in fan-out area BB and electrically connected in a one-to-one correspondence with the multiple data lines 110.

[0097] For example, as shown in Figure 6, the multiple data lines 110 are spaced apart along the first direction X, and all of the multiple data lines 110 extend along the second direction Y. The second direction Y intersects the first direction X, and both the first direction X and the second direction Y may be parallel to the base 102.

[0098] In some examples, the first direction X is perpendicular or nearly perpendicular to the second direction Y. For example, as shown in Figure 6, the first direction X is horizontal and the second direction Y is vertical.

[0099] As can be seen from the above, as shown in Figure 3, the multiple subpixels 101 are arranged in multiple columns along the first direction X and in multiple rows along the second direction Y. That is, the pixel driving circuits in the multiple subpixels 101 can be arranged in an array of multiple rows and multiple columns along the first direction X and the second direction Y. As shown in Figure 6, the multiple data lines 110 extend along the second direction Y, so that one data line 110 may be electrically connected to a pixel driving circuit in a single column of subpixels 101 arranged along the second direction Y.

[0100] In some examples, the spacing distances along the first direction X of multiple data lines 110 are the same or approximately the same.

[0101] As shown in Figure 6, since the fan-out region BB is adjacent to one edge of the display region AA along the second direction Y, it is understood that the multiple data lines 110 may be provided so as to extend along the second direction Y, and the multiple data lines 110 may be electrically connected in a one-to-one correspondence with the multiple fan-out lines 130 located within the fan-out region BB.

[0102] Exemplary, as shown in Figure 6, multiple fan-out lines 130 located within the fan-out region BB gradually converge and extend toward the side of the fan-out region BB away from the display region AA, facilitating electrical connection between the multiple fan-out lines 130 and a drive chip (integrated circuit, abbreviated as IC) outside the display board 100. It is understood that the drive IC may input signals to each pixel drive circuit via the multiple fan-out lines 130 and the multiple data lines 110.

[0103] In some examples, the fan-out lines 130 may be electrically connected to the drive IC by extending the side of the fan-out lines 130 away from the display area AA to the edge of the fan-out area BB away from the display area AA.

[0104] However, the above implementation method increases the occupied space along the second direction Y of the multiple fan-out lines 130, thereby increasing the width of the fan-out region BB, that is, increasing the width of the side frame (for example, the lower frame) of the display panel 210, which is disadvantageous for realizing a narrow bezel for the display panel 210 and affects the visual effect of the display panel 210.

[0105] Figure 7 is a structural diagram of a display board according to several other embodiments. Figure 8 is a structural diagram of a display board according to several other embodiments.

[0106] In order to reduce the width of the side frame (e.g., the bottom frame) of the display panel 210, a display substrate 100 is provided in some embodiments of the present disclosure, as shown in Figure 7.

[0107] The display board 100 comprises a display area AA and a fan-out area BB. The fan-out area BB is adjacent to one edge of the display area AA. The display board 100 comprises a base 102 and a plurality of conductive layers 103. The plurality of conductive layers 103 are located on the same side of the base 102. The plurality of conductive layers 103 are stacked and installed. The plurality of conductive layers 103 contain a plurality of data lines 110. The plurality of data lines 110 are spaced apart along a first direction X, and all of the plurality of data lines 110 extend along a second direction Y. The second direction Y intersects with the first direction X.

[0108] The above embodiments of this disclosure have already been described with examples for the display area AA, fan-out area BB, base 102, multiple conductive layers 103, and multiple data lines 110, and will not be repeated here. Below, with reference to Figures 7 and 8, the display substrate 100 provided by the embodiments of this disclosure will be described with examples.

[0109] In some examples, as shown in Figure 7, the multiple data lines 110 include multiple first data lines 111 and multiple second data lines 112. The multiple first data lines 111 are located in two edge regions AA1 along the first direction X of the display region AA, and the multiple second data lines 112 are located in the central region AA2 along the first direction X of the display region AA.

[0110] Exemplary, as shown in Figures 7 and 8, there are two edge regions AA1, which are located on both sides of the display substrate 100 along the first direction X. The central region AA2 is located between the two edge regions AA1 along the first direction X.

[0111] For example, the number of first data lines 111 and second data lines 112 may be the same or different. Also, the number of first data lines 111 located within the two edge regions AA1 may be the same or different.

[0112] In each embodiment of this disclosure, the first data line 111 and the second data line 112 are used solely to distinguish between the data line 110 located within the edge region AA1 and the central region AA2, and the data line 110 is not further limited.

[0113] Exemplary, along a first direction X, the widths of two edge regions AA1 of the display region AA are the same or approximately the same. In some examples, as shown in Figure 7, the display region AA includes a rounded corner, i.e., two adjacent edges of the display region AA are connected in an arc or approximately arc. The rounded corner is located within the edge region AA1 of the display region AA. Exemplary, the width of the edge region AA1 in the first direction X may be greater than or equal to the width of the rounded corner in the first direction X.

[0114] Exemplary, multiple first data lines 111 and multiple second data lines 112 are located in the same conductive layer 103. In some examples, multiple first data lines 111 and multiple second data lines 112 are both located in the first source-drain metal layer SD1. In some other examples, multiple first data lines 111 and multiple second data lines 112 are both located in the second source-drain metal layer SD2. In some other examples, multiple first data lines 111 and multiple second data lines 112 may be located in conductive layers 103 other than the first source-drain metal layer SD1 and the second source-drain metal layer SD2.

[0115] As shown in Figures 7 and 8, the plurality of conductive layers 103 further include a plurality of connecting lines 120. The first end of one connecting line 120 is located in the edge region AA1 of the display region AA and is electrically connected to one first data line 111. The second end of the connecting line 120 extends to a position close to the fan-out region BB in the central region AA2 of the display region AA.

[0116] As an example, as shown in Figures 7 and 8, the second end of any of the multiple connecting lines 120 extends to the central area AA2 of the display area AA.

[0117] As can be seen from the above, the edge of the display area AA closest to the fan-out area BB overlaps with the edge of the fan-out area BB closest to the display area AA. In some examples, the second end of the connecting line 120 may extend to the boundary between the central area AA2 and the fan-out area BB. In some other examples, there may be a gap between the second end of the connecting line 120 and the boundary between the central area AA2 and the fan-out area BB.

[0118] As shown in Figures 7 and 8, the connecting line 120 spans at least one data line 110 (e.g., a first data line 111 and / or a second data line 112) and is insulated from the data line 110 it spans.

[0119] Since multiple data lines 110 are spaced apart along the first direction, it is understood that the second end of a connecting line 120 must span at least one data line 110 when it extends to a position close to the fan-out area BB of the central area AA2. Exemplarily, at least one connecting line 120 may span both the first data line 111 and the second data line 112.

[0120] It is understood that the connection line 120 spanning at least one data line 110 means that the orthographic projection of the connection line 120 on the base 102 intersects with the orthographic projection of at least one data line 110 on the base 102.

[0121] In some examples, the connection line 120 and the data line 110 can be isolated from the data line 110 by being located on different conductive layers 103.

[0122] For example, data line 110 is located in the first source / drain metal layer SD1, and connection line 120 is located in the second source / drain metal layer SD2. Alternatively, data line 110 is located in the second source / drain metal layer SD2, and connection line 120 is located in the second gate metal layer Gate2.

[0123] Exemplary, if the connection line 120 and the data line 110 are located in different conductive layers 103, the first end of the connection line 120 may be electrically connected to the first data line 111 via a transfer hole. It is understood that the transfer hole may penetrate the insulating film layer between two adjacent conductive layers 103 along a direction perpendicular or substantially perpendicular to the base 102, thereby electrically connecting different conductive layers 103, i.e., conductive wiring located in different conductive layers 103 (e.g., connection line 120 and data line 110) may be electrically connected. Exemplary, conductive wiring located in two non-adjacent conductive layers 103 may be electrically connected via multiple transfer holes penetrating different insulating film layers. For illustrative purposes, and to facilitate explanation, a transfer hole in which conductive wiring in the first source-drain metal layer SD1 is electrically connected to conductive wiring in the second source-drain metal layer SD2 may be called a PLN hole, and a transfer hole in which conductive wiring in the first gate metal layer Gate1 is electrically connected to conductive wiring in the second gate metal layer Gate2 may be called an ILD hole.

[0124] That is, if the first data line 111 is located in the first source / drain metal layer SD1 and the connecting line 120 is located in the second source / drain metal layer SD2, the first end of the connecting line 120 becomes electrically connectable to the first data line 111 via a PLN hole. If the first data line 111 is located in the second source / drain metal layer SD2 and the connecting line 120 is located in the second gate metal layer Gate2, the first end of the connecting line 120 is first electrically connected to the conductive wiring in the first gate metal layer Gate1 via an ILD hole, and then electrically connects the conductive wiring in the first gate metal layer Gate1 to the first data line 111 in the second source / drain metal layer SD2 via another transfer hole, thereby making the connecting line 120 electrically connectable to the first data line 111.

[0125] As can be seen from the above, in some examples the connecting wire 120 and the data wire 110 are located in different conductive layers 103, thereby insulating the connecting wire 120 from the data wire 110 that it crosses. In some other examples the connecting wire 120 includes a body portion and a jumper portion, where the body portion and the jumper portion may be electrically connected via a transfer hole. The body portion may be located in the same conductive layer 103 as the data wire 110, but the jumper portion may be located in a different conductive layer 103 than the data wire 110, thereby insulating the jumper portion across at least one data wire 110 and from the data wire 110 that it crosses.

[0126] As shown in Figures 7 and 8, the second end of at least one connection line 120 is located between two adjacent second data lines 112. That is, the second end of one connection line 120 may be placed between two adjacent second data lines 112, or the second ends of two or more connection lines 120 may be placed between two adjacent second data lines 112.

[0127] As shown in Figures 7 and 8, it is understood that one second end of a connecting line 120 may be provided between two adjacent second data lines 112 of any one set, two or more second ends of connecting lines 120 may be provided, or no second ends of connecting lines 120 may be provided at all. The number of second ends of connecting lines 120 provided between two different adjacent second data lines 112 may be the same or different.

[0128] As shown in Figures 7 and 8, the second end of the connection line 120 is placed between two adjacent second data lines 112, thereby allowing the second end of the connection line 120 to extend through the gap between the two adjacent second data lines 112 to a position close to the fan-out area BB of the central area AA2 of the display area AA.

[0129] It is understood that the number of connection lines 120 and the number of first data lines 110 may be the same or different.

[0130] In some examples, the number of connection lines 120 is the same as the number of first data lines 110. Multiple connection lines 120 and multiple first data lines 111 are connected in a one-to-one correspondence. Exemplary examples of such installation methods may be called FIAA (Fanout In AA) or FIP (Fanout In Panel).

[0131] In some other examples, the number of connection lines 120 is less than the number of first data lines 111. In this case, all connection lines 120 may be connected in a one-to-one correspondence with some of the first data lines 111, while other some of the first data lines 111 may not be connected to connection lines 120. Exemplary, such an installation configuration may be called a partial FIAA.

[0132] In some examples, as shown in Figure 7, the connection line 120 includes a first subconnection line 121 and a second subconnection line 122. One end of the first subconnection line 121 is located in the edge region AA1 and is electrically connected to the first data line 111. The other end of the first subconnection line 121 extends to the central region AA2. One end of the second subconnection line 122 is electrically connected to the end of the first subconnection line 121 away from the first data line 111, and the other end of the second subconnection line 122 extends to a position close to the fan-out region BB in the central region AA2. Exemplarily, the first subconnection line 121 extends along the first direction X, the second subconnection line 122 extends along the second direction Y, and the first subconnection line 121 is perpendicular or nearly perpendicular to the second subconnection line 122.

[0133] As can be seen from the above, in some examples, the connection line 120 includes a main body portion and a jumper portion. Exemplarily, as shown in Figure 7, when the connection line 120 includes a first sub-connection line 121 and a second sub-connection line 122, the second sub-connection line 122 is the main body portion and is located in the same conductive layer 103 as the multiple data lines 110, and the first sub-connection line 121 is the jumper portion and is located in a different conductive layer 103 than the multiple data lines 110. The first sub-connection line 121 may span across at least one data line 110 and be insulated from the data line 110 it spans.

[0134] In some examples, the first subconnection line 121 is located away from the base 102 relative to the multiple data lines 110, reducing parasitic capacitance between the first subconnection line 121 and the conductive layer 103 (e.g., the first gate metal layer Gate1 and the second gate metal layer Gate2), thereby improving the reliability of signal transmission.

[0135] As shown in Figure 7, the plurality of conductive layers 103 further include a plurality of fan-out lines 130. The plurality of fan-out lines 130 are located in the fan-out region BB. The plurality of fan-out lines 130 include a plurality of first fan-out lines 131 and a plurality of second fan-out lines 132. The first fan-out lines 131 are electrically connected to the second end of the connecting line 120, and the second fan-out lines 132 are at least, It is electrically connected to the end of the second data line 112 that is close to the fan-out region BB.

[0136] It is understood that the number of first fan-out lines 131 is the same as the number of connection lines 120, so that multiple first fan-out lines 131 may be electrically connected to multiple connection lines 120 in a one-to-one correspondence. The number of second fan-out lines 132 is the same as or different from the number of second data lines 112.

[0137] For example, if multiple first data lines 111 are electrically connected to multiple connection lines 120 in a one-to-one correspondence (i.e., FIAA), then the number of second fan-out lines 132 is the same as the number of second data lines 112, and the multiple second fan-out lines 132 are electrically connected to multiple second data lines 112 in a one-to-one correspondence.

[0138] When some of the first data lines 111 are electrically connected to multiple connection lines 120 in a one-to-one correspondence (partial FIAA, i.e., when the number of first data lines 111 is greater than the number of connection lines 120), the number of second fan-out lines 132 is different from the number of second data lines 112. In this case, some of the multiple second fan-out lines 132 (two or more) are electrically connected to second data lines 112 in a one-to-one correspondence, while other some of the second fan-out lines 132 (two or more) are electrically connected to first data lines 111 that are not electrically connected to connection lines 120 in a one-to-one correspondence.

[0139] It is understood that the number of fan-out lines 130 (including the first fan-out line 131 and the second fan-out line 132) may be the same as the number of data lines 110 (including the first data line 111 and the second data line 112). The signal output by the drive IC may be transmitted via one fan-out line 130 to one data line 110 electrically connected to the fan-out line 130, thereby enabling the driving of one row of subpixels 101.

[0140] Exemplary, as shown in Figures 7 and 8, the center line Q of the display board 100 is located at the center along the first direction X of the display board 100 and is parallel to the base 102. It is understood that the center line Q is a virtual reference line and that the center line Q is located within the central region AA2 of the display board 100.

[0141] As shown in Figure 7, it is understood that the second end of the connecting line 120 may be located within the central region AA2 and extend to a position close to the fan-out region BB of the central region AA2, and in this way, multiple first fan-out lines 131 may be electrically connected to the second end of the connecting line 120 at a position close to the center line Q of the display board 100.

[0142] By installing in this manner, when multiple fan-out lines 130 converge in the fan-out area BB and extend away from the display area AA, the space occupied along the second direction Y can be reduced. This reduces the width of the fan-out area BB along the second direction Y, that is, the width of the side frame (e.g., the bottom frame) of the display panel 210 can be reduced, thereby enabling the display panel 210 to have an ultra-narrow bottom frame and improving the visual effect of the display panel 210.

[0143] Furthermore, as can be seen from the above, the rounded corner is located within the edge region AA1 of the display region AA. Therefore, by adopting the above installation method, the first data line 111 located at the rounded corner can be electrically connected to the first fan-out line 131 via the connecting line 120, and the first fan-out line 131 can avoid occupying the space of the fan-out region BB close to the rounded corner. As a result, the frame width at the rounded corner can be reduced, and the display region AA of the display panel 210 can achieve an extra-large rounded corner. In this way, the visual effect of the display panel 210 can be improved, the ease of installation between the external frame of the display panel 210 and the display panel 210 can be improved, the stress on the frame during installation can be reduced, the possibility of wrinkles or cracks in the frame due to installation stress can be reduced, the ease of processing the display device 200 can be improved, and the yield of the display device 200 can be improved.

[0144] As can be seen from the above, in some examples, as shown in Figure 8, at least one second end of a connecting line 120 is provided between some adjacent pairs of second data lines 112, while the second end of the connecting line 120 is not provided between other adjacent pairs of second data lines 112.

[0145] By installing the data lines in this manner, the spacing between multiple data lines 110 can be reduced, improving the pixel density of the display area AA, thereby enabling the display panel 210 to achieve a high PPI (Pixels Per Inch).

[0146] As described above, by using the FIAA or partial FIAA method, the display panel 210 can achieve a narrow bezel while maintaining high resolution. In some examples, the display panel 210 may be a QHD (Quad High Definition) display panel.

[0147] Figure 9 is a structural diagram of a display board according to several other embodiments. Figure 10 is a structural diagram of a display board according to several other embodiments.

[0148] In the following, the display board 100 will be described with reference to Figures 7 to 10. In some embodiments, as shown in Figures 7 to 10, any two adjacent connection lines 120 may be defined as the first connection line 120a and the second connection line 120b. In embodiments of this disclosure, it will be understood that the first connection line 120a and the second connection line 120b are used only to distinguish between two adjacent connection lines 120 and do not further limit the connection lines 120.

[0149] In some examples, as shown in Figures 7 and 9, the first data line 111 electrically connected to the first end of the first connection line 120a is further from the centerline Q of the display board 100 than the first data line 111 electrically connected to the first end of the second connection line 120b. Furthermore, the second end of the first connection line 120a is closer to the centerline Q of the display board 100 than the second end of the second connection line 120b. Exemplaryly, the above connection method may be called reverse FIAA.

[0150] In some other examples, as shown in Figures 8 and 10, the first data line 111 electrically connected to the first end of the first connection line 120a is closer to the centerline Q of the display board 100 than the first data line 111 electrically connected to the first end of the second connection line 120b. Also, the second end of the first connection line 120a is closer to the centerline Q of the display board 100 than the second end of the second connection line 120b. Exemplaryly, the above connection method may be called forward FIAA.

[0151] As shown in FIGS. 7 to 10, when the first data line 111 is electrically connected to the first fan-out line 131 via the connection line 120 (for example, using the reverse-order FIAA or the forward-order FIAA described above), it is understood that the arrangement order along the first direction X of the ends (for example, the ends electrically connected to the driving IC) of the plurality of fan-out lines 130 (including the first fan-out line 131 and the second fan-out line 132) away from the display area AA is different from the arrangement order along the first direction X of the plurality of data lines 110 (including the first data line 111 and the second data line 112).

[0152] Exemplarily, one edge of the display substrate 100 in the first direction X may be defined as the first edge. It is understood that the first edge is either one of the two edges of the display substrate 100 in the first direction X.

[0153] Exemplarily, the plurality of data lines 110 (including the first data line 111 and the second data line 112) arranged at intervals along the direction from the first edge of the display substrate 100 to the center line Q of the display substrate 100 may be defined as the first data line 110 to the nth data line 110. Here, the first data line 110 to the mth data line 110 (m < n) are located in the edge region AA1, and the (m + 1)th data line 110 to the nth data line 110 are located in the center region AA2. That is, the first data line 110 to the mth data line 110 are the first data line 111, and the (m + 1)th data line 110 to the nth data line 110 are the second data line 112. It is understood that both m and n are positive integers.

[0154] As can be seen from the above, the first end of the connecting line 120 is electrically connected to the first data line 111, and the second end of at least one connecting line 120 is located between two adjacent second data lines 112. Exemplaryly, the second end of a connecting line 120 electrically connected to the first data line 110 can be located between the (m+1)th data line 110 and the (m+2)th data line 110 (forward FIAA), or the second end of a connecting line 120 electrically connected to the first data line 110 can be located between the (n-1)th data line 110 and the nth data line 110 (reverse FIAA). That is, the second end of the connecting line 120 is inserted between two adjacent second data lines 112 (for example, the (m+1)th data line 110 and the (m+2)th data line 110).

[0155] In this way, when the first fan-out line 131 is electrically connected to the second end of the connecting line 120 and the second fan-out line 132 is electrically connected to the end of the second data line 112 that is close to the fan-out area BB, at least one of the first fan-out lines 131 is inserted between two adjacent second fan-out lines 132.

[0156] For example, a plurality of fan-out lines 130 (including the first fan-out line 131 and the second fan-out line 132) that are electrically connected in a one-to-one correspondence with the first data line 110 to the nth data line 110 may be defined as the first fan-out line 130 to the nth fan-out line 130. The first fan-out line 130 is electrically connected to the first data line 110, the second fan-out line 130 is electrically connected to the second data line 110, and so on by analogy.

[0157] At least one first fan-out line 131 is inserted between two adjacent second fan-out lines 132, so that the ends of the first to nth fan-out lines 130 that are separated from the display area AA (i.e., the ends where multiple fan-out lines 130 are electrically connected to the drive IC) cannot be arranged sequentially along the direction from the first edge to the center line Q.

[0158] As can be seen from the above, the first to nth data lines 110 are spaced apart along the direction from the first edge to the center line Q. That is, when routing using the FIAA or partial FIAA method, the arrangement order along the first direction X of the ends of the multiple fan-out lines 130 (including the first fan-out line 131 and the second fan-out line 132) away from the display area AA is different from the arrangement order along the first direction X of the multiple data lines 110 (including the first data line 111 and the second data line 112).

[0159] For example, the driver IC has an output terminal, and the arrangement order of the driver IC's output terminal along a first direction X is the same as the arrangement order of the multiple data lines 110 along a first direction X. It is understood that because the arrangement order of the ends of the multiple fan-out lines 130 (including the first fan-out line 131 and the second fan-out line 132) along a first direction X differs from the arrangement order of the multiple data lines 110 (including the first data line 111 and the second data line 112) along a first direction X, the driver IC's output terminal cannot sequentially output drive signals to the multiple data lines 110, that is, the driver IC cannot sequentially drive the illumination of multiple rows of subpixels 101. On the other hand, redeveloping the driver IC is relatively expensive and would lead to an increase in the cost of the display panel 210.

[0160] Figure 11 is a partial structural diagram of a display substrate according to some embodiments of the present disclosure.

[0161] In some embodiments, as shown in Figure 11, the display board 100 further has a bending region CC. The fan-out region BB includes a first fan-out region BB1 and a second fan-out region BB2, where the first fan-out region BB1 is closer to the display region AA than the second fan-out region BB2, and the bending region CC is located between the first fan-out region BB1 and the second fan-out region BB2.

[0162] Exemplary, the base 102 is a flexible base. Within the bending region CC, the base 102 and at least one of the plurality of conductive layers 103 are provided. The base 102 and at least one of the plurality of conductive layers 103 are bendable within the bending region CC.

[0163] In some examples, the base 102 and the second source / drain metal layer SD2 are provided within the bent region CC. The bent region CC is located between the first fan-out region BB1 and the second fan-out region BB2, Display board 100 Second fan-out area BB2 The part located This can be bent to the back of the portion located in the display area AA of the display board 100, preventing the second fan-out area BB2 from occupying the display-side space of the display board 100, thereby further reducing the width of the side frame (e.g., the bottom frame) of the display panel 210 and improving the visual effect of the display panel 210.

[0164] In some embodiments, as shown in Figure 11, the second fan-out region BB2 includes a first sub-fan-out region BB21 and a second sub-fan-out region BB22. The first sub-fan-out region BB21 is closer to the bending region CC than to the second sub-fan-out region BB22.

[0165] Exemplary, as shown in Figure 11, the display board 100 further comprises a circuit test (Cell Test, CT) area. The CT area is located between the first sub-fanout area BB21 and the second sub-fanout area BB22. It is understood that the CT area is used to test the display board 100.

[0166] In some examples, the display board 100 further comprises a COP (Chip On Panel) area, an ILB (Inner Lead Bonding) area, and an FOP (Flexible Printed Circuit On Panel) area. The COP area, ILB area, and FOP area are located, in order, on the side of the second sub-fan-out area BB22 away from the bending area CC. In some examples, the driver IC is located in the COP area and is bound to the base 102 of the display board 100.

[0167] Figure 12 is a magnified view of area 1C in Figure 7.

[0168] In some embodiments of the present disclosure, as shown in Figure 12, the first fan-out line 131 includes a transfer line 136. The transfer line 136 is located in a second fan-out region BB2. The transfer line 136 is located in a different conductive layer 103 from the plurality of second fan-out lines 132, and the transfer line 136 spans at least one of the second fan-out lines 132, so that the arrangement order of the plurality of fan-out lines 130 along a first direction X at the ends away from the display region AA is the same as the arrangement order of the plurality of data lines 110 along a first direction X.

[0169] In the embodiments of this disclosure, it is understood that "crossing" one wire over another means that at least a portion of one wire is located in a different conductive layer 103 than the other wire, and the orthographic projection of the base 102 of the at least portion of the wire intersects with the orthographic projection of the base 102 of the other wire, thereby achieving "crossing" to the other wire.

[0170] It is understood that the transfer line 136 spanning at least one second fan-out line 132 means that the orthographic projection of the transfer line 136 on the base 102 intersects with the orthographic projection of at least one second fan-out line 132 on the base 102. By having the transfer line 136 located in a different conductive layer 103 from the multiple second fan-out lines 132, the transfer line 136 can be isolated from the multiple second fan-out lines 132.

[0171] In some examples, multiple transfer lines 136 may be located in one conductive layer 103 or multiple conductive layers 103. Illustratively, if multiple transfer lines 136 are located in multiple conductive layers 103, one of the transfer lines 136 may be located in a different conductive layer 103 from the multiple second fan-out lines 132.

[0172] In some examples, if the transfer line 136 is located in multiple conductive layers 103, any two adjacent transfer lines 136 may be located in different conductive layers 103. In some examples, the transfer line 136 may be located in a second source-drain metal layer SD2 and / or a first source-drain metal layer SD1. Exemplarily, if the transfer line 136 is located in a second source-drain metal layer SD2 and / or a first source-drain metal layer SD1, any two adjacent transfer lines 136 may be located in different source-drain metal layers SD2 and / or a first source-drain metal layer SD1. and It is located in the second source / drain metal layer (including SD2).

[0173] As shown in Figure 12, by installing the transfer line 136 so that it spans at least one second fan-out line 132 and is insulated from multiple second fan-out lines 132, the arrangement order along the first direction X of the end of the multiple first fan-out lines 131 that moves away from the display area AA can be adjusted by adjusting the extension direction and extension length of the transfer line 136.

[0174] In other words, by setting the transfer line 136 to span at least one second fan-out line 132, the arrangement order of the ends of the first fan-out line 131 that are away from the display area AA (i.e., the ends of the first fan-out line 131 that are electrically connected to the drive IC) can be adjusted. This allows the arrangement order of the ends of multiple fan-out lines 130 that are away from the display area AA (i.e., the ends of multiple fan-out lines 130 that are electrically connected to the drive IC) to be adjusted. As a result, the ends of the first to nth fan-out lines 130 that are away from the display area AA can be arranged sequentially with spacing along the direction from the first edge to the center line Q. This allows the arrangement order of the ends of multiple fan-out lines 130 that are away from the display area AA along the first direction X to be adjusted. no de Data line 110 The order of the elements can be the same as the order of the elements along the first direction X.

[0175] As a result, the arrangement order of the output terminal of the drive IC along the first direction X, the arrangement order of the ends of the multiple fan-out lines 130 away from the display area AA along the first direction X, and the arrangement order of the multiple data lines 110 along the first direction X can all be the same, and the output terminal of the drive IC can sequentially provide drive signals to the multiple data lines 110. In other words, the drive IC can sequentially drive the illumination of multiple rows of subpixels 101, eliminating the need to redevelop the drive IC, enabling a narrower bezel for the display board 100, and reducing the cost of the display board 100.

[0176] Furthermore, placing the transfer line 136 in the second fan-out area BB2 avoids the transfer line 136 occupying space in the first fan-out area BB1, thereby reducing the width of the first fan-out area BB1. Since the first fan-out area BB1 is located closer to the display area AA of the bent area CC, reducing the width of the first fan-out area BB1 allows for an even smaller width of the lower frame of the display board 100, thereby improving the visual effect of the display panel 210.

[0177] In some examples, the end of the transfer line 136 away from the display area AA is electrically connected to the output terminal of the driver IC. In some other examples, the first fan-out line 131 further includes some other wiring (e.g., a second sub-fan-out line 138 shown in Figure 12), one end of the second sub-fan-out line 138 is electrically connected to the end of the transfer line 136 away from the display area AA, and the other end of the second sub-fan-out line 138 is electrically connected to the output terminal of the driver IC.

[0178] Figure 13 is a structural diagram of a display board according to several other embodiments. Figure 14 is a structural diagram of a display board according to several other embodiments. Note that the difference between Figure 13 and Figure 14 is that, in order to make the wiring easier to see, Figure 14 shows only the wiring in the second source / drain metal layer SD2 in this invention (e.g., fan-out wire 130) and does not show other structures or wiring in the second source / drain metal layer SD2.

[0179] Exemplary, as shown in Figures 13 and 14, the plurality of first fan-out lines 131 include a first-type first fan-out line 131a and a second-type first fan-out line 131b. The connection line 120 includes a third connection line 120c and a fourth connection line 120d. As can be seen from the above, the connection line 120 is located within the display area AA. The first end of the connection line 120 is electrically connected to the first data line 111, and the second end of the connection line 120 extends to a position close to the fan-out area BB in the central area AA2. The first fan-out line 131 is located in the fan-out area BB and is electrically connected to the second end of the connection line 120.

[0180] Furthermore, the first fan-out line 131a and the second fan-out line 131b are used solely to distinguish between two different first fan-out lines 131, and do not further limit the first fan-out line 131. The third connection line 120c and the fourth connection line 120d are used solely to distinguish between two different connection lines 120, and do not further limit the connection line 120.

[0181] In some examples, the second type first fan-out line 131b is electrically connected to one first data line 111 via the fourth connection line 120d. The first type first fan-out line 131a is electrically connected to another first data line 111 via the third connection line 120c. Here, the first data line 111 electrically connected to the third connection line 120c is closer to the center line Q of the display board 100 than the first data line 111 electrically connected to the fourth connection line 120d.

[0182] Figure 15 is a magnified view of area 1A in Figure 13. Figure 16 is a magnified view of area 2A in Figure 13. Figure 17 is a magnified view of area 3A in Figure 13. Figure 18 is a magnified view of area 4A in Figure 13. Figure 19 is a magnified view of area 5A in Figure 13. Figure 20 is a magnified view of area 6A in Figure 13. Figure 21 is a magnified view of area 7A in Figure 13.

[0183] Exemplary, as shown in Figures 13 and 15, at the location of region 1A, the second data line 112 is electrically connected to the second fan-out line 132, so that the drive IC can provide a drive signal to the second data line 112 via the second fan-out line 132. Exemplary, the first fan-out line 131 (including the first type first fan-out line 131a and the second type first fan-out line 131b) is not provided at the location of region 1A.

[0184] As shown in Figures 13 and 16, at the location of region 2A, the second end of the third connecting line 120c is electrically connected to the first fan-out line 131a of the first type.

[0185] As shown in Figures 13 and 17, the first type first fan-out line 131a extends from region 2A to region 3A and is transferred to another conductive layer 103 by a jumper at the location of region 3A, thereby allowing the transfer line 136 in the first type first fan-out line 131a to be located in a different conductive layer 103 from the multiple second fan-out lines 132.

[0186] As shown in Figures 13 and 18, the first fan-out line of type 1 131a extends from region 3A to region 4A. In some examples, the transfer line 136 of the first fan-out line of type 1 131a is transferred to another conductive layer 103 via a transfer hole at region 4A1. That is, in Figure 18, the transfer line 136 of the first fan-out line of type 1 131a may be transferred to a first partial first fan-out line 131a2 via a transfer hole at region 4A1. It is understood that the first partial first fan-out line 131a2 is the portion of the first fan-out line of type 1 131a other than the transfer line 136, and that the first partial first fan-out line 131a2 is located in a different conductive layer 103 than the transfer line 136. Exemplarily, the first partial first fan-out line 131a2 may be a second sub-fan-out line 138 shown in Figure 12.

[0187] In some cases, the orthographic projection of the transfer line 136 on base 102 and the orthographic projection of the first part first fan-out line 131a2 on base 102 overlap at least partially, thereby avoiding overlap between the orthographic projection of the transfer line 136 on base 102 and the orthographic projection of other wiring (e.g., second fan-out line 132) on base 102, i.e., avoiding overlap between the transfer line 136 and other wiring, thereby reducing parasitic capacitance between the transfer line 136 and other wiring and improving signal transmission reliability.

[0188] As shown in Figures 13 and 19, the first type first fan-out line 131a extends from region 4A to region 5A and is electrically connected to the drive IC in region 5A. It is understood that in region 5A, the first type first fan-out line 131a is located in a different conductive layer 103 than the second type first fan-out line 131b.

[0189] Similarly, as shown in Figures 13 and 20, the transfer line 136 in the second type first fan-out line 131b is transferred to another conductive layer 103 via a transfer hole at the location of region 6A1, so that the transfer line 136 in the second type first fan-out line 131b can be located in a different conductive layer 103 from the multiple second fan-out lines 132.

[0190] As shown in Figures 13 and 21, the second type first fan-out line 131b extends from region 6A to region 7A and is electrically connected to the drive IC at region 7A. It is understood that, because the transfer line 136 in the second type first fan-out line 131b is transferred to another conductive layer 103 via a transfer hole at region 6A1, the transfer line 136 of the intersecting second type first fan-out line 131b and the remaining portion of the second type first fan-out line 131b (the portion of the second type first fan-out line 131b other than the transfer line 136) can be located in different conductive layers 103.

[0191] By positioning the transfer line 136 in the first fan-out line 131 on a different conductive layer 103 from the multiple second fan-out lines 132, and by arranging the transfer line 136 to extend across at least one second fan-out line 132, the arrangement order along the first direction X of the ends of the multiple first fan-out lines 131 away from the display area AA can be adjusted by adjusting the extension direction and extension length of the transfer line 136. In other words, the arrangement order of the transfer line 136 along the first direction of the ends of the multiple fan-out lines 130 away from the display area AA can be adjusted, thereby allowing the arrangement order along the first direction of the ends of the multiple fan-out lines 130 away from the display area AA to be adjusted. no de Data line 110 The order of the elements can be the same as the order of the elements along the first direction X.

[0192] In other words, by arranging the transfer line 136 to extend over at least one second fan-out line 132, the arrangement order of the output terminals of the drive IC along the first direction X, the arrangement order of the ends of the multiple fan-out lines 130 away from the display area AA (i.e., the ends of the multiple fan-out lines 130 electrically connected to the drive IC) along the first direction X, and the arrangement order of the multiple data lines 110 along the first direction X can all be the same. As a result, the output terminals of the drive IC can sequentially provide drive signals to the multiple data lines 110, that is, the drive IC can sequentially drive the illumination of multiple rows of sub-pixels 101, eliminating the need to redevelop the drive IC, enabling a narrower bezel for the display board 100, and reducing the cost of the display board 100.

[0193] In some embodiments, as shown in Figure 10, multiple connection lines 120 are electrically connected to multiple first data lines 111 in a one-to-one correspondence. Multiple second fan-out lines 132 are electrically connected to multiple second data lines 112 in a one-to-one correspondence.

[0194] It is understood that the number of connection lines 120 is the same as the number of first data lines 111, so that multiple connection lines 120 may be electrically connected in a one-to-one correspondence with multiple first data lines 111. The number of second fan-out lines 132 is the same as the number of second data lines 112, so that multiple second fan-out lines 132 may be electrically connected in a one-to-one correspondence with multiple second data lines 112.

[0195] By installing it in this manner, the convenience of wiring the display board 100 is improved, and manufacturing costs are reduced.

[0196] Figure 22 is a structural diagram of a display board according to several other embodiments.

[0197] As can be seen from the above, in some embodiments, multiple connection lines 120 are electrically connected to multiple first data lines 111 in a one-to-one correspondence. Multiple second fan-out lines 132 are electrically connected to multiple second data lines 112 in a one-to-one correspondence.

[0198] In some other embodiments, as shown in Figure 22, a plurality of first data lines 111 include a plurality of first type first data lines 111a and a plurality of second type first data lines 111b. A plurality of second fan-out lines 132 include a plurality of first type second fan-out lines 132a and a plurality of second type second fan-out lines 132b.

[0199] As shown in Figure 22, multiple Type 1 first data lines 111a are electrically connected to multiple connection lines 120 in a one-to-one correspondence. Multiple Type 1 second fan-out lines 132a are electrically connected to multiple second data lines 112 in a one-to-one correspondence. Multiple Type 2 second fan-out lines 132b are electrically connected to multiple Type 2 first data lines 111b in a one-to-one correspondence.

[0200] In the embodiments of this disclosure, the plurality of first type first data lines 111a and the plurality of second type first data lines 111b are used solely to distinguish first data lines 111 that are electrically connected to connection lines 120 or plurality of second type second fan-out lines 132b, and do not further limit the first data lines 111. The plurality of first type second fan-out lines 132a and the plurality of second type second fan-out lines 132b are used solely to distinguish second fan-out lines 132 that are electrically connected to second data lines 112 or second type first data lines 111b, and do not further limit the second fan-out lines 132.

[0201] For example, the number of first data lines 111a and first data lines 111b of type 1 may be the same or different. The number of second fan-out lines 132a and second fan-out lines 132b of type 1 may be the same or different.

[0202] The multiple first data lines 111a of type 1 here may be understood as the aforementioned "some of the first data lines 111", and the multiple first data lines 111b of type 2 may be understood as the aforementioned "other of the first data lines 111".

[0203] It is understood that by electrically connecting multiple Type 1 first data lines 111a to the transfer line 136 and multiple Type 2 first data lines 111b to the Type 2 second fan-out line 132b, the flexibility of the wiring of the display board 100 can be improved, and different usage needs can be met.

[0204] Figure 23 is a partial structural diagram of a display board according to several other embodiments. Figure 24 is a partial enlarged view of area 1B in Figure 23. Figure 25 is a partial enlarged view of area 2B in Figure 23. Figure 26 is a partial enlarged view of area 3B in Figure 23.

[0205] It is understood that, as shown in Figures 23 and 24, since the first data line 111a of type 1 is electrically connected to the connecting line 120, the end of the first data line 111a of type 1 near the fan-out region BB at the location of region 1B is not directly electrically connected to the fan-out line 130 (including the first fan-out line 131 and the second fan-out line 132). It is understood that the first data line 111a of type 1 is electrically connected to the first fan-out line 131 via the connecting line 120 (not shown in region 1B).

[0206] As shown in Figures 23 and 24, at location 1B, the end of the Type 2 first data line 111b closest to the fan-out region BB is electrically connected to the Type 2 second fan-out line 132b.

[0207] In some examples, as shown in Figures 23 and 25, two connecting lines 120 are provided between two adjacent Type 2 first data lines 111b at the location of region 2B (the fifth connecting line 120e and the sixth connecting line 120F shown in Figure 24). Note that the fifth connecting line 120e and the sixth connecting line 120f are used only to distinguish between two different connecting lines 120 and do not further limit the connecting lines 120.

[0208] As shown in Figure 25, it is understood that the first fan-out line 131 is electrically connected to the connecting line 120 in a one-to-one correspondence, and the second fan-out line 132b of the second type is electrically connected to the first data line 111b of the second type in a one-to-one correspondence.

[0209] As shown in Figures 23 and 26, Connection wire 120 The first fan-out line 131, which is electrically connected to the first data line 111a of the first type via the first fan-out line 131, and the second fan-out line 132b of the second type, which is directly electrically connected to the first data line 111b of the second type, are both electrically connected to the drive IC at the location of region 3B.

[0210] As can be seen from the above, the light-emitting element 300 can emit light of different colors such as red light, green light, and blue light. The multiple subpixels 101 of the display board 100 are arranged in multiple columns along the first direction X and in multiple rows along the second direction Y. Here, one column of subpixels 101 is electrically connected to one data line 110 (either the first data line 111 or the second data line 112).

[0211] For example, two first data lines 111a of type 1 are provided between two adjacent first data lines 111b of type 2. In some examples, one of the two first data lines 111a is electrically connected to a row of first subpixels. The first subpixel includes a subpixel 101 that emits red light and a subpixel 101 that emits blue light. The first data line 111b of type 2 is electrically connected to a row of subpixels 101 that emit green light.

[0212] As can be seen from the above, as shown in Figure 22, the first data line 111a of type 1 is, Connection wire 120 The first fan-out line 131 is electrically connected via the first fan-out line 111b, and the end of the second type first data line 111b closest to the fan-out region BB is electrically connected to the second type second fan-out line 132b. That is, the second type first data line 111b is, Connection wire 120It does not need to be transferred via the second fan-out line 132b of the second type, and can be electrically connected to the second fan-out line 132b of the second type, thereby allowing the drive IC to provide a drive signal to the first data line 111b of the second type via the second fan-out line 132b of the second type.

[0213] The first subpixel includes a subpixel 101 that emits red light and a subpixel 101 that emits blue light. That is, the driver IC has a first fan-out line 131, a first type first data line 111a, and Connection wire 120 Drive signals are provided to the sub-pixel 101 that emits red light and the sub-pixel 101 that emits blue light via the second fan-out line 132b and the first data line 111b of the second type, and a drive signal is provided to the sub-pixel 101 that emits green light.

[0214] It is understood that since the Type 2 first data line 111b can be directly electrically connected to the Type 2 second fan-out line 132b, no transfer or jumper is required, thus avoiding changes in load due to the transfer or jumper process, and thereby improving the reliability of the drive signal that the drive IC provides to the sub-pixel 101 that emits green light.

[0215] Since changes in loading have a relatively large impact on the sub-pixel 101 that emits green light, by arranging the system so that the first type first data line 111a is electrically connected to the sub-pixel 101 that emits red light and the sub-pixel 101 that emits blue light, and the second type first data line 111b is electrically connected to the sub-pixel 101 that emits green light, the space occupied along the second direction Y of the multiple fan-out lines 130 can be reduced, the impact of jumpers or transfer processes on the sub-pixel 101 that emits green light can be avoided, the reliability of the drive signal that the drive IC provides to the sub-pixel 101 that emits green light can be improved, and thereby the display performance of the display panel 210 can be improved.

[0216] As can be seen from the above, the first fan-out line 131 includes a transfer line 136. In some embodiments, as shown in Figure 12, the first fan-out line 131 further includes a first sub-fan-out line 133, a plurality of adapters 134, and a first signal transmission line 135.

[0217] As shown in Figure 12, the first sub-fan-out line 133 is electrically connected to the second end of the connecting line 120 (not shown in Figure 12). The adapter 134 includes a first adapter 1341 located in the region close to the bend CC of the first fan-out region BB1, and a second adapter 1342 located in the region close to the bend CC of the second fan-out region BB2. Here, the first adapter 1341 is electrically connected to the end of the first sub-fan-out line 133 away from the connecting line 120. The first signal transmission line 135 passes through the bend CC and connects the first adapter 1341 and the second adapter 1342. The transfer line 136 is electrically connected to the second adapter 1342.

[0218] In some examples, multiple first sub-fanout lines 133 are located in the first fanout region BB1 and in different conductive layers 103. The first sub-fanout lines 133 are electrically connected to the first adapter 1341. Exemplarily, the first sub-fanout lines 133 may be transferred by the first adapter 1341 to the second source / drain metal layer SD2 and electrically connected to the first signal transmission line 135.

[0219] The first signal transmission line 135 electrically connects the first adapter 1341 and the second adapter 1342. Exemplarily, the first signal transmission line 135 may be transferred via the second adapter 1342 to other conductive layers 103 other than the second source / drain metal layer SD2 and electrically connected to the transfer line 136.

[0220] In some examples, as shown in Figure 12, the portion of the second fan-out line 132 located in the first fan-out region BB1 is defined as the third sub-fan-out line 1321. Illustratively, the portion of the second fan-out line 132 located in the second fan-out region BB2 is defined as the fourth sub-fan-out line 1322.

[0221] In some examples, multiple third sub-fan-out lines 1321 are located in different conductive layers 103. The second fan-out line 132 further includes the first adapter 1341, the second adapter 1342, and the first signal transmission line 135. By electrically connecting the third sub-fanout line 1321 to the first adapter 1341, the third sub-fanout line 1321 can be transferred by the first adapter 1341 to the second source / drain metal layer SD2 and electrically connected to the first signal transmission line 135. The first signal transmission line 135 is transferred via the second adapter 1342 to other conductive layers 103 other than the second source / drain metal layer SD2 and electrically connected to the fourth sub-fanout line 1322.

[0222] As shown in Figure 12, the first sub-fan out line 133 and Third subfan-out line 1321 However, it is understood that they are electrically connected to a different first adapter 1341. The transfer line 136 and the fourth sub-fanout line 1322 are electrically connected to a different second adapter 1342. It is understood that the different first adapter 1341 and the different second adapter 1342 are electrically connected via a different first signal transmission line 135.

[0223] In some examples, within the first fan-out region BB1, any two adjacent fan-out lines 130 (including the first sub-fan-out line 133 and the third sub-fan-out line 1321) among the multiple first sub-fan-out lines 133 and multiple third sub-fan-out lines 1321 are located in different conductive layers 103.

[0224] In addition, among the multiple first sub-fan-out lines 133 and the multiple third sub-fan-out lines 1321, any two adjacent fan-out lines 130 refer to any two fan-out lines 130 (including the first sub-fan-out line 133 and the third sub-fan-out line 1321) whose orthographic projections in the base 102 are adjacent.

[0225] By installing it in this manner, the orthographic projection on the base 102 can reduce the distance between two adjacent fan-out lines 130 (including the first sub-fan-out line 133 and the third sub-fan-out line 1321), thereby reducing the width of the first fan-out area BB1 and further reducing the width of the side frame (e.g., the bottom frame) of the display panel 210.

[0226] For example, among the multiple first sub-fanout lines 133 and the multiple third sub-fanout lines 1321, any two adjacent fanout lines 130 are alternately located in the first gate metal layer Gate1 and the second gate metal layer Gate2.

[0227] In some examples, as shown in Figure 12, the first fan-out line 131 includes a second sub-fan-out line 138. The second sub-fan-out line 138 is located in the second fan-out region BB2 and is electrically connected to the end of the transfer line 136 away from the first sub-fan-out line 133.

[0228] For example, within the second fan-out region BB2, any two adjacent fan-out lines 130 (including the second sub-fan-out line 138 and the fourth sub-fan-out line 1322) among the multiple second sub-fan-out lines 138 and multiple fourth sub-fan-out lines 1322 are located in different conductive layers 103.

[0229] In addition, among the multiple second sub-fan-out lines 138 and the multiple fourth sub-fan-out lines 1322, any two adjacent fan-out lines 130 refer to any two fan-out lines 130 (including the second sub-fan-out line 138 and the fourth sub-fan-out line 1322) whose orthographic projections in the base 102 are adjacent.

[0230] By installing it in this manner, the orthographic projection on the base 102 can reduce the distance between two adjacent fan-out lines 130 (including the second sub-fan-out line 138 and the fourth sub-fan-out line 1322), thereby reducing the width of the second fan-out area BB2 and further reducing the width of the side frame (e.g., the bottom frame) of the display panel 210.

[0231] For example, among the multiple second sub-fanout lines 138 and multiple fourth sub-fanout lines 1322, any two adjacent fanout lines 130 are alternately located in the first gate metal layer Gate1 and the second gate metal layer Gate2.

[0232] Figure 27 is a partial structural diagram of a display board according to several other embodiments. Figure 28 is a partial enlarged view of region 1D in Figure 27.

[0233] In some examples, as shown in Figures 27 and 28, the third sub-fanout line 1321 and the first sub-fanout line 133 are aligned along the first direction X. Exemplarily, the third sub-fanout line 1321 and the first sub-fanout line 133 are, Second direction Y They may be arranged alternately along the lines.

[0234] In some cases, for two adjacent fan-out lines 130, including the third sub-fan-out line 1321 and the first sub-fan-out line 133, at least some of the line segments in the fan-out line 130 that move away from the center line Q curve toward the fan-out line 130 that is closer to the center line Q.

[0235] For illustrative purposes, as shown in Figure 22, if no connecting line 120 is provided between two adjacent second data lines 112, the distance between the fan-out lines 130 (third sub-fan-out line 1321) electrically connected to these two second data lines 112 is defined as the first distance. If at least one connecting line 120 is provided between two adjacent second data lines 112, the distance between the fan-out lines 130 (including the first sub-fan-out line 133 and the third sub-fan-out line 1321) electrically connected to these two second data lines 112 and at least one connecting line 120 is defined as the second distance. It is understood that the first distance is greater than the second distance.

[0236] Since at least one connecting line 120 is located between two adjacent second data lines 112, the first distance is greater than the second distance, and as a result, the distances between multiple fan-out lines 130 (including the first sub-fan-out line 133 and the third sub-fan-out line 1321) do not coincide. It is understood that the smaller the distance between two adjacent fan-out lines 130 (including the first sub-fan-out line 133 and the third sub-fan-out line 1321), the larger the space occupied along the second direction Y when they approach and converge. Conversely, the larger the distance between two adjacent fan-out lines 130 (including the first sub-fan-out line 133 and the third sub-fan-out line 1321), the smaller the space occupied along the second direction Y when they approach and converge.

[0237] Therefore, as shown in Figure 28, for two adjacent fan-out lines 130 among the third sub-fan-out line 1321 and the first sub-fan-out line 133, at least a portion of the line segments in the fan-out lines 130 that are away from the center line Q (including the first sub-fan-out line 133 and the third sub-fan-out line 1321) are set to curve toward the fan-out lines 130 that are closer to the center line Q (including the first sub-fan-out line 133 and the third sub-fan-out line 1321).

[0238] In other words, when the distance between two adjacent fan-out lines 130 (including the first sub-fan-out line 133 and the third sub-fan-out line 1321) is relatively large, at least some of the line segments in the fan-out lines 130 (including the first sub-fan-out line 133 and the third sub-fan-out line 1321) that are farther from the center line Q will curve toward the fan-out lines 130 (including the first sub-fan-out line 133 and the third sub-fan-out line 1321) that are closer to the center line Q. This reduces the space occupied along the second direction Y of the multiple fan-out lines 130 (including the first sub-fan-out line 133 and the third sub-fan-out line 1321) as they approach and converge. In other words, the width of the first fan-out region BB1 can be reduced, which in turn reduces the width of the side frame (e.g., the bottom frame) of the display panel 210.

[0239] In some cases, as shown in Figure 28, when the distance between two adjacent fan-out lines 130 (including the first sub-fan-out line 133 and the third sub-fan-out line 1321) is relatively small, at least some of the line segments in the fan-out line 130 (including the first sub-fan-out line 133 and the third sub-fan-out line 1321) that are close to the center line Q curve toward the fan-out line 130 (including the first sub-fan-out line 133 and the third sub-fan-out line 1321) that are farther away from the center line Q, thereby avoiding influencing each other when multiple fan-out lines 130 converge and fan out.

[0240] By installing them in this manner, at least some of the line segments in the first sub-fan-out line 133 and the third sub-fan-out line 1321 can be curved according to the distance between two adjacent fan-out lines 130 (including the first sub-fan-out line 133 and the third sub-fan-out line 1321), thereby reducing the width of the first fan-out region BB1 while avoiding mutual interference when multiple fan-out lines 130 (including the first sub-fan-out line 133 and the third sub-fan-out line 1321) converge and fan out.

[0241] In some examples, as shown in FIG. 28, at least some of the wirings in the first sub-fan-out line 133 and the third sub-fan-out line 1321 extend in a curved or substantially curved shape.

[0242] FIG. 29 is also a partial structural diagram of a display substrate according to some other embodiments. FIG. 30 is also a partial structural diagram of a display substrate according to some other embodiments. FIG. 31 is also a partial structural diagram of a display substrate according to some other embodiments. FIG. 32 is also a partial structural diagram of a display substrate according to some other embodiments. FIG. 33 is a partial enlarged view of the region 1E in FIG. 32.

[0243] As can be seen from the above, as shown in FIGS. 29 and 30, the plurality of conductive layers 103 include a first gate metal layer Gate1, a second gate metal layer Gate2, a first source / drain metal layer SD1, and a second source / drain metal layer SD2.

[0244] Also, as can be seen from the above, the second fan-out region BB2 includes a first sub-fan-out region BB21 and a second sub-fan-out region BB22. The first sub-fan-out region BB21 is closer to the bending region CC than the second sub-fan-out region BB22.

[0245] In some examples, as shown in FIG. 31, at least a part of the transfer line 136 is located in the first sub-fan-out region BB21. Exemplarily, as shown in FIGS. 32 and 33, the transfer line 136 extends converging in a direction close to the center line Q.

[0246] As shown in FIG. 32, the display substrate 100 further includes an isolation part 140. The isolation part 140 is located in the first sub-fan-out region BB21. Also, the isolation part 140 is located between the transfer line 136 and the plurality of second fan-out lines 132.

[0247] The transfer line 136 and the plurality of second fan-out lines 132 are located in different conductive layers 103, and the isolation portion 140 is located between the transfer line 136 and the plurality of second fan-out lines 132. That is, it is understood that the isolation portion 140 is located in the conductive layer 103 between the plurality of transfer lines 136 and the plurality of second fan-out lines 132.

[0248] Since the transfer line 136 extends across at least one second fan-out line 132, it is understood that the orthographic projection of the transfer line 136 on the base 102 partially overlaps with the orthographic projection of the second fan-out line 132 on the base 102. In this way, a parasitic capacitance is generated between the transfer line 136 and the second fan-out line 132. ru .

[0249] Therefore, at least a part of the transfer line 136 is installed in the first sub-fan-out region BB21, and the isolation portion 140 is also located in the first sub-fan-out region BB21. And by the isolation portion 140 being located between the transfer line 136 and the plurality of second fan-out lines 132, the isolation portion 140 isolates the transfer line 136 and the plurality of second fan-out lines 132, reduces the parasitic capacitance formed between the transfer line 136 and the second fan-out line 132, and can improve the signal transmission reliability.

[0250] Exemplarily, the isolation portion 140 is located between the transfer line 136 and the fourth sub-fan-out line 1322 of the plurality of second fan-out lines 132.

[0251] In some examples, the transfer line 136 is located in the second source-drain metal layer SD2, the second fan-out line 132 (the fourth sub-fan-out line 1322) is located in the first gate metal layer Gate1 and / or the second gate metal layer Gate2, and the isolation portion 140 is located in the first source-drain metal layer SD1.

[0252] The first source / drain metal layer SD1 is closer to the first gate metal layer Gate1 and the second gate metal layer Gate2 than to the second source / drain metal layer SD2. In this way, the isolation section 140 can be located between the transfer line 136 and the multiple second fan-out lines 132, thereby isolating the transfer line 136 from the multiple second fan-out lines 132, reducing the parasitic capacitance formed between the transfer line 136 and the second fan-out lines 132, and improving the reliability of signal transmission.

[0253] Figure 34 is a magnified view of area 2D in Figure 27. Figure 35 is a magnified view of area 1F in Figure 34.

[0254] In some embodiments, as shown in Figures 34 and 35, First fan-out line 131 This further includes a second signal transmission line 137. The second signal transmission line 137 is connected between the second adapter 1342 and the transfer line 136. Here, the orthographic projection of the second signal transmission line 137 at base 102 is located between the orthographic projection of the isolation section 140 at base 102 and the edge of the first sub-fan-out region BB21 on the side closer to the bent region CC.

[0255] It is understood that the second signal transmission line 137 may be electrically connected to the second adapter 1342, and the transfer line 136 may be electrically connected to the end of the second signal transmission line 137 away from the second adapter 1342, thereby electrically connecting the transfer line 136 to the second adapter 1342 via the second signal transmission line 137.

[0256] In some examples, as shown in Figure 35, the second signal transmission line 137 and the second fan-out line 132 (fourth sub-fan-out line 1322) are located in different conductive layers 103. Exemplarily, multiple second fan-out lines 132 (fourth sub-fan-out lines 1322) are alternately located in the first gate metal layer Gate1 and the second gate metal layer Gate2. By having the second signal transmission line 137 located in the source-drain metal layer SD, the second signal transmission line 137 and multiple second fan-out lines 132 can be located in different conductive layers 103. Exemplarily, the second signal transmission line 137 may be located in the first source-drain metal layer SD1 or the second source-drain metal layer SD2.

[0257] Since the second signal transmission line 137 and the multiple second fan-out lines 132 (fourth sub-fan-out lines 1322) are located in different conductive layers 103, after the second adapter 1342 alternately transfers the multiple second fan-out lines 132 (fourth sub-fan-out lines 1322) to the first gate metal layer Gate1 and the second gate metal layer Gate2, by not providing the second signal transmission line 137 between two adjacent second fan-out lines 132 (fourth sub-fan-out lines 1322), the multiple second fan-out lines 132 (fourth sub-fan-out lines 1322) can be electrically connected to the drive IC at the gate metal layer Gate (first gate metal layer Gate1 or second gate metal layer Gate2) to which they are transferred by the second adapter 1342.

[0258] That is, when the second adapter 1342 transfers the second fan-out line 132 to the first gate metal layer Gate 1, the second fan-out line 132 may be electrically connected to the drive IC at the first gate metal layer Gate 1. When the second adapter 1342 transfers the second fan-out line 132 to the second gate metal layer Gate 2, the second fan-out line 132 may be electrically connected to the drive IC at the second gate metal layer Gate 2.

[0259] By installing it in this way, the second fan-out line 132 does not need to be transferred again to another conductive layer 103 after being transferred to the first gate metal layer Gate1 or the second gate metal layer Gate2 by the second adapter 1342, and can be connected to the drive IC. This reduces abrupt changes in loading caused by jumpers, thereby improving the uniformity of the brightness of the display panel 210, while also improving ease of processing and reducing the cost of the display panel 210.

[0260] On the other hand, because the second signal transmission line 137 and the multiple second fan-out lines 132 are located on different conductive layers 103, the orthographic projection can reduce the distance between two adjacent wirings (including the second fan-out line 132 and the second signal transmission line 137) on the base 102, thereby reducing the width of the first sub-fan-out region BB21.

[0261] Figure 36 is a magnified view of area 2F in Figure 34.

[0262] As can be seen from the above, in some examples, the second signal transmission line 137 and the second fan-out line 132 (fourth sub-fan-out line 1322) are located in different conductive layers 103. In some other examples, as shown in Figure 36, at least some of the line segments in the second signal transmission line 137 and at least some of the line segments in the multiple second fan-out lines 132 (fourth sub-fan-out lines 1322) are located in the same conductive layer 103.

[0263] Exemplary, a plurality of second signal transmission lines 137 and a plurality of second fan-out lines 132 (fourth sub-fan-out line 1322) are alternately located on the first gate metal layer Gate 1 and the second gate metal layer Gate 2, and any two adjacent wirings (including the second signal transmission line 137 and the second fan-out line 132) are located on different gate metal layers (including the first gate metal layer Gate 1 and the second gate metal layer Gate 2).

[0264] It is understood that the second adapter 1342 can transfer multiple second signal transmission lines 137 to the first gate metal layer Gate1 and the second gate metal layer Gate2, and that the transfer line 136 is electrically connected to the second signal transmission lines 137 located in the gate metal layer Gates (e.g., the first gate metal layer Gate1 and the second gate metal layer Gate2). The second signal transmission lines 137 do not need to be transferred to other conductive layers 103 (e.g., source / drain metal layers SD), simplifying the manufacturing process and improving production efficiency.

[0265] However, since the second adapter 1342 alternately transfers multiple second signal transmission lines 137 and multiple second fan-out lines 132 to the first gate metal layer Gate1 and the second gate metal layer Gate2, when a second signal transmission line 137 located between two adjacent second fan-out lines 132 is electrically connected to the transfer line 136, that is, when a second signal transmission line 137 located between two adjacent second fan-out lines 132 is transferred to another conductive layer 103, the two adjacent second fan-out lines 132 (fourth sub-fan-out line 1322) end up located on the same conductive layer 103. ru .

[0266] In the same conductive layer 103 To reduce crosstalk between two adjacent second fan-out lines 132 (fourth sub-fan-out lines 1322), in some examples, as shown in Figure 36, a second signal transmission line 137 located between two adjacent second fan-out lines 132 (fourth sub-fan-out lines 1322) can be transferred to another conductive layer 103, and then at least a portion of the multiple second fan-out lines 132 can be transferred by jumpers through the transfer hole T. This allows the multiple second fan-out lines 132 (fourth sub-fan-out lines 1322) to be alternately located between the first gate metal layer Gate 1 and the second gate metal layer Gate 2, thereby reducing crosstalk between two adjacent second fan-out lines 132 (fourth sub-fan-out lines 1322) and improving signal transmission reliability.

[0267] In some embodiments, as shown in FIG. 35, the second signal transmission line 137 gradually approaches the center line Q of the display substrate 100 from the end close to the display area AA to the end away from the display area AA.

[0268] By arranging them in this way, the occupied space in the second direction Y of the plurality of second signal transmission lines 137 can be reduced, the width of the first sub-fan-out area BB21 can be further reduced, and the area utilization rate of the first sub-fan-out area BB21 can be improved.

[0269] FIG. 37 is a partially enlarged view of the area 3D in FIG. 27. FIG. 38 is a partially enlarged view of the area 4D in FIG. 27.

[0270] In some examples, as shown in FIG. 37, the fourth sub-fan-out line 1322 gradually approaches the center line Q of the display substrate 100 from the end close to the display area AA to the end away from the display area AA.

[0271] By arranging them in this way, the occupied space in the second direction Y of the plurality of fourth sub-fan-out lines 1322 can be reduced, the width of the first sub-fan-out area BB21 can be further reduced, and the area utilization rate of the first sub-fan-out area BB21 can be improved.

[0272] In some examples, as shown in FIG. 37, the second signal transmission line 137 and the fourth sub-fan-out line 1322 located away from the center line Q of the display substrate 100 gradually approach the center line Q of the display substrate 100 from the end close to the display area AA to the end away from the display area AA.

[0273] In some examples, as shown in FIG. 38, the second signal transmission line 137 and the fourth sub-fan-out line 1322 located close to the center line Q of the display substrate 100 extend along the second direction Y.

[0274] As can be seen from the above, in some examples, the second signal transmission line 137 and the second fan-out line 132 (fourth sub-fan-out line 1322) are located in different conductive layers 103. In some embodiments, there are multiple second signal transmission lines 137. Of two adjacent second signal transmission lines 137, at least a portion of the line segment of the second signal transmission line 137 that is further away from the center line Q curves toward the second signal transmission line 137 that is closer to the center line Q.

[0275] For example, if the distance between two adjacent second signal transmission lines 137 is relatively large, at least a portion of the line segment of the second signal transmission line 137 that is further away from the center line Q will curve toward the second signal transmission line 137 that is closer to the center line Q. This reduces the spacing between multiple second signal transmission lines 137 and the space occupied along the second direction Y of the multiple second signal transmission lines 137, that is, it reduces the width of the first sub-fan-out region BB21.

[0276] In some examples, the second signal transmission line 137 and the multiple second fan-out lines 132 (fourth sub-fan-out line 1322) are located in different conductive layers 103. In this case, if the distance between two adjacent second signal transmission lines 137 is relatively small, at least a portion of the line segment of the second signal transmission line 137 closer to the center line Q will curve toward the second signal transmission line 137 moving away from the center line Q, thereby avoiding mutual influence between the multiple second signal transmission lines 137.

[0277] In some cases, at least some of the line segments in the multiple second signal transmission lines 137 extend in a wavy or substantially wavy curve.

[0278] In some other examples, at least a portion of the line segments in the second signal transmission line 137 and at least a portion of the line segments in the multiple second fan-out lines 132 (fourth sub-fan-out line 1322) are located in the same conductive layer 103. In this case, of any two adjacent fan-out lines 130 (including the second signal transmission line 137 and the fourth sub-fan-out line 1322), at least a portion of the line segments in the second signal transmission line 137 that is further away from the center line Q curves toward the second signal transmission line 137 that is closer to the center line Q.

[0279] For example, if the distance between two adjacent fan-out lines 130 (including the second signal transmission line 137 and the fourth sub-fan-out line 1322) is relatively large, at least a portion of the line segments of the fan-out lines 130 that are further away from the center line Q will curve toward the fan-out lines 130 that are closer to the center line Q. This reduces the spacing between multiple fan-out lines 130 (including the second signal transmission line 137 and the fourth sub-fan-out line 1322) and reduces the space occupied along the second direction Y of the multiple fan-out lines 130 (including the second signal transmission line 137 and the fourth sub-fan-out line 1322), that is, it reduces the width of the first sub-fan-out region BB21.

[0280] In some cases, when the distance between two adjacent fan-out lines 130 (including the second signal transmission line 137 and the fourth sub-fan-out line 1322) is relatively small, at least a portion of the line segment of the fan-out line 130 closer to the center line Q curves toward the fan-out line 130 further away from the center line Q, thereby avoiding mutual influence between multiple fan-out lines 130 (including the second signal transmission line 137 and the fourth sub-fan-out line 1322).

[0281] In some cases, at least some of the line segments in the multiple fan-out lines 130 (including the second signal transmission line 137 and the fourth sub-fan-out line 1322) extend in a wavy or substantially wavy curve.

[0282] Figure 39 is a partial structural diagram of a display board according to several other embodiments.

[0283] If the transfer line 136 is located at least in the first sub-fanout region BB21, in some examples, as shown in Figure 39, the end of the transfer line 136 away from the first sub-fanout line 133 extends to the second sub-fanout region BB22. That is, in this case, the transfer line 136 is located in both the first sub-fanout region BB21 and the second sub-fanout region BB22.

[0284] It is understood that, by extending the end of the transfer line 136 away from the first sub-fanout line 133 to the second sub-fanout region BB22, multiple first data lines 111 may be electrically connected to the driver IC via the end of the transfer line 136 away from the first sub-fanout line 133. By installing it in this manner, when the transfer line 136 is electrically connected to the driver IC, it does not need to be transferred again to other conductive layers 103, simplifying the manufacturing process and reducing manufacturing costs.

[0285] In some examples, the transfer line 136 is located in the second source / drain metal layer SD2. It is understood that the first data line 111 is electrically connected to the first fan-out line 131 via the connecting line 120, and the second data line 112 is directly electrically connected to the second fan-out line 132. That is, the signal output by the drive IC is transmitted to the first data line 111 via the first fan-out line 131 and the connecting line 120, and to the second data line 112 via the second fan-out line 132.

[0286] For the sake of clarity, the transmission path of a signal to the first data line 111 may be called the first transmission path a, and the transmission path of a signal to the second data line 112 may be called the second transmission path b. It is understood that the first transmission path a includes the first fan-out line 131, the connection line 120, and the first data line 111, and the second transmission path b includes the second fan-out line 132 and the second data line 112.

[0287] As can be seen from the above, the length of the first transmission path a is longer than the length of the second transmission path b. In some examples, because the length of the first transmission path a is longer than the length of the second transmission path b, the signal delay (officially called Loading) of the first transmission path a is greater than the signal delay of the second transmission path b, and the Loading difference between the different transmission paths increases. do .

[0288] Based on this, in some examples, the transfer line 136 is provided in the second source / drain metal layer SD2, and as shown in Figure 39, the transfer line 136 located in the second source / drain metal layer SD2 is installed to extend to the second sub-fan-out region BB22, so that the end of the transfer line 136 away from the display region AA can be directly electrically connected to the drive IC.

[0289] Because the resistance of the second source / drain metal layer SD2 is relatively low, it can compensate for the loading of the first transmission path a, reduce the loading difference between different transmission paths (first transmission path a and second transmission path b), avoid abrupt changes in loading due to different transmission paths, and improve the consistency of loading between multiple transmission paths, thereby improving the brightness uniformity of the display panel 210.

[0290] As can be seen from the above, in some embodiments, the end of the transfer line 136 away from the first sub-fanout line 133 extends to the second sub-fanout region BB22. In some other embodiments, as shown in Figure 12, the first sub-fanout line 131 further includes a second sub-fanout line 138. The second sub-fanout line 138 is located in a different conductive layer 103. The isolation section 140 is located between the transfer line 136 and the second sub-fanout line 138. That is, the isolation section 140 is located in the conductive layer 103 between the transfer line 136 and the second sub-fanout line 138.

[0291] In some examples, as shown in Figure 12, the end of the transfer line 136 away from the first sub-fanout line 133 is located around the isolation section 140 and is electrically connected to the second sub-fanout line 138. The end of the second sub-fanout line 138 away from the transfer line 136 extends to the second sub-fanout region BB22.

[0292] It is understood that the second sub-fanout line 138 is used to electrically connect the transfer line 136 to the drive IC. That is, the end of the second sub-fanout line 138 away from the indicator area AA can be electrically connected to the drive IC.

[0293] By positioning the isolation unit 140 between the transfer line 136 and the second sub-fanout line 138, the isolation unit 140 isolates the transfer line 136 and the second sub-fanout line 138, reducing parasitic capacitance between the transfer line 136 and the second sub-fanout line 138 and improving the reliability of signal transmission.

[0294] In other words, the isolation unit 140 not only isolates the transfer line 136 from the multiple second fan-out lines 132, but also isolates the transfer line 136 from the second sub-fan-out line 138, thereby improving the reliability of signal transmission.

[0295] It is understood that at least one second sub-fanout line 138 and second fanout line 132 (fourth sub-fanout line 1322) are located in the same conductive layer 103. In some examples, multiple second sub-fanout lines 138 are located in the first gate metal layer Gate 1 and / or the second gate metal layer Gate 2. Also, of the multiple second fanout lines 132 and multiple second sub-fanout lines 138, any two adjacent fanout lines 130 (including the fourth sub-fanout line 1322 of the second fanout line 132 and the second sub-fanout line 138 of the first fanout line 131) are located in different gate metal layers Gates (including the first gate metal layer Gate 1 and the second gate metal layer Gate 2).

[0296] By installing them in this manner, the space occupied along the second direction Y when multiple fan-out lines 130 (including the fourth sub-fan-out line 1322 of the second fan-out line 132 and the second sub-fan-out line 138 of the first fan-out line 131) are electrically connected to the drive IC can be further reduced. Furthermore, crosstalk occurring between two adjacent fan-out lines 130 can be reduced, improving the reliability of signal transmission.

[0297] As shown in Figure 12, the end of the transfer line 136 away from the first sub-fanout line 133 is located around the isolation section 140 and is electrically connected to the second sub-fanout line 138. The end of the second sub-fanout line 138 away from the transfer line 136 extends to the second sub-fanout region BB22.

[0298] By installing the equipment in this manner, when the transfer line 136 is electrically connected to the second sub-fanout line 138, the isolation section 140 located between the transfer line 136 and the second sub-fanout line 138 is avoided. Furthermore, the isolation effect of the isolation section 140 between the transfer line 136 and the second sub-fanout line 138 can be improved, thereby improving the reliability of signal transmission.

[0299] Figure 40 is a magnified view of area 3F in Figure 34.

[0300] In some embodiments, as shown in Figure 40, the position where the transfer line 136 connects to the second sub-fan-out line 138 is defined as the first connection point M. In the transfer line 136, the orthographic projection of the base 102 in the portion near the first connection point M and beyond the isolation portion 140 substantially overlaps with the orthographic projection of the base 102 in the portion near the first connection point M and beyond the isolation portion 140 in the second sub-fan-out line 138.

[0301] It is understood that the signal transmitted on the transfer line 136 is the same as the signal transmitted on the second sub-fanout line 138 which is electrically connected to the transfer line 136. Since the transfer line 136 and the second sub-fanout line 138 extend beyond the end of the isolation section 140, the transfer line 136 and the second sub-fanout line 138 cannot be isolated through the isolation section 140.

[0302] Therefore, by positioning the base 102 of the transfer line 136 in the portion near the first connection point M and beyond the isolation portion 140 to substantially overlap with the base 102 of the second sub-fan-out line 138 in the portion near the first connection point M and beyond the isolation portion 140, the base 102 of the two conductive wires (transfer line 136 and the second sub-fan-out line 138 electrically connected to the transfer line 136) that transmit the same signal substantially overlap.

[0303] By installing them in this manner, the orthographic projection of the transfer line 136 or the second sub-fanout line 138 on the base 102 is prevented from overlapping with the orthographic projection of the base 102 of other conductive wiring. This reduces parasitic capacitance between the transfer line 136 and other conductive wiring, and between the second sub-fanout line 138, which is electrically connected to the transfer line 136, and other conductive wiring, thereby improving signal transmission reliability. In addition, the space occupied along the second direction Y of the multiple second sub-fanout lines 138 can be reduced, thereby reducing the width of the first sub-fanout region BB21.

[0304] In some examples, as shown in Figure 40, the transfer line 136 and the second sub-fanout line 138 are electrically connected via the transfer hole T.

[0305] In some embodiments, as shown in Figure 34, portions of the multiple transfer lines 136 that are close to the first connection point M and extend beyond the isolation section 140 are located on at least one side along the first direction X of the isolation section 140. Illustratively, portions of the multiple transfer lines 136 located on the same side along the first direction X of the isolation section 140 that are close to the first connection point M and extend beyond the isolation section 140 are defined as the first extended portion 136a. The multiple first extended portions are arranged sequentially along the second direction Y, and in the second direction Y, the length of the multiple first extended portions 136a gradually increases and then gradually decreases. Alternatively, the length of the multiple first extended portions 136a gradually decreases and then gradually increases (as shown in Figure 34).

[0306] It is understood that multiple first extending portions 136a extend along a first direction X and are spaced apart along a second direction Y.

[0307] In some examples, connection line 120, transfer line 136, and second signal transmission line 137 are located in the source-drain metal layer SD (including the first source-drain metal layer SD1 and the second source-drain metal layer SD2). Multiple second fan-out lines 132 are located in the gate metal layer Gate (including the first gate metal layer Gate1 and the second gate metal layer Gate2). It is understood that the resistance of the source-drain metal layer SD is less than the resistance of the gate metal layer Gate.

[0308] As can be seen from the above, the first transmission path a includes the first fan-out line 131 (including the transfer line 136 and the second signal transmission line 137), the connection line 120 and the first data line 111, and the second transmission path b includes the second fan-out line 132 and the second data line 112. Because the resistance of the source / drain metal layer SD is smaller than the resistance of the gate metal layer Gate, in some examples the loading of the first transmission path a is smaller than the loading of the second transmission path b. ru .

[0309] Based on this, in some examples, as shown in Figure 34, the extended length of the transfer line 136 is increased by arranging a plurality of first extended portions 136a sequentially along the second direction Y, and by setting the length of the plurality of first extended portions 136a to be gradually increased and then gradually decreased, or gradually decreased and then gradually increased, in the second direction Y. In addition, since the second sub-fanout line 138 is electrically connected to the end of the transfer line 136 that exceeds the isolation portion 140, the length of the second sub-fanout line 138 can also be increased in this way.

[0310] In other words, by adopting the above installation method, the length of the first transmission path a can be increased, thereby increasing the load of the signal on the first transmission path a, improving the consistency of the load between the first transmission path a and the second transmission path b, improving the consistency of the pixel brightness, and thereby improving the display performance of the display panel 210.

[0311] Furthermore, along the second direction Y, there are multiple first extensions minutes By slowly changing the length of 136a, abrupt changes in loading on different first transmission paths a are avoided, further improving the consistency of pixel brightness, and thereby improving the display performance of the display panel 210.

[0312] Furthermore, by adopting the above installation method, the space occupied along the second direction Y of the multiple transfer lines 136 can be reduced, thereby improving the area utilization rate of the first sub-fan-out area BB21 and reducing the width of the first sub-fan-out area BB21.

[0313] In some other examples, the lengths of the multiple first extending portions 136a gradually decrease or gradually increase in the second direction Y.

[0314] In some other examples, the lengths of the multiple first extending portions 136a change multiple times in the second direction Y. That is, in the second direction Y, the lengths of the multiple first extending portions 136a either gradually decrease and then gradually increase multiple times, or gradually increase and then gradually decrease multiple times.

[0315] In some other examples, having multiple first extending portions 136a with the same or approximately the same length in the second direction Y further reduces the impact of jumpers on loading across different transmission paths and improves pixel brightness consistency.

[0316] Figure 41 is a partial structural diagram of a display board according to several other embodiments.

[0317] In some examples, as shown in Figure 41, having the same or approximately the same lengths for the first transmission path a and the second transmission path b improves the consistency of the resistances of the first transmission path a and the second transmission path b, improves the consistency of the parasitic capacitance formed between the first transmission path a and the other conductive layer 103, and improves the consistency of the parasitic capacitance formed between the second transmission path b and the other conductive layer 103, thereby improving the consistency of the loading between the first transmission path a and the second transmission path b, further reducing the influence of jumpers on the loading of different transmission paths, and improving the consistency of pixel brightness.

[0318] Figure 42 is a magnified view of area 4B in Figure 23. Figure 43 is a magnified view of area 5B in Figure 23. Figure 44 is a structural diagram of a transfer line according to several embodiments.

[0319] As shown in Figures 42 and 43, in some embodiments, the orthographic projection of the transfer line 136 on the base 102 is U-shaped or substantially U-shaped, with the opening facing the bending region CC. One end of the transfer line 136 is electrically connected to the first sub-fanout line 133, and the other end of the transfer line 136 is electrically connected to the second sub-fanout line 138.

[0320] The U-shaped transfer line extends over at least one second fan-out line 132, allowing the transfer line 136 to adjust the arrangement order along the first direction of the ends of multiple first fan-out lines 131 that are away from the display area AA. This allows the ends of the first to nth fan-out lines 130 that are away from the display area AA to be spaced apart in sequence along the direction from the first edge to the center line Q. That is, the arrangement order along the first direction X of the ends of multiple fan-out lines 130 that are away from the display area AA can be adjusted. Data line 110 It is understood that this will result in the same arrangement order along the first direction X.

[0321] In some embodiments, as shown in Figure 44, the U-shaped transfer line is located in the first sub-fan-out region BB21. If one first data line of type 2 111b is electrically connected to a row of green light-emitting light-emitting elements 300, and any first data line of type 1 111a is electrically connected to a row of first sub-pixels, and the first sub-pixels include a sub-pixel 101 that emits red light and a sub-pixel 101 that emits blue light, then a U-shaped transfer line may be provided to transfer the first sub-fan-out line 133 which is electrically connected to the first data line of type 1 111a. That is, the U-shaped transfer line allows the first sub-fan-out line 133 to be electrically connected to a second sub-fan-out line 138, thereby allowing the arrangement order of the multiple fan-out lines 130 along the first direction X at the ends away from the display region AA to be the same as the arrangement order of the multiple data lines 110 along the first direction X.

[0322] In some embodiments, as shown in Figure 43, at least one compensation line 151 is provided within the opening of the U-shaped transfer line. It is understood that the compensation line 151 is used to improve the convenience of etching the U-shaped transfer line and to facilitate the patterning of the U-shaped transfer line.

[0323] In some examples, the multiple conductive layers 103 include at least one gate metal layer Gate, a first source / drain metal layer SD1, and a second source / drain metal layer SD2. Both the first source / drain metal layer SD1 and the second source / drain metal layer SD2 are located on the side of at least one gate metal layer Gate away from the base 102, and the first source / drain metal layer SD1 is closer to the base 102 than the second source / drain metal layer SD2. A first sub-fanout line 133, a second sub-fanout line 138, and multiple second fanout lines 132 are located on at least one gate metal layer Gate. The isolation section 140 is located on the first source / drain metal layer SD1, and the transfer line 136 is located on the second source / drain metal layer SD2.

[0324] In some examples, when multiple conductive layers 103 include multiple gate metal layers (two or more), any two adjacent fan-out lines 130 (with adjacent orthographic projections in base 102) among the first sub-fan-out line 133, second sub-fan-out line 138, and multiple second fan-out lines 132 are located in different gate metal layers. This reduces crosstalk between two adjacent fan-out lines 130, improving signal transmission reliability, while also reducing the distance between two fan-out lines 130 with adjacent orthographic projections in base 102, thereby reducing the space occupied along the second direction Y of the multiple fan-out lines 130.

[0325] The first source / drain metal layer SD1 and the second source / drain metal layer SD2 are both located on the side away from the base 102 of at least one gate metal layer Gate, and the first source / drain metal layer SD1 is closer to the base 102 than the second source / drain metal layer SD2. Therefore, the isolation section 140 is located in the first source / drain metal layer SD1, and the transfer line 136 is located in the second source / drain metal layer SD2. As a result, the isolation section 140 is located between the transfer line 136 and the second sub-fanout line 138 and between the transfer line 136 and the multiple second fanout lines 132. This reduces the parasitic capacitance generated between the transfer line 136 and the second sub-fanout line 138 and between the transfer line 136 and the multiple second fanout lines 132, thereby improving the reliability of signal transmission.

[0326] In some examples, the isolation section 140 includes at least one power signal line, which is used to transmit a stable voltage signal and may be, but is not limited to, at least one of the following signal lines: for example, a Vdd signal line that provides voltage to the anode of the light-emitting element 300, a Vss signal line that provides voltage to the cathode of the light-emitting element 300, etc.

[0327] It is understood that by isolating the transfer line 136 from the second fan-out line 132 and the transfer line 136 from the second sub-fan-out line 138 via the power signal line, the manufacturing process is simplified and the cost of the display board 100 is reduced, as there is no need to install additional components.

[0328] As can be seen from the above, in some examples, the transfer line 136 is located in the first sub-fanout region BB21. In some other embodiments, the second fanout region BB2 includes the first sub-fanout region BB21 and the second sub-fanout region BB22, with the first sub-fanout region BB21 being closer to the bend region CC than to the second sub-fanout region BB22. The transfer line 136 is located in the second sub-fanout region BB22. In this case, the transfer line 136 and the second adapter 1342 can still be electrically connected via the second signal transmission line 137, that is, the second signal transmission line 137 extends from the first sub-fanout region BB21 to the second sub-fanout region BB22.

[0329] By installing it in this manner, the transfer line 136 can transfer the first sub-fanout line 133 to different sub-fanout areas (including the first sub-fanout area BB21 and the second sub-fanout area BB22) to meet different usage needs.

[0330] The following explanation will use an example where the transfer line 136 is located in the second sub-fanout region BB22.

[0331] Figure 45 is a partial structural diagram of a display board according to several other embodiments.

[0332] As shown in Figure 45, the display board 100 includes a first fan-out area BB1, a bend area CC, a first sub-fan-out area BB21, a CT area, a second sub-fan-out area BB22, a COP area, an ILB area, and an FOP area, which are sequentially separated from the display area AA. Here, a driver chip (e.g., a driver IC) may be mounted in the COP area, a binding connection block (e.g., a gold finger) may be provided in the FOP area, and signal lines connecting the pins of the driver chip to the conductive binding connection block may be arranged in the ILB area. A test circuit may be provided in the CT area, and the test circuit is used to test the performance (e.g., display effect) of the display panel 210.

[0333] Figure 46 is a partial structural diagram of a display board according to several other embodiments. Figure 47 is a partial enlarged view of region 1H in Figure 46. Figure 48 is a partial enlarged view of region 2H in Figure 46.

[0334] In some examples, as shown in Figure 46, the transfer line 136 includes a first sub-transfer line 31 and a second sub-transfer line 32. The first sub-transfer line 31 is electrically connected to a first sub-fanout line 133 (not shown in Figure 46).

[0335] The term "electrical connection" here does not refer to a direct structural connection. It is understood that, for example, signal transmission lines (e.g., the first signal transmission line 135 and the second signal transmission line 137) passing through the bent region CC and the first sub-fanout region BB21 may be connected between the first sub-transfer line 31 and the first sub-fanout line 133.

[0336] Exemplary, as shown in Figure 47, the second signal transmission line 137 extends to the second sub-fan-out region BB22, and the first sub-transfer line 31 is electrically connected to the end of the second signal transmission line 137 away from the bend region CC via a transfer hole T. As shown in Figure 47, the first sub-transfer line 31 spans at least one second fan-out line 132, i.e., the orthographic projection of the first sub-transfer line 31 at base 102 intersects the orthographic projection of at least one second fan-out line 132 at base 102.

[0337] The second subtransport line 32 is electrically connected to the end of the first subtransport line 31 that is separated from the first subfanout line 133. As shown in Figure 48, the orthographic projection of at least one second subtransport line 32 at base 102 lies between the orthographic projections of two adjacent second fanout lines 132 at base 102.

[0338] The first sub-transfer line 31 is electrically connected to the first sub-fan-out line 133 and extends over at least one second fan-out line 132, so that the first sub-transfer line 31 can perform a jumper transfer function, thereby allowing the arrangement order of the ends of the multiple fan-out lines 130 along the first direction X away from the display area AA to be the same as the arrangement order of the multiple data lines 110 along the first direction X.

[0339] Furthermore, as shown in Figure 48, the orthographic projection of the base 102 of at least one second sub-transfer line 32 is located between the orthographic projections of the base 102 of two adjacent second fan-out lines 132. This avoids overlap between the orthographic projection of the base 102 of the second sub-transfer line 32 and the orthographic projections of the base 102 of multiple second fan-out lines 132, thereby reducing parasitic capacitance between the second sub-transfer line 32 and the multiple second fan-out lines 132 and improving signal transmission reliability.

[0340] In some cases, the first subtransport line 31 and the second subtransport line 32 of the same transfer line 136 are located in the same conductive layer 103, thereby improving the convenience of electrical connection between the first subtransport line 31 and the second subtransport line 32.

[0341] In some examples, multiple transfer lines 136 are located in one or more other conductive layers 103. If the transfer lines 136 are located in multiple conductive layers 103, two adjacent transfer lines 136 may be located in different conductive layers 103.

[0342] Figure 49 is a partial structural diagram of a display board according to several other embodiments. Figure 50 is a partial enlarged view of region 3H in Figure 49.

[0343] In some examples, as shown in Figures 49 and 50, multiple transfer lines 136 are located in the first source-drain metal layer SD1 and / or the second source-drain metal layer SD2.

[0344] Exemplary, when multiple transfer lines 136 are located in the first source-drain metal layer SD1 and the second source-drain metal layer SD2, two adjacent transfer lines 136 (whose orthographic projections in the base 102 are adjacent) are located in different source-drain metal layers (the first source-drain metal layer SD1 and the second source-drain metal layer SD2). That is, the multiple transfer lines 136 are located alternately in the first source-drain metal layer SD1 and the second source-drain metal layer SD2.

[0345] By installing in this manner, crosstalk between two adjacent transfer lines 136 is reduced, improving the reliability of signal transmission. At the same time, the orthographic projection on the base 102 can reduce the distance between the two adjacent transfer lines 136, thereby reducing the space occupied along the second direction Y of the transfer lines 136 and reducing the width of the second sub-fan-out region BB22.

[0346] Figure 51 is a partial structural diagram of a display board according to several other embodiments. Figure 52 is a partial structural diagram of a display board according to several other embodiments. Figure 53 is a partial structural diagram of a display board according to several other embodiments.

[0347] In some examples, as shown in Figure 51, the second sub-fan-out region BB22 includes two first regions K01, which are located on either side of the center line Q. It is understood that the shape and area of ​​the two first regions K01 may be the same or approximately the same.

[0348] In some examples, as shown in Figures 52 and 53, at least one first region K01 includes multiple subregions. These multiple subregions include a first subregion K1, a second subregion K2, and a third subregion K3. The first subregion K1, the second subregion K2, and the third subregion K3 are arranged in order along the direction from the edge away from the centerline towards the centerline Q. That is, the first subregion K1 is away from the centerline relative to the second subregion K2, and the second subregion K2 is away from the centerline relative to the third subregion K3.

[0349] As shown in Figures 52 and 53, for the sake of clarity, the direction from the edge of the first region K01 away from the center line to the center line Q may be called the third direction X1.

[0350] In some examples, as shown in Figures 51 to 53, the terminal P of the first sub-transfer line 31 that is electrically connected to the first sub-fan-out line 133 (i.e., the location of the transfer hole T in Figures 47 and 50, and shown as the location of P in Figures 51 to 53) is located in at least one of the first sub-region K1, the second sub-region K2, and the third sub-region K3. The second sub-transfer line 32 is located in the first sub-region K1.

[0351] In some examples, as shown in Figure 49, the terminals P electrically connected to the first sub-fanout lines 133 of the multiple first sub-transfer lines 31 are all located in the first sub-region K1. In some other examples, as shown in Figure 46, the terminals P electrically connected to the first sub-fanout lines 133 of the multiple first sub-transfer lines 31 are all located in the second sub-region K2. In some other examples, as shown in Figure 52, the terminals P electrically connected to the first sub-fanout lines 133 of the multiple first sub-transfer lines 31 are all located in the third sub-region K3.

[0352] It is understood that the closer the terminal P of one of the multiple first sub-transfer lines 31 that is electrically connected to the first sub-fan-out line 133 is to the center line Q, the larger the overlap area between the orthographic projection of the base 102 of the first sub-transfer line 31 and the orthographic projection of the base 102 of the multiple second fan-out lines 132, the larger the parasitic capacitance between them becomes, and the higher the signal transmission load. Conversely, the further the terminal P of one of the multiple first sub-transfer lines 31 that is electrically connected to the first sub-fan-out line 133 is to the center line Q, the smaller the overlap area between the orthographic projection of the base 102 of the first sub-transfer line 31 and the orthographic projection of the base 102 of the multiple second fan-out lines 132 becomes, the smaller the parasitic capacitance between them becomes, and the lower the signal transmission load.

[0353] The size of parasitic capacitance affects the loading when signals are transmitted over different transmission paths. In this way, the terminals P electrically connected to the first sub-fanout lines 133 of the multiple first sub-transfer lines 31 can be positioned in different sub-regions (at least one of the first sub-region K1, second sub-region K2, and third sub-region K3) according to different needs, thereby improving the flexibility of the display board 100.

[0354] It is understood that by positioning the second subtransport line 32 in the first sub-region K1, parasitic capacitance between the second subtransport line 32 and the multiple second fan-out lines 132 is reduced, thereby improving the reliability of signal transmission.

[0355] In some examples, as shown in Figure 53, the terminals P electrically connected to the first sub-fanout lines 133 of multiple first sub-transfer lines 31 are located in different sub-regions of the first region K01.

[0356] By installing it in this manner, the flexibility of the display board 100 can be further improved, and different usage needs can be met.

[0357] In some examples, as shown in Figure 53, the terminals P electrically connected to the first subfan-out lines 133 of the multiple first subtransfer lines 31 are evenly distributed across the first subregion K1, the second subregion K2, and the third subregion K3.

[0358] By installing them in this manner, the regularity of the structure of the multiple first sub-transfer lines 31 is improved, making manufacturing and processing easier.

[0359] In some examples, the two first regions K01 each include a first sub-region K1, a second sub-region K2, and a third sub-region K3. The terminals electrically connected to the first sub-fanout line 133 of the transfer line 136 within the two first regions K01 P The installation locations may be the same or different.

[0360] As can be seen from the above, the electrical connection methods between the transfer line 136 and the data line 110 can be divided into forward FIAA and reverse FIAA. In some examples, when wiring using the reverse FIAA method, it is understood that the first data line 110, the second data line 110, and the third data line 110 move sequentially closer to the center line Q, while the second end of the first connecting line 120 electrically connected to the first data line 110, the second end of the second connecting line 120 electrically connected to the second data line 110, and the second end of the third connecting line 120 electrically connected to the third data line 110 move sequentially away from the center line Q.

[0361] Thus, as shown in Figure 46, the first second signal transmission line 137a, the second second signal transmission line 137b, and the third second signal transmission line 137c move away from the center line Q in order, and as a result, the multiple first subtransfer lines 31 that are electrically connected to the first second signal transmission line 137a, the second second signal transmission line 137b, and the third second signal transmission line 137c move away from the center line Q in order.

[0362] Figure 54 is a partial structural diagram of a display board according to several other embodiments.

[0363] In some other examples, when wiring using the forward FIAA method, it is understood that, as shown in Figure 54, the first data line 110, the second data line 110, and the third data line 110 move sequentially towards the center line Q, and the second end of the first connection line 120 electrically connected to the first data line 110, the second end of the second connection line 120 electrically connected to the second data line 110, and the second end of the third connection line 120 electrically connected to the third data line 110 move sequentially towards the center line Q.

[0364] Thus, as shown in Figure 54, the first second signal transmission line 137a, the second second signal transmission line 137b, and the third second signal transmission line 137c move closer to the center line Q in order, and as a result, the multiple first sub-transfer lines 31 that are electrically connected to the first second signal transmission line 137a, the second second signal transmission line 137b, and the third second signal transmission line 137c move closer to the center line Q in order.

[0365] Figure 55 is a partial structural diagram of a display board according to several other embodiments. Figure 56 is a partial structural diagram of a display board according to several other embodiments. Figure 57 is a partial structural diagram of a display board according to several other embodiments. Figure 58 is a partial structural diagram of a display board according to several other embodiments.

[0366] In some embodiments, as shown in Figures 46, 52, 54, 55-58, the outer shape of the region where the orthographic projections of all first subtransfer lines 31 at base 102 within the first region K01 are located is trapezoidal. Alternatively, as shown in Figures 49, 51, and 53, the outer shape of the region where the orthographic projections of all first subtransfer lines 31 at base 102 within the first region K01 are located is triangular.

[0367] In some examples, as shown in Figures 54-58, the upper base of the trapezoid is closer to the display area AA than the lower base (forward FIAA). In some other examples, as shown in Figures 46 and 52, the upper base of the trapezoid is further away from the display area AA than the lower base (reverse FIAA). Here, the upper base refers to the relatively shorter base, and the lower base refers to the relatively longer base. The upper base is parallel to the lower base.

[0368] In some examples, as shown in Figures 55 and 56, the second sub-fan-out region BB22 includes the second region K02 and the third region K03. The second region K02 is closer to the first sub-fan-out region BB21 than the third region K03. The length of the edge of the second region K02 closer to the first sub-fan-out region BB21 is longer than the length of the edge of the second region K02 further away from the first sub-fan-out region BB21.

[0369] In some examples, the second region K02 may be a trapezoid. The edge of the second region K02 closer to the first sub-fan-out region BB21 is the bottom base of the trapezoid, and the edge of the second region K02 further away from the first sub-fan-out region BB21 is the top base of the trapezoid. It is understood that the top and bottom bases of the trapezoid are parallel, and the length of the top base is shorter than the length of the bottom base. In some other examples, the second region K02 may be another irregular shape.

[0370] As shown in Figures 56 and 57, the first sub-transfer line 31 extends along the first direction X, and the second sub-transfer line 32 extends along the second direction Y. At least one first sub-transfer line 31 is located in the second region K02, and at least one second sub-transfer line 32 extends from the second region K02 to the third region K03.

[0371] As can be seen from above, the first direction X is perpendicular or nearly perpendicular to the second direction Y, the first sub-transfer line 31 extends along the first direction, and the second sub-transfer line 32 extends along the second direction Y, so that the first sub-transfer line 31 and the second sub-transfer line 32 may be perpendicular or nearly perpendicular.

[0372] It is understood that the length of the edge of the second region K02 closer to the first sub-fan-out region BB21 is longer than the length of the edge of the second region K02 further away from the first sub-fan-out region BB21, so that there is an angle between at least one conductive wiring in the second region K02 (e.g., wiring on the first gate metal layer Gate1, the second gate metal layer Gate2, the first source / drain metal layer SD1, and the second source / drain metal layer SD2) and the second direction Y, i.e., at least one wiring in the second region K02 extends obliquely with respect to the second direction Y.

[0373] Exemplary, the third region K03 may be rectangular or square. At least one conductive wiring within the third region K03 (e.g., wiring on the first gate metal layer Gate1, the second gate metal layer Gate2, the first source / drain metal layer SD1, and the second source / drain metal layer SD2) extends along the second direction Y.

[0374] Since at least one conductive wire in the second region K02 extends diagonally with respect to the second direction Y, and at least one conductive wire in the third region K03 extends along the second direction Y, the overlapping area between the orthographic projection of the first sub-transfer line 31 on the base 102 and the orthographic projection of the wire extending along the inclined direction (inclined with respect to the second direction Y) in the second region K02 when the first sub-transfer line 31 is located in the second region K02 (as shown in Figures 56 and 57) is greater than the overlapping area between the orthographic projection of the first sub-transfer line 31 on the base 102 and the orthographic projection of the wire extending along the second direction Y in the third region K03 when the first sub-transfer line 31 is located in the third region K03 (as shown in Figures 54 and 55). It is understood that the smaller the overlap area between the orthographic projection of the base 102 of the first sub-transfer line 31 and the orthographic projection of the base 102 of the other wiring, the smaller the parasitic capacitance and the higher the signal transmission reliability.

[0375] However, the second region K02 is closer to the first sub-fanout region BB21 than the third region K03. That is, by placing at least some of the first sub-transfer lines 31 within the second region K02, the area utilization rate of the second sub-fanout region BB22 can be improved, reducing the space occupied along the second direction Y of the multiple second sub-transfer lines 32, and thereby reducing the width of the second sub-fanout region BB22.

[0376] For example, the width h1 of the second sub-fan-out region BB22 in Figures 56 and 57 is smaller than the width h2 of the second sub-fan-out region BB22 in Figures 55 and 58. Also, for example, the width h1 of the second sub-fan-out region BB22 in Figures 52 and 53 is smaller than the width h2 of the second sub-fan-out region BB22 in Figure 51.

[0377] In other words, when multiple first sub-transfer lines 31 are all located in the second region K02, the area utilization rate of the second sub-fan-out region BB22 can be improved, and the space occupied along the second direction Y of the multiple second sub-transfer lines 32 can be reduced, thereby reducing the width of the second sub-fan-out region BB22. . one On the other hand, if multiple first sub-transfer lines 31 are all located in the third region K03, the overlapping area between the first sub-adapter line 31 and other wiring can be reduced, and parasitic capacitance can be reduced. 。

[0378] Therefore, in some embodiments of this disclosure, at least one first sub-transfer line 31 is located in the second region K02, and at least one second sub-transfer line 32 is installed to extend from the second region K02 to the third region K03. In this way, the positions of multiple second sub-transfer lines 32 can be set by considering a combination of area utilization and parasitic capacitance of the second sub-fan-out region BB22 according to different needs, thereby improving the flexibility of the wiring of the display board 100.

[0379] As can be seen from the above, in some examples, the first sub-transfer line 31 extends along the first direction X. That is, multiple first sub-transfer lines 31 are parallel or substantially parallel. Exemplaryly, the portion of the second signal transmission line 137 located within the second sub-fan-out region BB22 is on a different layer from the first sub-transfer line 31. For example, the portion of the second signal transmission line 137 located within the second sub-fan-out region BB22 may be located in the first gate metal layer Gate1 or the second gate metal layer Gate2.

[0380] Figure 59 is a partial structural diagram of a display board according to several other embodiments. Figure 60 is a partial enlarged view of region 4H in Figure 59.

[0381] In some other examples, as shown in Figures 59 and 60, the distance between at least two adjacent first sub-transfer lines 31 along the direction from the first sub-fan-out region BB21 to the second sub-fan-out region BB22 gradually decreases.

[0382] By installing in this manner, the multiple first sub-transfer lines 31 (transfer lines 136) can converge closer to each other and be electrically connected to the second sub-transfer line 32, improving the wiring convenience of the multiple first sub-transfer lines 31 and allowing for a smaller installation size along the second direction Y of the second sub-fan-out area BB22.

[0383] As can be seen from the above, in some examples, the first fan-out line 131 further includes a second sub-fan-out line 138. The second sub-fan-out line 138 and the transfer line 136 are located in different conductive layers 103. The second sub-fan-out line 138 is located in the second sub-fan-out region BB22 and is electrically connected to the end of the transfer line 136 away from the first sub-fan-out line 133.

[0384] It is understood that the second sub-fanout line 138 is used to electrically connect the transfer line 136 (second sub-transfer line 32) to the driver IC. In some examples, multiple second sub-fanout lines 138 are located in the first gate metal layer Gate1 and the second gate metal layer Gate2.

[0385] In some examples, at least one second sub-fanout line 138 and second fanout line 132 are located in different conductive layers 103. Illustratively, among a plurality of second sub-fanout lines 138 and a plurality of second fanout lines 132, any two adjacent fanout lines 130 (including the second sub-fanout line 138 and the second fanout line 132) that are adjacent in orthographic projection on the base 102 are located in different gate metal layers (including the first gate metal layer Gate1 and the second gate metal layer Gate2).

[0386] By installing the equipment in this manner, the space occupied along the second direction Y when multiple fan-out lines 130 (including the second fan-out line 132 and the second sub-fan-out line 138) are electrically connected to the drive IC can be further reduced, making it easier to electrically connect the drive IC to the multiple fan-out lines 130. In addition, crosstalk occurring between two adjacent fan-out lines 130 can be reduced, improving the reliability of signal transmission.

[0387] As can be seen from the above, in some examples, the multiple conductive layers 103 include at least one gate metal layer Gate, a first source / drain metal layer SD1, and a second source / drain metal layer SD2. Both the first source / drain metal layer SD1 and the second source / drain metal layer SD2 are located on the side of the at least one gate metal layer Gate away from the base 102, and the first source / drain metal layer SD1 is closer to the base 102 than the second source / drain metal layer SD2. The first sub-fanout line 133, the second sub-fanout line 138, and the multiple second fanout lines 132 are located on at least one gate metal layer Gate, and the transfer line 136 is located alternately on the first source / drain metal layer SD1 and the second source / drain metal layer SD2.

[0388] By installing in this manner, the orthographic projection on the base 102 can further reduce the distance between two adjacent transfer lines 136, thereby reducing the space occupied along the second direction Y of the multiple transfer lines 136 and improving the area utilization rate of the second fan-out region BB2 (including the first sub-fan-out region BB21 and the second sub-fan-out region BB22).

[0389] In some examples, as shown in Figure 48, the at least one gate metal layer Gate includes a first gate metal layer Gate1 and a second gate metal layer Gate2. The first gate metal layer Gate1 is closer to the base 102 than the second gate metal layer Gate2.

[0390] Multiple first sub-fanout lines 133, multiple second sub-fanout lines 138, and multiple second fanout lines 132 are located in the first gate metal layer Gate 1 and the second gate metal layer Gate 2. Illustratively, among the multiple first sub-fanout lines 133 and multiple second fanout lines 132 (third sub-fanout line 1321) located in the first fanout region BB1, any two adjacent fanout lines 130 are located in different gate metal layers Gate. Among the multiple second sub-fanout lines 138 and multiple second fanout lines 132 (fourth sub-fanout line 1322) located in the second fanout region BB2, any two adjacent fanout lines 130 are located in different gate metal layers Gate.

[0391] By installing them in this manner, crosstalk between two adjacent fan-out lines 130 (for example, multiple first sub-fan-out lines 133 and multiple third sub-fan-out lines 1321 located in the first fan-out region BB1, or multiple second sub-fan-out lines 138 and multiple fourth sub-fan-out lines 1322 located in the second fan-out region BB2) is reduced, and the reliability of signal transmission is improved.

[0392] Furthermore, the orthographic projection on the base 102 can reduce the distance between two adjacent fan-out lines 130 (for example, multiple first sub-fan-out lines 133 and multiple third sub-fan-out lines 1321 located in the first fan-out region BB1, or multiple second sub-fan-out lines 138 and multiple fourth sub-fan-out lines 1322 located in the second fan-out region BB2). This reduces the space occupied along the second direction Y of the multiple fan-out lines 130, reduces the width of the first fan-out region BB1 and the second fan-out region BB2, and enables a narrower bezel for the display panel 210.

[0393] In some examples, the plurality of conductive layers 103 include a light-shielding metal layer (not shown, for example, located between the active layer 1031 and the base 102 to prevent reflection of light rays to the channel region of the active layer 1031), at least one active layer 1031, at least one source / drain metal layer SD, a plurality of gate metal layers Gate, at least one transparent wire layer (not shown), and an anode layer AND.

[0394] The transfer line 136 is located in at least one of the following layers: a light-shielding metal layer, at least one active layer 1031, at least one source / drain metal layer SD, one of a plurality of gate metal layers Gate, at least one transparent conductor layer, and an anode layer. The plurality of second fan-out lines 132 are located in at least one of the plurality of gate metal layers Gate.

[0395] By installing in this manner, the orthographic projection on the base 102 can further reduce the distance between two adjacent transfer lines 136, thereby reducing the space occupied along the second direction Y of the multiple transfer lines 136 and improving the area utilization rate of the second fan-out area BB2 (including the first sub-fan-out area BB21 and the second sub-fan-out area BB22). Furthermore, the orthographic projection on the base 102 can reduce the distance between two adjacent fan-out lines 130 (for example, multiple first sub-fan-out lines 133 and multiple third sub-fan-out lines 1321 located in the first fan-out area BB1, or multiple second sub-fan-out lines 138 and multiple fourth sub-fan-out lines 1322 located in the second fan-out area BB2), thereby enabling a narrower bezel for the display panel 210.

[0396] In some examples, a plurality of gate metal layers Gate includes a first gate metal layer Gate1, a second gate metal layer Gate2, and a third gate metal layer (not shown). The third gate metal layer may be located on the side of the second gate metal layer Gate2 away from the first gate metal layer Gate1. At least one source / drain metal layer SD includes a first source / drain metal layer SD1, a second source / drain metal layer SD2, and a third source / drain metal layer (not shown). The third source / drain metal layer may be located on the side of the second source / drain metal layer SD2 away from the first source / drain metal layer SD1.

[0397] The transfer line 136 is located in at least one of the following layers: a light-shielding metal layer, at least one active layer 1031, a first source / drain metal layer SD1, a second source / drain metal layer SD2, a third source / drain metal layer, a third gate metal layer, at least one transparent wire layer, and an anode layer AND. Multiple second fan-out lines 132 are located alternately in the first gate metal layer Gate1 and the second gate metal layer Gate2.

[0398] By installing in this manner, the orthographic projection on the base 102 can further reduce the distance between two adjacent transfer lines 136, thereby reducing the space occupied along the second direction Y of the multiple transfer lines 136 and improving the area utilization rate of the second fan-out area BB2 (including the first sub-fan-out area BB21 and the second sub-fan-out area BB22). Furthermore, the orthographic projection on the base 102 can reduce the distance between two adjacent fan-out lines 130, enabling a narrower bezel for the display panel 210.

[0399] As can be seen from the above, in some examples, if the transfer line 136 is located in the first fan-out area BB1, the transfer line 136 may be a U-shaped transfer line. In some other examples, if the transfer line 136 is located in the second fan-out area BB2, the transfer line 136 may be a U-shaped transfer line.

[0400] Exemplary, the orthographic projection of the transfer line 136 at the base 102 is U-shaped or nearly U-shaped, with the opening facing the bending region CC. One end of the transfer line 136 is electrically connected to the first sub-fanout line 133, and the other end of the transfer line 136 is electrically connected to the second sub-fanout line 138. It is understood that if the transfer line 136 is located in the second fanout region BB2, the transfer line 136 may be electrically connected to the first sub-fanout line 133 via the first signal transmission line 135 and the second signal transmission line 137, etc.

[0401] As described above, the display board 100 provided by some embodiments of this disclosure reduces the width of the side frame of the display panel 210 using a FIAA or partial FIAA method, and positions the transfer line 136 of the first fan-out line 131 on a different conductive layer 103 from the plurality of second fan-out lines 132, and installs the transfer line 136 to span at least one of the second fan-out lines 132, so that the arrangement order of the plurality of fan-out lines 130 (including the first fan-out line 131 and the second fan-out line 132) along the first direction of the ends away from the display area AA is the same as the arrangement order of the plurality of data lines 110 along the first direction X. As a result, the driver IC can sequentially provide electrical signals to the plurality of data lines 110, there is no need to redevelop the driver IC, and the cost of the display board 100 can be reduced in order to achieve a narrow bezel for the display board 100.

[0402] The display device 200 provided by some embodiments of this disclosure comprises the above-described display board 100 and therefore has all the above-described beneficial effects, which will not be repeated here.

[0403] The foregoing describes only specific embodiments of the Disclosure, and the scope of protection of the Disclosure is not limited thereto. Any modifications or substitutions that are readily conceivable to a person skilled in the art within the technical scope of the Disclosure should be included within the scope of protection of the Disclosure. Accordingly, the scope of protection of the Disclosure should be governed by the scope set forth in the claims.

Claims

1. A display board, The display board has a display area and a fan-out area, the fan-out area is adjacent to one edge of the display area, and the display board is Bass and, Multiple conductive layers located on the same side of the base and installed in a stacked manner, Equipped with, The plurality of conductive layers include: A plurality of data lines, spaced apart along a first direction and each extending along a second direction, wherein the second direction intersects the first direction, and the plurality of data lines include a plurality of first data lines and a plurality of second data lines, wherein the plurality of first data lines are located in two edge regions along the first direction of the display area, and the plurality of second data lines are located in a central region along the first direction of the display area. Multiple connection lines, wherein the first end of one connection line is located in the edge region along the first direction of the display area and is electrically connected to one first data line, the second end of the connection line extends to a position close to the fan-out region in the central region of the display area, the connection line straddles at least one data line and is insulated from the straddled data line, and the second end of at least one connection line connects to multiple connection lines located between two adjacent second data lines. A plurality of fan-out lines located in the fan-out region, the plurality of fan-out lines including a plurality of first fan-out lines and a plurality of second fan-out lines, the first fan-out lines being electrically connected to the second end of the connecting line, and the second fan-out lines being electrically connected to the end of the second data line closest to the fan-out region, It includes, The display substrate further has a bent region, the fan-out region includes a first fan-out region and a second fan-out region, the first fan-out region is closer to the display region than the second fan-out region, and the bent region is located between the first fan-out region and the second fan-out region. The first fan-out line includes a transfer line, the transfer line is located in the second fan-out region, the transfer line is located in a different conductive layer from the plurality of second fan-out lines, and the arrangement order along the first direction of the ends of the plurality of fan-out lines that move away from the display region is the same as the arrangement order along the first direction of the plurality of data lines. A display board characterized by the following features.

2. The plurality of connecting lines are electrically connected to the plurality of first data lines in a one-to-one correspondence, and the plurality of second fan-out lines are electrically connected to the plurality of second data lines in a one-to-one correspondence. The display board according to feature 1.

3. The plurality of first data lines include a plurality of first type first data lines and a plurality of second type first data lines, and the plurality of second fan-out lines include a plurality of first type second fan-out lines and a plurality of second type second fan-out lines. The plurality of first type first data lines are electrically connected to the plurality of connecting lines in a one-to-one correspondence. The plurality of first-type second fan-out lines are electrically connected in a one-to-one correspondence with the plurality of second data lines, and the plurality of second-type second fan-out lines are electrically connected in a one-to-one correspondence with the plurality of second-type first data lines. The display board according to feature 1.

4. The display board further comprises a plurality of subpixels, the plurality of subpixels arranged in a plurality of columns along the first direction and in a plurality of rows along the second direction, and each column of subpixels is electrically connected to a single data line. Between two adjacent Type 2 Type 1 data lines, two Type 1 Type 1 data lines are provided. Of the two first data lines of type 1, one of the first data lines of type 1 is electrically connected to a row of first subpixels, the first subpixels include a subpixel that emits red light and a subpixel that emits blue light, and the second data line of type 2 is electrically connected to a row of subpixels that emit green light. The display board according to feature 3.

5. The first fan-out line is, A first sub-fan out wire is electrically connected to the second end of the aforementioned connecting wire, A plurality of adapters, including a first adapter located in a region close to the bending region of the first fan-out region and a second adapter located in a region close to the bending region of the second fan-out region, wherein the first adapter is electrically connected to the end of the first sub-fan-out line away from the connecting line, and the transfer line is electrically connected to the second adapter, A first signal transmission line that passes through the bending region and connects the first adapter and the second adapter, Further including, A display board according to any one of features 1 to 4.

6. The center line of the display board is located at the center of the display board along the first direction and is parallel to the base. The portion of the second fan-out line located in the first fan-out region is defined as a third sub-fan-out line, and the third sub-fan-out line and the first sub-fan-out line are arranged along the first direction. For the third sub-fanout line and two adjacent fanout lines among the first sub-fanout lines, at least a portion of the line segments in the fanout line moving away from the center line curves toward the fanout line closer to the center line. The display board according to feature 5.

7. The second fan-out region includes a first sub-fan-out region and a second sub-fan-out region, wherein the first sub-fan-out region is closer to the bending region than the second sub-fan-out region, and at least a portion of the transfer line is located in the first sub-fan-out region. The plurality of conductive layers are The system further comprises an isolation section located in the first sub-fan-out region and situated between the transfer line and the plurality of second fan-out lines. The display board according to feature 5.

8. The first fan-out line is, The system further includes a second signal transmission line connected between the second adapter and the transfer line, The orthographic projection of the base of the second signal transmission line is located between the orthographic projection of the base of the isolation portion and the edge of the first sub-fan-out region that is closer to the bending region. The display board according to feature 7.

9. The second signal transmission line approaches the center line of the display board from one end close to the display area to the other end away from the display area. The display board according to feature 8.

10. Each of the first fan-out lines includes one of the second signal transmission lines, and of two adjacent second signal transmission lines, at least a portion of the line segment of the second signal transmission line that is away from the center line curves toward the second signal transmission line that is closer to the center line. The display board according to feature 8.

11. The end of the transfer line that separates from the first sub-fanout line extends to the second sub-fanout region. The display board according to feature 7.

12. The first fan-out line further includes a second sub-fan-out line, the second sub-fan-out line is located in a different conductive layer from the transfer line, and the isolation portion is located between the transfer line and the second sub-fan-out line. The end of the transfer line away from the first sub-fanout line is located around the isolation section and is electrically connected to the second sub-fanout line, and the end of the second sub-fanout line away from the transfer line extends to the second sub-fanout region. The display board according to feature 7.

13. The position where the transfer line connects to the second sub-fanout line is defined as the first connection point, and the orthographic projection of the base of the transfer line near the first connection point and beyond the isolation section substantially overlaps with the orthographic projection of the base of the second sub-fanout line near the first connection point and beyond the isolation section. The display board according to feature 12.

14. Each of the first fan-out lines includes a transfer line and a second sub-fan-out line electrically connected to the transfer line, the position where the transfer line is connected to the second sub-fan-out line is defined as a first connection point, and the portion of the plurality of transfer lines that is close to the first connection point and beyond the isolation portion is located on at least one side along the first direction of the isolation portion. The portions of the plurality of transfer lines located on the same side along the first direction of the isolation portion that are close to the first connection point and extend beyond the isolation portion are defined as first extension portions, the plurality of first extension portions are arranged sequentially along the second direction, and in the second direction, the length of the plurality of first extension portions increases and then decreases, or the length of the plurality of first extension portions decreases and then increases. The display board according to feature 13.

15. The orthographic projection at the base of the transfer line is U-shaped or approximately U-shaped, with the opening facing the bending region. The display board according to feature 12.

16. The plurality of conductive layers are At least one gate metal layer, A first source-drain metal layer and a second source-drain metal layer, wherein both the first source-drain metal layer and the second source-drain metal layer are located on the side away from the base of the at least one gate metal layer, and the first source-drain metal layer is closer to the base than the second source-drain metal layer. Includes, The first sub-fanout line, the second sub-fanout line, and the plurality of second fanout lines are located in the at least one gate metal layer, the isolation portion is located in the first source / drain metal layer, and the transfer line is located in the second source / drain metal layer. The display board according to feature 13.

17. The isolation section includes at least one power signal line, The display board according to feature 13.

18. The second fan-out region includes a first sub-fan-out region and a second sub-fan-out region, wherein the first sub-fan-out region is closer to the bending region than the second sub-fan-out region, and the transfer line is located in the second sub-fan-out region. The display board according to feature 5.

19. The aforementioned transfer line is A first sub-transfer line is electrically connected to the first sub-fan-out line and crosses at least one of the second fan-out lines, A second sub-transfer line electrically connected to the end of the first sub-transfer line away from the first sub-fan-out line, wherein the orthographic projection of at least one of the second sub-transfer lines at its base is located between the orthographic projections at the bases of two adjacent second fan-out lines, including, The display board according to feature 18.

20. The center line of the display board is located at the center of the display board along the first direction and is parallel to the base. The second sub-fan-out region includes two first regions, the two first regions located on either side of the center line, and at least one of the first regions includes a plurality of sub-regions, the plurality of sub-regions including a first sub-region, a second sub-region, and a third sub-region, the first sub-region, the second sub-region, and the third sub-region are arranged in order along the direction from the edge of the first region away from the center line toward the center line. The end of the first subtransfer line that is electrically connected to the first subfanout line is located in at least one of the first subregion, the second subregion, and the third subregion, and the second subtransfer line is located in the first subregion. The display board according to feature 19.

21. The ends of the multiple first subtransfer lines that are electrically connected to the first subfanout lines are located in different subregions of the first region. The display board according to claim 20.

22. The ends of the multiple first subtransfer lines that are electrically connected to the first subfanout lines are evenly distributed in the first subregion, the second subregion, and the third subregion. The display board according to claim 20.

23. The outer shape of the region where the orthographic projections of all the first subtransfer lines within the first region are located on the base is trapezoidal or triangular. The display board according to claim 20.

24. The second sub-fan-out region includes a second region and a third region, the second region being closer to the first sub-fan-out region than the third region, and the length of the edge of the second region closer to the first sub-fan-out region being greater than the length of the edge of the second region further away from the first sub-fan-out region. The first sub-transfer line extends along the first direction, the second sub-transfer line extends along the second direction, at least one of the first sub-transfer lines is located in the second region, and at least one of the second sub-transfer lines extends from the second region to the third region. The display board according to feature 19.

25. Along the direction from the first sub-fan-out region to the second sub-fan-out region, the distance between at least two adjacent first sub-transfer lines gradually decreases. The display board according to feature 19.

26. The first fan-out line further includes a second sub-fan-out line, the second sub-fan-out line is located in a different conductive layer from the transfer line, and the second sub-fan-out line is located in the second sub-fan-out region and is electrically connected to the end of the transfer line away from the first sub-fan-out line. The display board according to feature 19.

27. The orthographic projection of the base of the transfer line is U-shaped or substantially U-shaped with the opening facing the bending region, one end of the transfer line is electrically connected to a first sub-fanout line, and the other end of the transfer line is electrically connected to a second sub-fanout line. The display board according to feature 26.

28. The plurality of conductive layers are At least one gate metal layer, A first source-drain metal layer and a second source-drain metal layer, wherein both the first source-drain metal layer and the second source-drain metal layer are located on the side away from the base of the at least one gate metal layer, and the first source-drain metal layer is closer to the base than the second source-drain metal layer. Includes, The first sub-fanout line, the second sub-fanout line, and the plurality of second fanout lines are located in the at least one gate metal layer, and the transfer lines are alternately located in the first source-drain metal layer and the second source-drain metal layer. The display board according to feature 26.

29. The at least one gate metal layer includes a first gate metal layer and a second gate metal layer, wherein the first gate metal layer is closer to the base than the second gate metal layer. The plurality of first sub-fanout lines, the plurality of second sub-fanout lines, and the plurality of second fanout lines are located in the first gate metal layer and the second gate metal layer, Of the plurality of first sub-fanout lines and the plurality of second fanout lines, any two adjacent fanout lines are located in different gate metal layers, and of the plurality of second sub-fanout lines and the plurality of second fanout lines, any two adjacent fanout lines are located in different gate metal layers. The display board according to feature 16.

30. The plurality of conductive layers include a light-shielding metal layer, at least one active layer, at least one source / drain metal layer, a plurality of gate metal layers, at least one transparent wire layer, and an anode layer. The transfer line is located in at least one of the following layers: the light-shielding metal layer, the at least one active layer, the at least one source / drain metal layer, one gate metal layer among the plurality of gate metal layers, the at least one transparent conductor layer, and the anode layer; and the plurality of second fan-out lines are located in at least one of the plurality of gate metal layers. The display board according to feature 13.

31. A display device, A display board comprising the display board according to any one of claims 1 to 4, A display device characterized by the following features.

Images