Expansion-controlled structure for direct bonding and method for forming same

By using elements with conductive features having distinct thermal expansion properties and controlled recess depths, the challenges of forming reliable conductive pads for semiconductor bonding are addressed, resulting in improved bonding strength and reliability.

JP2025514099APending Publication Date: 2025-05-02ADEIA SEMICONDUCTOR BONDING TECHNOLOGIES INC
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Patent Information

Application Number
JP2024562209
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-04-25
Filing Date
2023-04-21
Publication Date
2025-05-02

AI Technical Summary

Technical Problem

Existing methods for forming conductive pads in semiconductor devices for reliable bonding are inadequate, leading to issues with bonding strength and reliability due to non-uniform stresses and void formation.

Method used

The development of elements with conductive features that have a central portion and an edge portion with different coefficients of thermal expansion, recessed to specific depths, allowing for controlled expansion during annealing to form a uniform bond interface.

Benefits of technology

This approach enables the formation of reliable bonded structures with minimal stress and voids, improving the bonding strength and reliability between semiconductor devices.

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Abstract

Disclosed are an element, a bonded structure including the element, and a method of forming the element and the bonded structure. The element may have a non-conductive region with a cavity. The element may have a conductive feature formed in the cavity. The conductive feature includes a center portion and an edge portion with a first and a second coefficient of thermal expansion, respectively. The center portion and the edge portion are recessed by a first depth and a second depth, respectively, relative to a contact surface of the non-conductive region. The first coefficient of thermal expansion may be at least 5% higher than the second coefficient of thermal expansion. The bonded structure may include a second element comprising the element and a second non-conductive region and a second conductive feature. The conductive interface between the first and second conductive features has a center region and an edge region. A vertical cross section of the bonded structure has more voids at or near the edge region than at or near the center region.
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Description

[Technical field]

[0001] The technical field relates to devices with directly bondable pre-processed, expansion-controlled conductive features.

[0002] [Citation to Related Applications] This application claims priority to U.S. Provisional Patent Application No. 63 / 334,580, filed April 25, 2022, which is incorporated by reference in its entirety. [Background technology]

[0003] Semiconductor devices, such as integrated device dies or chips, may be mounted or stacked on other devices. For example, the semiconductor device may be mounted on a carrier, such as a package substrate, an interposer, a reconstituted wafer or device, or the like. As another example, a semiconductor device may be stacked on top of another semiconductor device, such as a first integrated device die stacked on a second integrated device die. Each of the semiconductor devices may have conductive pads that mechanically and electrically bond the semiconductor devices to one another. There continues to be a need for improved methods of forming conductive pads for reliable bonding. Summary of the Invention

[0004] An element, a bonded structure including the element, and methods of forming the element and the bonded structure are provided. The element may have a non-conductive region with a cavity. The element may have a conductive feature formed in the cavity. The conductive feature has a center portion and an edge portion with a first and a second coefficient of thermal expansion, respectively. The center portion and the edge portion are recessed by a first depth and a second depth, respectively, relative to a contact surface of the non-conductive region. The first coefficient of thermal expansion may be at least 5% higher than the second coefficient of thermal expansion. The bonded structure may include the element and a second element with a second non-conductive region and a second conductive feature. The conductive interface between the first and second conductive features has a center region and an edge region. A vertical cross section of the bonded structure has more voids at or near the edge region than at or near the center region. [Brief description of the drawings]

[0005] [Figure 1A] FIG. 2 is a schematic cross-sectional side view of two elements prior to bonding. [Figure 1B] FIG. 1B is a schematic cross-sectional side view of the two elements shown in FIG. 1A after bonding. [Figure 2A] FIG. 1 shows a top-down electron backscatter diffraction (EBSD) image of in-substrate copper pads formed on a silicon substrate of the device. [Figure 2B] FIG. 2B is a simplified graph showing the protrusion height (protrusion amount) of a cross section of a portion of the element shown in FIG. 2A after annealing. [Figure 3A] 1 is a schematic cross-sectional side view of at least a portion of a device according to one embodiment. [Figure 3B] FIG. 3B is a schematic plan view of the device of FIG. 3A. [Figure 4A-4B] FIG. 4A is a schematic cross-sectional side view of one embodiment of a device, and FIG. 4B is an enlarged view of a portion of the device shown in FIG. 4A. [Figure 4C] 1 is a schematic cross-sectional side view of an element according to one embodiment; [Figure 5A] 1 is a schematic cross-sectional side view of an element according to one embodiment; [Figure 5B] 1 is a schematic cross-sectional side view of an element according to one embodiment; [Figure 5C] 1 is a schematic cross-sectional side view of an element according to one embodiment; [Figure 5D] 1 is a schematic cross-sectional side view of an element according to one embodiment; [Figures 6A-6E] 6A-6E are diagrams illustrating various steps in a process for manufacturing the device shown in FIG. 5A. [Figure 7A-7B] FIG. 7A is a schematic cross-sectional side view of at least a portion of a bonded structure including a first element and a second element, and FIG. 7B is an enlarged view of a portion of the bonded structure shown in FIG. 7A. [Figure 8A-8E] FIG. 8A is a cross-sectional side view of the conductive feature before annealing, and FIGS. 8B-8E are cross-sectional side views of the conductive feature shown in FIG. 8A after annealing. [Figure 9A-9E] FIG. 9A is a cross-sectional side view of the conductive feature before annealing, and FIGS. 9B-9E are cross-sectional side views of the conductive feature shown in FIG. 9A after annealing. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0006] Various embodiments disclosed herein relate to a direct bonded structure in which two or more elements can be directly bonded together without an intervening adhesive. FIGS. 1A and 1B are schematic illustrations of a process for forming a direct bonded structure without an intervening adhesive, according to some embodiments. In FIGS. 1A and 1B, a bonded structure 100 has two elements 102, 104 that can be directly bonded together without an intervening adhesive. Two or more semiconductor elements (e.g., integrated device dies, wafers, etc.) 102, 104 can be stacked together or bonded together to form the bonded structure 100. A conductive feature 106a (e.g., a contact pad, an exposed end of a via (e.g., TSV), or a through-substrate electrode) of a first element 102 can be electrically connected to a corresponding conductive feature 106b of a second element 104. Any suitable number of elements can be stacked within the bonded structure 100. For example, a third element (not shown) can be stacked on the second element 104, a fourth element (not shown) can be stacked on the third element, etc. Additionally or alternatively, one or more additional elements (not shown) can be stacked laterally adjacent to one another along the first element 102. In some embodiments, the laterally stacked additional elements can be smaller than the second element. In some embodiments, the laterally stacked additional elements can be 1 / 2 the size of the second element.

[0007] In some embodiments, the elements 102, 104 are directly bonded to each other without adhesive. In various embodiments, a non-conductive field region comprising a non-conductive material or dielectric can serve as a first bonding layer 108a of the first element 102 that can be directly bonded to a corresponding non-conductive field region that comprises a non-conductive material or dielectric that serves as a second bonding layer 108b of the second element 104 without adhesive. The non-conductive bonding layers 108a, 108b can be provided on the device portions 110a, 110b, e.g., on the front surfaces 114a, 114b of the semiconductor (e.g., silicon) portions of the elements 102, 103, respectively. Active devices and / or circuitry can be patterned and / or otherwise provided in or on the device portions 110a, 110b. The active devices and / or circuitry may be located at or near the front surfaces 114a, 114b of the device portions 110a, 110b and / or at or near the opposite back surfaces 115a, 115b of the device portions 110a, 110b. The non-conductive material may be referred to as a non-conductive bonding region or bonding layer 108a of the first element 102. In some embodiments, the non-conductive bonding layer 108a of the first element 102 may be directly bonded to a corresponding non-conductive bonding layer 108b of the second element 104 using dielectric-dielectric bonding techniques. For example, non-conductive or dielectric-dielectric bonds can be formed without adhesives using direct bonding techniques as disclosed in at least U.S. Patent Nos. 9,564,414, 9,391,143, and 10,434,749, which are incorporated by reference in their entirety for all purposes. It should be appreciated that in various embodiments, the conductive bonding layers 108a and / or 108b may be comprised of a non-conductive material, such as a dielectric, e.g., silicon oxide, or an undoped semiconductor material, e.g., undoped silicon.Dielectric bonding surfaces or materials suitable for direct bonding include, but are not limited to, inorganic dielectrics such as silicon oxide, silicon nitride, or silicon oxynitride, or may include materials comprised of carbon such as silicon carbide, silicon oxycarbonitride, low K dielectrics, SICOH dielectrics, silicon carbonitride, or diamond-like carbon or diamond surfaces. Such carbon-containing ceramic materials may be considered inorganic despite the carbon content.

[0008] In various embodiments, the direct hybrid bond can be formed without an intervening adhesive. For example, the non-conductive bonding surfaces 112a, 112b can be polished to a high degree of smoothness. The bonding surfaces 112a, 112b can be cleaned and exposed to plasma and / or etchants to activate the surfaces 112a, 112b. In some embodiments, the surfaces 112a, 112b can be terminated with species after or during activation (e.g., during a plasma and / or etch process). Without being bound by theory, in some embodiments, an activation process can be performed to break chemical bonds at the bonding surfaces 112a, 112b, and the termination process can provide additional chemical species at the bonding surfaces 112a, 112b that improve the bonding energy during direct bonding. In some embodiments, activation and termination can be performed in the same step, for example by plasma exposure to both activate and terminate the bonding surfaces 112a, 112b. In other embodiments, the bonding surfaces 112a, 112b can be terminated in a separate process to provide additional species for direct bonding. In various embodiments, the termination species can include nitrogen. Additionally, in some embodiments, the bonding surfaces 112a, 112b can be exposed to a fluorine-containing plasma. Additionally, in some embodiments, the bonding surfaces 112a, 112b can be exposed to fluorine. For example, there can be one or many regions of increased fluorine concentration at or near the bonding interface 118 between the first element 102 and the second element 104. Thus, in the direct bonded structure 100, the bonding interface 118 between the two non-conductive materials (e.g., bonding layers 108a, 108b) can comprise an extremely smooth interface having a higher nitrogen and / or fluorine content at the bonding interface 118 than within the bonding layers 108a or 108b.In some embodiments, the bonding layers 108a, 108b may include nitrogen atoms after activation and termination, and an oxygen peak may be provided at or near the bonding interface 118 between the first element 102 and the second element 104. Additional examples of activation and / or termination processes may be found throughout U.S. Patent Nos. 9,564,414, 9,391,143, and 10,434,749, each of which is incorporated by reference and incorporated herein in its entirety for all purposes.

[0009] In various embodiments, the conductive feature 106a of the first element 102 may also be directly bonded to the corresponding conductive feature 106b of the second element 104. For example, hybrid bonding techniques may be used to provide conductor-conductor direct bonds along a bonding interface 118 that includes a covalently direct bonded non-conductive-non-conductive (dielectric-dielectric) surface that has been pretreated as described above. In various embodiments, the conductor-conductor (e.g., conductive feature 106a-conductive feature 106b) direct bonds and dielectric-dielectric hybrid bonds may be formed using direct bonding techniques disclosed in at least U.S. Patent Nos. 9,716,033 and 9,852,988, each of which is incorporated by reference herein in its entirety for all purposes.

[0010] For example, the non-conductive (e.g., dielectric) bonding surfaces 112a, 112b (e.g., inorganic dielectric surfaces) may be pretreated as described above and then directly bonded to one another without an intervening adhesive. The conductive contact features (e.g., conductive features 106a, 106b that may be at least partially surrounded by a non-conductive dielectric field region in the bonding layers 108a, 108b) may also be directly bonded to one another without an intervening adhesive. In various embodiments, the conductive contact features 106a, 106b may comprise separate pads at least partially embedded in the non-conductive field regions. In some embodiments, the conductive contact features may comprise exposed contact surfaces of through-substrate vias (TSVs). In some embodiments, the conductive contact features 106a, 106b may be recessed below the dielectric field region or outer (e.g., upper) surface (non-conductive bonding surface 112a, 112b) of the non-conductive bonding layer 108a, 108b, e.g., by less than 30 nm, less than 20 nm, less than 15 nm, or less than 10 nm, e.g., within a range of 2 nm to 20 nm, or 4 nm to 10 nm. In various embodiments, prior to direct bonding, the recesses of the opposing elements may be dimensioned such that the overall gap between the opposing conductive features or contact pads is less than 15 nm or less than 10 nm. The non-conductive bonding layers 108a, 108b may be direct bonded together in some embodiments at room temperature without a contact agent, after which the bonded structure 100 may be annealed. Upon annealing, the conductive features 106a, 106b may expand in a direction perpendicular to the bonding surfaces 112a, 112b and contact one another, thereby forming a direct metal-metal bond.Beneficially, a high density of conductive features 106a, 106b can be connected together (e.g., at a small or fine pitch for a regular array) across the direct bond interface 118 using Direct Bond Interconnect, or DBI®, technology commercially available from Adeia, Inc., San Jose, Calif. In some embodiments, the pitch of the conductive features 106a, 106b, e.g., the conductive traces embedded in the bonding surface of one of the bonded elements, can be less than 40 microns, less than 10 microns, or even less than 2 microns. For some applications, the ratio of the pitch of the conductive features 106a, 106b to one of the dimensions of the bond pad (e.g., the diameter) is less than 5, less than 3, or even desirably less than 2 in some cases. In other applications, the width of the conductive traces embedded in the bonding surface of one of the bonded elements can be in the range of 0.3 microns to 20 microns, e.g., 0.3 microns to 3 microns. In various embodiments, the conductive features 106a, 106b and / or traces may be made of copper, although other metals may be suitable.

[0011] Thus, in a direct bonding process, the first element 102 can be directly bonded to the second element 104 without an intervening adhesive. In some configurations, the first element 102 can be a singulated element, such as a singulated integrated device die. In other configurations, as shown in Figures 1A and 1B, the first element 102 can be a carrier or substrate (e.g., a wafer) that includes a plurality (e.g., tens, hundreds, or more) of device regions that, when singulated, form a plurality of integrated device dies. Similarly, the second element 104 can be a singulated element, such as a singulated integrated device die, as shown in Figures 1A and 1B. In other configurations, the second element 104 can be a carrier or substrate (e.g., a wafer). The embodiments disclosed herein can be utilized in wafer-wafer, die-die, and die-wafer bonding techniques. In a wafer-to-wafer (W2W) process, two or more wafers may be directly bonded together (e.g., direct hybrid bonding) and then singulated using a suitable singulation process. After singulation, the sides of the singulated structure (e.g., the sides of the two bonded elements) may be substantially coplanar with one another and may include indicia indicative of the singulation process (e.g., saw marks if a saw-based singulation process is used).

[0012] As described herein, the first element 102 and the second element 104 can be directly bonded together without adhesive, which is different from a deposition process. In one application, the width of the first element 102 in the bonded structure is approximately the same as the width of the second element 104. In some other embodiments, the width of the first element 102 in the bonded structure may be different from the width of the second element 104. Similarly, the width or area of ​​the larger element in the bonded structure may be at least 10% larger than the width or area of ​​the smaller element. Thus, the first and second elements may be comprised of non-deposited elements. Furthermore, unlike deposited layers, the direct bonded structure may include defect areas along the bond interface 118 where nanoscale voids (nanovoids) exist. The nanovoids may form due to activation (e.g., exposure to plasma) of the bonding surfaces 112a, 112b. As discussed above, the bond interface 118 may include a condensation of material resulting from the activation and / or final chemical treatment process. For example, in embodiments utilizing nitrogen plasma for activation, a nitrogen peak may form at the bond interface 118. The nitrogen peak may be detectable using secondary ion mass spectrometry (SIMS). In various embodiments, for example, a nitrogen termination treatment (e.g., exposing the bonding layer to a nitrogen-containing plasma) may replace OH groups on a hydrolyzed (OH-terminated) surface with NH2 molecules, resulting in a nitrogen-terminated surface. In embodiments utilizing oxygen plasma for activation, an oxygen peak may form at the bond interface 118. In some embodiments, the bond interface 118 may be comprised of silicon oxynitride, silicon oxycarbonitride, or silicon carbonitride. As described herein, the direct bond includes a covalent bond, which is stronger than a van der Waals bond. The bonding layers 108a, 108b may also have a polished surface that is planarized to a high degree of smoothness.

[0013] In various embodiments, the metal-metal bond between the contact pads 106a, 106b may be bonded such that the copper grains grow into one another across the bonding interface 118. In some embodiments, the copper may have grains oriented along the 111 crystal plane to improve diffusion of the copper across the bond interface 118. The bonding interface 118 may extend substantially completely to at least a portion of the bonded conductive features 106a, 106b, such that there is substantially no gap between the non-conductive bonding layers 108a, 108b at or near the bonded conductive features 106a, 106b. In some embodiments, a barrier layer (which may include, for example, copper) may be provided under the conductive features 106a, 106b. However, in other embodiments, there may not be a barrier layer underneath the conductive features 106a, 106b, as described, for example, in U.S. Pat. No. 11,195,748, the entire contents of which are incorporated herein by reference for all purposes.

[0014] Beneficially, the hybrid bonding techniques described herein allow for very fine pitches between adjacent contact pads 106a or 106b and / or small pad sizes. For example, in various embodiments, the pitch p between adjacent conductive features 106a (or 106b) (i.e., the edge-to-edge or center-to-center distance as shown in FIG. 1A) may be in the range of 0.5 microns to 50 microns, 0.75 microns to 25 microns, 1 micron to 25 microns, 1 micron to 10 microns, or 1 micron to 5 microns. Furthermore, the larger lateral dimension (e.g., pad diameter) may also be small, e.g., in the range of 0.25 microns to 30 microns, 0.25 microns to 5 microns, or 0.5 microns to 5 microns.

[0015] The contact pad may have a central portion including highly oriented grains generally oriented vertically along the 111 crystal orientation, and an edge portion near or along the sidewall of the cavity including randomly oriented, less oriented grains with no predominant orientation (e.g., a mixture of 111, 110, 311, 511, and 100 orientations). The difference in crystal orientation may be due to the process by which the contact pad is formed in the cavity (e.g., an electroplating process). In such contact pads, the edge portion may protrude a greater distance above the contact surface than the central portion before, during, and / or after the annealing process. For example, the edge portion may protrude a greater distance due to expansion of the contact pad during the annealing process. Non-uniform protrusion heights across different portions of the contact surface of the conductive structure may result in non-uniform stresses and, therefore, non-uniform bond strengths. When a contact pad is bonded to another contact pad, voids may form on the center portion due to uneven protrusion of the center portion and edge portion. When a contact pad of an element is bonded to another contact pad of another element with a mismatch (e.g., lateral offset) between the two contact pads, the edge portion may protrude and press against the other element, which may cause debonding and / or electrical connection failure of the two elements. Thus, a contact pad with a center portion and edge portions that protrude more than the center portion upon annealing may reduce the reliability of the bond between the contact pad and another pad.

[0016] FIG. 2A shows a top-down electron backscatter diffraction (EBSD) image of a copper pad 10 formed in a silicon substrate 12 of a device 13. The copper pad 10 has a central portion 14 and an edge portion 16 located around the central portion 14. A border region 18 between the central portion 14 and the edge portion 16 is shown in FIG. 2A with a dashed line. The central portion 14 may have grains generally oriented vertically (e.g., approximately perpendicular to the surface of the conductive feature) along the 111 crystallographic orientation, while the edge portion has grains oriented more randomly (e.g., a mixture of 111, 110, 311, 511, and 100 orientations) with no significant orientation. In some embodiments, at least 50% of the grains at the central portion 14 exhibit twins or highly oriented twins. Twins are a type of grain structure in which two or more regions or domains of a crystal lattice are oriented in mirror image positions relative to each other, separated by a twin boundary. For example, the central portion 14 has micrograins oriented mostly vertically along the 111 crystallographic direction, while the edge portion 16 has nanostructured (e.g., fine grain structure) grains oriented without any noticeable orientation. As shown in Figure 2A, the edge portion 16 may have grains oriented in various crystallographic directions. The difference in crystallographic orientation between the central portion 14 and the edge portion 16 may result from a process (e.g., an electroplating process) for forming the conductive features (e.g., copper pads 10) in the cavities formed in the silicon substrate 12.

[0017] FIG. 2B is a graph showing the protrusion height of a cross section of a portion of the device 13 shown in FIG. 2A after annealing. In the graph of FIG. 2B, the heights of different locations of the cross section are measured relative to the surface of the silicon substrate 12 prior to annealing at temperatures between 200° C. and 450° C. As shown in the graph of FIG. 2B, the average protrusion height of the center portion 14 is about 1 μm, and the average protrusion height of the edge portion 16 is about 1.4 μm. The difference in height between the protrusions of the center portion 14 and the edge portion 16 may result in excessive stress. When the copper pad 10 is bonded to another contact pad, voids may form on the center portion 14 due to the uneven protrusion between the center portion 14 and the edge portion 16. When the device 13 is bonded to another device, the excessive stress and voids may cause unreliable bonding between the devices.

[0018] Various embodiments disclosed herein relate to controlling the height of protrusions on different locations of a conductive feature in an element formed by an annealing process. The element may include a non-conductive region with a cavity and a conductive feature at least partially disposed within the cavity. The conductive feature may have a center portion and an edge portion. In some embodiments, the edge portion may be at least partially disposed between the center portion and a sidewall of the cavity. For example, the edge portion may be disposed between the edge portion and a sidewall of the cavity such that the edge portion surrounds a side of the center portion. In some embodiments, a portion of the center portion and a portion of the edge portion may be exposed on a surface of the conductive feature. For example, the surface of the conductive feature and the surface of the non-conductive region may at least partially constitute a contact surface of the element.

[0019] In some embodiments, the heights of the central and edge portions can be controlled to provide a conductive structure with a substantially uniform protrusion height across the surface of the conductive feature after annealing. For example, the surface of the conductive feature can be recessed relative to the surface of the non-conductive region. A portion of the central portion exposed on the surface of the conductive feature can be recessed a first depth relative to the surface of the non-conductive region, and a portion of the edge portion exposed on the surface of the conductive feature can be recessed a second depth different from the first depth relative to the surface of the non-conductive region. In another example, the central and edge portions of the conductive feature can be made of the same or similar materials with different properties (e.g., different coefficients of thermal expansion (CTE), different grain sizes, or different grain orientations), mechanical properties, or can be made of different (dissimilar) materials. For example, in some embodiments, the central portion can have a material with a first CTE and the edge portion can have a second CTE that is smaller than the first CTE.

[0020] Various embodiments disclosed herein relate to bonded structures having an element (a first element) with conductive features with controlled center and edge portions, and another element (a second element), which may have the same or similar structure as the first element, or may have a different structure than the first element.

[0021] FIG. 3A is a schematic cross-sectional side view of at least a portion of device 20 according to one embodiment. FIG. 3B is a schematic plan view of device 20 of FIG. 3A. The device may include regions, such as non-conductive (e.g., semiconductor or inorganic dielectric) regions 22, and conductive features 24 (e.g., contact pads, exposed ends of vias (e.g., TSVs), or through-substrate electrodes). In some embodiments, device 20 may include a barrier layer 26 between conductive features 24 and the non-conductive regions. For example, barrier layer 26 may comprise a diffusion barrier layer that prevents or reduces diffusion of material of conductive features 24 into non-conductive regions 22. In some embodiments, barrier layer 26 may comprise tantalum, titanium, cobalt, nickel, tungsten, or any suitable compound or combination thereof. In some embodiments, barrier layer 26 may comprise a multi-layer structure.

[0022] The non-conductive region 22 may be comprised of a dielectric layer. In some embodiments, the non-conductive region 22 may be comprised of multiple layers of different dielectrics. For example, the non-conductive region 22 may be comprised of silicon oxide, silicon nitride, or any other suitable non-conductive bonding material. As shown in FIG. 3A, a cavity 28 may be formed in the non-conductive region 22. The cavity 28 may extend at least partially through the thickness of the non-conductive region 22. For example, the cavity 28 may extend completely through the thickness of the non-conductive region 22. In some embodiments, a dielectric (not shown) may be provided between the barrier layer 26 and the non-conductive region 22.

[0023] The non-conductive region 22 has a contact surface 22a that may at least partially constitute the bonding surface of the element 20. The non-conductive region contact surface 22a may be pretreated for direct bonding as described herein. In some embodiments, the contact surface 22a may be polished, for example by chemical mechanical polishing (CMP), to have a surface roughness of less than 15 Å rms, less than 10 Å rms, or less than 5 Å rms.

[0024] The conductive feature 24 may have a first portion (e.g., a central portion 30) and a second portion (e.g., an edge portion 32). A portion of the central portion 30 (e.g., an upper surface 30a) and a portion of the edge portion 32 (e.g., an upper surface 32a) may at least partially constitute a bonding surface of the device 20. The upper surface 30a of the central portion 30 and the upper surface 32a of the edge portion 32 may be recessed by a first depth relative to the contact surface 22a of the non-conductive region 22. For example, the upper surface 30a of the central portion 30 and the upper surface 32a of the edge portion 32 may be recessed by less than 30 nm, less than 20 nm, less than 15 nm, or less than 10 nm, for example, in the range of 2 nm to 20 nm, or in the range of 4 nm to 10 nm.

[0025] In some embodiments, the central portion 30 and the edge portion 32 of the conductive feature 24 can have different material properties. For example, the central portion 30 and the edge portion 32 of the conductive feature 24 can have the same base material with different material properties or alloys, or can have dissimilar materials. In some embodiments, the central portion 30 has a first coefficient of thermal expansion (CTE) and the edge portion 32 has a second CTE that is different from the first CTE. For example, the first CTE can be higher than the second CTE. In some embodiments, the first CTE can be at least 5% higher than the second CTE. For example, the first CTE can be 5%-50%, 10%-50%, 20%-50%, 5%-40%, 5%-30%, or 10%-40% higher than the second CTE. In some embodiments, the central portion 30 and / or the edge portion 32 may be comprised of nickel vanadide (NiV) or nickel boride (NiB). NiV or NiB may be formed by plating or sputtering in some embodiments. The central portion 30 and / or the edge portion 32 may be comprised of copper zirconium (CuZr), copper indium (CuIn), copper tin (CuSn), copper molybdenum (CuMo), or copper vanadium (CuV), e.g., in an alloy of less than 50%. The central portion 30 and / or the edge portion 32 may be comprised of an alloy of copper (Cu) with nickel (Ni), cobalt (Co), vanadium (V), tungsten (W), zirconium (Zr), or molybdenum (Mo). The central portion 30 and / or the edge portion 32 may be comprised of an alloy of Co with Ni, V, W, Zr, or Mo. For example, the Cu or Co alloy may contain less than 5% Ni, Co, V, W, Zr, or Mo. The central portion 30 and / or the edge portion 32 may be made of a nanotwin metal (e.g., nanotwin copper) or a fine-grained metal (e.g., fine-grained copper). Using a nanotwin metal with a 111 crystal orientation may be advantageous in some embodiments because the 111 nanotwin metal may have a relatively low CTE, relatively high hardness, and relatively high electromigration resistance. A fine-grained metal may be defined as a metal with an average grain width of less than 20 nm, less than 50 nm, less than 100 nm, less than 300 nm, or less than 500 nm.For example, the maximum width of the grains in the fine-grained metal may be in the range of 10 nm to 500 nm, 10 nm to 300 nm, 20 nm to 500 nm, 20 nm to 300 nm, 20 nm to 100 nm, 20 nm to 50 nm, 50 nm to 500 nm, 50 nm to 300 nm, or 100 nm to 300 nm. The central portion 30 and / or edge portion 32 may be comprised of a metal having grains generally oriented vertically (e.g., approximately perpendicular to the surface of the conductive feature) along a 111 crystallographic orientation.

[0026] In some embodiments, the materials of the central portion 30 and the edge portion 32 may be selected such that the protrusion height of the central portion 30 after annealing is the same, approximately the same, or greater than the protrusion height of the edge portion 32, resulting in a substantially uniform bond interface after annealing and bonding. The central portion 30 and the edge portion 32 may be annealed for any suitable period of time, for example, for a duration ranging from 60 minutes to 180 minutes, at a temperature ranging from 100° C. to 400° C., 100° C. to 300° C., 100° C. to 250° C., 150° C. to 400° C., 150° C. to 300° C., or 180° C. to 300° C. In some embodiments, the annealing temperature may vary, at least in part, based on the size of the conductive feature 24. Conductive features 24 with smaller size (e.g., diameter) may be annealed at a higher temperature than conductive features 24 with larger size (e.g., diameter). For example, conductive features 24 with larger diameter may protrude further than conductive features 24 with smaller diameter at the same annealing temperature. Conductive features 24, such as contact pads, exposed ends of vias (e.g., TSVs) or through-substrate electrodes of the embodiments described herein, may have a maximum size (e.g., maximum lateral dimension or diameter) in the range of about 0.01 μm to 15 μm, about 0.1 μm to 10 μm, about 0.5 μm to 8 μm, about 2 μm to 5 μm, about 1 μm to 3 μm, or about 0.01 μm to 1 μm. The difference between the average height of the center portion 30 and the average height of the edge portion 32 after annealing may be less than 0.2 μm, less than 0.1 μm, or less than 0.05 μm. In some embodiments, the central portion 30 and the edge portions 32 may be selected such that a first CTE of the central portion 30 is the same as or higher than a second CTE of the edge portions 32 .

[0027] Center portion 30 and edge portion 32, selected from materials and / or dimensions as disclosed herein, enable conductive feature 24 to be reliably bonded to another conductive feature of another device with sufficient bond strength and minimal resulting stress and / or voids. Figures 4A-5D illustrate various embodiments, such as the embodiments described with respect to Figures 3A and 3B, that may embody any one or more of the applicable principles and / or advantages disclosed herein.

[0028] FIG. 4A is a schematic cross-sectional side view of an embodiment of the element 40. FIG. 4B is an enlarged view of a portion of the element 40 shown in FIG. 4A. Unless otherwise specified, the components in FIG. 4A and FIG. 4B may be the same or substantially the same as components disclosed herein, such as those shown in FIG. 3A and FIG. 3B. The element 40 is substantially the same as the element 20 shown in FIG. 3A and FIG. 3B, except that in the element 40, the upper surface 32a of the edge portion 32 is recessed below the upper surface 30a of the central portion 30. The upper surface 30a of the central portion 30 may be recessed by a first depth d1 relative to the contact surface 22a of the non-conductive region 22, and the upper surface 32a of the edge portion 32 may be recessed by a second depth d2 greater than the first depth d1 relative to the contact surface 22a of the non-conductive region 22. Although the barrier layer 26 and the contact surface 22a of the non-conductive region 22 are shown as being flush with no recesses, the barrier layer 26 may be recessed relative to the contact surface 22a in some embodiments.

[0029] The first and second depths d1, d2 of the central and edge portions 30, 32 may be selected based on various factors to allow the central and edge portions 30, 32 to have a desired protrusion height after annealing. For example, the first and second depths d1, d2 of the central and edge portions 30, 32 may be selected based at least in part on the material of the central and edge portions 30, 32, the width w1 of the central portion 30, the width w2 of the edge portion, the annealing temperature, and / or the difference in CTE between the conductive features 24 and the non-conductive regions 22. In some embodiments, the edge portion 32 may be made of a material having a higher CTE than the material of the central portion 30, and the second depth d2 may be increased relative to the first depth d1 to compensate for the difference in CTE, thereby preventing or mitigating excessive protrusion of the edge portion 32 compared to the central portion 30 after annealing.

[0030] In some embodiments, the difference between the first depth d1 and the second depth d2 may be in the range of 0.01 μm to 0.5 μm, 0.1 μm to 0.5 μm, 0.1 μm to 0.4 μm, 0.2 μm to 0.5 μm, or 0.2 μm to 0.4 μm for deep cavities (e.g., cavities 28 having a depth of 10 μm to 100 μm), for example, in some TSV or other through-substrate via structures. In some embodiments, the top surface 30a of the central portion 30 may be recessed from the contact surface 22a of the non-conductive region 22 by less than 100 nm, 50 nm, less than 20 nm, or less than 10 nm, for example, by a range of 2 nm to 20 nm, or a range of 4 nm to 10 nm.

[0031] Figure 4C is a schematic cross-sectional side view of an embodiment of element 42. Unless otherwise specified, the components of Figure 4C may be the same or substantially the same as the same components disclosed herein, such as those shown in Figures 3A-4B. Element 42 is substantially the same as elements 20, 40 shown in Figures 3A-4B, except that in element 42, top surface 30a of central portion 30 is recessed below top surface 32a of edge portion 32. In other words, first depth d1 may be greater than depth d2.

[0032] The first and second depths d1, d2 of the center and edge portions 30, 32 may be selected based on various factors to allow the center and edge portions 30, 32 to have a desired protrusion height after annealing, which allows sufficient force for bonding without causing damage to the device or delamination. For example, the first and second depths d1, d2 of the center and edge portions 30, 32 may be selected based at least in part on the material of the center and edge portions 30, 32, the width w1 of the center portion 30, the width w2 of the edge portion, the annealing temperature, and / or the difference in CTE between the conductive feature 24 and the non-conductive region 22. In some embodiments, the edge portion 32 may be made of a material having a higher CTE than the material of the center portion 30, and the first depth d1 may be made larger relative to the second depth d2 to compensate for the difference in CTE, thereby preventing or reducing excessive protrusion of the center portion 30 compared to the edge portion 32 after annealing.

[0033] FIG 5A is a schematic cross-sectional side view of an embodiment of element 44. Unless otherwise specified, the components of FIG 5A may be the same or substantially the same as the same components disclosed herein, such as those shown in FIG 3A-4C. Element 44 is substantially the same as elements 40, 42 shown in FIG 4A-4C. In element 44, central portion 30 has a bottom region 46 and an upper region 48 located on bottom region 46. Edge portion 32 may be positioned such that edge portion 32 is disposed between upper region 48 of central portion 30 and a sidewall of cavity 28.

[0034] Figure 5B is a schematic cross-sectional side view of an embodiment of element 50. Unless otherwise specified, the components in Figure 5B may be the same or substantially the same as the same components disclosed herein, such as those shown in Figures 4A-5A. Element 50 is substantially the same as elements 40, 42, and 44 shown in Figures 4A-5A. In element 50, conductive feature 24 may have a center portion 30, an edge portion 32, and a bottom portion 52. Bottom portion 52 may be made of a material with the same but different material properties as center portion 30 and / or edge portion 32, or may be made of a different material than center portion 30 and / or edge portion 32.

[0035] Figure 5C is a schematic cross-sectional side view of one embodiment of element 54. Unless otherwise specified, the components in Figure 5B can be the same or substantially the same as the same components disclosed herein, such as those shown in Figures 4A-5A. Element 50 is substantially the same as element 40 shown in Figures 4A and 4B. In some embodiments, edge portion 32 of element 54 can be a portion of conductive material 56 disposed within cavity 28 that is different from center portion 30.

[0036] Figure 5D is a schematic cross-sectional side view of one embodiment of element 58. Unless otherwise specified, the components in Figure 5D can be the same or substantially the same components disclosed herein, such as those shown in Figures 3A-5C. Element 58 is substantially the same as element 40 shown in Figures 4A and 4B. In some embodiments, edge portion 32 can be at least partially embedded within central portion 30.

[0037] Any suitable combination of the features disclosed herein may be embodied to form an element, for example, various features of conductive feature 24 may be combined to form an element that, when bonded to another embodiment, can provide a reliable bond.

[0038] Figures 6A-6E illustrate various steps in a process for fabricating device 40 as shown in Figure 4A. Processes similar to those of Figures 6A-6E may be implemented to form the devices disclosed herein. Unless otherwise specified, the components of Figures 6A-6E may be the same or substantially the same as the same components disclosed herein, e.g., the components shown in Figures 4A and 4B.

[0039] 6A is a cross-sectional view showing the non-conductive region 22 and a cavity 28 formed therein. The cavity 28 may extend at least partially through the thickness of the non-conductive region 22. In some embodiments, the cavity 28 may completely penetrate the thickness of the non-conductive region 22. A barrier layer 26 may be provided within the cavity 28. The barrier layer 26 may have a nanometer-scale thickness or width. For example, the barrier layer 26 may have a thickness in the range of 10 nm to 50 nm, 20 nm to 50 nm, 10 nm to 40 nm, or 20 nm to 40 nm. In some embodiments, a dielectric layer (not shown) may be provided between the barrier layer 26 and the non-conductive region 22.

[0040] 6B is a cross-sectional view showing non-conductive region 22, barrier layer 26, and conductive material 60 disposed within cavity 28. In some embodiments, when conductive material 60 is disposed, an excess of conductive material 60 may be disposed on non-conductive region 22. Such excess may be removed by a removal process, such as a chemical mechanical polishing (CMP) process.

[0041] 6C, at least a portion of the conductive material 60 is removed. In some embodiments, a portion of the conductive material 60 that contacts the barrier layer 26 may be removed to define the void 62 and the central portion 30. For example, this portion of the conductive material 60 may be removed by etching (e.g., a selective etching process).

[0042] In FIG. 6D, the edge portion 32 may be disposed within a void 62. The void 62 may be at least partially or completely filled with the material of the edge portion 32. The material of the edge portion 32 may be the same as or different from the conductive material 60 of the central portion 30. The edge portion 32 may have a thickness or width on the micron scale. The thickness of the edge portion 32 may vary based at least in part on the size of the conductive feature 24. For example, the thickness of the edge portion may be in the range of 1 μm to 5 μm, 2 μm to 5 μm, 1 μm to 4 μm, or 2 μm to 4 μm. In some embodiments, the fill material may be formed by electroless atomic layer deposition (ALD) or other methods. After the filling step to form the edge portion 32, the excess may be removed by mechanical planarization. The edge portion void may be formed as needed.

[0043] In Fig. 6E, the element 40 is prepared for direct bonding. For example, at least the contact surface 22a of the non-conductive region 22 can be polished, for example by CMP, to have a surface roughness of less than 15 Å rms, less than 10 Å rms, or less than 5 Å rms. Dishing can occur during the polishing process, resulting in the surfaces 30a, 32a of the central portion 30 and the edge portion 32 being recessed below the contact surface 22a. In some embodiments, the surfaces 30a, 32a of the central portion 30 and the edge portion 32 can be intentionally recessed in accordance with embodiments disclosed herein. For example, the surface 32a can be recessed to provide the surface 32a of the surface 30a.

[0044] Various embodiments of an element (first element) disclosed herein may be bonded to another element (second element) to form a bonded structure. FIG. 7A is a side cross-sectional view of at least a portion of a bonded structure 66 having a first element 66a and a second element 66b. FIG. 7B is an enlarged view of a portion of the bonded structure 66 shown in FIG. 7A. In some embodiments, the first element 66a and the second element 66b may be directly bonded to each other along a bonding interface 68 without an intervening adhesive. For example, the non-conductive regions 22, 72 of the first and second elements 66a, 66b may be directly bonded to each other at room temperature, and the conductive features 24, 74 of the first and second elements 66a, 66b may be directly bonded to each other after the non-conductive regions 22, 72 of the first and second elements 66a, 66b are bonded. The method of bonding the conductive features 24, 74 of the first and second elements 66a, 66b together may comprise an annealing process. The conductive feature 24 may have a center portion 30 and an edge portion 32, and the conductive feature 74 may have a center portion 80 and an edge portion 82. A portion of the bonding interface 68 between the center portion 30 and the center portion 80 may be referred to as a center region 68a of the bonding interface 68. A portion of the bonding interface 68 between the edge portion 32 and the edge portion 82 may be referred to as an edge region 68b of the bonding interface 68.

[0045] In some embodiments, the bonded structure 66 may include a signature or symbol that indicates the use of an embodiment of the conductive feature disclosed herein. In some embodiments, the bonded structure 66 may include voids 76 (e.g., microvoids) that represent the conductive features as embodiments disclosed herein. A microvoid may be defined as a void having an average dimension (e.g., linear lateral dimension or width) of 300 nm or less, 100 nm or less, or 80 nm or less, for example, in the range of 10 nm to 300 nm, 10 nm to 100 nm, or 10 nm to 80 nm. With respect to the lateral area when viewed in cross section, a microvoid may be defined as a void having an average dimension of 70 nm or less. 2 From 70000nm 2 Range up to 100nm 2 From 7000nm 2 or 100 nm 2 From 700 nm 2to 100 nm. For example, there may be more voids 76 per area or void density at or near the edge region 68b of the bonding interface 68 than at or near the central region 68a. For example, there may be more voids 76 at or near the edge portion 68b of the bonding region 68 than at or near the central region 68a. Near the edge region 68b, a portion of the bonded edge portion 32, 82 may be within about 500 nm of the edge region 68b of the bonding interface 68 into the thickness of the bonded edge portion 32, 82, and near the central region 68b, a portion of the bonded center portion 30, 80 may be within about 500 nm of the center region 68 of the bonded interface 68 into the thickness of the bonded center portion 30, 80. The voids may move around in these portions within 500 nm of the bonding interface 68 during the annealing process. The difference between the number of voids at or near the central region 68a and the number of voids at or near the edge region 68b can be detected by taking a vertical cross-section of the bonded structure 66, as shown in Figure 7A, and inspecting the vertical cross-section. In some embodiments, the voids present at or near the edge region 68b of the bonding interface 68 may be smaller than the voids present at or near the central region 68a.

[0046] Although two elements (first and second elements 66a, 66b) are precisely aligned in the bonded structure 66 shown in FIG. 7A, the first and second elements 66a, 66b may be misaligned. As a result of the misalignment of the first and second elements 66a, 66b, at least a portion of the edge portion 32 may be aligned with a portion of the central portion 80. Such a bonded structure with misaligned elements maintains the above-characterized structure of more voids 76 per area or void density at or near the edge region 68b of the bonding interface 68 than in the central region 68a.

[0047] In some embodiments, as shown in FIG. 7B, the bonded central portion 30,80 may expand or bulge into a portion (e.g., void 76) within the edge region 68b between the edge portions 32 and 82, resulting in a mixture of materials of the central portion 80,30 and the edge portions 32,82. The mixture of materials may indicate that there appears to be a recess of the edge portions 32,82 relative to the contact surfaces of the elements 66a,66b that is deeper than the recess of the central portion 30,80 relative to the contact surfaces of the elements 66a,66b. The mixture of materials may indicate that the central portion 30,80 has a higher CTE than the CTE of the edge portions 32,82 and / or that the edge portions 32,82 are recessed below the central portion 30,80 prior to annealing.

[0048] 7A and 7B show a bonded structure 66 having two identical or nearly identical elements 66a, 66b, the bonded structure can have two or more different elements. For example, the bonded structure can have an element as one embodiment and another element as another embodiment. The bonded conductive features can have different structures based at least in part on the material, the geometry of the conductive structure, the annealing temperature and / or the annealing duration.

[0049] 8A is a cross-sectional side view of conductive features 24, 90 prior to annealing. Conductive features 24, 90 may be part of a device that is to be directly bonded along a bonding interface 68 between corresponding non-conductive regions (not shown in FIG. 8A). Conductive feature 24 may have a center portion 30 and an edge portion 32. In some embodiments, conductive feature 24 may be disposed at least partially between portions of barrier layer 26. Conductive feature 24 may be disposed at least partially between portions of barrier layer 92. Edge portion 32 is recessed by a depth d2 relative to bonding interface 68 between corresponding non-conductive regions.

[0050] 8B is a cross-sectional side view of conductive features 24, 90 after annealing at a first temperature for a first duration. Central portions 30 of conductive features 24 and 90 are allowed to expand and are bondable to one another. Edge portions 32 are allowed to expand, and a depth d3 between edge portion 32 and bonding interface 68 may be less than depth d2 prior to bonding as shown in FIG. 8A. The temperature and / or duration of the anneal may affect the expansion of central portion 30, edge portion 32, and / or conductive feature 90.

[0051] 8C is a cross-sectional side view of the conductive features 24, 90 after annealing at a second temperature for a second duration. The second temperature and / or second duration may be longer than the first temperature and / or first duration. The edge portion 32 may expand and a depth d4 between the edge portion 32 and the bonding interface 68 may be less than the depth d3 of FIG. 8B.

[0052] 8D is a cross-sectional side view of the conductive feature 24, 90 after annealing at a third temperature for a third duration. The third temperature and / or third duration may be longer than the second temperature and / or second duration. The edge portion 32 may expand and the depth d5 ​​between the edge portion 32 and the bonding interface 68 may be less than the depth d4 of FIG. 8C. Depending on the duration, the edge portion 32 may be in contact with and bondable to the conductive feature 90.

[0053] 8E is a cross-sectional side view of the conductive features 24, 90 after annealing at a fourth temperature for a fourth duration. In some embodiments, the interface between the edge portion 32 and the conductive feature 90 may include voids 94 (e.g., microvoids or nanovoids). For example, the edge portion 32 may expand to form filaments or combs with various heights depending at least in part on the material of the edge portion 32, the fourth temperature, and / or the fourth duration.

[0054] 9A is a cross-sectional side view of conductive features 24, 24' before annealing. Conductive features 24, 24' may be part of a direct bonded device along a bonding interface 68 between corresponding non-conductive regions. Conductive features 24, 24' may have the same or substantially the same structure. Conductive feature 24 may have a center portion 30 and an edge portion 32. Conductive feature 24' may have a center portion 30' and an edge portion 32'. In some embodiments, conductive features 24, 24' may be disposed at least partially between barrier layers 26, 26'. Edge portion 32 is recessed by a depth d2 relative to bonding interface 68 between corresponding non-conductive regions.

[0055] FIGURE 9B is a cross-sectional side view of conductive features 24, 24' after annealing at a first temperature for a first duration. Central portion 30 of conductive feature 24 and central portion 30' of conductive feature 24' are allowed to expand and are bondable to one another. Edge portion 32 is allowed to expand, and a depth d6 between edge portion 32 and bonding interface 68 may be less than depth d2 prior to bonding as shown in FIGURE 9A. The temperature and / or duration of the anneal may affect the expansion of central portions 30, 30' and / or edge portions 32, 32'.

[0056] 9C is a cross-sectional side view of the conductive features 24, 24' after annealing at a second temperature for a second duration. The second temperature and / or second duration can be greater than the first temperature and / or first duration. The edge portion 32 can expand and the depth d7 between the edge portion 32 and the bonding interface 68 can be less than the depth d6 of FIG. 8B. The center portion 30, 30' can expand and at least partially fill the gap between the edge portions 32, 32'.

[0057] FIG. 9D is a cross-sectional side view of the conductive features 24, 24' after annealing at a third temperature for a third duration. The third temperature and / or third duration can be greater than the second temperature and / or second duration. The edge portion 32 can expand and a depth d8 between the edge portion 32 and the bonding interface 68 can be less than the depth d7 of FIG. 9C. The center portion 30, 30' can expand and at least partially fill the gap between the edge portions 32, 32'. In some other embodiments, depending on the temperature and duration, the edge portion 32 can be in contact with and bondable to the edge portion 32'.

[0058] 9E is a cross-sectional side view of the conductive features 24, 24' after annealing at a fourth temperature for a fourth duration. In some embodiments, the interface between the edge portions 32 and 32' may include voids 94 (e.g., microvoids or nanovoids). For example, the edge portions 32, 32' may expand to form filaments or combs of various heights depending, at least in part, on the material of the edge portions 32, 32', the fourth temperature, and / or the fourth duration.

[0059] In one aspect, a bonded structure is disclosed. The bonded structure includes a first element having a first non-conductive region and a first conductive feature, and a second element having a second non-conductive region and a second conductive feature. The second element is bonded to the first element along a bonding interface such that the second non-conductive region is directly bonded to the first non-conductive region along the non-conductive interface and the second conductive feature is directly bonded to the first conductive feature along the conductive interface. The conductive interface between the first and second conductive features has a central region and an edge region disposed laterally between the central region and the non-conductive interface between the first and second non-conductive regions. In a vertical cross-section of the bonded structure, there are more voids at or near the edge region than at or near the central region.

[0060] In one embodiment, the first non-conductive region has a cavity extending at least partially through a thickness of the first non-conductive region. The first conductive feature may be formed in the cavity. The first conductive feature may include a central portion and an edge portion disposed between a sidewall of the cavity and the central portion. The central portion may have a first coefficient of thermal expansion. The edge portion may have a second coefficient of thermal expansion different from the first coefficient of thermal expansion. The central portion and edge portion may comprise homogenous materials with different crystal orientations. The central portion and edge portion may comprise dissimilar materials. The edge portion may include a filament comprised of a material of the edge portion of the first conductive feature. The central portion may be disposed partially between the edge portion of the first conductive feature and the edge portion of the second conductive feature. The second non-conductive region can have a second cavity extending at least partially through a thickness of the second non-conductive region, and the second conductive feature can be formed in the second cavity. The second conductive feature can include a second central portion and a second edge portion disposed between a second sidewall of the second cavity and the second central portion.

[0061] In one embodiment, the voids present at or near the central region have an average void size that is greater than the average void size of the voids present at or near the edge portions.

[0062] In one aspect, an element is disclosed having a bonding surface. The element may have a non-conductive region having a cavity extending at least partially from a contact surface of the non-conductive region into a thickness of the non-conductive region. The contact surface at least partially constitutes the bonding surface of the element. The element may have a conductive feature formed within the cavity. The conductive feature includes a central portion and an edge portion disposed between a sidewall of the cavity and the central portion. The central portion has a first coefficient of thermal expansion. The edge portion has a second coefficient of thermal expansion different from the first coefficient of thermal expansion. The central portion is recessed a first depth relative to the contact surface of the non-conductive region. The edge portion is recessed a second depth relative to the contact surface of the non-conductive region, the second depth being different from the first depth.

[0063] In one embodiment, the contact surface has a surface structure that is pretreated to enable direct bonding.

[0064] In one embodiment, the first coefficient of thermal expansion is greater than the second coefficient of thermal expansion. The central portion and the edge portion may comprise a homogenous material with different crystal orientations. The central portion and the edge portion may comprise dissimilar materials.

[0065] In one embodiment, the second depth is greater than the first depth.

[0066] In one embodiment, the device further comprises a barrier layer disposed between the edge portion and the sidewall of the cavity, the barrier layer being configured to prevent or reduce diffusion of conductive features into non-conductive regions.

[0067] In one aspect, an element is disclosed having a bonding surface. The element can have a non-conductive region having a cavity extending at least partially from a contact surface of the non-conductive region into a thickness of the non-conductive region. The contact surface at least partially constitutes the bonding surface of the element. The element can have a conductive feature formed in the cavity. The conductive feature can include a central portion and an edge portion disposed between a sidewall of the cavity and the central portion. The central portion has a first coefficient of thermal expansion. The edge portion has a second coefficient of thermal expansion different from the first coefficient of thermal expansion. The central portion is recessed a first depth relative to the contact surface of the non-conductive region. The edge portion is recessed a second depth different from the first depth relative to the contact surface of the non-conductive region. The first coefficient of thermal expansion is at least 5% greater than the second coefficient of thermal expansion.

[0068] In one embodiment, the contact surface has a surface structure that is pretreated to enable direct bonding.

[0069] In one embodiment, the central portion and the edge portion comprise the same material with different crystal orientations.

[0070] In one embodiment, the central portion and the edge portion comprise dissimilar materials.

[0071] In one embodiment, the second depth is greater than the first depth.

[0072] In one embodiment, the device further comprises a barrier layer disposed between the edge portion and the sidewall of the cavity.

[0073] In one aspect, a method is disclosed for forming a conductive feature in a cavity of a non-conductive region of an element. The cavity extends at least partially from a contact surface of the non-conductive region into a thickness of the non-conductive region. The method may include providing a first conductive material in the cavity, removing at least a portion of the first conductive material from the cavity, providing a second conductive material in the removed portion of the first conductive material, and recessing the first conductive material and the second conductive material relative to the contact surface of the non-conductive region.

[0074] In one embodiment, the first conductive material is recessed a first depth relative to the contact surface of the non-conductive region and the second conductive material is recessed a second depth different from the first depth relative to the contact surface of the non-conductive region. The second conductive material may be positioned between the first conductive material and a sidewall of the cavity. The first conductive material may include a copper or cobalt alloy. The second depth may be greater than the first depth.

[0075] In one embodiment, the first conductive material has a first coefficient of thermal expansion and the second conductive material has a second coefficient of thermal expansion different from the first coefficient of thermal expansion, the first coefficient of thermal expansion being greater than the second coefficient of thermal expansion.

[0076] In one embodiment, retracting the first conductive material and the second conductive material from the interface of the non-conductive region comprises polishing the non-conductive region and the conductive feature.

[0077] In one embodiment, the method further includes providing a barrier layer on the interior surface of the cavity.

[0078] In one aspect, a method of forming a bonded structure is disclosed. The method may include providing a first element and direct bonding a bonding surface of a second element to a bonding surface of the first element. The first element has a non-conductive region having a cavity extending at least partially into a thickness of the non-conductive region from a contact surface of the non-conductive region. The contact surface at least partially constitutes the bonding surface of the element. The first element has a conductive feature formed in the cavity and at least partially constitutes the bonding surface of the first element. The conductive feature includes a central portion and an edge portion disposed between a sidewall of the cavity and the central portion. The central portion has a first coefficient of thermal expansion. The edge portion has a second coefficient of thermal expansion different from the first coefficient of thermal expansion. The central portion is recessed a first depth relative to the contact surface of the non-conductive region. The edge portion is recessed a second depth relative to the contact surface of the non-conductive region, the second depth being different from the first depth.

[0079] In one embodiment, the step of direct bonding the bonding surfaces of the first and second elements includes a step of direct bonding a non-conductive region of the second element to a non-conductive region of the first element without an intervening adhesive, and a step of direct bonding a conductive feature of the second element to a conductive feature of the first element without an intervening adhesive.

[0080] In one embodiment, direct bonding the conductive feature of the second element to the conductive feature of the first element includes annealing the conductive feature.

[0081] In one embodiment, the first coefficient of thermal expansion is greater than the second coefficient of thermal expansion. The central portion and the edge portion may comprise a homogenous material with different crystal orientations. The central portion and the edge portion may comprise dissimilar materials.

[0082] In one embodiment, the second depth is greater than the first depth.

[0083] In one embodiment, the conductive feature of the second element includes a center portion and an edge portion. The center portion of the second element can have a third coefficient of thermal expansion. The edge portion of the second element can have a fourth coefficient of thermal expansion. The third coefficient of thermal expansion can be higher than the fourth coefficient of thermal expansion.

[0084] Unless the context clearly requires otherwise, throughout the specification and claims, the terms "comprise", "comprising", "include", "including" and the like are to be construed in an inclusive sense, i.e., "including, but not limited to", as opposed to an exclusive or exhaustive sense. As used generally herein, the term "coupled" means two or more elements that are either directly connected to each other or connected to each other by one or more intermediate elements. Similarly, as used generally herein, the term "coupled" means two or more elements that are either directly connected to each other or connected to each other by one or more intermediate elements. Additionally, the terms "herein," "above," "below," and words of similar import as used herein refer to the application as a whole and not to any particular portion of the application. Furthermore, as used herein, when a first element is described as "on" or "over" a second element, the first element may be directly located on or over the second element such that the first element and the second element are in direct contact, or the first element may be indirectly located on or over the second element such that one or more elements are interposed between the first element and the second element. Where the context permits, terms in the above Detailed Description using the singular or plural may include the plural or singular, respectively. The term "or" in reference to a list of two or more items includes all of the following interpretations of that term: any of the items in the list, all of the items in the list, and any combination of the items in the list.

[0085] Furthermore, conditional terms used in the specification, particularly "can," "could," "might," "may," "eg," "for example," "such as," and the like, unless expressly specified otherwise or understood otherwise within the context in which they are used, are generally intended to imply that certain embodiments include certain features, elements, and / or conditions and that other embodiments do not include certain features, elements, and / or conditions. Thus, such conditional terms are generally not intended to imply that features, elements, and / or conditions are present in any required manner for one or more embodiments.

[0086] Although certain embodiments have been described, these embodiments are provided by way of example only and are not intended to limit the scope of the invention. Indeed, the novel apparatus, methods, and systems described herein may be embodied in a variety of other forms, and furthermore, various omissions, substitutions, and modifications in the form of the methods and systems described herein may be made without departing from the scope of the invention. For example, although blocks are shown in a given arrangement, alternative embodiments may perform substantially the same functions with different components and / or circuit topologies, and some blocks may be deleted, moved, added, divided, combined, and / or modified. Each of these blocks may be embodied in a wide variety of ways. Any suitable combination of elements and acts of the various embodiments described above may be combined to provide further embodiments. The scope of the invention as set forth in the appended claims and equivalents thereto is intended to include such forms or modifications within the scope and spirit of the invention.

Claims

1. 1. A bonded structure comprising: a first element having a first non-conductive region and a first conductive feature; a second element having a second non-conductive region and a second conductive feature, the second element being bonded to the first element along a bonding interface such that the second non-conductive region is direct bonded to the first non-conductive region along a non-conductive interface and the second conductive feature is direct bonded to the first conductive feature along a conductive interface; 1. A bonded structure, wherein the conductive interface between the first and second conductive features has a central region and an edge region disposed laterally between the central region and the non-conductive interface between the first and second non-conductive regions, and wherein, when viewed in vertical cross-section through the bonded structure, there are more voids at or near the edge region than at or near the central region.

2. 2. The bonded structure of claim 1, wherein the first non-conductive region has a cavity extending at least partially through a thickness of the first non-conductive region, the first conductive feature being formed in the cavity, the first conductive feature including a central portion and an edge portion disposed between a sidewall of the cavity and the central portion.

3. 3. The bonded structure of claim 2, wherein said central portion has a first rate of thermal expansion and said edge portion has a second rate of thermal expansion different than said first rate of thermal expansion.

4. 4. The bonded structure of claim 3, wherein said central portion and said edge portion comprise the same material with different crystal orientations.

5. The bonded structure of claim 3 , wherein said central portion and said edge portion comprise dissimilar materials.

6. The bonded structure of claim 2 , wherein the edge portion comprises a filament comprised of a material of the edge portion of the first conductive feature.

7. The bonded structure of claim 2 , wherein the central portion is disposed partially between the edge portion of the first conductive feature and the edge portion of the second conductive feature.

8. 3. The bonded structure of claim 2, wherein the second non-conductive region has a second cavity extending at least partially through a thickness of the second non-conductive region, the second conductive feature being formed in the second cavity, the second conductive feature having a second central portion and a second edge portion disposed between a second sidewall of the second cavity and the second central portion.

9. The bonded structure of claim 1 , wherein the voids at or near the central region have an average void size that is greater than an average void size of the voids at or near the edge portions.

10. A device having a bonding surface, a non-conductive region having a cavity extending at least partially through a thickness of the non-conductive region from a contact surface of the non-conductive region, the contact surface at least partially constituting the bonding surface of the component; 11. An element comprising: a conductive feature formed in the cavity, the conductive feature including a central portion and an edge portion disposed between a sidewall of the cavity and the central portion, the central portion having a first coefficient of thermal expansion and the edge portion having a second coefficient of thermal expansion different from the first coefficient of thermal expansion, the central portion being recessed a first depth relative to the contact surface of the non-conductive region and the edge portion being recessed a second depth different from the first depth relative to the contact surface of the non-conductive region.

11. The device of claim 10 , wherein the contact surface has a surface structure that is pretreated to enable direct bonding.

12. The device of claim 10 , wherein the first coefficient of thermal expansion is greater than the second coefficient of thermal expansion.

13. The device of claim 12 , wherein the central portion and the edge portion comprise the same material with different crystal orientations.

14. The device of claim 12 , wherein the central portion and the edge portion comprise dissimilar materials.

15. The device of claim 10 , wherein the second depth is greater than the first depth.

16. The device of claim 10 , further comprising a barrier layer disposed between the edge portion and the sidewall of the cavity, the barrier layer configured to prevent or reduce diffusion of the conductive feature into the non-conductive region.

17. A device having a bonding surface, a non-conductive region having a cavity extending at least partially through a thickness of the non-conductive region from a contact surface of the non-conductive region, the contact surface at least partially constituting the bonding surface of the component; a conductive feature formed in the cavity, the conductive feature including a central portion and an edge portion disposed between a sidewall of the cavity and the central portion, the central portion having a first coefficient of thermal expansion and the edge portion having a second coefficient of thermal expansion different from the first coefficient of thermal expansion, the central portion being recessed a first depth relative to the contact surface of the non-conductive region and the edge portion being recessed a second depth relative to the contact surface of the non-conductive region, the second depth being different from the first depth; The element, wherein the first coefficient of thermal expansion is at least 5% greater than the second coefficient of thermal expansion.

18. The device of claim 17 , wherein the contact surface has a surface structure that is pretreated to enable direct bonding.

19. 20. The device of claim 17, wherein the central portion and the edge portion comprise the same material with different crystal orientations.

20. The device of claim 17 , wherein the central portion and the edge portion comprise dissimilar materials.

21. The device of claim 17 , wherein the second depth is greater than the first depth.

22. The device of claim 17 further comprising a barrier layer disposed between said edge portion and said sidewall of said cavity.

23. 1. A method of forming a conductive feature in a cavity in a non-conductive region of a device, the cavity extending at least partially from a contact surface of the non-conductive region into a thickness of the non-conductive region, the method comprising: providing a first conductive material within the cavity; removing at least a portion of the first conductive material from the cavity; providing a second conductive material within the removed portion of the first conductive material; and recessing the first conductive material and the second conductive material relative to the contact surface of the non-conductive region.

24. 24. The method of claim 23, wherein the first conductive material is recessed a first depth relative to the contact surface of the non-conductive region and the second conductive material is recessed a second depth different from the first depth relative to the contact surface of the non-conductive region.

25. 25. The method of claim 24, wherein the second conductive material is positioned between the first conductive material and a sidewall of the cavity.

26. The method of claim 25 , wherein the first conductive material comprises copper or a cobalt alloy.

27. 26. The method of claim 25, wherein the second depth is greater than the first depth.

28. 24. The method of claim 23, wherein the first conductive material has a first coefficient of thermal expansion and the second conductive material has a second coefficient of thermal expansion different than the first coefficient of thermal expansion, the first coefficient of thermal expansion being greater than the second coefficient of thermal expansion.

29. 24. The method of claim 23, wherein the step of recessing the first conductive material and the second conductive material from the contact surfaces of the non-conductive regions comprises polishing the non-conductive regions and the conductive features.

30. The method of claim 23 further comprising providing a barrier layer on an interior surface of the cavity.

31. 1. A method of forming a bonded structure, comprising: Providing a first element, the first element comprising: a non-conductive region having a cavity extending at least partially through a thickness of the non-conductive region from a contact surface of the non-conductive region, the contact surface at least partially constituting the bonding surface of the component; a conductive feature formed within the cavity and at least partially constituting the bonding surface of the first element, the conductive feature including a central portion and an edge portion disposed between a sidewall of the cavity and the central portion, the central portion having a first coefficient of thermal expansion and the edge portion having a second coefficient of thermal expansion different from the first coefficient of thermal expansion, the central portion being recessed a first depth relative to the contact surface of the non-conductive region and the edge portion being recessed a second depth different from the first depth relative to the contact surface of the non-conductive region; The method includes the step of direct bonding a bonding surface of a second component to a bonding surface of the first component.

32. 32. The method of claim 31 , wherein the step of direct bonding the bonding surfaces of the first and second elements comprises the steps of: direct bonding a non-conductive region of the second element to the non-conductive region of the first element without an intervening adhesive; and direct bonding a conductive feature of the second element to the conductive feature of the first element without an intervening adhesive.

33. 33. The method of claim 32, wherein the step of directly bonding the conductive feature of the second element to the conductive feature of the first element comprises annealing the conductive feature.

34. The method of claim 32 , wherein the first coefficient of thermal expansion is greater than the second coefficient of thermal expansion.

35. 35. The method of claim 34, wherein the central portion and the edge portion comprise the same material with different crystal orientations.

36. The method of claim 34 , wherein the central portion and the edge portion comprise dissimilar materials.

37. 32. The method of claim 31 , wherein the second depth is greater than the first depth.

38. 32. The method of claim 31 , wherein the conductive feature of the second element includes a center portion and an edge portion, the center portion of the second element having a third coefficient of thermal expansion and the edge portion of the second element having a fourth coefficient of thermal expansion.

39. 40. The method of claim 38, wherein the third coefficient of thermal expansion is greater than the fourth coefficient of thermal expansion.