Video processing method and related device

Abstract

A video processing method executed by a computer device, comprising: a step (S601) of performing a DIMD process on a current block in a video bitstream to obtain a DIMD result of the current block, where the video bitstream includes DIMD modification instruction information for the current block, and the current block is a coding unit to be subjected to decoding processing in the video bitstream; a step (S602) of modifying the DIMD result of the current block according to the modification instruction information; and a step (S603) of predicting an intra prediction mode of the current block based on the modified DIMD result to obtain a predicted value of the current block, where the predicted value of the current block is used to reconstruct a decoded image corresponding to the current block.

Description

[Technical field]

[0001] This application claims priority to a Chinese patent application filed with the China Patent Office on October 20, 2022, bearing application number 2022112865986 and titled "Video Processing Method and Related Apparatus", the entire contents of which are incorporated herein by reference.

[0002] The present application relates to the technical field of audio-video, in particular to the technical field of video encoding, and in particular to a video processing method, a video processing device, a computer equipment, a computer-readable storage medium and a computer program product. [Background technology]

[0003] DIMD (Decoder-side Intra Mode Derivation) technology derives the intra prediction mode of the current block by calculating the gradient of pixels in the adjacent template region of the current block in the video. As can be seen from practice, the texture characteristics of the adjacent template region cannot fully represent the texture characteristics of the current block, so the derivation result of the current DIMD technology may not be suitable for the current block, which will affect the prediction accuracy of the current block. Summary of the Invention [Problem to be solved by the invention]

[0004] According to various embodiments provided herein, a video processing method, an apparatus, a computer device, a computer-readable storage medium, and a computer program product are provided. [Means for solving the problem]

[0005] According to one aspect, an embodiment of the present application provides a video processing method executed by a computing device, comprising: performing a DIMD process on a current block in a video bitstream to obtain a DIMD result of the current block, the video bitstream including DIMD modification instruction information of the current block, the current block being a coding unit to be decoded in the video bitstream; modifying the DIMD result of the current block according to the modification instruction information; and predicting an intra-prediction mode of the current block based on the modified DIMD result to obtain a predicted value of the current block, which is used to reconstruct a decoded image corresponding to the current block.

[0006] According to another aspect, an embodiment of the present application provides another video processing method executed by a computing device, comprising: performing a DIMD process on a current block of a video to obtain a DIMD result of the current block, where the current block is a coding unit to be coded in the video; generating modification instruction information for the DIMD of the current block based on the DIMD result of the current block; modifying the DIMD result of the current block according to the modification instruction information; predicting an intra prediction mode of the current block according to the modified DIMD result to obtain a predicted value of the current block, the predicted value of the current block being used to reconstruct a decoded image corresponding to the current block; and encoding the video based on the modification indication information and the prediction value of the current block to generate a video bitstream.

[0007] According to one aspect, an embodiment of the present application further provides a video processing device, a processing unit for performing a DIMD process on a current block in a video bitstream to obtain a DIMD result of the current block, the video bitstream including DIMD modification instruction information of the current block, the current block being a coding unit to be decoded in the video bitstream; a modification unit for modifying the DIMD result of the current block according to the modification instruction information; and a prediction unit for predicting an intra-prediction mode of the current block based on the modified DIMD result to obtain a predicted value of the current block, where the predicted value of the current block is used to reconstruct a decoded image corresponding to the current block.

[0008] According to another aspect, an embodiment of the present application further provides another video processing device, a processing unit for performing a DIMD process on a current block of a video to obtain a DIMD result of the current block, the current block being a coding unit to be coded in the video; a modification unit for modifying the DIMD result of the current block according to the modification instruction information; a prediction unit for predicting an intra prediction mode of the current block according to the modified DIMD result to obtain a predicted value of the current block, wherein the predicted value of the current block is used to reconstruct a decoded image corresponding to the current block; The processing unit further generates modification instruction information for the DIMD of the current block according to the DIMD result of the current block; The processing unit further encodes the video based on the modification indication information and the prediction value of the current block to generate a video bitstream.

[0009] According to one aspect, an embodiment of the present application further provides a computing device, including a processor for executing computer readable instructions and a computer readable storage medium having computer readable instructions stored thereon, which, when executed by the processor, performs the above-mentioned video processing method.

[0010] According to one aspect, an embodiment of the present application further provides a computer-readable storage medium having computer-readable instructions stored thereon, the computer-readable instructions being operable, when executed by a processor, to perform the above video processing method.

[0011] According to one aspect, an embodiment of the present application further provides a computer program product, the computer program product including computer readable instructions, which when executed by a processor, implements the above video processing method.

[0012] The details of one or more embodiments of the present application are set forth in the following drawings and description. Other features, objects and advantages of the present application will become apparent from the description, drawings and claims. [Brief description of the drawings]

[0013] In order to more clearly explain the technical solutions of the embodiments of the present application or the prior art, the following briefly introduces the necessary drawings in the embodiments or prior art description. Obviously, the drawings described below are only some embodiments of the present application, and those skilled in the art can obtain other drawings based on these drawings on the premise that they do not make efforts worthy of inventive step. [Figure 1] FIG. 2 is a schematic diagram of intra prediction modes defined for luma prediction by VVC according to one exemplary embodiment of the present application. [Diagram 2] FIG. 1 is a schematic diagram of a DIMD technique provided by one exemplary embodiment of the present application. [Diagram 3] 1 is a schematic architecture diagram of a video processing system according to one exemplary embodiment of the present application; [Figure 4] FIG. 2 is a timing diagram of a video processing method provided by one exemplary embodiment of the present application. [Diagram 5] 1 is a flow diagram of a video processing method provided by one exemplary embodiment of the present application; [Figure 6]FIG. 2 is a flow diagram of a video processing method provided by another exemplary embodiment of the present application; [Figure 7] FIG. 1 is a structural schematic diagram of a video processing device provided by one exemplary embodiment of the present application; [Figure 8] FIG. 2 is a structural schematic diagram of a video processing device provided by another schematic embodiment of the present application; [Figure 9] FIG. 2 is a structural schematic diagram of a computer device provided by one exemplary embodiment of the present application; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] Hereinafter, the technical solutions of the embodiments of the present application will be clearly and completely described in conjunction with the drawings of the embodiments of the present application, and the described embodiments are not all the embodiments, but only some of the embodiments of the present application. Based on the embodiments of the present application, on the premise that a person skilled in the art does not make any inventive efforts, all other embodiments obtained fall within the protection scope of the present application.

[0015] The following technical terms are used in this application: 1. VVC (Versatile Video Coding) VVC is a video coding standard with high coding efficiency and high coding complexity. During coding, VVC divides each frame image of a video into Coding Tree Units (CTUs) that have the same size and are closely arranged, and the CTUs can be flexibly divided into smaller Coding Units (CUs) based on the difference of local features of the coded image. A CU, also called a block, is the most basic element in the coding and decoding process. In the following embodiments of this application, the current block is a CU in a video that is being coded, or a CU in a video bitstream that is being decoded.

[0016] The intra prediction technology of VVC is divided into a prediction mode of a luma component and a prediction mode of a chroma component. The prediction mode of the luma component is a multi-directional intra prediction method by block (CU) to remove the spatial correlation of the image, and its prediction direction is detailed and flexible. Referring to FIG. 1, a schematic diagram of intra prediction modes defined for luma prediction by VVC in one exemplary embodiment of the present application is shown. VVC defines 65 different basic intra prediction directions for luma prediction, and each basic intra prediction direction corresponds to one intra angle mode, so that VVC defines 65 kinds of intra angle modes, and the mode indexes of the 65 kinds of intra angle modes are 2 to 66, for example, the mode index 18 of the horizontal mode, the mode index 34 of the diagonal mode, the mode index 50 of the vertical rectangular mode, the mode index 66 of the anti-angle mode 1, and the mode index 2 of the anti-angle mode 2. In addition, VVC further defines a planar mode and a direct current (DC) mode for luminance prediction, where the mode index of the planar mode is 0 and the mode index of the DC mode is 1, and the DC mode is suitable for a large and flat area, and the planar mode is suitable for a situation where pixels change gradually, i.e., an area where pixel values ​​change slowly. Thus, VVC defines a total of 67 types of intra prediction modes for luminance prediction, which are an intra angle mode set including a DC mode, a planar mode, and 65 types of intra angle modes.

[0017] The prediction mode of the chrominance component defined by VVC includes five conventional intra prediction modes including a planar mode, a DC mode, a horizontal mode, a vertical mode, and a derived mode (DM). Considering the relationship between luminance and chrominance, the prediction mode of the chrominance component defined by VVC further includes a cross-component linear model (CCLM) prediction mode, and further includes an LM_L mode in which prediction is made using the left adjacent pixel separately, and an LM_A mode in which prediction is made using the upper adjacent pixel separately.

[0018] 2. DIMD (Decoder-side Intra Mode Derivation) DIMD technology is a technology proposed in the process of VVC standardization. The encoder uses DIMD technology to derive (or predict) the intra prediction mode of the current block by calculating the gradient of the neighboring pixels of the current block. The decoder performs the same derivation (or prediction) process using DIMD technology to obtain the intra prediction mode of the current block, and further recovers the reconstructed YUV (a color coding method, where Y is luminance (Luma), i.e., grayscale value, and U and V are chrominance (Chroma)) of the current block. The complexity of introducing this technology on the decoder side is high, so it has not been adopted in the process of VVC standardization. In order to explore the next generation compression standard, JVET (Joint Video Experts Team) has established the latest ECM (Enhanced Compression Model) reference platform and added DIMD technology to it. Since the DIMD technology derives (or predicts) the same intra-prediction mode for the current block at the encoder and decoder sides and can reconstruct the current block using the derived (or predicted) intra-prediction mode, the DIMD technology does not require coding and transmission for the intra-prediction mode, reducing the coding mode bits and thereby reducing the size of the transmission bitstream.

[0019] The DIMD technique derives (or predicts) the intra prediction mode of the current block according to the reconstructed pixels of the neighboring template region of the current block. Referring to FIG. 2, a schematic diagram of the DIMD technique provided by one exemplary embodiment of the present application is shown, where region 100 is the current block to be predicted, region 101 is the neighboring template region of the current block, and the width of the template region is 3 pixels, i.e., T=3.

[0020] (1) DIMD process of the luminance component of the current block: In the DIMD process, a 3*3 horizontal Sobel filter and a vertical Sobel filter are used to calculate the horizontal gradient G x and the vertical gradient G y Specifically, refer to the following formulas 1.1 and 1.2:

number

number

[0021] Then, the angle θ corresponding to the luminance component pixel at the center of the template region is calculated by the following formula 2.1. The angle θ of the luminance component pixel can be converted into one of 65 types of intra angle modes in VVC (i.e., 65 types of intra angle modes corresponding to mode indexes 2 to 66 in FIG. 1). The specific formula 2.1 is as follows:

number

number

[0022] By repeating the above process for all luminance component pixels in the center of the template region, the angle of each luminance component pixel in the center of the template region, the intra angle mode converted from the angle, and the accumulated amplitude of the angle can be obtained. The two intra angle modes with the highest accumulated amplitude are respectively set as the luminance derivation mode of the first DIMD (also called the luminance derivation mode of the first DIMD in the embodiment of the present application, and denoted as M1) and the luminance derivation mode of the second DIMD (also called the luminance derivation mode of the second DIMD in the embodiment of the present application, and denoted as M2). Then, the intra prediction mode of the current block is predicted using M1, M2, and Planar mode, respectively, and weighted fusion is performed on the predicted value of M1, the predicted value of M2, and the predicted value of Planar mode to obtain the predicted value of the luminance component of the current block.

[0023] In the process of performing weighted fusion on the predicted values ​​of M1, M2 and Planar mode, in one implementation, the weight of Planar mode is fixed to 21 / 64, and the remaining weight of 43 / 64 is assigned to the luminance derivation modes of the two DIMDs, and the weights of the luminance derivation modes of the two DIMDs are related to their cumulative amplitudes, specifically, as shown in the following Equation 4.1 and Equation 4.2:

number

number

[0024] (2) DIMD process of the chrominance component of the current block: DIMD uses a sober filter to calculate the horizontal gradient G of all pixels (including luma and chroma component pixels) in the template region. x and the vertical gradient G y and obtain the angle of each pixel in the template region, the intra prediction mode converted from the angle, and the accumulated amplitude of the angle, similar to (1). The intra prediction mode with the highest accumulated amplitude is set as the chrominance derivation mode of the DIMD. The intra prediction mode of the current block is predicted using the chrominance derivation mode of the DIMD, and the predicted value of the chrominance derivation mode of the DIMD is directly set as the predicted value of the chrominance component of the current block. As can be seen from the comparison, the difference between the DIMD process of the chrominance component and the DIMD process of the luma component is that the predicted value of the luminance derivation mode of the DIMD needs to be weighted and fused with the predicted value of another mode (e.g., planar mode), but the predicted value of the chrominance derivation mode of the DIMD does not need to be weighted and fused with the predicted value of another mode.

[0025] As can be seen from the above description, the DIMD technique can predict the intra prediction mode of the current block by calculating gradients for pixels in the adjacent template region of the current block. Since the adjacent template region of the current block is available at both the encoder and the decoder, the same DIMD process is performed at the encoder and the decoder to obtain the intra prediction mode with the same current block, thereby omitting the coding and transmission of the intra prediction mode and improving the coding and decoding performance. However, since the texture characteristics of the adjacent template region cannot completely represent the texture characteristics of the current block, the intra prediction mode obtained by calculating and predicting gradients for pixels in the template region through the DIMD process may not be suitable for the current block, which affects the prediction accuracy for the current block. Based on this, the embodiment of the present application proposes a video processing solution, which is based on the DIMD process, performs a DIMD process on the current block in the video to obtain a DIMD result, and then modifies the DIMD result of the current block according to modification instruction information, and the modification can improve the derivation accuracy and self-adaptation ability of the DIMD. Then, the intra prediction mode of the current block is predicted based on the corrected DIMD result, thereby obtaining a highly accurate prediction value of the current block, and further improving the restorability of the reconstructed decoded image corresponding to the current block, thereby improving the encoding and decoding performance.

[0026] Next, a related description is given to the video processing system provided by the embodiment of the present application.

[0027] Referring to FIG. 3, it is an architecture schematic diagram of a video processing system provided by one exemplary embodiment of the present application. The video processing system 30 includes an encoding device 301 and a decoding device 302. The encoding device 301 is located at the encoder side, and the decoding device 302 is located at the decoder side. The encoding device 301 may be a terminal or a server. The decoding device 302 may be a terminal or a server. A communication connection can be established between the encoding device 301 and the decoding device 302. In the embodiment of the present application, the terminal may be, but is not limited to, a smartphone, a tablet, a laptop, a desktop computer, a smart speaker, a smart watch, an in-vehicle terminal, a smart TV, etc. The server may be an independent physical server, a server cluster or a distributed system consisting of multiple physical servers, or even a cloud server providing basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, CDN (Content Delivery Network), big data and artificial intelligence platforms. As shown in FIG. 4, the operation flow of the video processing system in the embodiment of the present application roughly includes:

[0028] (1) Encoder operation flow: 1. The encoding device 301 obtains a DIMD result of a current block of video, specifically, performs a DIMD process on the current block of video to obtain a DIMD result of the current block, as described above, for the luma component of the current block, the DIMD result includes two DIMD luma derivation modes, namely, a first (th) DIMD luma derivation mode M1 and a second (th) DIMD luma derivation mode M2. For the chroma component of the current block, the DIMD result includes a DIMD chroma derivation mode. 2. The encoding device 301 generates modification indication information for the DIMD of the current block according to the DIMD result of the current block, and this step mainly determines whether the DIMD result of the current block needs to be modified and what modification value to adopt for the modification. In a specific implementation, the encoding device 301 makes a determination based on RDO (Rate-Distortion Optimization), and generates modification indication information for the DIMD of the current block according to the determination result. The determination process related to this step will be described in detail in the following embodiments. Here, the modification indication information indicates whether the DIMD result of the current block needs to be modified, and if the DIMD result of the current block needs to be modified, the modification indication information further indicates a modification value for the modification. 3. The encoding device 301 modifies the DIMD result of the current block according to the modification instruction information, where the modification is based on the DIMD result and separately applies the modification value indicated by the modification instruction information, thereby realizing appropriate adjustment to the DIMD result in terms of direction and magnitude, and improving the accuracy of the DIMD. 4. The encoding device 301 predicts the intra-prediction mode of the current block based on the modified DIMD result to obtain a predicted value of the current block, and the predicted value of the current block is used to reconstruct a decoded image corresponding to the current block. 5. The encoding device 301 encodes the video based on the modification indication information and the predicted value of the current block to generate a video bitstream. Specifically, the encoding device 301 performs transform coding, quantization, entropy coding, etc. based on the predicted value of the current block to obtain a video bitstream, packages the modification indication information into the video bitstream, and transmits it to the decoding device 302, which performs a decoding process on the video bitstream.

[0029] (2) Operation flow on the decoder side: 1. After receiving the video bitstream transmitted from the encoding device 301, the decoding device 302 performs processes such as entropy decoding, inverse quantization, and inverse transform on the video bitstream. 2. The decoding device 302 obtains a DIMD result of a current block in the video bitstream. Specifically, the decoding device 302 performs a DIMD process on the current block in the video bitstream to obtain a DIMD result of the current block, and the video bitstream contains DIMD modification instruction information for the current block. 3. The decoding device 302 modifies the DIMD result of the current block according to the modification instruction information. The modification process of the decoding device 302 is the same as that of the encoding device 302. 4. The decoding device 302 predicts the intra prediction mode of the current block based on the modified DIMD result to obtain a predicted value of the current block, and the predicted value of the current block is used to reconstruct a decoded image corresponding to the current block. 5. The decoding device 302 reconstructs a decoded image corresponding to the current block according to the predicted value of the current block, and recovers the reconstructed YUV of the current block.

[0030] As can be seen from the above, in the embodiment of the present application, the same DIMD process is performed on the encoder side and the decoder side, and the DIMD result is modified according to the same modification instruction information. By performing the modification, the derivation accuracy and self-adaptation ability of the DIMD can be improved. Then, the intra prediction mode of the current block is predicted based on the modified DIMD result, thereby obtaining a prediction value of the current block with high accuracy, and further improving the restoration ability of the reconstructed decoded image corresponding to the current block, thereby improving the encoding and decoding performance.

[0031] Next, from the encoder side, the video processing method provided by the embodiments of this application will be introduced in detail.

[0032] Referring to FIG. 5, it is a flow diagram of a video processing method provided by one schematic embodiment of the present application, where the video processing method is executed by an encoding device in the above-mentioned video processing system, that is, the embodiment of FIG. 5 is a flow diagram of a video processing method at the encoder side, where the video processing method includes the following steps S501 to S505: S501: Perform DIMD processing on a current block of video to obtain a DIMD result of the current block. The current block is a CU in a video being coded by a coding device. The DIMD result obtained by performing DIMD processing on the current block is divided into two aspects. According to one aspect, for the luma component of the current block, the DIMD result includes two DIMD luma derivation modes, namely, a first (th) DIMD luma derivation mode M1 and a second (th) DIMD luma derivation mode M2. According to the other aspect, for the chroma component of the current block, the DIMD result includes a DIMD chroma derivation mode.

[0033] S502: Based on the DIMD result of the current block, correction instruction information of the DIMD of the current block is generated. The modification indication information indicates whether the DIMD result of the current block needs to be modified, and if the DIMD result of the current block needs to be modified, the modification indication information further indicates a modification value for the modification. In a possible embodiment, the encoding device determines whether the DIMD result of the current block needs to be modified and what modification value to adopt for the modification based on a rate-distortion optimization (RDO). Then, the encoding device generates modification indication information for the DIMD of the current block based on the determination result.

[0034] S503: The DIMD result of the current block is corrected according to the correction instruction information. If the modification instruction information indicates that the DIMD result of the current block does not need to be modified, the intra prediction mode of the current block is predicted and obtained according to a conventional DIMD process, i.e., by combining with the conventional technology, and if the modification instruction information indicates that the DIMD of the current block needs to be modified, the modification value indicated by the modification instruction information is separately applied based on the DIMD result to appropriately adjust the DIMD result in terms of direction and magnitude, thereby improving the accuracy of the DIMD.

[0035] S504: Predict an intra prediction mode of the current block based on the modified DIMD result to obtain a predicted value of the current block, and the predicted value of the current block is used to reconstruct a decoded image corresponding to the current block.

[0036] S505: Encode the video based on the modification indication information and the prediction value of the current block to generate a video bitstream. The encoding device performs transform coding, quantization, entropy coding, etc. based on the predicted value of the current block to obtain a video bitstream, packages the modification instruction information into the video bitstream, and transmits it to the decoding device, and the decoding device performs a decoding process on the video bitstream.

[0037] In the embodiment of the present application, after performing DIMD processing on a current block in a video to obtain a DIMD result, the encoder generates modification instruction information according to the DIMD result, and modifies the DIMD result of the current block according to the modification instruction information, and the modification can improve the derivation accuracy and self-adaptation ability of DIMD, and predicts the intra prediction mode of the current block according to the modified DIMD result, thereby obtaining a prediction value of the current block with high accuracy, and further improving the restorability of the reconstructed decoded image corresponding to the current block, thereby improving the encoding performance. In addition, the encoder transmits modification instruction information to the decoder side through the video bitstream to instruct the decoder side to perform the same modification processing on the DIMD result, thereby improving the decoding performance.

[0038] Next, the relevant contents of the modification instruction information on the encoder side in the embodiment of the present application will be introduced in detail.

[0039] In one embodiment, the DIMD result includes a derivation mode of the DIMD (e.g., a luma derivation mode of the DIMD, a chroma derivation mode of the DIMD). The process of the encoding device performing the above step S502, i.e., determining whether the DIMD result of the current block needs to be modified based on the RDO and what modification value to adopt for the modification, and generating modification instruction information based on the determination result, specifically includes the following steps s11 to s17.

[0040] s11: Obtain a correction value set that includes one or more numerical values.

[0041] In one embodiment, the correction value set includes any one or more of the following: 1. The correction value set may be a predefined set of values, for example the predefined set of values ​​{-9, -6, -3, 3, 6, 9}. 2. The correction value set may be a value set that allows dynamic adjustment during the encoding and decoding process, that is, the values ​​in the correction value set can change dynamically. 3. The correction value set may be a value set constructed based on encoded or decoded information, for example, a value set constructed based on mode indexes of one or more intra angle modes obtained by deriving in the DIMD process, or, for example, a value set constructed based on the magnitude of the encoded or decoded CU, or, for example, a value set constructed based on a mode index in an MPM (Most Probable Mode) mode set, or, for example, a value set constructed from information such as encoded or decoded luma components, chroma components, etc. 4. The modified value set may be a set of values ​​defined by a high-level syntax element, which may include, but is not limited to, SPS (Sequence Parameter Set), PPS (Picture Parameter Set), Picture header, Slice header (slice / band header), etc. SPS is an important component in a video bitstream, and stores global parameters for the entire video sequence (i.e., all video frames). PPS is an important component in a video bitstream, and stores parameters required for decoding one or more video frames. Picture header stores parameters required for decoding one video frame. One video frame is coded into one or more Slices (slice / band), one Slice contains one or more CUs, and Slice header stores the relevant parameters of the Slice. For example, the correction value set is a value set constructed based on correction values ​​specified by any one or more high-level syntax elements of the SPS, PPS, Picture header, and Slice header.

[0042] In this embodiment, the correction value is determined from a correction value set, and the correction value set is supported to be obtained by being arranged in multiple ways, which enriches the correction process for the derivation mode, and further suits various correction scenarios to improve the video encoding and decoding performance.

[0043] s12: Pre-correct the derivation mode of the DIMD using each value in the correction value set. Pre-correction may be understood as pre-correction. The encoding device sequentially applies each value in the correction value set to the derivation mode of the DIMD, determining whether the derivation mode of the DIMD needs to be corrected, and tries to find the most suitable correction value to use. Take the example of a set of values ​​{-9, -6, -3, 3, 6, 9} and the derivation mode of the DIMD is intra-angle mode 20 (i.e., intra-angle mode with mode index 20), pre-correcting the derivation mode of the DIMD using each value in the correction value set means applying each value in the value set based on the mode index of the intra-angle mode 20, for example, the mode index obtained after pre-correcting the intra-angle mode 20 using the first value -9 is 20-9=11, the mode index obtained after pre-correcting the intra-angle mode 20 using the second value -6 is 20-6=14.... In this analogy, the mode index obtained after pre-correcting the intra-angle mode 20 using the last value 6 is 20+9=29.

[0044] s13: Obtain a rate-distortion cost set, where the rate-distortion cost set includes the rate-distortion cost of the DIMD derivation mode before pre-modification and the rate-distortion cost of the DIMD derivation mode after pre-modification by each numerical value in the modification value set.

[0045] In the embodiment of the present application, the encoding device determines to use the mode with the smallest rate-distortion cost based on the RDO, thereby ensuring the accuracy and self-adaptability of the derivation mode of the DIMD. Then, in step s13, the encoding device obtains a rate-distortion cost set, i.e., a set consisting of the rate-distortion cost of the derivation mode of the DIMD before pre-correction and the rate-distortion cost of the derivation mode of the DIMD after pre-correction by each value in the correction value set, and finds the minimum value of the rate-distortion cost from the rate-distortion cost set. If the rate-distortion cost of the derivation mode of the DIMD before pre-correction is itself the minimum rate-distortion cost, it indicates that the accuracy of the DIMD cannot be improved by correcting the derivation mode of the DIMD, and therefore proceeds to step s14 to determine that there is no need to correct the derivation mode of the DIMD. If the rate-distortion cost of the DIMD derivation mode before being pre-corrected is not the minimum rate-distortion cost, it indicates that correcting the DIMD derivation mode can reduce the rate-distortion cost of the DIMD derivation mode and improve the accuracy and self-adaptability of the DIMD to a certain extent, and therefore proceed to step s15 to determine that the DIMD derivation mode needs to be corrected.

[0046] s14: If the rate-distortion cost of the derivation mode of the DIMD before being pre-corrected is the minimum value in the rate-distortion cost set, it is determined that the derivation mode of the DIMD does not need to be corrected, and then proceed to step s17.

[0047] s15: If the rate-distortion cost of the derivation mode of the DIMD before being pre-corrected is not the minimum value in the rate-distortion cost set, it is determined that the derivation mode of the DIMD needs to be corrected.

[0048] s16: The target numerical value in the correction value set that corresponds to the minimum rate-distortion cost in the rate-distortion cost set is determined as the correction value to be used by the derivation mode of DIMD.

[0049] In the above example of s12, assume that the minimum rate-distortion cost in the rate-distortion cost set is the mode corresponding to mode index 29, which was obtained by previously modifying intra-angle mode 20 using the last number in the modification value set, 6, so the target number corresponding to the minimum rate-distortion cost is 6, and thus the number 6 can be determined to be the modification value to be used by intra-angle mode 20.

[0050] s17: Correction instruction information is generated based on the determination result. The modification indication information indicates whether the DIMD result of the current block needs to be modified, and if the DIMD result of the current block needs to be modified, the modification indication information further indicates a modification value for the modification.

[0051] In this embodiment, the encoding device determines whether the derivation mode needs to be modified based on the magnitude of the rate-distortion cost value of the derivation mode of the decoder-side intra mode derivation before it is pre-modified, and if it needs to be modified, determines the target value in the modification value set corresponding to the minimum rate-distortion cost in the rate-distortion cost set as the modification value, thereby ensuring the accuracy and self-adaptability of the derivation mode of the DIMD.

[0052] In one embodiment, a modification flag bit dimd_delta_flag is introduced, that is, the modification indication information includes a modification flag bit, and the modification flag bit dimd_delta_flag indicates whether the DIMD result of the current block needs to be modified. If the modification flag bit dimd_delta_flag is a first predetermined value (e.g., 1), it indicates that the DIMD result of the current block needs to be modified, and if the modification flag bit dimd_delta_flag is a second predetermined value (e.g., 0), it indicates that the DIMD result of the current block does not need to be modified.

[0053] In one embodiment, the modification flag bit may be located in an associated syntax element of the current block, which may include, but is not limited to, a high-level syntax element and / or a general syntax element. The high-level syntax element may include, but is not limited to, an SPS, a PPS, a Picture header, and a Slice header. The general syntax element may be other syntax elements except for the high-level syntax elements, such as a general syntax element that stores some parameters of the current block. In one embodiment, the modification flag bit may be located in a general syntax element associated with the current block, which indicates whether the DIMD result of the current block needs to be modified. If the modification flag bit in the general syntax element associated with the current block is a first predetermined value (e.g., 1), it indicates that the DIMD result of the current block needs to be modified, and if the modification flag bit in the general syntax element is a second predetermined value (e.g., 0), it indicates that the DIMD result of the current block does not need to be modified.

[0054] In another embodiment, the modification flag bit being placed in the high level syntax element associated with the current block specifically includes any one of the following aspects: 1. The modification flag bit is placed in an SPS referenced by the video sequence to which the current block belongs, and indicates whether modification is allowed for all video frames in the video sequence, and when the modification flag bit in the SPS is a first predetermined value (e.g., 1), it indicates that modification is allowed for all DIMD results of all video frames in the video sequence, and when the modification flag bit in the SPS is a second predetermined value (e.g., 0), it indicates that no modification is allowed for all DIMD results of all video frames in the video sequence. 2. The modification flag bit is placed in the PPS referenced by the video frame to which the current block belongs, and indicates whether modification is allowed for the DIMD results of one or more video frames that reference the PPS. When the modification flag bit in the PPS is a first predetermined value (e.g., 1), it indicates that modification is allowed for all of the DIMD results of one or more video frames that reference the PPS, and when the modification flag bit in the PPS is a second predetermined value (e.g., 0), it indicates that modification is not allowed for all of the DIMD results of one or more video frames that reference the PPS. 3. The modification flag bit is placed in the Picture header of the video frame to which the current block belongs and indicates whether modification is allowed for the video frame to which the current block belongs. When the modification flag bit in the Picture header is a first predetermined value (e.g., 1), it indicates that modification is allowed for all DIMD results of all CUs in the video frame to which the current block belongs. When the modification flag bit in the Picture header is a second predetermined value (e.g., 0), it indicates that modification is not allowed for all DIMD results of all CUs in the video frame to which the current block belongs.4. The modification flag bit is placed in the Slice header of the Slice to which the current block belongs, and indicates whether modifications are allowed for the Slice to which the current block belongs. When the modification flag bit in the Slice header is a first predetermined value (e.g., 1), it indicates that modifications are allowed for all DIMD results of all CUs in the Slice to which the current block belongs. When the modification flag bit in the Slice header is a second predetermined value (e.g., 0), it indicates that modifications are not allowed for all DIMD results of all CUs in the Slice to which the current block belongs.

[0055] In this embodiment, a modification flag bit is placed in the relevant syntax element of the current block to mark whether the decoder-side intra mode derivation result of the current block needs to be modified. This allows the modification flag bit to quickly determine whether modification is necessary, thereby improving the efficiency of the encoding and decoding process.

[0056] In other embodiments, modified flag bits may exist simultaneously in different associated syntax elements, but the priorities corresponding to modified flag bits in different positions are different, specifically, the priority of modified flag bits in high-level syntax elements is higher than the priority of modified flag bits in general syntax elements, and further, for modified flag bits in high-level syntax elements, the priority of modified flag bits in SPS is higher than the priority of modified flag bits in PPS, which is higher than the priority of modified flag bits in Picture header, which is higher than the priority of modified flag bits in Slice header. When the modification flag bits exist simultaneously in different associated syntax elements, the modification flag bits of each priority are checked in order according to descending priority to determine whether the current block needs to be modified, in which case, generally, the modification flag bits of a higher priority determine whether modification is allowed, and the modification flag bits of a lower priority determine whether modification is needed, for example, both the SPS and the PPS include a modification flag bit, and when the modification flag bit in the SPS is a second predetermined value (e.g., 0), it indicates that no modification is allowed for any of the DIMD results of all video frames in the video sequence, so that the encoding device does not check the modification flag bit in the PPS, and directly determines based on the modification flag bit in the SPS that no modification is needed for any of the DIMD results of all video frames in the video sequence, i.e., indicates that the current block does not need to be modified.If the modification flag bit in the SPS is a first predetermined value (for example, 1), it indicates that all DIMD results of all video frames in the video sequence are allowed to be modified, and then the encoding device checks modification flag bits with lower priorities according to descending order of priority to determine whether modification is necessary, i.e., the encoding device continues to check the modification flag bit in the PPS, and if the modification flag bit in the PPS is a first predetermined value (for example, 1), it indicates that all DIMD results of one or more video frames that reference the PPS are allowed to be modified, and if there is no modification flag bit with a lower priority than the modification flag bit in the PPS, the encoding device determines that all DIMD results of one or more video frames that reference the PPS are required to be modified based on the modification flag bit in the PPS, i.e., indicates that the DIMD result of the current block needs to be modified. Of course, if there is a modification flag bit with a lower priority than the modification flag bit in the PPS, the encoding device continues to check by level according to descending order of priority, and determines whether the current block needs to be modified according to the inspection result by level. When the modification flag bit in the PPS is a second predetermined value (e.g., 0), it indicates that modification is not allowed for any of the DIMD results of one or more video frames referencing the PPS, and regardless of whether there is a modification flag bit lower in priority than the modification flag bit in the PPS, the encoding device determines that no modification is required for any of the DIMD results of one or more video frames referencing the PPS based on the modification flag bit in the PPS. In this way, when the modification flag bit with a high priority indicates that modification is not allowed, the encoding device does not check the modification flag bit with a low priority, and directly indicates that the current block does not need to be modified based on the modification flag bit with a high priority, and when the modification flag bit with a high priority indicates that modification is allowed, the encoding device checks the modification flag bit with each priority in descending order in order, and determines whether the current block needs to be modified based on the check result.

[0057] In one embodiment, the DIMD result includes two DIMD luminance derivation modes and one DIMD chromaticity derivation mode, and in one executable embodiment, one modification flag bit dimd_delta_flag uniformly indicates whether the derivation mode of each DIMD needs to be modified, for example, when the modification flag bit dimd_delta_flag is a first predetermined value (e.g., 1), it indicates that all of the derivation modes of all DIMDs of the current block need to be modified, and when the modification flag bit dimd_delta_flag is a second predetermined value (e.g., 0), it indicates that none of the derivation modes of all DIMDs of the current block need to be modified.

[0058] In another possible embodiment, the derivation mode of each DIMD corresponds to one modification flag bit, and the derivation mode of each DIMD indicates whether it needs to be modified by its corresponding modification flag bit, for example, the luminance derivation mode M1 of the first (th) DIMD corresponds to one modification flag bit dimd_delta_flag1, and when the modification flag bit dimd_delta_flag1 is a first predetermined value (e.g., 1), it indicates that the luminance derivation mode M1 of the first (th) DIMD needs to be modified, and when the modification flag bit dimd_delta_flag1 is a second predetermined value (e.g., 0), it indicates that the luminance derivation mode M1 of the first (th) DIMD does not need to be modified. Also, for example, the luminance derivation mode M2 ​​of the 2(th) DIMD corresponds to one modification flag bit dimd_delta_flag2, and when the modification flag bit dimd_delta_flag2 is a first predetermined value (for example, 1), it indicates that the luminance derivation mode M2 ​​of the 2(th) DIMD needs to be modified, and when the modification flag bit dimd_delta_flag2 is a second predetermined value (for example, 0), it indicates that the luminance derivation mode M2 ​​of the 2(th) DIMD does not need to be modified. Also, for example, the chromaticity derivation mode of the DIMD corresponds to one modification flag bit dimd_delta_flag3, and when the modification flag bit dimd_delta_flag3 is a first predetermined value (for example, 1), it indicates that the chromaticity derivation mode of the DIMD needs to be modified, and when the modification flag bit dimd_delta_flag3 is a second predetermined value (for example, 0), it indicates that the chromaticity derivation mode of the DIMD does not need to be modified.

[0059] In other possible embodiments, as long as the derivation mode of each DIMD corresponds to one modification flag bit, the indication manner of each modification flag bit may be similar or different, for example, the luminance derivation mode M1 of the first (th) DIMD corresponds to one modification flag bit dimd_delta_flag1, and the luminance derivation mode M2 ​​of the second (th) DIMD corresponds to one modification flag bit dimd_delta_flag2, and when the modification flag bit dimd_delta_flag1 is a first predetermined value (e.g., 1), it indicates that the luminance derivation mode M1 of the first (th) DIMD needs to be modified, but when the modification flag bit dimd_delta_flag2 is also a first predetermined value (e.g., 1), it indicates that the luminance derivation mode M2 ​​of the second (th) DIMD does not need to be modified. Also, for example, the luminance derivation mode M1 of the first (th) DIMD corresponds to one modification flag bit dimd_delta_flag1, and the chromaticity derivation mode of the DIMD corresponds to one modification flag bit dimd_delta_flag3, and when the modification flag bit dimd_delta_flag1 is a first predetermined value (for example, 1), it indicates that the luminance derivation mode M1 of the first (th) DIMD needs to be modified, but only when the modification flag bit dimd_delta_flag3 is another predetermined value (for example, 5), it indicates that the chromaticity derivation mode of the DIMD needs to be modified.

[0060] In another embodiment, if the DIMD result of the current block needs to be modified, the modification instruction information further includes modification parameter instruction information, which indicates a modification value for modifying the DIMD result of the current block. An embodiment of the modification value indicated by the modification parameter instruction information may include, but is not limited to, any one or more of the following:

[0061] 1. The sign flag bit and the magnitude flag bit are used to jointly indicate the correction value.

[0062] In this embodiment, a sign flag bit dimd_delta_sign is introduced to indicate the sign of the modified value, i.e., the modified parameter indication information includes the sign flag bit dimd_delta_sign, and when the sign flag bit dimd_delta_sign is a first predetermined value (e.g., 1), it indicates that the sign of the modified value is a positive sign, and when the sign flag bit dimd_delta_sign is a second predetermined value (e.g., 0), it indicates that the sign of the modified value is a negative sign, or when the sign flag bit dimd_delta_sign is a first predetermined value (e.g., 1), it indicates that the sign of the modified value is a negative sign, and when the sign flag bit is a second predetermined value (e.g., 0), it indicates that the sign of the modified value is a positive sign.

[0063] The correction value set includes one or more values, and different levels are set for the values ​​with the same sign according to the magnitude of the amplitude, and levels are set for the values ​​with different signs. Take the correction value set as {-9, -6, -3, 3, 6, 9} as an example, the three values ​​-9, -6, -3 have the same sign (i.e., negative sign), and the three values ​​3, 6, 9 have the same sign (i.e., positive sign), so the correction value set includes two levels: positive number level and negative number level, and the values ​​with positive number level are 3, 6, 9, and the values ​​with negative number level are -3, -6, -9. Assuming that the positive number level is set according to the ascending order of the amplitude, the correction value set includes three positive number levels: the first positive number level 3, the second positive number level 6, and the third positive number level 9. Similarly, assuming that the negative number levels are also set according to the ascending order of amplitude, the correction value set includes three negative number levels, namely, a first negative number level -3, a second negative number level -6, and a third negative number level -9. Here, for a plurality of values ​​having the same sign in the correction value set, the levels may be set according to the ascending order of amplitude, or the levels may be set according to the descending order of amplitude, and the setting rules for different types of levels may be similar or different, for example, in the above example, the positive number levels are set according to the ascending order of amplitude, and the negative number levels are set according to the descending order of amplitude. In addition, since the values ​​in the correction value set can be flexibly set, the level types included in the correction value set are also flexible, for example, if the values ​​included in the correction value set are all positive numbers, the correction value set includes only positive number levels, and for example, if the values ​​included in the correction value set are all negative numbers, the correction value set includes only negative number levels. Also, in the above example, the situation in which the difference values ​​between different levels of the same type are similar (all 3) is merely an example, and the difference values ​​between different levels of the same type in a correction value set may be different, for example, the correction value set is {3, 7, 9}, the first positive number level is 3, the second positive number level is 7, and the third positive number level is 9, and the difference values ​​between the three levels may be different.Generally, the correction value set does not include the number 0, and if the number 0 is used as the correction value, no correction effect can be achieved. However, in special cases, if the correction value set includes the number 0, for example, by specifying the number 0 as a correction value in a high-level syntax element, 0 can be flexibly classified into a positive number level or a negative number level.

[0064] Based on the above description, in this embodiment, the modification parameter indication information further includes an amplitude flag bit, which indicates the amplitude value of the modification value. The amplitude flag bit has two possible forms:

[0065] Form 1: one level flag bit dimd_delta_level is introduced, that is, the amplitude flag bit includes a level flag bit dimd_delta_level, which indicates the level at which the amplitude value of the correction value is located in the correction value set.

[0066] Taking the correction value set as an example that is {-9, -6, -3, 3, 6, 9}, according to the above description, assuming that the correction value set includes three positive number levels and three negative number levels, first combine the sign flag bit dimd_delta_sign to determine the sign of the correction value, and determine the correction value to be a positive number, and then determine which positive number level the correction value is specifically based on the level flag bit dimd_delta_level, and if the level flag bit dimd_delta_level is a third predetermined value (for example, 00), then it is determined that the amplitude value of the correction value is the first positive number level 3, and then the correction value is the numerical value 3. If the level flag bit dimd_delta_level is a fourth predetermined value (e.g., 01), the correction value is determined to be the second positive number level 6, so the correction value is determined to be the numerical value 6, and if the level flag bit dimd_delta_level is a fifth predetermined value (e.g., 10), the correction value is determined to be the third positive number level 9, so the correction value is the numerical value 9.

[0067] Mode 2: A plurality of level flag bits are introduced, that is, the amplitude flag bit includes a plurality of level flag bits, and the plurality of level flag bits indicate the level at which the amplitude value of the correction value is located in the correction value set.

[0068] In a possible embodiment, the number of level flag bits is equal to the number of levels of corresponding types in the modification value set. Take the modification value set as {-9, -6, -3, 3, 6, 9} for example, the modification value set includes three positive number levels and three negative number levels, firstly combine the sign flag bit dimd_delta_sign to determine the sign of the modification value, if it is determined that the modification value is a positive number, use the three level flag bits as the first level flag bit dimd_delta_first_level, the second level flag bit dimd_delta_second_level, and the third level flag bit dimd_delta_third_level respectively. Different level flag bits indicate whether the amplitude value of the modified value is at the corresponding level, and in this example, the first level flag bit dimd_delta_first_level indicates whether the amplitude value of the modified value is at the first positive number level, the second level flag bit dimd_delta_second_level indicates whether the amplitude value of the modified value is at the second positive number level, and the third level flag bit dimd_delta_third_level indicates whether the amplitude value of the modified value is at the third positive number level.

[0069] If the first level flag bit dimd_delta_first_level is a first predetermined value (e.g., 1), it indicates that the amplitude value of the modified value is the first positive number level 3, in which case the second level flag bit dimd_delta_second_level and the third level flag bit dimd_delta_third_level do not need to be used, or the second level flag bit dimd_delta_second_level and the third level flag bit dimd_delta_third_level are both set to a second predetermined value (e.g., 0). If the first level flag bit dimd_delta_first_level is a second predetermined value (e.g. 0), it indicates that the amplitude value of the modified value is not the first positive number level, and then the second level flag bit dimd_delta_second_level can be used subsequently, and if the second level flag bit dimd_delta_second_level is a first predetermined value (e.g. 1), it indicates that the amplitude value of the modified value is the second positive number level 6, in which case the third level flag bit dimd_delta_third_level does not need to be used, or the third level flag bit dimd_delta_third_level is both set to a second predetermined value (e.g. 0). If the second level flag bit dimd_delta_second_level is a second predetermined value (e.g. 0), it indicates that the amplitude value of the modified value is not the second positive number level, and then the third level flag bit dimd_delta_third_level can be used subsequently, and this analogy can be used.

[0070] In another possible embodiment, the number of level flag bits is less than the number of levels of the corresponding type in the correction value set. The same level flag bits indicate the level where the amplitude value of the correction value is by different values. Similarly, assume that the correction value set is {-9, -6, -3, 3, 6, 9} as an example, the correction value set includes three positive number levels and three negative number levels, and first combine the sign flag bit dimd_delta_sign to determine the sign of the correction value, and determine the correction value to be a positive number. In this embodiment, only the first level flag bit dimd_delta_first_level and the second level flag bit dimd_delta_second_level may be introduced. If the first level flag bit dimd_delta_first_level is a first predetermined value (for example, 1), it indicates that the amplitude value of the correction value is the first positive number level 3. If the first level flag bit dimd_delta_first_level is a second predetermined value (e.g. 0), it indicates that the amplitude value of the modified value is not the first positive number level, and further, the second level flag bit dimd_delta_scihead_level is used, with different values ​​of the second level flag bit dimd_delta_scihead_level indicating different levels at which the amplitude value of the modified value is located, if the second level flag bit dimd_delta_second_level is a first predetermined value (e.g. 1), it indicates that the amplitude value of the modified value is the second positive number level 6, and if the second level flag bit dimd_delta_second_level is a second predetermined value (e.g. 0), it indicates that the amplitude value of the modified value is the third positive number level 9.

[0071] In this embodiment, the sign flag bit and the amplitude flag bit are used to jointly indicate the correction value, and a corresponding specific correction method is determined according to the sign flag bit and the amplitude flag bit, so that the derivation accuracy and self-adaptation ability of the DIMD can be improved, and the encoding and decoding performance can be further improved.

[0072] 2. The index flag bit indicates the modification value.

[0073] In this embodiment, an index flag bit dimd_delta_index is introduced, the modification parameter indication information includes the index flag bit dimd_delta_index, and the index flag bit dimd_delta_index is used to indicate the arrangement position of the modification value in the modification value set. The modification value set includes one or more numerical values, and these values ​​are arranged in order in the modification value set. Take the modification value set {-9,-6,-3,3,6,9} as an example, the numerical value -9 is arranged at the first position in the modification value set and the corresponding index is 0, the numerical value -6 is arranged at the second position in the modification value set and the corresponding index is 1, etc. By analogy, the numerical value 6 is arranged at the sixth position in the modification value set and the corresponding index is 5. In this way, different values ​​of the index flag bit dimd_delta_index indicate different positions of the modification value in the modification value set. Suppose the values ​​of the index flag bit dimd_delta_index are 000, 001, 010, 011, 100, 101, indicating that the modification value indices are 0, 1, 2, 3, 4, 5, indicating different array positions of the modification value in the modification value set. For example, when the index flag bit dimd_delta_index is 000, it indicates that the modification value index is 0, i.e., the modification value is the first numerical value in the modification value set minus 9. Also, for example, when the index flag bit dimd_delta_index is 001, it indicates that the modification value index is 1, i.e., the modification value is the second numerical value in the modification value set minus 6. Also, for example, when the index flag bit dimd_delta_index is 010, it indicates that the modification value index is 2, i.e., the modification value is the third numerical value in the modification value set minus 3... and so on.

[0074] In this embodiment, the correction value is indicated by the index flag bit, and the corresponding correction value can be accurately determined by the index flag bit, thereby ensuring the accuracy of the correction value, and the derivation accuracy and self-adaptation ability of the DIMD can be improved based on the correction value, thereby improving the encoding and decoding performance.

[0075] The embodiment of the modification value indication by the modification parameter indication information can be flexibly selected and used. As described above, the DIMD result includes two DIMD luminance derivation modes and one DIMD chromaticity derivation mode, and in one possible embodiment, each DIMD derivation mode may use the same modification value or different modification values, for example, the first (th) DIMD luminance derivation mode M1 uses a modification value M delta The second (th) DIMD luminance derivation mode M2 ​​uses the correction value M delta’ , and the chromaticity derivation mode of DIMD is the correction value M delta’’ In other possible embodiments, the indication form of the three correction values ​​may be the same or different, for example, the indication form of the three correction values ​​may be the same or different, for example, the indication form of the index flag bit for each of the three correction values ​​may be the same or different, for example, the indication form of the correction value M delta may be indicated in the form of a sign flag bit and one level flag bit for the correction value M delta’ may be indicated in the form of a sign flag bit and a number of level flag bits for the correction value M delta’’ In addition, the modification value sets used by the derivation modes of each DIMD may be similar or different, for example, the luminance derivation mode M1 of the first (th) DIMD uses a predefined set of values ​​as the modification value set, the luminance derivation mode M2 ​​of the second (th) DIMD uses a set of values ​​constructed based on encoded or decoded information as the modification value set, and the chromaticity derivation mode of the DIMD uses a set of values ​​defined by a high-level syntax element as the modification value set.

[0076] As can be seen from the above description, the DIMD result of the current block includes a DIMD luma derivation mode and a DIMD chroma derivation mode, and thus, in an embodiment of the present application, modifying the DIMD result of the current block at the encoder side includes modifying only the DIMD luma derivation mode, or modifying only the DIMD chroma derivation mode, or modifying both the DIMD luma derivation mode and the DIMD chroma derivation mode, where the DIMD luma derivation mode and the DIMD chroma derivation mode are allowed to be modified using similar or different modification values, and the DIMD luma derivation mode and the DIMD chroma derivation mode are allowed to be modified using similar or different sets of modification values.

[0077] In this embodiment, the modification of the luminance derivation mode or chromaticity derivation mode can be flexibly arranged and modified based on actual needs, thereby improving the derivation accuracy and self-adaptation ability of the DIMD, and further improving the encoding and decoding performance.

[0078] Furthermore, for two luminance derivation modes, namely the first (th) DIMD luminance derivation mode M1 and the second DIMD luminance derivation mode, in an embodiment of the present application, modifying the DIMD result of the current block includes modifying only the first DIMD luminance derivation mode, or modifying only the second DIMD luminance derivation mode, or modifying both the first DIMD luminance derivation mode and the second DIMD luminance derivation mode, wherein the first DIMD luminance derivation mode and the second DIMD luminance derivation mode are allowed to be modified using similar or different modification values, and the first DIMD luminance derivation mode and the second DIMD luminance derivation mode are allowed to be modified using similar or different sets of modification values.

[0079] In this embodiment, when multiple luminance derivation modes are involved, the modification of each luminance derivation mode can be flexibly arranged and modified based on actual needs, thereby improving the derivation accuracy and self-adaptive ability of DIMD and improving the encoding / decoding performance. Next, the modification process and related contents on the encoder side of the embodiment of this application will be introduced in detail.

[0080] After obtaining the modification instruction information, the encoding device modifies the DIMD result of the current block according to the modification instruction information. The modification described here is similar to the pre-modification process described above, in that both apply the modification value indicated by the modification instruction information based on the DIMD result, but the difference from the pre-modification process is as follows: in the pre-modification process, the encoder side performs pre-modification attempts on all values ​​in the modification value set in sequence, while in the modification process, the encoder side directly modifies based on the modification value determined by the modification instruction information.

[0081] In one embodiment, the DIMD result of the current block includes a DIMD derivation mode, and the DIMD derivation mode has a mode index, so that the flow of step S503 of modifying the DIMD result of the current block according to the modification instruction information, which is executed by the encoding device, specifically adjusts the mode index of the DIMD derivation mode using the modification value to modify the DIMD derivation mode. For example, assuming that the DIMD derivation mode to be modified is intra angle mode 20 (i.e., intra angle mode with mode index 20) and the modification value indicated by the modification instruction information is 3, the modification applies the modification value separately based on the mode index of the intra angle mode 20, i.e., the modification process is 20+3=23, and the DIMD derivation mode is changed from the intra angle mode 20 before the modification to the intra angle mode 23 through the modification process, and the DIMD derivation mode is optimized and adjusted in terms of direction and magnitude, and the rate-distortion cost of the DIMD derivation mode is reduced by the modification, thereby improving the accuracy and self-adaptability of the DIMD.

[0082] In one embodiment, the derivation mode of the DIMD includes two luminance derivation modes of the DIMD, and the luminance derivation mode of one of the DIMDs is M i where i is a positive integer and is less than or equal to the total number of luminance derivation modes of the DIMD (i.e., 2). M i If the mode is Planar or other non-intra-angle mode, the encoding device further ito a special intra-prediction mode, where the special intra-prediction mode includes, but is not limited to, any one of DC mode, horizontal mode, diagonal mode, vertical mode, and anti-diagonal mode, and the anti-diagonal mode is further divided into anti-diagonal mode 1 and anti-diagonal mode 2, where anti-diagonal mode 1 and anti-diagonal mode 2 correspond to different mode indexes.

[0083] In this embodiment, when the luminance derivation mode is a planar mode or other non-intra angle mode, it is modified and mapped to an intra prediction mode in a DC mode, a horizontal mode, a diagonal mode, a vertical mode or an anti-diagonal mode, thereby improving the derivation accuracy and self-adaptation ability of the DIMD and enhancing the encoding and decoding performance.

[0084] In another embodiment, the modified M i does not belong to the intra-angle mode set, the coding device further i to one mode in an intra angle mode set. In one implementation, the intra angle mode set is, for example, a set of 65 intra angles corresponding to mode indexes 2 to 66 defined by the VVC standard. In this embodiment, M i If the correction value used by is positive, the corrected M i The mode index of the mapping mode corresponding to is determined by Equation 5.1 below: ((m i - 1 + (M delta - 1)) % mod) + 2 Equation 5.1 M i If the correction value used by is negative, the corrected M i The mode index of the mapping mode corresponding to is determined by Equation 5.2 below: ((m i + offset - (M delta - 1)) % mod) + 2 Equation 5.2 In the above formulas 5.1 and 5.2, m i is Mi is the mode index of delta is M i is the correction value used, where offset = maximum mode index in the intra-angle mode set - 5. For example, assuming the maximum mode index in the intra-angle mode set is 66, then offset = 66 - 5 = 61, and mod = offset + 3. For example, in the above example, if offset = 61, then mod = 61 + 3 = 64.

[0085] Corrected M i If M is not an intra-prediction mode defined by a video coding standard (e.g., the VVC standard), the modified M i to intra prediction modes defined by the video coding standard to make them easier to use in the future. By modifying and mapping luma derivation modes that do not belong to the intra angle mode set to modes in the intra angle mode set, luma is derived according to modes in the intra angle mode set, improving the derivation accuracy and self-adaptation ability of DIMD, and improving encoding and decoding performance.

[0086] In another embodiment, the derivation mode of the modified DIMD must satisfy at least one of the following conditions: Condition 1: The derivation mode of the modified DIMD cannot include the derivation mode of the DIMD before modification; this condition is to guarantee the effect of the modification and avoid invalid modification. This condition can be understood as follows: The derivation mode of the modified DIMD obtained by modifying the derivation mode of any one DIMD must not be the same as the derivation mode of the DIMD before modification, and must not be the same as the derivation mode of another unmodified DIMD. For example, the luminance derivation mode M1 of the first (th) DIMD after modification must not be the same as the luminance derivation mode M1 of the first (th) DIMD before modification, and must not be the same as the luminance derivation mode M2 ​​of the second (th) DIMD, and must not be the same as the chromaticity derivation mode of the DIMD. Condition 2: The derived modes of the modified DIMD cannot include modes in the MPM mode set. Condition 3: The derived modes of the modified DIMD cannot include modes in the non-MPM mode set.

[0087] The above conditions 2 and 3 are intended to avoid a collision between the derivation mode of the modified DIMD and the existing encoding modes on the encoder side (i.e., modes in the MPM mode set or modes in a non-MPM mode set). If the derivation mode of the modified DIMD includes these existing encoding modes, i.e., if the derivation mode of the modified DIMD is one of these existing encoding modes, then these encoding modes can be directly selected, making the modification process meaningless. In this way, the establishment of the above conditions 2 and 3 also guarantees the effect of the modification and makes it possible to avoid invalid modification.

[0088] Next, the contents related to predicting the intra prediction mode of the current block on the encoder side of the embodiment of the present application will be introduced in detail.

[0089] (1) A process of predicting an intra-prediction mode of a luminance component of a current block. As described above, the DIMD result of the current block includes a DIMD derivation mode, and the DIMD derivation mode includes a first DIMD luma derivation mode and a second DIMD luma derivation mode. Thus, the flow of step S504 of predicting the intra prediction mode of the current block based on the modified DIMD result to obtain a predicted value of the current block, performed by the encoding device, specifically includes any one of the following aspects: 1. Predict the intra prediction mode of the current block using the luminance derivation mode of the modified first DIMD, and determine the predicted value of the luminance derivation mode of the modified first DIMD as the predicted value of the luminance component of the current block. 2. Predict the intra prediction mode of the current block using the luminance derivation mode of the modified second DIMD, and determine the predicted value of the luminance derivation mode of the modified second DIMD as the predicted value of the luminance component of the current block. 3. Predict the intra prediction mode of the current block using the luminance derivation mode and planar mode of the modified first DIMD, respectively, and perform weighted fusion on the predicted value of the derivation mode of the modified first DIMD and the predicted value of the planar mode to obtain a predicted value of the luminance component of the current block. 4. Predict the intra prediction mode of the current block using the luminance derivation mode and planar mode of the modified second DIMD, respectively, and perform weighted fusion on the predicted value of the derivation mode of the modified second DIMD and the predicted value of the planar mode to obtain a predicted value of the luminance component of the current block. 5. Predict the intra prediction mode of the current block using the modified first DIMD luminance derivation mode and the modified second DIMD luminance derivation mode, respectively, and perform weighted fusion on the predicted value of the modified first DIMD derivation mode and the predicted value of the modified second DIMD luminance derivation mode to obtain a predicted value of the luminance component of the current block. 6. Predict the intra prediction mode of the current block using the modified first DIMD luminance derivation mode, the second DIMD luminance derivation mode, and the planar mode, respectively, and perform weighted fusion on the modified first DIMD luminance derivation mode prediction value, the second DIMD luminance derivation mode prediction value, and the planar mode prediction value to obtain a luminance component prediction value of the current block. 7. Predict the intra prediction mode of the current block using the luminance derivation mode of the first DIMD, the luminance derivation mode of the modified second DIMD, and the planar mode, respectively, and perform weighted fusion on the predicted value of the luminance derivation mode of the first DIMD, the predicted value of the luminance derivation mode of the modified second DIMD, and the predicted value of the planar mode to obtain a predicted value of the luminance component of the current block. 8. Predict the intra prediction mode of the current block using the modified first DIMD luminance derivation mode, the modified second DIMD luminance derivation mode, and the planar mode, respectively, and perform weighted fusion on the predicted value of the modified first DIMD luminance derivation mode, the predicted value of the modified second DIMD luminance derivation mode, and the predicted value of the planar mode to obtain a predicted value of the luminance component of the current block.

[0090] According to the weighted fusion of 3. to 8. above, the weight value used by each mode can be flexibly set according to actual needs, which is not limited to the embodiments of the present application. For example, in the weighted fusion of 3. above, the weight value of the modified 1st (th) DIMD derivation mode M1 is 43 / 64, and the weight value of the planar mode is 21 / 64, and the example weight values ​​are merely examples and may be other weight values. Also, for example, in the weighted fusion of 8. above, the weight value of the planar mode is 21 / 64, and the remaining weight value of 43 / 64 is assigned to the modified 1st (th) DIMD derivation mode M1 and the modified 2nd (th) DIMD luminance derivation mode M2 ​​with reference to the above equations 4.1 and 4.2, and the example weight values ​​are also merely examples and may be other weight values. By using various modified luminance derivation modes for prediction, the derivation accuracy and self-adaptation ability of DIMD are improved, and a highly accurate prediction value of the current block is obtained, improving the encoding and decoding performance.

[0091] (2) predicting the intra prediction mode of a chrominance component of a current block; The DIMD result of the current block includes a DIMD derivation mode, and the DIMD derivation mode includes a DIMD chrominance derivation mode. Thus, the flow of step S504 of predicting an intra prediction mode of the current block according to the modified DIMD result to obtain a predicted value of the current block, performed by the encoding device, specifically includes any one of the following aspects: 1. If the luminance derivation mode of any one or more DIMDs is modified, the chrominance derivation mode of the DIMDs does not need to be modified, and in this case, the chrominance derivation mode of the unmodified DIMD is used to predict the intra prediction mode of the current block, and the predicted value of the chrominance derivation mode of the DIMD is directly determined as the predicted value of the chrominance component of the current block. 2. When the chromaticity derivation mode of the DIMD is modified, the intra prediction mode of the current block is predicted using the modified chromaticity derivation mode of the DIMD, and the predicted value of the modified chromaticity derivation mode of the DIMD is determined as the predicted value of the chromaticity component of the current block. By predicting the intra prediction mode of the current block according to the chromaticity derivation mode, it is possible to improve the derivation accuracy and self-adaptation ability of the DIMD, and obtain a highly accurate predicted value of the current block, thereby improving the encoding and decoding performance.

[0092] According to the description of the above embodiment, after performing DIMD processing on the current block in the video to obtain the DIMD result, the encoder generates modification instruction information according to the DIMD result, and modifies the DIMD result of the current block according to the modification instruction information, and the modification can improve the derivation accuracy and self-adaptation ability of DIMD, and predicts the intra prediction mode of the current block according to the modified DIMD result, thereby obtaining a prediction value of the current block with high accuracy, and further improving the restorability of the reconstructed decoded image corresponding to the current block, thereby improving the encoding performance. In addition, the encoder transmits modification instruction information to the decoder side through the video bitstream to instruct the decoder side to perform the same modification processing on the DIMD result, thereby improving the decoding performance.

[0093] Next, from the decoder side, the video processing method provided by the embodiments of this application will be introduced in detail.

[0094] Referring to Figure 6, it is a flow diagram of a video processing method provided by another schematic embodiment of the present application, where the video processing method is executed by a decoding device in the above-mentioned video processing system, that is, the embodiment of Figure 6 is a flow of a video processing method on the decoder side, where the video processing method includes the following steps S601 to S603:

[0095] S601: Perform DIMD processing on a current block in a video bitstream to obtain a DIMD result for the current block, where the video bitstream includes DIMD modification instruction information for the current block, and the current block is a coding unit that is a target of decoding processing in the video bitstream.

[0096] S602: The DIMD result of the current block is corrected according to the correction instruction information.

[0097] S603: Predict an intra prediction mode of the current block based on the modified DIMD result to obtain a predicted value of the current block, and the predicted value of the current block is used to reconstruct a decoded image corresponding to the current block.

[0098] As can be seen from the above description of the embodiment of Figure 5, the modification indication information is directly encoded into the video bitstream by the encoding device, and after receiving the video bitstream transmitted from the encoding device, the decoding device obtains the modification indication information of the DIMD of the current block from the video bitstream, modifies the DIMD result of the current block according to the modification indication information, and finally predicts the intra prediction mode of the current block according to the modified DIMD result to obtain a predicted value of the current block. Then, the decoding device reconstructs a decoded image corresponding to the current block according to the predicted value of the current block, and recovers the reconstructed YUV of the current block.

[0099] In an embodiment of the present application, the encoder side transmits modification instruction information to the decoder side via a video bitstream, and the decoder side modifies the DIMD result according to the modification instruction information. Through the modification, the derivation accuracy and self-adaptation ability of DIMD can be improved, and the intra prediction mode of the current block is predicted based on the modified DIMD result, thereby obtaining a prediction value of the current block with high accuracy, and further improving the restoration ability of the reconstructed decoded image corresponding to the current block. Thus, in the embodiment of the present application, the encoder side and the decoder side perform the same DIMD process, and perform the same modification on the DIMD result according to the same modification instruction information, thereby improving the derivation accuracy and self-adaptation ability of DIMD on both the encoder and decoder sides, and improving the encoding and decoding performance.

[0100] Next, the relevant contents of the modification instruction information on the decoder side in the embodiment of the present application will be introduced in detail.

[0101] In one embodiment, the modification instruction information includes a modification flag bit, which indicates whether the DIMD result of the current block needs to be modified, and if the modification flag bit is a first predetermined value (e.g., 1), it indicates that the DIMD result of the current block needs to be modified, and if the modification flag bit is a second predetermined value (e.g., 0), it indicates that the DIMD result of the current block does not need to be modified.

[0102] In another embodiment, when the DIMD result of the current block needs to be modified, the modification instruction information further includes modification parameter instruction information, which indicates a modification value for modifying the DIMD result of the current block, the modification value set including any one or more of a predefined value set, a value set allowing dynamic adjustment during encoding / decoding process, a value set constructed based on encoded or decoded information, and a value set defined by a high level syntax element.

[0103] In one possible embodiment, the modification parameter indication information includes a sign flag bit indicating a sign of the modification value and an amplitude flag bit indicating an amplitude value of the modification value; the sign flag bit indicates that the sign of the modification value is positive when it is a first predetermined value, and the sign flag bit indicates that the sign of the modification value is negative when it is a second predetermined value; or the flag bit indicates that the sign of the modification value is negative when it is the first predetermined value, and the sign flag bit indicates that the sign of the modification value is positive when it is the second predetermined value; the modification value set includes one or more numerical values, and multiple numerical values ​​having the same sign are set at different levels according to the magnitude of the amplitude; the amplitude flag bit includes one or more level flag bits, and the level flag bits indicate the level at which the amplitude value of the modification value is located in the modification value set.

[0104] In another possible embodiment, the correction value set includes one or more numerical values, the one or more numerical values ​​being arranged in order in the correction value set, and the correction parameter indication information includes an index flag bit, which indicates the arrangement position of the correction value in the correction value set.

[0105] Similar to the encoder side, the DIMD result of the current block includes a DIMD luma derivation mode and a DIMD chroma derivation mode, so that in an embodiment of the present application, modifying the DIMD result of the current block at the decoder side similarly includes modifying only the DIMD luma derivation mode, or only the DIMD chroma derivation mode, or modifying both the DIMD luma derivation mode and the DIMD chroma derivation mode, where the DIMD luma derivation mode and the DIMD chroma derivation mode are allowed to be modified using similar or different modification values, and the DIMD luma derivation mode and the DIMD chroma derivation mode are allowed to be modified using similar or different sets of modification values. Furthermore, for two luminance derivation modes, namely the first (th) DIMD luminance derivation mode M1 and the second DIMD luminance derivation mode, in an embodiment of the present application, modifying the DIMD result of the current block includes modifying only the first DIMD luminance derivation mode, or modifying only the second DIMD luminance derivation mode, or modifying both the first DIMD luminance derivation mode and the second DIMD luminance derivation mode, wherein the first DIMD luminance derivation mode and the second DIMD luminance derivation mode are allowed to be modified using similar or different modification values, and the first DIMD luminance derivation mode and the second DIMD luminance derivation mode are allowed to be modified using similar or different sets of modification values.

[0106] Here, in the embodiment of the present application, since the relevant contents of the correction instruction information on the decoder side and the encoder side are the same, it is sufficient to refer to the description of the relevant contents of the correction instruction information on the encoder side above for the relevant contents of the correction instruction information on the decoder side, and no further details will be given here.

[0107] Next, the modification process and related contents on the decoder side of the embodiment of the present application will be introduced in detail.

[0108] After obtaining the modification instruction information, the decoding device modifies the DIMD result of the current block according to the modification instruction information. In one embodiment, the DIMD result of the current block includes a DIMD derivation mode, and the DIMD derivation mode comprises a mode index, so that the step S602 of modifying the DIMD result of the current block according to the modification instruction information, performed by the decoding device, may include adjusting the mode index of the DIMD derivation mode using the modification value to modify the DIMD derivation mode.

[0109] In one embodiment, the derivation mode of the DIMD includes two luminance derivation modes of the DIMD, and the luminance derivation mode of any one of the DIMDs is M i where i is a positive integer and is less than or equal to the total number of luminance derivation modes of the DIMD; M i If M is in planar mode or other non-intra-angle mode, the decoding device further i to a special intra-prediction mode, where the special intra-prediction mode includes any one of DC mode, horizontal mode, diagonal mode, vertical mode, anti-diagonal mode 1, and anti-diagonal mode 2.

[0110] In another embodiment, the modified M i does not belong to the intra-angle mode set, the decoding device further i to any one of the modes in the intra-angle mode set. In one implementation, M i If the correction value used by is positive, the corrected M i The mode index of the mapping mode corresponding to M is determined by Equation 5.1 above. i If the correction value used by is negative, the corrected M i The mode index of the mapping mode corresponding to is determined by equation 5.2 above.

[0111] In another embodiment, the derived mode of the modified DIMD satisfies at least one of the following conditions: the derived mode of the modified DIMD cannot include a derived mode of the DIMD before the modification; the derived mode of the modified DIMD cannot include a mode in an MPM mode set; and the derived mode of the modified DIMD cannot include a mode in a non-MPM mode set.

[0112] Here, in the embodiment of the present application, since the correction processes performed by the decoder side and the encoder side are the same, for the correction process and related contents on the decoder side, it is sufficient to refer to the description of the correction process and related contents on the encoder side above, and no further details will be given here.

[0113] Next, the relevant content of predicting the intra prediction mode of the current block on the decoder side of the embodiment of the present application will be introduced in detail.

[0114] (1) A process of predicting an intra-prediction mode of a luminance component of a current block. As described above, the DIMD result of the current block includes a DIMD derivation mode, and the DIMD derivation mode includes a first DIMD luma derivation mode and a second DIMD luma derivation mode. Thus, the flow of step S603 of predicting the intra prediction mode of the current block based on the modified DIMD result to obtain a predicted value of the current block, which is performed by the decoding device, specifically includes any one of the following aspects: 1. Predict the intra prediction mode of the current block using the luminance derivation mode of the modified first DIMD, and determine the predicted value of the luminance derivation mode of the modified first DIMD as the predicted value of the luminance component of the current block. 2. Predict the intra prediction mode of the current block using the luminance derivation mode of the modified second DIMD, and determine the predicted value of the luminance derivation mode of the modified second DIMD as the predicted value of the luminance component of the current block. 3. Predict the intra prediction mode of the current block using the luminance derivation mode and planar mode of the modified first DIMD, respectively, and perform weighted fusion on the predicted value of the derivation mode of the modified first DIMD and the predicted value of the planar mode to obtain a predicted value of the luminance component of the current block. 4. Predict the intra prediction mode of the current block using the luminance derivation mode and planar mode of the modified second DIMD, respectively, and perform weighted fusion on the predicted value of the derivation mode of the modified second DIMD and the predicted value of the planar mode to obtain a predicted value of the luminance component of the current block. 5. Predict the intra prediction mode of the current block using the modified first DIMD luminance derivation mode and the modified second DIMD luminance derivation mode, respectively, and perform weighted fusion on the predicted value of the modified first DIMD derivation mode and the predicted value of the modified second DIMD luminance derivation mode to obtain a predicted value of the luminance component of the current block. 6. Predict the intra prediction mode of the current block using the modified first DIMD luminance derivation mode, the second DIMD luminance derivation mode, and the planar mode, respectively, and perform weighted fusion on the modified first DIMD luminance derivation mode prediction value, the second DIMD luminance derivation mode prediction value, and the planar mode prediction value to obtain a luminance component prediction value of the current block. 7. Predict the intra prediction mode of the current block using the luminance derivation mode of the first DIMD, the luminance derivation mode of the modified second DIMD, and the planar mode, respectively, and perform weighted fusion on the predicted value of the luminance derivation mode of the first DIMD, the predicted value of the luminance derivation mode of the modified second DIMD, and the predicted value of the planar mode to obtain a predicted value of the luminance component of the current block. 8. Predict the intra prediction mode of the current block using the modified first DIMD luminance derivation mode, the modified second DIMD luminance derivation mode, and the planar mode, respectively, and perform weighted fusion on the predicted value of the modified first DIMD luminance derivation mode, the predicted value of the modified second DIMD luminance derivation mode, and the predicted value of the planar mode to obtain a predicted value of the luminance component of the current block.

[0115] (2) predicting the intra prediction mode of a chrominance component of a current block; The DIMD result of the current block includes a DIMD derivation mode, and the DIMD derivation mode includes a DIMD chrominance derivation mode. Thus, the flow of step S603 of predicting an intra prediction mode of the current block according to the modified DIMD result to obtain a predicted value of the current block, performed by the decoding device, specifically includes any one of the following aspects: 1. If the luminance derivation mode of any one or more DIMDs is modified, the chrominance derivation mode of the DIMDs does not need to be modified, and in this case, the chrominance derivation mode of the unmodified DIMD is used to predict the intra prediction mode of the current block, and the predicted value of the chrominance derivation mode of the DIMD is directly determined as the predicted value of the chrominance component of the current block. 2. If the chromaticity derivation mode of the DIMD is modified, the intra prediction mode of the current block is predicted using the modified chromaticity derivation mode of the DIMD, and the predicted value of the modified chromaticity derivation mode of the DIMD is determined as the predicted value of the chromaticity component of the current block.

[0116] Here, in the embodiment of the present application, the intra prediction process performed by the decoder side and the encoder side is also consistent, so for the process by the decoder side to predict the intra prediction mode of the current block, it is sufficient to refer to the description of the process by the encoder side to predict the intra prediction mode of the current block above, and no further details will be given here.

[0117] According to the description of the above embodiment, the encoder side transmits modification instruction information to the decoder side via a video bitstream, and the decoder side modifies the DIMD result according to the modification instruction information. Through the modification, the derivation accuracy and self-adaptation ability of DIMD can be improved, and the intra prediction mode of the current block is predicted based on the modified DIMD result, thereby obtaining a prediction value of the current block with high accuracy, and further improving the restoration ability of the reconstructed decoded image corresponding to the current block. Thus, in the embodiment of the present application, the encoder side and the decoder side perform the same DIMD process, and perform the same modification on the DIMD result according to the same modification instruction information, thereby improving the derivation accuracy and self-adaptation ability of DIMD on both the encoder and decoder sides, and improving the encoding and decoding performance.

[0118] Next, the video processing device provided by the embodiment of the present application will be introduced in detail.

[0119] Referring to Figure 7, it is a structural schematic diagram of a video processing device provided by one schematic embodiment of the present application, the video processing device is disposed in a computer device provided by the embodiment of the present application, the computer device may be the encoding device mentioned in the above method embodiment. The video processing device of Figure 7 may be a computer readable instruction (including program code) executable by the computer device, the video processing device can perform some or all of the steps of the method embodiment of Figure 5. Referring to Figure 7, the video processing device includes: A processing unit 701 for performing DIMD processing on a current block of a video to obtain a DIMD result of the current block, the current block being a coding unit to be coded in the video, and further for generating DIMD modification instruction information of the current block according to the DIMD result of the current block; a modification unit 702 for modifying the DIMD result of the current block according to the modification instruction information; a prediction unit 703 for predicting an intra prediction mode of the current block according to the modified DIMD result to obtain a predicted value of the current block, where the predicted value of the current block is used to reconstruct a decoded image corresponding to the current block; The processing unit 701 further encodes the video based on the modification indication information and the prediction value of the current block to generate a video bitstream.

[0120] In one embodiment, the DIMD result of the current block includes a DIMD derivation mode, and the processing unit 701 specifically obtains a modification value set including one or more numerical values, pre-modifies the DIMD derivation mode using each numerical value in the modification value set, and obtains a rate-distortion cost set, the rate-distortion cost set including the rate-distortion cost of the DIMD derivation mode before pre-modification and the rate-distortion cost of the DIMD derivation mode after pre-modification by each numerical value in the modification value set, and if the rate-distortion cost of the DIMD derivation mode before pre-modification is the minimum value in the rate-distortion cost set, generates modification instruction information indicating that the DIMD derivation mode does not need to be modified, and if the rate-distortion cost of the DIMD derivation mode before pre-modification is not the minimum value in the rate-distortion cost set, determines that the DIMD derivation mode needs to be modified, and generates modification instruction information including a modification value, where the modification value is a target numerical value in the modification value set corresponding to the minimum rate-distortion cost in the rate-distortion cost set.

[0121] In one embodiment, the modification indication information includes a modification flag bit, which indicates whether the DIMD result of the current block needs to be modified, and indicates that the DIMD result of the current block needs to be modified if the modification flag bit is a first predetermined value, and indicates that the DIMD result of the current block does not need to be modified if the modification flag bit is a second predetermined value, and the modification flag bit is located in an associated syntax element of the current block.

[0122] In one embodiment, if the DIMD result of the current block needs to be modified, the modification instruction information further includes modification parameter instruction information, where the modification parameter instruction information indicates a modification value for modifying the DIMD result of the current block, and the modification value belongs to a modification value set, and the modification value set includes any one or more of a predefined value set, a value set that allows dynamic adjustment during the encoding / decoding process, a value set constructed based on encoded or decoded information, and a value set defined by a high-level syntax element.

[0123] In one embodiment, the modification parameter indication information includes a sign flag bit for indicating the sign of the modification value and an amplitude flag bit for indicating the amplitude value of the modification value, where when the sign flag bit is a first predetermined value, it indicates that the sign of the modification value is a positive sign, and when the sign flag bit is a second predetermined value, it indicates that the sign of the modification value is a negative sign, or when the sign flag bit is the first predetermined value, it indicates that the sign of the modification value is a negative sign, and when the sign flag bit is the second predetermined value, it indicates that the sign of the modification value is a positive sign, the modification value set includes one or more numerical values, and different levels are set for multiple numerical values ​​having the same sign according to the magnitude of the amplitude value, and the amplitude flag bit includes one or more level flag bits, and the level flag bits indicate the level at which the amplitude value of the modification value is located in the modification value set.

[0124] In one embodiment, the modification value set includes one or more numerical values, the one or more numerical values ​​being arranged in order in the modification value set, and the modification parameter indication information includes an index flag bit, which indicates an arrangement position of the modification value in the modification value set.

[0125] In one embodiment, the DIMD result of the current block includes a DIMD derivation mode, and the DIMD derivation mode has a mode index, and the modification unit 702 specifically uses the modification value to adjust the mode index of the DIMD derivation mode and modify the DIMD derivation mode.

[0126] In one embodiment, the derivation mode of the DIMD includes two luminance derivation modes of the DIMD, and the luminance derivation mode of any one of the DIMDs is M i where i is a positive integer and is less than or equal to the total number of luminance derivation modes of the DIMD, and the modifying unit 702 further defines M i If is in planar mode or other non-intra-angle mode, the modified M i to a special intra-prediction mode, where the special intra-prediction mode includes any one of a direct mode, a horizontal mode, a diagonal mode, a vertical orthogonal mode, and an anti-diagonal mode.

[0127] In one embodiment, the derivation mode of the DIMD includes two luminance derivation modes of the DIMD, and the luminance derivation mode of any one of the DIMDs is M i where i is a positive integer and is less than or equal to the total number of luminance derivation modes of the DIMD, and the modification unit 702 further determines the modified M i If does not belong to the intra-angle mode set, the corrected M i to any one mode in the intra-angle mode set, and M i If the correction value used by is positive, the corrected M i The mode index of the mapping mode corresponding to is determined by Eq. 5.1 above, and M i If the correction value used by is negative, the corrected M i The mode index of the mapping mode corresponding to is determined by equation 5.2 above.

[0128] In one embodiment, the derivation mode of the modified DIMD satisfies at least one of the following conditions: the derivation mode of the modified DIMD does not include the derivation mode of the pre-modified DIMD; the derivation mode of the modified DIMD does not include a mode in an MPM mode set; and the derivation mode of the modified DIMD does not include a mode in a non-MPM mode set.

[0129] In one embodiment, the DIMD result of the current block includes a DIMD derivation mode, which includes a DIMD luma derivation mode and a DIMD chroma derivation mode, and the modification unit 702 specifically modifies the DIMD luma derivation mode, or modifies the DIMD chroma derivation mode, or modifies both the DIMD luma derivation mode and the DIMD chroma derivation mode, allowing the DIMD luma derivation mode and the DIMD chroma derivation mode to be modified using similar or different modification values, and allowing the DIMD luma derivation mode and the DIMD chroma derivation mode to be modified using similar or different modification value sets.

[0130] In one embodiment, the DIMD result of the current block includes a DIMD derivation mode, which includes a first DIMD luminance derivation mode and a second DIMD luminance derivation mode, and the modification unit 702 specifically modifies the first DIMD luminance derivation mode, or modifies the second DIMD luminance derivation mode, or modifies both the first DIMD luminance derivation mode and the second DIMD luminance derivation mode, allowing the first DIMD luminance derivation mode and the second DIMD luminance derivation mode to be modified using similar or different modification values, and allowing the first DIMD luminance derivation mode and the second DIMD luminance derivation mode to be modified using similar or different modification value sets.

[0131] In one embodiment, the DIMD result of the current block includes a DIMD derivation mode, and the DIMD derivation mode includes a first DIMD luma derivation mode and a second DIMD luma derivation mode. The prediction unit 703 specifically uses the modified first DIMD luma derivation mode to predict the intra prediction mode of the current block, and determines the predicted value of the modified first DIMD luma derivation mode as the predicted value of the luma component of the current block; or uses the modified second DIMD luma derivation mode to predict the intra prediction mode of the current block, and determines the predicted value of the modified first DIMD luma derivation mode as the predicted value of the luma component of the current block. The predicted value of the luminance derivation mode of the modified second DIMD is determined as a predicted value of the luminance component of the current block; or the luminance derivation mode and the planar mode of the modified first DIMD are respectively used to predict the intra prediction mode of the current block, and the predicted value of the derivation mode of the modified first DIMD and the predicted value of the planar mode are weightedly fused to obtain a predicted value of the luminance component of the current block; or the luminance derivation mode and the planar mode of the modified second DIMD are respectively used to predict the intra prediction mode of the current block, and the predicted value of the luminance component of the current block is determined as a predicted value of the luminance component of the current block. perform weighted fusion on the predicted value of the derivation mode of the second DIMD and the predicted value of the planar mode to obtain a predicted value of the luminance component of the current block; or use the modified first DIMD luminance derivation mode and the modified second DIMD luminance derivation mode to predict an intra prediction mode of the current block, and perform weighted fusion on the predicted value of the modified first DIMD derivation mode and the predicted value of the modified second DIMD luminance derivation mode to obtain a predicted value of the luminance component of the current block; or use the modified first DIMD luminance derivation mode and the modified second DIMD luminance derivation mode to predict an intra prediction mode of the current block. , predicting an intra prediction mode of the current block using the luminance derivation mode and planar mode of the second DIMD, respectively, and performing weighted fusion on the predicted value of the luminance derivation mode of the modified first DIMD, the predicted value of the luminance derivation mode of the second DIMD, and the predicted value of the planar mode to obtain a predicted value of the luminance component of the current block; or predicting an intra prediction mode of the current block using the luminance derivation mode of the first DIMD, the luminance derivation mode of the modified second DIMD, and the planar mode, respectively, to obtain a predicted value of the luminance derivation mode of the first DIMD,Perform weighted fusion on the predicted value of the luminance derivation mode of the modified second DIMD and the predicted value of the planar mode to obtain a predicted value of the luminance component of the current block; or predict the intra prediction mode of the current block using the luminance derivation mode of the modified first DIMD, the luminance derivation mode of the modified second DIMD, and the planar mode, respectively, and perform weighted fusion on the predicted value of the luminance derivation mode of the modified first DIMD, the predicted value of the luminance derivation mode of the modified second DIMD, and the predicted value of the planar mode to obtain a predicted value of the luminance component of the current block.

[0132] In one embodiment, the DIMD result of the current block includes a DIMD derivation mode, and the DIMD derivation mode includes a DIMD chrominance derivation mode. The prediction unit 703 specifically uses the modified DIMD chrominance derivation mode to predict the intra prediction mode of the current block, and determines the predicted value of the modified DIMD chrominance derivation mode as the predicted value of the chrominance component of the current block.

[0133] Referring to Figure 8, it is a structural schematic diagram of a video processing device provided by another schematic embodiment of the present application, the video processing device is disposed in a computer device provided by the embodiment of the present application, the computer device may be the decoding device mentioned in the above method embodiment. The video processing device of Figure 8 may be a computer readable instruction (including program code) executable by the computer device, the video processing device performs some or all of the steps of the method embodiment of Figure 6. Referring to Figure 8, the video processing device: A processing unit 801 performs a DIMD process on a current block in a video bitstream to obtain a DIMD result of the current block, the video bitstream includes DIMD modification instruction information of the current block, and the current block is a coding unit to be decoded in the video bitstream; a modification unit 802 for modifying the DIMD result of the current block according to the modification instruction information; and a prediction unit 803 for predicting an intra-prediction mode of the current block based on the modified DIMD result to obtain a predicted value of the current block, where the predicted value of the current block is used to reconstruct a decoded image corresponding to the current block.

[0134] In one embodiment, the modification indication information includes a modification flag bit, which indicates whether the DIMD result of the current block needs to be modified, and indicates that the DIMD result of the current block needs to be modified if the modification flag bit is a first predetermined value, and indicates that the DIMD result of the current block does not need to be modified if the modification flag bit is a second predetermined value, and the modification flag bit is located in an associated syntax element of the current block.

[0135] In one embodiment, if the DIMD result of the current block needs to be modified, the modification instruction information further includes modification parameter instruction information, where the modification parameter instruction information indicates a modification value for modifying the DIMD result of the current block, and the modification value belongs to a modification value set, and the modification value set includes any one or more of a predefined value set, a value set that allows dynamic adjustment during the encoding / decoding process, a value set constructed based on encoded or decoded information, and a value set defined by a high-level syntax element.

[0136] In one embodiment, the modification parameter indication information includes a sign flag bit for indicating the sign of the modification value and an amplitude flag bit for indicating the amplitude value of the modification value, where the sign flag bit indicates that the sign of the modification value is a positive sign when the value is a first predetermined value, and the sign flag bit indicates that the sign of the modification value is a negative sign when the value is a second predetermined value, or the sign flag bit indicates that the sign of the modification value is a negative sign when the value is the first predetermined value, and the sign flag bit indicates that the sign of the modification value is a positive sign when the value is the second predetermined value, the modification value set includes one or more numerical values, and different levels are set for multiple numerical values ​​having the same sign according to the magnitude of the amplitude value, and the amplitude flag bit includes one or more level flag bits, and the level flag bit indicates the level at which the amplitude value of the modification value is located in the modification value set.

[0137] In one embodiment, the modification value set includes one or more numerical values, the one or more numerical values ​​being arranged in order in the modification value set, and the modification parameter indication information includes an index flag bit, which indicates an arrangement position of the modification value in the modification value set.

[0138] In one embodiment, the DIMD result of the current block includes a DIMD derivation mode, and the DIMD derivation mode has a mode index, and the modification unit 802 specifically uses the modification value to adjust the mode index of the DIMD derivation mode to modify the DIMD derivation mode.

[0139] In one embodiment, the derivation mode of the DIMD includes two luminance derivation modes of the DIMD, and the luminance derivation mode of any one of the DIMDs is M i where i is a positive integer and is less than or equal to the total number of luminance derivation modes of the DIMD, and the modifying unit 802 further defines M i If is in planar mode or other non-intra-angle mode, the modified M i to a special intra-prediction mode, where the special intra-prediction mode includes any one of a direct mode, a horizontal mode, a diagonal mode, a vertical orthogonal mode, and an anti-diagonal mode.

[0140] In one embodiment, the derivation mode of the DIMD includes two luminance derivation modes of the DIMD, and the luminance derivation mode of any one of the DIMDs is M i where i is a positive integer and is less than or equal to the total number of luminance derivation modes of the DIMD, and the modification unit 802 further determines the modified M i If does not belong to the intra-angle mode set, the corrected M i to any one mode in the intra-angle mode set, and M i If the correction value used by is positive, the corrected M i The mode index of the mapping mode corresponding to is determined by Eq. 5.1 above, and M i If the correction value used by is negative, the corrected M i The mode index of the mapping mode corresponding to is determined by equation 5.2 above.

[0141] In one embodiment, the derivation mode of the modified DIMD satisfies at least one of the following conditions: the derivation mode of the modified DIMD does not include the derivation mode of the pre-modified DIMD; the derivation mode of the modified DIMD does not include a mode in an MPM mode set; and the derivation mode of the modified DIMD does not include a mode in a non-MPM mode set.

[0142] In one embodiment, the DIMD result of the current block includes a DIMD derivation mode, which includes a DIMD luma derivation mode and a DIMD chroma derivation mode, and the modification unit 802 specifically modifies the DIMD luma derivation mode, or modifies the DIMD chroma derivation mode, or modifies both the DIMD luma derivation mode and the DIMD chroma derivation mode, allowing the DIMD luma derivation mode and the DIMD chroma derivation mode to be modified using similar or different modification values, and allowing the DIMD luma derivation mode and the DIMD chroma derivation mode to be modified using similar or different modification value sets.

[0143] In one embodiment, the DIMD result of the current block includes a DIMD derivation mode, which includes a first DIMD luminance derivation mode and a second DIMD luminance derivation mode, and the modification unit 802 specifically modifies the first DIMD luminance derivation mode, or modifies the second DIMD luminance derivation mode, or modifies both the first DIMD luminance derivation mode and the second DIMD luminance derivation mode, allowing the first DIMD luminance derivation mode and the second DIMD luminance derivation mode to be modified using similar or different modification values, and allowing the first DIMD luminance derivation mode and the second DIMD luminance derivation mode to be modified using similar or different modification value sets.

[0144] In one embodiment, the DIMD result of the current block includes a DIMD derivation mode, and the DIMD derivation mode includes a first DIMD luma derivation mode and a second DIMD luma derivation mode. The prediction unit 803 specifically uses the modified first DIMD luma derivation mode to predict the intra prediction mode of the current block, and determines the predicted value of the modified first DIMD luma derivation mode as the predicted value of the luma component of the current block; or uses the modified second DIMD luma derivation mode to predict the intra prediction mode of the current block, and determines the predicted value of the modified first DIMD luma derivation mode as the predicted value of the luma component of the current block. The predicted value of the luminance derivation mode of the modified second DIMD is determined as a predicted value of the luminance component of the current block; or the luminance derivation mode and the planar mode of the modified first DIMD are respectively used to predict the intra prediction mode of the current block, and the predicted value of the derivation mode of the modified first DIMD and the predicted value of the planar mode are weightedly fused to obtain a predicted value of the luminance component of the current block; or the luminance derivation mode and the planar mode of the modified second DIMD are respectively used to predict the intra prediction mode of the current block, and the predicted value of the luminance component of the current block is determined as a predicted value of the luminance component of the current block. perform weighted fusion on the predicted value of the derivation mode of the second DIMD and the predicted value of the planar mode to obtain a predicted value of the luminance component of the current block; or use the modified first DIMD luminance derivation mode and the modified second DIMD luminance derivation mode to predict an intra prediction mode of the current block, and perform weighted fusion on the predicted value of the modified first DIMD derivation mode and the predicted value of the modified second DIMD luminance derivation mode to obtain a predicted value of the luminance component of the current block; or use the modified first DIMD luminance derivation mode and the modified second DIMD luminance derivation mode to predict an intra prediction mode of the current block. , predicting an intra prediction mode of the current block using the luminance derivation mode and planar mode of the second DIMD, respectively, and performing weighted fusion on the predicted value of the luminance derivation mode of the modified first DIMD, the predicted value of the luminance derivation mode of the second DIMD, and the predicted value of the planar mode to obtain a predicted value of the luminance component of the current block; or predicting an intra prediction mode of the current block using the luminance derivation mode of the first DIMD, the luminance derivation mode of the modified second DIMD, and the planar mode, respectively, and obtaining a predicted value of the luminance derivation mode of the first DIMD,Perform weighted fusion on the predicted value of the luminance derivation mode of the modified second DIMD and the predicted value of the planar mode to obtain a predicted value of the luminance component of the current block; or predict the intra prediction mode of the current block using the luminance derivation mode of the modified first DIMD, the luminance derivation mode of the modified second DIMD and the planar mode respectively, and perform weighted fusion on the predicted value of the luminance derivation mode of the modified first DIMD, the predicted value of the luminance derivation mode of the modified second DIMD and the predicted value of the planar mode to obtain a predicted value of the luminance component of the current block.

[0145] In one embodiment, the DIMD result of the current block includes a DIMD derivation mode, and the DIMD derivation mode includes a DIMD chrominance derivation mode. The prediction unit 803 specifically uses the modified DIMD chrominance derivation mode to predict the intra prediction mode of the current block, and determines the predicted value of the modified DIMD chrominance derivation mode as the predicted value of the chrominance component of the current block.

[0146] In addition, an embodiment of the present application provides a structural schematic diagram of a computer device, and reference is made to FIG. 9, which shows a structural schematic diagram of a computer device provided by one exemplary embodiment of the present application. The computer device includes a processor 901, an input device 902, an output device 903, and a memory 904. The processor 901, the input device 902, the output device 903, and the memory 904 are connected via a bus. The memory 904 stores computer-readable instructions, and the processor 901 executes the computer program stored in the memory 904.

[0147] In one embodiment, the computing device may be the encoding device mentioned in the above embodiment, and in this embodiment, the processor 901 executes the computer readable instructions in the memory 904 to perform each step of the video processing method related to encoding performed by the above encoding device.

[0148] In another embodiment, the computing device may be the decoding device mentioned in the above embodiment, and in this embodiment, the processor 901 executes the computer readable instructions in the memory 904 to perform each step of the video processing method related to decoding performed by the above decoding device.

[0149] In addition, the embodiment of the present application further provides a computer-readable storage medium, in which computer-readable instructions are stored, the computer-readable instructions including program instructions, and a processor executes the computer-readable instructions to perform the method in the embodiment corresponding to the above Figures 5 and 6. For technical details and beneficial effects not disclosed in the embodiment of the computer-readable storage medium of the present application, please refer to the description of the method embodiment of the present application, and no further description will be given here. For example, the computer-readable instructions may be executed in one computer device, or in multiple computer devices located at one location, or in multiple computer devices distributed at multiple locations and connected to each other via a communication network.

[0150] According to one aspect of the present application, a computer program product is provided, the computer program product includes computer readable instructions, the computer readable instructions are stored in a computer readable storage medium, a processor of a computer device reads the computer readable instructions from the computer readable storage medium and executes them to make the computer device perform the method in the embodiment corresponding to the above Figures 5 and 6, and for technical details and beneficial effects not disclosed in the embodiment of the computer program product of the present application, please refer to the description of the method embodiment of the present application.

[0151] As can be understood by those skilled in the art, all or part of the flow for implementing the method of the above embodiments can be completed by using computer-readable instructions to instruct relevant hardware, and the program is stored in a computer-readable storage medium, and when the program is executed, it contains the flow of each of the above method embodiments. The storage medium can be a magnetic disk, an optical disk, a read-only memory (ROM) or a random access memory (RAM), etc. What has been disclosed above is merely a preferred embodiment of the present application, and therefore cannot limit the scope of the claims of the present application, and therefore equivalent modifications completed according to the claims of the present application still belong to the scope of coverage of the present application.

Claims

1. 1. A computer device implemented video processing method, comprising: performing a decoder-side intra mode derivation process on a current block in a video bitstream to obtain a decoder-side intra mode derivation result of the current block, the video bitstream including decoder-side intra mode derivation modification indication information of the current block, the current block being a coding unit to be decoded in the video bitstream; modifying a decoder-side intra mode derivation result of the current block according to the modification indication information; and obtaining a predicted value of the current block by predicting an intra-prediction mode of the current block based on the modified decoder-side intra-mode derivation result, wherein the predicted value of the current block is used to reconstruct a decoded image corresponding to the current block.

2. The modification indication information includes a modification flag bit, the modification flag bit indicating whether a decoder-side intra mode derivation result of the current block needs to be modified; When the modification flag bit is a first predetermined value, the decoder side intra mode derivation result of the current block is indicated to need to be modified, and when the modification flag bit is a second predetermined value, the decoder side intra mode derivation result of the current block is indicated to need not be modified; 2. The method of claim 1, wherein the modified flag bit is located in an associated syntax element of the current block.

3. If the decoder-side intra-mode derivation result of the current block needs to be modified, the modification indication information further includes modification parameter indication information, the modification parameter indication information indicating a modification value for modifying the decoder-side intra-mode derivation result of the current block; The correction value belongs to a correction value set, the correction value set being: A predefined set of values, A set of values ​​that allows dynamic adjustment during the encoding and decoding process, A set of numbers constructed based on encoded or decoded information; and 3. The method of claim 1 or 2, comprising any one or more of a set of values ​​defined by high level syntax elements.

4. the modification parameter indication information includes a sign flag bit for indicating a sign of the modification value, and an amplitude flag bit for indicating an amplitude value of the modification value, the sign flag bit indicates, when a first predetermined value, that the sign of the modified value is a positive sign, and the sign flag bit indicates, when a second predetermined value, that the sign of the modified value is a negative sign, or the sign flag bit indicates, when a first predetermined value, that the sign of the modified value is a negative sign, and the sign flag bit indicates, when a second predetermined value, that the sign of the modified value is a positive sign; 4. The method of claim 3, wherein the correction value set includes one or more numerical values, where multiple numerical values ​​having the same sign have different levels according to the magnitude of the amplitude value, and the amplitude flag bits include one or more level flag bits, where the level flag bits indicate the level at which the amplitude value of the correction value is located in the correction value set.

5. The set of correction values ​​includes one or more numerical values, and the one or more numerical values ​​are arranged in order in the set of correction values.

4. The method of claim 3, wherein the modification parameter indication information includes an index flag bit, the index flag bit indicating an array position of the modification value in the set of modification values.

6. the decoder-side intra mode derivation result of the current block includes a derivation mode of a decoder-side intra mode derivation, the derivation mode of the decoder-side intra mode derivation comprising a mode index; The step of modifying the decoder-side intra mode derivation result of the current block according to the modification indication information includes:

4. The method of claim 3, further comprising modifying a derived mode of the decoder-side intra mode derivation by adjusting a mode index of the derived mode of the decoder-side intra mode derivation using the modification value.

7. The derivation modes of the decoder-side intra mode derivation include two decoder-side intra mode derivation luminance derivation modes, one of which is M ｉ where i is a positive integer and is less than or equal to a total number of luma derivation modes of a decoder-side intra mode derivation, and the method includes: M ｉ If is a planar mode or other non-intra-angle mode, the modified M ｉ to a special intra-prediction mode; The method of claim 6 , wherein the special intra-prediction mode comprises one of a DC mode, a horizontal mode, a diagonal mode, a vertical orthogonal mode, and an anti-diagonal mode.

8. The derivation modes of the decoder-side intra mode derivation include two decoder-side intra mode derivation luminance derivation modes, one of which is M ｉ where i is a positive integer and is less than or equal to a total number of luma derivation modes of a decoder-side intra mode derivation, and the method includes: Corrected M ｉ If does not belong to the intra-angle mode set, the modified M ｉ to any one mode in the intra-angle mode set; Said M ｉ When the correction value used by is a positive number, the corrected M ｉ The mode index of the mapping mode corresponding to ｉ - 1 + (M ｄｅｌｔａ −1)) % mod) + 2, ｉ If the correction value used by is a negative number, the corrected M ｉ The mode index of the mapping mode corresponding to ｉ + offset - (M ｄｅｌｔａ −1)) % mod) + 2, m ｉ is the above M ｉ is the mode index of M ｄｅｌｔａ is the above M ｉ 7. The method of claim 6, wherein offset=maximum mode index in the intra-angle mode set-5, mod=offset+3 is the correction value used.

9. The derivation modes for the modified decoder-side intra mode derivation are a condition in which a derivation mode of the modified decoder-side intra mode derivation does not include a derivation mode of the decoder-side intra mode derivation before the modification; the condition that the derived modes of the modified decoder-side intra mode derivation do not include modes in the most probable mode set; and 4. The method of claim 3, wherein the derived modes of the modified decoder-side intra mode derivation satisfy at least one of the conditions that the derived modes do not include modes in a non-most probable mode set.

10. The decoder-side intra mode derivation result of the current block includes a derivation mode of a decoder-side intra mode derivation, and the derivation mode of the decoder-side intra mode derivation includes a luma derivation mode of a decoder-side intra mode derivation and a chroma derivation mode of a decoder-side intra mode derivation, and the step of modifying the decoder-side intra mode derivation result of the current block includes: - modifying the luma derivation mode of the decoder-side intra mode derivation, or modifying the chrominance derivation mode of the decoder-side intra mode derivation, or modifying both a luma derivation mode of the decoder-side intra mode derivation and a chroma derivation mode of the decoder-side intra mode derivation, 2. The method of claim 1, wherein the decoder-side intra mode derivation luma derivation mode and the decoder-side intra mode derivation chroma derivation mode allow modification using similar or different modification values, and the decoder-side intra mode derivation luma derivation mode and the decoder-side intra mode derivation chroma derivation mode allow modification using similar or different sets of modification values.

11. The decoder-side intra mode derivation result of the current block includes a derivation mode of a decoder-side intra mode derivation, and the derivation mode of the decoder-side intra mode derivation includes a luma derivation mode of a first decoder-side intra mode derivation and a luma derivation mode of a second decoder-side intra mode derivation, and the step of modifying the decoder-side intra mode derivation result of the current block includes: - modifying a luma derivation mode of the first decoder-side intra mode derivation, or - modifying a luma derivation mode of the second decoder-side intra mode derivation, or modifying both a luma derivation mode of the first decoder-side intra mode derivation and a luma derivation mode of the second decoder-side intra mode derivation, 2. The method of claim 1 , wherein the luma derivation mode of the first decoder-side intra mode derivation and the luma derivation mode of the second decoder-side intra mode derivation allow for modification using similar or different modification values, and wherein the luma derivation mode of the first decoder-side intra mode derivation and the luma derivation mode of the second decoder-side intra mode derivation allow for modification using similar or different sets of modification values.

12. the decoder side intra mode derivation result of the current block includes a derivation mode of a decoder side intra mode derivation, the derivation mode of the decoder side intra mode derivation includes a luma derivation mode of a first decoder side intra mode derivation and a luma derivation mode of a second decoder side intra mode derivation; The step of obtaining a predicted value of the current block by predicting an intra prediction mode of the current block based on the modified decoder-side intra mode derivation result includes: predicting an intra prediction mode of the current block using a luma derivation mode of the modified first decoder-side intra mode derivation, and determining a predicted value of the luma derivation mode of the modified first decoder-side intra mode derivation as a predicted value of a luma component of the current block; or predicting an intra prediction mode of the current block using a luma derivation mode of the modified second decoder-side intra mode derivation, and determining a predicted value of the luma derivation mode of the modified second decoder-side intra mode derivation as a predicted value of a luma component of the current block; or predicting an intra prediction mode of the current block using a luma derivation mode and a planar mode of the modified first decoder-side intra mode derivation, respectively, and performing weighted fusion on the derivation mode prediction value and the planar mode prediction value of the modified first decoder-side intra mode derivation to obtain a luma component prediction value of the current block; or predicting an intra prediction mode of the current block using a luma derivation mode and a planar mode of the modified second decoder-side intra mode derivation, respectively, and performing weighted fusion on the derivation mode prediction value and the planar mode prediction value of the modified second decoder-side intra mode derivation to obtain a luma component prediction value of the current block; or predicting an intra prediction mode of the current block using a luma derivation mode of the modified first decoder side intra mode derivation and a luma derivation mode of the modified second decoder side intra mode derivation, respectively, and performing weighted fusion on the predicted value of the derivation mode of the modified first decoder side intra mode derivation and the predicted value of the luma derivation mode of the modified second decoder side intra mode derivation to obtain a predicted value of a luma component of the current block; or predicting an intra prediction mode of the current block using the modified luma derivation mode of the first decoder side intra mode derivation, the luma derivation mode of the second decoder side intra mode derivation, and the planar mode, respectively, and performing weighted fusion on the modified luma derivation mode of the first decoder side intra mode derivation, the luma derivation mode of the second decoder side intra mode derivation, and the planar mode prediction to obtain a luma component prediction of the current block; or predicting an intra prediction mode of the current block using a luma derivation mode of a first decoder side intra mode derivation, a luma derivation mode of a modified second decoder side intra mode derivation, and a planar mode, respectively, and performing weighted fusion on the prediction value of the luma derivation mode of the first decoder side intra mode derivation, the prediction value of the luma derivation mode of the modified second decoder side intra mode derivation, and the prediction value of the planar mode to obtain a prediction value of a luma component of the current block; or 2. The method of claim 1 , further comprising: predicting an intra prediction mode of the current block using a luma derivation mode of a modified first decoder side intra mode derivation, a luma derivation mode of a modified second decoder side intra mode derivation, and a planar mode, respectively; and performing weighted fusion on the predicted value of the luma derivation mode of the modified first decoder side intra mode derivation, the predicted value of the luma derivation mode of the modified second decoder side intra mode derivation, and the predicted value of the planar mode to obtain a predicted value of a luma component of the current block.

13. the decoder-side intra mode derivation result of the current block includes a derivation mode of a decoder-side intra mode derivation, and the derivation mode of the decoder-side intra mode derivation includes a chrominance derivation mode of a decoder-side intra mode derivation; The step of obtaining a predicted value of the current block by predicting an intra prediction mode of the current block based on the modified decoder-side intra mode derivation result includes:

2. The method of claim 1, further comprising: predicting an intra prediction mode of the current block using a chroma derivation mode of the modified decoder-side intra mode derivation; and determining a predicted value of the chroma derivation mode of the modified decoder-side intra mode derivation as a predicted value of the chroma component of the current block.

14. 1. A computer device implemented video processing method, comprising: performing a decoder side intra mode derivation process on a current block of a video to obtain a decoder side intra mode derivation result for the current block, the current block being a coding unit to be coded in the video; generating decoder-side intra mode derivation modification indication information for the current block according to a decoder-side intra mode derivation result for the current block; modifying a decoder-side intra mode derivation result of the current block according to the modification indication information; predicting an intra-prediction mode of the current block according to the modified decoder-side intra-mode derivation result to obtain a predicted value of the current block, the predicted value of the current block being used to reconstruct a decoded image corresponding to the current block; and encoding the video based on the modification indication information and the prediction value of the current block to generate a video bitstream.

15. The decoder-side intra mode derivation result of the current block includes a derivation mode of a decoder-side intra mode derivation, and the step of generating modification indication information of the decoder-side intra mode derivation of the current block based on the decoder-side intra mode derivation result of the current block includes: obtaining a correction set including one or more numerical values; pre-correcting a derivation mode of the decoder-side intra mode derivation using each value in the correction value set; obtaining a rate-distortion cost set, the rate-distortion cost set including rate-distortion costs of derivation modes of the decoder-side intra mode derivation before pre-modification and rate-distortion costs of derivation modes of the decoder-side intra mode derivation after pre-modification by each value in the modification value set; generating modification indication information indicating that the derivation mode of the decoder-side intra mode derivation does not need to be modified if the rate-distortion cost of the derivation mode of the decoder-side intra mode derivation before the modification is a minimum value in the rate-distortion cost set; The method of claim 14, further comprising: generating modification indication information indicating that the derivation mode of the decoder-side intra mode derivation needs to be modified and including a modification value if the rate-distortion cost of the derivation mode of the decoder-side intra mode derivation before being previously modified is not the minimum value in the rate-distortion cost set; wherein the modification value is a target numerical value in the modification value set corresponding to the minimum rate-distortion cost in the rate-distortion cost set.

16. 1. A video processing device comprising: a processing unit for performing a decoder side intra mode derivation process on a current block in a video bitstream to obtain a decoder side intra mode derivation result of the current block, the video bitstream including decoder side intra mode derivation modification instruction information of the current block, the current block being a coding unit to be decoded in the video bitstream; a modification unit for modifying a decoder-side intra mode derivation result of the current block according to the modification indication information; and a prediction unit for obtaining a predicted value of the current block by predicting an intra-prediction mode of the current block based on a modified decoder-side intra-mode derivation result, wherein the predicted value of the current block is used to reconstruct a decoded image corresponding to the current block.

17. 1. A video processing device comprising: a processing unit for performing a decoder side intra mode derivation process on a current block of a video to obtain a decoder side intra mode derivation result of the current block, the current block being a coding unit to be coded in the video, and a processing unit for generating modification indication information of the decoder side intra mode derivation of the current block according to the decoder side intra mode derivation result of the current block; a modification unit for modifying a decoder-side intra mode derivation result of the current block according to the modification indication information; a prediction unit for predicting an intra prediction mode of the current block according to the modified decoder-side intra mode derivation result to obtain a predicted value of the current block, wherein the predicted value of the current block is used to reconstruct a decoded image corresponding to the current block; The apparatus, wherein the processing unit further encodes the video based on the modification indication information and the prediction value of the current block to generate a video bitstream.

18. 1. A computer device comprising: a processor that executes computer readable instructions; and a computer readable storage medium having computer readable instructions stored thereon, said computer readable instructions being adapted, when executed by said processor, to perform the video processing method of any one of claims 1 to 15.

19. A computer-readable storage medium having computer-readable instructions stored thereon, the computer-readable instructions being adapted to perform a video processing method according to any one of claims 1 to 15 when executed by a processor.

20. A computer program product comprising computer readable instructions which, when executed by a processor, implement a video processing method according to any one of claims 1 to 15.

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