Semiconductor process chambers and semiconductor process equipment
The semiconductor process chamber addresses the issue of geometric asymmetry in etching equipment by offsetting the RF supply member and shield member to compensate for impedance differences, resulting in uniform current density and improved etching uniformity.
Patent Information
- Application Number
- JP2025513390
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2022-10-31
- Filing Date
- 2023-10-31
- Publication Date
- 2025-08-28
- Estimated Expiration
- 2043-10-31
AI Technical Summary
The asymmetry of geometric structures in semiconductor etching equipment affects the uniformity of the etching process, particularly due to asymmetry in the lower electrode circuit caused by elements like the wafer transfer port, exhaust port, and cantilever, leading to non-uniform plasma distribution and ion energy on the wafer surface.
A semiconductor process chamber design with a lower electrode structure that includes a base, port member, mounting member, RF supply member, and shield member, where the RF supply member is offset from the port member and shield member to compensate for impedance differences, ensuring uniform current density and improving etching uniformity by adjusting inductance and capacitance.
The design compensates for asymmetry in the lower electrode circuit, achieving more uniform current density and enhancing the uniformity of the etching process by making the current density of the electrode circuit more symmetrical.
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Figure 2025528510000001_ABST
Abstract
Description
[Technical Field]
[0001] FIELD OF THE DISCLOSURE The present disclosure is in the field of semiconductor devices, and more particularly, to semiconductor process chambers and semiconductor process equipment. [Background technology]
[0002] With the development of semiconductor processes, the requirements for uniformity in semiconductor etching processes are becoming increasingly higher. In semiconductor etching process equipment such as ICP (Inductively Coupled Plasma) etching equipment, the coil on the upper electrode generates plasma inside the chamber through inductive coupling, while at the same time applying a constant frequency RF power to the lower electrode. The RF power acts on the plasma on the wafer surface through capacitive coupling, thereby controlling the energy of ions reaching the wafer surface. High-energy ions bombard the wafer surface, destroying CF films and other materials that inhibit the etching reaction during the etching process, thereby accelerating the etching rate.
[0003] As can be seen from the above, the main factors affecting the uniformity of the etching process include the uniformity of the plasma on the surface of the wafer, the uniformity of the ion energy distribution controlled by the lower electrode circuit, and the uniformity of the density distribution of the etching reactants reaching the surface of the wafer. The symmetry of the lower electrode circuit is one important factor that determines the uniformity of the etching process. However, in some etching equipment, the geometric structure of elements (e.g., wafer transfer port, exhaust port, cantilever, etc.) has asymmetry, which significantly affects the etching uniformity. Summary of the Invention [Problem to be solved by the invention]
[0004] The embodiments of the present disclosure aim to provide a semiconductor process chamber and semiconductor process equipment that can solve problems in current etching equipment, such as the asymmetry of the geometric structure of elements affecting etching uniformity. [Means for solving the problem]
[0005] In order to solve the above technical problems, the present disclosure is realized as follows.
[0006] An embodiment of the present disclosure provides a semiconductor process chamber including a chamber body and a lower electrode structure, wherein the lining and the lower electrode structure are both disposed within the chamber body. The lower electrode structure includes a base, a port member, a mounting member, an RF supply member, and a shield member. The mounting member is used to mount a wafer, the base is connected to a sidewall of the chamber body via a cantilever, the port member and the mounting member are stacked on the base in order along a first direction, a first end of the shield member is connected to the port member, and a second end of the shield member is connected to an inner wall of the base, the axis of the first end of the shield member does not overlap with the axis of the port member, and the axis of the first end of the shield member is offset from the axis of the port member in a direction away from the cantilever, and the RF supply member is inserted into the shield member and passes through the port member in the first direction before being connected to the mounting member, and is used to supply RF power to the mounting member.
[0007] An embodiment of the present disclosure further provides a semiconductor processing device including the semiconductor processing chamber described above.
[0008] In an embodiment of the present disclosure, a mounting member is used to mount a wafer, an RF supply member is connected to the mounting member and is used to supply RF power to the mounting member, the RF power acts on plasma on the surface of the wafer to control the ion energy reaching the surface of the wafer, a shield member is fitted around the RF supply member to act as a shield and reduce energy loss, a first end of the shield member is connected to the port member and a second end of the shield member is connected to the inner wall of the base, the axis of the first end of the shield member does not overlap with the axis of the port member and the axis of the first end of the shield member is offset from the axis of the port member in a direction away from the cantilever, thereby increasing the inductance on the side farther from the cantilever to compensate for the impedance difference between the side near the cantilever and the side farther from the cantilever of the lower electrode circuit, thereby compensating for the asymmetry of the lower electrode circuit caused by the asymmetry of the geometric distribution of inherent elements in the semiconductor process chamber, and further making the current density of the electrode circuit more uniform and improving the uniformity of the etching process. [Brief explanation of the drawings]
[0009] [Figure 1] 1 is a structural schematic diagram of a semiconductor process chamber disclosed in an embodiment of the present disclosure. [Figure 2] 1 is a structural schematic diagram of a lower electrode structure disclosed in an embodiment of the present disclosure; [Figure 3] FIG. 2 is a schematic diagram illustrating the relative positional relationship between an RF supply member and a mounting member disclosed in an embodiment of the present disclosure. [Figure 4] FIG. 2 is a schematic diagram showing the relative positional relationships of structures such as a port member, a shield member, a second insulating member, an RF supply member, a cantilever, and a matcher disclosed in an embodiment of the present disclosure. [Figure 5] 1 is a schematic diagram illustrating the relative positional relationship between a shield member, an RF supply member, and a second insulating member according to an embodiment of the present disclosure. [Figure 6] 10 is a schematic diagram illustrating the relative positional relationship between a shield member, an RF supply member, and a second insulating member of another embodiment disclosed in an embodiment of the present disclosure. FIG. [Figure 7] 10 is a diagram showing current density distribution curves on both sides of a semiconductor process chamber when the difference between the first distance and the second distance is 10 mm according to an embodiment of the present disclosure; [Figure 8] 10 shows normalized current density distribution curves on both sides of a semiconductor process chamber when the second sub-insulating member disclosed in the embodiments of the present disclosure is made of resin and the distance difference between the first distance and the second distance is 50 mm and 100 mm. [Figure 9] 10 shows normalized current density distribution curves on both sides of a semiconductor process chamber when the second sub-insulating member disclosed in an embodiment of the present disclosure is air and the distance difference between the first distance and the second distance is 50 mm and 100 mm. DETAILED DESCRIPTION OF THE INVENTION
[0010] The technical solutions of the embodiments of the present disclosure will be clearly and completely described below with reference to the drawings of the embodiments of the present disclosure. It is clear that the described embodiments are only some of the embodiments of the present disclosure, and are not all of the embodiments. Based on the embodiments of the present disclosure, other embodiments that can be obtained by those skilled in the art without any creative efforts all belong to the protection scope of the present disclosure.
[0011] Terms such as "first," "second," and the like in the specification and claims of the present disclosure are used to distinguish between similar objects and are not intended to describe a particular order or chronological order. Data used in this manner may be interchanged where appropriate so that embodiments of the present disclosure may be practiced in an order other than that illustrated or described herein. It should be understood that objects distinguished by "first," "second," and the like are generally of the same type and do not limit the number of objects; for example, the first object may be one or more. Furthermore, "and / or" in the specification and claims indicates at least one of the connected objects, and the symbol " / " generally indicates that the related objects before and after are in an "or" relationship.
[0012] Hereinafter, the embodiments of the present disclosure will be described in detail with reference to the drawings based on specific examples and application scenarios.
[0013] In the electrode structure of the related art, RF power is applied to the electrostatic chuck by an RF source through an RF matcher. Specifically, the RF power output by the RF matcher is supplied from the center of the electrostatic chuck through an RF connecting post. However, elements such as the RF connecting post, electrostatic chuck, insulating ring, port disk, and shield sleeve are all concentrically arranged, and the chamber itself is not perfectly geometrically symmetrical due to the presence of the cantilever. As a result, there is a difference in the current path between the cantilever side and the opposite side. Specifically, in the current circuit on the RF matcher side, the current in the lining and the current in the shield sleeve flow in opposite directions, resulting in a magnetic field cancellation effect. This causes asymmetry in the current flow between the two sides, affecting the uniformity of the etching process.
[0014] To solve the above problems, the embodiments of the present disclosure disclose an improved semiconductor process chamber, which comprehensively considers the effect of geometric asymmetry of elements on current, thereby effectively resolving current asymmetry and ensuring uniformity in the etching process.
[0015] 1 to 9, the disclosed semiconductor process chamber includes a chamber body 400 and a lower electrode structure 100. The lower electrode structure 100 is disposed within the chamber body 400, and includes a base 110, a port member 120, a mounting member 140, an RF supply member 150, and a shield member 160. In addition, the lower electrode structure 100 may further include other elements to ensure normal use of the lower electrode structure 100.
[0016] In some embodiments, the semiconductor process chamber may further include a lining 200, which is disposed within the chamber body 400 and surrounds the outer periphery of the lower electrode structure 100 to protect the chamber body 400 from plasma etching. One end of the lining 200 is electrically connected to the chamber body 400, and the other end of the lining 200 is electrically connected to the port member 120. In this manner, the lining 200 can establish electrical continuity between the port member 120 and the chamber body 400.
[0017] The base 110 is a fundamental mounting member of the lower electrode structure 100 and can provide a support base for members such as the port member 120, the mounting member 140, and the shield member 160. In some embodiments, the base 110 may be connected to the sidewall of the chamber body 400 via a cantilever 500. This allows the cantilever 500 to mount and support the base 110.
[0018] The mounting member 140 is used to mount a wafer, and the port member 120 is used to connect with the shield member 160 and can also support the mounting member 140. In some embodiments, the port member 120 and the mounting member 140 are stacked in order on the base 110 along a first direction. Under actual operating conditions, the port member 120 may be attached to the top of the base 110, and the mounting member 140 may be attached to the top of the port member 120. This not only allows the base 110 to support the port member 120, but also allows the mounting member 140 to be supported via the port member 120. The first direction can be understood as a bottom-to-top direction under actual operating conditions, as shown in FIG. 2 .
[0019] For example, the mounting member 140 may be a mounting disk such as an electrostatic chuck. Preferably, the mounting disk may be a disk member having a mounting surface on which the wafer is mounted. The mounting member 140 can also control the ion energy of the plasma that reaches the wafer surface by applying the supplied RF power to the plasma on the wafer surface.
[0020] The port member 120 may be a port disk, for example, a disk member, which provides a mounting base for the shield member 160 and ensures the mounting stability of the shield member 160. The port disk may also have an opening to allow the RF supply member 150 to easily pass through.
[0021] A first end of the shield member 160 is connected to the port member 120, and a second end of the shield member 160 is connected to the inner wall of the base 110. The RF supply member 150 is inserted into the shield member 160 and passes through the port member 120 in a first direction before being connected to the mounting member 140 and used to supply RF power to the mounting member 140. Accordingly, the shield member 160 is fitted onto the outside of the RF supply member 150, thereby shielding a portion of the RF supply member 150 located within the chamber body of the base 110, thereby achieving a shielding effect and effectively reducing energy loss and reducing the influence on the etching process to a certain extent.
[0022] To accommodate the shape of the RF supply member 150, the shield member 160 may be a shield tube, specifically, the shield member 160 may include a straight segment and a curved segment that are connected or integrally formed, with the end of the curved segment away from the straight segment being the first end of the shield member 160, and the end of the straight segment away from the curved segment being the second end of the shield member 160. Based on this, the shield member 160 can shield the portion of the RF supply member 150 that is inserted into the base 110, thereby fulfilling the role of a shield.
[0023] The RF supply member 150 is used to connect to the matcher 600, which is provided on one side of the exterior of the chamber body 400, so that the matcher 600 is also located on one side of the lower electrode structure 100. In this manner, in the embodiment of the present disclosure, the sidewall of the base 110 close to the matcher 600 (or close to the cantilever 500) can be defined as the first sidewall 111.
[0024] To insert the RF supply member 150 into the base 110, an opening may be provided in the first side wall 111 of the base 110, so that the RF supply member 150 enters the chamber body of the base 110 through the opening, extends through the port member 120 toward the mounting member 140, and finally achieves connection with the mounting member 140 to transmit the RF power output by the RF source through the matcher 600 to the mounting member 140, thereby controlling the ion energy reaching the surface of the wafer placed on the mounting member 140.
[0025] In the embodiment of the present disclosure, the lower electrode structure 100 is fixed in the chamber body 400 via the cantilever 500, thereby ensuring the robustness and stability of the lower electrode structure 100. For example, the cantilever 500 may be provided with a cantilever passage, and the shielding member 160 may be inserted into the cantilever passage after penetrating the first sidewall 111 and finally connected to the sidewall of the chamber body 400. In this way, a portion of the RF supply member 150 located between the first sidewall 111 of the base 110 and the sidewall of the chamber body 400 can be shielded, thereby achieving a shielding effect, effectively reducing energy loss, and reducing the impact on the etching process to a certain extent. In addition, the cantilever passage is mainly used to connect to external cables and piping, and further to establish grounding with the chamber body 400 to form an electrical circuit.
[0026] Considering the presence of elements such as the cantilever 500 and the fact that the RF supply member 150 is located on the side where the cantilever 500 (or matcher 600) is located, the geometric structure of the lower electrode structure 100 has an asymmetry between the side closer to the cantilever 500 and the side farther from the cantilever 500, which results in a difference in the current density of the circuits on the side closer to the cantilever 500 and the side farther from the cantilever 500 of the lower electrode structure 100, which further affects the uniformity of etching.
[0027] Based on the above situation, in the embodiment of the present disclosure, the axis of the first end of the shield member 160 does not overlap with the axis of the port member 120, and the axis of the first end of the shield member 160 is offset in a direction away from the cantilever 500 with respect to the axis of the port member 120, thereby increasing the inductance on that side and thereby compensating for the impedance difference between the side of the lower electrode circuit closer to the cantilever and the side farther from the cantilever. Based on this, it is possible to compensate for the asymmetry of the lower electrode circuit caused by the asymmetry of the geometric distribution of inherent elements in the semiconductor process chamber, and furthermore, to make the current density of the electrode circuit more uniform, thereby improving the uniformity of the etching process.
[0028] In some embodiments, the axis of the feed end of the RF feed member 150 does not overlap with the axis of the first end of the shield member 160, and the axis of the feed end of the RF feed member 150 is offset from the axis of the first end of the shield member 160 in a direction closer to the cantilever 500. As shown in FIG. 4 , the RF feed member 150 and the shield member 160 are non-concentric, and the distance from the axis of the first end of the shield member 160 to the first sidewall 111 is greater than the distance from the axis of the feed end of the RF feed member 150 to the first sidewall 111. Specifically, the distance from the edge of the first end of the shield member 160 closer to the first sidewall 111 to the axis of the RF feed member 150 is a third distance e, and the distance from the edge of the first end of the shield member 160 farther from the first sidewall 111 to the axis of the RF feed member 150 is a fourth distance f, where the third distance e is smaller than the fourth distance f.
[0029] Furthermore, the axis of the feed end of the RF feed member 150 is located between the axis of the first end of the shield member 160 and the axis of the port member 120 .
[0030] Based on the above configuration, the inductance of each circuit on the side closer to the cantilever 500 and the side farther from the cantilever 500 can be adjusted, and the current density of the circuits on both sides can be adjusted similarly, i.e., the difference in current density between the circuits on both sides can be compensated for, thereby making the current density of the circuit on the side closer to the matcher and the current density of the circuit on the side farther from the matcher symmetrical, and further ensuring the uniformity of the etching process.
[0031] 2 , since the RF supply member 150 penetrates the port member 120, the lower electrode structure 100 may further include a second insulating member 170 to insulate the RF supply member 150, and a through-hole 121 may be correspondingly provided in the port member 120. The second insulating member 170 is provided in the through-hole 121, and the RF supply member 150 penetrates the second insulating member 170. Based on this, the through-hole 121 can provide an installation space for the second insulating member 170, and the second insulating member 170 can separate the RF supply member 150 and the port member 120, thereby achieving insulation of the RF supply member 150.
[0032] Furthermore, a first end of the shield member 160 is connected to the through hole 121 of the port member 120, and the axis of the first end of the shield member 160 is collinear with the axis of the second insulating member 170. In this case, the axis of the through hole 121, the axis of the first end of the shield member 160, and the axis of the second insulating member 170 are all collinear. However, because the axis of the supply end of the RF supply member 150 is not collinear with the axis of the first end of the shield member 160, similarly, the axis of the supply end of the RF supply member 150 is not collinear with the axis of the second insulating member 170. Specifically, the width of a portion of the second insulating member 170 closer to the cantilever 500 of the RF supply member 150 is smaller than the width of a portion of the second insulating member 170 farther from the cantilever 500 of the RF supply member 150. This not only ensures ease of assembly between the port member 120 and the shield member 160, but also facilitates assembly of the RF supply member 150. The direction of the width dimension is parallel to the radial direction of the through-hole 121 away from the cantilever 500 .
[0033] To accommodate the attachment of the RF supply member 150, the through hole 121 may be provided at a position offset from the axis of the port member 120 on the side farther from the cantilever 500. In other words, the axis of the through hole 121 is located on the side farther from the cantilever 500 of the axis of the port member 120, thereby accommodating the attachment of the RF supply member 150 by the second insulating member 170 attached therein, and preventing assembly interference between the elements.
[0034] Furthermore, the distance from the edge of the port member 120 closer to the cantilever 500 to the axis of the through hole 121 is a fifth distance, and the distance from the edge of the port member 120 farther from the cantilever 500 to the axis of the through hole 121 is a sixth distance, and the fifth distance is greater than the sixth distance. That is, the width dimension of the portion of the port member 120 closer to the cantilever 500 is greater than the width dimension of the portion farther from the cantilever 500, which is suitable for attaching the RF supply member 150. Note that the difference between the fifth distance and the sixth distance depends on the amount of eccentricity of the RF supply member 150 and the amount of eccentricity of the second insulating member 170; in actual design, it is sufficient to ensure ease of assembly of the port member 120 and the shield member 160.
[0035] 4 to 6 , in some embodiments, the second insulating member 170 may include a first sub-insulating member 171 and a second sub-insulating member 172 that are matched to each other, with the first sub-insulating member 171 located closer to the cantilever 500 and the second sub-insulating member 172 located farther from the cantilever 500, and the capacitance between the RF supply member 150 and the side of the port member 120 where the first sub-insulating member 171 is located is larger than the capacitance between the port member 120 and the side of the port member 120 where the second sub-insulating member 172 is located. This configuration ensures that the capacitance between the port member 120 and the RF supply member 150 on the side farther from the cantilever 500 is smaller, thereby reducing the impedance of the circuit on the side farther from the cantilever 500 and achieving a compensation effect for the impedance mismatch between the circuits on both sides.
[0036] Furthermore, in a plane perpendicular to the axis of the second insulating member 170, the projected area of the first sub-insulating member 171 is smaller than the projected area of the second sub-insulating member 172. This configuration creates an asymmetry between the first sub-insulating member 171 and the second sub-insulating member 172, making it possible to easily adjust the magnitude of the capacitance between the portion of the second insulating member 170 closer to the cantilever 500 and the portion farther from the cantilever 500. This allows adjustment of the impedance of the circuits on both sides and also adjustment of the current densities of the circuits on both sides; that is, the difference in current density between the circuits on both sides is compensated for, making the current densities of the circuits on both sides more uniform and improving etching uniformity.
[0037] To achieve the asymmetry, the first insulating sub-member 171 and the second insulating sub-member 172 may have different dielectric constants. In some embodiments, the dielectric constant of the first insulating sub-member 171 may be greater than the dielectric constant of the second insulating sub-member 172. In this way, it is possible to further ensure that the capacitance between the port member 120 and the RF supply member 150 on the side farther from the cantilever 500 is smaller, thereby reducing the impedance of the circuit on the side farther from the cantilever 500 and achieving a compensation effect for the impedance mismatch between the circuits on both sides.
[0038] In some other embodiments, the first insulating sub-member 171 and the second insulating sub-member 172 may have the same relative dielectric constant, which can be specifically selected according to the actual operating conditions.
[0039] In another embodiment, the projected area of the second insulating member 170 in a plane perpendicular to the axis of the second insulating member 170 is smaller than the projected area of the through hole 121, and the second insulating member 170 is provided on the side of the through hole 121 closer to the cantilever 500. In this case, the portion of the through hole 121 where the second insulating member 170 is not provided may be filled with air. In this case, air also serves as a special medium and can provide a certain level of insulation. It can also be understood that the second insulating member 170 is not provided on the side of the through hole 121 far from the cantilever 500, and insulation is achieved by air. Note that air may be considered an insulating medium with a relative dielectric constant of 1. Furthermore, since the relative dielectric constant of the second insulating member 170 is greater than 1, the circuit impedance on the side far from the matcher can be easily reduced.
[0040] In an embodiment of the present disclosure, when the second insulating member 170 includes a first sub-insulating member 171 and a second sub-insulating member 172, the material of the first sub-insulating member 171 may be ceramic, and the material of the second sub-insulating member 172 may be resin, and the relative dielectric constant of the ceramic is greater than the relative dielectric constant of the resin.
[0041] 8 shows the current density distribution curves on both sides of the semiconductor process chamber when the first sub-insulating member 171 is made of ceramic material and the second sub-insulating member 172 is made of resin, and FIG. 9 shows the current density distribution curves on both sides of the semiconductor process chamber when the second insulating member 170 made of ceramic material is provided on the side of the through-hole 121 closer to the cantilever 500 and the other side is filled with air. As can be seen from FIGS. 8 and 9, air has a lower dielectric constant and is therefore more effective in improving the symmetry of the current density on both sides.
[0042] Continuing to refer to FIGS. 8 and 9, when the width difference between the first sub-insulating member 171 and the second sub-insulating member 172 reaches 100 mm, the etching current density of the air medium can be made more symmetrical. However, considering factors such as the internal structure of the lower electrode structure 100, such as the pin lift motor and chiller tube, it is difficult to ensure symmetry in the current density of the circuits on both sides when the distance difference is large from a mechanical design perspective. Therefore, in the embodiment of the present disclosure, the width difference between the first sub-insulating member 171 and the second sub-insulating member 172 can be designed to be in the range of 5 mm to 50 mm, specifically including 5 mm, 10 mm, 20 mm, 25 mm, 30 mm, 40 mm, 50 mm, etc., and of course other values are also possible. Preferably, the width difference is selected to be 25 mm to make the current density of the circuits on both sides symmetrical.
[0043] 5 and 6, in some embodiments, the interface 173 between the first insulating sub-member 171 and the second insulating sub-member 172 may be a curved surface, and the chamber body 400 may have a cylindrical structure, and the curved surface design can accommodate the cylindrical chamber body 400. For example, the interface 173 may be an arc protruding toward the first insulating sub-member 171 as shown in FIG. 5, or may be an arc protruding toward the second insulating sub-member 172 as shown in FIG. 6.
[0044] 4, in another embodiment, the interface 173 between the first insulating sub-member 171 and the second insulating sub-member 172 may be flat. For example, the second insulating member 170 may have a disk-shaped structure and be divided into the first insulating sub-member 171 and the second insulating sub-member 172 by a plane. In this manner, the first insulating sub-member 171 and the second insulating sub-member 172 may each have a sectorial disk structure. The first insulating sub-member 171 may have a disk structure smaller than a semicircle, and the second insulating sub-member 172 may have a disk structure larger than a semicircle.
[0045] The specific shape of the boundary surface 173 is not limited as long as it is ensured that the projected area of the first sub-insulating member 171 is smaller than the projected area of the second sub-insulating member 172 in a plane perpendicular to the axis of the second insulating member 170.
[0046] In the embodiment of the present disclosure, when the RF supply member 150 penetrates the second insulating member 170, the axis of the supply end of the RF supply member 150 may be located on the interface 173 between the first insulating sub-member 171 and the second insulating sub-member 172, and more specifically, may be located on the flat or curved interface 173 as shown in Figures 4 and 6. This ensures that the projected area of the second insulating sub-member 172 on a plane perpendicular to the axis of the second insulating member 170 is larger than the projected area of the first insulating sub-member 171 on a plane perpendicular to the axis of the second insulating member 170.
[0047] Of course, the axis of the RF supply member 150 does not have to be located on the boundary surface 173, and the axis of the supply end of the RF supply member 150 may be located on the side of the first insulating sub-member 171 farther from the cantilever 500, and the RF supply member 150 may be located in the second insulating sub-member 172. This configuration can similarly satisfy process requirements.
[0048] 5 , in one specific embodiment, the interface 173 between the first insulating sub-member 171 and the second insulating sub-member 172 is an arc protruding toward the first insulating sub-member 171, and the axis of the first end of the RF supply member 150 is located on the side of the interface 173 that is far from the cantilever 500. Furthermore, a region of the medium with a high dielectric constant (i.e., a localized region of the first insulating sub-member 171) also exists on the side of the RF supply member 150 that is far from the cantilever 500. This high dielectric constant region of the medium can increase the capacitance between the port member 120 and the RF supply member 150. Therefore, it is necessary to appropriately position the interface 173 between the high dielectric constant portion and the low dielectric constant portion toward the cantilever 500 to compensate for the reduction in the average dielectric constant of the medium on the side of the RF supply member 150 that is far from the cantilever 500, thereby further reducing the capacitance between the port member 120 and the RF supply member 150 that is far from the cantilever 500.
[0049] In practice, the chamber body 400 may have a cylindrical structure, and the optimal effect of compensating for the relative permittivity of the two insulating parts should be an axisymmetric structure. Therefore, the arc-shaped high / low relative permittivity interface 173 shown in Figures 5 and 6 has a better compensation effect than the planar high / low relative permittivity interface 173 shown in Figure 4. This is because the planar interface 173 forms a bilaterally symmetric structure rather than an axisymmetric structure.
[0050] In some embodiments, the axis of the supply end of the RF supply member 150 does not overlap with the axis of the mounting member 140, and the axis of the supply end of the RF supply member 150 is offset away from the cantilever 500 with respect to the axis of the mounting member 140. This configuration allows the supply end of the RF supply member 150 and the mounting member 140 to be non-concentric (or non-coaxial), thereby similarly compensating for asymmetry on both sides of the lower electrode structure 100 due to asymmetry in the geometric structure, making the current flow in the circuit on the side of the lower electrode structure 100 closer to the cantilever 500 and the side farther from the cantilever 500 more uniform, further improving the uniformity of the etching process.
[0051] FIG. 3 is a top view of the eccentric relationship between the mounting member 140 and the RF supply member 150. As can be seen from FIG. 3, the distance b1 from the axis of the RF supply member 150 on the side farther from the cantilever 500 to the edge of the mounting member 140 is smaller than the distance a1 between them on the side closer to the cantilever 500.
[0052] In addition, the remaining two-sided spacings c1 and d1 may be maintained equal, and of course, in the design of the chamber body 400, if the impedance of the RF circuit in that direction is not symmetrical, c1 and d1 may not be the same, and specifically can be determined according to the actual operating conditions.
[0053] To ensure insulation between the port member 120 and the mounting member 140, the lower electrode structure 100 may further include a first insulating member 130, which is connected between the mounting member 140 and the port member 120. In this way, the first insulating member 130 not only supports the mounting member 140, but also provides insulation between the mounting member 140 and the port member 120.
[0054] The first insulating member has a through-hole, and the supply end of the RF supply member 150 passes through the through-hole before connecting to the mounting member 140. In this way, the through-hole allows the RF supply member 150 to escape, ensuring that the RF supply member 150 can be connected to the mounting member 140.
[0055] Furthermore, the axis of the through hole does not overlap with the axis of the first insulating member 130, and the axis of the through hole is shifted in a direction away from the cantilever 500 with respect to the axis of the first insulating member 130. Specifically, as shown in Fig. 2, the distance from the side of the first insulating member 130 closer to the cantilever 500 to the axis of the through hole is a first distance a, and the distance from the side of the first insulating member 130 farther from the cantilever 500 to the axis of the through hole is a second distance b, and the first distance a is greater than the second distance b.
[0056] For example, the diameter of the first insulating member 130 and the diameter of the mounting member 140 are equal, and they are arranged coaxially, which not only ensures symmetry in the attachment of the two, but also is advantageous for the attachment between them. In this case, the distance a1 from the side of the mounting member 140 closer to the cantilever 500 to the axis of the RF supply member 150 is equal to the first distance a, and the distance b1 from the side of the mounting member 140 farther from the cantilever 500 to the axis of the RF supply member 150 is equal to the second distance b, and in this case, a1 is similarly greater than b1.
[0057] With the above configuration, the inductance of each circuit on the side closer to the cantilever 500 and the side farther from the cantilever 500 can be adjusted, and the current density of the circuits on both sides can be adjusted accordingly. In other words, the difference in current density between the circuits on both sides is compensated for, thereby making the current density of the circuit on the side closer to the cantilever 500 and the current density of the circuit on the side farther from the cantilever 500 symmetrical, and further ensuring the uniformity of the etching process.
[0058] Furthermore, the range of the difference between the first distance a and the second distance b is 5 mm to 20 mm, including 5 mm, 8 mm, 10 mm, 12 mm, 15 mm, 18 mm, 20 mm, etc. Of course, other values are also acceptable, and the specific value of the difference in distance can be set according to the distribution of the geometric structure, and the embodiments of the present disclosure do not specifically limit this.
[0059] For example, the difference between the first distance a and the second distance b can be 10 mm. In this case, as shown in FIG. 7, a simulation can be performed to obtain current density distribution curves for the circuits on the side closer to the cantilever 500 and the side farther from the cantilever 500. As can be seen from FIG. 7, when the distance difference is 10 mm, the current densities for the circuits on the side closer to the cantilever 500 and the side farther from the cantilever 500 are relatively symmetrical. This is because the currents on the side closer to the cantilever 500 are in opposite directions, which creates a cancellation effect, resulting in a smaller inductance than the side farther from the cantilever 500. Therefore, by adjusting the inductances on both sides to be relatively balanced, the current symmetry can be further improved, further ensuring the uniformity of the etching process.
[0060] In some embodiments, the first insulating member 130 may be an insulating disk, which may be a circular member, and may serve to support the mounting member 140 and to provide insulation. The insulating disk may also have an opening therein for the RF supply member 150 to pass through.
[0061] Based on the above electrode mechanism, an embodiment of the present disclosure further discloses a semiconductor processing apparatus, which includes the semiconductor processing chamber according to the present disclosure. The semiconductor processing chamber includes the lower electrode structure 100 and may further include components such as a chamber body 400, a lining 200, a ground ring 300, a cantilever 500, and a matcher 600. The lining 200 is disposed on the inner surface of the sidewall of the chamber body 400, the cantilever 500 is connected to the sidewall of the chamber body 400, the lower electrode structure 100 is disposed within the chamber body 400 and connected to the cantilever 500, the matcher 600 is disposed outside the chamber body 400 and corresponds to the cantilever 500, and the ground ring 300 is fitted to the outside of the lower electrode structure 100 and contacts the lining 200. The specific structure and operating principle of the semiconductor processing apparatus can be found in the related art, and a detailed description thereof will be omitted here.
[0062] In the embodiment of the present disclosure, the current circuit on the cantilever 500 side is the lining 200-ground ring 300-port member 120-shield member 160-matcher 600, and the current circuit on the opposite side of the cantilever 500 is the lining 200-ground ring 300-port member 120-shield member 160-matcher 600.
[0063] By providing the shield member 160 and the port member 120 non-coaxially (or non-concentrically), asymmetry in the lower electrode circuit due to asymmetry in the geometric distribution of the inherent elements within the semiconductor process chamber can be compensated for, thereby making the current density in the lower electrode circuit more uniform and further improving the uniformity of the etching process.
[0064] Although the embodiments of the present disclosure have been described above with reference to the drawings, the present disclosure is not limited to the specific embodiments described above, and the specific embodiments are merely illustrative and not restrictive. Those skilled in the art can create various forms based on the teachings of the present disclosure without departing from the spirit of the present disclosure and the scope of protection of the claims, and all of these forms belong to the scope of protection of the present disclosure. [Explanation of symbols]
[0065] 100 Lower electrode structure 110 base 111 First side wall 120 Port member 121 Through hole 130 First insulating member 140 Mounting member 150 RF supply materials 160 Shielding material 170 Second insulating member 171 First sub-insulating member 172 Second sub-insulating member 173 Boundary 200 lining 300 Grounding Ring 400 Chamber body 500 cantilever 600 Matcher a First distance b Second distance e Third distance f 4th distance
Claims
1. a chamber body and a lower electrode structure, the lower electrode structure being disposed within the chamber body; the lower electrode structure includes a base, a port member, a mounting member, an RF supply member, and a shield member, the mounting member being used to mount a wafer; the base is connected to a sidewall of the chamber body via a cantilever; the port member and the mounting member are stacked in order on the base along a first direction; a first end of the shield member is connected to the port member, a second end of the shield member is connected to an inner wall of the base, an axis of the first end of the shield member does not overlap with an axis of the port member, and the axis of the first end of the shield member is offset from the axis of the port member in a direction away from the cantilever; a semiconductor processing chamber, characterized in that the RF supply member is inserted into the shield member, passes through the port member along the first direction, and is then connected to the mounting member, and is used to supply RF power to the mounting member.
2. 2. The semiconductor process chamber of claim 1, wherein an axis of the supply end of the RF supply member does not overlap an axis of the first end of the shield member, and the axis of the supply end of the RF supply member is offset from the axis of the first end of the shield member in a direction adjacent to the cantilever.
3. 3. The semiconductor process chamber of claim 2, wherein an axis of the supply end of the RF supply member is located between an axis of the first end of the shield member and an axis of the port member.
4. the lower electrode structure further includes a second insulating member, the port member has a through hole, the second insulating member is disposed within the through hole, and the RF supply member passes through the second insulating member; 4. The semiconductor process chamber according to claim 2, wherein a first end of the shielding member is connected to the through hole, and the axis of the first end of the shielding member is on the same line as the axis of the second insulating member.
5. the second insulating member includes a first sub-insulating member and a second sub-insulating member that are matched to each other; the first sub-insulating member is located closer to the cantilever, and the second sub-insulating member is located farther from the cantilever; 5. The semiconductor process chamber of claim 4, wherein a capacitance between the RF supply member and the side of the port member where the first sub-insulating member is located is greater than a capacitance between the RF supply member and the side of the port member where the second sub-insulating member is located.
6. 6. The semiconductor process chamber of claim 5, wherein a projected area of the first sub-insulating member is smaller than a projected area of the second sub-insulating member in a plane perpendicular to an axis of the second insulating member.
7. 7. The semiconductor process chamber of claim 6, wherein the first sub-insulating member has a dielectric constant equal to or greater than the dielectric constant of the second sub-insulating member.
8. The first sub-insulating member is made of ceramic, 8. The semiconductor process chamber of claim 7, wherein the second sub-insulating member is made of a resin.
9. 7. The semiconductor process chamber of claim 6, wherein the difference in width between the first sub-insulating member and the second sub-insulating member is in the range of 5 mm to 50 mm.
10. 6. The semiconductor process chamber of claim 5, wherein the boundary surface between the first sub-insulating member and the second sub-insulating member is a curved surface.
11. 6. The semiconductor process chamber of claim 5, wherein an interface between the first sub-insulating member and the second sub-insulating member is a flat surface.
12. 12. The semiconductor process chamber of claim 10, wherein an axis of the supply end of the RF supply member is located on an interface between the first sub-insulating member and the second sub-insulating member.
13. 12. The semiconductor process chamber of claim 10, wherein an axis of the supply end of the RF supply member is located on a side of the first sub-insulating member that is farther from the cantilever, and the RF supply member is located on the second sub-insulating member.
14. a projected area of the second insulating member is smaller than a projected area of the through hole in a plane perpendicular to an axis of the second insulating member; 5. The semiconductor process chamber according to claim 4, wherein the second insulating member is provided on a side of the through hole closer to the cantilever.
15. 2. The semiconductor process chamber of claim 1, wherein the axis of the supply end of the RF supply member does not overlap with the axis of the mounting member, and the axis of the supply end of the RF supply member is offset from the axis of the mounting member in a direction away from the cantilever.
16. the lower electrode structure further includes a first insulating member connected between the mounting member and the port member; a through hole is provided in the first insulating member, and a supply end of the RF supply member is connected to the mounting member after passing through the through hole; 2. The semiconductor process chamber of claim 1, wherein the axis of the through hole does not overlap with the axis of the first insulating member, and the axis of the through hole is offset from the axis of the first insulating member in a direction away from the cantilever.
17. 2. The semiconductor process chamber of claim 1, further comprising a lining disposed within the chamber body and surrounding the outer periphery of the lower electrode structure, one end of the lining being electrically connected to the chamber body and the other end of the lining being electrically connected to the port member.
18. A semiconductor process device comprising the semiconductor process chamber according to any one of claims 1 to 17.
Citation Information
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