High Frequency Differential Single-Pole Multi-Throw Switch Module

The use of spatially aligned MEMS switches with identical electrical characteristics addresses impedance mismatch issues in differential signal switching, ensuring low reflection and insertion losses for high-frequency signals, suitable for PCIe 5.0 data rates.

JP2025529733APending Publication Date: 2025-09-09MENLO MICROSYSTEMS INC
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Patent Information

Application Number
JP2025507323
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-01-26
Filing Date
2023-08-08
Publication Date
2025-09-09

AI Technical Summary

Technical Problem

Switching differential signals at high frequencies and high data rates is challenging due to path length and impedance differences between signal lines, which degrade performance, particularly in loopback paths used for testing chipsets.

Method used

A device with spatially aligned and symmetrical microelectromechanical system (MEMS) switches is used to connect differential input ports to output ports, ensuring identical electrical characteristics and impedance matching through conductive layers separated by insulating layers, with signal paths configured as coplanar waveguides and vias for impedance control.

Benefits of technology

The solution ensures low reflection and insertion losses, maintaining signal integrity and performance even at high frequencies, supporting data rates up to PCIe 5.0 and beyond.

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Abstract

An apparatus for switching differential signals is provided. The device includes an input port, a first output port, a second output port, a first microelectromechanical system (MEMS) switch, and a second MEMS switch. The first and second MEMS switches selectively connect the input port to either the first output port or the second output port. The differential input port is split into two single-ended paths. One single-ended path is switched by the first MEMS switch, and the other single-ended path is switched by the second MEMS switch. The single-ended paths are spatially paired in length and orientation and are arranged to at least partially pass through two or more conductive layers, with adjacent conductive layers separated by an electrically insulating layer.
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Description

Related Applications

[0001] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 371,064, filed August 10, 2022, and U.S. Provisional Patent Application No. 63 / 481,703, filed January 26, 2023, the entire teachings of which are incorporated herein by reference. [Background technology]

[0002] A signal source may need to be switched between two destinations. When that signal source generates a differential signal, particularly at high frequencies and high data rates, challenges can arise. For example, if the switching and signal path layout architectures on both sides of a differential signal are not identical, issues such as path length and impedance differences can degrade the performance of high-frequency signals.

[0003] For example, increasing network speeds are driving faster serial bus communication between memory and chipsets. Test engineers are being forced to use more accurate components for loopback paths, which include switches that route signals back to the DUT, to accurately and quickly test chipsets in on-board designs. These loopback paths can include those for communication standards such as PCIe 4.0 / 5.0, SerDes, Ethernet, USB 3.x / 4, and HDMI.

[0004] One of the obstacles to increasing data rates, such as with the PCIe 5.0 standard, is the performance of switches at high frequencies. EM relay switches have a lifespan of up to 10 million cycles at switching speeds in the millisecond range.

[0005] U.S. Patent Application Publication No. 2014 / 253260 (Horimoto) (Patent Document 1) describes a prior art approach to switching differential signals. Referring to Horimoto's Figure 13, signal lines 150a and 150b are a pair of signal lines for carrying differential signals to a switch (see paragraph

[0014] of Horimoto). As shown, signal line 150a is oriented differently than signal line 150b. More specifically, Horimoto's line 150b is shown bent back on itself, potentially introducing self-coupling along its length that signal line 150a does not. This self-coupling can cause signal line 150b to have impedance / reflection characteristics that do not match those of signal line 150a, and this effect becomes more pronounced as signal frequencies / data rates increase. [Prior art documents] [Patent documents]

[0006] [Patent Document 1] US Patent Application Publication No. 2014 / 253260 Summary of the Invention [Problem to be solved by the invention]

[0007] The embodiments described herein are directed to devices for switching differential signals. [Means for solving the problem]

[0008] The device may include an input port, a first output port, a second output port, a first microelectromechanical system (MEMS) switch, and a second MEMS switch. The first and second MEMS switches may selectively connect the input port to either the first output port or the second output port. The differential input port may be split into two single-ended paths. One single-ended path may be switched by the first MEMS switch, and the other single-ended path may be switched by the second MEMS switch. The single-ended paths may be spatially aligned with each other in length and orientation and may extend at least partially through at least two conductive layers. Adjacent conductive layers are separated by an electrical insulating layer. The two single-ended paths from the input port to each output port have substantially identical electrical characteristics (e.g., impedance matching, reflection coefficient, etc.).

[0009] In one aspect, the present invention may be an apparatus for switching differential signals, the apparatus comprising: an input port having a first conductor and a second conductor; a first output port having a third conductor and a fourth conductor; and a second output port having a fifth conductor and a sixth conductor. The apparatus may further comprise a first microelectromechanical systems (MEMS) switch having an input, a first output, and a second output, the input of the first MEMS switch being electrically connected to the first conductor through a first signal path. The first output of the first MEMS switch may be electrically connected to the third conductor through a second signal path, and the second output of the first MEMS switch may be electrically connected to the fifth conductor through a third signal path. The apparatus may further comprise a second MEMS switch having an input, a first output, and a second output. The input of the second MEMS switch may be electrically connected to the second conductor through a fourth signal path, the first output of the second MEMS switch may be electrically connected to the fourth conductor through a fifth signal path, and the second output of the second MEMS switch may be electrically connected to the sixth conductor through a sixth signal path. The first and second signal paths may be spatially aligned with respect to length and orientation. The third, fourth, fifth, and sixth signal paths may be spatially aligned with respect to length and orientation.

[0010] The third, fourth, fifth, and sixth signal paths may be arranged to pass through at least two conductive layers. Adjacent pairs of conductive layers may be separated by an electrical insulating layer. The first and second signal paths may be located between adjacent conductive material layers fixed at a common potential. At least a portion of each of the first and second signal paths may be configured as a coplanar waveguide. The device may further include two or more conductive vias provided on both sides of each of the first and second signal paths. Each of the two or more conductive vias may be electrically connected to the adjacent conductive material layer. In another embodiment, a stripline waveguide configuration or a microstrip waveguide configuration may be used to realize each portion of the first and second signal paths.

[0011] The first MEMS switch and the second MEMS switch may each include at least two throws corresponding to a pole corresponding to a first contact and at least a second contact and a third contact, and the second contact and the third contact may be symmetrically disposed with respect to the first contact.

[0012] In another aspect, the invention can be an apparatus for switching differential signals within an operating frequency range, the apparatus including a first signal path from a first signal component of a differential input port to an input of a first one of the microelectromechanical systems (MEMS) switches and from an output of the first one of the first MEMS switches to a first signal component of a differential output port. The apparatus can further include a second signal path from a second signal component of the differential input port to an input of a second one of the second MEMS switches and from an output of the second one of the second MEMS switches to a second signal component of the differential output port. Each of the first and second signal paths can be disposed through at least two conductive layers, with adjacent conductive layers separated by an electrically insulating layer. The electrical length of the first signal path may be substantially the same as the electrical length of the second signal path, and the spatial orientation of the first signal path may match the spatial orientation of the second signal path such that the impedance of the first signal path at frequencies within the operating frequency range is substantially the same as the impedance of the second signal path at those frequencies within the operating frequency range.

[0013] The first signal path and the second signal path may be located between conductive material layers fixed at a common potential. At least a portion of each of the first signal path and the second signal path may be provided as a coplanar waveguide. The device may further include two or more conductive vias provided on both sides of each of the first signal path and the second signal path, each of the two or more conductive vias electrically connecting to the conductive material layer. The spatial orientation of the first signal path may be symmetrical to the spatial orientation of the second signal path. The first MEMS switch and the second MEMS switch may each include a pole corresponding to a first contact and at least two throws corresponding to at least a second contact and a third contact. The second contact and the third contact may be arranged symmetrically with respect to the first contact.

[0014] In yet another aspect, the present invention may be a device for switching differential signals, the device including a first microelectromechanical system (MEMS) switch mounted on a multi-layer assembly and a second MEMS switch mounted on the multi-layer assembly. The first MEMS switch may have an input that is selectively electrically connected to either a first output or a second output. The second MEMS switch may have an input that is selectively electrically connected to either the first output or the second output. The multi-layer assembly may have a top surface, a bottom surface, a first edge, a second edge, a third edge, and a fourth edge. The first and second edges may be opposite each other, and the third and fourth edges may be opposite each other. The multi-layer assembly may include at least two conductive material layers. Adjacent pairs of conductive material layers may be separated by an electrically insulating layer. The multi-layer assembly may further include an input port located at the first edge, a first output port located at the second edge, and a second output port located at the second edge. The input port may include first and second input conductors, the first output port may include first and second output conductors, and the second output port may include third and fourth output conductors. The first input conductor may be electrically connected to an input of the first MEMS switch through a first input signal path on one of the at least two conductive material layers. The first output of the first MEMS switch may be electrically connected to the first output conductor by a first output signal path passing through two or more of the at least two conductive material layers. The second output of the first MEMS switch may be electrically connected to the third output conductor by a second output signal path passing through two or more of the at least two conductive material layers. The second input conductor may be electrically connected to an input of the second MEMS switch through a second input signal path on one of the at least two conductive material layers.A first output of the second MEMS switch may be electrically connected to the second output conductor by a third output signal path passing through two or more of the at least two conductive material layers. A second output of the second MEMS switch may be electrically connected to the fourth output conductor by a fourth output signal path passing through two or more of the at least two conductive material layers. The first input signal path and the second input signal path may be configured so that the impedance characteristics of the first input signal path and the impedance characteristics of the second input signal path are substantially identical.

[0015] Each of the first and second signal paths may be located between two conductive material layers fixed at a common potential. One of the two layers may be directly above the signal path, and another of the two layers may be directly below the signal path. At least a portion of each of the first and second paths may be provided as a coplanar waveguide. The device may further include two or more conductive vias provided on both sides of each of the first and second signal paths. Each of the two or more conductive vias is electrically connected to the conductive material layer. The spatial orientation of the first signal path may be symmetrical to the spatial orientation of the second signal path.

[0016] The first MEMS switch and the second MEMS switch may each include at least two throws corresponding to a pole corresponding to a first contact and at least a second contact and a third contact, and the second and third contacts may be symmetrically arranged around the first contact.

[0017] The first and third output signal paths may be configured so that the impedance characteristics of the first and third output signal paths are substantially the same. The second and fourth output signal paths may be configured so that the impedance characteristics of the second and fourth output signal paths are substantially the same. In general, any or all of the output signal paths may be configured to have the same or substantially the same impedance characteristics.

[0018] The file of this patent or patent application contains at least one drawing in color. If you require a reproduction of this patent or patent application publication containing at least one drawing in color, please file a request and pay the fee with the Patent and Trademark Office.

[0019] The foregoing will become apparent from the following more detailed description of exemplary embodiments, as illustrated in the accompanying drawings. The same reference numerals refer to the same structures / components throughout the different views. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating the embodiments. [Brief explanation of the drawings]

[0020] [Figure 1A] FIG. 1 illustrates an example of a differential switch arrangement in accordance with an exemplary embodiment of the present invention. [Figure 1B] FIG. 1B is a detailed view of the switch device shown in FIG. 1A. [Figure 2A] FIG. 2 is a three-dimensional (stereo) view showing an exemplary embodiment of the switch device. [Figure 2B] FIG. 4 is another three-dimensional (stereo) view showing the embodiment of the switch device. [Figure 2C] FIG. 3 is a schematic diagram of the physical layout of the signal paths of the switch fabric of FIGS. 2A and 2B. [Figure 3A] 1 is a plan view of an example of a symmetric single-pole, four-throw (SP4T) MEMS switch according to embodiments of the present description. FIG. [Figure 3B]FIG. 3B is an isometric view of the SP4T MEMS switch shown in FIG. 3A. [Figure 4A] FIG. 1 is an isometric view of an exemplary embodiment of a switch device described herein. [Figure 4B] FIG. 2 is a side view of the switch device described herein. [Figure 5] FIG. 2 is a bottom view of the switch device of the same example. [Figure 6A] FIG. 2 is a diagram showing one of the circuit layers of the switch device. [Figure 6B] FIG. 10 is a diagram showing another circuit layer of the switch device. [Figure 6C] FIG. 10 is a diagram showing yet another circuit layer of the switch device. [Figure 6D] FIG. 10 is a diagram showing yet another circuit layer of the switch device. [Figure 6E] FIG. 10 is a diagram showing yet another circuit layer of the switch device. [Figure 6F] FIG. 10 is a diagram showing yet another circuit layer of the switch device. [Figure 7] FIG. 2 is a three-dimensional view of an encapsulated signal path as described herein. [Figure 8A] FIG. 1 illustrates experimental results for an exemplary embodiment described herein. [Figure 8B] 10A-10C show further experimental results for exemplary embodiments described herein. [Figure 9A] 10A-10C show further experimental results for example embodiments described herein. [Figure 9B] 10A-10C show further experimental results for example embodiments described herein. [Figure 10A] 10A-10C show further experimental results for example embodiments described herein. [Figure 10B] 10A-10C show further experimental results for example embodiments described herein. [Figure 10C] 10A-10C show further experimental results for example embodiments described herein. [Figure 11]FIG. 1 illustrates an embodiment configured for use at data rates up to the maximum specified data rate of PCIe 5.0. [Figure 12] FIG. 10 is a diagram of a device incorporating each switch device in a single package. [Figure 13A] 13 is a diagram showing one form of the switches in the device shown in FIG. 12. FIG. [Figure 13B] 13A and 13B are diagrams showing other configurations of the switches in the device shown in FIG. 12. [Figure 13C] 13 is a diagram showing yet another configuration of the switches in the device shown in FIG. 12. FIG. [Figure 13D] 13 is a diagram showing yet another configuration of the switches in the device shown in FIG. 12. FIG. [Figure 13E] 13 is a diagram showing yet another configuration of the switches in the device shown in FIG. 12. FIG. [Figure 13F] 13 is a diagram showing yet another configuration of the switches in the device shown in FIG. 12. FIG. DETAILED DESCRIPTION OF THE INVENTION

[0021] In the following, exemplary embodiments are described.

[0022] FIG. 1A illustrates an example of a differential switch device 100 according to an embodiment of the present invention. The differential switch device 100 receives a differential signal at a differential input port 102 and operates to switch the differential signal from the differential input port 102 to one of a first differential output port 104 or a second differential output port 106. This switching is achieved by a pair of single-pole, double-throw (SPDT) switches 108, 110 both receiving the same actuation signal. The differential signal at the input port 102 consists of two complementary single-ended signals. A first signal 102a of the two complementary signals is routed by the first SPDT switch 108 to either the first output port 104 or the second output port 106, and a second signal 102b of the two complementary signals is routed by the second SPDT switch 110 to either the first output port 104 or the second output port 106. The actuation signals to the first switch 108 and the second switch 110 are synchronized so that both complementary signals 102a, 102b are routed to either the first output port 104 or the second output port 106.

[0023] 1B is a detailed diagram of the switch apparatus 100 shown in FIG. 1A. The differential input port 102 comprises a first conductor 120 and a second conductor 122. The first conductor 120 connects the input port 102 to an input 124 of a first switch 108, and the second conductor 122 connects the input port 102 to an input 126 of a second switch 110. The first output port 104 of the switch apparatus 100 comprises a third conductor 128 and a fourth conductor 130. The third conductor 128 connects the first output port 104 to a first output 132 of the first switch 108, and the fourth conductor 130 connects the first output port 104 to a first output 140 of the second switch 110. The second output port 106 of the switch apparatus 100 comprises a fifth conductor 136 and a sixth conductor 138. A fifth conductor 136 connects the second output port 106 to the second output 134 of the first switch 108, and a sixth conductor 138 connects the second output port 106 to the second output 142 of the second switch 110.

[0024] 1A and 1B are merely schematic representations and are not intended to represent a physical or spatial representation. As described herein, the exemplary embodiment is laid out such that (i) the differential path length and path direction from the input port 102 through the first switch 108 and the second switch 110 to the first output port 104 are substantially the same as (ii) the differential path length and path direction from the input port 102 through the first switch 108 and the second switch 110 to the second output port 106.

[0025] 2A and 2B are three-dimensional (volume) diagrams illustrating an exemplary embodiment of a switch device 200. The physical signal path (i.e., transmission line) layout presented in the embodiment illustrated in FIGS. 2A and 2B corresponds to that of the switch configuration illustrated schematically in FIG. 2C. Referring to FIG. 2C, as described in connection with FIGS. 1A and 1B, input port 202 is configured to receive a differential signal. Both complementary versions of the differential signal are routed to the switches, which in this exemplary embodiment are single-pole, four-throw (SP4T) switches, with three throws used and one unused. As described in connection with FIGS. 1A and 1B, two throws transmit the differential signal to first output 204 and second output 206. The third throw is used for auxiliary outputs 207 and 209, and the fourth throw is unused as previously described. The auxiliary outputs are driven separately by HVout1 and HVout8 of the driver integrated circuit (IC) 230, while HVout2 drives a complementary input differential signal to the first output port 204 and HVout3 drives a complementary input differential signal to the second output port 206.

[0026] Figure 2A shows the electrical paths when switches 208 and 210 direct the differential signal from input port 202 to second output port 206. Figure 2B shows the electrical paths when switches 208 and 210 direct the differential signal from input port 202 to first output port 204. In both Figures 2A and 2B, the top row shows a plan view of switch apparatus 200, and the bottom row shows a three-dimensional view of switch apparatus 200 depicting the individual layers of the apparatus as described in detail herein.

[0027] The top rows (i.e., upper views) of Figures 2A and 2B depict switch pads 208a, 210a that support external electrical connections for the MEMS switches 208, 210. In Figure 2A, signal paths 212, 214 from each SP4T MEMS switch 208, 210 are shown exiting the switch pads 208a, 210a in the upper right quadrant, corresponding to one of the four throws for the switch. In Figure 2B, signal paths 216, 218 from each SP4T MEMS switch 208, 210 are shown exiting the switch pads 208a, 210a in the lower right quadrant, corresponding to another of the four throws for the switch.

[0028] 2A and 2B, it can be seen that the signal paths 220, 222 from the input port 202 to the switch pads 208a, 210a are of substantially the same length and are symmetrically shaped.

[0029] 2A, it can be seen that the paths 212, 214 from each switch pad 208a, 210a down through each layer 232 of the switch apparatus 200 to the second output port 206 are substantially identical. Each individual layer 232 is depicted in FIGS. 6A-6F.

[0030] In the bottom row of Figure 2B, it can be seen that the paths 216, 218 from each switch pad 208a, 210a, passing down through each layer 232 of the switch apparatus 200 to the first output port 204, are substantially identical. Also, comparing the bottom rows of Figures 2A and 2B, it can be seen that the paths from the switch pads 208a, 210a to the second output port 206 are substantially identical to the paths from the switch pads 208a, 210a to the first output port 204. The only difference is the direction in which the signal paths exit the switch pads. As described herein, signal paths 212, 214 exit the switch pads in the upper right quadrant, while signal paths 216, 218 exit the switch pads in the lower right quadrant. However, because the MEMS switches 208, 210 are symmetrical, the direction in which the signals exit the MEMS switches has little or no effect on the electrical characteristics of the signal paths. The symmetrical MEMS switches 208, 210 are configured with a switch pole at the center of the switch element, with each throw occurring symmetrically from the center pole outward around the periphery of the switch.

[0031] An example of a symmetrical single-pole, four-throw (SP4T) MEMS switch is shown in the plan view of Figure 3A and the isometric view of Figure 3B. The pole of the switch is located in the center, and the four throws are arranged symmetrically around the pole (above, below, left, and right). Pole vias 302 are located in the glass cap of the package directly above the pole ports of the SP4T switch. Each throw port is located at a throw via 304a, 304b, 304c, and 304d, respectively.

[0032] As shown in Figures 2A and 2B, the most severe signal bending occurs when the signal jumps to a different height / layer. This bending is acceptable because the signal transition when it exits a vertical via will be similar regardless of which way the signal is routed from the same via onto a horizontal plane. In this exemplary embodiment, bending on the same layer only occurs on the path from the differential input port to the two MEMS switches. The use of inter-layer wiring in a multi-layer architecture allows for very dense and flexible wiring layout.

[0033] 2A and 2B, both paths from the input port 202, through the matching MEMS switches 208 and 210, and through each layer 232 of the switch device 200 to the output ports 204 and 206 are symmetrical. The paths have substantially identical lengths, shapes, and spatial (i.e., physical) orientations within the device, resulting in essentially matched radio frequency (RF) paths from the input port 202 to the output ports 204 and 206. As used herein, "matched" spatial orientations of signal paths means that the signal paths have substantially identical lengths and similar three-dimensional locations within the device. The electrical characteristics of such paired RF paths are substantially identical.

[0034] FIG. 4A is an isometric view of another exemplary embodiment of a switch device 200 described herein. MEMS switches 208 and 210 are depicted mounted on the top surface of the switch device 200. An input port 202, a first output port 204, and a second output port 206 are depicted with electrostatic discharge (ESD) protection elements 402 at each port. A driver integrated circuit (IC) 230 provides actuation signals to the MEMS switches 208 and 210. FIG. 4A also depicts a resistor-capacitor (RC) network 234 that may be used for signal conditioning of the switch device 200. FIG. 4B is a side view of the switch device 200. The layout of the switch device 200 of this exemplary embodiment depicts the input port 202 at the left edge of the switch device 200 and the output ports 204 and 206 at the right edge of the switch device 200, thereby allowing signals to flow spatially conveniently across the device 200.

[0035] FIG. 5 is a bottom view of the example switch device 200, specifying pinout information for the device. FIGS. 6A-6F depict the individual circuit layers 232 of the switch device 200. The layers are separated from each other by layers of dielectric material. FIG. 6A shows the top layer of the switch device 200 (i.e., the layer on which the MEMS switches 208, 201, driver IC 230, and other components are implemented). FIG. 6B shows the next layer below the top layer, and so on down to the bottom layer depicted in FIG. 6F.

[0036] Layers 232 are arranged such that signal lines carrying high-frequency signals are surrounded above and below by conductive reference planes. For example, FIG. 6B illustrates signal traces 220 and 222 from the input port to MEMS switches 208 and 210. The top layer, shown in FIG. 6A, and the bottom layer, shown in FIG. 6C, provide solid reference planes that encapsulate signal traces 220 and 222. In addition, conductive via fences are implemented along both sides of signal traces 220 and 222. The vias extend from the conductive planes above signal traces 220 and 222 to the conductive planes below signal traces 220 and 222. FIG. 7 shows a three-dimensional view of signal trace 702 encapsulated by upper conductive reference plane 704 and lower conductive reference plane 706. Conductive vias 708 can be seen providing conductive barrier fences on both sides of signal trace 702. This via fence, along with the conductive reference planes above and below the signal trace, facilitates impedance control along the trace. While the exemplary embodiment described herein uses a 50 ohm impedance, other impedances may be used. Using the techniques described herein, a controlled impedance (e.g., 50 ohms) is maintained from the input port to the MEMS switch and from the MEMS switch to the output port, thereby reducing reflection and insertion losses in these signal paths.

[0037] Figures 8A, 8B, 9A, 9B, 10A, 10B, and 10C show experimental results for an example embodiment described herein. Figure 8A plots the insertion loss for the first port (measured 802, finite element method (FEM) 804) and the insertion loss for the second port (measured 806, FEM 808). Figure 8B plots the return loss for the first port (measured 810, finite element method (FEM) 812) and the return loss for the second port (measured 814, FEM 816). The results show that the measurements track well with the simulations.

[0038] 9A and 9B show 3D FEM simulation values ​​versus measured values ​​for differential S-parameters in the same frequency band. 12 ) and the insertion loss of the FEM simulation 904. Figure 9B plots the return loss (S11) of the measured 906 and the return loss of the FEM simulation 908. Again, these results show that the measurements track well with the simulations.

[0039] 10A, 10B, and 10C are eye diagrams for a non-return-to-zero (NRZ) test signal at 20 Gbps (FIG. 10A), 32 Gbps (FIG. 10B), and 40 Gbps (FIG. 10C), showing that this exemplary embodiment produces an open and symmetric eye pattern even at 40 Gbps.

[0040] Another exemplary embodiment shown in FIG. 11 is designed for applications with data rates up to PCIe 5.0. In this embodiment, two switch devices 200 (200a, 200b) (shown in the three-dimensional views of FIGS. 2A and 2B and the schematic view of FIG. 2C) are used to perform an external loopback test. For high-speed paths (e.g., 32 Gbps), differential output signals (TX-P, TX-N) from the DUT 1102 are returned to the differential input signals (RX-P, RX-N) of the DUT 1102 through AC coupling capacitors 1104 (e.g., 200 nF). For DC measurements or lower-speed signals, a different differential path to / from the DUT 1102 can be used.

[0041] Figure 12 shows device 1200, which combines devices 200a and 200b in a single package. Device 1200 is shown with coupling capacitor 1104 connected as shown in Figure 11. The switch control sections are labeled HVA, HVB, HVC, and HVD.

[0042] Figures 13A-13F illustrate various opening and closing configurations of the switches of device 1200. Figures 13A, 13B, and 13C depict loopback signal paths that pass through coupling capacitor 1104. Figures 13D, 13E, and 13F depict loopback paths that do not include a coupling capacitor.

[0043] In FIG. 13A, the configuration required to loop signal HS1_A to signal HS2_A and signal HS1_B to signal HS2_B is depicted.

[0044] In FIG. 13B, the configuration required to loop signal MS1_A to signal MS2_A and signal MS1_B to signal MS2_B is depicted.

[0045] In FIG. 13C, the configuration required to loop signal LS1_A to signal LS2_A and signal LS1_B to signal LS2_B is depicted.

[0046] FIG. 13D depicts the configuration required to loop signal HS1_A to signal MS1_A, signal HS2_A to signal MS2_A, signal HS1_B to signal MS1_B, and signal HS2_B to signal MS2_B.

[0047] FIG. 13E depicts the configuration required to loop signal HS1_A to signal LS1_A, signal HS2_A to signal LS2_A, signal HS1_B to signal LS1_B, and signal HS2_B to signal LS2_B.

[0048] FIG. 13F depicts the configuration required to loop signal MS1_A to signal LS1_A, signal MS2_A to signal LS2_A, signal MS1_B to signal LS1_B, and signal MS2_B to signal LS2_B.

[0049] Table 1 summarizes specific switch control states for the exemplary embodiment shown in Figures 13A-13F. A switch control value of "HIGH" means the switch is closed, while a control value of "LOW" means the switch is open.

[0050] [Table 1]

[0051] Although exemplary embodiments have been particularly shown and described, those skilled in the art will recognize that various changes in form and detail may be made therein without departing from the scope of the embodiments encompassed by the appended claims.

Claims

1. 1. An apparatus for switching differential signals, comprising: an input port having a first conductor and a second conductor; a first output port having a third conductor and a fourth conductor; a second output port having a fifth conductor and a sixth conductor; a first microelectromechanical system (MEMS) switch having an input, a first output, and a second output, the input of the first MEMS switch electrically connected to the first conductor by a first signal path, the first output of the MEMS switch electrically connected to the third conductor by a second signal path, and the second output of the MEMS switch electrically connected to the fifth conductor by a third signal path; a second MEMS switch having an input, a first output, and a second output, the input of the second MEMS switch electrically connected to the second conductor by a fourth signal path, the first output of the second MEMS switch electrically connected to the fourth conductor by a fifth signal path, and the second output of the second MEMS switch electrically connected to the sixth conductor by a sixth signal path; wherein the first signal path and the second signal path are spatially coincident with each other in terms of length and orientation; The apparatus, wherein the third, fourth, fifth and sixth signal paths are spatially coincident with respect to length and orientation.

2. 2. The device of claim 1, wherein the third, fourth, fifth, and sixth signal paths are arranged to pass through at least two conductive layers, and each pair of adjacent conductive layers is separated by an electrically insulating layer.

3. 2. The device of claim 1, wherein the first signal path and the second signal path are located between adjacent layers of conductive material that are fixed at a common potential.

4. 4. The apparatus of claim 3, wherein at least a portion of each of the first signal path and the second signal path is provided as a coplanar waveguide.

5. 4. The apparatus of claim 3, further comprising: two or more conductive vias provided on either side of each of the first signal path and the second signal path; wherein each of the two or more conductive vias is in electrical communication with the adjacent layer of conductive material.

6. 2. The device of claim 1, wherein the first MEMS switch and the second MEMS switch each include a pole corresponding to a first contact and at least two throws associated with at least a second contact and a third contact, the second contact and the third contact being symmetrically arranged around the first contact.

7. 1. An apparatus for switching differential signals within an operating frequency range, comprising: a first signal path from a first signal component of a differential input port to an input of a first Micro-Electro-Mechanical Systems (MEMS) switch of a first MEMS switch, and from an output of the first MEMS switch of the first MEMS switch to a first signal component of a differential output port; a second signal path from a second signal component of the differential input port to an input of the second MEMS switch of the second MEMS switch, and from an output of the second MEMS switch of the second MEMS switch to a second signal component of the differential output port; each of the first signal path and the second signal path is arranged to pass through at least two conductive layers, and adjacent conductive layers are separated by an electrical insulating layer; the electrical length of the first signal path is substantially the same as the electrical length of the second signal path; the spatial orientation of the first signal path matches the spatial orientation of the second signal path such that an impedance of the first signal path at a frequency within the operating frequency range is substantially the same as an impedance of the second signal path at that frequency within the operating frequency range.

8. 8. The apparatus of claim 7, wherein the first signal path and the second signal path are located between layers of conductive material fixed at a common potential.

9. 9. The apparatus of claim 8, wherein at least a portion of each of the first signal path and the second signal path is provided as a coplanar waveguide or a stripline waveguide.

10. 9. The apparatus of claim 8, further comprising: two or more conductive vias provided on either side of each of the first signal path and the second signal path; wherein each of the two or more conductive vias is in electrical communication with the layer of conductive material.

11. 8. The apparatus of claim 7, wherein the spatial orientation of the first signal path is symmetrical to the spatial orientation of the second signal path.

12. 8. The apparatus of claim 7, wherein the first MEMS switch and the second MEMS switch each include a pole corresponding to a first contact and at least two throws associated with at least a second contact and a third contact, the second contact and the third contact being symmetrically arranged around the first contact.

13. 1. An apparatus for switching differential signals, comprising: a first microelectromechanical system (MEMS) switch mounted in the multi-layer assembly, the first MEMS switch having an input selectively electrically connected to either a first output or a second output; a second MEMS switch mounted on the multi-layer assembly, the second MEMS switch having an input selectively electrically connected to either the first output or the second output; the multi-layer assembly having an upper surface, a lower surface, a first edge, a second edge, a third edge, and a fourth edge, the first and second edges being opposite one another, and the third and fourth edges being opposite one another; the multi-layer assembly comprising: At least two conductive material layers, each pair of adjacent conductive material layers being separated by an electrically insulating layer; an input port located at the first edge, the input port having a first input conductor and a second input conductor; a first output port located at the second edge, the first output port having a first output conductor and a second output conductor; and a second output port located at the second edge, the second output port having a third output conductor and a fourth output conductor; Including, the first input conductor is electrically connected to an input of the first MEMS switch by a first input signal path on one of the at least two layers of conductive material; a first output of the first MEMS switch electrically connected to the first output conductor by a first output signal path passing through two or more of the at least two conductive material layers; a second output of the first MEMS switch electrically connected to the third output conductor by a second output signal path passing through two or more of the at least two layers of conductive material; the second input conductor is electrically connected to an input of the second MEMS switch by a second input signal path on said one of the at least two layers of conductive material; a first output of the second MEMS switch electrically connected to the second output conductor by a third output signal path passing through two or more of the at least two conductive material layers; a second output of the second MEMS switch electrically connected to the fourth output conductor by a fourth output signal path passing through two or more of the at least two layers of conductive material; The apparatus, wherein the first input signal path and the second input signal path are configured such that the impedance characteristics of the first input signal path and the impedance characteristics of the second input signal path are substantially identical.

14. 14. The apparatus of claim 13, wherein each of the first and second signal paths is located between two layers of conductive material fixed at a common potential, one of the two layers being immediately above the signal path and another of the two layers being immediately below the signal path.

15. 15. The apparatus of claim 14, wherein at least a portion of each of the first and second paths is provided as a coplanar waveguide or a stripline waveguide.

16. 15. The apparatus of claim 14, further comprising: two or more conductive vias provided on either side of each of the first signal path and the second signal path; wherein each of the two or more conductive vias is in electrical communication with the layer of conductive material.

17. 14. The apparatus of claim 13, wherein the spatial orientation of the first input signal path is symmetrical to the spatial orientation of the second input signal path.

18. 14. The apparatus of claim 13, wherein the first MEMS switch and the second MEMS switch each include at least two throws associated with a pole corresponding to a first contact and at least a second contact and a third contact, the second contact and the third contact being symmetrically arranged around the first contact.

19. 14. The apparatus of claim 13, wherein the first output signal path and the third output signal path are configured such that the impedance characteristics of the first output signal path and the impedance characteristics of the third output signal path are substantially identical.

20. 14. The apparatus of claim 13, wherein the second output signal path and the fourth output signal path are configured such that the impedance characteristics of the second output signal path and the impedance characteristics of the fourth output signal path are substantially identical.

Citation Information

Patent Citations

  • High-frequency switch

    US20140253260A1