Radiator layer for ultrasonic transducers
The semiconductor die with a radiator layer structure addresses the limitations of existing radiators by generating low-frequency sound waves for deep penetration and high-resolution imaging through controlled frequency resonance and vertical propagation.
Patent Information
- Application Number
- JP2025518809
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2022-09-30
- Filing Date
- 2023-09-28
- Publication Date
- 2025-09-19
AI Technical Summary
Existing semiconductor die radiators are ineffective in generating low-frequency sound waves (100-300 MHz) and lack flexibility in frequency range, limiting their ability to penetrate deeply into fluids and tissues, and provide high-resolution imaging.
A semiconductor die with a radiator layer structure featuring a piezoelectric layer and electrodes, configured to resonate and reflect frequencies within the 100-300 MHz range, while attenuating others, promoting vertical acoustic wave propagation and reducing lateral leakage.
The radiator layer generates low-frequency acoustic waves that penetrate deeply, enabling high-resolution imaging and extending applicability to applications requiring deep acoustic penetration.
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Figure 2025531550000001_ABST
Abstract
Description
[Background technology]
[0001] Acoustic waves are useful in a variety of applications, including industrial and medical applications. In many such applications, a transducer converts electrical signals into acoustic waves, which are provided to a target medium (e.g., the human body to view organs, or a semiconductor package to determine structural integrity). The acoustic waves are reflected off features in the target medium and return to the transducer, which converts the acoustic signal back into an electrical signal. The electrical signal is then processed by appropriate circuitry, such as a processor or microcontroller, to create an image of the feature. Summary of the Invention
[0002] In some examples, a semiconductor die includes a semiconductor substrate having a surface with first and second surface portions, and a radiator layer on the surface. The radiator layer includes a metal member having a first metal member portion above the first surface portion and a second metal member portion above the second surface portion, a first distance between the first metal member portion and the first surface portion, and a second distance between the second metal member portion and the second surface portion, the first distance being less than the second distance. The radiator layer includes first and second electrodes. The radiator layer includes a piezoelectric layer extending over each of the first and second electrodes along a length of the radiator layer, the piezoelectric layer being between the first and second metal members and the semiconductor substrate. [Brief explanation of the drawings]
[0003] [Figure 1] FIG. 1 is a block diagram of an electronic device having a radiator layer, according to various examples.
[0004] [Figure 2] 1A-1C are cross-sectional schematic diagrams of electronic devices having radiator layers, according to various examples.
[0005] [Figure 3] 1A-1C are cross-sectional schematic diagrams of electronic devices having radiator layers, according to various examples.
[0006] [Figure 4] 1A-1C are cross-sectional schematic diagrams of electronic devices having radiator layers, according to various examples.
[0007] [Figure 5A] 1 is a cross-sectional schematic diagram of a semiconductor die having a radiator layer, according to various examples.
[0008] [Figure 5B] 1 is a cross-sectional schematic diagram of a semiconductor die having a radiator layer, according to various examples.
[0009] [Figure 5C] 1A-1C are top views of electrically active structures in a radiator layer of a semiconductor die, according to various examples.
[0010] [Figure 5D] 1 is a top view of a piezoelectric layer in a radiator layer of a semiconductor die, according to various examples.
[0011] [Figure 5E] 1 illustrates a top view of a metal feature in a radiator layer of a semiconductor die, according to various examples.
[0012] [Figure 6A] 1A-1C are cross-sectional schematic diagrams of a semiconductor die and the acoustic radiation pattern of the semiconductor die, according to various examples.
[0013] [Figure 6B] 10 is a graph showing radiated power from a radiator layer as a function of operating frequency for various examples.
[0014] [Figure 7] 1A-1C are cross-sectional schematic diagrams of a semiconductor die in contact with a molding compound and acoustic radiation patterns of the semiconductor die and the molding compound, according to various examples.
[0015] [Figure 8] 1 is a cross-sectional schematic diagram of a semiconductor die having a radiator layer over a matching layer, according to various examples.
[0016] [Figure 9] 1A-1C are cross-sectional schematic diagrams of semiconductor dies having roughened surfaces, according to various examples.
[0017] [Figure 10] 1A-1C are cross-sectional schematic diagrams of semiconductor dies having patterned metal layers, according to various examples. DETAILED DESCRIPTION OF THE INVENTION
[0018] Ultrasound devices, such as medical ultrasound machines, include a semiconductor die coupled to an ultrasound transducer that excites sound waves. The ultrasound transducer directs the sound waves toward a target external to the ultrasound device, such as human or animal tissue. Low-frequency (e.g., 100-300 MHz) sound wave technology is particularly useful for broad penetration of the target being studied. For example, low-frequency sound waves penetrate human and animal tissue more deeply than high-frequency sound waves. Semiconductor die radiators have generally been unsuccessful in generating low-frequency sound waves because the radiator architecture is not suited to controlling and directing such low-frequency sound waves. Therefore, such radiators excite and emit sound waves in a higher frequency range (e.g., 700 MHz), which cannot penetrate deeply into fluids, tissues, or other targets being studied. Additionally, the radiator architecture is not suitable for providing a wide range of frequencies (e.g., bandwidths above 100 MHz), and the lack of flexibility in acoustic frequencies precludes higher resolution imaging, limiting the usefulness of radiators in many applications.
[0019] This description describes various examples of electronic devices, such as ultrasonic devices, that include a semiconductor die capable of exciting and emitting acoustic waves in the low frequency band (e.g., 100 MHz to 300 MHz) and wider bandwidths (e.g., above 100 MHz). More specifically, the semiconductor die includes a radiator layer structure having a piezoelectric layer in contact with multiple electrodes. The electrodes are alternately excited to generate acoustic waves in the piezoelectric layer. When the radiator layer begins to resonate, metallic members on the piezoelectric layer reflect frequencies within a target frequency range (e.g., 100 MHz to 300 MHz) and attenuate other frequencies outside this range, thereby enhancing the acoustic waves within the target frequency range. The periodicity (e.g., lateral dimensions and / or pitch) of the electrodes and the vertical thicknesses of the various layers in the radiator layer determine the signal frequencies that are reflected and attenuated. The electrodes and metallic members are arranged in a pattern that prevents lateral leakage of acoustic waves; instead, acoustic wave propagation is promoted vertically through the semiconductor substrate. These acoustic waves exit the semiconductor substrate and enter space external to both the semiconductor substrate and the electronic device containing the semiconductor die. Because the emissive layer is structurally configured to generate and emit low-frequency acoustic waves (e.g., greater than or equal to 100 MHz and less than or equal to 300 MHz) and to do so over a wide range of frequencies (e.g., greater than or equal to 100 MHz), the acoustic waves can penetrate deeply into the subject of study, delivering higher resolution images than would otherwise be available at lower bandwidths, and extending the applicability of acoustic technology to other applications (e.g., applications where deep acoustic penetration is useful) beyond those possible at higher frequencies and / or lower bandwidths.
[0020] FIG. 1 is a block diagram of an electronic device 100 having a radiator layer, according to various examples. The electronic device 100 can be any device in which acoustic technology is beneficial. Exemplary electronic devices 100 include a medical ultrasound device, a navigation device, a communication device, an imaging device, a cleaning device, and a mixing device. The following description assumes that the electronic device 100 has a medical ultrasound application, although the scope of this description is not limited to medical ultrasound applications. The electronic device 100 includes a printed circuit board (PCB) 102. The electronic device 100 also includes a controller 104 and a semiconductor die 106. The controller 104 and the semiconductor die 106 may be coupled to the PCB 102. In some examples, the semiconductor die 106 is positioned flush with or within 5 millimeters of the surface of the electronic device 100 to facilitate the emission of acoustic waves to and reception of acoustic waves from a study target (e.g., human or animal tissue). As described in detail below, the semiconductor die 106 includes a semiconductor substrate and a radiator layer on the semiconductor substrate. The radiator layer is configured to excite and emit acoustic waves through the semiconductor substrate. Also, as described below, the structure of the radiator layer is adapted to reflect acoustic waves in a relatively low frequency range (e.g., 100 MHz to 300 MHz, including 100 MHz, 300 MHz) over a wider bandwidth (e.g., at least 100 MHz), thereby mitigating challenges associated with other solutions, as described above.
[0021] FIG. 2 is a cross-sectional schematic diagram of an electronic device 100 having a radiator layer, according to various examples. The example electronic device 100 of FIG. 2 includes a PCB 102 and a semiconductor die 106 coupled to the PCB 102. The electronic device 100 may also include a controller 104 (FIG. 1), although the controller 104 is not explicitly shown in FIG. 2. The PCB 102 includes metal bond pads 200 coupled to metal traces, which are coupled to other components on the PCB 102, such as the controller 104. The semiconductor die 106 also includes a device side having metal bond pads 202 coupled to the bond pads 200 by conductive members 204, such as solder balls. The bond pads 202 are coupled to vias and other metallization (not explicitly shown) within the semiconductor die 106, which may be coupled to a radiator layer 206 on the device side of the semiconductor die 106. In this manner, an electrical path is formed between the radiator layer 206 and the controller 104 (FIG. 1), thereby enabling the controller 104 to control the radiator layer 206 as described herein.
[0022] The portion of the semiconductor die 106 above the radiator layer 206 is a semiconductor substrate through which the radiator layer 206 emits and receives acoustic waves. The semiconductor substrate thus abuts the research subject 208 (e.g., human or animal tissue, fluid). The semiconductor die 106 emits acoustic waves 210 into the research subject 208 and receives reflected acoustic waves 212 from the research subject 208. In some examples, the acoustic waves are reflected in response to a steep impedance gradient between adjacent structures, such as between blood and bone. The semiconductor die 106, or another structure on the PCB 102, such as the controller 104, is configured to characterize the research subject 208 based on the acoustic waves emitted and received by the semiconductor die 106.
[0023] FIG. 3 is a cross-sectional schematic diagram of an electronic device 100 having a radiator layer, according to various examples. The example electronic device 100 of FIG. 3 includes a printed circuit board 102 and a semiconductor die 106. Other components, such as a controller 104 (FIG. 1), may also be coupled to the printed circuit board 102 but are not explicitly shown in FIG. 3. In contrast to the device side of the semiconductor die 106 of FIG. 2, the device side of the semiconductor die 106 of FIG. 3 faces away from the printed circuit board 102. Thus, the bond pads 202 and the radiator layer 206 face away from the PCB 102. Thus, a bond wire 300 couples the bond pads 202 to the conductive members 302, and the conductive members 302 (e.g., leads of a lead frame) are coupled to the bond pads 200 of the PCB 102 using conductive members 304 (e.g., solder balls). The bond wire 300 is coupled to the conductive members 302 with any suitable type of bond, such as a stitch bond. Support member 306 is coupled to support member 308 (e.g., solder balls), which is coupled to PCB 102. In some examples, support members 306 and 308 are non-conductive members. In some examples, support members 306 and 308 are conductive members, with support member 306 coupled to metallization within semiconductor die 106 and support member 308 coupled to bond pads 200 (not explicitly shown below support member 308) on PCB 102. For example, support members 306, 308 may constitute die attach pads and act as ground planes. In some examples, support members 306 and 308 are metallic and therefore conductive, but are not coupled to bond pads or other metallization and are not configured to carry electrical signals. PCB 102 includes orifice 310 through which acoustic waves can be emitted by semiconductor die 106 or through which acoustic waves reflected toward semiconductor die 106 can pass. Mold compound 312 covers semiconductor die 106, bond wires 300, conductive members 302, and portions of support member 306. In some examples, acoustic waves can extend through semiconductor substrate 314, mold compound 312, or both.
[0024] In some examples, it may be useful to prevent acoustic waves from passing through the mold compound 312. Figure 4 is a cross-sectional schematic diagram of an electronic device 100, according to various examples. The electronic device 100 of Figure 4 is the same as the electronic device 100 of Figure 3, except that the electronic device 100 of Figure 4 includes a cap 400 (e.g., composed of a semiconductor material such as silicon, a dielectric material, a metal, or an alloy) on the radiator layer 206. Between the semiconductor cap 400 and the radiator layer 206 is a cavity 402 consisting of an air gap (e.g., air). The semiconductor cap 400 and cavity 402 provide a steep impedance gradient that blocks acoustic waves, thereby confining acoustic wave emission and reception to the semiconductor substrate 314.
[0025] FIG. 5A is a cross-sectional schematic diagram of a semiconductor die 106 having a radiator layer, according to various examples. The semiconductor die 106 includes a radiator layer 206. The radiator layer 206 includes a set 500 of wave control structures having a first pitch, a set 502 of wave control structures having a second pitch larger than the first pitch, and a set 504 of wave control structures having a third pitch larger than the first pitch. In some examples, the second and third pitches are approximately equal (within 10% of each other). In some examples, the second pitch is 30% to 40% larger than the first pitch, and in some examples, the third pitch is 30% to 40% larger than the first pitch. The semiconductor die 106 also includes bond pads 202 between the set 502 of wave control structures and the nearest edge of the semiconductor die 106, and between the set 504 of wave control structures and the nearest edge of the semiconductor die 106. The semiconductor die 106 also includes a semiconductor substrate 506 beneath the set of wave control structures 500, 502, and 504. In some examples, the semiconductor substrate 506 includes silicon, although other semiconductors such as gallium nitride are possible.
[0026] While operation of the semiconductor die 106 is described in more detail with reference to FIG. 5B, in general, the controller 104 (FIG. 1) causes the radiator layer 206 to generate acoustic waves in a frequency range of 100 MHz or higher that resonate in an operating frequency range of 100 MHz to 300 MHz (e.g., 100 MHz to 200 MHz, or 200 MHz to 300 MHz). The sets of wave control structures 500, 502, and 504 are configured to reflect acoustic waves in the 100 MHz to 300 MHz range and attenuate acoustic waves at other frequencies. A larger pitch of the sets of wave control structures 502 and 504 (relative to the set of wave control structures 500) reduces lateral acoustic wave leakage, while a smaller pitch of the set of wave control structures 500 promotes vertical acoustic wave propagation (through the semiconductor substrate 506). This behavior is similar to that of radio frequency waveguides and transmission lines, where the periodicity (e.g., pitch) of the wave control structures (e.g., wave control structures 502, 504) in the radiator layer 206 allows acoustic waves to propagate horizontally along the radiator layer 206. Varying the periodicity or pitch of the wave control structures changes the dispersive characteristics of the radiator layer 206. When the electrodes in the wave control structures are alternately excited as described herein, the radiator layer 206 exhibits highly dispersive behavior and has a maximum acoustic wave frequency above which the radiator layer 206 attenuates acoustic waves. Increasing the dimensions (e.g., vertical thickness) of the wave control structures reduces this maximum acoustic wave frequency, and increasing the pitch between the wave control structures in the radiator layer 206 impedes acoustic wave propagation.
[0027] FIG. 5B is a cross-sectional schematic diagram of a semiconductor die 106 having a radiator layer 206, according to various examples. In particular, FIG. 5B shows adjacent wave control structures, with the wave control structure on the left being from set 502 (FIG. 5A) of wave control structures and the wave control structure on the right being from set 500 (FIG. 5A). The radiator layer 206 is on a surface 550 of a semiconductor substrate 506. The radiator layer 206 includes multiple structures in a stacked configuration. Specifically, the radiator layer 206 includes a dielectric layer 551 on the surface 550, a dielectric layer 552 on the dielectric layer 551, and a dielectric layer 553 on the dielectric layer 552. Other configurations, such as a single dielectric layer instead of dielectric layers 551-553, may also be useful. A piezoelectric layer 554 is on the dielectric layer 553. Piezoelectric layer 554 extends along the length of surface 550, or more generally, along the length of radiator layer 206. A pair of electrodes 555 and 556 are located on either side of piezoelectric layer 554, as shown. Electrode 555 is located between piezoelectric layer 554 and dielectric layer 553, and electrode 556 is located between piezoelectric layer 554 and dielectric layer 557. Dielectric layer 557 abuts piezoelectric layer 554. Metal member 558 (e.g., comprised of tungsten or tungsten-titanium) is located on dielectric layer 557, and dielectric layer 559 is located on metal member 558. Metal member 560 (e.g., comprised of tungsten or tungsten-titanium) is located on dielectric layer 559. Dielectric layer 561 is located on metal member 560, and passivation layer 599 is located on dielectric layer 561.
[0028] As described above, the piezoelectric layer 554 extends along the length of the radiator layer 206. In some examples, the various dielectric and passivation layers 599 of FIG. 5B may extend along the length of the radiator layer 206, but the various dielectric and passivation layers 599 of FIG. 5B may also include multiple discontinuous segments. In some examples, the electrodes 555 and 556 do not extend along the entire length of the radiator layer 206, but rather have a shortened length relative to the radiator layer 206, as shown. In some examples, the metal members 558 and 560 do not extend along the entire length of the radiator layer 206, but rather have a shortened length relative to the radiator layer 206, as shown.
[0029] The wave control structure 562 is part of the radiator layer 206, including a portion of the piezoelectric layer 554, a pair of electrodes 555 and 556, a pair of metal members 558 and 560, and dielectric layers separating the electrodes 555, 556, the metal members 558, 560, and the piezoelectric layer 554 from one another as shown. The wave control structure 562 has an arcuate shape because the piezoelectric layer 554, the pair of metal members 558, 560, the passivation layer 599, and the various dielectric layers in the radiator layer 206 all have arcuate shapes. For example, metal member 560 includes portion 563 located directly above corresponding portion 564 of surface 550, metal member 558 includes portion 565 located directly above portion 564 of surface 550 and directly below portion 563 of metal member 560, metal member 560 includes portion 566 located directly above corresponding portion 567 of surface 550, metal member 558 includes portion 568 located directly above portion 567 and directly below portion 566, metal member 560 includes portion 569 located directly above corresponding portion 570 of surface 550, and metal member 558 includes portion 571 located directly above portion 570 and directly below portion 569. In some examples, the distance between portions 566 and 567 is greater than the distance between portions 563 and 564. In some examples, the distance between portions 566 and 567 is greater than the distance between portions 569 and 570. In some examples, the distance between portions 563 and 564 is different from the distance between portions 569 and 570 (e.g., within 10% of each other), and in some examples, the distance between portions 563 and 564 is the same as the distance between portions 569 and 570. In some examples, the distance between portions 568 and 567 is greater than the distance between portions 565 and 564. In some examples, the distance between portions 568 and 567 is greater than the distance between portions 571 and 570. In some examples, the distance between portions 565 and 564 is different from the distance between portions 571 and 570, and in some examples, the distance between portions 565 and 564 is the same as the distance between portions 571 and 570. In some examples, piezoelectric layer 554 and passivation layer 599 are arc-shaped, as are metal members 558 and 560.
[0030] The radiator layer 206 includes a wave control structure 572. The wave control structure 572 includes a piezoelectric layer 554, a passivation layer 599, and various dielectric layers 551-553, 557, 559, and 561. The wave control structure 572 may also include a pair of electrodes 573 and 574 on either side of the piezoelectric layer 554, as shown. The wave control structure 572 may also include a pair of metal members 575 and 576 above the electrode 574, as shown. As shown, the piezoelectric layer 554, the electrodes 573 and 574, the metal members 575 and 576, the passivation layer 599, and the dielectric layers 557, 559, and 561 have an arcuate shape as described above. In some examples, the length of electrodes 573 and 574 (e.g., in the range of 2 microns to 50 microns) is shorter than the length of electrodes 555 and 556 (e.g., in the range of 40 microns to 90 microns). In some examples, the length of metal members 575 and 576 (e.g., in the range of 2 microns to 50 microns) is shorter than the length of metal members 558 and 560 (e.g., in the range of 2 microns to 50 microns).
[0031] In operation, controller 104 ( FIG. 1 ) excites pair of electrodes 555, 556 and pair of electrodes 573, 574, which in turn excites piezoelectric layer 554. Piezoelectric layer 554 provides acoustic waves in response to excitation by pair of electrodes 555, 556 and 573, 574. The acoustic waves propagate along the length of radiator layer 206. Controller 104 may excite electrodes 555, 556 and 573, 574 in any suitable manner to generate acoustic waves. In some examples, electrodes 555 and 573 are coupled to ground, and controller 104 repeatedly excites electrodes 556 and 574 to generate acoustic waves. In some examples, electrodes 556 and 574 are coupled to ground and controller 104 repeatedly excites electrodes 555 and 573 to generate acoustic waves, but the remainder of this description will assume that electrodes 555 and 573 are coupled to ground and that controller 104 excites electrodes 556 and 574. The amplitude of the acoustic waves depends on the voltages that controller 104 applies to the pairs of electrodes 555, 556 and 573, 574. The frequency and wavelength of the acoustic waves depends on the frequency at which controller 104 excites the pairs of electrodes 555, 556 and 573, 574. While this description assumes excitation of pairs of electrodes 555, 556 and 573, 574 as specifically shown in FIG. 5B, in some examples, the controller 104 excites some or all of the pairs of electrodes in the set of wave control structures 500, 502, and 504 (FIG. 5A) in any suitable pattern (e.g., alternating pattern, serial pattern, group), at any suitable frequency, and at any suitable voltage to generate acoustic waves having target characteristics such as amplitude and frequency.
[0032] 5B , the radiator layer 206 resonates at the operating frequency by reflecting sound waves having the operating frequency and attenuating sound waves having other frequencies. In some examples, the operating frequency is in the range of 100 MHz to 300 MHz. In some examples, the operating frequency is in the range of 200 MHz to 300 MHz. The arc-shaped structures of the radiator layer 206 (e.g., the arc-shaped piezoelectric layer 554, the arc-shaped metal members 558, 560, 575, and 576 in the wave control structures 562, 572, and the arc-shaped dielectric members 557, 559, and 561) are sized to be larger than the wavelength of the sound waves, which causes a greater contrast in the geometric characteristics of the radiator layer 206 (e.g., the dimensional contrast between the wave control structures of the radiator layer 206 and portions of the radiator layer 206 that do not include the wave control structures), generating greater reflections and thus promoting reflection of sound waves within the operating frequency range. The arcuate shapes of the structures in the radiator layer 206 provide large perturbations to the path along which the sound waves propagate, thereby enabling strong sound reflection. These arcuate structures in the radiator layer 206 also facilitate the reflection of sound waves over a relatively large bandwidth (e.g., 100 MHz or greater) because they are geometrically large structures (relative to sound wavelengths) and therefore can reflect a greater number of sound wavelengths covering a relatively large frequency band.
[0033] FIG. 5C is a top view of electrically active structures within radiator layer 206, according to various examples. Specifically, FIG. 5C illustrates the plurality of bond pads 202, also shown in FIGS. 2-5A. As discussed, bond pads 202 are positioned on the device side of semiconductor die 106 so as to be accessible for bond wires, solder balls, etc., that couple bond pads 202 to other structures, such as structures on PCB 102. FIG. 5C also illustrates the plurality of electrodes within radiator layer 206. Specifically, FIG. 5C illustrates a ground electrode 580 extending along the length of radiator layer 206, and also illustrates six sets of electrodes 582, 584, 586, 588, 590, and 592. Electrodes 582 are electrically coupled to each other, electrodes 584 are electrically coupled to each other, electrodes 586 are electrically coupled to each other, electrodes 588 are electrically coupled to each other, electrodes 590 are electrically coupled to each other, and electrodes 592 are electrically coupled to each other. The electrodes of one set of electrodes may be arranged in an interleaved pattern with the electrodes of another set of electrodes. For example, electrode sets 582 and 588 have interleaved electrodes, electrode sets 584 and 590 have interleaved electrodes, and electrode sets 586a and 592 have interleaved electrodes. While such interleaved patterns facilitate excitation in a particular pattern, such as on an alternating basis, as described above, controller 104 may excite the various electrodes in any suitable pattern. Each of electrode sets 582, 584, 586, 588, 590, and 592 is coupled to a different bond pad 202, allowing controller 104 (FIG. 1) to individually excite each set of electrodes. Thus, controller 104 may excite the electrodes in electrode set 586 in an interleaved pattern with the electrodes in electrode set 592. Additionally, ground electrode 580 may be coupled to one or more bond pads 202. Although Figure 5C shows the ground electrode 580 as a continuous piece of conductive material extending along the length of the radiator layer 206, the ground electrode may be divided into multiple discontinuous segments, such as electrodes 555 and 573 shown in Figure 5B. Any and all such configurations of electrodes are possible and within the scope of this description.
[0034] Bond pad 202, ground electrode 580, and set of electrodes 582, 584, 586, 588, 590, and 592 may be located on different vertical levels of semiconductor die 106. For example, bond pad 202 may be located on the device side of semiconductor die 106, and ground electrode 580 may be located in radiator layer 206, whether above, below, or on the same vertical level as bond pad 202. Similarly, set of electrodes 582, 584, 586, 588, 590, and 592 may be located in radiator layer 206, whether above, below, or on the same vertical level as bond pad 202. 5B, ground electrode 580 may be located on a different vertical level than electrode set 582, 584, 586, 588, 590, and 592, with piezoelectric layer 554 disposed between (1) ground electrode 580 and (2) electrode set 582, 584, 586, 588, 590, and 592. Electrically active structures, such as electrodes and bond pads, on different vertical levels may be coupled to each other using conductive (e.g., copper) vias, as appropriate.
[0035] 5D is a top view of various examples of a piezoelectric layer 554 in the radiator layer 206. In some examples, the piezoelectric layer 554 may have a length that extends along the length of the radiator layer 206 and a width that is the same as the width of the electrodes in the electrode sets 582, 584, 586, 588, 590, and 592 (FIG. 5C), although the dimensions of the piezoelectric layer 554 may vary.
[0036] Figure 5E is a top view of metal members 594 in the radiator layer 206, according to various examples. Metal members 594 represent the upper metal members shown in Figure 5B, such as metal members 560 and 576. Metal members 594 corresponding to wave control structure 500 (Figure 5A) may have a smaller pitch, and metal members 594 corresponding to wave control structures 502 and 504 (Figure 5A) may have a larger pitch.
[0037] 6A is a cross-sectional schematic diagram of a semiconductor die 106 and the acoustic wave emission pattern of the semiconductor die 106, according to various examples. As shown, the radiator layer 206 provides acoustic waves that propagate through the semiconductor substrate 506 toward an exterior region 600. The acoustic waves are strongest in a central portion 602 of the semiconductor substrate 506 and weaker in lateral regions 604 and 606 of the semiconductor substrate 506.
[0038] FIG. 6B is a graph illustrating the radiated power of acoustic waves from the radiator layer 206 as a function of operating frequency in various examples. The x-axis represents acoustic frequency in Hertz, and the y-axis represents the radiated acoustic power in any suitable units, such as Watts. While the radiated power is expressed in any units, the magnitude of the radiated power over a range of approximately 200 MHz to 300 MHz and a broad band of approximately 100 MHz is noteworthy. While the radiator layer 206 achieves relatively strong output power for acoustic waves in the relatively low frequency range of 200 MHz to 300 MHz, the graph is merely illustrative, and output power may be increased in other frequency ranges depending on the particular structural geometry implemented in the radiator layer 206. The structure of the radiator layer 206 is configured to provide increased output power in the relatively low frequency range of 200 MHz to 300 MHz, as described above.
[0039] The presence of mold compound 312 (FIG. 3) can change the acoustic emission pattern from that shown in FIG. 6A. FIG. 7 is a cross-sectional schematic diagram of mold compound 312 on semiconductor die 106 and the acoustic emission pattern through semiconductor die 106 and mold compound 312. As shown, the emission pattern extends laterally within mold compound 312 relative to the emission pattern within semiconductor die 106.
[0040] 8 is a cross-sectional schematic diagram of a semiconductor die 106 having a radiator layer 206 on a matching layer 800, according to various examples. The matching layer 800 is configured to provide impedance matching between the semiconductor substrate 506 and a medium, such as human tissue or fluid, on the opposite side of the matching layer 800 from the semiconductor substrate 506. The impedance gradient of the matching layer 800 can be appropriately tuned to achieve target ranges for sound reflection and insertion loss. For example, the impedance gradient of the matching layer 800 can be controlled to reduce insertion loss.
[0041] 9 is a cross-sectional schematic diagram of a semiconductor die 106 having a roughened surface 900, in various examples. The roughened surface 900 reduces acoustic reflections due to steep impedance gradients (e.g., between the semiconductor substrate 506 and a medium abutting the semiconductor substrate 506), thereby reducing insertion loss. In some examples, the roughness of the roughened surface 900 (e.g., the height of ridges on the roughened surface 900) has a range comparable to the acoustic wavelength in the semiconductor substrate 506 (e.g., a range from 90% of the wavelength to 500% of the wavelength), which can provide sufficient acoustic dispersion to scatter the acoustic waves. The roughness of the roughened surface 900 is greater at lower frequencies.
[0042] 10 is a cross-sectional schematic diagram of a semiconductor die 106 having a patterned metal layer 1000 on a non-device side of the semiconductor die 106, in various examples. The patterned metal layer 1000 is configured to manipulate acoustic waves propagating through the semiconductor substrate 506. For example, the patterned metal layer 1000 may be patterned to include openings 1002 for collimating acoustic waves exiting the semiconductor substrate 506. In some examples, the patterned metal layer 1000 may be patterned to reduce acoustic wave reflections and associated insertion loss.
[0043] In this description, the term "couple" may encompass a connection, communication, or signal path that enables a functional relationship consistent with this description. For example, if device A generates a signal that controls device B to perform a certain action, then (A) in a first example, device A is coupled to device B by a direct connection, or (B) in a second example, device A is coupled to device B via an intervening component C such that device B is controlled by device A via a control signal generated by device A, where intervening component C does not change the functional relationship between device A and device B.
[0044] A device that is "configured to" perform a task or function may be configured (e.g., programmed and / or hardwired) by a manufacturer at the time of manufacture to perform that function and / or may be configurable (or reconfigurable) by a user after manufacture to perform that function and / or other additional or alternative functions. Such configuration may be via firmware and / or software programming of the device, via the configuration and / or layout of hardware components, via the device's interconnections, or via a combination thereof.
[0045] Use of the term "ground" or variations thereof in the foregoing description may include chassis ground, earth ground, floating ground, virtual ground, digital ground, common ground, and / or any other form of ground connection applicable to or suitable for the teachings herein. Unless otherwise specified, "about," "approximately," or "substantially" preceding a parameter means within + / - 10% of that parameter. Modifications may be made to the described examples, and other embodiments are possible, within the scope of the claims of the present invention.
Claims
1. 1. A semiconductor die comprising: a semiconductor substrate having a surface with first and second surface portions; a radiator layer on the surface; Including, The radiator layer is a metal member having a first metal member portion above the first surface portion and a second metal member portion above the second surface portion, the metal member having a first distance between the first metal member portion and the first surface portion and a second distance between the second metal member portion and the second surface portion, the first distance being smaller than the second distance; first and second electrodes; a piezoelectric layer extending along the length of the radiator layer and over each of the first and second electrodes; Including, the piezoelectric layer is located between the first and second metal member portions and the semiconductor substrate; Semiconductor die.
2. 10. The semiconductor die of claim 1, wherein the radiator layer is configured to emit acoustic waves having a frequency in a range of 100 MHz to 300 MHz.
3. 3. The semiconductor die of claim 2, wherein the acoustic waves are at least 100 MHz wide.
4. The semiconductor die of claim 2 , wherein the radiator layer is configured to expand and contract in response to the acoustic waves.
5. 10. The semiconductor die of claim 1, the metal member includes a third metal member portion, the second metal member portion is between the first metal member portion and the third metal member portion, the surface has a third surface portion, the second surface portion is between the first surface portion and the third surface portion, and a third distance between the third metal member portion and the third surface portion is smaller than the second distance.
6. 10. The semiconductor die of claim 1, the first and second electrodes have a first pitch that is different from a second pitch between the second electrode and a third electrode, and the first, second, and third electrodes are on a common surface of the piezoelectric layer.
7. 1. An electronic device comprising: a printed circuit board (PCB); a semiconductor die coupled to the PCB; Including, the semiconductor die: a semiconductor substrate including a surface having a first surface portion, a second surface portion, and a central surface portion between the first surface portion and the second surface portion; a radiator layer on the surface; Including, The radiator layer has an acoustic wave control structure, and the acoustic wave control structure comprises: a metal member having a first metal member portion, a second metal member portion, and a central metal member portion between the first and second metal member portions, wherein the first metal member portion, the central metal member portion, and the second metal member portion are respectively on the first surface portion, the central surface portion, and the second surface portion, and a first distance between the first metal member portion and the first surface portion and a second distance between the second metal member portion and the second surface portion are each smaller than a third distance between the central metal member portion and the central surface portion; a piezoelectric layer between the metal member and the semiconductor substrate; first and second electrodes on opposite surfaces of the piezoelectric layer and coupled to the PCB; a dielectric layer on the metal member; Including, Electronic devices.
8. 8. The electronic device of claim 7, wherein the first distance is within 10% of the second distance.
9. 8. The electronic device according to claim 7, wherein the length of the metal member is not less than 2 microns and not more than 90 microns.
10. 8. The electronic device of claim 7, wherein the first and second electrodes are configured to excite the piezoelectric layer to generate acoustic waves, the acoustic waves having a frequency between 100 MHz and 300 MHz.
11. 11. The electronic device of claim 10, wherein the acoustic wave is a first acoustic wave, and the metal member reflects the first acoustic wave and attenuates a second acoustic wave having a frequency outside the range of 100 MHz to 300 MHz.
12. 11. The electronic device of claim 10, wherein the radiator layer is configured to expand and contract in response to the acoustic waves.
13. 8. The electronic device of claim 7, further comprising third and fourth electrodes on the same plane as the first electrode, wherein a first pitch between the first and third electrodes is different from a second pitch between the third and fifth electrodes.
14. 8. The electronic device of claim 7, wherein the PCB includes an orifice, and the semiconductor die is configured to emit and receive acoustic waves through the orifice.
15. 8. The electronic device of claim 7, further comprising a molding compound on the semiconductor die, the radiator layer configured to emit acoustic waves through the molding compound.
16. 1. A semiconductor die comprising: a semiconductor substrate; a radiator layer formed on the semiconductor substrate; Including, The radiator layer is first and second metal members; first and second electrodes; a piezoelectric layer having opposing first and second sides; Including, the piezoelectric layer is between the first side and the second side, the first side facing the semiconductor substrate and the second side facing the first and second metal members, the first and second sides configured to generate acoustic waves by exciting the piezoelectric layer, and the first and second metal members configured to reflect the acoustic waves in response to acoustic waves having a frequency within a target frequency band. Semiconductor die.
17. 17. The semiconductor die of claim 16, wherein the target frequency band is between 100 MHz and 300 MHz.
18. 17. The semiconductor die of claim 16, wherein the target frequency band is at least 100 MHz wide.