Busbar structure for power delivery in computing systems

The busbar structure addresses the need for efficient power delivery, high-speed connections, and thermal management in high-performance computing systems by integrating power and ground layers with coolant manifolds, ensuring high-density integration and mechanical support for computing tiles.

JP2025532270APending Publication Date: 2025-09-29TESLA INC
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Patent Information

Application Number
JP2025518314
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2022-09-30
Filing Date
2023-09-27
Publication Date
2025-09-29

AI Technical Summary

Technical Problem

High-performance computing systems require efficient power delivery, high-speed connections, and high-density integration, while also necessitating effective thermal management and structural support for computing tiles.

Method used

A busbar structure with integrated power and ground layers, insulating layers, and coolant manifolds provides structural support, power delivery, and thermal management to computing tiles, featuring a single connecting operation for electrical and physical coupling, along with integrated coolant inlet and outlet manifolds for efficient cooling.

Benefits of technology

The busbar structure ensures high-speed connectivity, mechanical integrity, and thermal performance, enabling high-density integration and efficient power distribution to computing tiles, while maintaining optimal operating temperatures.

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Abstract

Aspects of the present disclosure relate to a busbar structure for power delivery in a computing system. The computing system may include a plurality of computing tiles disposed thereon and a busbar having the plurality of computing tiles disposed thereon. The busbar may provide structural support for the plurality of computing tiles and power to the plurality of computing tiles. In some embodiments, the busbar structure may also provide coolant to each of the computing tiles. In particular embodiments, the busbar structure may provide power and electrical support to any suitable electronic module.
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Description

[Technical Field]

[0001] [CROSS-REFERENCE TO RELATED APPLICATIONS] This application claims the benefit of U.S. Provisional Patent Application No. 63 / 377,998, filed September 30, 2022, entitled "INTEGRATED STRUCTURAL COMPUTE PLANE WITH COOLANT, POWER AND SIGNAL DELIVERY," the disclosure of which is incorporated herein by reference in its entirety for all purposes.

[0002] The present disclosure relates generally to bus bars in computing systems, and more particularly to integrated power delivery in bus bar structures. [Background technology]

[0003] Certain computing systems may be used and / or specifically configured for applications requiring high performance computing and / or large computational power, such as neural network training, neural network inference, machine learning, artificial intelligence, complex simulations, etc. In some applications, the computing system may be used to perform neural network training. For example, such neural network training may generate data for a vehicle's autopilot system (e.g., automobile), other autonomous vehicle functions, or advanced driver assistance system (ADAS) functions.

[0004] In high performance computing systems, high speed connections, desirable power performance, and high density integration are generally desirable. Summary of the Invention

[0005] Each claimed innovation has several aspects, no single one of which is solely responsible for its desirable attributes. Without limiting the scope of the claims, some prominent features of this disclosure will now be discussed briefly.

[0006] In one aspect, a computing system is disclosed. The computing system can include a plurality of computing tiles. Each computing tile of the plurality of computing tiles can include a plurality of dies and a cooling solution integrated with the dies. The computing system can include a bus bar on which the plurality of computing tiles are disposed. The bus bar can be configured to provide structural support for the plurality of computing tiles and power to the plurality of computing tiles.

[0007] In one embodiment, the bus bar may include a power layer and a ground layer. The power layer and the ground layer may be electrically connected to each computing tile of the plurality of computing tiles. The bus bar may include a plurality of insulating layers. The computing system may further include a first plurality of connectors electrically coupling the plurality of computing tiles to the power layer of the bus bar. The bus bar may include a second plurality of connectors electrically coupling the plurality of computing tiles to the ground layer of the bus bar.

[0008] In one embodiment, the busbar can include an integral inlet manifold configured to deliver coolant to each of the plurality of computing tiles and an integral outlet manifold configured to receive coolant from each of the plurality of computing tiles, wherein the integral inlet manifold and the integral outlet manifold can each be disposed between layers of the busbar.

[0009] In one embodiment, the busbars may include stepped edges dimensioned to slide into and engage side rails of the cabinet structure.

[0010] In one embodiment, each computing tile of the plurality of computing tiles includes a system on a wafer (SoW) that includes multiple dies.

[0011] In one embodiment, the cooling solution includes a cold plate, the cold plate including an inlet port configured to receive a coolant and an outlet port configured to exhaust the coolant.

[0012] In one embodiment, the bus bar can include an integral inlet manifold configured to deliver coolant to the inlet ports of each of the plurality of computing tiles and an integral outlet manifold configured to receive coolant from the outlet ports of each of the plurality of computing tiles, The integral inlet manifold and the integral outlet manifold can each be disposed between layers of the bus bar.

[0013] In one embodiment, the computing system may include an inlet manifold disposed on the bus bar and configured to deliver coolant to inlet ports of each of the plurality of computing tiles, and an outlet manifold disposed on the bus bar and configured to receive coolant from outlet ports of each of the plurality of computing tiles.

[0014] In one embodiment, the computing system may include a first host disposed perpendicular to the bus bar. The first host may be configured to provide data support to the plurality of computing tiles. The computing system may include a second plurality of computing tiles and a second bus bar on which the second plurality of computing tiles are disposed. The second bus bar may be configured to provide structural support for the second plurality of computing tiles and power to the second plurality of computing tiles. The first host may be disposed between the bus bar and the second bus bar. The computing system may include a second host disposed perpendicular to the second plurality of computing tiles. The computing system may include a cabinet structure in which the bus bar, the second bus bar, the first host, and the second host may be disposed.

[0015] In one aspect, a busbar is disclosed for supporting and electrically connecting electronic modules. The busbar can include a power layer, a ground layer, and multiple insulation layers. The busbar can be configured to provide structural support to multiple electronic modules. The busbar can be configured to supply power to each electronic module of the multiple electronic modules.

[0016] In one embodiment, the plurality of electronic modules includes computing tiles, each of which may include a plurality of dies and a cooling solution integrated with the plurality of dies.

[0017] In one embodiment, the busbar includes an integral inlet manifold configured to supply coolant to each of the electronic modules and an integral outlet manifold configured to receive coolant from each of the electronic modules.

[0018] In one embodiment, the plurality of insulating layers includes two outer insulating layers, the power layer and the ground layer are both disposed between the two outer insulating layers, the integrated inlet manifold is disposed between the two outer insulating layers, and the integrated outlet manifold is disposed between the two outer insulating layers.

[0019] In one embodiment, the surface of the busbar includes connections to both an integral inlet manifold and an integral outlet manifold.

[0020] In one embodiment, the surface of the busbar further includes a connection to a power layer and a connection to a ground layer.

[0021] In one embodiment, the busbar includes openings in areas over which the electronic modules are placed when the electronic modules are connected to the power and ground layers.

[0022] In one aspect, a method for assembling a computing system is disclosed. The method can include providing a bus bar including a power layer, a ground layer, and multiple insulation layers. The method can include connecting multiple computing tiles to the power layer and the ground layer of the bus bar, such that each computing tile of the multiple computing tiles is positioned to obtain structural support and power from the bus bar. Each computing tile of the multiple computing tiles can include multiple dies and a cooling solution integrated with the multiple dies.

[0023] In one embodiment, each computing tile of the plurality of computing tiles includes a system on a wafer (SoW) that includes multiple dies.

[0024] In one embodiment, the cooling solution is a cold plate, which is integrated with the SoW.

[0025] In one embodiment, connecting each computing tile can also connect each computing tile to the integrated inlet and outlet manifolds of the busbar in the same operation.

[0026] For purposes of summarizing the disclosure, certain aspects, advantages, and novel features of the innovations have been described herein. It is to be understood that not all such advantages may necessarily be achieved in accordance with any particular embodiment. Thus, the innovations may be embodied or implemented to achieve or optimize one advantage or group of advantages taught herein without necessarily achieving other advantages as may be taught or suggested herein. [Brief explanation of the drawings]

[0027] Specific implementations will now be described with reference to the following drawings, which are provided by way of example and not limitation.

[0028] [Figure 1A] FIG. 1 illustrates a system tray according to one embodiment.

[0029] [Figure 1B] FIG. 1 illustrates a computing cabinet according to one embodiment.

[0030] [Figure 2A] 1 is a schematic diagram of a cross section of an exemplary system tray according to one embodiment.

[0031] [Figure 2B] 1 is a schematic diagram of a cross section of an exemplary system tray according to one embodiment.

[0032] [Figure 2C] FIG. 2 is a top view of an exemplary system tray according to one embodiment.

[0033] [Figure 2D] FIG. 1 is a perspective view of an exemplary system tray according to one embodiment.

[0034] [Figure 2E] FIG. 2 is a perspective view of an exemplary system tray with computing tiles omitted, according to one embodiment.

[0035] [Figure 3A] FIG. 1 is a schematic diagram of a cross section of a system tray having coolant manifolds integrated into the busbar structure according to one embodiment.

[0036] [Figure 3B] FIG. 1 is a schematic diagram of a cross section of a system tray having coolant manifolds integrated into the busbar structure according to one embodiment.

[0037] [Figure 4] FIG. 2 is a top view of an exemplary busbar structure according to one embodiment.

[0038] [Figure 5A] FIG. 1 is a schematic diagram of a tile power connector according to one embodiment. [Figure 5B] FIG. 1 is a schematic diagram of a tile power connector according to one embodiment.

[0039] [Figure 5C] FIG. 1 is a schematic diagram of a top view of a tile power connector according to one embodiment.

[0040] [Figure 6A] 1 illustrates a processing system according to an aspect of the present disclosure.

[0041] [Figure 6B] FIG. 1 illustrates a wafer system according to an aspect of the present disclosure.

[0042] [Figure 6C] FIG. 6B is a perspective view of a portion of the processing system of FIG. 6A according to an embodiment of the present disclosure.

[0043] [Figure 7] FIG. 2 illustrates connection pins and connection receptacles connecting computing tiles to a busbar structure according to one embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0044] The following detailed description of certain embodiments presents various descriptions of specific embodiments. However, the innovations described herein can be embodied in many different ways, for example, as defined and covered by the claims. This description refers to the drawings, in which like reference numbers and / or terminology may indicate identical or functionally similar elements. It will be understood that the elements depicted in the drawings are not necessarily drawn to scale. Furthermore, it will be understood that certain embodiments can include more elements than and / or a subset of the elements depicted in the drawings. Furthermore, some embodiments can incorporate any suitable combination of features from two or more drawings.

[0045] As described above, certain computing systems may be used and / or specifically configured for applications requiring high performance computing and / or large computational power, such as neural network training, neural network inference, machine learning, artificial intelligence, complex simulations, etc. In some applications, the computing system may be used to perform neural network training. For example, such neural network training may generate data for a vehicle's (e.g., automobile) autopilot system, other autonomous vehicle functions, or advanced driver assistance system (ADAS) functions.

[0046] A particular computing system may include various levels of hierarchy that perform computing tasks. For example, a computing system may include electronic modules, chips, or dies, computing tiles that each include multiple chips or dies packaged together and integrated with one or more cooling solutions, system trays that include an array of connected computing tiles on a busbar structure, and computing cabinets that each include one or more system trays.

[0047] The present disclosure relates to a novel system tray for computing systems. The system tray disclosed herein can be configured for high-performance computing applications. The system tray disclosed herein can provide high-speed connectivity, desired power, mechanical, and thermal performance, and high-density integration.

[0048] FIG. 1A illustrates a system tray 100 according to one embodiment. As illustrated, the system tray 100 includes an array of computing tiles 102 connected to one another and supported by a busbar structure 104. While computing tiles 102 are illustrated in FIG. 1A, any suitable electronic modules may be included in the system tray 100 and supported by the busbar structure 104. The busbar structure 104 may provide structural support and deliver power to the computing tiles 102 disposed thereon. In particular embodiments, each computing tile 102 includes a system-on-wafer that includes an array of dies integrated with a cooling solution (e.g., a cold plate). The computing tiles 102 may be referred to as training tiles in neural network training applications. The computing tiles 102 may be referred to as computation tiles. Any suitable number of computing tiles 102 may be connected to one another on the system tray 100. For example, FIG. 1A illustrates six computing tiles 102 connected to one another. The system tray 100 may include intra-tray signal delivery cables 108 that facilitate communication between each computing tile 102 and an external connection hub (not shown). The computing tiles 102 are positioned closely together to ensure that connections between tiles, such as those established via the intra-tray signal delivery cables 108, are relatively short to facilitate high-speed connections. The system tray 100 can operate at relatively high power while maintaining mechanical integrity and dissipating heat sufficiently to operate at an appropriate temperature. The illustrated system tray 100 supports high-density integration. For example, the system tray 100 can support significant mass while maintaining a relatively low height.

[0049] As shown in FIG. 1A , the system tray 100 may include stepped edges 106 disposed along the length of opposing sides of the system tray 100. The stepped edges 106 may facilitate sliding the system tray 100 in and out of a cabinet, such as the computing cabinet 150 described with respect to FIG. 1B . The system tray 100 may be moved in and out of the cabinet to facilitate blind connections for power, data, and / or coolant. The system tray 100 may include a handle 110 to help facilitate inserting and removing the system tray 100 from the cabinet.

[0050] The busbar structure 104 may include multiple layers that provide structural and electrical support to the computing tiles 102. The layers may include an insulating layer, one or more power layers, and one or more ground layers. In one embodiment, the busbar structure 104 may include five layers, such as a power layer, an inner insulating layer, and a ground layer, all disposed between two outer insulating layers. The power and ground layers may provide power to the computing tiles 102. For example, the power and ground layers may be made of a conductive material. The insulating layer may be made of an electrically insulating material such that the computing tiles 102, the power layer, and the ground layer are generally electrically isolated except where they are electrically connected for power delivery. A tile power connector, such as the tile power connector described with respect to FIGS. 5A and 5B, may connect each computing tile 102 to the power and ground layers.

[0051] In some embodiments, the busbar structure 104 may include an integrated manifold (not shown in FIG. 1A ) for distributing coolant to the computing tiles. Such an integrated manifold may be used to cool the busbar structure 104. In one embodiment, the manifold for distributing the coolant is integrated into a layer of the busbar structure 104. For example, an inlet manifold may be integrated into a power layer, and an outlet manifold may be integrated into a ground layer. The manifold for distributing the coolant may be integrated into the busbar structure in any other suitable manner, for example, in another layer of the busbar structure 104 or as an additional layer.

[0052] FIG. 1B illustrates a computing cabinet 150 according to one embodiment. The computing cabinet may include a system tray 100, a host 152, a power supply 156, and a cabinet structure 154. The host 152 may provide data support to the computing tiles 102 and the computing cabinet 150. For example, the host 152 may implement ingest processing. The power supply 156 may facilitate the distribution of power to the computing cabinet 150. For example, the power supply 156 may include a power converter, a voltage source, and / or a current source, etc., based on the power specifications of the computing cabinet 150. The cabinet structure 154 may include side rails 158 that provide structural support for the system tray 100, the host 152, and the power supply 156. For example, the stepped edges 106 of the system tray 100 may engage with the side rails 158 to facilitate sliding the system tray 100 into and out of the cabinet structure 154.

[0053] 1B , the computing cabinet 150 includes a first system tray 100 positioned vertically above a first host 152 and a second system tray 100 positioned vertically above a second host 152. As shown, the first host 152 can be located between the first system tray 100 and the second system tray 200. Power supplies 156 can be included at the top and bottom of the compute cabinet 150 and positioned vertically relative to the system tray 100 and the hosts 152.

[0054] The structural cabinet 154 may include power, data, and coolant connectors that mate with a fully inserted system tray 100, host 152, and power supply 156. For example, a fully inserted system tray 100 may blind-connect to the power, data, and coolant connectors. The connectors may facilitate electrical and power connections between the inserted system tray 100, host 152, and power supply 156.

[0055] 2A-2E are schematic diagrams of an exemplary system tray, such as system tray 100, according to one embodiment. FIG. 2A is a schematic diagram of a cross section of exemplary system tray 200. Features of system tray 200 are not necessarily shown to scale. System tray 200 includes computing tiles 102, a power layer 202, a ground layer 204, power connectors 206, ground connectors 208, a coolant inlet manifold 210, a coolant outlet manifold 212, coolant delivery hoses 214, and an insulating layer 216. In system tray 200, a busbar structure includes power layer 202, ground layer 204, and insulating layer 216.

[0056] The power layer 202 and the ground layer 204 may comprise an electrically conductive material. The power layer 202 and the ground layer 204 may form a power circuit. For example, when the system tray 200 is fully inserted into a computing cabinet, the power layer 202 and the ground layer 204 may form an electrical circuit. The insulating layer 216 may be made of an electrically insulating material. The insulating layer 216 may electrically isolate the computing tiles 102, the power layer 202, and the ground layer 204 except where the computing tiles 102 are connected to the power layer 202 or the ground layer 204.

[0057] The power layer 202, the ground layer 204, the insulating layer 216, the power connector 206, and the ground connector 208 may form a busbar structure, such as the busbar structure 104 of FIG. 1A. The busbar structure may provide structural support and power to the computing tile 102. For example, the power layer 202, the ground layer 204, and the insulating layer 216 may be joined to form a rigid body. The power connector 206 may electrically couple the computing tile 102 to the power layer 202. The ground connector 208 may electrically couple the computing tile 102 to the ground layer 204. The power connector 206 and the ground connector 208 may also provide a physical connection to physically connect the computing tile 102 to the busbar structure. Thus, the computing tile 102 may be physically and electrically coupled to the busbar structure with a single connecting operation.

[0058] A coolant inlet manifold 210 can deliver coolant into the system tray 200, and a coolant outlet manifold 212 can transport coolant out of the system tray 200. As described in more detail with respect to FIG. 6C , the computing tiles 102 can include a cold plate that includes various components that receive coolant into the cold plate, distribute the coolant across the cold plate to cool the computing tiles 102, and exhaust the coolant from the cold plate. A coolant delivery hose 214 can transport coolant from the coolant inlet manifold 210 to the computing tiles 102 and from the computing tiles 102 to the coolant outlet manifold 212.

[0059] 2B is a schematic diagram of a cross section of an exemplary system tray 230. Features of the system tray 230 are not necessarily shown to scale. In addition to the components of the system tray 200 of FIG. 2A, the tile system tray 230 may also include a local power reservoir 232. The local power reservoir 232 may be an energy storage device, such as a battery, an electrical capacitor, or the like, or any suitable combination thereof, that can provide power to the system tray 230. For example, the local power reservoir 232 may provide an additional or alternative power source to the computing tile 102. The local power reservoir 232 may be connected directly to the computing tile 102 using the power connector 206 and ground connector 208 and / or may be connected to the power layer 202 and ground layer 204.

[0060] 2C-2E show various views of a system tray 250 having coolant manifolds disposed on a busbar structure according to one embodiment. FIG. 2C shows a top view of the system tray 250. FIG. 2D shows a perspective view of the system tray 250. FIG. 2E shows a perspective view of the system tray 250 with the computing tiles 102 omitted.

[0061] 1A , the system tray 250 may include computing tiles 102, bus bar structure 104, stepped edges 106, intra-tray signal delivery cables 108, and handles 110. The system tray 250 may also include a coolant inlet manifold 210, a coolant outlet manifold 212, coolant delivery hoses 214, a system tray data connector 252, a system tray power connector 254, inter-tray data ports 282, a tile power connector 292, and a tile data connector 294.

[0062] 2A , the coolant inlet manifold 210, the coolant outlet manifold 212, and the coolant delivery hoses 214 can carry coolant to and from the computing tiles 102. The coolant inlet manifold 210 can be connected to an external coolant source, such as by a connector on a computing cabinet, to receive the coolant. The coolant outlet manifold 212 can exhaust the coolant from the system tray 250.

[0063] The system tray data connector 252 is configured to transfer data to and from the system tray 250. The system tray data connector 252 is connected to each computing tile 102 via the intra-tray signal delivery cable 108. The system tray power connector 254 is configured to deliver power to the system tray. The system tray power connector 254 is connected to each computing tile 102 via the bus bar structure 104. The system tray data connector 252 and the system tray power connector 254 can be connected to external devices, such as the host 152 and power supply 156 described with reference to FIG. 1B, to receive power and to send and receive data signals.

[0064] Each of the system tray data connector 252, the system tray power connector 254, the coolant inlet manifold 210, and the coolant outlet manifold 212 can be positioned at the rear end of the system tray 250 such that when the system tray 250 is inserted into the computing cabinet, each connects to a corresponding connector on the computing cabinet. For example, as described with respect to FIG. 1B , when the system tray 250 is fully inserted into a computing cabinet, such as computing cabinet 150, the system tray data connector 252 can connect to a data connection on the cabinet structure 154, the system tray power connector 254 can connect to a power connection on the cabinet structure 154, and the inlet manifold 210 and the coolant outlet manifold 212 can connect to a coolant connection on the cabinet structure 154.

[0065] The inter-tray data ports 282 are positioned opposite the system tray data connectors 252 and system tray power connectors 254 on the system tray 250. In this manner, the inter-tray data ports 282 are accessible when the system tray 250 is inserted into a computing cabinet. The inter-tray data ports 282 can be connected to the computing tiles 102 via the intra-tray signal delivery cables 108. The inter-tray data ports 282 can facilitate connections between multiple system trays, to other computing cabinets, and / or to other external sources.

[0066] The tile data connectors 294 may connect the computing tiles 102 to the intra-tray signal delivery cables 108 and facilitate data communication to and from the computing tiles 102. The tile power connectors 292 may connect the computing tiles 102 to the busbar structure 104 and facilitate delivery of power to the computing tiles 102. The tile data connectors 294 and the tile power connectors 292 are positioned such that when a computing tile 102 is added to the system tray 250, the computing tile 102 is connected to the tile data connectors 294 and the tile power connectors 292 simultaneously (e.g., with a single mechanical movement).

[0067] 3A is a schematic diagram of a cross section of a system tray 300 with a coolant manifold integrated into the busbar structure. Various features of the system tray 300 are not necessarily shown to scale. The system tray 300 includes computing tiles 102, a power layer 302, a ground layer 304, power connectors 306, ground connectors 308, an integrated coolant inlet manifold 310, an integrated coolant outlet manifold 312, coolant vias 314, and an insulating layer 316.

[0068] The power layer 302 and the ground layer 304 may comprise an electrically conductive material. The power layer 302 and the ground layer 304 may form a power circuit. For example, when the system tray 300 is fully inserted into a computing cabinet, the power layer 302 and the ground layer 304 may form an electrical circuit. The insulating layer 316 may be made of an electrically insulating material. The insulating layer 316 may electrically isolate the computing tiles 102, the power layer 302, and the ground layer 304 where the computing tiles 102 are not connected to the power layer 302 or the ground layer 304.

[0069] An integrated coolant inlet manifold 310 can deliver coolant to the system tray 300. An integrated coolant outlet manifold 312 can transport coolant from the system tray 300. As described in more detail with respect to FIG. 6C , the computing tiles 102 can include a cold plate that includes various components for receiving coolant into the cold plate, distributing the coolant across the cold plate to cool the computing tiles 102, and exhausting the coolant from the cold plate. Coolant vias 314 can transport coolant from the coolant inlet manifold 210 to the computing tiles 102. Other coolant vias 34 can transport coolant from the computing tiles to the coolant outlet manifold 212.

[0070] The power layer 302, the ground layer 304, the insulating layer 316, the power connector 306, and the ground connector 308 may form a busbar structure, such as the busbar structure 104 described with respect to FIG. 1A . The busbar structure may provide structural and power support for the computing tile 102. For example, the power layer 302, the ground layer 304, and the insulating layer 316 may be joined to form a rigid body. The power connector 306 may electrically couple the computing tile 102 to the power layer 302, and the ground connector may electrically couple the computing tile 102 to the ground layer. The power connector 306 and the ground connector 308 may also provide a physical connection, physically connecting the computing tile 102 to the busbar structure. Thus, the computing tile 102 may be physically and electrically coupled to the busbar structure with a single connecting operation.

[0071] The integrated coolant inlet manifold 310, the integrated coolant outlet manifold 312, and the coolant vias 314 can be incorporated into the busbar structure. The integrated coolant inlet manifold 310 can be disposed between layers of the busbar structure. The integrated coolant outlet manifold 312 can be disposed between layers of the busbar structure. Thus, the busbar structure of FIG. 3A can provide structural support for the computing tiles, power delivery for the computing tiles, and coolant delivery and discharge for the computing tiles. The integrated coolant inlet manifold 310 and the integrated coolant outlet manifold 312 can provide cooling for the busbar structure. In some embodiments, the busbar structure can include a temperature monitoring grid that monitors the temperature distribution across the busbar structure. For example, the busbar structure can include one or more thermocouples, resistance temperature detectors (RTDs), thermistors, semiconductor-based integrated circuits, etc., or any suitable combination thereof, that monitor the temperature distribution across the busbar structure.

[0072] 3A shows an integrated coolant inlet manifold 310 housed in the power layer 302 and an integrated coolant outlet manifold 312 housed in the ground layer 304. In some embodiments, the integrated coolant inlet manifold 310 and / or the integrated coolant outlet manifold 312 are incorporated into other portions of the busbar structure. For example, the integrated coolant inlet manifold 310 and the integrated coolant outlet manifold 312 can be housed in a single layer, such as the power layer 302, in one or more of the insulation layers 316, or as additional layers of the busbar structure.

[0073] In some embodiments, the computing tile 102 includes built-in coolant connections, such as the inlet port 612 and outlet port 614 described with respect to FIG. 6C . The computing tile 102 can be physically coupled to the busbar structure via the power connector 306, the ground connector 308, and the coolant vias 314, and can be electrically coupled to the busbar structure via the power connector 306, the ground connector 308. Thus, the computing tile 102 can be physically and electrically coupled to the busbar structure and physically coupled to the integrated coolant inlet manifold 310 and the integrated coolant outlet manifold 312 in a single connecting operation.

[0074] FIG. 3B is a schematic diagram of a cross section of an exemplary system tray 330. Features of the system tray 330 are not necessarily shown to scale. In addition to the components of the system tray 300 of FIG. 3A, the system tray 330 may also include a local power reservoir 332. The local power reservoir 332 may be an energy storage device, such as a battery, an electrical capacitor, or the like, or any suitable combination thereof, that can provide power to the system tray 330. For example, the local power reservoir 332 may provide an additional or alternative power source to the computing tile 102. The local power reservoir 332 may be connected directly to the computing tile 102 using the power connector 306 and the ground connector 308, and / or may be connected to the power layer 302 and the ground layer 304.

[0075] 4 is a top view of an exemplary busbar structure 104 according to one embodiment. The busbar structure 104 may include a stepped edge 106 and a handle 110 as described with reference to FIG. 1A. The busbar structure 104 may also include a tile power connector 292 as described with reference to FIGS. 2C-2E.

[0076] As described above, the busbar structure 104 may include multiple layers that provide structural support and power to the computing tiles 102. The layers may include, for example, the various layers described with respect to Figures 2A and 3A. Tile power connectors 292 may connect each computing tile 102 to the power and ground layers of the busbar structure 104. In some embodiments, the busbar structure 104 may include integrated manifolds that distribute coolant to the computing tiles, such as the integrated coolant inlet manifold 310 and the integrated coolant outlet manifold 312, as described with reference to Figure 3A.

[0077] Each tile power connector 292 includes a power connector 406 and a ground connector 408. The power connector 406 can correspond to the power connector 206 and / or the power connector 306, as described with reference to Figures 2A and 3A. Similarly, the ground connector 408 can correspond to the ground connector 208 and / or the ground connector 308, as described with reference to Figures 2A and 3A. Although Figure 4 shows each tile power connector 292 including four power connectors 406 and four ground connectors 408, more or fewer power connectors 406 and / or ground connectors 408 can be used. The tile power connectors 292 are described in more detail with respect to Figures 5A-5B below.

[0078] 5A-5B are schematic diagrams of a tile power connector, such as tile power connector 292, according to one embodiment. FIG. 5A is a schematic diagram of a top view of tile power connector 500. FIG. 5B is a schematic diagram of a cross section of tile power connector 500. Various features of tile power connector 500 are not necessarily drawn to scale in FIGS. 5A and / or 5B. The busbar structure with tile connector 500 may implement integral fusion. Power connector 500 includes a device ground connector 502, a device power connector 504, a busbar ground layer 510, and a busbar power layer 512. Device ground connector 502 and / or device ground connector 504 may be, for example, pins. For illustrative purposes, tile footprint 506 provides an exemplary footprint of a computing tile 102 compared to tile power connector 500.

[0079] The device ground connector 502 may be a pin of the computing tile 102 that extends into the busbar ground layer 510. The device power connector 504 may be a pin of the computing tile 102 that extends into the busbar power layer 512. When the device ground connector 502 is inserted into the busbar ground layer 510 and the device power connector 504 is inserted into the busbar power layer 512, a power circuit is established and power is delivered to the computing tile 102.

[0080] The busbar power layer 512 and the busbar ground layer 510 each include built-in sections with thinner conductor cross-sections that can limit the current deliverable to the computing tiles 102 to protect them from surge currents. The tile power connector 500 can be implemented without electrical fuses built into the busbars.

[0081] 5C is a schematic diagram of a top view of a tile power connector 550, such as tile power connector 292, according to one embodiment. In addition to the components of the tile power connector 500 of FIG. 5B, the tile power connector 550 may also include an electrical fuse 552. In some embodiments, the electrical fuse 552 may be incorporated into the busbar, such as part of the busbar power layer 512. In some embodiments, one or more other electrical fuses may be external to the busbar. In some embodiments, the electrical fuse 552 may include a current sensing component and output one or more signals related to a current exceeding a threshold.

[0082] FIG. 6A illustrates a processing system 10 according to an aspect of the present disclosure. FIG. 6B illustrates a system-on-wafer (SoW) 14 of the processing system 10 according to an aspect of the present disclosure. In some embodiments, the processing system 10 corresponds to the computing tile 102 of FIG. 1A and / or any other suitable computing tile disclosed herein. The processing system 10 can have a high computational density, and heat dissipation generated by the processing system 10 can significantly affect the performance of the processing system 10. The processing system 10 can be used and / or specifically configured for applications requiring high-performance computing and / or large computational power, such as neural network training and / or processing, machine learning, artificial intelligence, etc. The processing system 10 can implement redundancy. In some applications, the processing system 10 can be used for neural network training, such as generating data used by a vehicle (e.g., automobile) autopilot system, implementing other autonomous vehicle functions, or implementing advanced driver assistance system (ADAS) functions.

[0083] The processing system 10 may include a heat dissipation structure 12, an SoW 14, an input / output (I / O) frame 15, a voltage regulation module (VRM), a cooling system 18, a control board, etc. In the processing system 10, the thermal system includes the heat dissipation structure 12 and the cooling system 18. Each of the illustrated elements of the processing system 10 is an SoW assembly structure. Figure 6A shows the processing system 10 upside down with respect to the system tray 100 shown in Figure 1A.

[0084] The heat dissipation structure 12 can dissipate heat from the SoW 14. The heat dissipation structure 12 can include a heat spreader. Such a heat spreader can include a metal plate. Alternatively or additionally, the heat dissipation structure 12 can include a heat sink. The heat dissipation structure 12 can include any suitable material having desirable heat dissipation properties. A thermal interface material can be included between the heat dissipation structure 12 and the SoW 14 to reduce and / or minimize heat transfer resistance.

[0085] In FIG. 6A, the processing system 10 includes an SoW 14 disposed between the heat dissipation structure 12 and the cooling system 18. As shown in FIG. 6B, the SoW 14 can include an array of integrated circuit (IC) dies 22. The IC dies 22 can be embedded in a molding compound. The SoW 14 can have a high computational density. The IC dies 22 can be semiconductor dies, such as silicon dies. The array of IC dies 22 can include any suitable number of IC dies 22. For example, the array of IC dies 22 can include 16 IC dies 22, 25 IC dies 22, 36 IC dies 22, or 49 IC dies 22. The SoW 14 can be, for example, an integrated fan-out (InFO) wafer. The InFO wafer can include multiple routing layers on the array of IC dies 22. For example, the InFO wafer can include 4, 5, 6, 8, or 10 routing layers in certain applications. The routing layers of the InFO wafer can provide signal connectivity between the IC dies 22 and / or to external components. The SoW 14 may have a relatively large diameter, such as a diameter in the range of 10 inches to 15 inches. As an example, the SoW 14 may have a diameter of 12 inches.

[0086] I / O frame 15 may contribute to the structural integrity of processing system 10. I / O frame 15 may provide support to the VRM and hold the VRM in place.

[0087] The VRMs may be arranged such that each VRM is stacked on an IC die 22 of the SoW 14. In the processing system 10, there is a high density packing of VRMs. Therefore, the VRMs may consume significant power and generate heat. They are configured to receive a direct current (DC) supply voltage and provide a lower output voltage to a corresponding IC die 22 of the SoW 14. The VRMs may be connected to a bus bar structure, such as bus bar structure 104, to provide the supply voltage to the VRMs.

[0088] The cooling system 18 can provide active cooling to the VRM and the SoW 22. The cooling system 18 can receive coolant from a coolant inlet manifold. The cooling system 18 can discharge coolant to a coolant output manifold. The cooling system 18 can provide active cooling to the control panel. The cooling system 18 can include a metal having flow passages through which a heat transfer fluid, such as a coolant, flows. In the assembled processing system 10, the cooling system 18 can be bolted to the heat dissipation structure 12, which can provide structural support for the SoW 14 and / or reduce the likelihood of damage to the SoW 14. A thermal interface material can be included between the cooling system 18 and the control panel to reduce and / or minimize heat transfer resistance.

[0089] The control board can include electrical components. The control board electronics can provide control signals for the VRM. The control board can include electronics that control the operation of the SoW 14.

[0090] 6C is a perspective view illustrating a portion 600 of a processing system 10 according to an embodiment of the present disclosure. The portion 600 of the processing system 10 illustrates a cold plate 610, a power connector pin 606, and a ground connector pin 604. The cold plate 610 can implement, for example, the cooling system 18 of FIG. 6A.

[0091] The cold plate 610 may include various inlet ports, such as an inlet port 612, an inlet manifold, mechanical supports, flow paths, fins, an outlet manifold, and outlet ports, such as an outlet port 614. The cold plate 610 may also include openings (also called receptacles or slots) for feed-through connectors, such as a power connector pin 606 and a ground connector pin 604, that provide thermal, electrical, and / or communication connections through the cold plate 610. In some implementations, the cold plate may be formed of brazed machined copper parts. The cold plate body may be formed of any other suitable material. The cold plate body may include an array of cooling elements, such as fins.

[0092] The cold plate 610 can facilitate active cooling of the processing system 10 with coolant. The cold plate 610 can receive coolant from a coolant inlet manifold of the system tray at an inlet port 612 to the cold plate 610, distribute the coolant through channels in the cold plate 610 to cool the processing system 10, and discharge the coolant through an outlet port 614 to a coolant outlet manifold of the system tray.

[0093] In some embodiments, the power connector pins 606 and the ground connector pins 604 correspond to the instrument power connector 504 and the instrument ground connector 502 described with reference to Figures 5A-5B. As shown in Figure 6C, the power connector pins 606, the ground connector pins 604, the inlet port 612, and the outlet port 614 are located on the same side of the processing system 10. Thus, structural, electrical, and coolant connections can be established in the same connecting operation. For example, the processing system 10 can be physically and electrically coupled to a bus bar structure and physically coupled to an integrated coolant inlet manifold and an integrated coolant outlet manifold within the bus bar structure in a single connecting operation. The bus bar structure can include surfaces having power, ground, and coolant pathway connections to facilitate such connections.

[0094] FIG. 7 illustrates a connection pin 702 and a connection receptacle 704 according to one embodiment. The connection pin 702 can be inserted into the connection receptacle 704 to establish an electrical and physical coupling between the connection pin 702 and the connection receptacle 704. In some embodiments, the connection pin 702 corresponds to the device ground connector 502 and the device power connector 504 described with reference to FIGS. 5A-5B . However, any other suitable components may be used in place of the connection pin 702. In some embodiments, the connection receptacle 704 is integrated into a bus bar structure, such as the power connector 406 and the ground connector 408 of the bus bar structure 104 of FIG. 4 . However, any other suitable components may be used in place of the connection receptacle 704.

[0095] In some embodiments, the connection pins 702 and / or the connection receptacles 704 may include built-in electrical fuses, which may help regulate the amount of electrical current that can travel through the connection pins 702 and / or the connection receptacles 704.

[0096] Unless the context clearly dictates otherwise, throughout the specification and claims, words such as "comprise," "comprising," "include," "including," and the like, should be construed in an inclusive sense, i.e., "including, but not limited to," as opposed to an exclusive or exhaustive sense. The word "coupled," as generally used herein, refers to two or more elements that are directly connected or may be connected by one or more intermediate elements. Similarly, the term "connected," as generally used herein, refers to two or more elements that are directly connected or may be connected by one or more intermediate elements. Furthermore, the words "herein," "above," "below," and words of similar import, when used in this application, shall refer to this application as a whole and not to particular portions of this application. Where the context permits, words in the above Detailed Description using singular or plural number may also include plural or singular number, respectively. The word "or" in reference to a list of two or more items encompasses all of the following interpretations of that word: any of the items in the list, all of the items in the list, and any combination of the items in the list.

[0097] Additionally, conditional language used herein, particularly "can," "could," "might," "may," "eg," "for example," "such as," and the like, unless expressly stated otherwise or understood otherwise within the context in which it is used, is generally intended to convey that certain embodiments include certain features, elements, and / or conditions, while other embodiments do not. Thus, such conditional language is generally not intended to imply that features, elements, and / or conditions are in some way required for one or more embodiments.

[0098] The above description has been given with reference to specific embodiments. However, the above illustrative description is not intended to be exhaustive or to limit the invention to the precise form described. Many modifications and variations are possible in light of the above teachings. This will enable those skilled in the art to best utilize the techniques and various embodiments with various modifications suitable for various applications.

[0099] Although the present disclosure and examples have been described with reference to the accompanying drawings, various changes and modifications will become apparent to those skilled in the art, and such changes and modifications should be understood to be included within the scope of the present disclosure.

Claims

1. a plurality of computing tiles, each computing tile of the plurality of computing tiles comprising a plurality of dies and a cooling solution integrated with the plurality of dies; a bus bar on which the plurality of computing tiles are disposed, the bus bar configured to provide structural support for and power to the plurality of computing tiles; A computing system comprising:

2. The bus bar is a power layer; a ground layer, the power layer and the ground layer being electrically connected to each computing tile of the plurality of computing tiles; a plurality of insulating layers; the computing system, a first plurality of connectors electrically coupling the plurality of computing tiles to the power layer of the bus bar; The computing system of claim 1 , further comprising: a second plurality of connectors electrically coupling the plurality of computing tiles to the ground layer of the bus bar.

3. The bus bar is an integrated inlet manifold configured to deliver coolant to each of the plurality of computing tiles; an integrated outlet manifold configured to receive the coolant from each of the plurality of computing tiles; The computing system of claim 2 , wherein the integrated inlet manifold and the integrated outlet manifold are each disposed between layers of the bus bars.

4. 10. The computing system of claim 1, wherein the bus bars comprise stepped edges dimensioned to slide into a cabinet structure and engage side rails of the cabinet structure.

5. The computing system of claim 1 , wherein each computing tile of the plurality of computing tiles comprises a system-on-wafer (SoW) comprising the plurality of dies.

6. 10. The computing system of claim 1, wherein the cooling solution comprises a cold plate, the cold plate comprising an inlet port configured to receive a coolant and an outlet port configured to exhaust the coolant.

7. The bus bar is an integrated inlet manifold configured to deliver the coolant to the inlet ports of each of the plurality of computing tiles; an integrated outlet manifold configured to receive the coolant from the outlet ports of each of the plurality of computing tiles; The computing system of claim 6 , wherein the integrated inlet manifold and the integrated outlet manifold are each disposed between layers of the bus bars.

8. an inlet manifold disposed on the busbar and configured to deliver the coolant to the inlet ports of each of the plurality of computing tiles; an outlet manifold disposed on the busbar and configured to receive the coolant from the outlet ports of each of the plurality of computing tiles; The computing system of claim 6 further comprising:

9. a first host positioned perpendicular to the busbar, the first host configured to provide data support to the plurality of computing tiles; a second plurality of computing tiles; and a second bus bar on which the second plurality of computing tiles are disposed, the second bus bar being configured to provide structural support for and power to the second plurality of computing tiles, the first host being disposed between the second bus bar and the second bus bar; a second host positioned perpendicular to the second plurality of computing tiles; a cabinet structure in which the bus bar, the second bus bar, the first host, and the second host are arranged; The computing system of claim 1 further comprising:

10. A bus bar for supporting and electrically connecting an electronic module, a power layer; A ground layer; a plurality of insulating layers; The busbar is configured to provide structural support for a plurality of electronic modules, and the busbar is configured to supply power to each electronic module of the plurality of electronic modules.

11. The busbar of claim 10 , wherein the plurality of electronic modules comprises computing tiles, each of the computing tiles comprising a plurality of dies and a cooling solution integrated with the plurality of dies.

12. an integral inlet manifold configured to supply coolant to each of said electronic modules; an integral outlet manifold configured to receive the coolant from each of the electronic modules; The busbar of claim 10 further comprising:

13. the plurality of insulating layers includes two outer insulating layers; the power layer and the ground layer are both located between the two outer insulation layers; the integral inlet manifold is disposed between the two outer insulations; the integral outlet manifold is disposed between the two outer insulation layers; The busbar of claim 12.

14. The busbar of claim 12 , wherein a surface of the busbar includes connections to both the integrated inlet manifold and the integrated outlet manifold.

15. The busbar of claim 14 , wherein the surface of the busbar further comprises a connection to the power layer and a connection to the ground layer.

16. 11. The busbar of claim 10, wherein the busbar comprises openings in areas over which the plurality of electronic modules will be positioned when the plurality of electronic modules are connected to the power and ground layers.

17. 1. A method of assembling a computing system, comprising: providing a busbar comprising a power layer, a ground layer, and a plurality of insulation layers; connecting a plurality of computing tiles to the power layer and the ground layer of the bus bar such that each computing tile of the plurality of computing tiles is positioned to receive structural support and power from the bus bar; The method, wherein each computing tile of the plurality of computing tiles comprises a plurality of dies and a cooling solution integrated into the plurality of dies.

18. 20. The method of claim 17, wherein each computing tile of the plurality of computing tiles comprises a system-on-wafer (SoW) comprising the plurality of dies.

19. The method of claim 18 , wherein the cooling solution is a cold plate, and the cold plate is integrated into the SoW.

20. 20. The method of claim 17, wherein the step of connecting each computing tile also connects each computing tile to an integrated inlet manifold and an integrated outlet manifold of the bus bar in the same operation.

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