Parallel decoding for quantum error correcting codes

A parallel decoding method using a classical computing system with a main thread and worker threads, aided by a compressed logical inversion tracking table, addresses the real-time decoding challenges of quantum error-correcting codes in quantum computers, enhancing accuracy and reducing latency and costs.

JP2025532781AActive Publication Date: 2025-10-03GOOGLE LLC
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Patent Information

Application Number
JP2025515445
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2023-06-05
Filing Date
2024-05-30
Publication Date
2025-10-03
Estimated Expiration
2044-05-30

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Abstract

The present invention relates to a method, system, and apparatus for parallel decoding of quantum error-correcting codes. In one aspect, a classical computing system is configured to perform a decoding process on measurement data received from a quantum computing system to determine quantum computation errors. The classical computing system implements a main thread, multiple worker threads, and a data structure common to each worker thread. The data structure stores data of a dynamic system of feature node clusters of a detector graph for the decoding process, the data including compressed logical inversion information of child nodes within each cluster of nodes. During execution of the decoding process, the multiple worker threads are configured to retrieve node clusters, modify node clusters, and, for each modification, update data in the data structure corresponding to the cluster under atomic primitives.
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Description

[Technical Field]

[0001] This specification relates to quantum computing. [Background technology]

[0002] Quantum computing offers a means to solve certain problems that cannot be solved in a reasonable period of time using conventional classical computers. These problems include factoring very large numbers into prime numbers and searching large unstructured data sets. Many physical systems, including ions, semiconductor spins, and superconducting circuits, are being investigated for use in quantum computing. However, these systems do not perform well enough to function directly as computational qubits. For example, a single two-state physical system that can be used as a physical qubit cannot reliably encode and retain information for a useful period of time, for example, due to noise.

[0003] Quantum error correction is a technique that allows quantum computers to reliably execute quantum algorithms despite noise affecting qubits. The decoder is a key component of a quantum error correction scheme, and its role is to identify errors faster than they can accumulate in the quantum computer. The decoder takes as input a syndrome, which is measurement data extracted from quantum parity-check measurements, and returns as output an estimate of the error. Given this estimate, the effect of the error can be reversed. The decoder needs to be implemented with minimal hardware resources in order to scale to the realm of practical applications of quantum computing. Summary of the Invention

[0004] Described herein are methods, systems, and apparatus for parallel decoding of quantum error correcting codes.

[0005] One innovative aspect of the subject matter described herein can be implemented in a classical computing system configured to perform a decoding process on measurement data received from a quantum computing system to determine errors in quantum computations performed by the quantum computing system, the classical computing system implementing a main thread, a plurality of worker threads, and a data structure common to each of the plurality of worker threads, the data structure storing data of a dynamical system of disjoint node clusters of a detector graph for the decoding process, each node cluster having a root node with no ascending nodes and one or more descending child nodes, the child nodes including leaf nodes with no descending nodes or one or more descending child nodes, the data storing compressed logical flip information of the child nodes in each node cluster. During execution of the decoding process, each of the plurality of worker threads, in parallel with each of the other worker threads, obtains from the main thread one or more node clusters in the detector graph, each node cluster including one or more detection events in the measurement data, and executes the decoding process to modify the one or more node clusters, and for each modification of a cluster, the worker thread is configured to update data in a data structure corresponding to the cluster under an atomic primitive.

[0006] A classical computer system can be configured to perform particular operations or actions by installing software, firmware, hardware, or a combination thereof on the system that causes the system to perform the actions during operation. One or more computer programs can be configured to perform particular operations or actions by containing instructions that, when executed by a data processing device, cause the device to perform the actions.

[0007] Each of these and other embodiments can optionally include one or more of the following features, alone or in combination: In some embodiments, the data structure stores, in the root node of each node cluster, data specifying one or more of a node type designator, a parity of detected events in the node cluster, a total size of the node cluster, a boundary node of the node cluster, a minimum time coordinate, and a maximum time coordinate.

[0008] In some implementations, the classical computing system further includes one or more memory regions external to the data structure, each memory region storing a boundary map for each node cluster.

[0009] In some implementations, data objects in a memory region are stored based on conservation rules, and before a push update adds data to an object associated with a root node, the data of the data object is popped off from the memory of the child node based on conservation rules.

[0010] In some implementations, the compressed logical inversion information of the child nodes included in each node cluster is stored in the child nodes.

[0011] In some implementations, the compressed logical inversion information of a child node includes the parity of the logical inversion along the decoding graph path from the child node to its parent node, and the compressed logical inversion information is used together with the cluster parity information to determine the parity inversion applied to the logical observable upon merging of two clusters.

[0012] In some implementations, the classical computing system is further configured to recover a decoded output of the decoding process, the decoding process including using the data in the data structure to compute, for each node in the detector graph associated with the detection event, a net logical inversion on the node's path to a respective root node, and computing a sum parity of the net logical inversions.

[0013] In some implementations, the decoding process includes a Union-Find or minimum weight perfect matching (MWPM) decoding process.

[0014] In some embodiments, the data structure is lock-free.

[0015] In some implementations, the atomic primitive includes a compare-and-swap atomic primitive or an atomic pool allocator with reference counting.

[0016] In some implementations, data updates in the data structure corresponding to each change in a cluster are packed into a single word, and optionally, the single word includes a pointer to the external atomic data.

[0017] In some implementations, during the decoding process, a main thread is configured to identify detection events in the measurement data, and for each detection event, seed a node cluster having non-zero parity in the detector graph, place the seeded node cluster in a central list structure, and multiple worker threads are configured to retrieve each node cluster from the central list structure.

[0018] Another innovative aspect of the subject matter described herein can be implemented in a system that combines a classical computing system of the above-described aspects with a quantum computing system, where the classical computing system is configured to receive measurement data from the quantum computing system and determine errors in quantum computations performed by the quantum computing system.

[0019] Another innovative aspect of the subject matter described herein can be implemented in a method for performing a decoding process on measurement data received from a quantum computing system to determine errors in quantum computations performed by the quantum computing system. The method may include instantiating a data structure common to each worker thread of a plurality of worker threads, the data structure storing data of a dynamic system of feature node clusters of a detector graph for a decoding process, each node cluster including a root node with no ascending nodes and one or more descending child nodes, the child nodes including either leaf nodes with no descending nodes or one or more descending child nodes, the data including compressed logical inversion information of the child nodes of each node cluster; acquiring, for each worker thread of the plurality of worker threads, and in parallel with each of the other worker threads, from a main thread, one or more of the node clusters, each acquired cluster including one or more detection events in measurement data; executing a decoding process on the detector graph to modify the acquired one or more node clusters, including, for each cluster modification, updating data in the data structure corresponding to the cluster under an atomic primitive; and recovering a decoded output of the decoding process using the updated data in the data structure.

[0020] According to yet a further innovative aspect of the subject matter described herein, there is provided a method for determining quantum computing errors, the method including performing one or more measurements at a quantum computing system performing quantum computing to generate measurement data, receiving the measurement data from the quantum computing system at a classical computing system, and performing the method described in the preceding paragraph at the classical computing system.

[0021] Other implementations of these aspects include corresponding computer systems, devices, and computer programs recorded on one or more computer storage devices, each configured to perform the actions of the methods. One or more classical computer systems can be configured to perform particular operations or actions by installing software, firmware, hardware, or a combination thereof on the system that causes the system to perform the actions during operation. One or more computer programs can be configured to perform particular operations or actions by including instructions that, when executed by a data processing device, cause the device to perform the actions.

[0022] The above and other embodiments may each include one or more of the following features, alone or in combination: In some embodiments, recovering the decoded output of the decoding process using the data in the data structure includes, for each node in the detector graph associated with the detection event, computing a net logical inversion on the node's respective path to a root node, and computing a sum parity of the net logical inversions.

[0023] In some embodiments, the data structure stores data in the root node of each node cluster that specifies one or more of a node type designator, a parity of detected events in the node cluster, a total size of the node cluster, a boundary node of the node cluster, a minimum time coordinate, and a maximum time coordinate.

[0024] In some embodiments, the compressed logical inversion information of a child node includes a parity inversion applied to a logical observable by an operator with a zero bound that includes the child node and the parent node in the corresponding graph tree.

[0025] In some implementations, the decoding process includes a joint search or minimum weight exact matching decoding process.

[0026] In some implementations, the atomic primitives include a compare-and-exchange atomic primitive or an atomic pool allocator with reference counting.

[0027] In some implementations, updating the data in the data structure corresponding to each change in the cluster includes packing the updates into a single word, optionally the single word including a pointer to the external atomic data.

[0028] In some embodiments, the method includes identifying, by a main thread, detection events in the measurement data; seeding, by the main thread, a node cluster having non-zero parity in the detector graph for each detection event; and placing the node clusters seeded by the main thread into a central list structure, wherein multiple worker threads retrieve and place each node's cluster from the central list structure.

[0029] The subject matter described herein can be implemented in a particular manner to realize one or more of the following advantages.

[0030] A challenging subproblem that arises when implementing quantum error correction is real-time decoding of quantum error-correcting codes. In real-time decoding, a classical algorithm called a decoder processes a stream of classical bits from a quantum computer and outputs a real-time prediction about the logical state of the quantum algorithm executed by the quantum computer. It can be challenging for a decoder to meet the high-throughput and low-latency requirements of real-time decoding while maintaining sufficient accuracy. Ideally, the decoder should process the stream of classical bits fast enough to keep pace with the clock rate of the quantum computer. For example, a surface-code superconducting quantum computer with one million physical qubits can generate measurement data at a rate of approximately one terabit per second. To prevent a data backlog, which grows exponentially with the depth of the computational T-gates, this data needs to be processed by the decoder at least as fast as it is generated. Furthermore, decoder latency (the time it takes for decoding to complete after the last measurement) must be minimized, as longer latency reduces the quantum computer's logical clock rate.

[0031] This disclosure addresses this problem and provides a method for parallelizing the execution of accurate decoders for a large class of useful and practical topological quantum error-correcting codes, including surface codes. Multiple workers decode measurement data in parallel, tracking the global state of the decoder in an atomic data structure, referred to herein as a compressed logical inversion tracking table. Thus, unlike conventional techniques that partition a space-time region of a detector graph to be processed in parallel by multiple worker threads, for example, no final adjustment step at the end of the decoding is required. Thus, the decoding process is faster and has lower latency than conventional techniques.

[0032] Furthermore, the techniques described herein do not require any special-purpose hardware and can be implemented using relatively inexpensive CPUs, thereby reducing the costs associated with decoding and improving the performance of future quantum data centers and the like.

[0033] The details of one or more embodiments of the subject matter described herein are set forth in the accompanying drawings and the description below. Other features, aspects, and advantages of the subject matter will become apparent from the description, drawings, and claims. [Brief explanation of the drawings]

[0034] [Figure 1] FIG. 1 is a block diagram of an exemplary computing system for implementing quantum error correcting codes in parallel. [Figure 2] FIG. 2 is a block diagram of an exemplary classical processor decoder. [Figure 3] FIG. 10 is a schematic block diagram of the data stored in a compressed logical inversion tracking table for a particular node cluster in a detector graph. [Figure 4] FIG. 1 is a schematic block diagram of a tree of nodes contained in a forest containing a compressed logical inversion tracking table. [Figure 5] 1 is a flowchart of an exemplary process for performing a decoding process on measurement data received from a quantum computing system to determine errors in quantum computations performed by the quantum computing system. DETAILED DESCRIPTION OF THE INVENTION

[0035] Like reference numbers and designations in the various drawings indicate like elements.

[0036] This specification describes techniques for parallel decoding of measurement data obtained from a quantum computer implementing quantum error-correcting codes. The measurement data may indicate the physical state of a quantum computing system. For example, the measurement data may indicate the state of one or more qubits in the quantum computing system. The decoder implements a main thread and multiple worker threads. The main thread provides multiple worker threads with their respective clusters in a detector graph. The worker threads process their respective clusters in parallel and largely independently, requiring coordination only when two or more clusters grow and connect to each other. The decoder maintains atomic data structures that track the decoder's global state to properly coordinate cluster growth across threads and maintain thread safety.

[0037] 1 is a block diagram of an exemplary computing system 100 for parallel execution of quantum error correcting codes. The exemplary computing system 100 is an example of a system in which the systems, components, and techniques described herein may be implemented as classical and quantum computer programs on one or more classical and quantum computing devices at one or more locations.

[0038] Exemplary computing system 100 includes quantum computing device 102 and classical processor 104. For illustrative purposes, quantum computing device 102 and classical processor 104 are shown in FIG. 1 as separate entities, however, in some implementations, classical processor 104 may be included within quantum computing device 102. For example, in some implementations, quantum computing device 102 may be directly connected to classical processor 104. In other implementations, quantum computing device 102 may be connected to classical processor 104 via a network, such as a local area network (LAN), a wide area network (WAN), the Internet, or a combination thereof.

[0039] The quantum computing device 102 includes components for performing quantum computations, such as physical qubits. For example, the quantum computing device 102 may include a quantum data plane including multiple physical qubits, a control and measurement plane configured to perform operations and measurements on the physical qubits, a control processor plane configured to determine the sequence of operations and measurements required for the quantum algorithm executed by the quantum computing system, and a classical computer in data communication with the control processor to facilitate user interaction and network or storage access. The specific type of quantum computing device 102 may depend on the type of qubits used. In some implementations, the qubits may be superconducting qubits, semiconductor qubits, optical qubits, or atom-based qubits. For example, the qubits may include Xmon qubits, flux qubits, phase qubits, CAT qubits, or qubits with frequency interactions.

[0040] Quantum computations performed by quantum computing device 102 are typically noisy due to inevitable errors caused by, for example, unwanted interactions between qubits, unwanted interactions with the environment (causing decoherence), faulty quantum gates or operations, or errors in the state preparation or measurement process. Example error types include coherent errors acting on a single qubit, such as Pauli X-type errors, also known as bit-flip errors, which map the qubit's ground states to X|0〉=|1〉 and X|1〉=|0〉, and Pauli Z-type errors, also known as phase-flip errors, which map the qubit's ground states to Z|0〉=|0〉 and Z|1〉=-|1〉. Noise in quantum computing devices can be represented by error models, such as the independent error model described in more detail below. If left unchecked, errors can corrupt quantum information and render quantum computations performed by quantum computing device 102 useless.

[0041] Thus, quantum computing device 102 can be configured to execute quantum error correcting codes 106 when performing quantum computations. A quantum error correcting code encodes a first number k of qubits (in a Hilbert space of dimension 2k) into a second number n of qubits (in a Hilbert space of dimension 2n), where the second number is greater than the first number, i.e., n>k. The k qubits are data qubits that store logical information and are to be protected from errors. The additional n k qubits are ancilla qubits used to detect errors. Exemplary quantum error correcting codes include stabilizer codes, e.g., surface codes 108.

[0042] The surface code 108 encodes logical qubits into patches of physical qubits on a lattice, e.g., a square or hexagonal grid. The lattice includes alternating data qubits and ancilla qubits, with qubits located at each edge of the lattice. The code is expressed by the Hamiltonian H=-Σ v∈V X v -Σ f∈F Z f where V represents the vertices of the lattice, F represents the faces defined by the edges connecting the vertices of the lattice, and the operator X v is the product of the Pauli X matrices associated with a vertex v and acting on the edges incident to v, and the operator Z f is associated with a face f and is the product of the Pauli Z matrices acting on all edges of f. The sign space is the operator X v and Z f These operators (or products of these operators) are called the stabilizers of the code. If an error affects a qubit of the code, any stabilizer that commutates back with the error will return a measurement of -1. The subset of vertices with measurements of -1 is called the syndrome σ. The syndrome σ, when applied to the code, can be used to determine a correction operator that will correct the error back to the stabilizer.

[0043] During execution of the quantum error correcting code 106, the quantum computing device 102 is configured to provide measurement data 110 to the classical processor 104. The measurement data 110 may be received as a batch of data or a data stream. The measurement data 110 includes, for example, classical measurement bits corresponding to stabilizer measurements. In this disclosure, the detector is the parity of the measurement bits, which is deterministic in the absence of errors. The result of the detector measurement is 1 if the observed parity differs from the expected parity of a noise-free calculation, and 0 otherwise. A Pauli-type error P is said to flip a detector D if the inclusion of P in the circuit changes the result of D, and a detected event is a detector with a result of 1. A logical observable is a linear combination of the measurement bits, the result of which corresponds to the measurement of a logical Pauli operator.

[0044] The classical processor 104 includes components for performing classical computations. For example, the classical processor 104 may be implemented as one or more computer programs, i.e., one or more modules of computer program instructions, encoded on a tangible, non-transitory storage medium that are executed by or control the operation of the data processing device. The computer storage medium may be a machine-readable storage device, a machine-readable storage substrate, a random-access or serial-access memory device, or one or more combinations thereof.

[0045] Classical processor 104 implements decoder 112, which is configured to process measurement data 110 received from quantum computing device 102 to decode the measurement data, i.e., to predict which errors may have occurred during the quantum computation performed by quantum computing device 102. To process measurement data 110, decoder 104 is configured to execute a decoding algorithm 114 (also referred to herein as a decoding process) that uses a graph-like error model for quantum error-correcting code 106 to map the decoding problem to a graph problem.

[0046] A graph-like error model is a set of independent error models, i.e., m independent error mechanisms, where error mechanism i has probability p[i] (where p∈R m is a prior vector), flipping a set of detectors and observables. In a graph-like error model, each error mechanism flips at most two detectors. The graph-like error model can be used to approximate the common noise model for many important classes of quantum error-correcting codes, including surface codes, where both X-type and Z-type Pauli errors are graph-like.

[0047] A graph-like error model is represented by a detector graph of nodes and edges G = (V, E), e.g., detector graph 116. Each node v∈V in the detector graph corresponds to a detector. Each edge e∈E is a set of cardinality-1 or -2 detector nodes and represents an error mechanism that inverts this set of detector nodes. The set of edges E can be decomposed as E = E1 ∪ E2, where |e| = 1 if each edge belongs to E1, and |e| = 2 if each edge e belongs to E2. A regular edge e = (u,v)∈E2 inverts a pair of detectors u,v∈V, and a half-edge (u,)∈E1 inverts a single detector u∈V. A half-edge may be connected to the border of the detector graph, in which case the edge (u,v b ), where v b are virtual border nodes (not corresponding to any detector). In some implementations, when the graph problem is solved using, for example, minimum weight perfect matching, each edge is assigned a weight, e.g., w(e i )=loglog(1-p[i]) / p[i]. Each edge can also be labeled with a set of logical observables that are inverted by the error mechanism, which is e i =(u,,v)∈E, then l(e i ) or l(u,v). The distance D(u,v) between two nodes u and v in the detector graph is equal to the length of the shortest path between them.

[0048] Exemplary decoding algorithms include minimum weight perfect matching (MWPM) and joint search. The MWPM decoding process determines the most likely physical error that matches the syndrome of the measurement data. Detected events in the measurement data are identified and labeled in a detector graph. Next, a minimum weight embedded matching of the detected events in the detector graph is determined, where the embedded matching of a set of detected events is an edge set in the detector graph, where each node corresponding to a detected event in the set of detected events is connected to an odd-numbered edge in the edge set, and each node not corresponding to a detected event in the set of detected events is connected to an even-numbered edge in the edge set. In a conventional implementation of the MWPM decoding process, Edmond's Blossom algorithm is used to determine the embedded matching, e.g., by using the detected events to seed node clusters in the detector graph and growing, shrinking, or freezing the clusters until a minimum weight embedded matching is obtained. The embedded matching is used to determine a prediction of which logical observables have been inverted, which can then be used to determine a correction operator that corrects the error when applied to the quantum error correcting code 106.

[0049] The joint search decoding process can be considered an approximation of the minimum weight perfect matching decoding process. The joint search decoding process identifies detection events in the measurement data and uses the detection events to seed clusters of nodes in a detector graph. The clusters are then iteratively grown in the detector graph until the parity of the cluster changes. A so-called peeling step is then performed. A spanning tree for each grown cluster is generated, and an error estimate is calculated by traversing the spanning tree in reverse order. A correction operator that corrects the error when applied to the quantum error correcting code 106 is then determined.

[0050] 1 , the decoder 112 implements a main thread 202, multiple worker threads 204, and a compressed logical inversion tracking table 206. The main thread 202 is configured to manage the multiple worker threads 204 and coordinate the execution of the decoding algorithm 114. The main thread 202 is configured to receive measurement data 110 from the quantum computing device 102 and generate a detector graph for the measurement data. The main thread 202 uses detection events in the measurement data to seed node clusters with non-zero parity in the detector graph and places the seeded clusters in a central list structure.

[0051] Each of the multiple worker threads 204 is configured to draw a seeded cluster from the central list structure. Each of the multiple workers 204 then modifies those seeded clusters in accordance with the decoding algorithm 114, e.g., to grow by adding some or all nodes from the cluster boundary in accordance with cluster growth rules, to shrink, or to freeze, etc. Each worker thread is configured to modify its cluster in parallel and independently of one another, only needing coordination when two or more clusters grow and connect to one another.

[0052] The multiple workers 204 are configured to modify the seeded clusters while tracking the global state of the decoder 112 in an atomic data structure referred to herein as a compressed logical inversion tracking table 206. Therefore, unlike conventional techniques that partition a spatiotemporal region of the detector graph to be processed in parallel by multiple worker threads, for example, a final adjustment step at the end of the decoding algorithm 114 is not required. Note that in these conventional parallelizations of finite decoders, the final adjustment step is necessary because the finite decoding algorithm is designed to operate on the entire decoding graph, while the parallel version can access only a limited spatiotemporal region (or block) of the decoding graph. The final adjustment step requires cross-referencing the solutions within each block to find and resolve discrepancies. Cross-referencing may include, for example, determining whether a predicted error in one block matches a predicted error in another block. The difficulty / overhead of the final adjustment cross-referencing may increase with block size or may remain constant. In either case, to maintain bounded delay, the number of blocks must increase with the number of rounds of syndrome extraction, and therefore the amount of work done during this final adjustment step must also increase (with the number of blocks). In such conventional parallel decoders, simply ignoring this additional adjustment step at the end of decoding generally results in an output that differs from the decoding algorithm of the underlying single-threaded decoder and fails to suppress errors to the maximum extent possible for the selected code distance. In contrast, the decoding algorithm introduced herein does not require a final adjustment step because it tracks decoding predictions and cross-references to resolve discrepancies between worker threads incrementally during decoding. Incrementally tracking net logic inversions is not the same as a final adjustment step because it is performed incrementally during decoding, rather than after decoding is complete. Therefore, it does not contribute to decoder delay. Exemplary operations performed by components of decoder 112 are described in more detail below with reference to FIGS. 2-5.

[0053] After the decoder 112 completes the decoding algorithm 114, the classical processor 104 is configured to output a correction operator 118. The correction operator 118 can be applied to the quantum error correcting code 106 to correct errors identified by the decoder 112.

[0054] 2 is a block diagram 200 of an exemplary classical processor decoder 112. The decoder 112 may be implemented as one or more computer programs, i.e., one or more modules of computer program instructions, encoded on a tangible, non-transitory storage medium for execution by or control the operation of a data processing apparatus. The computer storage medium may be a machine-readable storage device, a machine-readable storage substrate, a random-access or serial-access memory device, or one or more combinations thereof.

[0055] As described above with reference to Figure 1, the decoder 112 implements a main thread 202, multiple worker threads 204a-d, and a compressed logical inversion tracking table 206. For convenience, the example decoder 112 shown in Figure 2 includes four worker threads 204a-d, although in some implementations, the decoder 112 may include a different, e.g., greater, number of worker threads. The components of the decoder 112 may be connected via a network accessible via wired and / or wireless communication links, e.g., a local area network (LAN), a wide area network (WLAN), the Internet, or a combination thereof.

[0056] As described above with reference to FIG. 1, main thread 202 is configured to manage multiple worker threads 204a-d and coordinate the execution of the decoding process. Main thread 202 is configured to receive measurement data from a quantum computing device and generate a detector graph for the measurement data. Main thread 202 identifies detection events in the measurement data (e.g., caused by noise involving hardware qubits of the quantum computing device) and uses the detection events to seed node clusters having non-zero parity in the detector graph. Main thread 202 is configured to place the seeded clusters in a central list structure 212.

[0057] Each worker thread of the plurality of worker threads 204a-d is configured to access the central list structure 212 and pull a respective seeded cluster from the central list structure 212. Each worker organizes the seeded clusters pulled from the central list structure 212 into a private sorted data structure that implements an overall job allocation strategy.

[0058] In some implementations, the job allocation strategy may be based on dividing the circular space-time buffer into regions owned by tilings of worker threads 204a-d. Alternatively, in some implementations, job allocation may be random based on the load of individual worker threads, or may be a combination of multiple heuristics. For example, in some implementations, excitation clusters that extend further back in time (clusters with non-zero parity) may be prioritized over newer clusters confined to later time windows. This job allocation strategy aims to reduce delays in real-time decoding. In some implementations, growth of excitation clusters that extend too far into the future horizontally, i.e., too close to the earliest time coordinate where not all measurements are known to the decoder, may be prohibited. In some implementations, smaller excitation cluster changes may be prioritized over larger excitation cluster changes, with the size of the cluster being determined based on either boundary size (which can be measured by the number of adjacent vertices or the number of incident edges in the graph leaving the cluster), the number of graph nodes contained in the cluster, or a combination of these quantities.

[0059] Each worker thread is configured to modify the clusters stored in its private sorted data structure according to heuristics specified by the decoding process being performed by the decoder 112. As a non-limiting example, in some implementations, the decoding process may be a joint search decoding process. In these implementations, each worker thread may grow the clusters stored in its private sorted data structure until, for example, each cluster has equal parity or fills the bounds of the detector graph. As another non-limiting example, in some implementations, the decoding process may be a minimum weight perfect matching decoding process. In these implementations, each worker thread may grow, shrink, or shatter the clusters stored in its private sorted data structure until, for example, each cluster has equal parity or fills the bounds of the detector graph.

[0060] In some implementations, one or more of the worker threads 204a-d can be configured to calculate the current cluster modification priorities of the clusters in its private sorted data structure before each modification step. The worker threads 204a-d can then determine whether the current cluster modification priorities differ from the expected modification priorities, for example, calculated in a previous modification step. If the worker thread determines that the current cluster modification priorities differ from the expected modification priorities, the worker thread can adjust the order in which the clusters are processed. Because a cluster's priority generally decreases as the cluster grows, traversing the once-sorted list of clusters and reinserting (in the correct sorted position) any clusters whose recalculated priorities do not match their previously calculated values ​​constitutes an effective iterative processing of all clusters in priority order.

[0061] The compressed logical inversion tracking table 206 is shared by the worker threads 204a-d, i.e., it is common to each worker thread. As the worker threads 204a-d execute the decoding process and modify their respective clusters, they update the data in the compressed logical inversion tracking table 206 corresponding to their respective clusters based on atomic primitives, such as a compare-and-exchange atomic primitive or an atomic pool allocator with reference counting. The atomic primitives allow each worker thread to track whether other worker threads have modified its cluster, thus achieving thread safety. Therefore, the compressed logical inversion tracking table 206 can be lock-free, avoiding the need for locks.

[0062] For example, a first worker thread may operate on a first cluster, e.g., cluster 222, and a second worker thread may operate on a second cluster, e.g., cluster 224. During the decoding process, the first worker and the second worker may grow their respective clusters such that the first cluster and the second cluster meet and are fused into one cluster 226 in the decoding process. Under atomicity primitives, the first worker thread (or the second worker thread) may determine that it should stop modifying its cluster and allow the second worker thread (or the first worker thread) to proceed with modifying the fused cluster 226. The first worker thread (or the second worker thread) may then pull the new cluster from its private sorted data structure and modify it.

[0063] Thus, the compressed logical inversion tracking table 206 tracks the dynamic system of clusters as they are seeded by the main thread 202 and modified by the worker threads 204a-d. In other words, the compressed logical inversion tracking table 206 tracks the global state 220 of the decoder 112, for example, tracking each cluster and how it has been modified during the decoding process.

[0064] The compressed logical inversion tracking table 206 stores data for each cluster included in the detector graph. During the decoding process (e.g., after the clusters are seeded and one or more modifications are made), each cluster has a root node (with no ascending nodes) and one or more descending child nodes (where the child nodes are either leaf nodes with no descending nodes or contain one or more descending child nodes). That is, each cluster is represented by a connected tree, and the entire collection of clusters in the detector graph is a forest of such trees.

[0065] The data stored in the compressed logical inversion tracking table 206 for a particular cluster includes data related to the cluster as a whole, e.g., data specifying characteristics of the cluster such as the parity of the detected events contained in the cluster, the size of the cluster, the boundary nodes of the cluster, etc. As will be described in more detail below with reference to Figures 3 and 4, this data may be stored in the root node of the cluster.

[0066] The data also includes compressed logical inversion (CLF) information for child nodes within the cluster. Each edge in the decoding graph has a bit that indicates, for each observable, whether the logical observable is inverted by the error mechanism associated with that edge. Note that the decoder (whether UF or MWPM) selects a subset of edges associated with the subset of errors it predicts have occurred. The decoding prediction is then the bitwise sum of these logical inversions across all edges selected in the subset. In the compressed logical inversion (CLF) scheme, the selected edges are partitioned among clusters, and the CLF of each child node is the bitwise sum of the logical inversions across the edge to its parent node (or zero for the root node). In MWPM decoding, the CLF bit of a node is the bitwise sum of the logical inversions along the edges to the matched node (if the node was matched). In UF decoding, the CLF bit of the root node is always 0, and the CLF information of a child node includes a parity inversion applied to the logical observable by a 0-bounded operator consisting of the node of that child node and the node of its parent node in the tree / cluster (i.e., a net inversion of parity along the edge between the child node and the parent node in the decoding graph). CLF information for multiple logical observables can be tracked in parallel and incrementally updated during decoding. Furthermore, the CLF can be used along with the net parity of each cluster during decoding to incrementally track the net predicted inversion(s) of the logical observable(s). As described in more detail below with reference to Figures 3 and 4, the CLF information of a child node can be stored in the child node.

[0067] In some implementations, the main thread 202 can be configured to assign seeded clusters in the central list structure 212 to respective worker threads. To avoid contention, the scheduling strategy should assign most excited clusters to be grown by separate worker threads. However, this can be problematic because for the decoder 112 to be wait-free (a desirable property for real-time decoding, etc.), all worker threads need to be able to make progress completing work even when one worker thread is stalled.

[0068] This can be achieved through so-called work-stealing, which can be implemented due to the atomicity of the compressed logical inversion tracking table 206. For example, in some implementations, when a worker thread reads the list of available clusters in the central list structure 212 maintained by the main thread 202, it can record clusters that are not specifically assigned to the worker thread. Then, when the worker thread finishes modifying a cluster that it pulled from the central list structure 212, the worker thread can steal (e.g., acquire) another cluster from another domain, e.g., another worker thread. The worker thread can then perform a decryption process and modify the "stolen" cluster.

[0069] The decoder 112 can be configured to perform work-stealing with minimal overhead by using a separate data structure that tracks clusters as they are assigned to worker threads 204a-d. The separate data structure only needs to be updated when the main thread 202 seeds a new cluster or when a worker thread performs a work-steal, thereby minimizing the overhead of tracking this information.

[0070] Once a worker thread has cycled through all queued clusters in the private sorted data structure, the worker thread can be configured to pull a new cluster from the central list structure 212. If no excited clusters remain in the central list structure 212, the worker thread can be configured to wait for a new round of measurement data to become available (e.g., wait for the main thread to seed a new cluster with new measurement data). Alternatively, or additionally, the worker thread can perform operations in coordination with the main thread 202 to complete cleanup or reset tasks, such as freezing and deleting old clusters that are no longer excited. Alternatively, or additionally, the worker thread may steal clusters from other worker threads, as described above.

[0071] When all clusters have been processed by the multiple worker threads 204a-d, e.g., when all clusters have been modified to have zero parity, the decoder 112 can be configured to recover the decoded output using the processed clusters. The specific operations performed by the decoder 112 to recover the decoded output depend on the underlying decoding process. For example, in some implementations, the decoder 112 can recover the decoded output by computing, for each processed cluster, the net logical inversion on the path from the child node in the cluster corresponding to the detection event to the root node of the cluster. The decoder 112 can then compute the total parity of all net logical inversions across each processed cluster. The total parity of all net logical inversions provides an overall prediction of whether an error during the quantum computation caused a logical observable to be inverted. The total parity of all net logical inversions does not need to be computed last, but instead can be kept incrementally up-to-date as workers modify data structures. When two clusters A and B are merged and A becomes a child of B, then the net inversion is changed if A has non-zero parity and the CLF bit on the path from the root of A to the root of B is non-zero. This procedure generalizes directly to the case of multiple observables.

[0072] As discussed above with reference to FIG. 1, the decoder 112 (or, more generally, the classical processor 104) can be configured to use the prediction to determine a correction operator that, when applied to a quantum error-correcting code executed by a quantum computing device, corrects the error.

[0073] 3 is a schematic block diagram 300 of data stored in a compressed logical inversion tracking table for a particular node cluster in a detector graph. As discussed above with reference to FIG. 2, the data stored in the compressed logical inversion tracking table for a particular cluster includes data related to the cluster as a whole, e.g., data specifying characteristics of the cluster. This data may be stored in the root node 302 of the cluster and is kept up to date whenever the cluster is modified. The data stored in the compressed logical inversion tracking table for a particular cluster also includes compressed logical inversion (CLF) information for each child node in the cluster. The CLF information for a child node may be stored in the child node, e.g., CLF information 320 for child node 304 may be stored in child node 304.

[0074] The stored data may include a node type specifier 306, e.g., an indication of whether each node in the compressed logical inversion tracking table corresponds to a root node or a child node. In the example shown in FIG. 3, a node type specifier of "1" indicates that the node is a root node, and a node type specifier of "0" indicates that the node is a child node. When two clusters are merged, the root node of one of the original clusters must be changed to point to the root node of the newly combined cluster. This requires determining whether a given node is actually a root. Therefore, a node type specifier bit is stored in the stored data of each node. There are other ways this can be done. For example, every node could instead have a pointer to its parent, and a null (zero) value indicates that the node is actually a root node with no parent. One advantage of a scheme in which a single bit is used instead is that the space used to store a null value can instead be used to store additional data in the root node.

[0075] The stored data may also include data specifying the parity 308 of the detection events contained in the cluster. This data is a property of the cluster (and not the particular child nodes contained in the cluster) and is therefore stored in the root node 302. When a cluster is initially seeded, the parity 308 of the detection events is non-zero, e.g., 1; as the cluster changes, e.g., grows and merges with other clusters, the parity 308 of the detection events is updated to 0 because the cluster subsequently contains two detection events. In some implementations, updating the parity 308 of the detection events from 1 to 0 can "freeze" the cluster, preventing further changes to the cluster by worker threads until another cluster with non-zero parity grows to contact and merge with the zero parity cluster. When such an event occurs, the parity can be used to incrementally update the net logical inversion information according to the net logical inversion tracking protocol described above.

[0076] The stored data may also include data specifying the cluster's boundary information 310. This data is a property of the cluster (and not the particular child nodes contained in the cluster) and is therefore stored in the root node 302. The boundary information 310 may include data specifying whether the cluster has reached the boundary of the code's decoding graph. Once the boundary is reached, the cluster's parity is set to zero and it will not grow again during decoding. The boundary information 310 may also include data specifying which nodes in the detector graph currently form the boundary of the cluster. This information is used by worker threads to determine the current size of the cluster and may be used, for example, to prioritize the processing of some clusters over others.

[0077] The stored data may also include data specifying a minimum time coordinate 312 and a maximum time coordinate 314. This data is a property of the cluster (and not the particular child nodes contained in the cluster) and is therefore stored in the root node 302. The time coordinates may be used to prioritize cluster growth. For example, in one implementation, to reduce RT decoding delays, excitation clusters that extend to earlier time coordinates may be processed preferentially over clusters that are limited to later time coordinates. The time coordinates may also be used to prohibit growth of excitation clusters that extend horizontally into the future, i.e., too close to the earliest time coordinate where not all measurements are known to the decoder.

[0078] The stored data also includes CLF information for each child node, e.g., CLF information 320 for child node 304. The CLF information for a child node is stored in the child node. The CLF information, along with net parity information, can be used by the decoder to incrementally calculate the net number of logical inversions on paths that include the corresponding child node during decoding.

[0079] The stored data also includes a parent node index for each child node, e.g., parent node index 322 for child node 304. The parent node index points to the child's parent (ascending) node. The parent node index of a child node is stored in the child node. The parent node index can be used by a decoder to identify a path from the child node corresponding to a detected event in a cluster to the root node of the cluster, e.g., for use by the decoder when generating decoded output and computing a net logic inversion on the path from the detected event to the root node.

[0080] In some implementations, the stored data may also include data specifying neighboring nodes of the cluster that are not yet included in the cluster. These neighboring nodes encode the graph structure as a bounds map from the node to a CLF bit (equal to 1 if the edge traversed from the cluster to reach the node inverts the logical observable). The bounds map may be large; therefore, a pointer 316 to an external memory area storing external atomic data 318 may be stored in the root node 202, and the bounds map may be stored in the external memory area. That is, the most important data (the data stored in the root node and child nodes) may be compressed to fit within a fixed size, e.g., one 64-bit word, and the remaining data may be stored in the external memory area. In some implementations, the external memory area storing external atomic data 318 may use memory managed by an atomic allocator with reference counts to ensure that memory is reallocated only after all references to it are released, thereby avoiding memory access violations. The bounds map is used during cluster growth to find the next node(s) to add to the growing cluster.

[0081] In some implementations, one or more optimizations can be implemented to improve the performance of the compressed logical inversion tracking table, which is particularly beneficial because the compressed logical inversion tracking table is a core-shared global data structure of the decoder 112. The compressed logical inversion tracking table simply requires an atomic compare and exchange on large (multiple-word) data objects. This can be implemented using hardware transactional memory (HTM) on certain processors. However, on most central processing units, only a single-word compare and exchange, e.g., x86 cmxchg, is available as a hardware instruction. Even on chips that support HTM, the transaction can sometimes fail incorrectly, necessitating a fallback to a simpler atomic primitive. To construct a multi-word compare and exchange from a single-word compare and exchange, some prior art techniques propose emulating a multi-word compare and exchange by always allocating new memory and adding a layer of indirection using a single-word compare and exchange. However, this can lead to unbounded memory usage and can damage performance due to the many extra reads and writes to memory resulting from excessive copies and layers of indirection.

[0082] Therefore, one or more of the following techniques can be implemented in combination to atomically protect the required node data with better performance than the simple solution above.

[0083] For example, if the data being updated is packed into a single word, no new memory allocation is required. Multiple pieces of data, such as parent node specifiers and cluster parity, can be non-trivially packed into a 64-bit word along with pointers to external atomic data (if needed). Updates to packed data do not require loads / stores to external memory, improving performance.

[0084] As another example, regions of memory that store external atomic data objects cannot be recycled in a naive implementation because a worker thread that stops while still holding a pointer to that memory may eventually dereference it, leading to an inconsistent state when the memory is recycled, although this can be overcome by using an atomic pool allocator with reference counting.

[0085] As another example, if an externally stored atomic data object is needed, a simple approach to reducing this data to the root of the tree is to copy it to new external memory and then perform a compare-and-swap to update the pointer in the node word. Implementing a pop / push technique instead can improve performance. The central problem with updating the members of a root node in-place is that even if the update to the external data is successful, the actions of a second, "interfering" worker thread may cause the node to cease to be a root. A simple solution would be for the updating worker thread to detect this situation by checking whether the node is still a root after updating the external memory. If the worker thread detects such a situation, it will not notice the change, and the external memory update can be considered complete. If the worker thread detects the change, it will decide to climb the tree (cluster) and continue updating the external data at the new root. However, there is ambiguity about how the worker thread should reconcile the original modified data. This ambiguity arises because an interfering worker thread may itself read from its external memory and propagate it up the tree before or after the first thread successfully updates to external memory. One exemplary way to avoid this ambiguity is to impose conservation laws on externally stored atomic data objects. Specifically, data from these objects can be atomically "popped" from the memory of child nodes before the data is added to the object associated with the root node via an atomic "push" update.

[0086] For example, an integer-sized counter (which includes a sum as a reduction operation) can be set to zero with a compare-and-exchange before adding its value to the root node with an atomic add instruction. By imposing conservation laws on data stored in externally allocated memory pointed to by the root node, any missteps due to thread interference can be detected and cleanly corrected. For example, if a worker thread pushes data into an object in the root node and discovers that the object is no longer root, this push can be undone with a pop. The worker thread can then climb the tree to the new root node, and finally, the worker thread can push into the object specified by the new root node. In this case, there is no ambiguity as to which worker thread can add this data to the root, because the success of its atomic pop determines which worker thread can do so. The pop-and-push paradigm provides a general incrementing method for guaranteeing atomicity of reduction operations performed on each set in the system without additional reads and writes. Beyond integer counters, any atomic data structure, such as a linked list, that can be atomically "popped from" and "pushed to" can be used inside the atomic external data object pointed to by the root node. For example, a general strategy for any 63-bit payload could be to add a "deleted" bit to indicate that it has been "popped", and reference counting in the pool allocator could be used to recycle unused memory locations.

[0087] 4 is a schematic block diagram of a tree 400 of nodes included in a forest including a compressed logical inversion tracking table. As described above with reference to FIG. 2, the compressed logical inversion tracking table stores data for each cluster included in the detector graph. Each cluster includes a root node 402 (with no ascending nodes) and one or more descending child nodes 404a-f (child nodes include leaf nodes with no descending nodes, e.g., child nodes 404a, 404c, 404d, and 404f, or child nodes with one or more descending child nodes, e.g., child nodes 404b and 404e). That is, each cluster is represented by a linked tree 400, and the entire collection of clusters in the detector graph is a forest of such trees.

[0088] 5 is a flowchart of an exemplary process 500 for performing a decoding process on measurement data received from a quantum computing system to determine errors in quantum computations performed by the quantum computing system. For convenience, process 500 is described as being performed by a component of a classical computing system. For example, a classical decoder, such as decoder 112 of FIGS. 1 and 2, can be appropriately programmed to perform exemplary process 500.

[0089] The system acquires measurement data from a quantum computing system and generates a detector graph for the decoding process. The system then identifies one or more detection events in the measurement data and, for each identified detection event, seeds a cluster of nodes with non-zero parity in the detector graph (step 502). The system places the seeded cluster of nodes in a central list structure.

[0090] The system instantiates a data structure common to each worker thread of the multiple worker threads (step 504). The data structure stores data for node clusters of the detector graph during the decoding process, e.g., stores data for a dynamic cluster system during the decoding process. Each node cluster includes a root node with no ascending nodes and can include one or more descending child nodes, where the child nodes include either leaf nodes with no descending nodes or one or more descending child nodes. The cluster system is referred to as a dynamic cluster system because the number of child nodes included in each cluster can change as the decoding process is performed, e.g., as the cluster grows or shrinks.

[0091] The data stored in the data structure includes compressed logical inversion information for child nodes in each node cluster. In some embodiments, the compressed logical inversion information for a child node includes the parity of the logical inversion along the decoding graph path from the child node to its parent node, and the compressed logical inversion information is used together with the cluster parity information to determine the parity inversion applied to the logical observable by merging two clusters. The compressed logical inversion information for a child node includes the parity inversion applied to the logical observable by an operator with a zero bound that includes the child node and the parent node in the tree (i.e., the net inversion of the parity between the child node and the parent node in the decoding graph). The compressed logical inversion information for a child node can be stored in the child node data structure.

[0092] The data stored in the data structure may also include data specifying characteristics of each cluster. For example, for a particular cluster, the data may include data specifying one or more of a node type designator, the parity of detected events in the cluster of nodes, the total size of the cluster of nodes, and the boundary nodes of the cluster of nodes. This data may be stored in the data structure at the root node of the particular cluster.

[0093] The system runs a decoding process on the detector graph to modify seeded node clusters in the detector graph. Each worker thread of multiple worker threads retrieves one or more of the seeded node clusters (step 506) and runs a decoding process on the detector graph to modify the retrieved node cluster or clusters (step 508). The multiple worker threads can perform steps 506 and 508 in parallel. For each cluster modification, the worker thread implementing the modification updates corresponding data in a data structure under an atomic primitive. In some implementations, the atomic primitive may be a compare-and-exchange atomic primitive or an atomic pool allocator with reference counting. The system recovers the decoded output of the decoding process using the updated data in the data structure (step 510). For example, the system can use the data stored in the data structure to calculate, for each node in the detector graph associated with the detection event, a net logical inversion on the node's path to its respective root node. The system can then calculate the total parity of the net logical inversion (the computation that can be performed and the corresponding result that is incrementally stored during decoding) to obtain a prediction as to whether the logical observable of the quantum computation has been inverted due to an error. The system can use the prediction to determine a correction operator that will correct the error when applied to the quantum computing system.

[0094] All of the embodiments and functional operations described herein can be implemented in digital electronic circuitry, or computer software, firmware, or hardware, including the structures disclosed herein and their structural equivalents, or one or more combinations thereof. The embodiments may be implemented as one or more computer program products, such as one or more modules of computer program instructions encoded on a computer-readable medium for execution by or to control the operation of a data processing apparatus. The computer-readable medium may be a machine-readable storage device, a machine-readable storage substrate, a memory device, a composition of matter affecting a machine-readable propagated signal, or one or more combinations thereof. The term "data processing apparatus" encompasses all apparatuses, devices, and machines for processing data, including, by way of example, a programmable processor, a computer, or multiple processors or computers. In addition to hardware, an apparatus may include code that creates an execution environment for the computer program, such as code constituting processor firmware, a protocol stack, a database management system, an operating system, or one or more combinations thereof. A propagated signal is a signal generated to encode information for transmission to an appropriate receiver apparatus, e.g., an artificially generated signal such as a mechanically generated electrical, optical, or electromagnetic signal.

[0095] A computer program (also known as a program, software, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, and can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program, or in multiple associated files (e.g., files storing one or more modules, subprograms, or portions of code). A computer program can be deployed to be executed on one computer or on multiple computers located at one site or distributed across multiple sites and interconnected by a communications network.

[0096] The processes and logic flows described herein may be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows may also be performed by, and apparatus may also be implemented as, special purpose logic circuitry, such as an FPGA (field programmable gate array) or an ASIC (application-specific integrated circuit).

[0097] Processors suitable for the execution of a computer program include, by way of example, both general and special purpose processors, and any one or more processors of any kind of digital computer. Generally, a processor will receive instructions and data from a read-only memory or a random access memory or both.

[0098] The essential elements of a computer are a processor for executing instructions and one or more memory devices for storing instructions and data. Typically, a computer also includes one or more mass storage devices, such as magnetic, magneto-optical, or optical disks, for storing data, or is operatively connected to receive and / or transfer data from these devices. However, a computer need not include such devices. Moreover, computers may be embedded in other devices, such as tablet computers, mobile phones, personal digital assistants (PDAs), mobile audio players, and global positioning system (GPS) receivers, to name a few. Computer-readable media suitable for storing computer program instructions and data include all forms of non-volatile memory, media, and memory devices, including, for example, semiconductor memory devices such as EPROMs, EEPROMs, and flash memory devices; magnetic disks such as internal or removable hard disks; magneto-optical disks; and CD-ROM and DVD-ROM disks. The processor and memory may be supplemented by, or incorporated in, special purpose logic circuitry.

[0099] To interact with a user, embodiments may be implemented in a computer having a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user, and a keyboard and pointing device (e.g., a mouse or trackball) by which the user can provide input to the computer. Other types of devices may also be used to provide interaction with the user. For example, feedback provided to the user may be any form of sensory feedback, such as visual feedback, auditory feedback, or tactile feedback, and input from the user may be acoustic, verbal, or tactile input.

[0100] The embodiments may be implemented in a computing system that includes a back-end component, e.g., a data server, or includes a middleware component, e.g., an application server, or includes a front-end component, e.g., a client computer having a graphical user interface or web browser through which a user can interact with the embodiment, or any combination of one or more such back-end, middleware, or front-end components. The components of the system may be interconnected by any form or medium of digital data communication, e.g., a communication network. Examples of communication networks include a local area network (LAN), a wide area network (WAN), e.g., the Internet.

[0101] A computing system may include clients and servers. Clients and servers are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other.

[0102] While this specification contains many details, these should not be construed as limiting the scope of the disclosure or the scope of what may be claimed, but rather as descriptions of features specific to particular embodiments. Certain features described herein in the context of separate embodiments may also be implemented in combination in a single embodiment. Conversely, various features described in a single embodiment may also be implemented in multiple embodiments separately or in any suitable subcombination. Furthermore, while features may be described above as operating in a particular combination and may initially be claimed as such, one or more features from a claimed combination may, in some cases, be deleted from that combination, and a claimed combination may be directed to a subcombination or a variation of a subcombination.

[0103] Similarly, while operations are shown in the figures in a particular order, this should not be understood as requiring such operations to be performed in the particular order or sequence shown, or that all of the illustrated operations be performed, to achieve desirable results. In certain situations, multitasking and parallel processing may be advantageous. Furthermore, the separation of various system components in the above embodiments should not be understood as requiring such separation in all embodiments, and it should be understood that the described program components and systems may generally be integrated into a single software product or packaged into multiple software products.

[0104] In each instance where an HTML file is mentioned, other file types or formats may be substituted. For example, an HTML file may be substituted with an XML, JSON, plain text, or other type of file. Additionally, where a table or hash table is mentioned, other data structures (such as a spreadsheet, relational database, or structured file) may be used.

[0105] Thus, while specific embodiments have been described, other embodiments are within the scope of the following claims. For example, the actions recited in the claims may be performed in a different order and still produce desirable results.

Claims

1. 1. A system comprising: a classical computer system configured to perform a decoding process on measurement data received from a quantum computing system and determine errors in quantum computations performed by the quantum computing system, the classical computing system comprising: Main thread, Multiple worker threads, and Implement a data structure common to each worker thread of the plurality of worker threads, the data structure storing data of a dynamic system of feature node clusters of a detector graph for the decoding process; each node cluster includes a root node with no ascending nodes and one or more descending child nodes, the child nodes including leaf nodes with no descending nodes or one or more descending child nodes; the data includes compressed logical inversion information for child nodes within each node cluster; During the execution of the decoding process, each of the plurality of worker threads, in parallel with each of the other worker threads, Obtaining, from the main thread, one or more node clusters in the detector graph, each node cluster including one or more detected events in the measurement data; executing the decoding process to modify the one or more node clusters, wherein for each cluster modification, the worker thread updates data in the data structure corresponding to the cluster under atomic primitives.

2. 2. The system of claim 1, wherein the data structure stores, at a root node of each node cluster, data specifying one or more of a node type designator, a parity of detected events in the node cluster, a total size of the node cluster, a boundary node of the node cluster, a minimum time coordinate, and a maximum time coordinate.

3. The system of claim 1 or 2, wherein the classical computing system further includes one or more memory areas external to the data structure, each memory area storing a boundary map for each node cluster.

4. 4. The system of claim 3, wherein data objects in the memory region are stored based on conservation rules, and data of the data objects is popped off from the memory of child nodes based on the conservation rules before a push update adds the data to an object associated with a root node.

5. The system according to any one of claims 1 to 4, wherein the compressed logical inversion information of a child node included in each node cluster is stored in the child node.

6. 6. The system of claim 1, wherein the compressed logical inversion information of the child node includes the parity of logical inversions along the decoding graph path from the child node to its parent node, and the compressed logical inversion information is used together with cluster parity information to determine the parity inversion applied to the logical observable by merging two clusters.

7. The classical computing system is further configured to recover a decoded output of the decoding process, the decoding process using data in the data structure to: For each node of the detector graph associated with a detected event, computing a net logic inversion on the node's path to its respective root node; and calculating a sum parity of the net logical inversions.

8. The system of any one of claims 1 to 7, wherein the decoding process comprises a joint search or minimum weight exact matching decoding process.

9. The system of any one of claims 1 to 8, wherein the data structure is lock-free.

10. The system of any one of claims 1 to 9, wherein the atomic primitives include a compare-and-exchange atomic primitive or an atomic pool allocator with reference counting.

11. 11. The system of claim 1, wherein data updates in the data structure corresponding to each change of a cluster are packed into a single word, and optionally the single word includes a pointer to external atomic data.

12. During the execution of the decoding process, the main thread: identifying detected events in the measurement data; for each detection event, seeding a node cluster with non-zero parity in the detector graph; and placing the seeded node clusters into a central list structure, wherein the plurality of worker threads retrieve and place each node cluster from the central list structure.

13. A system comprising the classical computer system of any one of claims 1 to 12 and a quantum computing system, wherein the classical computer system is configured to receive the measurement data from the quantum computing system and determine an error in a quantum computation performed by the quantum computing system.

14. 1. A computer-implemented method for performing a decoding process on measurement data received from a quantum computing system to determine errors in quantum computations performed by the quantum computing system, comprising: instantiating a common data structure for each worker thread of a plurality of worker threads, the data structure storing data of a dynamic system of feature node clusters of a detector graph for the decoding process; each cluster of nodes includes a root node with no ascending nodes and one or more descending child nodes, the child nodes including either leaf nodes with no descending nodes or one or more descending child nodes; instantiating the data, the data including compressed logical inversion information of child nodes within each node cluster; For each worker thread of the plurality of worker threads, and in parallel with each of the other worker threads, retrieving, from a main thread, one or more of the node clusters, each retrieved node cluster including one or more detected events in the measurement data; executing the decoding process on the detector graph to modify the obtained one or more node clusters, including, for each cluster modification, updating data in the data structure corresponding to the cluster under an atomic primitive; and recovering a decoded output of the decoding process using the updated data in the data structure.

15. Recovering the decoded output of the decoding process using the updated data in the data structure includes: For each node of the detector graph associated with a detected event, computing a net logic inversion on the node's path to its respective root node; and calculating a sum parity of the net logical inversions.

16. 16. The method of claim 14 or 15, wherein the data structure stores, at a root node of each node cluster, data specifying one or more of a node type designator, a parity of detected events in the node cluster, a total size of the node cluster, a boundary node of the node cluster, a minimum time coordinate, and a maximum time coordinate.

17. 17. The method of claim 14, wherein the compressed logical inversion information of a child node comprises a parity inversion applied to a logical observable by an operator with a zero bound that includes the child node and a parent node in a corresponding graph tree.

18. The method of any one of claims 14 to 17, wherein the decoding process comprises a joint search or minimum weight exact matching decoding process.

19. The method of any one of claims 14 to 18, wherein the atomic primitive comprises a compare-and-exchange atomic primitive or an atomic pool allocator with reference counting.

20. 20. A method according to any one of claims 14 to 19, wherein updating data in the data structure corresponding to each change in a cluster comprises packing updates into a single word, optionally the single word comprising a pointer to external atomic data.

21. identifying, by the main thread, detected events in the measurement data; seeding, by the main thread, for each detection event, a node cluster with non-zero parity in the detector graph; 18. The method of claim 17, further comprising: placing, by the main thread, the seeded node clusters into a central list structure, wherein the plurality of worker threads retrieve and place each node cluster from the central list structure.

22. 1. A method for determining an error in a quantum computation, comprising: performing one or more measurements on a quantum computing system implementing said quantum computing to generate measurement data; receiving the measurement data at a classical computing system and from the quantum computing system; and executing on said classical computer system the method of any one of claims 14 to 21.